2 * linux/include/asm-arm/arch-omap/mux.h
4 * Table of the Omap register configurations for the FUNC_MUX and
5 * PULL_DWN combinations.
7 * Copyright (C) 2004 - 2008 Texas Instruments Inc.
8 * Copyright (C) 2003 - 2008 Nokia Corporation
10 * Written by Tony Lindgren
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 * NOTE: Please use the following naming style for new pin entries.
27 * For example, W8_1610_MMC2_DAT0, where:
29 * - 1610 = 1510 or 1610, none if common for both 1510 and 1610
30 * - MMC2_DAT0 = function
33 #ifndef __ASM_ARCH_MUX_H
34 #define __ASM_ARCH_MUX_H
36 #define PU_PD_SEL_NA 0 /* No pu_pd reg available */
37 #define PULL_DWN_CTRL_NA 0 /* No pull-down control needed */
39 #ifdef CONFIG_OMAP_MUX_DEBUG
40 #define MUX_REG(reg, mode_offset, mode) .mux_reg_name = "FUNC_MUX_CTRL_"#reg, \
41 .mux_reg = FUNC_MUX_CTRL_##reg, \
42 .mask_offset = mode_offset, \
45 #define PULL_REG(reg, bit, status) .pull_name = "PULL_DWN_CTRL_"#reg, \
46 .pull_reg = PULL_DWN_CTRL_##reg, \
50 #define PU_PD_REG(reg, status) .pu_pd_name = "PU_PD_SEL_"#reg, \
51 .pu_pd_reg = PU_PD_SEL_##reg, \
54 #define MUX_REG_730(reg, mode_offset, mode) .mux_reg_name = "OMAP730_IO_CONF_"#reg, \
55 .mux_reg = OMAP730_IO_CONF_##reg, \
56 .mask_offset = mode_offset, \
59 #define PULL_REG_730(reg, bit, status) .pull_name = "OMAP730_IO_CONF_"#reg, \
60 .pull_reg = OMAP730_IO_CONF_##reg, \
66 #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \
67 .mask_offset = mode_offset, \
70 #define PULL_REG(reg, bit, status) .pull_reg = PULL_DWN_CTRL_##reg, \
74 #define PU_PD_REG(reg, status) .pu_pd_reg = PU_PD_SEL_##reg, \
77 #define MUX_REG_730(reg, mode_offset, mode) \
78 .mux_reg = OMAP730_IO_CONF_##reg, \
79 .mask_offset = mode_offset, \
82 #define PULL_REG_730(reg, bit, status) .pull_reg = OMAP730_IO_CONF_##reg, \
86 #endif /* CONFIG_OMAP_MUX_DEBUG */
88 #define MUX_CFG(desc, mux_reg, mode_offset, mode, \
89 pull_reg, pull_bit, pull_status, \
90 pu_pd_reg, pu_pd_status, debug_status) \
93 .debug = debug_status, \
94 MUX_REG(mux_reg, mode_offset, mode) \
95 PULL_REG(pull_reg, pull_bit, pull_status) \
96 PU_PD_REG(pu_pd_reg, pu_pd_status) \
101 * OMAP730 has a slightly different config for the pin mux.
102 * - config regs are the OMAP730_IO_CONF_x regs (see omap730.h) regs and
103 * not the FUNC_MUX_CTRL_x regs from hardware.h
104 * - for pull-up/down, only has one enable bit which is is in the same register
107 #define MUX_CFG_730(desc, mux_reg, mode_offset, mode, \
108 pull_bit, pull_status, debug_status)\
111 .debug = debug_status, \
112 MUX_REG_730(mux_reg, mode_offset, mode) \
113 PULL_REG_730(mux_reg, pull_bit, pull_status) \
117 #define MUX_CFG_24XX(desc, reg_offset, mode, \
118 pull_en, pull_mode, dbg) \
122 .mux_reg = reg_offset, \
124 .pull_val = pull_en, \
125 .pu_pd_val = pull_mode, \
128 /* 24xx/34xx mux bit defines */
129 #define OMAP2_PULL_ENA (1 << 3)
130 #define OMAP2_PULL_UP (1 << 4)
131 #define OMAP2_ALTELECTRICALSEL (1 << 5)
133 /* 34xx specific mux bit defines */
134 #define OMAP3_INPUT_EN (1 << 8)
135 #define OMAP3_OFF_EN (1 << 9)
136 #define OMAP3_OFFOUT_EN (1 << 10)
137 #define OMAP3_OFFOUT_VAL (1 << 11)
138 #define OMAP3_OFF_PULL_EN (1 << 12)
139 #define OMAP3_OFF_PULL_UP (1 << 13)
140 #define OMAP3_WAKEUP_EN (1 << 14)
142 /* 34xx mux mode options for each pin. See TRM for options */
143 #define OMAP34XX_MUX_MODE0 0
144 #define OMAP34XX_MUX_MODE1 1
145 #define OMAP34XX_MUX_MODE2 2
146 #define OMAP34XX_MUX_MODE3 3
147 #define OMAP34XX_MUX_MODE4 4
148 #define OMAP34XX_MUX_MODE5 5
149 #define OMAP34XX_MUX_MODE6 6
150 #define OMAP34XX_MUX_MODE7 7
152 /* 34xx active pin states */
153 #define OMAP34XX_PIN_OUTPUT 0
154 #define OMAP34XX_PIN_INPUT OMAP3_INPUT_EN
155 #define OMAP34XX_PIN_INPUT_PULLUP (OMAP2_PULL_ENA | OMAP3_INPUT_EN \
157 #define OMAP34XX_PIN_INPUT_PULLDOWN (OMAP2_PULL_ENA | OMAP3_INPUT_EN)
159 /* 34xx off mode states */
160 #define OMAP34XX_PIN_OFF_NONE 0
161 #define OMAP34XX_PIN_OFF_OUTPUT_HIGH (OMAP3_OFF_EN | OMAP3_OFFOUT_EN \
163 #define OMAP34XX_PIN_OFF_OUTPUT_LOW (OMAP3_OFF_EN | OMAP3_OFFOUT_EN)
164 #define OMAP34XX_PIN_OFF_INPUT_PULLUP (OMAP3_OFF_EN | OMAP3_OFF_PULL_EN \
166 #define OMAP34XX_PIN_OFF_INPUT_PULLDOWN (OMAP3_OFF_EN | OMAP3_OFF_PULL_EN)
167 #define OMAP34XX_PIN_OFF_WAKEUPENABLE OMAP3_WAKEUP_EN
169 #define MUX_CFG_34XX(desc, reg_offset, mux_value){ \
172 .mux_reg = reg_offset, \
173 .mux_val = mux_value \
178 const unsigned int mux_reg;
181 #if defined(CONFIG_ARCH_OMAP34XX)
182 u16 mux_val; /* Wake-up, off mode, pull, mux mode */
185 #if defined(CONFIG_ARCH_OMAP1) || defined(CONFIG_ARCH_OMAP24XX)
186 const unsigned char mask_offset;
187 const unsigned char mask;
189 const char *pull_name;
190 const unsigned int pull_reg;
191 const unsigned char pull_val;
192 const unsigned char pull_bit;
194 const char *pu_pd_name;
195 const unsigned int pu_pd_reg;
196 const unsigned char pu_pd_val;
199 #if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
200 const char *mux_reg_name;
206 /* OMAP 730 keyboard */
224 enum omap1xxx_index {
225 /* UART1 (BT_UART_GATING)*/
229 /* UART2 (COM_UART_GATING)*/
235 /* UART3 (GIGA_UART_GATING) */
241 UART3_BCLK, /* 12MHz clock out */
248 /* USB master generic */
331 V5_1610_MMC2_DATDIR0,
332 W19_1610_MMC2_DATDIR1,
335 /* OMAP-1610 External Trace Interface */
358 /* OMAP-1610 uWire */
377 /* OMAP-1610 Flash */
378 L3_1610_FLASH_CS2B_OE,
379 M8_1610_FLASH_CS2B_WE,
389 /* OMAP-1710 MMC CMDDIR and DATDIR0 */
392 P20_1710_MMC_DATDIR0,
394 /* OMAP-1610 USB0 alternate pin configuration */
437 /* Power management */
446 /* CompactFlash controller */
453 /* parallel camera */
477 enum omap24xx_index {
484 /* 24xx Menelaus interrupt */
490 /* 24xx GPMC chipselects, wait pin monitoring */
499 Y15_24XX_MCBSP2_CLKX,
537 /* 24xx external DMA requests */
556 F19_24XX_MMC_DAT_DIR0,
557 E20_24XX_MMC_DAT_DIR1,
558 F18_24XX_MMC_DAT_DIR2,
559 E18_24XX_MMC_DAT_DIR3,
560 G18_24XX_MMC_CMD_DIR,
585 AA4_24XX_USB2_TLLSE0,
602 /* 24xx Menelaus Keypad GPIO */
621 AD9_2430_USB0HS_DATA3,
622 Y11_2430_USB0HS_DATA4,
623 AD7_2430_USB0HS_DATA5,
624 AE7_2430_USB0HS_DATA6,
625 AD4_2430_USB0HS_DATA2,
626 AF9_2430_USB0HS_DATA0,
627 AE6_2430_USB0HS_DATA1,
632 AC7_2430_USB0HS_DATA7,
635 AC10_2430_MCBSP2_FSX,
636 AD16_2430_MCBSP2_CLX,
639 AC10_2430_MCBSP2_FSX_OFF,
640 AD16_2430_MCBSP2_CLX_OFF,
641 AE13_2430_MCBSP2_DX_OFF,
642 AD13_2430_MCBSP2_DR_OFF,
646 enum omap34xx_index {
648 /* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/
649 Y8_3430_USB1HS_PHY_CLK,
650 Y9_3430_USB1HS_PHY_STP,
651 AA14_3430_USB1HS_PHY_DIR,
652 AA11_3430_USB1HS_PHY_NXT,
653 W13_3430_USB1HS_PHY_DATA0,
654 W12_3430_USB1HS_PHY_DATA1,
655 W11_3430_USB1HS_PHY_DATA2,
656 Y11_3430_USB1HS_PHY_DATA3,
657 W9_3430_USB1HS_PHY_DATA4,
658 Y12_3430_USB1HS_PHY_DATA5,
659 W8_3430_USB1HS_PHY_DATA6,
660 Y13_3430_USB1HS_PHY_DATA7,
662 /* PHY - HSUSB: 12-pin ULPI PHY: Port 2*/
663 AA8_3430_USB2HS_PHY_CLK,
664 AA10_3430_USB2HS_PHY_STP,
665 AA9_3430_USB2HS_PHY_DIR,
666 AB11_3430_USB2HS_PHY_NXT,
667 AB10_3430_USB2HS_PHY_DATA0,
668 AB9_3430_USB2HS_PHY_DATA1,
669 W3_3430_USB2HS_PHY_DATA2,
670 T4_3430_USB2HS_PHY_DATA3,
671 T3_3430_USB2HS_PHY_DATA4,
672 R3_3430_USB2HS_PHY_DATA5,
673 R4_3430_USB2HS_PHY_DATA6,
674 T2_3430_USB2HS_PHY_DATA7,
677 /* TLL - HSUSB: 12-pin TLL Port 1*/
678 Y8_3430_USB1HS_TLL_CLK,
679 Y9_3430_USB1HS_TLL_STP,
680 AA14_3430_USB1HS_TLL_DIR,
681 AA11_3430_USB1HS_TLL_NXT,
682 W13_3430_USB1HS_TLL_DATA0,
683 W12_3430_USB1HS_TLL_DATA1,
684 W11_3430_USB1HS_TLL_DATA2,
685 Y11_3430_USB1HS_TLL_DATA3,
686 W9_3430_USB1HS_TLL_DATA4,
687 Y12_3430_USB1HS_TLL_DATA5,
688 W8_3430_USB1HS_TLL_DATA6,
689 Y13_3430_USB1HS_TLL_DATA7,
691 /* TLL - HSUSB: 12-pin TLL Port 2*/
692 AA8_3430_USB2HS_TLL_CLK,
693 AA10_3430_USB2HS_TLL_STP,
694 AA9_3430_USB2HS_TLL_DIR,
695 AB11_3430_USB2HS_TLL_NXT,
696 AB10_3430_USB2HS_TLL_DATA0,
697 AB9_3430_USB2HS_TLL_DATA1,
698 W3_3430_USB2HS_TLL_DATA2,
699 T4_3430_USB2HS_TLL_DATA3,
700 T3_3430_USB2HS_TLL_DATA4,
701 R3_3430_USB2HS_TLL_DATA5,
702 R4_3430_USB2HS_TLL_DATA6,
703 T2_3430_USB2HS_TLL_DATA7,
705 /* TLL - HSUSB: 12-pin TLL Port 3*/
706 AA6_3430_USB3HS_TLL_CLK,
707 AB3_3430_USB3HS_TLL_STP,
708 AA3_3430_USB3HS_TLL_DIR,
709 Y3_3430_USB3HS_TLL_NXT,
710 AA5_3430_USB3HS_TLL_DATA0,
711 Y4_3430_USB3HS_TLL_DATA1,
712 Y5_3430_USB3HS_TLL_DATA2,
713 W5_3430_USB3HS_TLL_DATA3,
714 AB12_3430_USB3HS_TLL_DATA4,
715 AB13_3430_USB3HS_TLL_DATA5,
716 AA13_3430_USB3HS_TLL_DATA6,
717 AA12_3430_USB3HS_TLL_DATA7
721 struct omap_mux_cfg {
722 struct pin_config *pins;
724 int (*cfg_reg)(const struct pin_config *cfg);
727 #ifdef CONFIG_OMAP_MUX
728 /* setup pin muxing in Linux */
729 extern int omap1_mux_init(void);
730 extern int omap2_mux_init(void);
731 extern int omap_mux_register(struct omap_mux_cfg *);
732 extern int omap_cfg_reg(unsigned long reg_cfg);
734 /* boot loader does it all (no warnings from CONFIG_OMAP_MUX_WARNINGS) */
735 static inline int omap1_mux_init(void) { return 0; }
736 static inline int omap2_mux_init(void) { return 0; }
737 static inline int omap_cfg_reg(unsigned long reg_cfg) { return 0; }