2 * linux/include/asm-arm/arch-omap/board-3430sdp.h
4 * Hardware definitions for TI OMAP3430 SDP board.
6 * Initial creation by Syed Mohammed Khasim
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 #ifndef __ASM_ARCH_OMAP_3430SDP_H
30 #define __ASM_ARCH_OMAP_3430SDP_H
32 extern void sdp3430_usb_init(void);
34 #define DEBUG_BASE 0x08000000 /* debug board */
36 /* Placeholder for 3430SDP specific defines */
38 #define OMAP34XX_ETHR_START DEBUG_BASE
39 #define OMAP34XX_ETHR_GPIO_IRQ 29
42 * GPIO used for TSC2046, TI's Touchscreen controller
44 #ifdef CONFIG_OMAP3430_ES2
51 /* IMPORTANT NOTE ON MAPPING
54 * NOR always on 0x04000000
55 * MPDB always on 0x08000000
56 * NAND always on 0x0C000000
57 * OneNand Mapped to 0x20000000
58 * Boot Mode(NAND/NOR). The other on CS1
60 #define FLASH_BASE 0x04000000 /* NOR flash (64 Meg aligned) */
61 #define DEBUG_BASE 0x08000000 /* debug board */
62 #define NAND_BASE 0x0C000000 /* NAND flash */
63 #define ONENAND_MAP 0x20000000 /* OneNand flash */
65 #ifdef CONFIG_TWL4030_CORE
67 #define TWL4030_IRQNUM INT_34XX_SYS_NIRQ
69 /* TWL4030 Primary Interrupt Handler (PIH) interrupts */
70 #define IH_TWL4030_BASE IH_BOARD_BASE
71 #define IH_TWL4030_END (IH_TWL4030_BASE+8)
73 #ifdef CONFIG_TWL4030_GPIO
75 /* TWL4030 GPIO Interrupts */
76 #define IH_TWL4030_GPIO_BASE (IH_TWL4030_END)
77 #define IH_TWL4030_GPIO_END (IH_TWL4030_BASE+18)
78 #define NR_IRQS (IH_TWL4030_GPIO_END)
80 #define NR_IRQS (IH_TWL4030_END)
81 #endif /* CONFIG_I2C_TWL4030_GPIO */
82 #endif /* End of support for TWL4030 */
83 #endif /* __ASM_ARCH_OMAP_3430SDP_H */