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watchdog: another ioremap() fix
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1 /*
2  * linux/drivers/watchdog/omap_wdt.c
3  *
4  * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
5  *
6  * Author: MontaVista Software, Inc.
7  *       <gdavis@mvista.com> or <source@mvista.com>
8  *
9  * 2003 (c) MontaVista Software, Inc. This file is licensed under the
10  * terms of the GNU General Public License version 2. This program is
11  * licensed "as is" without any warranty of any kind, whether express
12  * or implied.
13  *
14  * History:
15  *
16  * 20030527: George G. Davis <gdavis@mvista.com>
17  *      Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
18  *      (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
19  *      Based on SoftDog driver by Alan Cox <alan@redhat.com>
20  *
21  * Copyright (c) 2004 Texas Instruments.
22  *      1. Modified to support OMAP1610 32-KHz watchdog timer
23  *      2. Ported to 2.6 kernel
24  *
25  * Copyright (c) 2005 David Brownell
26  *      Use the driver model and standard identifiers; handle bigger timeouts.
27  */
28
29 #include <linux/module.h>
30 #include <linux/types.h>
31 #include <linux/kernel.h>
32 #include <linux/fs.h>
33 #include <linux/mm.h>
34 #include <linux/miscdevice.h>
35 #include <linux/watchdog.h>
36 #include <linux/reboot.h>
37 #include <linux/init.h>
38 #include <linux/err.h>
39 #include <linux/platform_device.h>
40 #include <linux/moduleparam.h>
41 #include <linux/clk.h>
42
43 #include <linux/bitops.h>
44 #include <linux/io.h>
45 #include <linux/uaccess.h>
46 #include <mach/hardware.h>
47 #include <mach/prcm.h>
48
49 #include "omap_wdt.h"
50
51 static struct platform_device *omap_wdt_dev;
52
53 static unsigned timer_margin;
54 module_param(timer_margin, uint, 0);
55 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
56
57 static unsigned int wdt_trgr_pattern = 0x1234;
58 static spinlock_t wdt_lock;
59
60 struct omap_wdt_dev {
61         void __iomem    *base;          /* physical */
62         struct device   *dev;
63         int             omap_wdt_users;
64         struct clk      *armwdt_ck;
65         struct clk      *mpu_wdt_ick;
66         struct clk      *mpu_wdt_fck;
67         struct resource *mem;
68         struct miscdevice omap_wdt_miscdev;
69 };
70
71 static void omap_wdt_ping(struct omap_wdt_dev *wdev)
72 {
73         void __iomem    *base = wdev->base;
74         /* wait for posted write to complete */
75         while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
76                 cpu_relax();
77         wdt_trgr_pattern = ~wdt_trgr_pattern;
78         __raw_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
79         /* wait for posted write to complete */
80         while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
81                 cpu_relax();
82         /* reloaded WCRR from WLDR */
83 }
84
85 static void omap_wdt_enable(struct omap_wdt_dev *wdev)
86 {
87         void __iomem *base;
88         base = wdev->base;
89         /* Sequence to enable the watchdog */
90         __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
91         while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
92                 cpu_relax();
93         __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR);
94         while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
95                 cpu_relax();
96 }
97
98 static void omap_wdt_disable(struct omap_wdt_dev *wdev)
99 {
100         void __iomem *base;
101         base = wdev->base;
102         /* sequence required to disable watchdog */
103         __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
104         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
105                 cpu_relax();
106         __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
107         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
108                 cpu_relax();
109 }
110
111 static void omap_wdt_adjust_timeout(unsigned new_timeout)
112 {
113         if (new_timeout < TIMER_MARGIN_MIN)
114                 new_timeout = TIMER_MARGIN_DEFAULT;
115         if (new_timeout > TIMER_MARGIN_MAX)
116                 new_timeout = TIMER_MARGIN_MAX;
117         timer_margin = new_timeout;
118 }
119
120 static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev)
121 {
122         u32 pre_margin = GET_WLDR_VAL(timer_margin);
123         void __iomem *base;
124         base = wdev->base;
125
126         /* just count up at 32 KHz */
127         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
128                 cpu_relax();
129         __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
130         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
131                 cpu_relax();
132 }
133
134 /*
135  *      Allow only one task to hold it open
136  */
137
138 static int omap_wdt_open(struct inode *inode, struct file *file)
139 {
140         struct omap_wdt_dev *wdev;
141         void __iomem *base;
142         wdev = platform_get_drvdata(omap_wdt_dev);
143         base = wdev->base;
144         if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
145                 return -EBUSY;
146
147         if (cpu_is_omap16xx())
148                 clk_enable(wdev->armwdt_ck);    /* Enable the clock */
149
150         if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
151                 clk_enable(wdev->mpu_wdt_ick);    /* Enable the interface clock */
152                 clk_enable(wdev->mpu_wdt_fck);    /* Enable the functional clock */
153         }
154
155         /* initialize prescaler */
156         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
157                 cpu_relax();
158         __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
159         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
160                 cpu_relax();
161
162         file->private_data = (void *) wdev;
163
164         omap_wdt_set_timeout(wdev);
165         omap_wdt_enable(wdev);
166         return nonseekable_open(inode, file);
167 }
168
169 static int omap_wdt_release(struct inode *inode, struct file *file)
170 {
171         struct omap_wdt_dev *wdev;
172         wdev = file->private_data;
173         /*
174          *      Shut off the timer unless NOWAYOUT is defined.
175          */
176 #ifndef CONFIG_WATCHDOG_NOWAYOUT
177
178         omap_wdt_disable(wdev);
179
180         if (cpu_is_omap16xx())
181                 clk_disable(wdev->armwdt_ck);   /* Disable the clock */
182
183         if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
184                 clk_disable(wdev->mpu_wdt_ick); /* Disable the clock */
185                 clk_disable(wdev->mpu_wdt_fck); /* Disable the clock */
186         }
187 #else
188         printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
189 #endif
190         wdev->omap_wdt_users = 0;
191         return 0;
192 }
193
194 static ssize_t omap_wdt_write(struct file *file, const char __user *data,
195                 size_t len, loff_t *ppos)
196 {
197         struct omap_wdt_dev *wdev;
198         wdev = file->private_data;
199         /* Refresh LOAD_TIME. */
200         if (len) {
201                 spin_lock(&wdt_lock);
202                 omap_wdt_ping(wdev);
203                 spin_unlock(&wdt_lock);
204         }
205         return len;
206 }
207
208 static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
209                                                 unsigned long arg)
210 {
211         struct omap_wdt_dev *wdev;
212         int new_margin;
213         static const struct watchdog_info ident = {
214                 .identity = "OMAP Watchdog",
215                 .options = WDIOF_SETTIMEOUT,
216                 .firmware_version = 0,
217         };
218         wdev = file->private_data;
219
220         switch (cmd) {
221         case WDIOC_GETSUPPORT:
222                 return copy_to_user((struct watchdog_info __user *)arg, &ident,
223                                 sizeof(ident));
224         case WDIOC_GETSTATUS:
225                 return put_user(0, (int __user *)arg);
226         case WDIOC_GETBOOTSTATUS:
227                 if (cpu_is_omap16xx())
228                         return put_user(__raw_readw(ARM_SYSST),
229                                         (int __user *)arg);
230                 if (cpu_is_omap24xx())
231                         return put_user(omap_prcm_get_reset_sources(),
232                                         (int __user *)arg);
233         case WDIOC_KEEPALIVE:
234                 spin_lock(&wdt_lock);
235                 omap_wdt_ping(wdev);
236                 spin_unlock(&wdt_lock);
237                 return 0;
238         case WDIOC_SETTIMEOUT:
239                 if (get_user(new_margin, (int __user *)arg))
240                         return -EFAULT;
241                 omap_wdt_adjust_timeout(new_margin);
242
243                 spin_lock(&wdt_lock);
244                 omap_wdt_disable(wdev);
245                 omap_wdt_set_timeout(wdev);
246                 omap_wdt_enable(wdev);
247
248                 omap_wdt_ping(wdev);
249                 spin_unlock(&wdt_lock);
250                 /* Fall */
251         case WDIOC_GETTIMEOUT:
252                 return put_user(timer_margin, (int __user *)arg);
253         default:
254                 return -ENOTTY;
255         }
256         return 0;
257 }
258
259 static const struct file_operations omap_wdt_fops = {
260         .owner = THIS_MODULE,
261         .write = omap_wdt_write,
262         .unlocked_ioctl = omap_wdt_ioctl,
263         .open = omap_wdt_open,
264         .release = omap_wdt_release,
265 };
266
267
268 static int __init omap_wdt_probe(struct platform_device *pdev)
269 {
270         struct resource *res, *mem;
271         int ret;
272         struct omap_wdt_dev *wdev;
273
274         /* reserve static register mappings */
275         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
276         if (!res)
277                 return -ENOENT;
278
279         if (omap_wdt_dev)
280                 return -EBUSY;
281
282         mem = request_mem_region(res->start, res->end - res->start + 1,
283                                  pdev->name);
284         if (mem == NULL)
285                 return -EBUSY;
286
287         wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL);
288         if (!wdev) {
289                 ret = -ENOMEM;
290                 goto fail;
291         }
292         wdev->omap_wdt_users = 0;
293         wdev->mem = mem;
294
295         if (cpu_is_omap16xx()) {
296                 wdev->armwdt_ck = clk_get(&pdev->dev, "armwdt_ck");
297                 if (IS_ERR(wdev->armwdt_ck)) {
298                         ret = PTR_ERR(wdev->armwdt_ck);
299                         wdev->armwdt_ck = NULL;
300                         goto fail;
301                 }
302         }
303
304         if (cpu_is_omap24xx()) {
305                 wdev->mpu_wdt_ick = clk_get(&pdev->dev, "mpu_wdt_ick");
306                 if (IS_ERR(wdev->mpu_wdt_ick)) {
307                         ret = PTR_ERR(wdev->mpu_wdt_ick);
308                         wdev->mpu_wdt_ick = NULL;
309                         goto fail;
310                 }
311                 wdev->mpu_wdt_fck = clk_get(&pdev->dev, "mpu_wdt_fck");
312                 if (IS_ERR(wdev->mpu_wdt_fck)) {
313                         ret = PTR_ERR(wdev->mpu_wdt_fck);
314                         wdev->mpu_wdt_fck = NULL;
315                         goto fail;
316                 }
317         }
318
319         if (cpu_is_omap34xx()) {
320                 wdev->mpu_wdt_ick = clk_get(&pdev->dev, "wdt2_ick");
321                 if (IS_ERR(wdev->mpu_wdt_ick)) {
322                         ret = PTR_ERR(wdev->mpu_wdt_ick);
323                         wdev->mpu_wdt_ick = NULL;
324                         goto fail;
325                 }
326                 wdev->mpu_wdt_fck = clk_get(&pdev->dev, "wdt2_fck");
327                 if (IS_ERR(wdev->mpu_wdt_fck)) {
328                         ret = PTR_ERR(wdev->mpu_wdt_fck);
329                         wdev->mpu_wdt_fck = NULL;
330                         goto fail;
331                 }
332         }
333         wdev->base = ioremap(res->start, res->end - res->start + 1);
334         if (!wdev->base) {
335                 ret = -ENOMEM;
336                 goto fail;
337         }
338
339         platform_set_drvdata(pdev, wdev);
340
341         omap_wdt_disable(wdev);
342         omap_wdt_adjust_timeout(timer_margin);
343
344         wdev->omap_wdt_miscdev.parent = &pdev->dev;
345         wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR;
346         wdev->omap_wdt_miscdev.name = "watchdog";
347         wdev->omap_wdt_miscdev.fops = &omap_wdt_fops;
348
349         ret = misc_register(&(wdev->omap_wdt_miscdev));
350         if (ret)
351                 goto fail;
352
353         pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
354                 __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
355                 timer_margin);
356
357         /* autogate OCP interface clock */
358         __raw_writel(0x01, wdev->base + OMAP_WATCHDOG_SYS_CONFIG);
359
360         omap_wdt_dev = pdev;
361
362         return 0;
363
364 fail:
365         if (wdev) {
366                 platform_set_drvdata(pdev, NULL);
367                 if (wdev->armwdt_ck)
368                         clk_put(wdev->armwdt_ck);
369                 if (wdev->mpu_wdt_ick)
370                         clk_put(wdev->mpu_wdt_ick);
371                 if (wdev->mpu_wdt_fck)
372                         clk_put(wdev->mpu_wdt_fck);
373                 iounmap(wdev->base);
374                 kfree(wdev);
375         }
376         if (mem) {
377                 release_mem_region(res->start, res->end - res->start + 1);
378         }
379         return ret;
380 }
381
382 static void omap_wdt_shutdown(struct platform_device *pdev)
383 {
384         struct omap_wdt_dev *wdev;
385         wdev = platform_get_drvdata(pdev);
386
387         if (wdev->omap_wdt_users)
388                 omap_wdt_disable(wdev);
389 }
390
391 static int omap_wdt_remove(struct platform_device *pdev)
392 {
393         struct omap_wdt_dev *wdev;
394         wdev = platform_get_drvdata(pdev);
395         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
396
397         if (!res)
398                 return -ENOENT;
399
400         misc_deregister(&(wdev->omap_wdt_miscdev));
401         release_mem_region(res->start, res->end - res->start + 1);
402         platform_set_drvdata(pdev, NULL);
403         if (wdev->armwdt_ck) {
404                 clk_put(wdev->armwdt_ck);
405                 wdev->armwdt_ck = NULL;
406         }
407         if (wdev->mpu_wdt_ick) {
408                 clk_put(wdev->mpu_wdt_ick);
409                 wdev->mpu_wdt_ick = NULL;
410         }
411         if (wdev->mpu_wdt_fck) {
412                 clk_put(wdev->mpu_wdt_fck);
413                 wdev->mpu_wdt_fck = NULL;
414         }
415         iounmap(wdev->base);
416
417         kfree(wdev);
418         omap_wdt_dev = NULL;
419         return 0;
420 }
421
422 #ifdef  CONFIG_PM
423
424 /* REVISIT ... not clear this is the best way to handle system suspend; and
425  * it's very inappropriate for selective device suspend (e.g. suspending this
426  * through sysfs rather than by stopping the watchdog daemon).  Also, this
427  * may not play well enough with NOWAYOUT...
428  */
429
430 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
431 {
432         struct omap_wdt_dev *wdev;
433         wdev = platform_get_drvdata(pdev);
434         if (wdev->omap_wdt_users)
435                 omap_wdt_disable(wdev);
436         return 0;
437 }
438
439 static int omap_wdt_resume(struct platform_device *pdev)
440 {
441         struct omap_wdt_dev *wdev;
442         wdev = platform_get_drvdata(pdev);
443         if (wdev->omap_wdt_users) {
444                 omap_wdt_enable(wdev);
445                 omap_wdt_ping(wdev);
446         }
447         return 0;
448 }
449
450 #else
451 #define omap_wdt_suspend        NULL
452 #define omap_wdt_resume         NULL
453 #endif
454
455 static struct platform_driver omap_wdt_driver = {
456         .probe          = omap_wdt_probe,
457         .remove         = omap_wdt_remove,
458         .shutdown       = omap_wdt_shutdown,
459         .suspend        = omap_wdt_suspend,
460         .resume         = omap_wdt_resume,
461         .driver         = {
462                 .owner  = THIS_MODULE,
463                 .name   = "omap_wdt",
464         },
465 };
466
467 static int __init omap_wdt_init(void)
468 {
469         spin_lock_init(&wdt_lock);
470         return platform_driver_register(&omap_wdt_driver);
471 }
472
473 static void __exit omap_wdt_exit(void)
474 {
475         platform_driver_unregister(&omap_wdt_driver);
476 }
477
478 module_init(omap_wdt_init);
479 module_exit(omap_wdt_exit);
480
481 MODULE_AUTHOR("George G. Davis");
482 MODULE_LICENSE("GPL");
483 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
484 MODULE_ALIAS("platform:omap_wdt");