2 * Frame buffer driver for Trident Blade and Image series
4 * Copyright 2001, 2002 - Jani Monoses <jani@iv.ro>
7 * CREDITS:(in order of appearance)
8 * skeletonfb.c by Geert Uytterhoeven and other fb code in drivers/video
9 * Special thanks ;) to Mattia Crivellini <tia@mclink.it>
10 * much inspired by the XFree86 4.x Trident driver sources
11 * by Alan Hourihane the FreeVGA project
12 * Francesco Salvestrini <salvestrini@users.sf.net> XP support,
15 * timing value tweaking so it looks good on every monitor in every mode
19 #include <linux/module.h>
21 #include <linux/init.h>
22 #include <linux/pci.h>
24 #include <linux/delay.h>
25 #include <video/trident.h>
27 #define VERSION "0.7.8-NEWAPI"
29 struct tridentfb_par {
30 void __iomem *io_virt; /* iospace virtual memory address */
33 static unsigned char eng_oper; /* engine operation... */
34 static struct fb_ops tridentfb_ops;
36 /* FIXME:kmalloc these 3 instead */
37 static u32 pseudo_pal[16];
39 static struct fb_var_screeninfo default_var;
41 static struct fb_fix_screeninfo tridentfb_fix = {
43 .type = FB_TYPE_PACKED_PIXELS,
45 .visual = FB_VISUAL_PSEUDOCOLOR,
46 .accel = FB_ACCEL_NONE,
51 static int defaultaccel;
52 static int displaytype;
54 /* defaults which are normally overriden by user values */
57 static char *mode_option __devinitdata = "640x480";
72 module_param(mode_option, charp, 0);
73 MODULE_PARM_DESC(mode_option, "Initial video mode e.g. '648x480-8@60'");
74 module_param_named(mode, mode_option, charp, 0);
75 MODULE_PARM_DESC(mode, "Initial video mode e.g. '648x480-8@60' (deprecated)");
76 module_param(bpp, int, 0);
77 module_param(center, int, 0);
78 module_param(stretch, int, 0);
79 module_param(noaccel, int, 0);
80 module_param(memsize, int, 0);
81 module_param(memdiff, int, 0);
82 module_param(nativex, int, 0);
83 module_param(fp, int, 0);
84 module_param(crt, int, 0);
89 static int is3Dchip(int id)
91 return ((id == BLADE3D) || (id == CYBERBLADEE4) ||
92 (id == CYBERBLADEi7) || (id == CYBERBLADEi7D) ||
93 (id == CYBER9397) || (id == CYBER9397DVD) ||
94 (id == CYBER9520) || (id == CYBER9525DVD) ||
95 (id == IMAGE975) || (id == IMAGE985) ||
96 (id == CYBERBLADEi1) || (id == CYBERBLADEi1D) ||
97 (id == CYBERBLADEAi1) || (id == CYBERBLADEAi1D) ||
98 (id == CYBERBLADEXPm8) || (id == CYBERBLADEXPm16) ||
99 (id == CYBERBLADEXPAi1));
102 static int iscyber(int id)
118 case CYBERBLADEXPAi1:
126 case CYBERBLADEi7: /* VIA MPV4 integrated version */
129 /* case CYBERBLDAEXPm8: Strange */
130 /* case CYBERBLDAEXPm16: Strange */
135 #define CRT 0x3D0 /* CRTC registers offset for color display */
137 static inline void t_outb(struct tridentfb_par *p, u8 val, u16 reg)
139 fb_writeb(val, p->io_virt + reg);
142 static inline u8 t_inb(struct tridentfb_par *p, u16 reg)
144 return fb_readb(p->io_virt + reg);
147 static struct accel_switch {
148 void (*init_accel) (struct tridentfb_par *, int, int);
149 void (*wait_engine) (struct tridentfb_par *);
151 (struct tridentfb_par *par, u32, u32, u32, u32, u32, u32);
153 (struct tridentfb_par *par, u32, u32, u32, u32, u32, u32);
156 static inline void writemmr(struct tridentfb_par *par, u16 r, u32 v)
158 fb_writel(v, par->io_virt + r);
161 static inline u32 readmmr(struct tridentfb_par *par, u16 r)
163 return fb_readl(par->io_virt + r);
167 * Blade specific acceleration.
170 #define point(x, y) ((y) << 16 | (x))
182 static void blade_init_accel(struct tridentfb_par *par, int pitch, int bpp)
184 int v1 = (pitch >> 3) << 20;
201 v2 = v1 | (tmp << 29);
202 writemmr(par, 0x21C0, v2);
203 writemmr(par, 0x21C4, v2);
204 writemmr(par, 0x21B8, v2);
205 writemmr(par, 0x21BC, v2);
206 writemmr(par, 0x21D0, v1);
207 writemmr(par, 0x21D4, v1);
208 writemmr(par, 0x21C8, v1);
209 writemmr(par, 0x21CC, v1);
210 writemmr(par, 0x216C, 0);
213 static void blade_wait_engine(struct tridentfb_par *par)
215 while (readmmr(par, STA) & 0xFA800000) ;
218 static void blade_fill_rect(struct tridentfb_par *par,
219 u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
221 writemmr(par, CLR, c);
222 writemmr(par, ROP, rop ? 0x66 : ROP_S);
223 writemmr(par, CMD, 0x20000000 | 1 << 19 | 1 << 4 | 2 << 2);
225 writemmr(par, DR1, point(x, y));
226 writemmr(par, DR2, point(x + w - 1, y + h - 1));
229 static void blade_copy_rect(struct tridentfb_par *par,
230 u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
235 s2 = point(x1 + w - 1, y1 + h - 1);
237 d2 = point(x2 + w - 1, y2 + h - 1);
239 if ((y1 > y2) || ((y1 == y2) && (x1 > x2)))
242 writemmr(par, ROP, ROP_S);
243 writemmr(par, CMD, 0xE0000000 | 1 << 19 | 1 << 4 | 1 << 2 | direction);
245 writemmr(par, SR1, direction ? s2 : s1);
246 writemmr(par, SR2, direction ? s1 : s2);
247 writemmr(par, DR1, direction ? d2 : d1);
248 writemmr(par, DR2, direction ? d1 : d2);
251 static struct accel_switch accel_blade = {
259 * BladeXP specific acceleration functions
263 #define masked_point(x, y) ((y & 0xffff)<<16|(x & 0xffff))
265 static void xp_init_accel(struct tridentfb_par *par, int pitch, int bpp)
285 switch (pitch << (bpp >> 3)) {
301 t_outb(par, x, 0x2125);
321 writemmr(par, 0x2154, v1);
322 writemmr(par, 0x2150, v1);
323 t_outb(par, 3, 0x2126);
326 static void xp_wait_engine(struct tridentfb_par *par)
334 busy = t_inb(par, STA) & 0x80;
338 if (count == 10000000) {
344 t_outb(par, 0x00, 0x2120);
351 static void xp_fill_rect(struct tridentfb_par *par,
352 u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
354 writemmr(par, 0x2127, ROP_P);
355 writemmr(par, 0x2158, c);
356 writemmr(par, 0x2128, 0x4000);
357 writemmr(par, 0x2140, masked_point(h, w));
358 writemmr(par, 0x2138, masked_point(y, x));
359 t_outb(par, 0x01, 0x2124);
360 t_outb(par, eng_oper, 0x2125);
363 static void xp_copy_rect(struct tridentfb_par *par,
364 u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
367 u32 x1_tmp, x2_tmp, y1_tmp, y2_tmp;
371 if ((x1 < x2) && (y1 == y2)) {
389 writemmr(par, 0x2128, direction);
390 t_outb(par, ROP_S, 0x2127);
391 writemmr(par, 0x213C, masked_point(y1_tmp, x1_tmp));
392 writemmr(par, 0x2138, masked_point(y2_tmp, x2_tmp));
393 writemmr(par, 0x2140, masked_point(h, w));
394 t_outb(par, 0x01, 0x2124);
397 static struct accel_switch accel_xp = {
405 * Image specific acceleration functions
407 static void image_init_accel(struct tridentfb_par *par, int pitch, int bpp)
425 writemmr(par, 0x2120, 0xF0000000);
426 writemmr(par, 0x2120, 0x40000000 | tmp);
427 writemmr(par, 0x2120, 0x80000000);
428 writemmr(par, 0x2144, 0x00000000);
429 writemmr(par, 0x2148, 0x00000000);
430 writemmr(par, 0x2150, 0x00000000);
431 writemmr(par, 0x2154, 0x00000000);
432 writemmr(par, 0x2120, 0x60000000 | (pitch << 16) | pitch);
433 writemmr(par, 0x216C, 0x00000000);
434 writemmr(par, 0x2170, 0x00000000);
435 writemmr(par, 0x217C, 0x00000000);
436 writemmr(par, 0x2120, 0x10000000);
437 writemmr(par, 0x2130, (2047 << 16) | 2047);
440 static void image_wait_engine(struct tridentfb_par *par)
442 while (readmmr(par, 0x2164) & 0xF0000000) ;
445 static void image_fill_rect(struct tridentfb_par *par,
446 u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
448 writemmr(par, 0x2120, 0x80000000);
449 writemmr(par, 0x2120, 0x90000000 | ROP_S);
451 writemmr(par, 0x2144, c);
453 writemmr(par, DR1, point(x, y));
454 writemmr(par, DR2, point(x + w - 1, y + h - 1));
456 writemmr(par, 0x2124, 0x80000000 | 3 << 22 | 1 << 10 | 1 << 9);
459 static void image_copy_rect(struct tridentfb_par *par,
460 u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
465 s2 = point(x1 + w - 1, y1 + h - 1);
467 d2 = point(x2 + w - 1, y2 + h - 1);
469 if ((y1 > y2) || ((y1 == y2) && (x1 > x2)))
472 writemmr(par, 0x2120, 0x80000000);
473 writemmr(par, 0x2120, 0x90000000 | ROP_S);
475 writemmr(par, SR1, direction ? s2 : s1);
476 writemmr(par, SR2, direction ? s1 : s2);
477 writemmr(par, DR1, direction ? d2 : d1);
478 writemmr(par, DR2, direction ? d1 : d2);
479 writemmr(par, 0x2124,
480 0x80000000 | 1 << 22 | 1 << 10 | 1 << 7 | direction);
483 static struct accel_switch accel_image = {
491 * Accel functions called by the upper layers
493 #ifdef CONFIG_FB_TRIDENT_ACCEL
494 static void tridentfb_fillrect(struct fb_info *info,
495 const struct fb_fillrect *fr)
497 struct tridentfb_par *par = info->par;
498 int bpp = info->var.bits_per_pixel;
509 col = ((u32 *)(info->pseudo_palette))[fr->color];
512 col = ((u32 *)(info->pseudo_palette))[fr->color];
516 acc->fill_rect(par, fr->dx, fr->dy, fr->width,
517 fr->height, col, fr->rop);
518 acc->wait_engine(par);
520 static void tridentfb_copyarea(struct fb_info *info,
521 const struct fb_copyarea *ca)
523 struct tridentfb_par *par = info->par;
525 acc->copy_rect(par, ca->sx, ca->sy, ca->dx, ca->dy,
526 ca->width, ca->height);
527 acc->wait_engine(par);
529 #else /* !CONFIG_FB_TRIDENT_ACCEL */
530 #define tridentfb_fillrect cfb_fillrect
531 #define tridentfb_copyarea cfb_copyarea
532 #endif /* CONFIG_FB_TRIDENT_ACCEL */
536 * Hardware access functions
539 static inline unsigned char read3X4(struct tridentfb_par *par, int reg)
541 writeb(reg, par->io_virt + CRT + 4);
542 return readb(par->io_virt + CRT + 5);
545 static inline void write3X4(struct tridentfb_par *par, int reg,
548 writeb(reg, par->io_virt + CRT + 4);
549 writeb(val, par->io_virt + CRT + 5);
552 static inline unsigned char read3C4(struct tridentfb_par *par, int reg)
554 t_outb(par, reg, 0x3C4);
555 return t_inb(par, 0x3C5);
558 static inline void write3C4(struct tridentfb_par *par, int reg,
561 t_outb(par, reg, 0x3C4);
562 t_outb(par, val, 0x3C5);
565 static inline unsigned char read3CE(struct tridentfb_par *par, int reg)
567 t_outb(par, reg, 0x3CE);
568 return t_inb(par, 0x3CF);
571 static inline void writeAttr(struct tridentfb_par *par, int reg,
574 fb_readb(par->io_virt + CRT + 0x0A); /* flip-flop to index */
575 t_outb(par, reg, 0x3C0);
576 t_outb(par, val, 0x3C0);
579 static inline void write3CE(struct tridentfb_par *par, int reg,
582 t_outb(par, reg, 0x3CE);
583 t_outb(par, val, 0x3CF);
586 static void enable_mmio(void)
592 /* Unprotect registers */
593 outb(NewMode1, 0x3C4);
598 outb(inb(0x3D5) | 0x01, 0x3D5);
601 static void disable_mmio(struct tridentfb_par *par)
604 t_outb(par, 0x0B, 0x3C4);
607 /* Unprotect registers */
608 t_outb(par, NewMode1, 0x3C4);
609 t_outb(par, 0x80, 0x3C5);
612 t_outb(par, PCIReg, 0x3D4);
613 t_outb(par, t_inb(par, 0x3D5) & ~0x01, 0x3D5);
616 static void crtc_unlock(struct tridentfb_par *par)
618 write3X4(par, CRTVSyncEnd, read3X4(par, CRTVSyncEnd) & 0x7F);
621 /* Return flat panel's maximum x resolution */
622 static int __devinit get_nativex(struct tridentfb_par *par)
629 tmp = (read3CE(par, VertStretch) >> 4) & 3;
650 output("%dx%d flat panel found\n", x, y);
655 static void set_lwidth(struct tridentfb_par *par, int width)
657 write3X4(par, Offset, width & 0xFF);
658 write3X4(par, AddColReg,
659 (read3X4(par, AddColReg) & 0xCF) | ((width & 0x300) >> 4));
662 /* For resolutions smaller than FP resolution stretch */
663 static void screen_stretch(struct tridentfb_par *par)
665 if (chip_id != CYBERBLADEXPAi1)
666 write3CE(par, BiosReg, 0);
668 write3CE(par, BiosReg, 8);
669 write3CE(par, VertStretch, (read3CE(par, VertStretch) & 0x7C) | 1);
670 write3CE(par, HorStretch, (read3CE(par, HorStretch) & 0x7C) | 1);
673 /* For resolutions smaller than FP resolution center */
674 static void screen_center(struct tridentfb_par *par)
676 write3CE(par, VertStretch, (read3CE(par, VertStretch) & 0x7C) | 0x80);
677 write3CE(par, HorStretch, (read3CE(par, HorStretch) & 0x7C) | 0x80);
680 /* Address of first shown pixel in display memory */
681 static void set_screen_start(struct tridentfb_par *par, int base)
684 write3X4(par, StartAddrLow, base & 0xFF);
685 write3X4(par, StartAddrHigh, (base & 0xFF00) >> 8);
686 tmp = read3X4(par, CRTCModuleTest) & 0xDF;
687 write3X4(par, CRTCModuleTest, tmp | ((base & 0x10000) >> 11));
688 tmp = read3X4(par, CRTHiOrd) & 0xF8;
689 write3X4(par, CRTHiOrd, tmp | ((base & 0xE0000) >> 17));
692 /* Set dotclock frequency */
693 static void set_vclk(struct tridentfb_par *par, unsigned long freq)
696 unsigned long f, fi, d, di;
697 unsigned char lo = 0, hi = 0;
700 for (k = 2; k >= 0; k--)
701 for (m = 0; m < 63; m++)
702 for (n = 0; n < 128; n++) {
703 fi = ((14318l * (n + 8)) / (m + 2)) >> k;
704 if ((di = abs(fi - freq)) < d) {
714 write3C4(par, ClockHigh, hi);
715 write3C4(par, ClockLow, lo);
720 debug("VCLK = %X %X\n", hi, lo);
723 /* Set number of lines for flat panels*/
724 static void set_number_of_lines(struct tridentfb_par *par, int lines)
726 int tmp = read3CE(par, CyberEnhance) & 0x8F;
729 else if (lines > 768)
731 else if (lines > 600)
733 else if (lines > 480)
735 write3CE(par, CyberEnhance, tmp);
739 * If we see that FP is active we assume we have one.
740 * Otherwise we have a CRT display.User can override.
742 static unsigned int __devinit get_displaytype(struct tridentfb_par *par)
746 if (crt || !chipcyber)
748 return (read3CE(par, FPConfig) & 0x10) ? DISPLAY_FP : DISPLAY_CRT;
751 /* Try detecting the video memory size */
752 static unsigned int __devinit get_memsize(struct tridentfb_par *par)
754 unsigned char tmp, tmp2;
757 /* If memory size provided by user */
766 tmp = read3X4(par, SPR) & 0x0F;
782 k = 10 * Mb; /* XP */
788 k = 12 * Mb; /* XP */
791 k = 14 * Mb; /* XP */
794 k = 16 * Mb; /* XP */
798 tmp2 = read3C4(par, 0xC1);
828 output("framebuffer size = %d Kb\n", k / Kb);
832 /* See if we can handle the video mode described in var */
833 static int tridentfb_check_var(struct fb_var_screeninfo *var,
834 struct fb_info *info)
836 int bpp = var->bits_per_pixel;
839 /* check color depth */
841 bpp = var->bits_per_pixel = 32;
842 /* check whether resolution fits on panel and in memory */
843 if (flatpanel && nativex && var->xres > nativex)
845 if (var->xres * var->yres_virtual * bpp / 8 > info->fix.smem_len)
851 var->green.offset = 0;
852 var->blue.offset = 0;
854 var->green.length = 6;
855 var->blue.length = 6;
858 var->red.offset = 11;
859 var->green.offset = 5;
860 var->blue.offset = 0;
862 var->green.length = 6;
863 var->blue.length = 5;
866 var->red.offset = 16;
867 var->green.offset = 8;
868 var->blue.offset = 0;
870 var->green.length = 8;
871 var->blue.length = 8;
882 /* Pan the display */
883 static int tridentfb_pan_display(struct fb_var_screeninfo *var,
884 struct fb_info *info)
886 struct tridentfb_par *par = info->par;
890 offset = (var->xoffset + (var->yoffset * var->xres))
891 * var->bits_per_pixel / 32;
892 info->var.xoffset = var->xoffset;
893 info->var.yoffset = var->yoffset;
894 set_screen_start(par, offset);
899 static void shadowmode_on(struct tridentfb_par *par)
901 write3CE(par, CyberControl, read3CE(par, CyberControl) | 0x81);
904 static void shadowmode_off(struct tridentfb_par *par)
906 write3CE(par, CyberControl, read3CE(par, CyberControl) & 0x7E);
909 /* Set the hardware to the requested video mode */
910 static int tridentfb_set_par(struct fb_info *info)
912 struct tridentfb_par *par = (struct tridentfb_par *)(info->par);
913 u32 htotal, hdispend, hsyncstart, hsyncend, hblankstart, hblankend;
914 u32 vtotal, vdispend, vsyncstart, vsyncend, vblankstart, vblankend;
915 struct fb_var_screeninfo *var = &info->var;
916 int bpp = var->bits_per_pixel;
921 hdispend = var->xres / 8 - 1;
922 hsyncstart = (var->xres + var->right_margin) / 8;
923 hsyncend = var->hsync_len / 8;
925 (var->xres + var->left_margin + var->right_margin +
926 var->hsync_len) / 8 - 10;
927 hblankstart = hdispend + 1;
928 hblankend = htotal + 5;
930 vdispend = var->yres - 1;
931 vsyncstart = var->yres + var->lower_margin;
932 vsyncend = var->vsync_len;
933 vtotal = var->upper_margin + vsyncstart + vsyncend - 2;
934 vblankstart = var->yres;
935 vblankend = vtotal + 2;
938 write3CE(par, CyberControl, 8);
940 if (flatpanel && var->xres < nativex) {
942 * on flat panels with native size larger
943 * than requested resolution decide whether
944 * we stretch or center
946 t_outb(par, 0xEB, 0x3C2);
956 t_outb(par, 0x2B, 0x3C2);
957 write3CE(par, CyberControl, 8);
960 /* vertical timing values */
961 write3X4(par, CRTVTotal, vtotal & 0xFF);
962 write3X4(par, CRTVDispEnd, vdispend & 0xFF);
963 write3X4(par, CRTVSyncStart, vsyncstart & 0xFF);
964 write3X4(par, CRTVSyncEnd, (vsyncend & 0x0F));
965 write3X4(par, CRTVBlankStart, vblankstart & 0xFF);
966 write3X4(par, CRTVBlankEnd, 0 /* p->vblankend & 0xFF */);
968 /* horizontal timing values */
969 write3X4(par, CRTHTotal, htotal & 0xFF);
970 write3X4(par, CRTHDispEnd, hdispend & 0xFF);
971 write3X4(par, CRTHSyncStart, hsyncstart & 0xFF);
972 write3X4(par, CRTHSyncEnd,
973 (hsyncend & 0x1F) | ((hblankend & 0x20) << 2));
974 write3X4(par, CRTHBlankStart, hblankstart & 0xFF);
975 write3X4(par, CRTHBlankEnd, 0 /* (p->hblankend & 0x1F) */);
977 /* higher bits of vertical timing values */
979 if (vtotal & 0x100) tmp |= 0x01;
980 if (vdispend & 0x100) tmp |= 0x02;
981 if (vsyncstart & 0x100) tmp |= 0x04;
982 if (vblankstart & 0x100) tmp |= 0x08;
984 if (vtotal & 0x200) tmp |= 0x20;
985 if (vdispend & 0x200) tmp |= 0x40;
986 if (vsyncstart & 0x200) tmp |= 0x80;
987 write3X4(par, CRTOverflow, tmp);
989 tmp = read3X4(par, CRTHiOrd) | 0x08; /* line compare bit 10 */
990 if (vtotal & 0x400) tmp |= 0x80;
991 if (vblankstart & 0x400) tmp |= 0x40;
992 if (vsyncstart & 0x400) tmp |= 0x20;
993 if (vdispend & 0x400) tmp |= 0x10;
994 write3X4(par, CRTHiOrd, tmp);
997 if (htotal & 0x800) tmp |= 0x800 >> 11;
998 if (hblankstart & 0x800) tmp |= 0x800 >> 7;
999 write3X4(par, HorizOverflow, tmp);
1002 if (vblankstart & 0x200) tmp |= 0x20;
1003 //FIXME if (info->var.vmode & FB_VMODE_DOUBLE) tmp |= 0x80; /* double scan for 200 line modes */
1004 write3X4(par, CRTMaxScanLine, tmp);
1006 write3X4(par, CRTLineCompare, 0xFF);
1007 write3X4(par, CRTPRowScan, 0);
1008 write3X4(par, CRTModeControl, 0xC3);
1010 write3X4(par, LinearAddReg, 0x20); /* enable linear addressing */
1012 tmp = (info->var.vmode & FB_VMODE_INTERLACED) ? 0x84 : 0x80;
1013 /* enable access extended memory */
1014 write3X4(par, CRTCModuleTest, tmp);
1016 /* enable GE for text acceleration */
1017 write3X4(par, GraphEngReg, 0x80);
1019 #ifdef CONFIG_FB_TRIDENT_ACCEL
1020 acc->init_accel(par, info->var.xres, bpp);
1038 write3X4(par, PixelBusReg, tmp);
1043 write3X4(par, DRAMControl, tmp); /* both IO, linear enable */
1045 write3X4(par, InterfaceSel, read3X4(par, InterfaceSel) | 0x40);
1046 write3X4(par, Performance, 0x92);
1047 /* MMIO & PCI read and write burst enable */
1048 write3X4(par, PCIReg, 0x07);
1050 /* convert from picoseconds to kHz */
1051 vclk = PICOS2KHZ(info->var.pixclock);
1054 set_vclk(par, vclk);
1056 write3C4(par, 0, 3);
1057 write3C4(par, 1, 1); /* set char clock 8 dots wide */
1058 /* enable 4 maps because needed in chain4 mode */
1059 write3C4(par, 2, 0x0F);
1060 write3C4(par, 3, 0);
1061 write3C4(par, 4, 0x0E); /* memory mode enable bitmaps ?? */
1063 /* divide clock by 2 if 32bpp chain4 mode display and CPU path */
1064 write3CE(par, MiscExtFunc, (bpp == 32) ? 0x1A : 0x12);
1065 write3CE(par, 0x5, 0x40); /* no CGA compat, allow 256 col */
1066 write3CE(par, 0x6, 0x05); /* graphics mode */
1067 write3CE(par, 0x7, 0x0F); /* planes? */
1069 if (chip_id == CYBERBLADEXPAi1) {
1070 /* This fixes snow-effect in 32 bpp */
1071 write3X4(par, CRTHSyncStart, 0x84);
1074 /* graphics mode and support 256 color modes */
1075 writeAttr(par, 0x10, 0x41);
1076 writeAttr(par, 0x12, 0x0F); /* planes */
1077 writeAttr(par, 0x13, 0); /* horizontal pel panning */
1080 for (tmp = 0; tmp < 0x10; tmp++)
1081 writeAttr(par, tmp, tmp);
1082 fb_readb(par->io_virt + CRT + 0x0A); /* flip-flop to index */
1083 t_outb(par, 0x20, 0x3C0); /* enable attr */
1106 t_outb(par, tmp, 0x3C6);
1110 set_number_of_lines(par, info->var.yres);
1111 set_lwidth(par, info->var.xres * bpp / (4 * 16));
1112 info->fix.visual = (bpp == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
1113 info->fix.line_length = info->var.xres * (bpp >> 3);
1114 info->cmap.len = (bpp == 8) ? 256 : 16;
1119 /* Set one color register */
1120 static int tridentfb_setcolreg(unsigned regno, unsigned red, unsigned green,
1121 unsigned blue, unsigned transp,
1122 struct fb_info *info)
1124 int bpp = info->var.bits_per_pixel;
1125 struct tridentfb_par *par = info->par;
1127 if (regno >= info->cmap.len)
1131 t_outb(par, 0xFF, 0x3C6);
1132 t_outb(par, regno, 0x3C8);
1134 t_outb(par, red >> 10, 0x3C9);
1135 t_outb(par, green >> 10, 0x3C9);
1136 t_outb(par, blue >> 10, 0x3C9);
1138 } else if (regno < 16) {
1139 if (bpp == 16) { /* RGB 565 */
1142 col = (red & 0xF800) | ((green & 0xFC00) >> 5) |
1143 ((blue & 0xF800) >> 11);
1145 ((u32 *)(info->pseudo_palette))[regno] = col;
1146 } else if (bpp == 32) /* ARGB 8888 */
1147 ((u32*)info->pseudo_palette)[regno] =
1148 ((transp & 0xFF00) << 16) |
1149 ((red & 0xFF00) << 8) |
1150 ((green & 0xFF00)) |
1151 ((blue & 0xFF00) >> 8);
1154 /* debug("exit\n"); */
1158 /* Try blanking the screen.For flat panels it does nothing */
1159 static int tridentfb_blank(int blank_mode, struct fb_info *info)
1161 unsigned char PMCont, DPMSCont;
1162 struct tridentfb_par *par = info->par;
1167 t_outb(par, 0x04, 0x83C8); /* Read DPMS Control */
1168 PMCont = t_inb(par, 0x83C6) & 0xFC;
1169 DPMSCont = read3CE(par, PowerStatus) & 0xFC;
1170 switch (blank_mode) {
1171 case FB_BLANK_UNBLANK:
1172 /* Screen: On, HSync: On, VSync: On */
1173 case FB_BLANK_NORMAL:
1174 /* Screen: Off, HSync: On, VSync: On */
1178 case FB_BLANK_HSYNC_SUSPEND:
1179 /* Screen: Off, HSync: Off, VSync: On */
1183 case FB_BLANK_VSYNC_SUSPEND:
1184 /* Screen: Off, HSync: On, VSync: Off */
1188 case FB_BLANK_POWERDOWN:
1189 /* Screen: Off, HSync: Off, VSync: Off */
1195 write3CE(par, PowerStatus, DPMSCont);
1196 t_outb(par, 4, 0x83C8);
1197 t_outb(par, PMCont, 0x83C6);
1201 /* let fbcon do a softblank for us */
1202 return (blank_mode == FB_BLANK_NORMAL) ? 1 : 0;
1205 static struct fb_ops tridentfb_ops = {
1206 .owner = THIS_MODULE,
1207 .fb_setcolreg = tridentfb_setcolreg,
1208 .fb_pan_display = tridentfb_pan_display,
1209 .fb_blank = tridentfb_blank,
1210 .fb_check_var = tridentfb_check_var,
1211 .fb_set_par = tridentfb_set_par,
1212 .fb_fillrect = tridentfb_fillrect,
1213 .fb_copyarea = tridentfb_copyarea,
1214 .fb_imageblit = cfb_imageblit,
1217 static int __devinit trident_pci_probe(struct pci_dev *dev,
1218 const struct pci_device_id *id)
1221 unsigned char revision;
1222 struct fb_info *info;
1223 struct tridentfb_par *default_par;
1225 err = pci_enable_device(dev);
1229 info = framebuffer_alloc(sizeof(struct tridentfb_par), &dev->dev);
1232 default_par = info->par;
1234 chip_id = id->device;
1236 if (chip_id == CYBERBLADEi1)
1237 output("*** Please do use cyblafb, Cyberblade/i1 support "
1238 "will soon be removed from tridentfb!\n");
1241 /* If PCI id is 0x9660 then further detect chip type */
1243 if (chip_id == TGUI9660) {
1244 outb(RevisionID, 0x3C4);
1245 revision = inb(0x3C5);
1250 chip_id = CYBER9397;
1253 chip_id = CYBER9397DVD;
1262 chip_id = CYBER9385;
1265 chip_id = CYBER9382;
1268 chip_id = CYBER9388;
1275 chip3D = is3Dchip(chip_id);
1276 chipcyber = iscyber(chip_id);
1278 if (is_xp(chip_id)) {
1280 } else if (is_blade(chip_id)) {
1286 /* acceleration is on by default for 3D chips */
1287 defaultaccel = chip3D && !noaccel;
1289 /* setup MMIO region */
1290 tridentfb_fix.mmio_start = pci_resource_start(dev, 1);
1291 tridentfb_fix.mmio_len = chip3D ? 0x20000 : 0x10000;
1293 if (!request_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len, "tridentfb")) {
1294 debug("request_region failed!\n");
1298 default_par->io_virt = ioremap_nocache(tridentfb_fix.mmio_start,
1299 tridentfb_fix.mmio_len);
1301 if (!default_par->io_virt) {
1302 debug("ioremap failed\n");
1309 /* setup framebuffer memory */
1310 tridentfb_fix.smem_start = pci_resource_start(dev, 0);
1311 tridentfb_fix.smem_len = get_memsize(default_par);
1313 if (!request_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len, "tridentfb")) {
1314 debug("request_mem_region failed!\n");
1315 disable_mmio(info->par);
1320 info->screen_base = ioremap_nocache(tridentfb_fix.smem_start,
1321 tridentfb_fix.smem_len);
1323 if (!info->screen_base) {
1324 debug("ioremap failed\n");
1329 output("%s board found\n", pci_name(dev));
1330 displaytype = get_displaytype(default_par);
1333 nativex = get_nativex(default_par);
1335 info->fix = tridentfb_fix;
1336 info->fbops = &tridentfb_ops;
1339 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1340 #ifdef CONFIG_FB_TRIDENT_ACCEL
1341 info->flags |= FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT;
1343 info->pseudo_palette = pseudo_pal;
1345 if (!fb_find_mode(&default_var, info,
1346 mode_option, NULL, 0, NULL, bpp)) {
1350 err = fb_alloc_cmap(&info->cmap, 256, 0);
1354 if (defaultaccel && acc)
1355 default_var.accel_flags |= FB_ACCELF_TEXT;
1357 default_var.accel_flags &= ~FB_ACCELF_TEXT;
1358 default_var.activate |= FB_ACTIVATE_NOW;
1359 info->var = default_var;
1360 info->device = &dev->dev;
1361 if (register_framebuffer(info) < 0) {
1362 printk(KERN_ERR "tridentfb: could not register Trident framebuffer\n");
1363 fb_dealloc_cmap(&info->cmap);
1367 output("fb%d: %s frame buffer device %dx%d-%dbpp\n",
1368 info->node, info->fix.id, default_var.xres,
1369 default_var.yres, default_var.bits_per_pixel);
1371 pci_set_drvdata(dev, info);
1375 if (info->screen_base)
1376 iounmap(info->screen_base);
1377 release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len);
1378 disable_mmio(info->par);
1380 if (default_par->io_virt)
1381 iounmap(default_par->io_virt);
1382 release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len);
1383 framebuffer_release(info);
1387 static void __devexit trident_pci_remove(struct pci_dev *dev)
1389 struct fb_info *info = pci_get_drvdata(dev);
1390 struct tridentfb_par *par = info->par;
1392 unregister_framebuffer(info);
1393 iounmap(par->io_virt);
1394 iounmap(info->screen_base);
1395 release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len);
1396 release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len);
1397 pci_set_drvdata(dev, NULL);
1398 framebuffer_release(info);
1401 /* List of boards that we are trying to support */
1402 static struct pci_device_id trident_devices[] = {
1403 {PCI_VENDOR_ID_TRIDENT, BLADE3D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1404 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1405 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1406 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1407 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1408 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1409 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1410 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEE4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1411 {PCI_VENDOR_ID_TRIDENT, TGUI9660, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1412 {PCI_VENDOR_ID_TRIDENT, IMAGE975, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1413 {PCI_VENDOR_ID_TRIDENT, IMAGE985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1414 {PCI_VENDOR_ID_TRIDENT, CYBER9320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1415 {PCI_VENDOR_ID_TRIDENT, CYBER9388, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1416 {PCI_VENDOR_ID_TRIDENT, CYBER9520, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1417 {PCI_VENDOR_ID_TRIDENT, CYBER9525DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1418 {PCI_VENDOR_ID_TRIDENT, CYBER9397, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1419 {PCI_VENDOR_ID_TRIDENT, CYBER9397DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1420 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1421 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1422 {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm16, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1426 MODULE_DEVICE_TABLE(pci, trident_devices);
1428 static struct pci_driver tridentfb_pci_driver = {
1429 .name = "tridentfb",
1430 .id_table = trident_devices,
1431 .probe = trident_pci_probe,
1432 .remove = __devexit_p(trident_pci_remove)
1436 * Parse user specified options (`video=trident:')
1438 * video=trident:800x600,bpp=16,noaccel
1441 static int __init tridentfb_setup(char *options)
1444 if (!options || !*options)
1446 while ((opt = strsep(&options, ",")) != NULL) {
1449 if (!strncmp(opt, "noaccel", 7))
1451 else if (!strncmp(opt, "fp", 2))
1452 displaytype = DISPLAY_FP;
1453 else if (!strncmp(opt, "crt", 3))
1454 displaytype = DISPLAY_CRT;
1455 else if (!strncmp(opt, "bpp=", 4))
1456 bpp = simple_strtoul(opt + 4, NULL, 0);
1457 else if (!strncmp(opt, "center", 6))
1459 else if (!strncmp(opt, "stretch", 7))
1461 else if (!strncmp(opt, "memsize=", 8))
1462 memsize = simple_strtoul(opt + 8, NULL, 0);
1463 else if (!strncmp(opt, "memdiff=", 8))
1464 memdiff = simple_strtoul(opt + 8, NULL, 0);
1465 else if (!strncmp(opt, "nativex=", 8))
1466 nativex = simple_strtoul(opt + 8, NULL, 0);
1474 static int __init tridentfb_init(void)
1477 char *option = NULL;
1479 if (fb_get_options("tridentfb", &option))
1481 tridentfb_setup(option);
1483 output("Trident framebuffer %s initializing\n", VERSION);
1484 return pci_register_driver(&tridentfb_pci_driver);
1487 static void __exit tridentfb_exit(void)
1489 pci_unregister_driver(&tridentfb_pci_driver);
1492 module_init(tridentfb_init);
1493 module_exit(tridentfb_exit);
1495 MODULE_AUTHOR("Jani Monoses <jani@iv.ro>");
1496 MODULE_DESCRIPTION("Framebuffer driver for Trident cards");
1497 MODULE_LICENSE("GPL");