drivers/video/sm501fb.c

   1 /* linux/drivers/video/sm501fb.c
   2  *
   3  * Copyright (c) 2006 Simtec Electronics
   4  *      Vincent Sanders <vince@simtec.co.uk>
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * Framebuffer driver for the Silicon Motion SM501
  12  */
  13
  14 #include <linux/module.h>
  15 #include <linux/kernel.h>
  16 #include <linux/errno.h>
  17 #include <linux/string.h>
  18 #include <linux/mm.h>
  19 #include <linux/tty.h>
  20 #include <linux/slab.h>
  21 #include <linux/delay.h>
  22 #include <linux/fb.h>
  23 #include <linux/init.h>
  24 #include <linux/vmalloc.h>
  25 #include <linux/dma-mapping.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/workqueue.h>
  28 #include <linux/wait.h>
  29 #include <linux/platform_device.h>
  30 #include <linux/clk.h>
  31 #include <linux/console.h>
  32
  33 #include <asm/io.h>
  34 #include <asm/uaccess.h>
  35 #include <asm/div64.h>
  36
  37 #ifdef CONFIG_PM
  38 #include <linux/pm.h>
  39 #endif
  40
  41 #include <linux/sm501.h>
  42 #include <linux/sm501-regs.h>
  43
  44 #define NR_PALETTE      256
  45
  46 enum sm501_controller {
  47         HEAD_CRT        = 0,
  48         HEAD_PANEL      = 1,
  49 };
  50
  51 /* SM501 memory address */
  52 struct sm501_mem {
  53         unsigned long    size;
  54         unsigned long    sm_addr;
  55         void __iomem    *k_addr;
  56 };
  57
  58 /* private data that is shared between all frambuffers* */
  59 struct sm501fb_info {
  60         struct device           *dev;
  61         struct fb_info          *fb[2];         /* fb info for both heads */
  62         struct resource         *fbmem_res;     /* framebuffer resource */
  63         struct resource         *regs_res;      /* registers resource */
  64         struct sm501_platdata_fb *pdata;        /* our platform data */
  65
  66         unsigned long            pm_crt_ctrl;   /* pm: crt ctrl save */
  67
  68         int                      irq;
  69         int                      swap_endian;   /* set to swap rgb=>bgr */
  70         void __iomem            *regs;          /* remapped registers */
  71         void __iomem            *fbmem;         /* remapped framebuffer */
  72         size_t                   fbmem_len;     /* length of remapped region */
  73 };
  74
  75 /* per-framebuffer private data */
  76 struct sm501fb_par {
  77         u32                      pseudo_palette[16];
  78
  79         enum sm501_controller    head;
  80         struct sm501_mem         cursor;
  81         struct sm501_mem         screen;
  82         struct fb_ops            ops;
  83
  84         void                    *store_fb;
  85         void                    *store_cursor;
  86         void __iomem            *cursor_regs;
  87         struct sm501fb_info     *info;
  88 };
  89
  90 /* Helper functions */
  91
  92 static inline int h_total(struct fb_var_screeninfo *var)
  93 {
  94         return var->xres + var->left_margin +
  95                 var->right_margin + var->hsync_len;
  96 }
  97
  98 static inline int v_total(struct fb_var_screeninfo *var)
  99 {
 100         return var->yres + var->upper_margin +
 101                 var->lower_margin + var->vsync_len;
 102 }
 103
 104 /* sm501fb_sync_regs()
 105  *
 106  * This call is mainly for PCI bus systems where we need to
 107  * ensure that any writes to the bus are completed before the
 108  * next phase, or after completing a function.
 109 */
 110
 111 static inline void sm501fb_sync_regs(struct sm501fb_info *info)
 112 {
 113         readl(info->regs);
 114 }
 115
 116 /* sm501_alloc_mem
 117  *
 118  * This is an attempt to lay out memory for the two framebuffers and
 119  * everything else
 120  *
 121  * |fbmem_res->start                                           fbmem_res->end|
 122  * |                                                                         |
 123  * |fb[0].fix.smem_start    |         |fb[1].fix.smem_start    |     2K      |
 124  * |-> fb[0].fix.smem_len <-| spare   |-> fb[1].fix.smem_len <-|-> cursors <-|
 125  *
 126  * The "spare" space is for the 2d engine data
 127  * the fixed is space for the cursors (2x1Kbyte)
 128  *
 129  * we need to allocate memory for the 2D acceleration engine
 130  * command list and the data for the engine to deal with.
 131  *
 132  * - all allocations must be 128bit aligned
 133  * - cursors are 64x64x2 bits (1Kbyte)
 134  *
 135  */
 136
 137 #define SM501_MEMF_CURSOR               (1)
 138 #define SM501_MEMF_PANEL                (2)
 139 #define SM501_MEMF_CRT                  (4)
 140 #define SM501_MEMF_ACCEL                (8)
 141
 142 static int sm501_alloc_mem(struct sm501fb_info *inf, struct sm501_mem *mem,
 143                            unsigned int why, size_t size)
 144 {
 145         unsigned int ptr = 0;
 146
 147         switch (why) {
 148         case SM501_MEMF_CURSOR:
 149                 ptr = inf->fbmem_len - size;
 150                 inf->fbmem_len = ptr;
 151                 break;
 152
 153         case SM501_MEMF_PANEL:
 154                 ptr = inf->fbmem_len - size;
 155                 if (ptr < inf->fb[0]->fix.smem_len)
 156                         return -ENOMEM;
 157
 158                 break;
 159
 160         case SM501_MEMF_CRT:
 161                 ptr = 0;
 162                 break;
 163
 164         case SM501_MEMF_ACCEL:
 165                 ptr = inf->fb[0]->fix.smem_len;
 166
 167                 if ((ptr + size) >
 168                     (inf->fb[1]->fix.smem_start - inf->fbmem_res->start))
 169                         return -ENOMEM;
 170                 break;
 171
 172         default:
 173                 return -EINVAL;
 174         }
 175
 176         mem->size    = size;
 177         mem->sm_addr = ptr;
 178         mem->k_addr  = inf->fbmem + ptr;
 179
 180         dev_dbg(inf->dev, "%s: result %08lx, %p - %u, %zd\n",
 181                 __func__, mem->sm_addr, mem->k_addr, why, size);
 182
 183         return 0;
 184 }
 185
 186 /* sm501fb_ps_to_hz
 187  *
 188  * Converts a period in picoseconds to Hz.
 189  *
 190  * Note, we try to keep this in Hz to minimise rounding with
 191  * the limited PLL settings on the SM501.
 192 */
 193
 194 static unsigned long sm501fb_ps_to_hz(unsigned long psvalue)
 195 {
 196         unsigned long long numerator=1000000000000ULL;
 197
 198         /* 10^12 / picosecond period gives frequency in Hz */
 199         do_div(numerator, psvalue);
 200         return (unsigned long)numerator;
 201 }
 202
 203 /* sm501fb_hz_to_ps is identical to the oposite transform */
 204
 205 #define sm501fb_hz_to_ps(x) sm501fb_ps_to_hz(x)
 206
 207 /* sm501fb_setup_gamma
 208  *
 209  * Programs a linear 1.0 gamma ramp in case the gamma
 210  * correction is enabled without programming anything else.
 211 */
 212
 213 static void sm501fb_setup_gamma(struct sm501fb_info *fbi,
 214                                 unsigned long palette)
 215 {
 216         unsigned long value = 0;
 217         int offset;
 218
 219         /* set gamma values */
 220         for (offset = 0; offset < 256 * 4; offset += 4) {
 221                 writel(value, fbi->regs + palette + offset);
 222                 value += 0x010101;      /* Advance RGB by 1,1,1.*/
 223         }
 224 }
 225
 226 /* sm501fb_check_var
 227  *
 228  * check common variables for both panel and crt
 229 */
 230
 231 static int sm501fb_check_var(struct fb_var_screeninfo *var,
 232                              struct fb_info *info)
 233 {
 234         struct sm501fb_par  *par = info->par;
 235         struct sm501fb_info *sm  = par->info;
 236         unsigned long tmp;
 237
 238         /* check we can fit these values into the registers */
 239
 240         if (var->hsync_len > 255 || var->vsync_len > 255)
 241                 return -EINVAL;
 242
 243         if ((var->xres + var->right_margin) >= 4096)
 244                 return -EINVAL;
 245
 246         if ((var->yres + var->lower_margin) > 2048)
 247                 return -EINVAL;
 248
 249         /* hard limits of device */
 250
 251         if (h_total(var) > 4096 || v_total(var) > 2048)
 252                 return -EINVAL;
 253
 254         /* check our line length is going to be 128 bit aligned */
 255
 256         tmp = (var->xres * var->bits_per_pixel) / 8;
 257         if ((tmp & 15) != 0)
 258                 return -EINVAL;
 259
 260         /* check the virtual size */
 261
 262         if (var->xres_virtual > 4096 || var->yres_virtual > 2048)
 263                 return -EINVAL;
 264
 265         /* can cope with 8,16 or 32bpp */
 266
 267         if (var->bits_per_pixel <= 8)
 268                 var->bits_per_pixel = 8;
 269         else if (var->bits_per_pixel <= 16)
 270                 var->bits_per_pixel = 16;
 271         else if (var->bits_per_pixel == 24)
 272                 var->bits_per_pixel = 32;
 273
 274         /* set r/g/b positions and validate bpp */
 275         switch(var->bits_per_pixel) {
 276         case 8:
 277                 var->red.length         = var->bits_per_pixel;
 278                 var->red.offset         = 0;
 279                 var->green.length       = var->bits_per_pixel;
 280                 var->green.offset       = 0;
 281                 var->blue.length        = var->bits_per_pixel;
 282                 var->blue.offset        = 0;
 283                 var->transp.length      = 0;
 284
 285                 break;
 286
 287         case 16:
 288                 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
 289                         var->red.offset         = 11;
 290                         var->green.offset       = 5;
 291                         var->blue.offset        = 0;
 292                 } else {
 293                         var->blue.offset        = 11;
 294                         var->green.offset       = 5;
 295                         var->red.offset         = 0;
 296                 }
 297
 298                 var->red.length         = 5;
 299                 var->green.length       = 6;
 300                 var->blue.length        = 5;
 301                 var->transp.length      = 0;
 302                 break;
 303
 304         case 32:
 305                 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
 306                         var->transp.offset      = 0;
 307                         var->red.offset         = 8;
 308                         var->green.offset       = 16;
 309                         var->blue.offset        = 24;
 310                 } else {
 311                         var->transp.offset      = 24;
 312                         var->red.offset         = 16;
 313                         var->green.offset       = 8;
 314                         var->blue.offset        = 0;
 315                 }
 316
 317                 var->red.length         = 8;
 318                 var->green.length       = 8;
 319                 var->blue.length        = 8;
 320                 var->transp.length      = 0;
 321                 break;
 322
 323         default:
 324                 return -EINVAL;
 325         }
 326
 327         return 0;
 328 }
 329
 330 /*
 331  * sm501fb_check_var_crt():
 332  *
 333  * check the parameters for the CRT head, and either bring them
 334  * back into range, or return -EINVAL.
 335 */
 336
 337 static int sm501fb_check_var_crt(struct fb_var_screeninfo *var,
 338                                  struct fb_info *info)
 339 {
 340         return sm501fb_check_var(var, info);
 341 }
 342
 343 /* sm501fb_check_var_pnl():
 344  *
 345  * check the parameters for the CRT head, and either bring them
 346  * back into range, or return -EINVAL.
 347 */
 348
 349 static int sm501fb_check_var_pnl(struct fb_var_screeninfo *var,
 350                                  struct fb_info *info)
 351 {
 352         return sm501fb_check_var(var, info);
 353 }
 354
 355 /* sm501fb_set_par_common
 356  *
 357  * set common registers for framebuffers
 358 */
 359
 360 static int sm501fb_set_par_common(struct fb_info *info,
 361                                   struct fb_var_screeninfo *var)
 362 {
 363         struct sm501fb_par  *par = info->par;
 364         struct sm501fb_info *fbi = par->info;
 365         unsigned long pixclock;      /* pixelclock in Hz */
 366         unsigned long sm501pixclock; /* pixelclock the 501 can achive in Hz */
 367         unsigned int mem_type;
 368         unsigned int clock_type;
 369         unsigned int head_addr;
 370
 371         dev_dbg(fbi->dev, "%s: %dx%d, bpp = %d, virtual %dx%d\n",
 372                 __func__, var->xres, var->yres, var->bits_per_pixel,
 373                 var->xres_virtual, var->yres_virtual);
 374
 375         switch (par->head) {
 376         case HEAD_CRT:
 377                 mem_type = SM501_MEMF_CRT;
 378                 clock_type = SM501_CLOCK_V2XCLK;
 379                 head_addr = SM501_DC_CRT_FB_ADDR;
 380                 break;
 381
 382         case HEAD_PANEL:
 383                 mem_type = SM501_MEMF_PANEL;
 384                 clock_type = SM501_CLOCK_P2XCLK;
 385                 head_addr = SM501_DC_PANEL_FB_ADDR;
 386                 break;
 387
 388         default:
 389                 mem_type = 0;           /* stop compiler warnings */
 390                 head_addr = 0;
 391                 clock_type = 0;
 392         }
 393
 394         switch (var->bits_per_pixel) {
 395         case 8:
 396                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
 397                 break;
 398
 399         case 16:
 400                 info->fix.visual = FB_VISUAL_TRUECOLOR;
 401                 break;
 402
 403         case 32:
 404                 info->fix.visual = FB_VISUAL_TRUECOLOR;
 405                 break;
 406         }
 407
 408         /* allocate fb memory within 501 */
 409         info->fix.line_length = (var->xres_virtual * var->bits_per_pixel)/8;
 410         info->fix.smem_len    = info->fix.line_length * var->yres_virtual;
 411
 412         dev_dbg(fbi->dev, "%s: line length = %u\n", __func__,
 413                 info->fix.line_length);
 414
 415         if (sm501_alloc_mem(fbi, &par->screen, mem_type,
 416                             info->fix.smem_len)) {
 417                 dev_err(fbi->dev, "no memory available\n");
 418                 return -ENOMEM;
 419         }
 420
 421         info->fix.smem_start = fbi->fbmem_res->start + par->screen.sm_addr;
 422
 423         info->screen_base = fbi->fbmem + par->screen.sm_addr;
 424         info->screen_size = info->fix.smem_len;
 425
 426         /* set start of framebuffer to the screen */
 427
 428         writel(par->screen.sm_addr | SM501_ADDR_FLIP, fbi->regs + head_addr);
 429
 430         /* program CRT clock  */
 431
 432         pixclock = sm501fb_ps_to_hz(var->pixclock);
 433
 434         sm501pixclock = sm501_set_clock(fbi->dev->parent, clock_type,
 435                                         pixclock);
 436
 437         /* update fb layer with actual clock used */
 438         var->pixclock = sm501fb_hz_to_ps(sm501pixclock);
 439
 440         dev_dbg(fbi->dev, "%s: pixclock(ps) = %u, pixclock(Hz)  = %lu, "
 441                "sm501pixclock = %lu,  error = %ld%%\n",
 442                __func__, var->pixclock, pixclock, sm501pixclock,
 443                ((pixclock - sm501pixclock)*100)/pixclock);
 444
 445         return 0;
 446 }
 447
 448 /* sm501fb_set_par_geometry
 449  *
 450  * set the geometry registers for specified framebuffer.
 451 */
 452
 453 static void sm501fb_set_par_geometry(struct fb_info *info,
 454                                      struct fb_var_screeninfo *var)
 455 {
 456         struct sm501fb_par  *par = info->par;
 457         struct sm501fb_info *fbi = par->info;
 458         void __iomem *base = fbi->regs;
 459         unsigned long reg;
 460
 461         if (par->head == HEAD_CRT)
 462                 base += SM501_DC_CRT_H_TOT;
 463         else
 464                 base += SM501_DC_PANEL_H_TOT;
 465
 466         /* set framebuffer width and display width */
 467
 468         reg = info->fix.line_length;
 469         reg |= ((var->xres * var->bits_per_pixel)/8) << 16;
 470
 471         writel(reg, fbi->regs + (par->head == HEAD_CRT ?
 472                     SM501_DC_CRT_FB_OFFSET :  SM501_DC_PANEL_FB_OFFSET));
 473
 474         /* program horizontal total */
 475
 476         reg  = (h_total(var) - 1) << 16;
 477         reg |= (var->xres - 1);
 478
 479         writel(reg, base + SM501_OFF_DC_H_TOT);
 480
 481         /* program horizontal sync */
 482
 483         reg  = var->hsync_len << 16;
 484         reg |= var->xres + var->right_margin - 1;
 485
 486         writel(reg, base + SM501_OFF_DC_H_SYNC);
 487
 488         /* program vertical total */
 489
 490         reg  = (v_total(var) - 1) << 16;
 491         reg |= (var->yres - 1);
 492
 493         writel(reg, base + SM501_OFF_DC_V_TOT);
 494
 495         /* program vertical sync */
 496         reg  = var->vsync_len << 16;
 497         reg |= var->yres + var->lower_margin - 1;
 498
 499         writel(reg, base + SM501_OFF_DC_V_SYNC);
 500 }
 501
 502 /* sm501fb_pan_crt
 503  *
 504  * pan the CRT display output within an virtual framebuffer
 505 */
 506
 507 static int sm501fb_pan_crt(struct fb_var_screeninfo *var,
 508                            struct fb_info *info)
 509 {
 510         struct sm501fb_par  *par = info->par;
 511         struct sm501fb_info *fbi = par->info;
 512         unsigned int bytes_pixel = var->bits_per_pixel / 8;
 513         unsigned long reg;
 514         unsigned long xoffs;
 515
 516         xoffs = var->xoffset * bytes_pixel;
 517
 518         reg = readl(fbi->regs + SM501_DC_CRT_CONTROL);
 519
 520         reg &= ~SM501_DC_CRT_CONTROL_PIXEL_MASK;
 521         reg |= ((xoffs & 15) / bytes_pixel) << 4;
 522         writel(reg, fbi->regs + SM501_DC_CRT_CONTROL);
 523
 524         reg = (par->screen.sm_addr + xoffs +
 525                var->yoffset * info->fix.line_length);
 526         writel(reg | SM501_ADDR_FLIP, fbi->regs + SM501_DC_CRT_FB_ADDR);
 527
 528         sm501fb_sync_regs(fbi);
 529         return 0;
 530 }
 531
 532 /* sm501fb_pan_pnl
 533  *
 534  * pan the panel display output within an virtual framebuffer
 535 */
 536
 537 static int sm501fb_pan_pnl(struct fb_var_screeninfo *var,
 538                            struct fb_info *info)
 539 {
 540         struct sm501fb_par  *par = info->par;
 541         struct sm501fb_info *fbi = par->info;
 542         unsigned long reg;
 543
 544         reg = var->xoffset | (var->xres_virtual << 16);
 545         writel(reg, fbi->regs + SM501_DC_PANEL_FB_WIDTH);
 546
 547         reg = var->yoffset | (var->yres_virtual << 16);
 548         writel(reg, fbi->regs + SM501_DC_PANEL_FB_HEIGHT);
 549
 550         sm501fb_sync_regs(fbi);
 551         return 0;
 552 }
 553
 554 /* sm501fb_set_par_crt
 555  *
 556  * Set the CRT video mode from the fb_info structure
 557 */
 558
 559 static int sm501fb_set_par_crt(struct fb_info *info)
 560 {
 561         struct sm501fb_par  *par = info->par;
 562         struct sm501fb_info *fbi = par->info;
 563         struct fb_var_screeninfo *var = &info->var;
 564         unsigned long control;       /* control register */
 565         int ret;
 566
 567         /* activate new configuration */
 568
 569         dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
 570
 571         /* enable CRT DAC - note 0 is on!*/
 572         sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
 573
 574         control = readl(fbi->regs + SM501_DC_CRT_CONTROL);
 575
 576         control &= (SM501_DC_CRT_CONTROL_PIXEL_MASK |
 577                     SM501_DC_CRT_CONTROL_GAMMA |
 578                     SM501_DC_CRT_CONTROL_BLANK |
 579                     SM501_DC_CRT_CONTROL_SEL |
 580                     SM501_DC_CRT_CONTROL_CP |
 581                     SM501_DC_CRT_CONTROL_TVP);
 582
 583         /* set the sync polarities before we check data source  */
 584
 585         if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
 586                 control |= SM501_DC_CRT_CONTROL_HSP;
 587
 588         if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
 589                 control |= SM501_DC_CRT_CONTROL_VSP;
 590
 591         if ((control & SM501_DC_CRT_CONTROL_SEL) == 0) {
 592                 /* the head is displaying panel data... */
 593
 594                 sm501_alloc_mem(fbi, &par->screen, SM501_MEMF_CRT, 0);
 595                 goto out_update;
 596         }
 597
 598         ret = sm501fb_set_par_common(info, var);
 599         if (ret) {
 600                 dev_err(fbi->dev, "failed to set common parameters\n");
 601                 return ret;
 602         }
 603
 604         sm501fb_pan_crt(var, info);
 605         sm501fb_set_par_geometry(info, var);
 606
 607         control |= SM501_FIFO_3;        /* fill if >3 free slots */
 608
 609         switch(var->bits_per_pixel) {
 610         case 8:
 611                 control |= SM501_DC_CRT_CONTROL_8BPP;
 612                 break;
 613
 614         case 16:
 615                 control |= SM501_DC_CRT_CONTROL_16BPP;
 616                 sm501fb_setup_gamma(fbi, SM501_DC_CRT_PALETTE);
 617                 break;
 618
 619         case 32:
 620                 control |= SM501_DC_CRT_CONTROL_32BPP;
 621                 sm501fb_setup_gamma(fbi, SM501_DC_CRT_PALETTE);
 622                 break;
 623
 624         default:
 625                 BUG();
 626         }
 627
 628         control |= SM501_DC_CRT_CONTROL_SEL;    /* CRT displays CRT data */
 629         control |= SM501_DC_CRT_CONTROL_TE;     /* enable CRT timing */
 630         control |= SM501_DC_CRT_CONTROL_ENABLE; /* enable CRT plane */
 631
 632  out_update:
 633         dev_dbg(fbi->dev, "new control is %08lx\n", control);
 634
 635         writel(control, fbi->regs + SM501_DC_CRT_CONTROL);
 636         sm501fb_sync_regs(fbi);
 637
 638         return 0;
 639 }
 640
 641 static void sm501fb_panel_power(struct sm501fb_info *fbi, int to)
 642 {
 643         unsigned long control;
 644         void __iomem *ctrl_reg = fbi->regs + SM501_DC_PANEL_CONTROL;
 645         struct sm501_platdata_fbsub *pd = fbi->pdata->fb_pnl;
 646
 647         control = readl(ctrl_reg);
 648
 649         if (to && (control & SM501_DC_PANEL_CONTROL_VDD) == 0) {
 650                 /* enable panel power */
 651
 652                 control |= SM501_DC_PANEL_CONTROL_VDD;  /* FPVDDEN */
 653                 writel(control, ctrl_reg);
 654                 sm501fb_sync_regs(fbi);
 655                 mdelay(10);
 656
 657                 control |= SM501_DC_PANEL_CONTROL_DATA; /* DATA */
 658                 writel(control, ctrl_reg);
 659                 sm501fb_sync_regs(fbi);
 660                 mdelay(10);
 661
 662                 if (pd->flags & SM501FB_FLAG_PANEL_USE_VBIASEN) {
 663                         control |= SM501_DC_PANEL_CONTROL_BIAS; /* VBIASEN */
 664                         writel(control, ctrl_reg);
 665                         sm501fb_sync_regs(fbi);
 666                         mdelay(10);
 667                 }
 668
 669                 if (pd->flags & SM501FB_FLAG_PANEL_USE_FPEN) {
 670                         control |= SM501_DC_PANEL_CONTROL_FPEN;
 671                         writel(control, ctrl_reg);
 672                         sm501fb_sync_regs(fbi);
 673                         mdelay(10);
 674                 }
 675         } else if (!to && (control & SM501_DC_PANEL_CONTROL_VDD) != 0) {
 676                 /* disable panel power */
 677                 if (pd->flags & SM501FB_FLAG_PANEL_USE_FPEN) {
 678                         control &= ~SM501_DC_PANEL_CONTROL_FPEN;
 679                         writel(control, ctrl_reg);
 680                         sm501fb_sync_regs(fbi);
 681                         mdelay(10);
 682                 }
 683
 684                 if (pd->flags & SM501FB_FLAG_PANEL_USE_VBIASEN) {
 685                         control &= ~SM501_DC_PANEL_CONTROL_BIAS;
 686                         writel(control, ctrl_reg);
 687                         sm501fb_sync_regs(fbi);
 688                         mdelay(10);
 689                 }
 690
 691                 control &= ~SM501_DC_PANEL_CONTROL_DATA;
 692                 writel(control, ctrl_reg);
 693                 sm501fb_sync_regs(fbi);
 694                 mdelay(10);
 695
 696                 control &= ~SM501_DC_PANEL_CONTROL_VDD;
 697                 writel(control, ctrl_reg);
 698                 sm501fb_sync_regs(fbi);
 699                 mdelay(10);
 700         }
 701
 702         sm501fb_sync_regs(fbi);
 703 }
 704
 705 /* sm501fb_set_par_pnl
 706  *
 707  * Set the panel video mode from the fb_info structure
 708 */
 709
 710 static int sm501fb_set_par_pnl(struct fb_info *info)
 711 {
 712         struct sm501fb_par  *par = info->par;
 713         struct sm501fb_info *fbi = par->info;
 714         struct fb_var_screeninfo *var = &info->var;
 715         unsigned long control;
 716         unsigned long reg;
 717         int ret;
 718
 719         dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
 720
 721         /* activate this new configuration */
 722
 723         ret = sm501fb_set_par_common(info, var);
 724         if (ret)
 725                 return ret;
 726
 727         sm501fb_pan_pnl(var, info);
 728         sm501fb_set_par_geometry(info, var);
 729
 730         /* update control register */
 731
 732         control = readl(fbi->regs + SM501_DC_PANEL_CONTROL);
 733         control &= (SM501_DC_PANEL_CONTROL_GAMMA |
 734                     SM501_DC_PANEL_CONTROL_VDD  |
 735                     SM501_DC_PANEL_CONTROL_DATA |
 736                     SM501_DC_PANEL_CONTROL_BIAS |
 737                     SM501_DC_PANEL_CONTROL_FPEN |
 738                     SM501_DC_PANEL_CONTROL_CP |
 739                     SM501_DC_PANEL_CONTROL_CK |
 740                     SM501_DC_PANEL_CONTROL_HP |
 741                     SM501_DC_PANEL_CONTROL_VP |
 742                     SM501_DC_PANEL_CONTROL_HPD |
 743                     SM501_DC_PANEL_CONTROL_VPD);
 744
 745         control |= SM501_FIFO_3;        /* fill if >3 free slots */
 746
 747         switch(var->bits_per_pixel) {
 748         case 8:
 749                 control |= SM501_DC_PANEL_CONTROL_8BPP;
 750                 break;
 751
 752         case 16:
 753                 control |= SM501_DC_PANEL_CONTROL_16BPP;
 754                 sm501fb_setup_gamma(fbi, SM501_DC_PANEL_PALETTE);
 755                 break;
 756
 757         case 32:
 758                 control |= SM501_DC_PANEL_CONTROL_32BPP;
 759                 sm501fb_setup_gamma(fbi, SM501_DC_PANEL_PALETTE);
 760                 break;
 761
 762         default:
 763                 BUG();
 764         }
 765
 766         writel(0x0, fbi->regs + SM501_DC_PANEL_PANNING_CONTROL);
 767
 768         /* panel plane top left and bottom right location */
 769
 770         writel(0x00, fbi->regs + SM501_DC_PANEL_TL_LOC);
 771
 772         reg  = var->xres - 1;
 773         reg |= (var->yres - 1) << 16;
 774
 775         writel(reg, fbi->regs + SM501_DC_PANEL_BR_LOC);
 776
 777         /* program panel control register */
 778
 779         control |= SM501_DC_PANEL_CONTROL_TE;   /* enable PANEL timing */
 780         control |= SM501_DC_PANEL_CONTROL_EN;   /* enable PANEL gfx plane */
 781
 782         if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
 783                 control |= SM501_DC_PANEL_CONTROL_HSP;
 784
 785         if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
 786                 control |= SM501_DC_PANEL_CONTROL_VSP;
 787
 788         writel(control, fbi->regs + SM501_DC_PANEL_CONTROL);
 789         sm501fb_sync_regs(fbi);
 790
 791         /* ensure the panel interface is not tristated at this point */
 792
 793         sm501_modify_reg(fbi->dev->parent, SM501_SYSTEM_CONTROL,
 794                          0, SM501_SYSCTRL_PANEL_TRISTATE);
 795
 796         /* power the panel up */
 797         sm501fb_panel_power(fbi, 1);
 798         return 0;
 799 }
 800
 801
 802 /* chan_to_field
 803  *
 804  * convert a colour value into a field position
 805  *
 806  * from pxafb.c
 807 */
 808
 809 static inline unsigned int chan_to_field(unsigned int chan,
 810                                          struct fb_bitfield *bf)
 811 {
 812         chan &= 0xffff;
 813         chan >>= 16 - bf->length;
 814         return chan << bf->offset;
 815 }
 816
 817 /* sm501fb_setcolreg
 818  *
 819  * set the colour mapping for modes that support palettised data
 820 */
 821
 822 static int sm501fb_setcolreg(unsigned regno,
 823                              unsigned red, unsigned green, unsigned blue,
 824                              unsigned transp, struct fb_info *info)
 825 {
 826         struct sm501fb_par  *par = info->par;
 827         struct sm501fb_info *fbi = par->info;
 828         void __iomem *base = fbi->regs;
 829         unsigned int val;
 830
 831         if (par->head == HEAD_CRT)
 832                 base += SM501_DC_CRT_PALETTE;
 833         else
 834                 base += SM501_DC_PANEL_PALETTE;
 835
 836         switch (info->fix.visual) {
 837         case FB_VISUAL_TRUECOLOR:
 838                 /* true-colour, use pseuo-palette */
 839
 840                 if (regno < 16) {
 841                         u32 *pal = par->pseudo_palette;
 842
 843                         val  = chan_to_field(red,   &info->var.red);
 844                         val |= chan_to_field(green, &info->var.green);
 845                         val |= chan_to_field(blue,  &info->var.blue);
 846
 847                         pal[regno] = val;
 848                 }
 849                 break;
 850
 851         case FB_VISUAL_PSEUDOCOLOR:
 852                 if (regno < 256) {
 853                         val = (red >> 8) << 16;
 854                         val |= (green >> 8) << 8;
 855                         val |= blue >> 8;
 856
 857                         writel(val, base + (regno * 4));
 858                 }
 859
 860                 break;
 861
 862         default:
 863                 return 1;   /* unknown type */
 864         }
 865
 866         return 0;
 867 }
 868
 869 /* sm501fb_blank_pnl
 870  *
 871  * Blank or un-blank the panel interface
 872 */
 873
 874 static int sm501fb_blank_pnl(int blank_mode, struct fb_info *info)
 875 {
 876         struct sm501fb_par  *par = info->par;
 877         struct sm501fb_info *fbi = par->info;
 878
 879         dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
 880
 881         switch (blank_mode) {
 882         case FB_BLANK_POWERDOWN:
 883                 sm501fb_panel_power(fbi, 0);
 884                 break;
 885
 886         case FB_BLANK_UNBLANK:
 887                 sm501fb_panel_power(fbi, 1);
 888                 break;
 889
 890         case FB_BLANK_NORMAL:
 891         case FB_BLANK_VSYNC_SUSPEND:
 892         case FB_BLANK_HSYNC_SUSPEND:
 893         default:
 894                 return 1;
 895         }
 896
 897         return 0;
 898 }
 899
 900 /* sm501fb_blank_crt
 901  *
 902  * Blank or un-blank the crt interface
 903 */
 904
 905 static int sm501fb_blank_crt(int blank_mode, struct fb_info *info)
 906 {
 907         struct sm501fb_par  *par = info->par;
 908         struct sm501fb_info *fbi = par->info;
 909         unsigned long ctrl;
 910
 911         dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
 912
 913         ctrl = readl(fbi->regs + SM501_DC_CRT_CONTROL);
 914
 915         switch (blank_mode) {
 916         case FB_BLANK_POWERDOWN:
 917                 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
 918                 sm501_misc_control(fbi->dev->parent, SM501_MISC_DAC_POWER, 0);
 919
 920         case FB_BLANK_NORMAL:
 921                 ctrl |= SM501_DC_CRT_CONTROL_BLANK;
 922                 break;
 923
 924         case FB_BLANK_UNBLANK:
 925                 ctrl &= ~SM501_DC_CRT_CONTROL_BLANK;
 926                 ctrl |=  SM501_DC_CRT_CONTROL_ENABLE;
 927                 sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
 928                 break;
 929
 930         case FB_BLANK_VSYNC_SUSPEND:
 931         case FB_BLANK_HSYNC_SUSPEND:
 932         default:
 933                 return 1;
 934
 935         }
 936
 937         writel(ctrl, fbi->regs + SM501_DC_CRT_CONTROL);
 938         sm501fb_sync_regs(fbi);
 939
 940         return 0;
 941 }
 942
 943 /* sm501fb_cursor
 944  *
 945  * set or change the hardware cursor parameters
 946 */
 947
 948 static int sm501fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
 949 {
 950         struct sm501fb_par  *par = info->par;
 951         struct sm501fb_info *fbi = par->info;
 952         void __iomem *base = fbi->regs;
 953         unsigned long hwc_addr;
 954         unsigned long fg, bg;
 955
 956         dev_dbg(fbi->dev, "%s(%p,%p)\n", __func__, info, cursor);
 957
 958         if (par->head == HEAD_CRT)
 959                 base += SM501_DC_CRT_HWC_BASE;
 960         else
 961                 base += SM501_DC_PANEL_HWC_BASE;
 962
 963         /* check not being asked to exceed capabilities */
 964
 965         if (cursor->image.width > 64)
 966                 return -EINVAL;
 967
 968         if (cursor->image.height > 64)
 969                 return -EINVAL;
 970
 971         if (cursor->image.depth > 1)
 972                 return -EINVAL;
 973
 974         hwc_addr = readl(base + SM501_OFF_HWC_ADDR);
 975
 976         if (cursor->enable)
 977                 writel(hwc_addr | SM501_HWC_EN, base + SM501_OFF_HWC_ADDR);
 978         else
 979                 writel(hwc_addr & ~SM501_HWC_EN, base + SM501_OFF_HWC_ADDR);
 980
 981         /* set data */
 982         if (cursor->set & FB_CUR_SETPOS) {
 983                 unsigned int x = cursor->image.dx;
 984                 unsigned int y = cursor->image.dy;
 985
 986                 if (x >= 2048 || y >= 2048 )
 987                         return -EINVAL;
 988
 989                 dev_dbg(fbi->dev, "set position %d,%d\n", x, y);
 990
 991                 //y += cursor->image.height;
 992
 993                 writel(x | (y << 16), base + SM501_OFF_HWC_LOC);
 994         }
 995
 996         if (cursor->set & FB_CUR_SETCMAP) {
 997                 unsigned int bg_col = cursor->image.bg_color;
 998                 unsigned int fg_col = cursor->image.fg_color;
 999
1000                 dev_dbg(fbi->dev, "%s: update cmap (%08x,%08x)\n",
1001                         __func__, bg_col, fg_col);
1002
1003                 bg = ((info->cmap.red[bg_col] & 0xF8) << 8) |
1004                         ((info->cmap.green[bg_col] & 0xFC) << 3) |
1005                         ((info->cmap.blue[bg_col] & 0xF8) >> 3);
1006
1007                 fg = ((info->cmap.red[fg_col] & 0xF8) << 8) |
1008                         ((info->cmap.green[fg_col] & 0xFC) << 3) |
1009                         ((info->cmap.blue[fg_col] & 0xF8) >> 3);
1010
1011                 dev_dbg(fbi->dev, "fgcol %08lx, bgcol %08lx\n", fg, bg);
1012
1013                 writel(bg, base + SM501_OFF_HWC_COLOR_1_2);
1014                 writel(fg, base + SM501_OFF_HWC_COLOR_3);
1015         }
1016
1017         if (cursor->set & FB_CUR_SETSIZE ||
1018             cursor->set & (FB_CUR_SETIMAGE | FB_CUR_SETSHAPE)) {
1019                 /* SM501 cursor is a two bpp 64x64 bitmap this routine
1020                  * clears it to transparent then combines the cursor
1021                  * shape plane with the colour plane to set the
1022                  * cursor */
1023                 int x, y;
1024                 const unsigned char *pcol = cursor->image.data;
1025                 const unsigned char *pmsk = cursor->mask;
1026                 void __iomem   *dst = par->cursor.k_addr;
1027                 unsigned char  dcol = 0;
1028                 unsigned char  dmsk = 0;
1029                 unsigned int   op;
1030
1031                 dev_dbg(fbi->dev, "%s: setting shape (%d,%d)\n",
1032                         __func__, cursor->image.width, cursor->image.height);
1033
1034                 for (op = 0; op < (64*64*2)/8; op+=4)
1035                         writel(0x0, dst + op);
1036
1037                 for (y = 0; y < cursor->image.height; y++) {
1038                         for (x = 0; x < cursor->image.width; x++) {
1039                                 if ((x % 8) == 0) {
1040                                         dcol = *pcol++;
1041                                         dmsk = *pmsk++;
1042                                 } else {
1043                                         dcol >>= 1;
1044                                         dmsk >>= 1;
1045                                 }
1046
1047                                 if (dmsk & 1) {
1048                                         op = (dcol & 1) ? 1 : 3;
1049                                         op <<= ((x % 4) * 2);
1050
1051                                         op |= readb(dst + (x / 4));
1052                                         writeb(op, dst + (x / 4));
1053                                 }
1054                         }
1055                         dst += (64*2)/8;
1056                 }
1057         }
1058
1059         sm501fb_sync_regs(fbi); /* ensure cursor data flushed */
1060         return 0;
1061 }
1062
1063 /* sm501fb_crtsrc_show
1064  *
1065  * device attribute code to show where the crt output is sourced from
1066 */
1067
1068 static ssize_t sm501fb_crtsrc_show(struct device *dev,
1069                                struct device_attribute *attr, char *buf)
1070 {
1071         struct sm501fb_info *info = dev_get_drvdata(dev);
1072         unsigned long ctrl;
1073
1074         ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1075         ctrl &= SM501_DC_CRT_CONTROL_SEL;
1076
1077         return snprintf(buf, PAGE_SIZE, "%s\n", ctrl ? "crt" : "panel");
1078 }
1079
1080 /* sm501fb_crtsrc_show
1081  *
1082  * device attribute code to set where the crt output is sourced from
1083 */
1084
1085 static ssize_t sm501fb_crtsrc_store(struct device *dev,
1086                                 struct device_attribute *attr,
1087                                 const char *buf, size_t len)
1088 {
1089         struct sm501fb_info *info = dev_get_drvdata(dev);
1090         enum sm501_controller head;
1091         unsigned long ctrl;
1092
1093         if (len < 1)
1094                 return -EINVAL;
1095
1096         if (strnicmp(buf, "crt", 3) == 0)
1097                 head = HEAD_CRT;
1098         else if (strnicmp(buf, "panel", 5) == 0)
1099                 head = HEAD_PANEL;
1100         else
1101                 return -EINVAL;
1102
1103         dev_info(dev, "setting crt source to head %d\n", head);
1104
1105         ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1106
1107         if (head == HEAD_CRT) {
1108                 ctrl |= SM501_DC_CRT_CONTROL_SEL;
1109                 ctrl |= SM501_DC_CRT_CONTROL_ENABLE;
1110                 ctrl |= SM501_DC_CRT_CONTROL_TE;
1111         } else {
1112                 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1113                 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
1114                 ctrl &= ~SM501_DC_CRT_CONTROL_TE;
1115         }
1116
1117         writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1118         sm501fb_sync_regs(info);
1119
1120         return len;
1121 }
1122
1123 /* Prepare the device_attr for registration with sysfs later */
1124 static DEVICE_ATTR(crt_src, 0666, sm501fb_crtsrc_show, sm501fb_crtsrc_store);
1125
1126 /* sm501fb_show_regs
1127  *
1128  * show the primary sm501 registers
1129 */
1130 static int sm501fb_show_regs(struct sm501fb_info *info, char *ptr,
1131                              unsigned int start, unsigned int len)
1132 {
1133         void __iomem *mem = info->regs;
1134         char *buf = ptr;
1135         unsigned int reg;
1136
1137         for (reg = start; reg < (len + start); reg += 4)
1138                 ptr += sprintf(ptr, "%08x = %08x\n", reg, readl(mem + reg));
1139
1140         return ptr - buf;
1141 }
1142
1143 /* sm501fb_debug_show_crt
1144  *
1145  * show the crt control and cursor registers
1146 */
1147
1148 static ssize_t sm501fb_debug_show_crt(struct device *dev,
1149                                   struct device_attribute *attr, char *buf)
1150 {
1151         struct sm501fb_info *info = dev_get_drvdata(dev);
1152         char *ptr = buf;
1153
1154         ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_CONTROL, 0x40);
1155         ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_HWC_BASE, 0x10);
1156
1157         return ptr - buf;
1158 }
1159
1160 static DEVICE_ATTR(fbregs_crt, 0444, sm501fb_debug_show_crt, NULL);
1161
1162 /* sm501fb_debug_show_pnl
1163  *
1164  * show the panel control and cursor registers
1165 */
1166
1167 static ssize_t sm501fb_debug_show_pnl(struct device *dev,
1168                                   struct device_attribute *attr, char *buf)
1169 {
1170         struct sm501fb_info *info = dev_get_drvdata(dev);
1171         char *ptr = buf;
1172
1173         ptr += sm501fb_show_regs(info, ptr, 0x0, 0x40);
1174         ptr += sm501fb_show_regs(info, ptr, SM501_DC_PANEL_HWC_BASE, 0x10);
1175
1176         return ptr - buf;
1177 }
1178
1179 static DEVICE_ATTR(fbregs_pnl, 0444, sm501fb_debug_show_pnl, NULL);
1180
1181 /* framebuffer ops */
1182
1183 static struct fb_ops sm501fb_ops_crt = {
1184         .owner          = THIS_MODULE,
1185         .fb_check_var   = sm501fb_check_var_crt,
1186         .fb_set_par     = sm501fb_set_par_crt,
1187         .fb_blank       = sm501fb_blank_crt,
1188         .fb_setcolreg   = sm501fb_setcolreg,
1189         .fb_pan_display = sm501fb_pan_crt,
1190         .fb_cursor      = sm501fb_cursor,
1191         .fb_fillrect    = cfb_fillrect,
1192         .fb_copyarea    = cfb_copyarea,
1193         .fb_imageblit   = cfb_imageblit,
1194 };
1195
1196 static struct fb_ops sm501fb_ops_pnl = {
1197         .owner          = THIS_MODULE,
1198         .fb_check_var   = sm501fb_check_var_pnl,
1199         .fb_set_par     = sm501fb_set_par_pnl,
1200         .fb_pan_display = sm501fb_pan_pnl,
1201         .fb_blank       = sm501fb_blank_pnl,
1202         .fb_setcolreg   = sm501fb_setcolreg,
1203         .fb_cursor      = sm501fb_cursor,
1204         .fb_fillrect    = cfb_fillrect,
1205         .fb_copyarea    = cfb_copyarea,
1206         .fb_imageblit   = cfb_imageblit,
1207 };
1208
1209 /* sm501fb_info_alloc
1210  *
1211  * creates and initialises an sm501fb_info structure
1212 */
1213
1214 static struct sm501fb_info *sm501fb_info_alloc(struct fb_info *fbinfo_crt,
1215                                                struct fb_info *fbinfo_pnl)
1216 {
1217         struct sm501fb_info *info;
1218         struct sm501fb_par  *par;
1219
1220         info = kzalloc(sizeof(struct sm501fb_info), GFP_KERNEL);
1221         if (info) {
1222                 /* set the references back */
1223
1224                 par = fbinfo_crt->par;
1225                 par->info = info;
1226                 par->head = HEAD_CRT;
1227                 fbinfo_crt->pseudo_palette = &par->pseudo_palette;
1228
1229                 par = fbinfo_pnl->par;
1230                 par->info = info;
1231                 par->head = HEAD_PANEL;
1232                 fbinfo_pnl->pseudo_palette = &par->pseudo_palette;
1233
1234                 /* store the two fbs into our info */
1235                 info->fb[HEAD_CRT] = fbinfo_crt;
1236                 info->fb[HEAD_PANEL] = fbinfo_pnl;
1237         }
1238
1239         return info;
1240 }
1241
1242 /* sm501_init_cursor
1243  *
1244  * initialise hw cursor parameters
1245 */
1246
1247 static int sm501_init_cursor(struct fb_info *fbi, unsigned int reg_base)
1248 {
1249         struct sm501fb_par *par = fbi->par;
1250         struct sm501fb_info *info = par->info;
1251         int ret;
1252
1253         par->cursor_regs = info->regs + reg_base;
1254
1255         ret = sm501_alloc_mem(info, &par->cursor, SM501_MEMF_CURSOR, 1024);
1256         if (ret < 0)
1257                 return ret;
1258
1259         /* initialise the colour registers */
1260
1261         writel(par->cursor.sm_addr, par->cursor_regs + SM501_OFF_HWC_ADDR);
1262
1263         writel(0x00, par->cursor_regs + SM501_OFF_HWC_LOC);
1264         writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_1_2);
1265         writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_3);
1266         sm501fb_sync_regs(info);
1267
1268         return 0;
1269 }
1270
1271 /* sm501fb_info_start
1272  *
1273  * fills the par structure claiming resources and remapping etc.
1274 */
1275
1276 static int sm501fb_start(struct sm501fb_info *info,
1277                          struct platform_device *pdev)
1278 {
1279         struct resource *res;
1280         struct device *dev;
1281         int k;
1282         int ret;
1283
1284         info->dev = dev = &pdev->dev;
1285         platform_set_drvdata(pdev, info);
1286
1287         info->irq = ret = platform_get_irq(pdev, 0);
1288         if (ret < 0) {
1289                 /* we currently do not use the IRQ */
1290                 dev_warn(dev, "no irq for device\n");
1291         }
1292
1293         /* allocate, reserve and remap resources for registers */
1294         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1295         if (res == NULL) {
1296                 dev_err(dev, "no resource definition for registers\n");
1297                 ret = -ENOENT;
1298                 goto err_release;
1299         }
1300
1301         info->regs_res = request_mem_region(res->start,
1302                                             res->end - res->start,
1303                                             pdev->name);
1304
1305         if (info->regs_res == NULL) {
1306                 dev_err(dev, "cannot claim registers\n");
1307                 ret = -ENXIO;
1308                 goto err_release;
1309         }
1310
1311         info->regs = ioremap(res->start, (res->end - res->start)+1);
1312         if (info->regs == NULL) {
1313                 dev_err(dev, "cannot remap registers\n");
1314                 ret = -ENXIO;
1315                 goto err_regs_res;
1316         }
1317
1318         /* allocate, reserve resources for framebuffer */
1319         res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
1320         if (res == NULL) {
1321                 dev_err(dev, "no memory resource defined\n");
1322                 ret = -ENXIO;
1323                 goto err_regs_map;
1324         }
1325
1326         info->fbmem_res = request_mem_region(res->start,
1327                                              (res->end - res->start)+1,
1328                                              pdev->name);
1329         if (info->fbmem_res == NULL) {
1330                 dev_err(dev, "cannot claim framebuffer\n");
1331                 ret = -ENXIO;
1332                 goto err_regs_map;
1333         }
1334
1335         info->fbmem = ioremap(res->start, (res->end - res->start)+1);
1336         if (info->fbmem == NULL) {
1337                 dev_err(dev, "cannot remap framebuffer\n");
1338                 goto err_mem_res;
1339         }
1340
1341         info->fbmem_len = (res->end - res->start)+1;
1342
1343         /* clear framebuffer memory - avoids garbage data on unused fb */
1344         memset(info->fbmem, 0, info->fbmem_len);
1345
1346         /* clear palette ram - undefined at power on */
1347         for (k = 0; k < (256 * 3); k++)
1348                 writel(0, info->regs + SM501_DC_PANEL_PALETTE + (k * 4));
1349
1350         /* enable display controller */
1351         sm501_unit_power(dev->parent, SM501_GATE_DISPLAY, 1);
1352
1353         /* setup cursors */
1354
1355         sm501_init_cursor(info->fb[HEAD_CRT], SM501_DC_CRT_HWC_ADDR);
1356         sm501_init_cursor(info->fb[HEAD_PANEL], SM501_DC_PANEL_HWC_ADDR);
1357
1358         return 0; /* everything is setup */
1359
1360  err_mem_res:
1361         release_resource(info->fbmem_res);
1362         kfree(info->fbmem_res);
1363
1364  err_regs_map:
1365         iounmap(info->regs);
1366
1367  err_regs_res:
1368         release_resource(info->regs_res);
1369         kfree(info->regs_res);
1370
1371  err_release:
1372         return ret;
1373 }
1374
1375 static void sm501fb_stop(struct sm501fb_info *info)
1376 {
1377         /* disable display controller */
1378         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
1379
1380         iounmap(info->fbmem);
1381         release_resource(info->fbmem_res);
1382         kfree(info->fbmem_res);
1383
1384         iounmap(info->regs);
1385         release_resource(info->regs_res);
1386         kfree(info->regs_res);
1387 }
1388
1389 static void sm501fb_info_release(struct sm501fb_info *info)
1390 {
1391         kfree(info);
1392 }
1393
1394 static int sm501fb_init_fb(struct fb_info *fb,
1395                            enum sm501_controller head,
1396                            const char *fbname)
1397 {
1398         struct sm501_platdata_fbsub *pd;
1399         struct sm501fb_par *par = fb->par;
1400         struct sm501fb_info *info = par->info;
1401         unsigned long ctrl;
1402         unsigned int enable;
1403         int ret;
1404
1405         switch (head) {
1406         case HEAD_CRT:
1407                 pd = info->pdata->fb_crt;
1408                 ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1409                 enable = (ctrl & SM501_DC_CRT_CONTROL_ENABLE) ? 1 : 0;
1410
1411                 /* ensure we set the correct source register */
1412                 if (info->pdata->fb_route != SM501_FB_CRT_PANEL) {
1413                         ctrl |= SM501_DC_CRT_CONTROL_SEL;
1414                         writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1415                 }
1416
1417                 break;
1418
1419         case HEAD_PANEL:
1420                 pd = info->pdata->fb_pnl;
1421                 ctrl = readl(info->regs + SM501_DC_PANEL_CONTROL);
1422                 enable = (ctrl & SM501_DC_PANEL_CONTROL_EN) ? 1 : 0;
1423                 break;
1424
1425         default:
1426                 pd = NULL;              /* stop compiler warnings */
1427                 ctrl = 0;
1428                 enable = 0;
1429                 BUG();
1430         }
1431
1432         dev_info(info->dev, "fb %s %sabled at start\n",
1433                  fbname, enable ? "en" : "dis");
1434
1435         /* check to see if our routing allows this */
1436
1437         if (head == HEAD_CRT && info->pdata->fb_route == SM501_FB_CRT_PANEL) {
1438                 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1439                 writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1440                 enable = 0;
1441         }
1442
1443         strlcpy(fb->fix.id, fbname, sizeof(fb->fix.id));
1444
1445         memcpy(&par->ops,
1446                (head == HEAD_CRT) ? &sm501fb_ops_crt : &sm501fb_ops_pnl,
1447                sizeof(struct fb_ops));
1448
1449         /* update ops dependant on what we've been passed */
1450
1451         if ((pd->flags & SM501FB_FLAG_USE_HWCURSOR) == 0)
1452                 par->ops.fb_cursor = NULL;
1453
1454         fb->fbops = &par->ops;
1455         fb->flags = FBINFO_FLAG_DEFAULT |
1456                 FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_YPAN;
1457
1458         /* fixed data */
1459
1460         fb->fix.type            = FB_TYPE_PACKED_PIXELS;
1461         fb->fix.type_aux        = 0;
1462         fb->fix.xpanstep        = 1;
1463         fb->fix.ypanstep        = 1;
1464         fb->fix.ywrapstep       = 0;
1465         fb->fix.accel           = FB_ACCEL_NONE;
1466
1467         /* screenmode */
1468
1469         fb->var.nonstd          = 0;
1470         fb->var.activate        = FB_ACTIVATE_NOW;
1471         fb->var.accel_flags     = 0;
1472         fb->var.vmode           = FB_VMODE_NONINTERLACED;
1473         fb->var.bits_per_pixel  = 16;
1474
1475         if (enable && (pd->flags & SM501FB_FLAG_USE_INIT_MODE) && 0) {
1476                 /* TODO read the mode from the current display */
1477
1478         } else {
1479                 if (pd->def_mode) {
1480                         dev_info(info->dev, "using supplied mode\n");
1481                         fb_videomode_to_var(&fb->var, pd->def_mode);
1482
1483                         fb->var.bits_per_pixel = pd->def_bpp ? pd->def_bpp : 8;
1484                         fb->var.xres_virtual = fb->var.xres;
1485                         fb->var.yres_virtual = fb->var.yres;
1486                 } else {
1487                         ret = fb_find_mode(&fb->var, fb,
1488                                            NULL, NULL, 0, NULL, 8);
1489
1490                         if (ret == 0 || ret == 4) {
1491                                 dev_err(info->dev,
1492                                         "failed to get initial mode\n");
1493                                 return -EINVAL;
1494                         }
1495                 }
1496         }
1497
1498         /* initialise and set the palette */
1499         fb_alloc_cmap(&fb->cmap, NR_PALETTE, 0);
1500         fb_set_cmap(&fb->cmap, fb);
1501
1502         ret = (fb->fbops->fb_check_var)(&fb->var, fb);
1503         if (ret)
1504                 dev_err(info->dev, "check_var() failed on initial setup?\n");
1505
1506         /* ensure we've activated our new configuration */
1507         (fb->fbops->fb_set_par)(fb);
1508
1509         return 0;
1510 }
1511
1512 /* default platform data if none is supplied (ie, PCI device) */
1513
1514 static struct sm501_platdata_fbsub sm501fb_pdata_crt = {
1515         .flags          = (SM501FB_FLAG_USE_INIT_MODE |
1516                            SM501FB_FLAG_USE_HWCURSOR |
1517                            SM501FB_FLAG_USE_HWACCEL |
1518                            SM501FB_FLAG_DISABLE_AT_EXIT),
1519
1520 };
1521
1522 static struct sm501_platdata_fbsub sm501fb_pdata_pnl = {
1523         .flags          = (SM501FB_FLAG_USE_INIT_MODE |
1524                            SM501FB_FLAG_USE_HWCURSOR |
1525                            SM501FB_FLAG_USE_HWACCEL |
1526                            SM501FB_FLAG_DISABLE_AT_EXIT),
1527 };
1528
1529 static struct sm501_platdata_fb sm501fb_def_pdata = {
1530         .fb_route               = SM501_FB_OWN,
1531         .fb_crt                 = &sm501fb_pdata_crt,
1532         .fb_pnl                 = &sm501fb_pdata_pnl,
1533 };
1534
1535 static char driver_name_crt[] = "sm501fb-crt";
1536 static char driver_name_pnl[] = "sm501fb-panel";
1537
1538 static int __init sm501fb_probe(struct platform_device *pdev)
1539 {
1540         struct sm501fb_info *info;
1541         struct device       *dev = &pdev->dev;
1542         struct fb_info      *fbinfo_crt;
1543         struct fb_info      *fbinfo_pnl;
1544         int                  ret;
1545
1546         /* allocate our framebuffers */
1547
1548         fbinfo_crt = framebuffer_alloc(sizeof(struct sm501fb_par), dev);
1549         if (fbinfo_crt == NULL) {
1550                 dev_err(dev, "cannot allocate crt framebuffer\n");
1551                 return -ENOMEM;
1552         }
1553
1554         fbinfo_pnl = framebuffer_alloc(sizeof(struct sm501fb_par), dev);
1555         if (fbinfo_pnl == NULL) {
1556                 dev_err(dev, "cannot allocate panel framebuffer\n");
1557                 ret = -ENOMEM;
1558                 goto fbinfo_crt_alloc_fail;
1559         }
1560
1561         info = sm501fb_info_alloc(fbinfo_crt, fbinfo_pnl);
1562         if (info == NULL) {
1563                 dev_err(dev, "cannot allocate par\n");
1564                 ret = -ENOMEM;
1565                 goto sm501fb_alloc_fail;
1566         }
1567
1568         if (dev->parent->platform_data) {
1569                 struct sm501_platdata *pd = dev->parent->platform_data;
1570                 info->pdata = pd->fb;
1571         }
1572
1573         if (info->pdata == NULL) {
1574                 dev_info(dev, "using default configuration data\n");
1575                 info->pdata = &sm501fb_def_pdata;
1576         }
1577
1578         /* start the framebuffers */
1579
1580         ret = sm501fb_start(info, pdev);
1581         if (ret) {
1582                 dev_err(dev, "cannot initialise SM501\n");
1583                 goto sm501fb_start_fail;
1584         }
1585
1586         /* CRT framebuffer setup */
1587
1588         ret = sm501fb_init_fb(fbinfo_crt, HEAD_CRT, driver_name_crt);
1589         if (ret) {
1590                 dev_err(dev, "cannot initialise CRT fb\n");
1591                 goto sm501fb_start_fail;
1592         }
1593
1594         /* Panel framebuffer setup */
1595
1596         ret = sm501fb_init_fb(fbinfo_pnl, HEAD_PANEL, driver_name_pnl);
1597         if (ret) {
1598                 dev_err(dev, "cannot initialise Panel fb\n");
1599                 goto sm501fb_start_fail;
1600         }
1601
1602         /* register framebuffers */
1603
1604         ret = register_framebuffer(fbinfo_crt);
1605         if (ret < 0) {
1606                 dev_err(dev, "failed to register CRT fb (%d)\n", ret);
1607                 goto register_crt_fail;
1608         }
1609
1610         ret = register_framebuffer(fbinfo_pnl);
1611         if (ret < 0) {
1612                 dev_err(dev, "failed to register panel fb (%d)\n", ret);
1613                 goto register_pnl_fail;
1614         }
1615
1616         dev_info(dev, "fb%d: %s frame buffer device\n",
1617                  fbinfo_crt->node, fbinfo_crt->fix.id);
1618
1619         dev_info(dev, "fb%d: %s frame buffer device\n",
1620                fbinfo_pnl->node, fbinfo_pnl->fix.id);
1621
1622         /* create device files */
1623
1624         ret = device_create_file(dev, &dev_attr_crt_src);
1625         if (ret)
1626                 goto crtsrc_fail;
1627
1628         ret = device_create_file(dev, &dev_attr_fbregs_pnl);
1629         if (ret)
1630                 goto fbregs_pnl_fail;
1631
1632         ret = device_create_file(dev, &dev_attr_fbregs_crt);
1633         if (ret)
1634                 goto fbregs_crt_fail;
1635
1636         /* we registered, return ok */
1637         return 0;
1638
1639  fbregs_crt_fail:
1640         device_remove_file(dev, &dev_attr_fbregs_pnl);
1641
1642  fbregs_pnl_fail:
1643         device_remove_file(dev, &dev_attr_crt_src);
1644
1645  crtsrc_fail:
1646         unregister_framebuffer(fbinfo_pnl);
1647
1648  register_pnl_fail:
1649         unregister_framebuffer(fbinfo_crt);
1650
1651  register_crt_fail:
1652         sm501fb_stop(info);
1653
1654  sm501fb_start_fail:
1655         sm501fb_info_release(info);
1656
1657  sm501fb_alloc_fail:
1658         framebuffer_release(fbinfo_pnl);
1659
1660  fbinfo_crt_alloc_fail:
1661         framebuffer_release(fbinfo_crt);
1662
1663         return ret;
1664 }
1665
1666
1667 /*
1668  *  Cleanup
1669  */
1670 static int sm501fb_remove(struct platform_device *pdev)
1671 {
1672         struct sm501fb_info *info = platform_get_drvdata(pdev);
1673         struct fb_info     *fbinfo_crt = info->fb[0];
1674         struct fb_info     *fbinfo_pnl = info->fb[1];
1675
1676         device_remove_file(&pdev->dev, &dev_attr_fbregs_crt);
1677         device_remove_file(&pdev->dev, &dev_attr_fbregs_pnl);
1678         device_remove_file(&pdev->dev, &dev_attr_crt_src);
1679
1680         unregister_framebuffer(fbinfo_crt);
1681         unregister_framebuffer(fbinfo_pnl);
1682
1683         sm501fb_stop(info);
1684         sm501fb_info_release(info);
1685
1686         framebuffer_release(fbinfo_pnl);
1687         framebuffer_release(fbinfo_crt);
1688
1689         return 0;
1690 }
1691
1692 #ifdef CONFIG_PM
1693
1694 static int sm501fb_suspend_fb(struct sm501fb_info *info,
1695                               enum sm501_controller head)
1696 {
1697         struct fb_info *fbi = info->fb[head];
1698         struct sm501fb_par *par = fbi->par;
1699
1700         if (par->screen.size == 0)
1701                 return 0;
1702
1703         /* blank the relevant interface to ensure unit power minimised */
1704         (par->ops.fb_blank)(FB_BLANK_POWERDOWN, fbi);
1705
1706         /* tell console/fb driver we are suspending */
1707
1708         acquire_console_sem();
1709         fb_set_suspend(fbi, 1);
1710         release_console_sem();
1711
1712         /* backup copies in case chip is powered down over suspend */
1713
1714         par->store_fb = vmalloc(par->screen.size);
1715         if (par->store_fb == NULL) {
1716                 dev_err(info->dev, "no memory to store screen\n");
1717                 return -ENOMEM;
1718         }
1719
1720         par->store_cursor = vmalloc(par->cursor.size);
1721         if (par->store_cursor == NULL) {
1722                 dev_err(info->dev, "no memory to store cursor\n");
1723                 goto err_nocursor;
1724         }
1725
1726         dev_dbg(info->dev, "suspending screen to %p\n", par->store_fb);
1727         dev_dbg(info->dev, "suspending cursor to %p\n", par->store_cursor);
1728
1729         memcpy_fromio(par->store_fb, par->screen.k_addr, par->screen.size);
1730         memcpy_fromio(par->store_cursor, par->cursor.k_addr, par->cursor.size);
1731
1732         return 0;
1733
1734  err_nocursor:
1735         vfree(par->store_fb);
1736         par->store_fb = NULL;
1737
1738         return -ENOMEM;
1739 }
1740
1741 static void sm501fb_resume_fb(struct sm501fb_info *info,
1742                               enum sm501_controller head)
1743 {
1744         struct fb_info *fbi = info->fb[head];
1745         struct sm501fb_par *par = fbi->par;
1746
1747         if (par->screen.size == 0)
1748                 return;
1749
1750         /* re-activate the configuration */
1751
1752         (par->ops.fb_set_par)(fbi);
1753
1754         /* restore the data */
1755
1756         dev_dbg(info->dev, "restoring screen from %p\n", par->store_fb);
1757         dev_dbg(info->dev, "restoring cursor from %p\n", par->store_cursor);
1758
1759         if (par->store_fb)
1760                 memcpy_toio(par->screen.k_addr, par->store_fb,
1761                             par->screen.size);
1762
1763         if (par->store_cursor)
1764                 memcpy_toio(par->cursor.k_addr, par->store_cursor,
1765                             par->cursor.size);
1766
1767         acquire_console_sem();
1768         fb_set_suspend(fbi, 0);
1769         release_console_sem();
1770
1771         vfree(par->store_fb);
1772         vfree(par->store_cursor);
1773 }
1774
1775
1776 /* suspend and resume support */
1777
1778 static int sm501fb_suspend(struct platform_device *pdev, pm_message_t state)
1779 {
1780         struct sm501fb_info *info = platform_get_drvdata(pdev);
1781
1782         /* store crt control to resume with */
1783         info->pm_crt_ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1784
1785         sm501fb_suspend_fb(info, HEAD_CRT);
1786         sm501fb_suspend_fb(info, HEAD_PANEL);
1787
1788         /* turn off the clocks, in case the device is not powered down */
1789         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
1790
1791         return 0;
1792 }
1793
1794 #define SM501_CRT_CTRL_SAVE (SM501_DC_CRT_CONTROL_TVP |        \
1795                              SM501_DC_CRT_CONTROL_SEL)
1796
1797
1798 static int sm501fb_resume(struct platform_device *pdev)
1799 {
1800         struct sm501fb_info *info = platform_get_drvdata(pdev);
1801         unsigned long crt_ctrl;
1802
1803         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 1);
1804
1805         /* restore the items we want to be saved for crt control */
1806
1807         crt_ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1808         crt_ctrl &= ~SM501_CRT_CTRL_SAVE;
1809         crt_ctrl |= info->pm_crt_ctrl & SM501_CRT_CTRL_SAVE;
1810         writel(crt_ctrl, info->regs + SM501_DC_CRT_CONTROL);
1811
1812         sm501fb_resume_fb(info, HEAD_CRT);
1813         sm501fb_resume_fb(info, HEAD_PANEL);
1814
1815         return 0;
1816 }
1817
1818 #else
1819 #define sm501fb_suspend NULL
1820 #define sm501fb_resume  NULL
1821 #endif
1822
1823 static struct platform_driver sm501fb_driver = {
1824         .probe          = sm501fb_probe,
1825         .remove         = sm501fb_remove,
1826         .suspend        = sm501fb_suspend,
1827         .resume         = sm501fb_resume,
1828         .driver         = {
1829                 .name   = "sm501-fb",
1830                 .owner  = THIS_MODULE,
1831         },
1832 };
1833
1834 static int __devinit sm501fb_init(void)
1835 {
1836         return platform_driver_register(&sm501fb_driver);
1837 }
1838
1839 static void __exit sm501fb_cleanup(void)
1840 {
1841         platform_driver_unregister(&sm501fb_driver);
1842 }
1843
1844 module_init(sm501fb_init);
1845 module_exit(sm501fb_cleanup);
1846
1847 MODULE_AUTHOR("Ben Dooks, Vincent Sanders");
1848 MODULE_DESCRIPTION("SM501 Framebuffer driver");
1849 MODULE_LICENSE("GPL v2");