drivers/video/omap/hwa742.c

   1 /*
   2  * File: drivers/video/omap/hwa742.c
   3  *
   4  * Epson HWA742 LCD controller driver
   5  *
   6  * Copyright (C) 2004-2005 Nokia Corporation
   7  * Authors:     Juha Yrjölä   <juha.yrjola@nokia.com>
   8  *              Imre Deak     <imre.deak@nokia.com>
   9  * YUV support: Jussi Laako   <jussi.laako@nokia.com>
  10  *
  11  * This program is free software; you can redistribute it and/or modify it
  12  * under the terms of the GNU General Public License as published by the
  13  * Free Software Foundation; either version 2 of the License, or (at your
  14  * option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful, but
  17  * WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19  * General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License along
  22  * with this program; if not, write to the Free Software Foundation, Inc.,
  23  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  24  */
  25 #include <linux/config.h>
  26 #include <linux/module.h>
  27 #include <linux/mm.h>
  28 #include <linux/fb.h>
  29 #include <linux/delay.h>
  30 #include <linux/clk.h>
  31
  32 #include <asm/arch/dma.h>
  33 #include <asm/arch/omapfb.h>
  34
  35 /* #define OMAPFB_DBG 1 */
  36
  37 #include "debug.h"
  38
  39 #define MODULE_NAME                     "omapfb-hwa742"
  40
  41 #define HWA742_REV_CODE_REG       0x0
  42 #define HWA742_CONFIG_REG         0x2
  43 #define HWA742_PLL_DIV_REG        0x4
  44 #define HWA742_PLL_0_REG          0x6
  45 #define HWA742_PLL_1_REG          0x8
  46 #define HWA742_PLL_2_REG          0xa
  47 #define HWA742_PLL_3_REG          0xc
  48 #define HWA742_PLL_4_REG          0xe
  49 #define HWA742_CLK_SRC_REG        0x12
  50 #define HWA742_PANEL_TYPE_REG     0x14
  51 #define HWA742_H_DISP_REG         0x16
  52 #define HWA742_H_NDP_REG          0x18
  53 #define HWA742_V_DISP_1_REG       0x1a
  54 #define HWA742_V_DISP_2_REG       0x1c
  55 #define HWA742_V_NDP_REG          0x1e
  56 #define HWA742_HS_W_REG           0x20
  57 #define HWA742_HP_S_REG           0x22
  58 #define HWA742_VS_W_REG           0x24
  59 #define HWA742_VP_S_REG           0x26
  60 #define HWA742_PCLK_POL_REG       0x28
  61 #define HWA742_INPUT_MODE_REG     0x2a
  62 #define HWA742_TRANSL_MODE_REG1   0x2e
  63 #define HWA742_DISP_MODE_REG      0x34
  64 #define HWA742_WINDOW_TYPE        0x36
  65 #define HWA742_WINDOW_X_START_0   0x38
  66 #define HWA742_WINDOW_X_START_1   0x3a
  67 #define HWA742_WINDOW_Y_START_0   0x3c
  68 #define HWA742_WINDOW_Y_START_1   0x3e
  69 #define HWA742_WINDOW_X_END_0     0x40
  70 #define HWA742_WINDOW_X_END_1     0x42
  71 #define HWA742_WINDOW_Y_END_0     0x44
  72 #define HWA742_WINDOW_Y_END_1     0x46
  73 #define HWA742_MEMORY_WRITE_LSB   0x48
  74 #define HWA742_MEMORY_WRITE_MSB   0x49
  75 #define HWA742_MEMORY_READ_0      0x4a
  76 #define HWA742_MEMORY_READ_1      0x4c
  77 #define HWA742_MEMORY_READ_2      0x4e
  78 #define HWA742_POWER_SAVE         0x56
  79 #define HWA742_NDP_CTRL           0x58
  80
  81 #define HWA742_AUTO_UPDATE_TIME         (HZ / 20)
  82
  83 #define pr_err(fmt, args...) printk(KERN_ERR MODULE_NAME ": " fmt, ## args)
  84
  85 /* Reserve 4 request slots for requests in irq context */
  86 #define REQ_POOL_SIZE                   24
  87 #define IRQ_REQ_POOL_SIZE               4
  88
  89 struct update_param {
  90         int     x, y, width, height;
  91         int     color_mode;
  92         int     flags;
  93 };
  94
  95 #define REQ_FROM_IRQ_POOL 0x01
  96
  97 #define REQ_COMPLETE    0
  98 #define REQ_PENDING     1
  99
 100 struct hwa742_request {
 101         struct list_head entry;
 102         unsigned int     flags;
 103
 104         int              (*handler)(struct hwa742_request *req);
 105         void             (*complete)(void *data);
 106         void             *complete_data;
 107
 108         union {
 109                 struct update_param     update;
 110                 struct completion       *sync;
 111         } par;
 112 };
 113
 114 struct hwa742_struct {
 115         enum omapfb_update_mode update_mode;
 116         enum omapfb_update_mode update_mode_before_suspend;
 117
 118         struct timer_list       auto_update_timer;
 119         int                     stop_auto_update;
 120         struct omapfb_update_window     auto_update_window;
 121
 122         struct hwa742_request   req_pool[REQ_POOL_SIZE];
 123         struct list_head        pending_req_list;
 124         struct list_head        free_req_list;
 125         struct semaphore        req_sema;
 126         spinlock_t              req_lock;
 127
 128         struct clk              *sys_ck;
 129         struct extif_timings    reg_timings, lut_timings;
 130
 131         int                     prev_color_mode;
 132         int                     prev_flags;
 133         int                     window_type;
 134
 135         u32                     max_transmit_size;
 136         u32                     extif_clk_period;
 137
 138         struct omapfb_device    *fbdev;
 139         struct lcd_ctrl_extif   *extif;
 140         struct lcd_ctrl         *int_ctrl;
 141 } hwa742;
 142
 143 static u8 hwa742_read_reg(u8 reg)
 144 {
 145         u8 data;
 146
 147         hwa742.extif->set_bits_per_cycle(8);
 148         hwa742.extif->write_command(&reg, 1);
 149         hwa742.extif->read_data(&data, 1);
 150
 151         return data;
 152 }
 153
 154 static void hwa742_write_reg(u8 reg, u8 data)
 155 {
 156         hwa742.extif->set_bits_per_cycle(8);
 157         hwa742.extif->write_command(&reg, 1);
 158         hwa742.extif->write_data(&data, 1);
 159 }
 160
 161 static void set_window_regs(int x_start, int y_start, int x_end, int y_end)
 162 {
 163         u8 tmp[8];
 164         u8 cmd;
 165
 166         x_end--;
 167         y_end--;
 168         tmp[0] = x_start;
 169         tmp[1] = x_start >> 8;
 170         tmp[2] = y_start;
 171         tmp[3] = y_start >> 8;
 172         tmp[4] = x_end;
 173         tmp[5] = x_end >> 8;
 174         tmp[6] = y_end;
 175         tmp[7] = y_end >> 8;
 176
 177         hwa742.extif->set_bits_per_cycle(8);
 178         cmd = HWA742_WINDOW_X_START_0;
 179
 180         hwa742.extif->write_command(&cmd, 1);
 181
 182         hwa742.extif->write_data(tmp, 8);
 183 }
 184
 185 static void set_format_regs(int conv, int transl, int flags)
 186 {
 187         if (flags & OMAPFB_FORMAT_FLAG_DOUBLE) {
 188                 hwa742.window_type = ((hwa742.window_type & 0xfc) | 0x01);
 189                 DBGPRINT(2, "hwa742: enabled pixel doubling\n");
 190         } else {
 191                 hwa742.window_type = (hwa742.window_type & 0xfc);
 192                 DBGPRINT(2, "hwa742: disabled pixel doubling\n");
 193         }
 194
 195         hwa742_write_reg(HWA742_INPUT_MODE_REG, conv);
 196         hwa742_write_reg(HWA742_TRANSL_MODE_REG1, transl);
 197         hwa742_write_reg(HWA742_WINDOW_TYPE, hwa742.window_type);
 198 }
 199
 200 static inline struct hwa742_request *alloc_req(void)
 201 {
 202         unsigned long flags;
 203         struct hwa742_request *req;
 204         int req_flags = 0;
 205
 206         if (!in_interrupt())
 207                 down(&hwa742.req_sema);
 208         else
 209                 req_flags = REQ_FROM_IRQ_POOL;
 210
 211         spin_lock_irqsave(&hwa742.req_lock, flags);
 212         BUG_ON(list_empty(&hwa742.free_req_list));
 213         req = list_entry(hwa742.free_req_list.next,
 214                          struct hwa742_request, entry);
 215         list_del(&req->entry);
 216         spin_unlock_irqrestore(&hwa742.req_lock, flags);
 217
 218         INIT_LIST_HEAD(&req->entry);
 219         req->flags = req_flags;
 220
 221         return req;
 222 }
 223
 224 static inline void free_req(struct hwa742_request *req)
 225 {
 226         unsigned long flags;
 227
 228         spin_lock_irqsave(&hwa742.req_lock, flags);
 229
 230         list_del(&req->entry);
 231         list_add(&req->entry, &hwa742.free_req_list);
 232         if (!(req->flags & REQ_FROM_IRQ_POOL))
 233                 up(&hwa742.req_sema);
 234
 235         spin_unlock_irqrestore(&hwa742.req_lock, flags);
 236 }
 237
 238 static void process_pending_requests(void)
 239 {
 240         unsigned long flags;
 241
 242         DBGENTER(2);
 243
 244         spin_lock_irqsave(&hwa742.req_lock, flags);
 245
 246         while (!list_empty(&hwa742.pending_req_list)) {
 247                 struct hwa742_request *req;
 248                 void (*complete)(void *);
 249                 void *complete_data;
 250
 251                 req = list_entry(hwa742.pending_req_list.next,
 252                                  struct hwa742_request, entry);
 253                 spin_unlock_irqrestore(&hwa742.req_lock, flags);
 254
 255                 if (req->handler(req) == REQ_PENDING)
 256                         return;
 257
 258                 complete = req->complete;
 259                 complete_data = req->complete_data;
 260                 free_req(req);
 261
 262                 if (complete)
 263                         complete(complete_data);
 264
 265                 spin_lock_irqsave(&hwa742.req_lock, flags);
 266         }
 267
 268         spin_unlock_irqrestore(&hwa742.req_lock, flags);
 269
 270         DBGLEAVE(2);
 271 }
 272
 273 static void submit_req_list(struct list_head *head)
 274 {
 275         unsigned long flags;
 276         int process = 1;
 277
 278         DBGENTER(2);
 279
 280         spin_lock_irqsave(&hwa742.req_lock, flags);
 281         if (likely(!list_empty(&hwa742.pending_req_list)))
 282                 process = 0;
 283         list_splice_init(head, hwa742.pending_req_list.prev);
 284         spin_unlock_irqrestore(&hwa742.req_lock, flags);
 285
 286         if (process)
 287                 process_pending_requests();
 288
 289         DBGLEAVE(2);
 290 }
 291
 292 static void request_complete(void *data)
 293 {
 294         struct hwa742_request   *req = (struct hwa742_request *)data;
 295         void                    (*complete)(void *);
 296         void                    *complete_data;
 297
 298         complete = req->complete;
 299         complete_data = req->complete_data;
 300
 301         free_req(req);
 302
 303         if (complete)
 304                 complete(complete_data);
 305
 306         process_pending_requests();
 307 }
 308
 309 static int send_frame_handler(struct hwa742_request *req)
 310 {
 311         struct update_param *par = &req->par.update;
 312         int x = par->x;
 313         int y = par->y;
 314         int w = par->width;
 315         int h = par->height;
 316         int bpp;
 317         int conv, transl;
 318         unsigned long offset;
 319         int color_mode = par->color_mode;
 320         int flags = par->flags;
 321         int scr_width = 800;
 322
 323         DBGPRINT(2, "x %d y %d w %d h %d scr_width %d color_mode %d flags %d\n",
 324                 x, y, w, h, scr_width, color_mode, flags);
 325
 326         switch (color_mode) {
 327         case OMAPFB_COLOR_YUV422:
 328                 bpp = 16;
 329                 conv = 0x08;
 330                 transl = 0x25;
 331                 break;
 332         case OMAPFB_COLOR_YUV420:
 333                 bpp = 12;
 334                 conv = 0x09;
 335                 transl = 0x25;
 336                 break;
 337         case OMAPFB_COLOR_RGB565:
 338                 bpp = 16;
 339                 conv = 0x01;
 340                 transl = 0x05;
 341                 break;
 342         default:
 343                 return -EINVAL;
 344         }
 345
 346         if (hwa742.prev_flags != flags ||
 347             hwa742.prev_color_mode != color_mode) {
 348                 set_format_regs(conv, transl, flags);
 349                 hwa742.prev_color_mode = color_mode;
 350                 hwa742.prev_flags = flags;
 351         }
 352
 353         set_window_regs(x, y, x + w, y + h);
 354
 355         offset = (scr_width * y + x) * bpp / 8;
 356
 357         hwa742.int_ctrl->setup_plane(OMAPFB_PLANE_GFX,
 358                         OMAPFB_CHANNEL_OUT_LCD, offset, scr_width, 0, 0, w, h,
 359                         color_mode);
 360
 361         hwa742.extif->set_bits_per_cycle(16);
 362
 363         hwa742.int_ctrl->enable_plane(OMAPFB_PLANE_GFX, 1);
 364         hwa742.extif->transfer_area(w, h, request_complete, req);
 365
 366         return REQ_PENDING;
 367 }
 368
 369 static void send_frame_complete(void *data)
 370 {
 371         hwa742.int_ctrl->enable_plane(OMAPFB_PLANE_GFX, 0);
 372 }
 373
 374 #define ADD_PREQ(_x, _y, _w, _h) do {           \
 375         req = alloc_req();                      \
 376         req->handler    = send_frame_handler;   \
 377         req->complete   = send_frame_complete;  \
 378         req->par.update.x = _x;                 \
 379         req->par.update.y = _y;                 \
 380         req->par.update.width  = _w;            \
 381         req->par.update.height = _h;            \
 382         req->par.update.color_mode = color_mode;\
 383         req->par.update.flags     = flags;      \
 384         list_add_tail(&req->entry, req_head);   \
 385 } while(0)
 386
 387 static void create_req_list(struct omapfb_update_window *win,
 388                             struct list_head *req_head)
 389 {
 390         struct hwa742_request *req;
 391         int x = win->x;
 392         int y = win->y;
 393         int width = win->width;
 394         int height = win->height;
 395         int color_mode;
 396         int flags;
 397
 398         flags = win->format & OMAPFB_FORMAT_FLAG_DOUBLE;
 399         color_mode = win->format & OMAPFB_FORMAT_MASK;
 400
 401         if (x & 1) {
 402                 ADD_PREQ(x, y, 1, height);
 403                 width--;
 404                 x++;
 405         }
 406         if (width & ~1) {
 407                 unsigned int xspan = width & ~1;
 408                 unsigned int ystart = y;
 409                 unsigned int yspan = height;
 410
 411                 if (xspan * height * 2 > hwa742.max_transmit_size) {
 412                         yspan = hwa742.max_transmit_size / (xspan * 2);
 413                         ADD_PREQ(x, ystart, xspan, yspan);
 414                         ystart += yspan;
 415                         yspan = height - yspan;
 416                 }
 417
 418                 ADD_PREQ(x, ystart, xspan, yspan);
 419                 x += xspan;
 420                 width -= xspan;
 421         }
 422         if (width)
 423                 ADD_PREQ(x, y, 1, height);
 424 }
 425
 426 static void auto_update_complete(void *data)
 427 {
 428         DBGENTER(2);
 429
 430         if (!hwa742.stop_auto_update)
 431                 mod_timer(&hwa742.auto_update_timer,
 432                           jiffies + HWA742_AUTO_UPDATE_TIME);
 433
 434         DBGLEAVE(2);
 435 }
 436
 437 static void hwa742_update_window_auto(unsigned long arg)
 438 {
 439         LIST_HEAD(req_list);
 440         struct hwa742_request *last;
 441
 442         DBGENTER(2);
 443
 444         create_req_list(&hwa742.auto_update_window, &req_list);
 445         last = list_entry(req_list.prev, struct hwa742_request, entry);
 446
 447         last->complete = auto_update_complete;
 448         last->complete_data = NULL;
 449
 450         submit_req_list(&req_list);
 451
 452         DBGLEAVE(2);
 453 }
 454
 455 int hwa742_update_window_async(struct omapfb_update_window *win,
 456                                  void (*complete_callback)(void *arg),
 457                                  void *complete_callback_data)
 458 {
 459         LIST_HEAD(req_list);
 460         struct hwa742_request *last;
 461         int r = 0;
 462
 463         DBGENTER(2);
 464
 465         if (hwa742.update_mode != OMAPFB_MANUAL_UPDATE) {
 466                 DBGPRINT(1, "invalid update mode\n");
 467                 r = -EINVAL;
 468                 goto out;
 469         }
 470         if (unlikely(win->format & ~(0x03 | OMAPFB_FORMAT_FLAG_DOUBLE))) {
 471                 DBGPRINT(1, "invalid window flag");
 472                 r = -EINVAL;
 473                 goto out;
 474         }
 475
 476         create_req_list(win, &req_list);
 477         last = list_entry(req_list.prev, struct hwa742_request, entry);
 478
 479         last->complete = complete_callback;
 480         last->complete_data = (void *)complete_callback_data;
 481
 482         submit_req_list(&req_list);
 483
 484 out:
 485         DBGLEAVE(2);
 486         return r;
 487 }
 488 EXPORT_SYMBOL(hwa742_update_window_async);
 489
 490 static int hwa742_setup_plane(int plane, int channel_out,
 491                                   unsigned long offset, int screen_width,
 492                                   int pos_x, int pos_y, int width, int height,
 493                                   int color_mode)
 494 {
 495         if (plane != OMAPFB_PLANE_GFX ||
 496             channel_out != OMAPFB_CHANNEL_OUT_LCD)
 497                 return -EINVAL;
 498
 499         return 0;
 500 }
 501
 502 static int hwa742_enable_plane(int plane, int enable)
 503 {
 504         if (plane != 0)
 505                 return -EINVAL;
 506
 507         hwa742.int_ctrl->enable_plane(plane, enable);
 508
 509         return 0;
 510 }
 511
 512 static int sync_handler(struct hwa742_request *req)
 513 {
 514         complete(req->par.sync);
 515         return REQ_COMPLETE;
 516 }
 517
 518 static void hwa742_sync(void)
 519 {
 520         LIST_HEAD(req_list);
 521         struct hwa742_request *req;
 522         struct completion comp;
 523
 524         DBGENTER(2);
 525
 526         req = alloc_req();
 527
 528         req->handler = sync_handler;
 529         req->complete = NULL;
 530         init_completion(&comp);
 531         req->par.sync = &comp;
 532
 533         list_add(&req->entry, &req_list);
 534         submit_req_list(&req_list);
 535
 536         wait_for_completion(&comp);
 537
 538         DBGLEAVE(2);
 539 }
 540
 541 static void hwa742_bind_client(struct omapfb_notifier_block *nb)
 542 {
 543         DBGPRINT(1, "update_mode %d\n", hwa742.update_mode);
 544         if (hwa742.update_mode == OMAPFB_MANUAL_UPDATE) {
 545                 omapfb_notify_clients(hwa742.fbdev, OMAPFB_EVENT_READY);
 546         }
 547 }
 548
 549 static int hwa742_set_update_mode(enum omapfb_update_mode mode)
 550 {
 551         int r = 0;
 552
 553         DBGENTER(1);
 554
 555         if (mode != OMAPFB_MANUAL_UPDATE && mode != OMAPFB_AUTO_UPDATE &&
 556             mode != OMAPFB_UPDATE_DISABLED) {
 557                 r = -EINVAL;
 558                 goto out;
 559         }
 560
 561         if (mode == hwa742.update_mode)
 562                 goto out;
 563
 564         printk(KERN_INFO "hwa742: setting update mode to %s\n",
 565                         mode == OMAPFB_UPDATE_DISABLED ? "disabled" :
 566                         (mode == OMAPFB_AUTO_UPDATE ? "auto" : "manual"));
 567
 568         switch (hwa742.update_mode) {
 569         case OMAPFB_MANUAL_UPDATE:
 570                 omapfb_notify_clients(hwa742.fbdev, OMAPFB_EVENT_DISABLED);
 571                 break;
 572         case OMAPFB_AUTO_UPDATE:
 573                 hwa742.stop_auto_update = 1;
 574                 del_timer_sync(&hwa742.auto_update_timer);
 575                 break;
 576         case OMAPFB_UPDATE_DISABLED:
 577                 break;
 578         }
 579
 580         hwa742.update_mode = mode;
 581         hwa742_sync();
 582         hwa742.stop_auto_update = 0;
 583
 584         switch (mode) {
 585         case OMAPFB_MANUAL_UPDATE:
 586                 omapfb_notify_clients(hwa742.fbdev, OMAPFB_EVENT_READY);
 587                 break;
 588         case OMAPFB_AUTO_UPDATE:
 589                 hwa742_update_window_auto(0);
 590                 break;
 591         case OMAPFB_UPDATE_DISABLED:
 592                 break;
 593         }
 594 out:
 595
 596         DBGLEAVE(1);
 597         return r;
 598 }
 599
 600 static enum omapfb_update_mode hwa742_get_update_mode(void)
 601 {
 602         return hwa742.update_mode;
 603 }
 604
 605 static unsigned long round_to_extif_ticks(unsigned long ps, int div)
 606 {
 607         int bus_tick = hwa742.extif_clk_period * div;
 608         return (ps + bus_tick - 1) / bus_tick * bus_tick;
 609 }
 610
 611 static int calc_reg_timing(unsigned long sysclk, int div)
 612 {
 613         struct extif_timings *t;
 614         unsigned long systim;
 615
 616         /* CSOnTime 0, WEOnTime 2 ns, REOnTime 2 ns,
 617          * AccessTime 2 ns + 12.2 ns (regs),
 618          * WEOffTime = WEOnTime + 1 ns,
 619          * REOffTime = REOnTime + 16 ns (regs),
 620          * CSOffTime = REOffTime + 1 ns
 621          * ReadCycle = 2ns + 2*SYSCLK  (regs),
 622          * WriteCycle = 2*SYSCLK + 2 ns,
 623          * CSPulseWidth = 10 ns */
 624         systim = 1000000000 / (sysclk / 1000);
 625         DBGPRINT(1, "HWA742 systim %lu ps extif_clk_period %u ps"
 626                   "extif_clk_div %d\n", systim, hwa742.extif_clk_period, div);
 627
 628         t = &hwa742.reg_timings;
 629         memset(t, 0, sizeof(*t));
 630         t->clk_div = div;
 631         t->cs_on_time = 0;
 632         t->we_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
 633         t->re_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
 634         t->access_time = round_to_extif_ticks(t->re_on_time + 12200, div);
 635         t->we_off_time = round_to_extif_ticks(t->we_on_time + 1000, div);
 636         t->re_off_time = round_to_extif_ticks(t->re_on_time + 16000, div);
 637         t->cs_off_time = round_to_extif_ticks(t->re_off_time + 1000, div);
 638         t->we_cycle_time = round_to_extif_ticks(2 * systim + 2000, div);
 639         if (t->we_cycle_time < t->we_off_time)
 640                 t->we_cycle_time = t->we_off_time;
 641         t->re_cycle_time = round_to_extif_ticks(2 * systim + 2000, div);
 642         if (t->re_cycle_time < t->re_off_time)
 643                 t->re_cycle_time = t->re_off_time;
 644         t->cs_pulse_width = 0;
 645
 646         DBGPRINT(1, "[reg]cson %d csoff %d reon %d reoff %d\n",
 647                  t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time);
 648         DBGPRINT(1, "[reg]weon %d weoff %d recyc %d wecyc %d\n",
 649                  t->we_on_time, t->we_off_time, t->re_cycle_time,
 650                  t->we_cycle_time);
 651         DBGPRINT(1, "[reg]rdaccess %d cspulse %d\n",
 652                  t->access_time, t->cs_pulse_width);
 653
 654         return hwa742.extif->convert_timings(t);
 655 }
 656
 657 static int calc_lut_timing(unsigned long sysclk, int div)
 658 {
 659         struct extif_timings *t;
 660         unsigned long systim;
 661
 662         /* CSOnTime 0, WEOnTime 2 ns, REOnTime 2 ns,
 663          * AccessTime 2 ns + 4 * SYSCLK + 26 (lut),
 664          * WEOffTime = WEOnTime + 1 ns,
 665          * REOffTime = REOnTime + 4*SYSCLK + 26 ns (lut),
 666          * CSOffTime = REOffTime + 1 ns
 667          * ReadCycle = 2ns + 4*SYSCLK + 26 ns (lut),
 668          * WriteCycle = 2*SYSCLK + 2 ns,
 669          * CSPulseWidth = 10 ns
 670          */
 671         systim = 1000000000 / (sysclk / 1000);
 672         DBGPRINT(1, "HWA742 systim %lu ps extif_clk_period %u ps"
 673                   "extif_clk_div %d\n", systim, hwa742.extif_clk_period, div);
 674
 675         t = &hwa742.lut_timings;
 676         memset(t, 0, sizeof(*t));
 677
 678         t->clk_div = div;
 679
 680         t->cs_on_time = 0;
 681         t->we_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
 682         t->re_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
 683         t->access_time = round_to_extif_ticks(t->re_on_time + 4 * systim +
 684                                               26000, div);
 685         t->we_off_time = round_to_extif_ticks(t->we_on_time + 1000, div);
 686         t->re_off_time = round_to_extif_ticks(t->re_on_time + 4 * systim +
 687                                               26000, div);
 688         t->cs_off_time = round_to_extif_ticks(t->re_off_time + 1000, div);
 689         t->we_cycle_time = round_to_extif_ticks(2 * systim + 2000, div);
 690         if (t->we_cycle_time < t->we_off_time)
 691                 t->we_cycle_time = t->we_off_time;
 692         t->re_cycle_time = round_to_extif_ticks(2000 + 4 * systim + 26000, div);
 693         if (t->re_cycle_time < t->re_off_time)
 694                 t->re_cycle_time = t->re_off_time;
 695         t->cs_pulse_width = 0;
 696
 697         DBGPRINT(1, "[lut]cson %d csoff %d reon %d reoff %d\n",
 698                  t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time);
 699         DBGPRINT(1, "[lut]weon %d weoff %d recyc %d wecyc %d\n",
 700                  t->we_on_time, t->we_off_time, t->re_cycle_time,
 701                  t->we_cycle_time);
 702         DBGPRINT(1, "[lut]rdaccess %d cspulse %d\n",
 703                  t->access_time, t->cs_pulse_width);
 704
 705         return hwa742.extif->convert_timings(t);
 706 }
 707
 708 static int calc_extif_timings(unsigned long sysclk)
 709 {
 710         int max_clk_div;
 711         int div;
 712
 713         hwa742.extif->get_clk_info(&hwa742.extif_clk_period, &max_clk_div);
 714         for (div = 1; div < max_clk_div; div++) {
 715                 if (calc_reg_timing(sysclk, div) == 0)
 716                         break;
 717         }
 718         if (div == max_clk_div)
 719                 goto err;
 720
 721         for (div = 1; div < max_clk_div; div++) {
 722                 if (calc_lut_timing(sysclk, div) == 0)
 723                         break;
 724         }
 725
 726         if (div < max_clk_div)
 727                 return 0;
 728
 729 err:
 730         pr_err("can't setup timings\n");
 731         return -1;
 732 }
 733
 734 static unsigned long hwa742_get_caps(void)
 735 {
 736         return OMAPFB_CAPS_MANUAL_UPDATE;
 737 }
 738
 739 static void hwa742_suspend(void)
 740 {
 741         hwa742.update_mode_before_suspend = hwa742.update_mode;
 742         hwa742_set_update_mode(OMAPFB_UPDATE_DISABLED);
 743         /* Enable sleep mode */
 744         hwa742_write_reg(HWA742_POWER_SAVE, 1 << 1);
 745         clk_disable(hwa742.sys_ck);
 746 }
 747
 748 static void hwa742_resume(void)
 749 {
 750         if (clk_enable(hwa742.sys_ck) != 0)
 751                 pr_err("failed to enable SYS clock\n");
 752         /* Disable sleep mode */
 753         hwa742_write_reg(HWA742_POWER_SAVE, 0);
 754         while (1) {
 755                 /* Loop until PLL output is stabilized */
 756                 if (hwa742_read_reg(HWA742_PLL_DIV_REG) & (1 << 7))
 757                         break;
 758                 set_current_state(TASK_UNINTERRUPTIBLE);
 759                 schedule_timeout(msecs_to_jiffies(5));
 760         }
 761         hwa742_set_update_mode(hwa742.update_mode_before_suspend);
 762 }
 763
 764 struct lcd_ctrl hwa742_ctrl;
 765
 766 static int hwa742_init(struct omapfb_device *fbdev, int ext_mode, int req_vram_size)
 767 {
 768         int r = 0, i;
 769         u8 rev, conf;
 770         unsigned long sysfreq;
 771         int div, nd;
 772
 773         DBGENTER(1);
 774
 775         hwa742.sys_ck = clk_get(0, "bclk");
 776         if (IS_ERR(hwa742.sys_ck)) {
 777                 pr_err("can't get SYS clock\n");
 778                 return PTR_ERR(hwa742.sys_ck);
 779         }
 780
 781         if ((r = clk_enable(hwa742.sys_ck)) != 0) {
 782                 pr_err("can't enable SYS clock\n");
 783                 clk_put(hwa742.sys_ck);
 784                 return r;
 785         }
 786
 787         BUG_ON(!fbdev->ext_if || !fbdev->int_ctrl);
 788
 789         hwa742.fbdev = fbdev;
 790         hwa742.extif = fbdev->ext_if;
 791         hwa742.int_ctrl = fbdev->int_ctrl;
 792
 793         spin_lock_init(&hwa742.req_lock);
 794
 795         if ((r = hwa742.int_ctrl->init(fbdev, 1, req_vram_size)) < 0)
 796                 goto err1;
 797
 798         if ((r = hwa742.extif->init()) < 0)
 799                 goto err2;
 800
 801         hwa742_ctrl.get_vram_layout = hwa742.int_ctrl->get_vram_layout;
 802         hwa742_ctrl.mmap = hwa742.int_ctrl->mmap;
 803
 804         sysfreq = clk_get_rate(hwa742.sys_ck);
 805         if ((r = calc_extif_timings(sysfreq)) < 0)
 806                 goto err3;
 807         hwa742.extif->set_timings(&hwa742.reg_timings);
 808
 809         div = (hwa742_read_reg(HWA742_PLL_DIV_REG) & 0x3f) + 1;
 810
 811         nd = (hwa742_read_reg(HWA742_PLL_4_REG) & 0x7f) + 1;
 812
 813         if ((r = calc_extif_timings(sysfreq / div * nd)) < 0)
 814                 goto err3;
 815         hwa742.extif->set_timings(&hwa742.reg_timings);
 816
 817         rev = hwa742_read_reg(HWA742_REV_CODE_REG);
 818         if ((rev & 0xfc) != 0x80) {
 819                 pr_err("invalid revision %02x\n", rev);
 820                 r = -ENODEV;
 821                 goto err3;
 822         }
 823
 824         conf = hwa742_read_reg(HWA742_CONFIG_REG);
 825         pr_info(MODULE_NAME ": Epson HWA742 LCD controller rev. %d "
 826                         "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07);
 827
 828         if (!(hwa742_read_reg(HWA742_PLL_DIV_REG) & 0x80)) {
 829                 pr_err("controller not initialized by the bootloader\n");
 830                 r = -ENODEV;
 831                 goto err2;
 832         }
 833
 834         hwa742.max_transmit_size = hwa742.extif->max_transmit_size;
 835
 836         hwa742.update_mode = OMAPFB_UPDATE_DISABLED;
 837
 838         hwa742.auto_update_window.x = 0;
 839         hwa742.auto_update_window.y = 0;
 840         hwa742.auto_update_window.width = fbdev->panel->x_res;
 841         hwa742.auto_update_window.height = fbdev->panel->y_res;
 842         hwa742.auto_update_window.format = 0;
 843
 844         init_timer(&hwa742.auto_update_timer);
 845         hwa742.auto_update_timer.function = hwa742_update_window_auto;
 846         hwa742.auto_update_timer.data = 0;
 847
 848         hwa742.prev_color_mode = -1;
 849         hwa742.prev_flags = 0;
 850
 851         hwa742.fbdev = fbdev;
 852
 853         INIT_LIST_HEAD(&hwa742.free_req_list);
 854         INIT_LIST_HEAD(&hwa742.pending_req_list);
 855         for (i = 0; i < ARRAY_SIZE(hwa742.req_pool); i++)
 856                 list_add(&hwa742.req_pool[i].entry, &hwa742.free_req_list);
 857         BUG_ON(i <= IRQ_REQ_POOL_SIZE);
 858         sema_init(&hwa742.req_sema, i - IRQ_REQ_POOL_SIZE);
 859
 860         return 0;
 861 err3:
 862         hwa742.extif->cleanup();
 863 err2:
 864         hwa742.int_ctrl->cleanup();
 865 err1:
 866         clk_disable(hwa742.sys_ck);
 867         clk_put(hwa742.sys_ck);
 868         return r;
 869 }
 870
 871 static void hwa742_cleanup(void)
 872 {
 873         hwa742_set_update_mode(OMAPFB_UPDATE_DISABLED);
 874         hwa742.extif->cleanup();
 875         hwa742.int_ctrl->cleanup();
 876         clk_disable(hwa742.sys_ck);
 877         clk_put(hwa742.sys_ck);
 878 }
 879
 880 struct lcd_ctrl hwa742_ctrl = {
 881         .name                   = "hwa742",
 882         .init                   = hwa742_init,
 883         .cleanup                = hwa742_cleanup,
 884         .bind_client            = hwa742_bind_client,
 885         .get_caps               = hwa742_get_caps,
 886         .set_update_mode        = hwa742_set_update_mode,
 887         .get_update_mode        = hwa742_get_update_mode,
 888         .setup_plane            = hwa742_setup_plane,
 889         .enable_plane           = hwa742_enable_plane,
 890         .update_window          = hwa742_update_window_async,
 891         .sync                   = hwa742_sync,
 892         .suspend                = hwa742_suspend,
 893         .resume                 = hwa742_resume,
 894 };
 895