2 * File: drivers/video/omap/blizzard.c
4 * Epson Blizzard LCD controller driver
6 * Copyright (C) 2004-2005 Nokia Corporation
7 * Authors: Juha Yrjola <juha.yrjola@nokia.com>
8 * Imre Deak <imre.deak@nokia.com>
9 * YUV support: Jussi Laako <jussi.laako@nokia.com>
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
25 #include <linux/module.h>
28 #include <linux/delay.h>
29 #include <linux/clk.h>
31 #include <asm/arch/dma.h>
32 #include <asm/arch/omapfb.h>
33 #include <asm/arch/blizzard.h>
37 #define MODULE_NAME "blizzard"
39 #define BLIZZARD_REV_CODE 0x00
40 #define BLIZZARD_CONFIG 0x02
41 #define BLIZZARD_PLL_DIV 0x04
42 #define BLIZZARD_PLL_LOCK_RANGE 0x06
43 #define BLIZZARD_PLL_CLOCK_SYNTH_0 0x08
44 #define BLIZZARD_PLL_CLOCK_SYNTH_1 0x0a
45 #define BLIZZARD_PLL_MODE 0x0c
46 #define BLIZZARD_CLK_SRC 0x0e
47 #define BLIZZARD_MEM_BANK0_ACTIVATE 0x10
48 #define BLIZZARD_MEM_BANK0_STATUS 0x14
49 #define BLIZZARD_HDISP 0x2a
50 #define BLIZZARD_HNDP 0x2c
51 #define BLIZZARD_VDISP0 0x2e
52 #define BLIZZARD_VDISP1 0x30
53 #define BLIZZARD_VNDP 0x32
54 #define BLIZZARD_HSW 0x34
55 #define BLIZZARD_VSW 0x38
56 #define BLIZZARD_DISPLAY_MODE 0x68
57 #define BLIZZARD_INPUT_WIN_X_START_0 0x6c
58 #define BLIZZARD_DATA_SOURCE_SELECT 0x8e
59 #define BLIZZARD_DISP_MEM_DATA_PORT 0x90
60 #define BLIZZARD_DISP_MEM_READ_ADDR0 0x92
61 #define BLIZZARD_POWER_SAVE 0xE6
62 #define BLIZZARD_NDISP_CTRL_STATUS 0xE8
64 /* Data source select */
66 #define BLIZZARD_SRC_WRITE_LCD_BACKGROUND 0x00
67 #define BLIZZARD_SRC_WRITE_LCD_DESTRUCTIVE 0x01
69 #define BLIZZARD_SRC_WRITE_LCD 0x00
70 #define BLIZZARD_SRC_BLT_LCD 0x06
72 #define BLIZZARD_VERSION_S1D13745 0x01 /* Hailstorm */
73 #define BLIZZARD_VERSION_S1D13744 0x02 /* Blizzard */
75 #define BLIZZARD_AUTO_UPDATE_TIME (HZ / 20)
77 /* Reserve 4 request slots for requests in irq context */
78 #define REQ_POOL_SIZE 24
79 #define IRQ_REQ_POOL_SIZE 4
81 #define REQ_FROM_IRQ_POOL 0x01
83 #define REQ_COMPLETE 0
88 int x, y, width, height;
93 struct blizzard_request {
94 struct list_head entry;
97 int (*handler)(struct blizzard_request *req);
98 void (*complete)(void *data);
102 struct update_param update;
103 struct completion *sync;
108 unsigned long offset;
111 int out_width, out_height;
117 struct blizzard_struct {
118 enum omapfb_update_mode update_mode;
119 enum omapfb_update_mode update_mode_before_suspend;
121 struct timer_list auto_update_timer;
122 int stop_auto_update;
123 struct omapfb_update_window auto_update_window;
125 int vid_nonstd_color;
129 unsigned te_connected:1;
130 unsigned vsync_only:1;
132 struct plane_info plane[OMAPFB_PLANE_NUM];
134 struct blizzard_request req_pool[REQ_POOL_SIZE];
135 struct list_head pending_req_list;
136 struct list_head free_req_list;
137 struct semaphore req_sema;
140 unsigned long sys_ck_rate;
141 struct extif_timings reg_timings, lut_timings;
143 u32 max_transmit_size;
144 u32 extif_clk_period;
146 unsigned long pix_tx_time;
147 unsigned long line_upd_time;
149 struct omapfb_device *fbdev;
150 struct lcd_ctrl_extif *extif;
151 struct lcd_ctrl *int_ctrl;
153 void (*power_up)(struct device *dev);
154 void (*power_down)(struct device *dev);
159 struct lcd_ctrl blizzard_ctrl;
161 static u8 blizzard_read_reg(u8 reg)
165 blizzard.extif->set_bits_per_cycle(8);
166 blizzard.extif->write_command(®, 1);
167 blizzard.extif->read_data(&data, 1);
172 static void blizzard_write_reg(u8 reg, u8 val)
174 blizzard.extif->set_bits_per_cycle(8);
175 blizzard.extif->write_command(®, 1);
176 blizzard.extif->write_data(&val, 1);
179 static void blizzard_restart_sdram(void)
183 blizzard_write_reg(BLIZZARD_MEM_BANK0_ACTIVATE, 0);
185 blizzard_write_reg(BLIZZARD_MEM_BANK0_ACTIVATE, 1);
186 tmo = jiffies + msecs_to_jiffies(200);
187 while (!(blizzard_read_reg(BLIZZARD_MEM_BANK0_STATUS) & 0x01)) {
188 if (time_after(jiffies, tmo)) {
189 dev_err(blizzard.fbdev->dev,
190 "s1d1374x: SDRAM not ready");
197 static void blizzard_stop_sdram(void)
199 blizzard_write_reg(BLIZZARD_MEM_BANK0_ACTIVATE, 0);
202 /* Wait until the last window was completely written into the controllers
203 * SDRAM and we can start transferring the next window.
205 static void blizzard_wait_line_buffer(void)
207 unsigned long tmo = jiffies + msecs_to_jiffies(30);
209 while (blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS) & (1 << 7)) {
210 if (time_after(jiffies, tmo)) {
211 if (printk_ratelimit())
212 dev_err(blizzard.fbdev->dev,
213 "s1d1374x: line buffer not ready\n");
219 static void set_window_regs(int x_start, int y_start, int x_end, int y_end)
227 tmp[1] = x_start >> 8;
229 tmp[3] = y_start >> 8;
235 blizzard.extif->set_bits_per_cycle(8);
236 cmd = BLIZZARD_INPUT_WIN_X_START_0;
237 blizzard.extif->write_command(&cmd, 1);
238 blizzard.extif->write_data(tmp, 8);
239 blizzard.extif->write_data(tmp, 8);
242 tmp[1] = blizzard.version == BLIZZARD_VERSION_S1D13744 ?
243 BLIZZARD_SRC_WRITE_LCD :
244 BLIZZARD_SRC_WRITE_LCD_DESTRUCTIVE;
245 blizzard.extif->write_data(tmp, 2);
248 static void enable_tearsync(int y, int width, int height, int screen_height,
253 b = blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS);
255 blizzard_write_reg(BLIZZARD_NDISP_CTRL_STATUS, b);
257 if (likely(blizzard.vsync_only || force_vsync)) {
258 blizzard.extif->enable_tearsync(1, 0);
262 if (width * blizzard.pix_tx_time < blizzard.line_upd_time) {
263 blizzard.extif->enable_tearsync(1, 0);
267 if ((width * blizzard.pix_tx_time / 1000) * height <
268 (y + height) * (blizzard.line_upd_time / 1000)) {
269 blizzard.extif->enable_tearsync(1, 0);
273 blizzard.extif->enable_tearsync(1, y + 1);
276 static void disable_tearsync(void)
280 blizzard.extif->enable_tearsync(0, 0);
281 b = blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS);
283 blizzard_write_reg(BLIZZARD_NDISP_CTRL_STATUS, b);
284 b = blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS);
287 static inline void set_extif_timings(const struct extif_timings *t);
289 static inline struct blizzard_request *alloc_req(void)
292 struct blizzard_request *req;
296 down(&blizzard.req_sema);
298 req_flags = REQ_FROM_IRQ_POOL;
300 spin_lock_irqsave(&blizzard.req_lock, flags);
301 BUG_ON(list_empty(&blizzard.free_req_list));
302 req = list_entry(blizzard.free_req_list.next,
303 struct blizzard_request, entry);
304 list_del(&req->entry);
305 spin_unlock_irqrestore(&blizzard.req_lock, flags);
307 INIT_LIST_HEAD(&req->entry);
308 req->flags = req_flags;
313 static inline void free_req(struct blizzard_request *req)
317 spin_lock_irqsave(&blizzard.req_lock, flags);
319 list_del(&req->entry);
320 list_add(&req->entry, &blizzard.free_req_list);
321 if (!(req->flags & REQ_FROM_IRQ_POOL))
322 up(&blizzard.req_sema);
324 spin_unlock_irqrestore(&blizzard.req_lock, flags);
327 static void process_pending_requests(void)
331 spin_lock_irqsave(&blizzard.req_lock, flags);
333 while (!list_empty(&blizzard.pending_req_list)) {
334 struct blizzard_request *req;
335 void (*complete)(void *);
338 req = list_entry(blizzard.pending_req_list.next,
339 struct blizzard_request, entry);
340 spin_unlock_irqrestore(&blizzard.req_lock, flags);
342 if (req->handler(req) == REQ_PENDING)
345 complete = req->complete;
346 complete_data = req->complete_data;
350 complete(complete_data);
352 spin_lock_irqsave(&blizzard.req_lock, flags);
355 spin_unlock_irqrestore(&blizzard.req_lock, flags);
358 static void submit_req_list(struct list_head *head)
363 spin_lock_irqsave(&blizzard.req_lock, flags);
364 if (likely(!list_empty(&blizzard.pending_req_list)))
366 list_splice_init(head, blizzard.pending_req_list.prev);
367 spin_unlock_irqrestore(&blizzard.req_lock, flags);
370 process_pending_requests();
373 static void request_complete(void *data)
375 struct blizzard_request *req = (struct blizzard_request *)data;
376 void (*complete)(void *);
379 complete = req->complete;
380 complete_data = req->complete_data;
385 complete(complete_data);
387 process_pending_requests();
391 static int do_full_screen_update(struct blizzard_request *req)
396 for (i = 0; i < 3; i++) {
397 struct plane_info *p = &blizzard.plane[i];
398 if (!(blizzard.enabled_planes & (1 << i))) {
399 blizzard.int_ctrl->enable_plane(i, 0);
402 dev_dbg(blizzard.fbdev->dev, "pw %d ph %d\n",
403 p->width, p->height);
404 blizzard.int_ctrl->setup_plane(i,
405 OMAPFB_CHANNEL_OUT_LCD, p->offset,
406 p->scr_width, p->pos_x, p->pos_y,
409 blizzard.int_ctrl->enable_plane(i, 1);
412 dev_dbg(blizzard.fbdev->dev, "sw %d sh %d\n",
413 blizzard.screen_width, blizzard.screen_height);
414 blizzard_wait_line_buffer();
415 flags = req->par.update.flags;
416 if (flags & OMAPFB_FORMAT_FLAG_TEARSYNC)
417 enable_tearsync(0, blizzard.screen_width,
418 blizzard.screen_height,
419 blizzard.screen_height,
420 flags & OMAPFB_FORMAT_FLAG_FORCE_VSYNC);
424 set_window_regs(0, 0, blizzard.screen_width, blizzard.screen_height);
426 blizzard.extif->set_bits_per_cycle(16);
427 /* set_window_regs has left the register index at the right
428 * place, so no need to set it here.
430 blizzard.extif->transfer_area(blizzard.screen_width,
431 blizzard.screen_height,
432 request_complete, req);
436 /* Setup all planes with an overlapping area with the update window. */
437 static int do_partial_update(struct blizzard_request *req, int plane,
438 int x, int y, int w, int h)
441 int gx1, gy1, gx2, gy2;
444 /* Global coordinates, relative to pixel 0,0 of the LCD */
445 gx1 = x + blizzard.plane[plane].pos_x;
446 gy1 = y + blizzard.plane[plane].pos_y;
450 for (i = 0; i < OMAPFB_PLANE_NUM; i++) {
451 struct plane_info *p = &blizzard.plane[i];
456 unsigned long offset;
458 if (!(blizzard.enabled_planes & (1 << i))) {
459 blizzard.int_ctrl->enable_plane(i, 0);
462 /* Plane coordinates */
464 /* Plane in which we are doing the update.
465 * Local coordinates are the one in the update
475 /* Check if this plane has an overlapping part */
476 px1 = gx1 - p->pos_x;
477 py1 = gy1 - p->pos_y;
478 px2 = gx2 - p->pos_x;
479 py2 = gy2 - p->pos_y;
480 if (px1 >= p->width || py1 >= p->height ||
481 px2 <= 0 || py2 <= 0) {
482 blizzard.int_ctrl->enable_plane(i, 0);
485 /* Calculate the coordinates for the overlapping
486 * part in the plane's local coordinates.
505 offset = p->offset + (p->scr_width * py1 + px1) * p->bpp / 8;
507 dev_dbg(blizzard.fbdev->dev,
508 "plane %d offset %#08lx pposx %d pposy %d "
509 "px1 %d py1 %d pw %d ph %d\n",
510 i, offset, pposx, pposy, px1, py1, pw, ph);
512 blizzard.int_ctrl->setup_plane(i,
513 OMAPFB_CHANNEL_OUT_LCD, offset,
515 pposx, pposy, pw, ph,
518 blizzard.int_ctrl->enable_plane(i, 1);
521 blizzard_wait_line_buffer();
522 flags = req->par.update.flags;
523 if (flags & OMAPFB_FORMAT_FLAG_TEARSYNC)
524 enable_tearsync(gy1, gx2 - gx1, gy2 - gy1,
525 blizzard.screen_height,
526 flags & OMAPFB_FORMAT_FLAG_FORCE_VSYNC);
530 set_window_regs(gx1, gy1, gx2, gy2);
532 blizzard.extif->set_bits_per_cycle(16);
533 /* set_window_regs has left the register index at the right
534 * place, so no need to set it here.
536 blizzard.extif->transfer_area(w, h, request_complete, req);
541 static int send_frame_handler(struct blizzard_request *req)
543 struct update_param *par = &req->par.update;
544 int plane = par->plane;
547 dev_dbg(blizzard.fbdev->dev,
548 "send_frame: x %d y %d w %d h %d color_mode %04x flags %04x "
550 par->x, par->y, par->width, par->height,
551 par->color_mode, par->flags, blizzard.enabled_planes);
554 if ((blizzard.enabled_planes & blizzard.vid_nonstd_color) ||
555 (blizzard.enabled_planes & blizzard.vid_scaled))
556 return do_full_screen_update(req);
558 return do_partial_update(req, plane, par->x, par->y,
559 par->width, par->height);
562 static void send_frame_complete(void *data)
566 #define ADD_PREQ(_x, _y, _w, _h) do { \
568 req->handler = send_frame_handler; \
569 req->complete = send_frame_complete; \
570 req->par.update.plane = plane; \
571 req->par.update.x = _x; \
572 req->par.update.y = _y; \
573 req->par.update.width = _w; \
574 req->par.update.height = _h; \
575 req->par.update.color_mode = color_mode;\
576 req->par.update.flags = flags; \
577 list_add_tail(&req->entry, req_head); \
580 static void create_req_list(int plane,
581 struct omapfb_update_window *win,
582 struct list_head *req_head)
584 struct blizzard_request *req;
585 int x = (win->x & ~0x07);
586 int y = (win->y & ~0x07);
587 int width = ((win->x + win->width + 7) & ~0x07) - x;
588 int height = ((win->y + win->height + 7) & ~0x07) - y;
592 flags = win->format & ~OMAPFB_FORMAT_MASK;
593 color_mode = win->format & OMAPFB_FORMAT_MASK;
596 ADD_PREQ(x, y, 1, height);
599 flags &= ~OMAPFB_FORMAT_FLAG_TEARSYNC;
602 unsigned int xspan = width & ~1;
603 unsigned int ystart = y;
604 unsigned int yspan = height;
606 if (xspan * height * 2 > blizzard.max_transmit_size) {
607 yspan = blizzard.max_transmit_size / (xspan * 2);
608 ADD_PREQ(x, ystart, xspan, yspan);
610 yspan = height - yspan;
611 flags &= ~OMAPFB_FORMAT_FLAG_TEARSYNC;
614 ADD_PREQ(x, ystart, xspan, yspan);
617 flags &= ~OMAPFB_FORMAT_FLAG_TEARSYNC;
620 ADD_PREQ(x, y, 1, height);
623 static void auto_update_complete(void *data)
625 if (!blizzard.stop_auto_update)
626 mod_timer(&blizzard.auto_update_timer,
627 jiffies + BLIZZARD_AUTO_UPDATE_TIME);
630 static void blizzard_update_window_auto(unsigned long arg)
633 struct blizzard_request *last;
634 struct omapfb_plane_struct *plane;
636 plane = blizzard.fbdev->fb_info[0]->par;
637 create_req_list(plane->idx,
638 &blizzard.auto_update_window, &req_list);
639 last = list_entry(req_list.prev, struct blizzard_request, entry);
641 last->complete = auto_update_complete;
642 last->complete_data = NULL;
644 submit_req_list(&req_list);
647 int blizzard_update_window_async(struct fb_info *fbi,
648 struct omapfb_update_window *win,
649 void (*complete_callback)(void *arg),
650 void *complete_callback_data)
653 struct blizzard_request *last;
654 struct omapfb_plane_struct *plane = fbi->par;
656 if (unlikely(blizzard.update_mode != OMAPFB_MANUAL_UPDATE))
658 if (unlikely(!blizzard.te_connected &&
659 (win->format & OMAPFB_FORMAT_FLAG_TEARSYNC)))
662 create_req_list(plane->idx, win, &req_list);
663 last = list_entry(req_list.prev, struct blizzard_request, entry);
665 last->complete = complete_callback;
666 last->complete_data = (void *)complete_callback_data;
668 submit_req_list(&req_list);
672 EXPORT_SYMBOL(blizzard_update_window_async);
674 static int blizzard_setup_plane(int plane, int channel_out,
675 unsigned long offset, int screen_width,
676 int pos_x, int pos_y, int width, int height,
679 struct plane_info *p;
682 dev_dbg(blizzard.fbdev->dev,
683 "plane %d ch_out %d offset %#08lx scr_width %d "
684 "pos_x %d pos_y %d width %d height %d color_mode %d\n",
685 plane, channel_out, offset, screen_width,
686 pos_x, pos_y, width, height, color_mode);
688 if ((unsigned)plane > OMAPFB_PLANE_NUM)
690 p = &blizzard.plane[plane];
692 switch (color_mode) {
693 case OMAPFB_COLOR_YUV422:
694 case OMAPFB_COLOR_YUY422:
696 blizzard.vid_nonstd_color |= 1 << plane;
698 case OMAPFB_COLOR_YUV420:
700 blizzard.vid_nonstd_color |= 1 << plane;
702 case OMAPFB_COLOR_RGB565:
704 blizzard.vid_nonstd_color &= ~(1 << plane);
715 p->scr_width = screen_width;
717 p->out_width = width;
719 p->out_height = height;
721 p->color_mode = color_mode;
726 static int blizzard_set_scale(int plane, int orig_w, int orig_h,
727 int out_w, int out_h)
729 struct plane_info *p = &blizzard.plane[plane];
732 dev_dbg(blizzard.fbdev->dev,
733 "plane %d orig_w %d orig_h %d out_w %d out_h %d\n",
734 plane, orig_w, orig_h, out_w, out_h);
735 if ((unsigned)plane > OMAPFB_PLANE_NUM)
738 r = blizzard.int_ctrl->set_scale(plane, orig_w, orig_h, out_w, out_h);
744 p->out_width = out_w;
745 p->out_height = out_h;
746 if (orig_w == out_w && orig_h == out_h)
747 blizzard.vid_scaled &= ~(1 << plane);
749 blizzard.vid_scaled |= 1 << plane;
754 static int blizzard_enable_plane(int plane, int enable)
757 blizzard.enabled_planes |= 1 << plane;
759 blizzard.enabled_planes &= ~(1 << plane);
764 static int sync_handler(struct blizzard_request *req)
766 complete(req->par.sync);
770 static void blizzard_sync(void)
773 struct blizzard_request *req;
774 struct completion comp;
778 req->handler = sync_handler;
779 req->complete = NULL;
780 init_completion(&comp);
781 req->par.sync = ∁
783 list_add(&req->entry, &req_list);
784 submit_req_list(&req_list);
786 wait_for_completion(&comp);
789 static void blizzard_bind_client(struct omapfb_notifier_block *nb)
791 if (blizzard.update_mode == OMAPFB_MANUAL_UPDATE) {
792 omapfb_notify_clients(blizzard.fbdev, OMAPFB_EVENT_READY);
796 static int blizzard_set_update_mode(enum omapfb_update_mode mode)
798 if (unlikely(mode != OMAPFB_MANUAL_UPDATE &&
799 mode != OMAPFB_AUTO_UPDATE &&
800 mode != OMAPFB_UPDATE_DISABLED))
803 if (mode == blizzard.update_mode)
806 dev_info(blizzard.fbdev->dev, "s1d1374x: setting update mode to %s\n",
807 mode == OMAPFB_UPDATE_DISABLED ? "disabled" :
808 (mode == OMAPFB_AUTO_UPDATE ? "auto" : "manual"));
810 switch (blizzard.update_mode) {
811 case OMAPFB_MANUAL_UPDATE:
812 omapfb_notify_clients(blizzard.fbdev, OMAPFB_EVENT_DISABLED);
814 case OMAPFB_AUTO_UPDATE:
815 blizzard.stop_auto_update = 1;
816 del_timer_sync(&blizzard.auto_update_timer);
818 case OMAPFB_UPDATE_DISABLED:
822 blizzard.update_mode = mode;
824 blizzard.stop_auto_update = 0;
827 case OMAPFB_MANUAL_UPDATE:
828 omapfb_notify_clients(blizzard.fbdev, OMAPFB_EVENT_READY);
830 case OMAPFB_AUTO_UPDATE:
831 blizzard_update_window_auto(0);
833 case OMAPFB_UPDATE_DISABLED:
840 static enum omapfb_update_mode blizzard_get_update_mode(void)
842 return blizzard.update_mode;
845 static inline void set_extif_timings(const struct extif_timings *t)
847 blizzard.extif->set_timings(t);
850 static inline unsigned long round_to_extif_ticks(unsigned long ps, int div)
852 int bus_tick = blizzard.extif_clk_period * div;
853 return (ps + bus_tick - 1) / bus_tick * bus_tick;
856 static int calc_reg_timing(unsigned long sysclk, int div)
858 struct extif_timings *t;
859 unsigned long systim;
861 /* CSOnTime 0, WEOnTime 2 ns, REOnTime 2 ns,
862 * AccessTime 2 ns + 12.2 ns (regs),
863 * WEOffTime = WEOnTime + 1 ns,
864 * REOffTime = REOnTime + 12 ns (regs),
865 * CSOffTime = REOffTime + 1 ns
866 * ReadCycle = 2ns + 2*SYSCLK (regs),
867 * WriteCycle = 2*SYSCLK + 2 ns,
868 * CSPulseWidth = 10 ns */
870 systim = 1000000000 / (sysclk / 1000);
871 dev_dbg(blizzard.fbdev->dev,
872 "Blizzard systim %lu ps extif_clk_period %u div %d\n",
873 systim, blizzard.extif_clk_period, div);
875 t = &blizzard.reg_timings;
876 memset(t, 0, sizeof(*t));
881 t->we_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
882 t->re_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
883 t->access_time = round_to_extif_ticks(t->re_on_time + 12200, div);
884 t->we_off_time = round_to_extif_ticks(t->we_on_time + 1000, div);
885 t->re_off_time = round_to_extif_ticks(t->re_on_time + 13000, div);
886 t->cs_off_time = round_to_extif_ticks(t->re_off_time + 1000, div);
887 t->we_cycle_time = round_to_extif_ticks(2 * systim + 2000, div);
888 if (t->we_cycle_time < t->we_off_time)
889 t->we_cycle_time = t->we_off_time;
890 t->re_cycle_time = round_to_extif_ticks(2 * systim + 2000, div);
891 if (t->re_cycle_time < t->re_off_time)
892 t->re_cycle_time = t->re_off_time;
893 t->cs_pulse_width = 0;
895 dev_dbg(blizzard.fbdev->dev, "[reg]cson %d csoff %d reon %d reoff %d\n",
896 t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time);
897 dev_dbg(blizzard.fbdev->dev, "[reg]weon %d weoff %d recyc %d wecyc %d\n",
898 t->we_on_time, t->we_off_time, t->re_cycle_time,
900 dev_dbg(blizzard.fbdev->dev, "[reg]rdaccess %d cspulse %d\n",
901 t->access_time, t->cs_pulse_width);
903 return blizzard.extif->convert_timings(t);
906 static int calc_lut_timing(unsigned long sysclk, int div)
908 struct extif_timings *t;
909 unsigned long systim;
911 /* CSOnTime 0, WEOnTime 2 ns, REOnTime 2 ns,
912 * AccessTime 2 ns + 4 * SYSCLK + 26 (lut),
913 * WEOffTime = WEOnTime + 1 ns,
914 * REOffTime = REOnTime + 4*SYSCLK + 26 ns (lut),
915 * CSOffTime = REOffTime + 1 ns
916 * ReadCycle = 2ns + 4*SYSCLK + 26 ns (lut),
917 * WriteCycle = 2*SYSCLK + 2 ns,
918 * CSPulseWidth = 10 ns */
920 systim = 1000000000 / (sysclk / 1000);
921 dev_dbg(blizzard.fbdev->dev,
922 "Blizzard systim %lu ps extif_clk_period %u div %d\n",
923 systim, blizzard.extif_clk_period, div);
925 t = &blizzard.lut_timings;
926 memset(t, 0, sizeof(*t));
931 t->we_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
932 t->re_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
933 t->access_time = round_to_extif_ticks(t->re_on_time + 4 * systim +
935 t->we_off_time = round_to_extif_ticks(t->we_on_time + 1000, div);
936 t->re_off_time = round_to_extif_ticks(t->re_on_time + 4 * systim +
938 t->cs_off_time = round_to_extif_ticks(t->re_off_time + 1000, div);
939 t->we_cycle_time = round_to_extif_ticks(2 * systim + 2000, div);
940 if (t->we_cycle_time < t->we_off_time)
941 t->we_cycle_time = t->we_off_time;
942 t->re_cycle_time = round_to_extif_ticks(2000 + 4 * systim + 26000, div);
943 if (t->re_cycle_time < t->re_off_time)
944 t->re_cycle_time = t->re_off_time;
945 t->cs_pulse_width = 0;
947 dev_dbg(blizzard.fbdev->dev,
948 "[lut]cson %d csoff %d reon %d reoff %d\n",
949 t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time);
950 dev_dbg(blizzard.fbdev->dev,
951 "[lut]weon %d weoff %d recyc %d wecyc %d\n",
952 t->we_on_time, t->we_off_time, t->re_cycle_time,
954 dev_dbg(blizzard.fbdev->dev, "[lut]rdaccess %d cspulse %d\n",
955 t->access_time, t->cs_pulse_width);
957 return blizzard.extif->convert_timings(t);
960 static int calc_extif_timings(unsigned long sysclk, int *extif_mem_div)
965 blizzard.extif->get_clk_info(&blizzard.extif_clk_period, &max_clk_div);
966 for (div = 1; div <= max_clk_div; div++) {
967 if (calc_reg_timing(sysclk, div) == 0)
970 if (div > max_clk_div) {
971 dev_dbg(blizzard.fbdev->dev, "reg timing failed\n");
974 *extif_mem_div = div;
976 for (div = 1; div <= max_clk_div; div++) {
977 if (calc_lut_timing(sysclk, div) == 0)
981 if (div > max_clk_div)
984 blizzard.extif_clk_div = div;
988 dev_err(blizzard.fbdev->dev, "can't setup timings\n");
992 static void calc_blizzard_clk_rates(unsigned long ext_clk,
993 unsigned long *sys_clk, unsigned long *pix_clk)
996 int sys_div = 0, sys_mul = 0;
999 pix_clk_src = blizzard_read_reg(BLIZZARD_CLK_SRC);
1000 pix_div = ((pix_clk_src >> 3) & 0x1f) + 1;
1001 if ((pix_clk_src & (0x3 << 1)) == 0) {
1002 /* Source is the PLL */
1003 sys_div = (blizzard_read_reg(BLIZZARD_PLL_DIV) & 0x3f) + 1;
1004 sys_mul = blizzard_read_reg(BLIZZARD_PLL_CLOCK_SYNTH_0);
1005 sys_mul |= ((blizzard_read_reg(BLIZZARD_PLL_CLOCK_SYNTH_1)
1007 *sys_clk = ext_clk * sys_mul / sys_div;
1008 } else /* else source is ext clk, or oscillator */
1011 *pix_clk = *sys_clk / pix_div; /* HZ */
1012 dev_dbg(blizzard.fbdev->dev,
1013 "ext_clk %ld pix_src %d pix_div %d sys_div %d sys_mul %d\n",
1014 ext_clk, pix_clk_src & (0x3 << 1), pix_div, sys_div, sys_mul);
1015 dev_dbg(blizzard.fbdev->dev, "sys_clk %ld pix_clk %ld\n",
1016 *sys_clk, *pix_clk);
1019 static int setup_tearsync(unsigned long pix_clk, int extif_div)
1025 int hs_pol_inv, vs_pol_inv;
1026 int use_hsvs, use_ndp;
1029 hsw = blizzard_read_reg(BLIZZARD_HSW);
1030 vsw = blizzard_read_reg(BLIZZARD_VSW);
1031 hs_pol_inv = !(hsw & 0x80);
1032 vs_pol_inv = !(vsw & 0x80);
1036 hdisp = blizzard_read_reg(BLIZZARD_HDISP) * 8;
1037 vdisp = blizzard_read_reg(BLIZZARD_VDISP0) +
1038 ((blizzard_read_reg(BLIZZARD_VDISP1) & 0x3) << 8);
1040 hndp = blizzard_read_reg(BLIZZARD_HNDP) & 0x3f;
1041 vndp = blizzard_read_reg(BLIZZARD_VNDP);
1043 /* time to transfer one pixel (16bpp) in ps */
1044 blizzard.pix_tx_time = blizzard.reg_timings.we_cycle_time;
1045 if (blizzard.extif->get_max_tx_rate != NULL) {
1046 /* The external interface might have a rate limitation,
1047 * if so, we have to maximize our transfer rate.
1049 unsigned long min_tx_time;
1050 unsigned long max_tx_rate = blizzard.extif->get_max_tx_rate();
1052 dev_dbg(blizzard.fbdev->dev, "max_tx_rate %ld HZ\n",
1054 min_tx_time = 1000000000 / (max_tx_rate / 1000); /* ps */
1055 if (blizzard.pix_tx_time < min_tx_time)
1056 blizzard.pix_tx_time = min_tx_time;
1059 /* time to update one line in ps */
1060 blizzard.line_upd_time = (hdisp + hndp) * 1000000 / (pix_clk / 1000);
1061 blizzard.line_upd_time *= 1000;
1062 if (hdisp * blizzard.pix_tx_time > blizzard.line_upd_time)
1063 /* transfer speed too low, we might have to use both
1067 /* decent transfer speed, we'll always use only VS */
1070 if (use_hsvs && (hs_pol_inv || vs_pol_inv)) {
1071 /* HS or'ed with VS doesn't work, use the active high
1072 * TE signal based on HNDP / VNDP */
1079 /* Use HS or'ed with VS as a TE signal if both are needed
1080 * or VNDP if only vsync is needed. */
1090 hs = hs * 1000000 / (pix_clk / 1000); /* ps */
1093 vs = vs * (hdisp + hndp) * 1000000 / (pix_clk / 1000); /* ps */
1098 /* set VS to 120% of HS to minimize VS detection time */
1100 /* minimize HS too */
1104 b = blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS);
1106 b |= use_hsvs ? 1 : 0;
1107 b |= (use_ndp && use_hsvs) ? 0 : 2;
1108 blizzard_write_reg(BLIZZARD_NDISP_CTRL_STATUS, b);
1110 blizzard.vsync_only = !use_hsvs;
1112 dev_dbg(blizzard.fbdev->dev,
1113 "pix_clk %ld HZ pix_tx_time %ld ps line_upd_time %ld ps\n",
1114 pix_clk, blizzard.pix_tx_time, blizzard.line_upd_time);
1115 dev_dbg(blizzard.fbdev->dev,
1116 "hs %d ps vs %d ps mode %d vsync_only %d\n",
1117 hs, vs, b & 0x3, !use_hsvs);
1119 return blizzard.extif->setup_tearsync(1, hs, vs,
1120 hs_pol_inv, vs_pol_inv,
1124 static unsigned long blizzard_get_caps(void)
1128 caps = OMAPFB_CAPS_MANUAL_UPDATE;
1129 if (blizzard.te_connected)
1130 caps |= OMAPFB_CAPS_TEARSYNC;
1134 static void blizzard_suspend(void)
1139 blizzard.update_mode_before_suspend = blizzard.update_mode;
1140 /* the following will disable clocks as well */
1141 blizzard_set_update_mode(OMAPFB_UPDATE_DISABLED);
1143 blizzard_stop_sdram();
1145 l = blizzard_read_reg(BLIZZARD_POWER_SAVE);
1146 /* Standby, Sleep. We assume we use an external clock. */
1148 blizzard_write_reg(BLIZZARD_POWER_SAVE, l);
1150 tmo = jiffies + msecs_to_jiffies(100);
1151 while (!(blizzard_read_reg(BLIZZARD_PLL_MODE) & (1 << 1))) {
1152 if (time_after(jiffies, tmo)) {
1153 dev_err(blizzard.fbdev->dev,
1154 "s1d1374x: sleep timeout, stopping PLL manually\n");
1155 l = blizzard_read_reg(BLIZZARD_PLL_MODE);
1157 /* Disable PLL, counter function */
1159 blizzard_write_reg(BLIZZARD_PLL_MODE, l);
1165 if (blizzard.power_down != NULL)
1166 blizzard.power_down(blizzard.fbdev->dev);
1169 static void blizzard_resume(void)
1173 if (blizzard.power_up != NULL)
1174 blizzard.power_up(blizzard.fbdev->dev);
1176 l = blizzard_read_reg(BLIZZARD_POWER_SAVE);
1177 /* Standby, Sleep */
1179 blizzard_write_reg(BLIZZARD_POWER_SAVE, l);
1181 l = blizzard_read_reg(BLIZZARD_PLL_MODE);
1183 /* Enable PLL, counter function */
1185 blizzard_write_reg(BLIZZARD_PLL_MODE, l);
1187 while (!(blizzard_read_reg(BLIZZARD_PLL_DIV) & (1 << 7)))
1189 blizzard_restart_sdram();
1190 /* Enable display */
1191 blizzard_write_reg(BLIZZARD_DISPLAY_MODE, 0x01);
1193 /* the following will enable clocks as necessary */
1194 blizzard_set_update_mode(blizzard.update_mode_before_suspend);
1197 static int blizzard_init(struct omapfb_device *fbdev, int ext_mode,
1198 struct omapfb_mem_desc *req_vram)
1202 unsigned long ext_clk;
1204 unsigned long sys_clk, pix_clk;
1205 struct omapfb_platform_data *omapfb_conf;
1206 struct blizzard_platform_data *ctrl_conf;
1208 blizzard.fbdev = fbdev;
1210 BUG_ON(!fbdev->ext_if || !fbdev->int_ctrl);
1212 blizzard.fbdev = fbdev;
1213 blizzard.extif = fbdev->ext_if;
1214 blizzard.int_ctrl = fbdev->int_ctrl;
1216 omapfb_conf = fbdev->dev->platform_data;
1217 ctrl_conf = omapfb_conf->ctrl_platform_data;
1218 if (ctrl_conf == NULL || ctrl_conf->get_clock_rate == NULL) {
1219 dev_err(fbdev->dev, "s1d1374x: missing platform data\n");
1224 blizzard.power_down = ctrl_conf->power_down;
1225 blizzard.power_up = ctrl_conf->power_up;
1227 spin_lock_init(&blizzard.req_lock);
1229 if ((r = blizzard.int_ctrl->init(fbdev, 1, req_vram)) < 0)
1232 if ((r = blizzard.extif->init(fbdev)) < 0)
1235 blizzard_ctrl.set_color_key = blizzard.int_ctrl->set_color_key;
1236 blizzard_ctrl.get_color_key = blizzard.int_ctrl->get_color_key;
1238 ext_clk = ctrl_conf->get_clock_rate(fbdev->dev);
1239 if ((r = calc_extif_timings(ext_clk, &extif_div)) < 0)
1242 set_extif_timings(&blizzard.reg_timings);
1244 if (blizzard.power_up != NULL)
1245 blizzard.power_up(fbdev->dev);
1247 calc_blizzard_clk_rates(ext_clk, &sys_clk, &pix_clk);
1249 if ((r = calc_extif_timings(sys_clk, &extif_div)) < 0)
1251 set_extif_timings(&blizzard.reg_timings);
1253 if (!(blizzard_read_reg(BLIZZARD_PLL_DIV) & 0x80)) {
1255 "controller not initialized by the bootloader\n");
1260 if (ctrl_conf->te_connected) {
1261 if ((r = setup_tearsync(pix_clk, extif_div)) < 0)
1263 blizzard.te_connected = 1;
1266 rev = blizzard_read_reg(BLIZZARD_REV_CODE);
1267 conf = blizzard_read_reg(BLIZZARD_CONFIG);
1269 switch (rev & 0xfc) {
1271 blizzard.version = BLIZZARD_VERSION_S1D13744;
1272 pr_info("omapfb: s1d13744 LCD controller rev %d "
1273 "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07);
1276 blizzard.version = BLIZZARD_VERSION_S1D13745;
1277 pr_info("omapfb: s1d13745 LCD controller rev %d "
1278 "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07);
1281 dev_err(fbdev->dev, "invalid s1d1374x revision %02x\n",
1287 blizzard.max_transmit_size = blizzard.extif->max_transmit_size;
1289 blizzard.update_mode = OMAPFB_UPDATE_DISABLED;
1291 blizzard.auto_update_window.x = 0;
1292 blizzard.auto_update_window.y = 0;
1293 blizzard.auto_update_window.width = fbdev->panel->x_res;
1294 blizzard.auto_update_window.height = fbdev->panel->y_res;
1295 blizzard.auto_update_window.format = 0;
1297 blizzard.screen_width = fbdev->panel->x_res;
1298 blizzard.screen_height = fbdev->panel->y_res;
1300 init_timer(&blizzard.auto_update_timer);
1301 blizzard.auto_update_timer.function = blizzard_update_window_auto;
1302 blizzard.auto_update_timer.data = 0;
1304 INIT_LIST_HEAD(&blizzard.free_req_list);
1305 INIT_LIST_HEAD(&blizzard.pending_req_list);
1306 for (i = 0; i < ARRAY_SIZE(blizzard.req_pool); i++)
1307 list_add(&blizzard.req_pool[i].entry, &blizzard.free_req_list);
1308 BUG_ON(i <= IRQ_REQ_POOL_SIZE);
1309 sema_init(&blizzard.req_sema, i - IRQ_REQ_POOL_SIZE);
1313 if (blizzard.power_down != NULL)
1314 blizzard.power_down(fbdev->dev);
1315 blizzard.extif->cleanup();
1317 blizzard.int_ctrl->cleanup();
1322 static void blizzard_cleanup(void)
1324 blizzard_set_update_mode(OMAPFB_UPDATE_DISABLED);
1325 blizzard.extif->cleanup();
1326 blizzard.int_ctrl->cleanup();
1327 if (blizzard.power_down != NULL)
1328 blizzard.power_down(blizzard.fbdev->dev);
1331 struct lcd_ctrl blizzard_ctrl = {
1333 .init = blizzard_init,
1334 .cleanup = blizzard_cleanup,
1335 .bind_client = blizzard_bind_client,
1336 .get_caps = blizzard_get_caps,
1337 .set_update_mode = blizzard_set_update_mode,
1338 .get_update_mode = blizzard_get_update_mode,
1339 .setup_plane = blizzard_setup_plane,
1340 .set_scale = blizzard_set_scale,
1341 .enable_plane = blizzard_enable_plane,
1342 .update_window = blizzard_update_window_async,
1343 .sync = blizzard_sync,
1344 .suspend = blizzard_suspend,
1345 .resume = blizzard_resume,