2 * File: drivers/video/omap/blizzard.c
4 * Epson Blizzard LCD controller driver
6 * Copyright (C) 2004-2005 Nokia Corporation
7 * Authors: Juha Yrjola <juha.yrjola@nokia.com>
8 * Imre Deak <imre.deak@nokia.com>
9 * YUV support: Jussi Laako <jussi.laako@nokia.com>
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
25 #include <linux/module.h>
28 #include <linux/delay.h>
29 #include <linux/clk.h>
31 #include <asm/arch/dma.h>
32 #include <asm/arch/omapfb.h>
33 #include <asm/arch/blizzard.h>
37 #define MODULE_NAME "blizzard"
39 #define BLIZZARD_REV_CODE 0x00
40 #define BLIZZARD_CONFIG 0x02
41 #define BLIZZARD_PLL_DIV 0x04
42 #define BLIZZARD_PLL_LOCK_RANGE 0x06
43 #define BLIZZARD_PLL_CLOCK_SYNTH_0 0x08
44 #define BLIZZARD_PLL_CLOCK_SYNTH_1 0x0a
45 #define BLIZZARD_PLL_MODE 0x0c
46 #define BLIZZARD_CLK_SRC 0x0e
47 #define BLIZZARD_MEM_BANK0_ACTIVATE 0x10
48 #define BLIZZARD_MEM_BANK0_STATUS 0x14
49 #define BLIZZARD_HDISP 0x2a
50 #define BLIZZARD_HNDP 0x2c
51 #define BLIZZARD_VDISP0 0x2e
52 #define BLIZZARD_VDISP1 0x30
53 #define BLIZZARD_VNDP 0x32
54 #define BLIZZARD_HSW 0x34
55 #define BLIZZARD_VSW 0x38
56 #define BLIZZARD_DISPLAY_MODE 0x68
57 #define BLIZZARD_INPUT_WIN_X_START_0 0x6c
58 #define BLIZZARD_DATA_SOURCE_SELECT 0x8e
59 #define BLIZZARD_DISP_MEM_DATA_PORT 0x90
60 #define BLIZZARD_DISP_MEM_READ_ADDR0 0x92
61 #define BLIZZARD_POWER_SAVE 0xE6
62 #define BLIZZARD_NDISP_CTRL_STATUS 0xE8
64 /* Data source select */
66 #define BLIZZARD_SRC_WRITE_LCD_BACKGROUND 0x00
67 #define BLIZZARD_SRC_WRITE_LCD_DESTRUCTIVE 0x01
68 #define BLIZZARD_SRC_WRITE_OVERLAY_ENABLE 0x04
69 #define BLIZZARD_SRC_DISABLE_OVERLAY 0x05
71 #define BLIZZARD_SRC_WRITE_LCD 0x00
72 #define BLIZZARD_SRC_BLT_LCD 0x06
74 #define BLIZZARD_COLOR_RGB565 0x01
75 #define BLIZZARD_COLOR_YUV420 0x09
77 #define BLIZZARD_VERSION_S1D13745 0x01 /* Hailstorm */
78 #define BLIZZARD_VERSION_S1D13744 0x02 /* Blizzard */
80 #define BLIZZARD_AUTO_UPDATE_TIME (HZ / 20)
82 /* Reserve 4 request slots for requests in irq context */
83 #define REQ_POOL_SIZE 24
84 #define IRQ_REQ_POOL_SIZE 4
86 #define REQ_FROM_IRQ_POOL 0x01
88 #define REQ_COMPLETE 0
91 struct blizzard_reg_list {
96 /* These need to be saved / restored separately from the rest. */
97 static struct blizzard_reg_list blizzard_pll_regs[] = {
99 .start = 0x04, /* Don't save PLL ctrl (0x0C) */
103 .start = 0x0e, /* Clock configuration */
108 static struct blizzard_reg_list blizzard_gen_regs[] = {
110 .start = 0x18, /* SDRAM control */
114 .start = 0x28, /* LCD Panel configuration */
115 .end = 0x5a, /* HSSI interface, TV configuration */
119 static u8 blizzard_reg_cache[0x5a / 2];
121 struct update_param {
123 int x, y, width, height;
125 int out_width, out_height;
131 struct blizzard_request {
132 struct list_head entry;
135 int (*handler)(struct blizzard_request *req);
136 void (*complete)(void *data);
140 struct update_param update;
141 struct completion *sync;
146 unsigned long offset;
149 int out_width, out_height;
155 struct blizzard_struct {
156 enum omapfb_update_mode update_mode;
157 enum omapfb_update_mode update_mode_before_suspend;
159 struct timer_list auto_update_timer;
160 int stop_auto_update;
161 struct omapfb_update_window auto_update_window;
163 int vid_nonstd_color;
169 unsigned te_connected:1;
170 unsigned vsync_only:1;
172 struct plane_info plane[OMAPFB_PLANE_NUM];
174 struct blizzard_request req_pool[REQ_POOL_SIZE];
175 struct list_head pending_req_list;
176 struct list_head free_req_list;
177 struct semaphore req_sema;
180 unsigned long sys_ck_rate;
181 struct extif_timings reg_timings, lut_timings;
183 u32 max_transmit_size;
184 u32 extif_clk_period;
186 unsigned long pix_tx_time;
187 unsigned long line_upd_time;
189 struct omapfb_device *fbdev;
190 struct lcd_ctrl_extif *extif;
191 struct lcd_ctrl *int_ctrl;
193 void (*power_up)(struct device *dev);
194 void (*power_down)(struct device *dev);
199 struct lcd_ctrl blizzard_ctrl;
201 static u8 blizzard_read_reg(u8 reg)
205 blizzard.extif->set_bits_per_cycle(8);
206 blizzard.extif->write_command(®, 1);
207 blizzard.extif->read_data(&data, 1);
212 static void blizzard_write_reg(u8 reg, u8 val)
214 blizzard.extif->set_bits_per_cycle(8);
215 blizzard.extif->write_command(®, 1);
216 blizzard.extif->write_data(&val, 1);
219 static void blizzard_restart_sdram(void)
223 blizzard_write_reg(BLIZZARD_MEM_BANK0_ACTIVATE, 0);
225 blizzard_write_reg(BLIZZARD_MEM_BANK0_ACTIVATE, 1);
226 tmo = jiffies + msecs_to_jiffies(200);
227 while (!(blizzard_read_reg(BLIZZARD_MEM_BANK0_STATUS) & 0x01)) {
228 if (time_after(jiffies, tmo)) {
229 dev_err(blizzard.fbdev->dev,
230 "s1d1374x: SDRAM not ready");
237 static void blizzard_stop_sdram(void)
239 blizzard_write_reg(BLIZZARD_MEM_BANK0_ACTIVATE, 0);
242 /* Wait until the last window was completely written into the controllers
243 * SDRAM and we can start transferring the next window.
245 static void blizzard_wait_line_buffer(void)
247 unsigned long tmo = jiffies + msecs_to_jiffies(30);
249 while (blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS) & (1 << 7)) {
250 if (time_after(jiffies, tmo)) {
251 if (printk_ratelimit())
252 dev_err(blizzard.fbdev->dev,
253 "s1d1374x: line buffer not ready\n");
259 /* Wait until the YYC color space converter is idle. */
260 static void blizzard_wait_yyc(void)
262 unsigned long tmo = jiffies + msecs_to_jiffies(30);
264 while (blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS) & (1 << 4)) {
265 if (time_after(jiffies, tmo)) {
266 if (printk_ratelimit())
267 dev_err(blizzard.fbdev->dev,
268 "s1d1374x: YYC not ready\n");
274 static void disable_overlay(void)
276 blizzard_write_reg(BLIZZARD_DATA_SOURCE_SELECT,
277 BLIZZARD_SRC_DISABLE_OVERLAY);
280 static void set_window_regs(int x_start, int y_start, int x_end, int y_end,
281 int x_out_start, int y_out_start,
282 int x_out_end, int y_out_end, int color_mode,
283 int zoom_off, int flags)
291 tmp[1] = x_start >> 8;
293 tmp[3] = y_start >> 8;
301 tmp[8] = x_out_start;
302 tmp[9] = x_out_start >> 8;
303 tmp[10] = y_out_start;
304 tmp[11] = y_out_start >> 8;
306 tmp[13] = x_out_end >> 8;
308 tmp[15] = y_out_end >> 8;
310 tmp[16] = color_mode;
311 if (zoom_off && blizzard.version == BLIZZARD_VERSION_S1D13745)
312 tmp[17] = BLIZZARD_SRC_WRITE_LCD_BACKGROUND;
313 else if (flags & OMAPFB_FORMAT_FLAG_ENABLE_OVERLAY)
314 tmp[17] = BLIZZARD_SRC_WRITE_OVERLAY_ENABLE;
316 tmp[17] = blizzard.version == BLIZZARD_VERSION_S1D13744 ?
317 BLIZZARD_SRC_WRITE_LCD :
318 BLIZZARD_SRC_WRITE_LCD_DESTRUCTIVE;
320 blizzard.extif->set_bits_per_cycle(8);
321 cmd = BLIZZARD_INPUT_WIN_X_START_0;
322 blizzard.extif->write_command(&cmd, 1);
323 blizzard.extif->write_data(tmp, 18);
326 static void enable_tearsync(int y, int width, int height, int screen_height,
327 int out_height, int force_vsync)
331 b = blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS);
333 blizzard_write_reg(BLIZZARD_NDISP_CTRL_STATUS, b);
335 if (likely(blizzard.vsync_only || force_vsync)) {
336 blizzard.extif->enable_tearsync(1, 0);
340 if (width * blizzard.pix_tx_time < blizzard.line_upd_time) {
341 blizzard.extif->enable_tearsync(1, 0);
345 if ((width * blizzard.pix_tx_time / 1000) * height <
346 (y + out_height) * (blizzard.line_upd_time / 1000)) {
347 blizzard.extif->enable_tearsync(1, 0);
351 blizzard.extif->enable_tearsync(1, y + 1);
354 static void disable_tearsync(void)
358 blizzard.extif->enable_tearsync(0, 0);
359 b = blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS);
361 blizzard_write_reg(BLIZZARD_NDISP_CTRL_STATUS, b);
362 b = blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS);
365 static inline void set_extif_timings(const struct extif_timings *t);
367 static inline struct blizzard_request *alloc_req(void)
370 struct blizzard_request *req;
374 down(&blizzard.req_sema);
376 req_flags = REQ_FROM_IRQ_POOL;
378 spin_lock_irqsave(&blizzard.req_lock, flags);
379 BUG_ON(list_empty(&blizzard.free_req_list));
380 req = list_entry(blizzard.free_req_list.next,
381 struct blizzard_request, entry);
382 list_del(&req->entry);
383 spin_unlock_irqrestore(&blizzard.req_lock, flags);
385 INIT_LIST_HEAD(&req->entry);
386 req->flags = req_flags;
391 static inline void free_req(struct blizzard_request *req)
395 spin_lock_irqsave(&blizzard.req_lock, flags);
397 list_del(&req->entry);
398 list_add(&req->entry, &blizzard.free_req_list);
399 if (!(req->flags & REQ_FROM_IRQ_POOL))
400 up(&blizzard.req_sema);
402 spin_unlock_irqrestore(&blizzard.req_lock, flags);
405 static void process_pending_requests(void)
409 spin_lock_irqsave(&blizzard.req_lock, flags);
411 while (!list_empty(&blizzard.pending_req_list)) {
412 struct blizzard_request *req;
413 void (*complete)(void *);
416 req = list_entry(blizzard.pending_req_list.next,
417 struct blizzard_request, entry);
418 spin_unlock_irqrestore(&blizzard.req_lock, flags);
420 if (req->handler(req) == REQ_PENDING)
423 complete = req->complete;
424 complete_data = req->complete_data;
428 complete(complete_data);
430 spin_lock_irqsave(&blizzard.req_lock, flags);
433 spin_unlock_irqrestore(&blizzard.req_lock, flags);
436 static void submit_req_list(struct list_head *head)
441 spin_lock_irqsave(&blizzard.req_lock, flags);
442 if (likely(!list_empty(&blizzard.pending_req_list)))
444 list_splice_init(head, blizzard.pending_req_list.prev);
445 spin_unlock_irqrestore(&blizzard.req_lock, flags);
448 process_pending_requests();
451 static void request_complete(void *data)
453 struct blizzard_request *req = (struct blizzard_request *)data;
454 void (*complete)(void *);
457 complete = req->complete;
458 complete_data = req->complete_data;
463 complete(complete_data);
465 process_pending_requests();
469 static int do_full_screen_update(struct blizzard_request *req)
474 for (i = 0; i < 3; i++) {
475 struct plane_info *p = &blizzard.plane[i];
476 if (!(blizzard.enabled_planes & (1 << i))) {
477 blizzard.int_ctrl->enable_plane(i, 0);
480 dev_dbg(blizzard.fbdev->dev, "pw %d ph %d\n",
481 p->width, p->height);
482 blizzard.int_ctrl->setup_plane(i,
483 OMAPFB_CHANNEL_OUT_LCD, p->offset,
484 p->scr_width, p->pos_x, p->pos_y,
487 blizzard.int_ctrl->enable_plane(i, 1);
490 dev_dbg(blizzard.fbdev->dev, "sw %d sh %d\n",
491 blizzard.screen_width, blizzard.screen_height);
492 blizzard_wait_line_buffer();
493 flags = req->par.update.flags;
494 if (flags & OMAPFB_FORMAT_FLAG_TEARSYNC)
495 enable_tearsync(0, blizzard.screen_width,
496 blizzard.screen_height,
497 blizzard.screen_height,
498 blizzard.screen_height,
499 flags & OMAPFB_FORMAT_FLAG_FORCE_VSYNC);
503 set_window_regs(0, 0, blizzard.screen_width, blizzard.screen_height,
504 0, 0, blizzard.screen_width, blizzard.screen_height,
505 BLIZZARD_COLOR_RGB565, blizzard.zoom_on, flags);
506 blizzard.zoom_on = 0;
508 blizzard.extif->set_bits_per_cycle(16);
509 /* set_window_regs has left the register index at the right
510 * place, so no need to set it here.
512 blizzard.extif->transfer_area(blizzard.screen_width,
513 blizzard.screen_height,
514 request_complete, req);
518 /* Setup all planes with an overlapping area with the update window. */
519 static int do_partial_update(struct blizzard_request *req, int plane,
520 int x, int y, int w, int h,
521 int x_out, int y_out, int w_out, int h_out,
522 int wnd_color_mode, int bpp)
525 int gx1, gy1, gx2, gy2;
526 int gx1_out, gy1_out, gx2_out, gy2_out;
531 /* Global coordinates, relative to pixel 0,0 of the LCD */
532 gx1 = x + blizzard.plane[plane].pos_x;
533 gy1 = y + blizzard.plane[plane].pos_y;
537 flags = req->par.update.flags;
538 if (flags & OMAPFB_FORMAT_FLAG_DOUBLE) {
541 gx2_out = gx1 + w * 2;
542 gy2_out = gy1 + h * 2;
544 gx1_out = x_out + blizzard.plane[plane].pos_x;
545 gy1_out = y_out + blizzard.plane[plane].pos_y;
546 gx2_out = gx1_out + w_out;
547 gy2_out = gy1_out + h_out;
549 zoom_off = blizzard.zoom_on && gx1 == 0 && gy1 == 0 &&
550 w == blizzard.screen_width && h == blizzard.screen_height;
551 blizzard.zoom_on = (!zoom_off && blizzard.zoom_on) ||
552 (w < w_out || h < h_out);
554 for (i = 0; i < OMAPFB_PLANE_NUM; i++) {
555 struct plane_info *p = &blizzard.plane[i];
560 unsigned long offset;
562 if (!(blizzard.enabled_planes & (1 << i)) ||
563 (wnd_color_mode && i != plane)) {
564 blizzard.int_ctrl->enable_plane(i, 0);
567 /* Plane coordinates */
569 /* Plane in which we are doing the update.
570 * Local coordinates are the one in the update
580 /* Check if this plane has an overlapping part */
581 px1 = gx1 - p->pos_x;
582 py1 = gy1 - p->pos_y;
583 px2 = gx2 - p->pos_x;
584 py2 = gy2 - p->pos_y;
585 if (px1 >= p->width || py1 >= p->height ||
586 px2 <= 0 || py2 <= 0) {
587 blizzard.int_ctrl->enable_plane(i, 0);
590 /* Calculate the coordinates for the overlapping
591 * part in the plane's local coordinates.
610 offset = p->offset + (p->scr_width * py1 + px1) * p->bpp / 8;
612 /* Window embedded in the plane with a differing
613 * color mode / bpp. Calculate the number of DMA
614 * transfer elements in terms of the plane's bpp.
616 pw = (pw + 1) * bpp / p->bpp;
618 dev_dbg(blizzard.fbdev->dev,
619 "plane %d offset %#08lx pposx %d pposy %d "
620 "px1 %d py1 %d pw %d ph %d\n",
621 i, offset, pposx, pposy, px1, py1, pw, ph);
623 blizzard.int_ctrl->setup_plane(i,
624 OMAPFB_CHANNEL_OUT_LCD, offset,
626 pposx, pposy, pw, ph,
629 blizzard.int_ctrl->enable_plane(i, 1);
632 switch (wnd_color_mode) {
633 case OMAPFB_COLOR_YUV420:
634 color_mode = BLIZZARD_COLOR_YUV420;
635 /* Currently only the 16 bits/pixel cycle format is
636 * supported on the external interface. Adjust the number
637 * of transfer elements per line for 12bpp format.
642 color_mode = BLIZZARD_COLOR_RGB565;
646 blizzard_wait_line_buffer();
647 if (blizzard.last_color_mode == BLIZZARD_COLOR_YUV420)
649 blizzard.last_color_mode = color_mode;
650 if (flags & OMAPFB_FORMAT_FLAG_TEARSYNC)
651 enable_tearsync(gy1, w, h,
652 blizzard.screen_height,
654 flags & OMAPFB_FORMAT_FLAG_FORCE_VSYNC);
658 set_window_regs(gx1, gy1, gx2, gy2, gx1_out, gy1_out, gx2_out, gy2_out,
659 color_mode, zoom_off, flags);
661 blizzard.extif->set_bits_per_cycle(16);
662 /* set_window_regs has left the register index at the right
663 * place, so no need to set it here.
665 blizzard.extif->transfer_area(w, h, request_complete, req);
670 static int send_frame_handler(struct blizzard_request *req)
672 struct update_param *par = &req->par.update;
673 int plane = par->plane;
676 dev_dbg(blizzard.fbdev->dev,
677 "send_frame: x %d y %d w %d h %d "
678 "x_out %d y_out %d w_out %d h_out %d "
679 "color_mode %04x flags %04x planes %01x\n",
680 par->x, par->y, par->width, par->height,
681 par->out_x, par->out_y, par->out_width, par->out_height,
682 par->color_mode, par->flags, blizzard.enabled_planes);
684 if (par->flags & OMAPFB_FORMAT_FLAG_DISABLE_OVERLAY)
687 if ((blizzard.enabled_planes & blizzard.vid_nonstd_color) ||
688 (blizzard.enabled_planes & blizzard.vid_scaled))
689 return do_full_screen_update(req);
691 return do_partial_update(req, plane, par->x, par->y,
692 par->width, par->height,
693 par->out_x, par->out_y,
694 par->out_width, par->out_height,
695 par->color_mode, par->bpp);
698 static void send_frame_complete(void *data)
702 #define ADD_PREQ(_x, _y, _w, _h, _x_out, _y_out, _w_out, _h_out) do { \
704 req->handler = send_frame_handler; \
705 req->complete = send_frame_complete; \
706 req->par.update.plane = plane_idx; \
707 req->par.update.x = _x; \
708 req->par.update.y = _y; \
709 req->par.update.width = _w; \
710 req->par.update.height = _h; \
711 req->par.update.out_x = _x_out; \
712 req->par.update.out_y = _y_out; \
713 req->par.update.out_width = _w_out; \
714 req->par.update.out_height = _h_out; \
715 req->par.update.bpp = bpp; \
716 req->par.update.color_mode = color_mode;\
717 req->par.update.flags = flags; \
718 list_add_tail(&req->entry, req_head); \
721 static void create_req_list(int plane_idx,
722 struct omapfb_update_window *win,
723 struct list_head *req_head)
725 struct blizzard_request *req;
728 int width = win->width;
729 int height = win->height;
730 int x_out = win->out_x;
731 int y_out = win->out_y;
732 int width_out = win->out_width;
733 int height_out = win->out_height;
737 unsigned int ystart = y;
738 unsigned int yspan = height;
739 unsigned int ystart_out = y_out;
740 unsigned int yspan_out = height_out;
742 flags = win->format & ~OMAPFB_FORMAT_MASK;
743 color_mode = win->format & OMAPFB_FORMAT_MASK;
744 switch (color_mode) {
745 case OMAPFB_COLOR_YUV420:
746 /* Embedded window with different color mode */
748 /* X, Y, height must be aligned at 2, width at 4 pixels */
751 height = yspan = height & ~1;
755 /* Same as the plane color mode */
756 bpp = blizzard.plane[plane_idx].bpp;
759 if (width * height * bpp / 8 > blizzard.max_transmit_size) {
760 yspan = blizzard.max_transmit_size / (width * bpp / 8);
761 yspan_out = yspan * height_out / height;
762 ADD_PREQ(x, ystart, width, yspan, x_out, ystart_out,
763 width_out, yspan_out);
765 ystart_out += yspan_out;
766 yspan = height - yspan;
767 yspan_out = height_out - yspan_out;
768 flags &= ~OMAPFB_FORMAT_FLAG_TEARSYNC;
771 ADD_PREQ(x, ystart, width, yspan, x_out, ystart_out,
772 width_out, yspan_out);
775 static void auto_update_complete(void *data)
777 if (!blizzard.stop_auto_update)
778 mod_timer(&blizzard.auto_update_timer,
779 jiffies + BLIZZARD_AUTO_UPDATE_TIME);
782 static void blizzard_update_window_auto(unsigned long arg)
785 struct blizzard_request *last;
786 struct omapfb_plane_struct *plane;
788 plane = blizzard.fbdev->fb_info[0]->par;
789 create_req_list(plane->idx,
790 &blizzard.auto_update_window, &req_list);
791 last = list_entry(req_list.prev, struct blizzard_request, entry);
793 last->complete = auto_update_complete;
794 last->complete_data = NULL;
796 submit_req_list(&req_list);
799 int blizzard_update_window_async(struct fb_info *fbi,
800 struct omapfb_update_window *win,
801 void (*complete_callback)(void *arg),
802 void *complete_callback_data)
805 struct blizzard_request *last;
806 struct omapfb_plane_struct *plane = fbi->par;
808 if (unlikely(blizzard.update_mode != OMAPFB_MANUAL_UPDATE))
810 if (unlikely(!blizzard.te_connected &&
811 (win->format & OMAPFB_FORMAT_FLAG_TEARSYNC)))
814 create_req_list(plane->idx, win, &req_list);
815 last = list_entry(req_list.prev, struct blizzard_request, entry);
817 last->complete = complete_callback;
818 last->complete_data = (void *)complete_callback_data;
820 submit_req_list(&req_list);
824 EXPORT_SYMBOL(blizzard_update_window_async);
826 static int update_full_screen(void)
828 return blizzard_update_window_async(blizzard.fbdev->fb_info[0],
829 &blizzard.auto_update_window, NULL, NULL);
833 static int blizzard_setup_plane(int plane, int channel_out,
834 unsigned long offset, int screen_width,
835 int pos_x, int pos_y, int width, int height,
838 struct plane_info *p;
841 dev_dbg(blizzard.fbdev->dev,
842 "plane %d ch_out %d offset %#08lx scr_width %d "
843 "pos_x %d pos_y %d width %d height %d color_mode %d\n",
844 plane, channel_out, offset, screen_width,
845 pos_x, pos_y, width, height, color_mode);
847 if ((unsigned)plane > OMAPFB_PLANE_NUM)
849 p = &blizzard.plane[plane];
851 switch (color_mode) {
852 case OMAPFB_COLOR_YUV422:
853 case OMAPFB_COLOR_YUY422:
855 blizzard.vid_nonstd_color &= ~(1 << plane);
857 case OMAPFB_COLOR_YUV420:
859 blizzard.vid_nonstd_color |= 1 << plane;
861 case OMAPFB_COLOR_RGB565:
863 blizzard.vid_nonstd_color &= ~(1 << plane);
874 p->scr_width = screen_width;
876 p->out_width = width;
878 p->out_height = height;
880 p->color_mode = color_mode;
885 static int blizzard_set_scale(int plane, int orig_w, int orig_h,
886 int out_w, int out_h)
888 struct plane_info *p = &blizzard.plane[plane];
891 dev_dbg(blizzard.fbdev->dev,
892 "plane %d orig_w %d orig_h %d out_w %d out_h %d\n",
893 plane, orig_w, orig_h, out_w, out_h);
894 if ((unsigned)plane > OMAPFB_PLANE_NUM)
897 r = blizzard.int_ctrl->set_scale(plane, orig_w, orig_h, out_w, out_h);
903 p->out_width = out_w;
904 p->out_height = out_h;
905 if (orig_w == out_w && orig_h == out_h)
906 blizzard.vid_scaled &= ~(1 << plane);
908 blizzard.vid_scaled |= 1 << plane;
913 static int blizzard_enable_plane(int plane, int enable)
916 blizzard.enabled_planes |= 1 << plane;
918 blizzard.enabled_planes &= ~(1 << plane);
923 static int sync_handler(struct blizzard_request *req)
925 complete(req->par.sync);
929 static void blizzard_sync(void)
932 struct blizzard_request *req;
933 struct completion comp;
937 req->handler = sync_handler;
938 req->complete = NULL;
939 init_completion(&comp);
940 req->par.sync = ∁
942 list_add(&req->entry, &req_list);
943 submit_req_list(&req_list);
945 wait_for_completion(&comp);
949 static void blizzard_bind_client(struct omapfb_notifier_block *nb)
951 if (blizzard.update_mode == OMAPFB_MANUAL_UPDATE) {
952 omapfb_notify_clients(blizzard.fbdev, OMAPFB_EVENT_READY);
956 static int blizzard_set_update_mode(enum omapfb_update_mode mode)
958 if (unlikely(mode != OMAPFB_MANUAL_UPDATE &&
959 mode != OMAPFB_AUTO_UPDATE &&
960 mode != OMAPFB_UPDATE_DISABLED))
963 if (mode == blizzard.update_mode)
966 dev_info(blizzard.fbdev->dev, "s1d1374x: setting update mode to %s\n",
967 mode == OMAPFB_UPDATE_DISABLED ? "disabled" :
968 (mode == OMAPFB_AUTO_UPDATE ? "auto" : "manual"));
970 switch (blizzard.update_mode) {
971 case OMAPFB_MANUAL_UPDATE:
972 omapfb_notify_clients(blizzard.fbdev, OMAPFB_EVENT_DISABLED);
974 case OMAPFB_AUTO_UPDATE:
975 blizzard.stop_auto_update = 1;
976 del_timer_sync(&blizzard.auto_update_timer);
978 case OMAPFB_UPDATE_DISABLED:
982 blizzard.update_mode = mode;
984 blizzard.stop_auto_update = 0;
987 case OMAPFB_MANUAL_UPDATE:
988 omapfb_notify_clients(blizzard.fbdev, OMAPFB_EVENT_READY);
990 case OMAPFB_AUTO_UPDATE:
991 blizzard_update_window_auto(0);
993 case OMAPFB_UPDATE_DISABLED:
1000 static enum omapfb_update_mode blizzard_get_update_mode(void)
1002 return blizzard.update_mode;
1005 static inline void set_extif_timings(const struct extif_timings *t)
1007 blizzard.extif->set_timings(t);
1010 static inline unsigned long round_to_extif_ticks(unsigned long ps, int div)
1012 int bus_tick = blizzard.extif_clk_period * div;
1013 return (ps + bus_tick - 1) / bus_tick * bus_tick;
1016 static int calc_reg_timing(unsigned long sysclk, int div)
1018 struct extif_timings *t;
1019 unsigned long systim;
1021 /* CSOnTime 0, WEOnTime 2 ns, REOnTime 2 ns,
1022 * AccessTime 2 ns + 12.2 ns (regs),
1023 * WEOffTime = WEOnTime + 1 ns,
1024 * REOffTime = REOnTime + 12 ns (regs),
1025 * CSOffTime = REOffTime + 1 ns
1026 * ReadCycle = 2ns + 2*SYSCLK (regs),
1027 * WriteCycle = 2*SYSCLK + 2 ns,
1028 * CSPulseWidth = 10 ns */
1030 systim = 1000000000 / (sysclk / 1000);
1031 dev_dbg(blizzard.fbdev->dev,
1032 "Blizzard systim %lu ps extif_clk_period %u div %d\n",
1033 systim, blizzard.extif_clk_period, div);
1035 t = &blizzard.reg_timings;
1036 memset(t, 0, sizeof(*t));
1041 t->we_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
1042 t->re_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
1043 t->access_time = round_to_extif_ticks(t->re_on_time + 12200, div);
1044 t->we_off_time = round_to_extif_ticks(t->we_on_time + 1000, div);
1045 t->re_off_time = round_to_extif_ticks(t->re_on_time + 13000, div);
1046 t->cs_off_time = round_to_extif_ticks(t->re_off_time + 1000, div);
1047 t->we_cycle_time = round_to_extif_ticks(2 * systim + 2000, div);
1048 if (t->we_cycle_time < t->we_off_time)
1049 t->we_cycle_time = t->we_off_time;
1050 t->re_cycle_time = round_to_extif_ticks(2 * systim + 2000, div);
1051 if (t->re_cycle_time < t->re_off_time)
1052 t->re_cycle_time = t->re_off_time;
1053 t->cs_pulse_width = 0;
1055 dev_dbg(blizzard.fbdev->dev, "[reg]cson %d csoff %d reon %d reoff %d\n",
1056 t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time);
1057 dev_dbg(blizzard.fbdev->dev, "[reg]weon %d weoff %d recyc %d wecyc %d\n",
1058 t->we_on_time, t->we_off_time, t->re_cycle_time,
1060 dev_dbg(blizzard.fbdev->dev, "[reg]rdaccess %d cspulse %d\n",
1061 t->access_time, t->cs_pulse_width);
1063 return blizzard.extif->convert_timings(t);
1066 static int calc_lut_timing(unsigned long sysclk, int div)
1068 struct extif_timings *t;
1069 unsigned long systim;
1071 /* CSOnTime 0, WEOnTime 2 ns, REOnTime 2 ns,
1072 * AccessTime 2 ns + 4 * SYSCLK + 26 (lut),
1073 * WEOffTime = WEOnTime + 1 ns,
1074 * REOffTime = REOnTime + 4*SYSCLK + 26 ns (lut),
1075 * CSOffTime = REOffTime + 1 ns
1076 * ReadCycle = 2ns + 4*SYSCLK + 26 ns (lut),
1077 * WriteCycle = 2*SYSCLK + 2 ns,
1078 * CSPulseWidth = 10 ns */
1080 systim = 1000000000 / (sysclk / 1000);
1081 dev_dbg(blizzard.fbdev->dev,
1082 "Blizzard systim %lu ps extif_clk_period %u div %d\n",
1083 systim, blizzard.extif_clk_period, div);
1085 t = &blizzard.lut_timings;
1086 memset(t, 0, sizeof(*t));
1091 t->we_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
1092 t->re_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
1093 t->access_time = round_to_extif_ticks(t->re_on_time + 4 * systim +
1095 t->we_off_time = round_to_extif_ticks(t->we_on_time + 1000, div);
1096 t->re_off_time = round_to_extif_ticks(t->re_on_time + 4 * systim +
1098 t->cs_off_time = round_to_extif_ticks(t->re_off_time + 1000, div);
1099 t->we_cycle_time = round_to_extif_ticks(2 * systim + 2000, div);
1100 if (t->we_cycle_time < t->we_off_time)
1101 t->we_cycle_time = t->we_off_time;
1102 t->re_cycle_time = round_to_extif_ticks(2000 + 4 * systim + 26000, div);
1103 if (t->re_cycle_time < t->re_off_time)
1104 t->re_cycle_time = t->re_off_time;
1105 t->cs_pulse_width = 0;
1107 dev_dbg(blizzard.fbdev->dev,
1108 "[lut]cson %d csoff %d reon %d reoff %d\n",
1109 t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time);
1110 dev_dbg(blizzard.fbdev->dev,
1111 "[lut]weon %d weoff %d recyc %d wecyc %d\n",
1112 t->we_on_time, t->we_off_time, t->re_cycle_time,
1114 dev_dbg(blizzard.fbdev->dev, "[lut]rdaccess %d cspulse %d\n",
1115 t->access_time, t->cs_pulse_width);
1117 return blizzard.extif->convert_timings(t);
1120 static int calc_extif_timings(unsigned long sysclk, int *extif_mem_div)
1125 blizzard.extif->get_clk_info(&blizzard.extif_clk_period, &max_clk_div);
1126 for (div = 1; div <= max_clk_div; div++) {
1127 if (calc_reg_timing(sysclk, div) == 0)
1130 if (div > max_clk_div) {
1131 dev_dbg(blizzard.fbdev->dev, "reg timing failed\n");
1134 *extif_mem_div = div;
1136 for (div = 1; div <= max_clk_div; div++) {
1137 if (calc_lut_timing(sysclk, div) == 0)
1141 if (div > max_clk_div)
1144 blizzard.extif_clk_div = div;
1148 dev_err(blizzard.fbdev->dev, "can't setup timings\n");
1152 static void calc_blizzard_clk_rates(unsigned long ext_clk,
1153 unsigned long *sys_clk, unsigned long *pix_clk)
1156 int sys_div = 0, sys_mul = 0;
1159 pix_clk_src = blizzard_read_reg(BLIZZARD_CLK_SRC);
1160 pix_div = ((pix_clk_src >> 3) & 0x1f) + 1;
1161 if ((pix_clk_src & (0x3 << 1)) == 0) {
1162 /* Source is the PLL */
1163 sys_div = (blizzard_read_reg(BLIZZARD_PLL_DIV) & 0x3f) + 1;
1164 sys_mul = blizzard_read_reg(BLIZZARD_PLL_CLOCK_SYNTH_0);
1165 sys_mul |= ((blizzard_read_reg(BLIZZARD_PLL_CLOCK_SYNTH_1)
1167 *sys_clk = ext_clk * sys_mul / sys_div;
1168 } else /* else source is ext clk, or oscillator */
1171 *pix_clk = *sys_clk / pix_div; /* HZ */
1172 dev_dbg(blizzard.fbdev->dev,
1173 "ext_clk %ld pix_src %d pix_div %d sys_div %d sys_mul %d\n",
1174 ext_clk, pix_clk_src & (0x3 << 1), pix_div, sys_div, sys_mul);
1175 dev_dbg(blizzard.fbdev->dev, "sys_clk %ld pix_clk %ld\n",
1176 *sys_clk, *pix_clk);
1179 static int setup_tearsync(unsigned long pix_clk, int extif_div)
1185 int hs_pol_inv, vs_pol_inv;
1186 int use_hsvs, use_ndp;
1189 hsw = blizzard_read_reg(BLIZZARD_HSW);
1190 vsw = blizzard_read_reg(BLIZZARD_VSW);
1191 hs_pol_inv = !(hsw & 0x80);
1192 vs_pol_inv = !(vsw & 0x80);
1196 hdisp = blizzard_read_reg(BLIZZARD_HDISP) * 8;
1197 vdisp = blizzard_read_reg(BLIZZARD_VDISP0) +
1198 ((blizzard_read_reg(BLIZZARD_VDISP1) & 0x3) << 8);
1200 hndp = blizzard_read_reg(BLIZZARD_HNDP) & 0x3f;
1201 vndp = blizzard_read_reg(BLIZZARD_VNDP);
1203 /* time to transfer one pixel (16bpp) in ps */
1204 blizzard.pix_tx_time = blizzard.reg_timings.we_cycle_time;
1205 if (blizzard.extif->get_max_tx_rate != NULL) {
1206 /* The external interface might have a rate limitation,
1207 * if so, we have to maximize our transfer rate.
1209 unsigned long min_tx_time;
1210 unsigned long max_tx_rate = blizzard.extif->get_max_tx_rate();
1212 dev_dbg(blizzard.fbdev->dev, "max_tx_rate %ld HZ\n",
1214 min_tx_time = 1000000000 / (max_tx_rate / 1000); /* ps */
1215 if (blizzard.pix_tx_time < min_tx_time)
1216 blizzard.pix_tx_time = min_tx_time;
1219 /* time to update one line in ps */
1220 blizzard.line_upd_time = (hdisp + hndp) * 1000000 / (pix_clk / 1000);
1221 blizzard.line_upd_time *= 1000;
1222 if (hdisp * blizzard.pix_tx_time > blizzard.line_upd_time)
1223 /* transfer speed too low, we might have to use both
1227 /* decent transfer speed, we'll always use only VS */
1230 if (use_hsvs && (hs_pol_inv || vs_pol_inv)) {
1231 /* HS or'ed with VS doesn't work, use the active high
1232 * TE signal based on HNDP / VNDP */
1239 /* Use HS or'ed with VS as a TE signal if both are needed
1240 * or VNDP if only vsync is needed. */
1250 hs = hs * 1000000 / (pix_clk / 1000); /* ps */
1253 vs = vs * (hdisp + hndp) * 1000000 / (pix_clk / 1000); /* ps */
1258 /* set VS to 120% of HS to minimize VS detection time */
1260 /* minimize HS too */
1264 b = blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS);
1266 b |= use_hsvs ? 1 : 0;
1267 b |= (use_ndp && use_hsvs) ? 0 : 2;
1268 blizzard_write_reg(BLIZZARD_NDISP_CTRL_STATUS, b);
1270 blizzard.vsync_only = !use_hsvs;
1272 dev_dbg(blizzard.fbdev->dev,
1273 "pix_clk %ld HZ pix_tx_time %ld ps line_upd_time %ld ps\n",
1274 pix_clk, blizzard.pix_tx_time, blizzard.line_upd_time);
1275 dev_dbg(blizzard.fbdev->dev,
1276 "hs %d ps vs %d ps mode %d vsync_only %d\n",
1277 hs, vs, b & 0x3, !use_hsvs);
1279 return blizzard.extif->setup_tearsync(1, hs, vs,
1280 hs_pol_inv, vs_pol_inv,
1284 static void blizzard_get_caps(int plane, struct omapfb_caps *caps)
1286 blizzard.int_ctrl->get_caps(plane, caps);
1287 caps->ctrl |= OMAPFB_CAPS_MANUAL_UPDATE |
1288 OMAPFB_CAPS_WINDOW_PIXEL_DOUBLE |
1289 OMAPFB_CAPS_WINDOW_SCALE |
1290 OMAPFB_CAPS_WINDOW_OVERLAY;
1291 if (blizzard.te_connected)
1292 caps->ctrl |= OMAPFB_CAPS_TEARSYNC;
1293 caps->wnd_color |= (1 << OMAPFB_COLOR_RGB565) |
1294 (1 << OMAPFB_COLOR_YUV420);
1297 static void _save_regs(struct blizzard_reg_list *list, int cnt)
1301 for (i = 0; i < cnt; i++, list++) {
1303 for (reg = list->start; reg <= list->end; reg += 2)
1304 blizzard_reg_cache[reg / 2] = blizzard_read_reg(reg);
1308 static void _restore_regs(struct blizzard_reg_list *list, int cnt)
1312 for (i = 0; i < cnt; i++, list++) {
1314 for (reg = list->start; reg <= list->end; reg += 2)
1315 blizzard_write_reg(reg, blizzard_reg_cache[reg / 2]);
1319 static void blizzard_save_all_regs(void)
1321 _save_regs(blizzard_pll_regs, ARRAY_SIZE(blizzard_pll_regs));
1322 _save_regs(blizzard_gen_regs, ARRAY_SIZE(blizzard_gen_regs));
1325 static void blizzard_restore_pll_regs(void)
1327 _restore_regs(blizzard_pll_regs, ARRAY_SIZE(blizzard_pll_regs));
1330 static void blizzard_restore_gen_regs(void)
1332 _restore_regs(blizzard_gen_regs, ARRAY_SIZE(blizzard_gen_regs));
1335 static void blizzard_suspend(void)
1340 if (blizzard.last_color_mode) {
1341 update_full_screen();
1344 blizzard.update_mode_before_suspend = blizzard.update_mode;
1345 /* the following will disable clocks as well */
1346 blizzard_set_update_mode(OMAPFB_UPDATE_DISABLED);
1348 blizzard_save_all_regs();
1350 blizzard_stop_sdram();
1352 l = blizzard_read_reg(BLIZZARD_POWER_SAVE);
1353 /* Standby, Sleep. We assume we use an external clock. */
1355 blizzard_write_reg(BLIZZARD_POWER_SAVE, l);
1357 tmo = jiffies + msecs_to_jiffies(100);
1358 while (!(blizzard_read_reg(BLIZZARD_PLL_MODE) & (1 << 1))) {
1359 if (time_after(jiffies, tmo)) {
1360 dev_err(blizzard.fbdev->dev,
1361 "s1d1374x: sleep timeout, stopping PLL manually\n");
1362 l = blizzard_read_reg(BLIZZARD_PLL_MODE);
1364 /* Disable PLL, counter function */
1366 blizzard_write_reg(BLIZZARD_PLL_MODE, l);
1372 if (blizzard.power_down != NULL)
1373 blizzard.power_down(blizzard.fbdev->dev);
1376 static void blizzard_resume(void)
1380 if (blizzard.power_up != NULL)
1381 blizzard.power_up(blizzard.fbdev->dev);
1383 l = blizzard_read_reg(BLIZZARD_POWER_SAVE);
1384 /* Standby, Sleep */
1386 blizzard_write_reg(BLIZZARD_POWER_SAVE, l);
1388 blizzard_restore_pll_regs();
1389 l = blizzard_read_reg(BLIZZARD_PLL_MODE);
1391 /* Enable PLL, counter function */
1393 blizzard_write_reg(BLIZZARD_PLL_MODE, l);
1395 while (!(blizzard_read_reg(BLIZZARD_PLL_DIV) & (1 << 7)))
1398 blizzard_restart_sdram();
1400 blizzard_restore_gen_regs();
1402 /* Enable display */
1403 blizzard_write_reg(BLIZZARD_DISPLAY_MODE, 0x01);
1405 /* the following will enable clocks as necessary */
1406 blizzard_set_update_mode(blizzard.update_mode_before_suspend);
1408 /* Force a background update */
1409 blizzard.zoom_on = 1;
1410 update_full_screen();
1414 static int blizzard_init(struct omapfb_device *fbdev, int ext_mode,
1415 struct omapfb_mem_desc *req_vram)
1419 unsigned long ext_clk;
1421 unsigned long sys_clk, pix_clk;
1422 struct omapfb_platform_data *omapfb_conf;
1423 struct blizzard_platform_data *ctrl_conf;
1425 blizzard.fbdev = fbdev;
1427 BUG_ON(!fbdev->ext_if || !fbdev->int_ctrl);
1429 blizzard.fbdev = fbdev;
1430 blizzard.extif = fbdev->ext_if;
1431 blizzard.int_ctrl = fbdev->int_ctrl;
1433 omapfb_conf = fbdev->dev->platform_data;
1434 ctrl_conf = omapfb_conf->ctrl_platform_data;
1435 if (ctrl_conf == NULL || ctrl_conf->get_clock_rate == NULL) {
1436 dev_err(fbdev->dev, "s1d1374x: missing platform data\n");
1441 blizzard.power_down = ctrl_conf->power_down;
1442 blizzard.power_up = ctrl_conf->power_up;
1444 spin_lock_init(&blizzard.req_lock);
1446 if ((r = blizzard.int_ctrl->init(fbdev, 1, req_vram)) < 0)
1449 if ((r = blizzard.extif->init(fbdev)) < 0)
1452 blizzard_ctrl.set_color_key = blizzard.int_ctrl->set_color_key;
1453 blizzard_ctrl.get_color_key = blizzard.int_ctrl->get_color_key;
1454 blizzard_ctrl.setup_mem = blizzard.int_ctrl->setup_mem;
1455 blizzard_ctrl.mmap = blizzard.int_ctrl->mmap;
1457 ext_clk = ctrl_conf->get_clock_rate(fbdev->dev);
1458 if ((r = calc_extif_timings(ext_clk, &extif_div)) < 0)
1461 set_extif_timings(&blizzard.reg_timings);
1463 if (blizzard.power_up != NULL)
1464 blizzard.power_up(fbdev->dev);
1466 calc_blizzard_clk_rates(ext_clk, &sys_clk, &pix_clk);
1468 if ((r = calc_extif_timings(sys_clk, &extif_div)) < 0)
1470 set_extif_timings(&blizzard.reg_timings);
1472 if (!(blizzard_read_reg(BLIZZARD_PLL_DIV) & 0x80)) {
1474 "controller not initialized by the bootloader\n");
1479 if (ctrl_conf->te_connected) {
1480 if ((r = setup_tearsync(pix_clk, extif_div)) < 0)
1482 blizzard.te_connected = 1;
1485 rev = blizzard_read_reg(BLIZZARD_REV_CODE);
1486 conf = blizzard_read_reg(BLIZZARD_CONFIG);
1488 switch (rev & 0xfc) {
1490 blizzard.version = BLIZZARD_VERSION_S1D13744;
1491 pr_info("omapfb: s1d13744 LCD controller rev %d "
1492 "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07);
1495 blizzard.version = BLIZZARD_VERSION_S1D13745;
1496 pr_info("omapfb: s1d13745 LCD controller rev %d "
1497 "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07);
1500 dev_err(fbdev->dev, "invalid s1d1374x revision %02x\n",
1506 blizzard.max_transmit_size = blizzard.extif->max_transmit_size;
1508 blizzard.update_mode = OMAPFB_UPDATE_DISABLED;
1510 blizzard.auto_update_window.x = 0;
1511 blizzard.auto_update_window.y = 0;
1512 blizzard.auto_update_window.width = fbdev->panel->x_res;
1513 blizzard.auto_update_window.height = fbdev->panel->y_res;
1514 blizzard.auto_update_window.out_x = 0;
1515 blizzard.auto_update_window.out_x = 0;
1516 blizzard.auto_update_window.out_width = fbdev->panel->x_res;
1517 blizzard.auto_update_window.out_height = fbdev->panel->y_res;
1518 blizzard.auto_update_window.format = 0;
1520 blizzard.screen_width = fbdev->panel->x_res;
1521 blizzard.screen_height = fbdev->panel->y_res;
1523 init_timer(&blizzard.auto_update_timer);
1524 blizzard.auto_update_timer.function = blizzard_update_window_auto;
1525 blizzard.auto_update_timer.data = 0;
1527 INIT_LIST_HEAD(&blizzard.free_req_list);
1528 INIT_LIST_HEAD(&blizzard.pending_req_list);
1529 for (i = 0; i < ARRAY_SIZE(blizzard.req_pool); i++)
1530 list_add(&blizzard.req_pool[i].entry, &blizzard.free_req_list);
1531 BUG_ON(i <= IRQ_REQ_POOL_SIZE);
1532 sema_init(&blizzard.req_sema, i - IRQ_REQ_POOL_SIZE);
1536 if (blizzard.power_down != NULL)
1537 blizzard.power_down(fbdev->dev);
1538 blizzard.extif->cleanup();
1540 blizzard.int_ctrl->cleanup();
1545 static void blizzard_cleanup(void)
1547 blizzard_set_update_mode(OMAPFB_UPDATE_DISABLED);
1548 blizzard.extif->cleanup();
1549 blizzard.int_ctrl->cleanup();
1550 if (blizzard.power_down != NULL)
1551 blizzard.power_down(blizzard.fbdev->dev);
1554 struct lcd_ctrl blizzard_ctrl = {
1556 .init = blizzard_init,
1557 .cleanup = blizzard_cleanup,
1558 .bind_client = blizzard_bind_client,
1559 .get_caps = blizzard_get_caps,
1560 .set_update_mode = blizzard_set_update_mode,
1561 .get_update_mode = blizzard_get_update_mode,
1562 .setup_plane = blizzard_setup_plane,
1563 .set_scale = blizzard_set_scale,
1564 .enable_plane = blizzard_enable_plane,
1565 .update_window = blizzard_update_window_async,
1566 .sync = blizzard_sync,
1567 .suspend = blizzard_suspend,
1568 .resume = blizzard_resume,