drivers/video/neofb.c

   1 /*
   2  * linux/drivers/video/neofb.c -- NeoMagic Framebuffer Driver
   3  *
   4  * Copyright (c) 2001-2002  Denis Oliver Kropp <dok@directfb.org>
   5  *
   6  *
   7  * Card specific code is based on XFree86's neomagic driver.
   8  * Framebuffer framework code is based on code of cyber2000fb.
   9  *
  10  * This file is subject to the terms and conditions of the GNU General
  11  * Public License.  See the file COPYING in the main directory of this
  12  * archive for more details.
  13  *
  14  *
  15  * 0.4.1
  16  *  - Cosmetic changes (dok)
  17  *
  18  * 0.4
  19  *  - Toshiba Libretto support, allow modes larger than LCD size if
  20  *    LCD is disabled, keep BIOS settings if internal/external display
  21  *    haven't been enabled explicitly
  22  *                          (Thomas J. Moore <dark@mama.indstate.edu>)
  23  *
  24  * 0.3.3
  25  *  - Porting over to new fbdev api. (jsimmons)
  26  *
  27  * 0.3.2
  28  *  - got rid of all floating point (dok)
  29  *
  30  * 0.3.1
  31  *  - added module license (dok)
  32  *
  33  * 0.3
  34  *  - hardware accelerated clear and move for 2200 and above (dok)
  35  *  - maximum allowed dotclock is handled now (dok)
  36  *
  37  * 0.2.1
  38  *  - correct panning after X usage (dok)
  39  *  - added module and kernel parameters (dok)
  40  *  - no stretching if external display is enabled (dok)
  41  *
  42  * 0.2
  43  *  - initial version (dok)
  44  *
  45  *
  46  * TODO
  47  * - ioctl for internal/external switching
  48  * - blanking
  49  * - 32bit depth support, maybe impossible
  50  * - disable pan-on-sync, need specs
  51  *
  52  * BUGS
  53  * - white margin on bootup like with tdfxfb (colormap problem?)
  54  *
  55  */
  56
  57 #include <linux/module.h>
  58 #include <linux/kernel.h>
  59 #include <linux/errno.h>
  60 #include <linux/string.h>
  61 #include <linux/mm.h>
  62 #include <linux/slab.h>
  63 #include <linux/delay.h>
  64 #include <linux/fb.h>
  65 #include <linux/pci.h>
  66 #include <linux/init.h>
  67 #ifdef CONFIG_TOSHIBA
  68 #include <linux/toshiba.h>
  69 #endif
  70
  71 #include <asm/io.h>
  72 #include <asm/irq.h>
  73 #include <asm/pgtable.h>
  74 #include <asm/system.h>
  75
  76 #ifdef CONFIG_MTRR
  77 #include <asm/mtrr.h>
  78 #endif
  79
  80 #include <video/vga.h>
  81 #include <video/neomagic.h>
  82
  83 #define NEOFB_VERSION "0.4.2"
  84
  85 /* --------------------------------------------------------------------- */
  86
  87 static int internal;
  88 static int external;
  89 static int libretto;
  90 static int nostretch;
  91 static int nopciburst;
  92 static char *mode_option __devinitdata = NULL;
  93
  94 #ifdef MODULE
  95
  96 MODULE_AUTHOR("(c) 2001-2002  Denis Oliver Kropp <dok@convergence.de>");
  97 MODULE_LICENSE("GPL");
  98 MODULE_DESCRIPTION("FBDev driver for NeoMagic PCI Chips");
  99 module_param(internal, bool, 0);
 100 MODULE_PARM_DESC(internal, "Enable output on internal LCD Display.");
 101 module_param(external, bool, 0);
 102 MODULE_PARM_DESC(external, "Enable output on external CRT.");
 103 module_param(libretto, bool, 0);
 104 MODULE_PARM_DESC(libretto, "Force Libretto 100/110 800x480 LCD.");
 105 module_param(nostretch, bool, 0);
 106 MODULE_PARM_DESC(nostretch,
 107                  "Disable stretching of modes smaller than LCD.");
 108 module_param(nopciburst, bool, 0);
 109 MODULE_PARM_DESC(nopciburst, "Disable PCI burst mode.");
 110 module_param(mode_option, charp, 0);
 111 MODULE_PARM_DESC(mode_option, "Preferred video mode ('640x480-8@60', etc)");
 112
 113 #endif
 114
 115
 116 /* --------------------------------------------------------------------- */
 117
 118 static biosMode bios8[] = {
 119         {320, 240, 0x40},
 120         {300, 400, 0x42},
 121         {640, 400, 0x20},
 122         {640, 480, 0x21},
 123         {800, 600, 0x23},
 124         {1024, 768, 0x25},
 125 };
 126
 127 static biosMode bios16[] = {
 128         {320, 200, 0x2e},
 129         {320, 240, 0x41},
 130         {300, 400, 0x43},
 131         {640, 480, 0x31},
 132         {800, 600, 0x34},
 133         {1024, 768, 0x37},
 134 };
 135
 136 static biosMode bios24[] = {
 137         {640, 480, 0x32},
 138         {800, 600, 0x35},
 139         {1024, 768, 0x38}
 140 };
 141
 142 #ifdef NO_32BIT_SUPPORT_YET
 143 /* FIXME: guessed values, wrong */
 144 static biosMode bios32[] = {
 145         {640, 480, 0x33},
 146         {800, 600, 0x36},
 147         {1024, 768, 0x39}
 148 };
 149 #endif
 150
 151 static inline void write_le32(int regindex, u32 val, const struct neofb_par *par)
 152 {
 153         writel(val, par->neo2200 + par->cursorOff + regindex);
 154 }
 155
 156 static int neoFindMode(int xres, int yres, int depth)
 157 {
 158         int xres_s;
 159         int i, size;
 160         biosMode *mode;
 161
 162         switch (depth) {
 163         case 8:
 164                 size = ARRAY_SIZE(bios8);
 165                 mode = bios8;
 166                 break;
 167         case 16:
 168                 size = ARRAY_SIZE(bios16);
 169                 mode = bios16;
 170                 break;
 171         case 24:
 172                 size = ARRAY_SIZE(bios24);
 173                 mode = bios24;
 174                 break;
 175 #ifdef NO_32BIT_SUPPORT_YET
 176         case 32:
 177                 size = ARRAY_SIZE(bios32);
 178                 mode = bios32;
 179                 break;
 180 #endif
 181         default:
 182                 return 0;
 183         }
 184
 185         for (i = 0; i < size; i++) {
 186                 if (xres <= mode[i].x_res) {
 187                         xres_s = mode[i].x_res;
 188                         for (; i < size; i++) {
 189                                 if (mode[i].x_res != xres_s)
 190                                         return mode[i - 1].mode;
 191                                 if (yres <= mode[i].y_res)
 192                                         return mode[i].mode;
 193                         }
 194                 }
 195         }
 196         return mode[size - 1].mode;
 197 }
 198
 199 /*
 200  * neoCalcVCLK --
 201  *
 202  * Determine the closest clock frequency to the one requested.
 203  */
 204 #define MAX_N 127
 205 #define MAX_D 31
 206 #define MAX_F 1
 207
 208 static void neoCalcVCLK(const struct fb_info *info,
 209                         struct neofb_par *par, long freq)
 210 {
 211         int n, d, f;
 212         int n_best = 0, d_best = 0, f_best = 0;
 213         long f_best_diff = 0x7ffff;
 214
 215         for (f = 0; f <= MAX_F; f++)
 216                 for (d = 0; d <= MAX_D; d++)
 217                         for (n = 0; n <= MAX_N; n++) {
 218                                 long f_out;
 219                                 long f_diff;
 220
 221                                 f_out = ((14318 * (n + 1)) / (d + 1)) >> f;
 222                                 f_diff = abs(f_out - freq);
 223                                 if (f_diff <= f_best_diff) {
 224                                         f_best_diff = f_diff;
 225                                         n_best = n;
 226                                         d_best = d;
 227                                         f_best = f;
 228                                 }
 229                                 if (f_out > freq)
 230                                         break;
 231                         }
 232
 233         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
 234             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
 235             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
 236             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
 237                 /* NOT_DONE:  We are trying the full range of the 2200 clock.
 238                    We should be able to try n up to 2047 */
 239                 par->VCLK3NumeratorLow = n_best;
 240                 par->VCLK3NumeratorHigh = (f_best << 7);
 241         } else
 242                 par->VCLK3NumeratorLow = n_best | (f_best << 7);
 243
 244         par->VCLK3Denominator = d_best;
 245
 246 #ifdef NEOFB_DEBUG
 247         printk(KERN_DEBUG "neoVCLK: f:%ld NumLow=%d NumHi=%d Den=%d Df=%ld\n",
 248                freq,
 249                par->VCLK3NumeratorLow,
 250                par->VCLK3NumeratorHigh,
 251                par->VCLK3Denominator, f_best_diff);
 252 #endif
 253 }
 254
 255 /*
 256  * vgaHWInit --
 257  *      Handle the initialization, etc. of a screen.
 258  *      Return FALSE on failure.
 259  */
 260
 261 static int vgaHWInit(const struct fb_var_screeninfo *var,
 262                      const struct fb_info *info,
 263                      struct neofb_par *par, struct xtimings *timings)
 264 {
 265         par->MiscOutReg = 0x23;
 266
 267         if (!(timings->sync & FB_SYNC_HOR_HIGH_ACT))
 268                 par->MiscOutReg |= 0x40;
 269
 270         if (!(timings->sync & FB_SYNC_VERT_HIGH_ACT))
 271                 par->MiscOutReg |= 0x80;
 272
 273         /*
 274          * Time Sequencer
 275          */
 276         par->Sequencer[0] = 0x00;
 277         par->Sequencer[1] = 0x01;
 278         par->Sequencer[2] = 0x0F;
 279         par->Sequencer[3] = 0x00;       /* Font select */
 280         par->Sequencer[4] = 0x0E;       /* Misc */
 281
 282         /*
 283          * CRTC Controller
 284          */
 285         par->CRTC[0] = (timings->HTotal >> 3) - 5;
 286         par->CRTC[1] = (timings->HDisplay >> 3) - 1;
 287         par->CRTC[2] = (timings->HDisplay >> 3) - 1;
 288         par->CRTC[3] = (((timings->HTotal >> 3) - 1) & 0x1F) | 0x80;
 289         par->CRTC[4] = (timings->HSyncStart >> 3);
 290         par->CRTC[5] = ((((timings->HTotal >> 3) - 1) & 0x20) << 2)
 291             | (((timings->HSyncEnd >> 3)) & 0x1F);
 292         par->CRTC[6] = (timings->VTotal - 2) & 0xFF;
 293         par->CRTC[7] = (((timings->VTotal - 2) & 0x100) >> 8)
 294             | (((timings->VDisplay - 1) & 0x100) >> 7)
 295             | ((timings->VSyncStart & 0x100) >> 6)
 296             | (((timings->VDisplay - 1) & 0x100) >> 5)
 297             | 0x10 | (((timings->VTotal - 2) & 0x200) >> 4)
 298             | (((timings->VDisplay - 1) & 0x200) >> 3)
 299             | ((timings->VSyncStart & 0x200) >> 2);
 300         par->CRTC[8] = 0x00;
 301         par->CRTC[9] = (((timings->VDisplay - 1) & 0x200) >> 4) | 0x40;
 302
 303         if (timings->dblscan)
 304                 par->CRTC[9] |= 0x80;
 305
 306         par->CRTC[10] = 0x00;
 307         par->CRTC[11] = 0x00;
 308         par->CRTC[12] = 0x00;
 309         par->CRTC[13] = 0x00;
 310         par->CRTC[14] = 0x00;
 311         par->CRTC[15] = 0x00;
 312         par->CRTC[16] = timings->VSyncStart & 0xFF;
 313         par->CRTC[17] = (timings->VSyncEnd & 0x0F) | 0x20;
 314         par->CRTC[18] = (timings->VDisplay - 1) & 0xFF;
 315         par->CRTC[19] = var->xres_virtual >> 4;
 316         par->CRTC[20] = 0x00;
 317         par->CRTC[21] = (timings->VDisplay - 1) & 0xFF;
 318         par->CRTC[22] = (timings->VTotal - 1) & 0xFF;
 319         par->CRTC[23] = 0xC3;
 320         par->CRTC[24] = 0xFF;
 321
 322         /*
 323          * are these unnecessary?
 324          * vgaHWHBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
 325          * vgaHWVBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
 326          */
 327
 328         /*
 329          * Graphics Display Controller
 330          */
 331         par->Graphics[0] = 0x00;
 332         par->Graphics[1] = 0x00;
 333         par->Graphics[2] = 0x00;
 334         par->Graphics[3] = 0x00;
 335         par->Graphics[4] = 0x00;
 336         par->Graphics[5] = 0x40;
 337         par->Graphics[6] = 0x05;        /* only map 64k VGA memory !!!! */
 338         par->Graphics[7] = 0x0F;
 339         par->Graphics[8] = 0xFF;
 340
 341
 342         par->Attribute[0] = 0x00;       /* standard colormap translation */
 343         par->Attribute[1] = 0x01;
 344         par->Attribute[2] = 0x02;
 345         par->Attribute[3] = 0x03;
 346         par->Attribute[4] = 0x04;
 347         par->Attribute[5] = 0x05;
 348         par->Attribute[6] = 0x06;
 349         par->Attribute[7] = 0x07;
 350         par->Attribute[8] = 0x08;
 351         par->Attribute[9] = 0x09;
 352         par->Attribute[10] = 0x0A;
 353         par->Attribute[11] = 0x0B;
 354         par->Attribute[12] = 0x0C;
 355         par->Attribute[13] = 0x0D;
 356         par->Attribute[14] = 0x0E;
 357         par->Attribute[15] = 0x0F;
 358         par->Attribute[16] = 0x41;
 359         par->Attribute[17] = 0xFF;
 360         par->Attribute[18] = 0x0F;
 361         par->Attribute[19] = 0x00;
 362         par->Attribute[20] = 0x00;
 363         return 0;
 364 }
 365
 366 static void vgaHWLock(struct vgastate *state)
 367 {
 368         /* Protect CRTC[0-7] */
 369         vga_wcrt(state->vgabase, 0x11, vga_rcrt(state->vgabase, 0x11) | 0x80);
 370 }
 371
 372 static void vgaHWUnlock(void)
 373 {
 374         /* Unprotect CRTC[0-7] */
 375         vga_wcrt(NULL, 0x11, vga_rcrt(NULL, 0x11) & ~0x80);
 376 }
 377
 378 static void neoLock(struct vgastate *state)
 379 {
 380         vga_wgfx(state->vgabase, 0x09, 0x00);
 381         vgaHWLock(state);
 382 }
 383
 384 static void neoUnlock(void)
 385 {
 386         vgaHWUnlock();
 387         vga_wgfx(NULL, 0x09, 0x26);
 388 }
 389
 390 /*
 391  * VGA Palette management
 392  */
 393 static int paletteEnabled = 0;
 394
 395 static inline void VGAenablePalette(void)
 396 {
 397         vga_r(NULL, VGA_IS1_RC);
 398         vga_w(NULL, VGA_ATT_W, 0x00);
 399         paletteEnabled = 1;
 400 }
 401
 402 static inline void VGAdisablePalette(void)
 403 {
 404         vga_r(NULL, VGA_IS1_RC);
 405         vga_w(NULL, VGA_ATT_W, 0x20);
 406         paletteEnabled = 0;
 407 }
 408
 409 static inline void VGAwATTR(u8 index, u8 value)
 410 {
 411         if (paletteEnabled)
 412                 index &= ~0x20;
 413         else
 414                 index |= 0x20;
 415
 416         vga_r(NULL, VGA_IS1_RC);
 417         vga_wattr(NULL, index, value);
 418 }
 419
 420 static void vgaHWProtect(int on)
 421 {
 422         unsigned char tmp;
 423
 424         if (on) {
 425                 /*
 426                  * Turn off screen and disable sequencer.
 427                  */
 428                 tmp = vga_rseq(NULL, 0x01);
 429                 vga_wseq(NULL, 0x00, 0x01);             /* Synchronous Reset */
 430                 vga_wseq(NULL, 0x01, tmp | 0x20);       /* disable the display */
 431
 432                 VGAenablePalette();
 433         } else {
 434                 /*
 435                  * Reenable sequencer, then turn on screen.
 436                  */
 437                 tmp = vga_rseq(NULL, 0x01);
 438                 vga_wseq(NULL, 0x01, tmp & ~0x20);      /* reenable display */
 439                 vga_wseq(NULL, 0x00, 0x03);             /* clear synchronousreset */
 440
 441                 VGAdisablePalette();
 442         }
 443 }
 444
 445 static void vgaHWRestore(const struct fb_info *info,
 446                          const struct neofb_par *par)
 447 {
 448         int i;
 449
 450         vga_w(NULL, VGA_MIS_W, par->MiscOutReg);
 451
 452         for (i = 1; i < 5; i++)
 453                 vga_wseq(NULL, i, par->Sequencer[i]);
 454
 455         /* Ensure CRTC registers 0-7 are unlocked by clearing bit 7 or CRTC[17] */
 456         vga_wcrt(NULL, 17, par->CRTC[17] & ~0x80);
 457
 458         for (i = 0; i < 25; i++)
 459                 vga_wcrt(NULL, i, par->CRTC[i]);
 460
 461         for (i = 0; i < 9; i++)
 462                 vga_wgfx(NULL, i, par->Graphics[i]);
 463
 464         VGAenablePalette();
 465
 466         for (i = 0; i < 21; i++)
 467                 VGAwATTR(i, par->Attribute[i]);
 468
 469         VGAdisablePalette();
 470 }
 471
 472
 473 /* -------------------- Hardware specific routines ------------------------- */
 474
 475 /*
 476  * Hardware Acceleration for Neo2200+
 477  */
 478 static inline int neo2200_sync(struct fb_info *info)
 479 {
 480         struct neofb_par *par = info->par;
 481
 482         while (readl(&par->neo2200->bltStat) & 1);
 483         return 0;
 484 }
 485
 486 static inline void neo2200_wait_fifo(struct fb_info *info,
 487                                      int requested_fifo_space)
 488 {
 489         //  ndev->neo.waitfifo_calls++;
 490         //  ndev->neo.waitfifo_sum += requested_fifo_space;
 491
 492         /* FIXME: does not work
 493            if (neo_fifo_space < requested_fifo_space)
 494            {
 495            neo_fifo_waitcycles++;
 496
 497            while (1)
 498            {
 499            neo_fifo_space = (neo2200->bltStat >> 8);
 500            if (neo_fifo_space >= requested_fifo_space)
 501            break;
 502            }
 503            }
 504            else
 505            {
 506            neo_fifo_cache_hits++;
 507            }
 508
 509            neo_fifo_space -= requested_fifo_space;
 510          */
 511
 512         neo2200_sync(info);
 513 }
 514
 515 static inline void neo2200_accel_init(struct fb_info *info,
 516                                       struct fb_var_screeninfo *var)
 517 {
 518         struct neofb_par *par = info->par;
 519         Neo2200 __iomem *neo2200 = par->neo2200;
 520         u32 bltMod, pitch;
 521
 522         neo2200_sync(info);
 523
 524         switch (var->bits_per_pixel) {
 525         case 8:
 526                 bltMod = NEO_MODE1_DEPTH8;
 527                 pitch = var->xres_virtual;
 528                 break;
 529         case 15:
 530         case 16:
 531                 bltMod = NEO_MODE1_DEPTH16;
 532                 pitch = var->xres_virtual * 2;
 533                 break;
 534         case 24:
 535                 bltMod = NEO_MODE1_DEPTH24;
 536                 pitch = var->xres_virtual * 3;
 537                 break;
 538         default:
 539                 printk(KERN_ERR
 540                        "neofb: neo2200_accel_init: unexpected bits per pixel!\n");
 541                 return;
 542         }
 543
 544         writel(bltMod << 16, &neo2200->bltStat);
 545         writel((pitch << 16) | pitch, &neo2200->pitch);
 546 }
 547
 548 /* --------------------------------------------------------------------- */
 549
 550 static int
 551 neofb_open(struct fb_info *info, int user)
 552 {
 553         struct neofb_par *par = info->par;
 554
 555         mutex_lock(&par->open_lock);
 556         if (!par->ref_count) {
 557                 memset(&par->state, 0, sizeof(struct vgastate));
 558                 par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS;
 559                 save_vga(&par->state);
 560         }
 561         par->ref_count++;
 562         mutex_unlock(&par->open_lock);
 563
 564         return 0;
 565 }
 566
 567 static int
 568 neofb_release(struct fb_info *info, int user)
 569 {
 570         struct neofb_par *par = info->par;
 571
 572         mutex_lock(&par->open_lock);
 573         if (!par->ref_count) {
 574                 mutex_unlock(&par->open_lock);
 575                 return -EINVAL;
 576         }
 577         if (par->ref_count == 1) {
 578                 restore_vga(&par->state);
 579         }
 580         par->ref_count--;
 581         mutex_unlock(&par->open_lock);
 582
 583         return 0;
 584 }
 585
 586 static int
 587 neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 588 {
 589         struct neofb_par *par = info->par;
 590         unsigned int pixclock = var->pixclock;
 591         struct xtimings timings;
 592         int memlen, vramlen;
 593         int mode_ok = 0;
 594
 595         DBG("neofb_check_var");
 596
 597         if (!pixclock)
 598                 pixclock = 10000;       /* 10ns = 100MHz */
 599         timings.pixclock = 1000000000 / pixclock;
 600         if (timings.pixclock < 1)
 601                 timings.pixclock = 1;
 602
 603         if (timings.pixclock > par->maxClock)
 604                 return -EINVAL;
 605
 606         timings.dblscan = var->vmode & FB_VMODE_DOUBLE;
 607         timings.interlaced = var->vmode & FB_VMODE_INTERLACED;
 608         timings.HDisplay = var->xres;
 609         timings.HSyncStart = timings.HDisplay + var->right_margin;
 610         timings.HSyncEnd = timings.HSyncStart + var->hsync_len;
 611         timings.HTotal = timings.HSyncEnd + var->left_margin;
 612         timings.VDisplay = var->yres;
 613         timings.VSyncStart = timings.VDisplay + var->lower_margin;
 614         timings.VSyncEnd = timings.VSyncStart + var->vsync_len;
 615         timings.VTotal = timings.VSyncEnd + var->upper_margin;
 616         timings.sync = var->sync;
 617
 618         /* Is the mode larger than the LCD panel? */
 619         if (par->internal_display &&
 620             ((var->xres > par->NeoPanelWidth) ||
 621              (var->yres > par->NeoPanelHeight))) {
 622                 printk(KERN_INFO
 623                        "Mode (%dx%d) larger than the LCD panel (%dx%d)\n",
 624                        var->xres, var->yres, par->NeoPanelWidth,
 625                        par->NeoPanelHeight);
 626                 return -EINVAL;
 627         }
 628
 629         /* Is the mode one of the acceptable sizes? */
 630         if (!par->internal_display)
 631                 mode_ok = 1;
 632         else {
 633                 switch (var->xres) {
 634                 case 1280:
 635                         if (var->yres == 1024)
 636                                 mode_ok = 1;
 637                         break;
 638                 case 1024:
 639                         if (var->yres == 768)
 640                                 mode_ok = 1;
 641                         break;
 642                 case 800:
 643                         if (var->yres == (par->libretto ? 480 : 600))
 644                                 mode_ok = 1;
 645                         break;
 646                 case 640:
 647                         if (var->yres == 480)
 648                                 mode_ok = 1;
 649                         break;
 650                 }
 651         }
 652
 653         if (!mode_ok) {
 654                 printk(KERN_INFO
 655                        "Mode (%dx%d) won't display properly on LCD\n",
 656                        var->xres, var->yres);
 657                 return -EINVAL;
 658         }
 659
 660         var->red.msb_right = 0;
 661         var->green.msb_right = 0;
 662         var->blue.msb_right = 0;
 663         var->transp.msb_right = 0;
 664
 665         switch (var->bits_per_pixel) {
 666         case 8:         /* PSEUDOCOLOUR, 256 */
 667                 var->transp.offset = 0;
 668                 var->transp.length = 0;
 669                 var->red.offset = 0;
 670                 var->red.length = 8;
 671                 var->green.offset = 0;
 672                 var->green.length = 8;
 673                 var->blue.offset = 0;
 674                 var->blue.length = 8;
 675                 break;
 676
 677         case 16:                /* DIRECTCOLOUR, 64k */
 678                 var->transp.offset = 0;
 679                 var->transp.length = 0;
 680                 var->red.offset = 11;
 681                 var->red.length = 5;
 682                 var->green.offset = 5;
 683                 var->green.length = 6;
 684                 var->blue.offset = 0;
 685                 var->blue.length = 5;
 686                 break;
 687
 688         case 24:                /* TRUECOLOUR, 16m */
 689                 var->transp.offset = 0;
 690                 var->transp.length = 0;
 691                 var->red.offset = 16;
 692                 var->red.length = 8;
 693                 var->green.offset = 8;
 694                 var->green.length = 8;
 695                 var->blue.offset = 0;
 696                 var->blue.length = 8;
 697                 break;
 698
 699 #ifdef NO_32BIT_SUPPORT_YET
 700         case 32:                /* TRUECOLOUR, 16m */
 701                 var->transp.offset = 24;
 702                 var->transp.length = 8;
 703                 var->red.offset = 16;
 704                 var->red.length = 8;
 705                 var->green.offset = 8;
 706                 var->green.length = 8;
 707                 var->blue.offset = 0;
 708                 var->blue.length = 8;
 709                 break;
 710 #endif
 711         default:
 712                 printk(KERN_WARNING "neofb: no support for %dbpp\n",
 713                        var->bits_per_pixel);
 714                 return -EINVAL;
 715         }
 716
 717         vramlen = info->fix.smem_len;
 718         if (vramlen > 4 * 1024 * 1024)
 719                 vramlen = 4 * 1024 * 1024;
 720
 721         if (var->yres_virtual < var->yres)
 722                 var->yres_virtual = var->yres;
 723         if (var->xres_virtual < var->xres)
 724                 var->xres_virtual = var->xres;
 725
 726         memlen = var->xres_virtual * var->bits_per_pixel * var->yres_virtual >> 3;
 727
 728         if (memlen > vramlen) {
 729                 var->yres_virtual =  vramlen * 8 / (var->xres_virtual *
 730                                         var->bits_per_pixel);
 731                 memlen = var->xres_virtual * var->bits_per_pixel *
 732                                 var->yres_virtual / 8;
 733         }
 734
 735         /* we must round yres/xres down, we already rounded y/xres_virtual up
 736            if it was possible. We should return -EINVAL, but I disagree */
 737         if (var->yres_virtual < var->yres)
 738                 var->yres = var->yres_virtual;
 739         if (var->xres_virtual < var->xres)
 740                 var->xres = var->xres_virtual;
 741         if (var->xoffset + var->xres > var->xres_virtual)
 742                 var->xoffset = var->xres_virtual - var->xres;
 743         if (var->yoffset + var->yres > var->yres_virtual)
 744                 var->yoffset = var->yres_virtual - var->yres;
 745
 746         var->nonstd = 0;
 747         var->height = -1;
 748         var->width = -1;
 749
 750         if (var->bits_per_pixel >= 24 || !par->neo2200)
 751                 var->accel_flags &= ~FB_ACCELF_TEXT;
 752         return 0;
 753 }
 754
 755 static int neofb_set_par(struct fb_info *info)
 756 {
 757         struct neofb_par *par = info->par;
 758         struct xtimings timings;
 759         unsigned char temp;
 760         int i, clock_hi = 0;
 761         int lcd_stretch;
 762         int hoffset, voffset;
 763
 764         DBG("neofb_set_par");
 765
 766         neoUnlock();
 767
 768         vgaHWProtect(1);        /* Blank the screen */
 769
 770         timings.dblscan = info->var.vmode & FB_VMODE_DOUBLE;
 771         timings.interlaced = info->var.vmode & FB_VMODE_INTERLACED;
 772         timings.HDisplay = info->var.xres;
 773         timings.HSyncStart = timings.HDisplay + info->var.right_margin;
 774         timings.HSyncEnd = timings.HSyncStart + info->var.hsync_len;
 775         timings.HTotal = timings.HSyncEnd + info->var.left_margin;
 776         timings.VDisplay = info->var.yres;
 777         timings.VSyncStart = timings.VDisplay + info->var.lower_margin;
 778         timings.VSyncEnd = timings.VSyncStart + info->var.vsync_len;
 779         timings.VTotal = timings.VSyncEnd + info->var.upper_margin;
 780         timings.sync = info->var.sync;
 781         timings.pixclock = PICOS2KHZ(info->var.pixclock);
 782
 783         if (timings.pixclock < 1)
 784                 timings.pixclock = 1;
 785
 786         /*
 787          * This will allocate the datastructure and initialize all of the
 788          * generic VGA registers.
 789          */
 790
 791         if (vgaHWInit(&info->var, info, par, &timings))
 792                 return -EINVAL;
 793
 794         /*
 795          * The default value assigned by vgaHW.c is 0x41, but this does
 796          * not work for NeoMagic.
 797          */
 798         par->Attribute[16] = 0x01;
 799
 800         switch (info->var.bits_per_pixel) {
 801         case 8:
 802                 par->CRTC[0x13] = info->var.xres_virtual >> 3;
 803                 par->ExtCRTOffset = info->var.xres_virtual >> 11;
 804                 par->ExtColorModeSelect = 0x11;
 805                 break;
 806         case 16:
 807                 par->CRTC[0x13] = info->var.xres_virtual >> 2;
 808                 par->ExtCRTOffset = info->var.xres_virtual >> 10;
 809                 par->ExtColorModeSelect = 0x13;
 810                 break;
 811         case 24:
 812                 par->CRTC[0x13] = (info->var.xres_virtual * 3) >> 3;
 813                 par->ExtCRTOffset = (info->var.xres_virtual * 3) >> 11;
 814                 par->ExtColorModeSelect = 0x14;
 815                 break;
 816 #ifdef NO_32BIT_SUPPORT_YET
 817         case 32:                /* FIXME: guessed values */
 818                 par->CRTC[0x13] = info->var.xres_virtual >> 1;
 819                 par->ExtCRTOffset = info->var.xres_virtual >> 9;
 820                 par->ExtColorModeSelect = 0x15;
 821                 break;
 822 #endif
 823         default:
 824                 break;
 825         }
 826
 827         par->ExtCRTDispAddr = 0x10;
 828
 829         /* Vertical Extension */
 830         par->VerticalExt = (((timings.VTotal - 2) & 0x400) >> 10)
 831             | (((timings.VDisplay - 1) & 0x400) >> 9)
 832             | (((timings.VSyncStart) & 0x400) >> 8)
 833             | (((timings.VSyncStart) & 0x400) >> 7);
 834
 835         /* Fast write bursts on unless disabled. */
 836         if (par->pci_burst)
 837                 par->SysIfaceCntl1 = 0x30;
 838         else
 839                 par->SysIfaceCntl1 = 0x00;
 840
 841         par->SysIfaceCntl2 = 0xc0;      /* VESA Bios sets this to 0x80! */
 842
 843         /* Initialize: by default, we want display config register to be read */
 844         par->PanelDispCntlRegRead = 1;
 845
 846         /* Enable any user specified display devices. */
 847         par->PanelDispCntlReg1 = 0x00;
 848         if (par->internal_display)
 849                 par->PanelDispCntlReg1 |= 0x02;
 850         if (par->external_display)
 851                 par->PanelDispCntlReg1 |= 0x01;
 852
 853         /* If the user did not specify any display devices, then... */
 854         if (par->PanelDispCntlReg1 == 0x00) {
 855                 /* Default to internal (i.e., LCD) only. */
 856                 par->PanelDispCntlReg1 = vga_rgfx(NULL, 0x20) & 0x03;
 857         }
 858
 859         /* If we are using a fixed mode, then tell the chip we are. */
 860         switch (info->var.xres) {
 861         case 1280:
 862                 par->PanelDispCntlReg1 |= 0x60;
 863                 break;
 864         case 1024:
 865                 par->PanelDispCntlReg1 |= 0x40;
 866                 break;
 867         case 800:
 868                 par->PanelDispCntlReg1 |= 0x20;
 869                 break;
 870         case 640:
 871         default:
 872                 break;
 873         }
 874
 875         /* Setup shadow register locking. */
 876         switch (par->PanelDispCntlReg1 & 0x03) {
 877         case 0x01:              /* External CRT only mode: */
 878                 par->GeneralLockReg = 0x00;
 879                 /* We need to program the VCLK for external display only mode. */
 880                 par->ProgramVCLK = 1;
 881                 break;
 882         case 0x02:              /* Internal LCD only mode: */
 883         case 0x03:              /* Simultaneous internal/external (LCD/CRT) mode: */
 884                 par->GeneralLockReg = 0x01;
 885                 /* Don't program the VCLK when using the LCD. */
 886                 par->ProgramVCLK = 0;
 887                 break;
 888         }
 889
 890         /*
 891          * If the screen is to be stretched, turn on stretching for the
 892          * various modes.
 893          *
 894          * OPTION_LCD_STRETCH means stretching should be turned off!
 895          */
 896         par->PanelDispCntlReg2 = 0x00;
 897         par->PanelDispCntlReg3 = 0x00;
 898
 899         if (par->lcd_stretch && (par->PanelDispCntlReg1 == 0x02) &&     /* LCD only */
 900             (info->var.xres != par->NeoPanelWidth)) {
 901                 switch (info->var.xres) {
 902                 case 320:       /* Needs testing.  KEM -- 24 May 98 */
 903                 case 400:       /* Needs testing.  KEM -- 24 May 98 */
 904                 case 640:
 905                 case 800:
 906                 case 1024:
 907                         lcd_stretch = 1;
 908                         par->PanelDispCntlReg2 |= 0xC6;
 909                         break;
 910                 default:
 911                         lcd_stretch = 0;
 912                         /* No stretching in these modes. */
 913                 }
 914         } else
 915                 lcd_stretch = 0;
 916
 917         /*
 918          * If the screen is to be centerd, turn on the centering for the
 919          * various modes.
 920          */
 921         par->PanelVertCenterReg1 = 0x00;
 922         par->PanelVertCenterReg2 = 0x00;
 923         par->PanelVertCenterReg3 = 0x00;
 924         par->PanelVertCenterReg4 = 0x00;
 925         par->PanelVertCenterReg5 = 0x00;
 926         par->PanelHorizCenterReg1 = 0x00;
 927         par->PanelHorizCenterReg2 = 0x00;
 928         par->PanelHorizCenterReg3 = 0x00;
 929         par->PanelHorizCenterReg4 = 0x00;
 930         par->PanelHorizCenterReg5 = 0x00;
 931
 932
 933         if (par->PanelDispCntlReg1 & 0x02) {
 934                 if (info->var.xres == par->NeoPanelWidth) {
 935                         /*
 936                          * No centering required when the requested display width
 937                          * equals the panel width.
 938                          */
 939                 } else {
 940                         par->PanelDispCntlReg2 |= 0x01;
 941                         par->PanelDispCntlReg3 |= 0x10;
 942
 943                         /* Calculate the horizontal and vertical offsets. */
 944                         if (!lcd_stretch) {
 945                                 hoffset =
 946                                     ((par->NeoPanelWidth -
 947                                       info->var.xres) >> 4) - 1;
 948                                 voffset =
 949                                     ((par->NeoPanelHeight -
 950                                       info->var.yres) >> 1) - 2;
 951                         } else {
 952                                 /* Stretched modes cannot be centered. */
 953                                 hoffset = 0;
 954                                 voffset = 0;
 955                         }
 956
 957                         switch (info->var.xres) {
 958                         case 320:       /* Needs testing.  KEM -- 24 May 98 */
 959                                 par->PanelHorizCenterReg3 = hoffset;
 960                                 par->PanelVertCenterReg2 = voffset;
 961                                 break;
 962                         case 400:       /* Needs testing.  KEM -- 24 May 98 */
 963                                 par->PanelHorizCenterReg4 = hoffset;
 964                                 par->PanelVertCenterReg1 = voffset;
 965                                 break;
 966                         case 640:
 967                                 par->PanelHorizCenterReg1 = hoffset;
 968                                 par->PanelVertCenterReg3 = voffset;
 969                                 break;
 970                         case 800:
 971                                 par->PanelHorizCenterReg2 = hoffset;
 972                                 par->PanelVertCenterReg4 = voffset;
 973                                 break;
 974                         case 1024:
 975                                 par->PanelHorizCenterReg5 = hoffset;
 976                                 par->PanelVertCenterReg5 = voffset;
 977                                 break;
 978                         case 1280:
 979                         default:
 980                                 /* No centering in these modes. */
 981                                 break;
 982                         }
 983                 }
 984         }
 985
 986         par->biosMode =
 987             neoFindMode(info->var.xres, info->var.yres,
 988                         info->var.bits_per_pixel);
 989
 990         /*
 991          * Calculate the VCLK that most closely matches the requested dot
 992          * clock.
 993          */
 994         neoCalcVCLK(info, par, timings.pixclock);
 995
 996         /* Since we program the clocks ourselves, always use VCLK3. */
 997         par->MiscOutReg |= 0x0C;
 998
 999         /* alread unlocked above */
1000         /* BOGUS  vga_wgfx(NULL, 0x09, 0x26); */
1001
1002         /* don't know what this is, but it's 0 from bootup anyway */
1003         vga_wgfx(NULL, 0x15, 0x00);
1004
1005         /* was set to 0x01 by my bios in text and vesa modes */
1006         vga_wgfx(NULL, 0x0A, par->GeneralLockReg);
1007
1008         /*
1009          * The color mode needs to be set before calling vgaHWRestore
1010          * to ensure the DAC is initialized properly.
1011          *
1012          * NOTE: Make sure we don't change bits make sure we don't change
1013          * any reserved bits.
1014          */
1015         temp = vga_rgfx(NULL, 0x90);
1016         switch (info->fix.accel) {
1017         case FB_ACCEL_NEOMAGIC_NM2070:
1018                 temp &= 0xF0;   /* Save bits 7:4 */
1019                 temp |= (par->ExtColorModeSelect & ~0xF0);
1020                 break;
1021         case FB_ACCEL_NEOMAGIC_NM2090:
1022         case FB_ACCEL_NEOMAGIC_NM2093:
1023         case FB_ACCEL_NEOMAGIC_NM2097:
1024         case FB_ACCEL_NEOMAGIC_NM2160:
1025         case FB_ACCEL_NEOMAGIC_NM2200:
1026         case FB_ACCEL_NEOMAGIC_NM2230:
1027         case FB_ACCEL_NEOMAGIC_NM2360:
1028         case FB_ACCEL_NEOMAGIC_NM2380:
1029                 temp &= 0x70;   /* Save bits 6:4 */
1030                 temp |= (par->ExtColorModeSelect & ~0x70);
1031                 break;
1032         }
1033
1034         vga_wgfx(NULL, 0x90, temp);
1035
1036         /*
1037          * In some rare cases a lockup might occur if we don't delay
1038          * here. (Reported by Miles Lane)
1039          */
1040         //mdelay(200);
1041
1042         /*
1043          * Disable horizontal and vertical graphics and text expansions so
1044          * that vgaHWRestore works properly.
1045          */
1046         temp = vga_rgfx(NULL, 0x25);
1047         temp &= 0x39;
1048         vga_wgfx(NULL, 0x25, temp);
1049
1050         /*
1051          * Sleep for 200ms to make sure that the two operations above have
1052          * had time to take effect.
1053          */
1054         mdelay(200);
1055
1056         /*
1057          * This function handles restoring the generic VGA registers.  */
1058         vgaHWRestore(info, par);
1059
1060         /* linear colormap for non palettized modes */
1061         switch (info->var.bits_per_pixel) {
1062         case 8:
1063                 /* PseudoColor, 256 */
1064                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
1065                 break;
1066         case 16:
1067                 /* TrueColor, 64k */
1068                 info->fix.visual = FB_VISUAL_TRUECOLOR;
1069
1070                 for (i = 0; i < 64; i++) {
1071                         outb(i, 0x3c8);
1072
1073                         outb(i << 1, 0x3c9);
1074                         outb(i, 0x3c9);
1075                         outb(i << 1, 0x3c9);
1076                 }
1077                 break;
1078         case 24:
1079 #ifdef NO_32BIT_SUPPORT_YET
1080         case 32:
1081 #endif
1082                 /* TrueColor, 16m */
1083                 info->fix.visual = FB_VISUAL_TRUECOLOR;
1084
1085                 for (i = 0; i < 256; i++) {
1086                         outb(i, 0x3c8);
1087
1088                         outb(i, 0x3c9);
1089                         outb(i, 0x3c9);
1090                         outb(i, 0x3c9);
1091                 }
1092                 break;
1093         }
1094
1095         vga_wgfx(NULL, 0x0E, par->ExtCRTDispAddr);
1096         vga_wgfx(NULL, 0x0F, par->ExtCRTOffset);
1097         temp = vga_rgfx(NULL, 0x10);
1098         temp &= 0x0F;           /* Save bits 3:0 */
1099         temp |= (par->SysIfaceCntl1 & ~0x0F);   /* VESA Bios sets bit 1! */
1100         vga_wgfx(NULL, 0x10, temp);
1101
1102         vga_wgfx(NULL, 0x11, par->SysIfaceCntl2);
1103         vga_wgfx(NULL, 0x15, 0 /*par->SingleAddrPage */ );
1104         vga_wgfx(NULL, 0x16, 0 /*par->DualAddrPage */ );
1105
1106         temp = vga_rgfx(NULL, 0x20);
1107         switch (info->fix.accel) {
1108         case FB_ACCEL_NEOMAGIC_NM2070:
1109                 temp &= 0xFC;   /* Save bits 7:2 */
1110                 temp |= (par->PanelDispCntlReg1 & ~0xFC);
1111                 break;
1112         case FB_ACCEL_NEOMAGIC_NM2090:
1113         case FB_ACCEL_NEOMAGIC_NM2093:
1114         case FB_ACCEL_NEOMAGIC_NM2097:
1115         case FB_ACCEL_NEOMAGIC_NM2160:
1116                 temp &= 0xDC;   /* Save bits 7:6,4:2 */
1117                 temp |= (par->PanelDispCntlReg1 & ~0xDC);
1118                 break;
1119         case FB_ACCEL_NEOMAGIC_NM2200:
1120         case FB_ACCEL_NEOMAGIC_NM2230:
1121         case FB_ACCEL_NEOMAGIC_NM2360:
1122         case FB_ACCEL_NEOMAGIC_NM2380:
1123                 temp &= 0x98;   /* Save bits 7,4:3 */
1124                 temp |= (par->PanelDispCntlReg1 & ~0x98);
1125                 break;
1126         }
1127         vga_wgfx(NULL, 0x20, temp);
1128
1129         temp = vga_rgfx(NULL, 0x25);
1130         temp &= 0x38;           /* Save bits 5:3 */
1131         temp |= (par->PanelDispCntlReg2 & ~0x38);
1132         vga_wgfx(NULL, 0x25, temp);
1133
1134         if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1135                 temp = vga_rgfx(NULL, 0x30);
1136                 temp &= 0xEF;   /* Save bits 7:5 and bits 3:0 */
1137                 temp |= (par->PanelDispCntlReg3 & ~0xEF);
1138                 vga_wgfx(NULL, 0x30, temp);
1139         }
1140
1141         vga_wgfx(NULL, 0x28, par->PanelVertCenterReg1);
1142         vga_wgfx(NULL, 0x29, par->PanelVertCenterReg2);
1143         vga_wgfx(NULL, 0x2a, par->PanelVertCenterReg3);
1144
1145         if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1146                 vga_wgfx(NULL, 0x32, par->PanelVertCenterReg4);
1147                 vga_wgfx(NULL, 0x33, par->PanelHorizCenterReg1);
1148                 vga_wgfx(NULL, 0x34, par->PanelHorizCenterReg2);
1149                 vga_wgfx(NULL, 0x35, par->PanelHorizCenterReg3);
1150         }
1151
1152         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2160)
1153                 vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
1154
1155         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1156             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1157             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1158             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1159                 vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
1160                 vga_wgfx(NULL, 0x37, par->PanelVertCenterReg5);
1161                 vga_wgfx(NULL, 0x38, par->PanelHorizCenterReg5);
1162
1163                 clock_hi = 1;
1164         }
1165
1166         /* Program VCLK3 if needed. */
1167         if (par->ProgramVCLK && ((vga_rgfx(NULL, 0x9B) != par->VCLK3NumeratorLow)
1168                                  || (vga_rgfx(NULL, 0x9F) != par->VCLK3Denominator)
1169                                  || (clock_hi && ((vga_rgfx(NULL, 0x8F) & ~0x0f)
1170                                                   != (par->VCLK3NumeratorHigh &
1171                                                       ~0x0F))))) {
1172                 vga_wgfx(NULL, 0x9B, par->VCLK3NumeratorLow);
1173                 if (clock_hi) {
1174                         temp = vga_rgfx(NULL, 0x8F);
1175                         temp &= 0x0F;   /* Save bits 3:0 */
1176                         temp |= (par->VCLK3NumeratorHigh & ~0x0F);
1177                         vga_wgfx(NULL, 0x8F, temp);
1178                 }
1179                 vga_wgfx(NULL, 0x9F, par->VCLK3Denominator);
1180         }
1181
1182         if (par->biosMode)
1183                 vga_wcrt(NULL, 0x23, par->biosMode);
1184
1185         vga_wgfx(NULL, 0x93, 0xc0);     /* Gives 5x faster framebuffer writes !!! */
1186
1187         /* Program vertical extension register */
1188         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1189             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1190             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1191             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1192                 vga_wcrt(NULL, 0x70, par->VerticalExt);
1193         }
1194
1195         vgaHWProtect(0);        /* Turn on screen */
1196
1197         /* Calling this also locks offset registers required in update_start */
1198         neoLock(&par->state);
1199
1200         info->fix.line_length =
1201             info->var.xres_virtual * (info->var.bits_per_pixel >> 3);
1202
1203         switch (info->fix.accel) {
1204                 case FB_ACCEL_NEOMAGIC_NM2200:
1205                 case FB_ACCEL_NEOMAGIC_NM2230:
1206                 case FB_ACCEL_NEOMAGIC_NM2360:
1207                 case FB_ACCEL_NEOMAGIC_NM2380:
1208                         neo2200_accel_init(info, &info->var);
1209                         break;
1210                 default:
1211                         break;
1212         }
1213         return 0;
1214 }
1215
1216 static void neofb_update_start(struct fb_info *info,
1217                                struct fb_var_screeninfo *var)
1218 {
1219         struct neofb_par *par = info->par;
1220         struct vgastate *state = &par->state;
1221         int oldExtCRTDispAddr;
1222         int Base;
1223
1224         DBG("neofb_update_start");
1225
1226         Base = (var->yoffset * var->xres_virtual + var->xoffset) >> 2;
1227         Base *= (var->bits_per_pixel + 7) / 8;
1228
1229         neoUnlock();
1230
1231         /*
1232          * These are the generic starting address registers.
1233          */
1234         vga_wcrt(state->vgabase, 0x0C, (Base & 0x00FF00) >> 8);
1235         vga_wcrt(state->vgabase, 0x0D, (Base & 0x00FF));
1236
1237         /*
1238          * Make sure we don't clobber some other bits that might already
1239          * have been set. NOTE: NM2200 has a writable bit 3, but it shouldn't
1240          * be needed.
1241          */
1242         oldExtCRTDispAddr = vga_rgfx(NULL, 0x0E);
1243         vga_wgfx(state->vgabase, 0x0E, (((Base >> 16) & 0x0f) | (oldExtCRTDispAddr & 0xf0)));
1244
1245         neoLock(state);
1246 }
1247
1248 /*
1249  *    Pan or Wrap the Display
1250  */
1251 static int neofb_pan_display(struct fb_var_screeninfo *var,
1252                              struct fb_info *info)
1253 {
1254         u_int y_bottom;
1255
1256         y_bottom = var->yoffset;
1257
1258         if (!(var->vmode & FB_VMODE_YWRAP))
1259                 y_bottom += var->yres;
1260
1261         if (var->xoffset > (var->xres_virtual - var->xres))
1262                 return -EINVAL;
1263         if (y_bottom > info->var.yres_virtual)
1264                 return -EINVAL;
1265
1266         neofb_update_start(info, var);
1267
1268         info->var.xoffset = var->xoffset;
1269         info->var.yoffset = var->yoffset;
1270
1271         if (var->vmode & FB_VMODE_YWRAP)
1272                 info->var.vmode |= FB_VMODE_YWRAP;
1273         else
1274                 info->var.vmode &= ~FB_VMODE_YWRAP;
1275         return 0;
1276 }
1277
1278 static int neofb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
1279                            u_int transp, struct fb_info *fb)
1280 {
1281         if (regno >= fb->cmap.len || regno > 255)
1282                 return -EINVAL;
1283
1284         if (fb->var.bits_per_pixel <= 8) {
1285                 outb(regno, 0x3c8);
1286
1287                 outb(red >> 10, 0x3c9);
1288                 outb(green >> 10, 0x3c9);
1289                 outb(blue >> 10, 0x3c9);
1290         } else if (regno < 16) {
1291                 switch (fb->var.bits_per_pixel) {
1292                 case 16:
1293                         ((u32 *) fb->pseudo_palette)[regno] =
1294                                 ((red & 0xf800)) | ((green & 0xfc00) >> 5) |
1295                                 ((blue & 0xf800) >> 11);
1296                         break;
1297                 case 24:
1298                         ((u32 *) fb->pseudo_palette)[regno] =
1299                                 ((red & 0xff00) << 8) | ((green & 0xff00)) |
1300                                 ((blue & 0xff00) >> 8);
1301                         break;
1302 #ifdef NO_32BIT_SUPPORT_YET
1303                 case 32:
1304                         ((u32 *) fb->pseudo_palette)[regno] =
1305                                 ((transp & 0xff00) << 16) | ((red & 0xff00) << 8) |
1306                                 ((green & 0xff00)) | ((blue & 0xff00) >> 8);
1307                         break;
1308 #endif
1309                 default:
1310                         return 1;
1311                 }
1312         }
1313
1314         return 0;
1315 }
1316
1317 /*
1318  *    (Un)Blank the display.
1319  */
1320 static int neofb_blank(int blank_mode, struct fb_info *info)
1321 {
1322         /*
1323          *  Blank the screen if blank_mode != 0, else unblank.
1324          *  Return 0 if blanking succeeded, != 0 if un-/blanking failed due to
1325          *  e.g. a video mode which doesn't support it. Implements VESA suspend
1326          *  and powerdown modes for monitors, and backlight control on LCDs.
1327          *    blank_mode == 0: unblanked (backlight on)
1328          *    blank_mode == 1: blank (backlight on)
1329          *    blank_mode == 2: suspend vsync (backlight off)
1330          *    blank_mode == 3: suspend hsync (backlight off)
1331          *    blank_mode == 4: powerdown (backlight off)
1332          *
1333          *  wms...Enable VESA DPMS compatible powerdown mode
1334          *  run "setterm -powersave powerdown" to take advantage
1335          */
1336         struct neofb_par *par = info->par;
1337         int seqflags, lcdflags, dpmsflags, reg, tmpdisp;
1338
1339         /*
1340          * Read back the register bits related to display configuration. They might
1341          * have been changed underneath the driver via Fn key stroke.
1342          */
1343         neoUnlock();
1344         tmpdisp = vga_rgfx(NULL, 0x20) & 0x03;
1345         neoLock(&par->state);
1346
1347         /* In case we blank the screen, we want to store the possibly new
1348          * configuration in the driver. During un-blank, we re-apply this setting,
1349          * since the LCD bit will be cleared in order to switch off the backlight.
1350          */
1351         if (par->PanelDispCntlRegRead) {
1352                 par->PanelDispCntlReg1 = tmpdisp;
1353         }
1354         par->PanelDispCntlRegRead = !blank_mode;
1355
1356         switch (blank_mode) {
1357         case FB_BLANK_POWERDOWN:        /* powerdown - both sync lines down */
1358                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1359                 lcdflags = 0;                   /* LCD off */
1360                 dpmsflags = NEO_GR01_SUPPRESS_HSYNC |
1361                             NEO_GR01_SUPPRESS_VSYNC;
1362 #ifdef CONFIG_TOSHIBA
1363                 /* Do we still need this ? */
1364                 /* attempt to turn off backlight on toshiba; also turns off external */
1365                 {
1366                         SMMRegisters regs;
1367
1368                         regs.eax = 0xff00; /* HCI_SET */
1369                         regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1370                         regs.ecx = 0x0000; /* HCI_DISABLE */
1371                         tosh_smm(&regs);
1372                 }
1373 #endif
1374                 break;
1375         case FB_BLANK_HSYNC_SUSPEND:            /* hsync off */
1376                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1377                 lcdflags = 0;                   /* LCD off */
1378                 dpmsflags = NEO_GR01_SUPPRESS_HSYNC;
1379                 break;
1380         case FB_BLANK_VSYNC_SUSPEND:            /* vsync off */
1381                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1382                 lcdflags = 0;                   /* LCD off */
1383                 dpmsflags = NEO_GR01_SUPPRESS_VSYNC;
1384                 break;
1385         case FB_BLANK_NORMAL:           /* just blank screen (backlight stays on) */
1386                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1387                 /*
1388                  * During a blank operation with the LID shut, we might store "LCD off"
1389                  * by mistake. Due to timing issues, the BIOS may switch the lights
1390                  * back on, and we turn it back off once we "unblank".
1391                  *
1392                  * So here is an attempt to implement ">=" - if we are in the process
1393                  * of unblanking, and the LCD bit is unset in the driver but set in the
1394                  * register, we must keep it.
1395                  */
1396                 lcdflags = ((par->PanelDispCntlReg1 | tmpdisp) & 0x02); /* LCD normal */
1397                 dpmsflags = 0x00;       /* no hsync/vsync suppression */
1398                 break;
1399         case FB_BLANK_UNBLANK:          /* unblank */
1400                 seqflags = 0;                   /* Enable sequencer */
1401                 lcdflags = ((par->PanelDispCntlReg1 | tmpdisp) & 0x02); /* LCD normal */
1402                 dpmsflags = 0x00;       /* no hsync/vsync suppression */
1403 #ifdef CONFIG_TOSHIBA
1404                 /* Do we still need this ? */
1405                 /* attempt to re-enable backlight/external on toshiba */
1406                 {
1407                         SMMRegisters regs;
1408
1409                         regs.eax = 0xff00; /* HCI_SET */
1410                         regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1411                         regs.ecx = 0x0001; /* HCI_ENABLE */
1412                         tosh_smm(&regs);
1413                 }
1414 #endif
1415                 break;
1416         default:        /* Anything else we don't understand; return 1 to tell
1417                          * fb_blank we didn't aactually do anything */
1418                 return 1;
1419         }
1420
1421         neoUnlock();
1422         reg = (vga_rseq(NULL, 0x01) & ~0x20) | seqflags;
1423         vga_wseq(NULL, 0x01, reg);
1424         reg = (vga_rgfx(NULL, 0x20) & ~0x02) | lcdflags;
1425         vga_wgfx(NULL, 0x20, reg);
1426         reg = (vga_rgfx(NULL, 0x01) & ~0xF0) | 0x80 | dpmsflags;
1427         vga_wgfx(NULL, 0x01, reg);
1428         neoLock(&par->state);
1429         return 0;
1430 }
1431
1432 static void
1433 neo2200_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1434 {
1435         struct neofb_par *par = info->par;
1436         u_long dst, rop;
1437
1438         dst = rect->dx + rect->dy * info->var.xres_virtual;
1439         rop = rect->rop ? 0x060000 : 0x0c0000;
1440
1441         neo2200_wait_fifo(info, 4);
1442
1443         /* set blt control */
1444         writel(NEO_BC3_FIFO_EN |
1445                NEO_BC0_SRC_IS_FG | NEO_BC3_SKIP_MAPPING |
1446                //               NEO_BC3_DST_XY_ADDR  |
1447                //               NEO_BC3_SRC_XY_ADDR  |
1448                rop, &par->neo2200->bltCntl);
1449
1450         switch (info->var.bits_per_pixel) {
1451         case 8:
1452                 writel(rect->color, &par->neo2200->fgColor);
1453                 break;
1454         case 16:
1455         case 24:
1456                 writel(((u32 *) (info->pseudo_palette))[rect->color],
1457                        &par->neo2200->fgColor);
1458                 break;
1459         }
1460
1461         writel(dst * ((info->var.bits_per_pixel + 7) >> 3),
1462                &par->neo2200->dstStart);
1463         writel((rect->height << 16) | (rect->width & 0xffff),
1464                &par->neo2200->xyExt);
1465 }
1466
1467 static void
1468 neo2200_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1469 {
1470         u32 sx = area->sx, sy = area->sy, dx = area->dx, dy = area->dy;
1471         struct neofb_par *par = info->par;
1472         u_long src, dst, bltCntl;
1473
1474         bltCntl = NEO_BC3_FIFO_EN | NEO_BC3_SKIP_MAPPING | 0x0C0000;
1475
1476         if ((dy > sy) || ((dy == sy) && (dx > sx))) {
1477                 /* Start with the lower right corner */
1478                 sy += (area->height - 1);
1479                 dy += (area->height - 1);
1480                 sx += (area->width - 1);
1481                 dx += (area->width - 1);
1482
1483                 bltCntl |= NEO_BC0_X_DEC | NEO_BC0_DST_Y_DEC | NEO_BC0_SRC_Y_DEC;
1484         }
1485
1486         src = sx * (info->var.bits_per_pixel >> 3) + sy*info->fix.line_length;
1487         dst = dx * (info->var.bits_per_pixel >> 3) + dy*info->fix.line_length;
1488
1489         neo2200_wait_fifo(info, 4);
1490
1491         /* set blt control */
1492         writel(bltCntl, &par->neo2200->bltCntl);
1493
1494         writel(src, &par->neo2200->srcStart);
1495         writel(dst, &par->neo2200->dstStart);
1496         writel((area->height << 16) | (area->width & 0xffff),
1497                &par->neo2200->xyExt);
1498 }
1499
1500 static void
1501 neo2200_imageblit(struct fb_info *info, const struct fb_image *image)
1502 {
1503         struct neofb_par *par = info->par;
1504         int s_pitch = (image->width * image->depth + 7) >> 3;
1505         int scan_align = info->pixmap.scan_align - 1;
1506         int buf_align = info->pixmap.buf_align - 1;
1507         int bltCntl_flags, d_pitch, data_len;
1508
1509         // The data is padded for the hardware
1510         d_pitch = (s_pitch + scan_align) & ~scan_align;
1511         data_len = ((d_pitch * image->height) + buf_align) & ~buf_align;
1512
1513         neo2200_sync(info);
1514
1515         if (image->depth == 1) {
1516                 if (info->var.bits_per_pixel == 24 && image->width < 16) {
1517                         /* FIXME. There is a bug with accelerated color-expanded
1518                          * transfers in 24 bit mode if the image being transferred
1519                          * is less than 16 bits wide. This is due to insufficient
1520                          * padding when writing the image. We need to adjust
1521                          * struct fb_pixmap. Not yet done. */
1522                         return cfb_imageblit(info, image);
1523                 }
1524                 bltCntl_flags = NEO_BC0_SRC_MONO;
1525         } else if (image->depth == info->var.bits_per_pixel) {
1526                 bltCntl_flags = 0;
1527         } else {
1528                 /* We don't currently support hardware acceleration if image
1529                  * depth is different from display */
1530                 return cfb_imageblit(info, image);
1531         }
1532
1533         switch (info->var.bits_per_pixel) {
1534         case 8:
1535                 writel(image->fg_color, &par->neo2200->fgColor);
1536                 writel(image->bg_color, &par->neo2200->bgColor);
1537                 break;
1538         case 16:
1539         case 24:
1540                 writel(((u32 *) (info->pseudo_palette))[image->fg_color],
1541                        &par->neo2200->fgColor);
1542                 writel(((u32 *) (info->pseudo_palette))[image->bg_color],
1543                        &par->neo2200->bgColor);
1544                 break;
1545         }
1546
1547         writel(NEO_BC0_SYS_TO_VID |
1548                 NEO_BC3_SKIP_MAPPING | bltCntl_flags |
1549                 // NEO_BC3_DST_XY_ADDR |
1550                 0x0c0000, &par->neo2200->bltCntl);
1551
1552         writel(0, &par->neo2200->srcStart);
1553 //      par->neo2200->dstStart = (image->dy << 16) | (image->dx & 0xffff);
1554         writel(((image->dx & 0xffff) * (info->var.bits_per_pixel >> 3) +
1555                 image->dy * info->fix.line_length), &par->neo2200->dstStart);
1556         writel((image->height << 16) | (image->width & 0xffff),
1557                &par->neo2200->xyExt);
1558
1559         memcpy_toio(par->mmio_vbase + 0x100000, image->data, data_len);
1560 }
1561
1562 static void
1563 neofb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1564 {
1565         switch (info->fix.accel) {
1566                 case FB_ACCEL_NEOMAGIC_NM2200:
1567                 case FB_ACCEL_NEOMAGIC_NM2230:
1568                 case FB_ACCEL_NEOMAGIC_NM2360:
1569                 case FB_ACCEL_NEOMAGIC_NM2380:
1570                         neo2200_fillrect(info, rect);
1571                         break;
1572                 default:
1573                         cfb_fillrect(info, rect);
1574                         break;
1575         }
1576 }
1577
1578 static void
1579 neofb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1580 {
1581         switch (info->fix.accel) {
1582                 case FB_ACCEL_NEOMAGIC_NM2200:
1583                 case FB_ACCEL_NEOMAGIC_NM2230:
1584                 case FB_ACCEL_NEOMAGIC_NM2360:
1585                 case FB_ACCEL_NEOMAGIC_NM2380:
1586                         neo2200_copyarea(info, area);
1587                         break;
1588                 default:
1589                         cfb_copyarea(info, area);
1590                         break;
1591         }
1592 }
1593
1594 static void
1595 neofb_imageblit(struct fb_info *info, const struct fb_image *image)
1596 {
1597         switch (info->fix.accel) {
1598                 case FB_ACCEL_NEOMAGIC_NM2200:
1599                 case FB_ACCEL_NEOMAGIC_NM2230:
1600                 case FB_ACCEL_NEOMAGIC_NM2360:
1601                 case FB_ACCEL_NEOMAGIC_NM2380:
1602                         neo2200_imageblit(info, image);
1603                         break;
1604                 default:
1605                         cfb_imageblit(info, image);
1606                         break;
1607         }
1608 }
1609
1610 static int
1611 neofb_sync(struct fb_info *info)
1612 {
1613         switch (info->fix.accel) {
1614                 case FB_ACCEL_NEOMAGIC_NM2200:
1615                 case FB_ACCEL_NEOMAGIC_NM2230:
1616                 case FB_ACCEL_NEOMAGIC_NM2360:
1617                 case FB_ACCEL_NEOMAGIC_NM2380:
1618                         neo2200_sync(info);
1619                         break;
1620                 default:
1621                         break;
1622         }
1623         return 0;
1624 }
1625
1626 /*
1627 static void
1628 neofb_draw_cursor(struct fb_info *info, u8 *dst, u8 *src, unsigned int width)
1629 {
1630         //memset_io(info->sprite.addr, 0xff, 1);
1631 }
1632
1633 static int
1634 neofb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1635 {
1636         struct neofb_par *par = (struct neofb_par *) info->par;
1637
1638         * Disable cursor *
1639         write_le32(NEOREG_CURSCNTL, ~NEO_CURS_ENABLE, par);
1640
1641         if (cursor->set & FB_CUR_SETPOS) {
1642                 u32 x = cursor->image.dx;
1643                 u32 y = cursor->image.dy;
1644
1645                 info->cursor.image.dx = x;
1646                 info->cursor.image.dy = y;
1647                 write_le32(NEOREG_CURSX, x, par);
1648                 write_le32(NEOREG_CURSY, y, par);
1649         }
1650
1651         if (cursor->set & FB_CUR_SETSIZE) {
1652                 info->cursor.image.height = cursor->image.height;
1653                 info->cursor.image.width = cursor->image.width;
1654         }
1655
1656         if (cursor->set & FB_CUR_SETHOT)
1657                 info->cursor.hot = cursor->hot;
1658
1659         if (cursor->set & FB_CUR_SETCMAP) {
1660                 if (cursor->image.depth == 1) {
1661                         u32 fg = cursor->image.fg_color;
1662                         u32 bg = cursor->image.bg_color;
1663
1664                         info->cursor.image.fg_color = fg;
1665                         info->cursor.image.bg_color = bg;
1666
1667                         fg = ((fg & 0xff0000) >> 16) | ((fg & 0xff) << 16) | (fg & 0xff00);
1668                         bg = ((bg & 0xff0000) >> 16) | ((bg & 0xff) << 16) | (bg & 0xff00);
1669                         write_le32(NEOREG_CURSFGCOLOR, fg, par);
1670                         write_le32(NEOREG_CURSBGCOLOR, bg, par);
1671                 }
1672         }
1673
1674         if (cursor->set & FB_CUR_SETSHAPE)
1675                 fb_load_cursor_image(info);
1676
1677         if (info->cursor.enable)
1678                 write_le32(NEOREG_CURSCNTL, NEO_CURS_ENABLE, par);
1679         return 0;
1680 }
1681 */
1682
1683 static struct fb_ops neofb_ops = {
1684         .owner          = THIS_MODULE,
1685         .fb_open        = neofb_open,
1686         .fb_release     = neofb_release,
1687         .fb_check_var   = neofb_check_var,
1688         .fb_set_par     = neofb_set_par,
1689         .fb_setcolreg   = neofb_setcolreg,
1690         .fb_pan_display = neofb_pan_display,
1691         .fb_blank       = neofb_blank,
1692         .fb_sync        = neofb_sync,
1693         .fb_fillrect    = neofb_fillrect,
1694         .fb_copyarea    = neofb_copyarea,
1695         .fb_imageblit   = neofb_imageblit,
1696 };
1697
1698 /* --------------------------------------------------------------------- */
1699
1700 static struct fb_videomode __devinitdata mode800x480 = {
1701         .xres           = 800,
1702         .yres           = 480,
1703         .pixclock       = 25000,
1704         .left_margin    = 88,
1705         .right_margin   = 40,
1706         .upper_margin   = 23,
1707         .lower_margin   = 1,
1708         .hsync_len      = 128,
1709         .vsync_len      = 4,
1710         .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
1711         .vmode          = FB_VMODE_NONINTERLACED
1712 };
1713
1714 static int __devinit neo_map_mmio(struct fb_info *info,
1715                                   struct pci_dev *dev)
1716 {
1717         struct neofb_par *par = info->par;
1718
1719         DBG("neo_map_mmio");
1720
1721         switch (info->fix.accel) {
1722                 case FB_ACCEL_NEOMAGIC_NM2070:
1723                         info->fix.mmio_start = pci_resource_start(dev, 0)+
1724                                 0x100000;
1725                         break;
1726                 case FB_ACCEL_NEOMAGIC_NM2090:
1727                 case FB_ACCEL_NEOMAGIC_NM2093:
1728                         info->fix.mmio_start = pci_resource_start(dev, 0)+
1729                                 0x200000;
1730                         break;
1731                 case FB_ACCEL_NEOMAGIC_NM2160:
1732                 case FB_ACCEL_NEOMAGIC_NM2097:
1733                 case FB_ACCEL_NEOMAGIC_NM2200:
1734                 case FB_ACCEL_NEOMAGIC_NM2230:
1735                 case FB_ACCEL_NEOMAGIC_NM2360:
1736                 case FB_ACCEL_NEOMAGIC_NM2380:
1737                         info->fix.mmio_start = pci_resource_start(dev, 1);
1738                         break;
1739                 default:
1740                         info->fix.mmio_start = pci_resource_start(dev, 0);
1741         }
1742         info->fix.mmio_len = MMIO_SIZE;
1743
1744         if (!request_mem_region
1745             (info->fix.mmio_start, MMIO_SIZE, "memory mapped I/O")) {
1746                 printk("neofb: memory mapped IO in use\n");
1747                 return -EBUSY;
1748         }
1749
1750         par->mmio_vbase = ioremap(info->fix.mmio_start, MMIO_SIZE);
1751         if (!par->mmio_vbase) {
1752                 printk("neofb: unable to map memory mapped IO\n");
1753                 release_mem_region(info->fix.mmio_start,
1754                                    info->fix.mmio_len);
1755                 return -ENOMEM;
1756         } else
1757                 printk(KERN_INFO "neofb: mapped io at %p\n",
1758                        par->mmio_vbase);
1759         return 0;
1760 }
1761
1762 static void neo_unmap_mmio(struct fb_info *info)
1763 {
1764         struct neofb_par *par = info->par;
1765
1766         DBG("neo_unmap_mmio");
1767
1768         iounmap(par->mmio_vbase);
1769         par->mmio_vbase = NULL;
1770
1771         release_mem_region(info->fix.mmio_start,
1772                            info->fix.mmio_len);
1773 }
1774
1775 static int __devinit neo_map_video(struct fb_info *info,
1776                                    struct pci_dev *dev, int video_len)
1777 {
1778         //unsigned long addr;
1779
1780         DBG("neo_map_video");
1781
1782         info->fix.smem_start = pci_resource_start(dev, 0);
1783         info->fix.smem_len = video_len;
1784
1785         if (!request_mem_region(info->fix.smem_start, info->fix.smem_len,
1786                                 "frame buffer")) {
1787                 printk("neofb: frame buffer in use\n");
1788                 return -EBUSY;
1789         }
1790
1791         info->screen_base =
1792             ioremap(info->fix.smem_start, info->fix.smem_len);
1793         if (!info->screen_base) {
1794                 printk("neofb: unable to map screen memory\n");
1795                 release_mem_region(info->fix.smem_start,
1796                                    info->fix.smem_len);
1797                 return -ENOMEM;
1798         } else
1799                 printk(KERN_INFO "neofb: mapped framebuffer at %p\n",
1800                        info->screen_base);
1801
1802 #ifdef CONFIG_MTRR
1803         ((struct neofb_par *)(info->par))->mtrr =
1804                 mtrr_add(info->fix.smem_start, pci_resource_len(dev, 0),
1805                                 MTRR_TYPE_WRCOMB, 1);
1806 #endif
1807
1808         /* Clear framebuffer, it's all white in memory after boot */
1809         memset_io(info->screen_base, 0, info->fix.smem_len);
1810
1811         /* Allocate Cursor drawing pad.
1812         info->fix.smem_len -= PAGE_SIZE;
1813         addr = info->fix.smem_start + info->fix.smem_len;
1814         write_le32(NEOREG_CURSMEMPOS, ((0x000f & (addr >> 10)) << 8) |
1815                                         ((0x0ff0 & (addr >> 10)) >> 4), par);
1816         addr = (unsigned long) info->screen_base + info->fix.smem_len;
1817         info->sprite.addr = (u8 *) addr; */
1818         return 0;
1819 }
1820
1821 static void neo_unmap_video(struct fb_info *info)
1822 {
1823         DBG("neo_unmap_video");
1824
1825 #ifdef CONFIG_MTRR
1826         {
1827                 struct neofb_par *par = info->par;
1828
1829                 mtrr_del(par->mtrr, info->fix.smem_start,
1830                          info->fix.smem_len);
1831         }
1832 #endif
1833         iounmap(info->screen_base);
1834         info->screen_base = NULL;
1835
1836         release_mem_region(info->fix.smem_start,
1837                            info->fix.smem_len);
1838 }
1839
1840 static int __devinit neo_scan_monitor(struct fb_info *info)
1841 {
1842         struct neofb_par *par = info->par;
1843         unsigned char type, display;
1844         int w;
1845
1846         // Eventually we will have i2c support.
1847         info->monspecs.modedb = kmalloc(sizeof(struct fb_videomode), GFP_KERNEL);
1848         if (!info->monspecs.modedb)
1849                 return -ENOMEM;
1850         info->monspecs.modedb_len = 1;
1851
1852         /* Determine the panel type */
1853         vga_wgfx(NULL, 0x09, 0x26);
1854         type = vga_rgfx(NULL, 0x21);
1855         display = vga_rgfx(NULL, 0x20);
1856         if (!par->internal_display && !par->external_display) {
1857                 par->internal_display = display & 2 || !(display & 3) ? 1 : 0;
1858                 par->external_display = display & 1;
1859                 printk (KERN_INFO "Autodetected %s display\n",
1860                         par->internal_display && par->external_display ? "simultaneous" :
1861                         par->internal_display ? "internal" : "external");
1862         }
1863
1864         /* Determine panel width -- used in NeoValidMode. */
1865         w = vga_rgfx(NULL, 0x20);
1866         vga_wgfx(NULL, 0x09, 0x00);
1867         switch ((w & 0x18) >> 3) {
1868         case 0x00:
1869                 // 640x480@60
1870                 par->NeoPanelWidth = 640;
1871                 par->NeoPanelHeight = 480;
1872                 memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode));
1873                 break;
1874         case 0x01:
1875                 par->NeoPanelWidth = 800;
1876                 if (par->libretto) {
1877                         par->NeoPanelHeight = 480;
1878                         memcpy(info->monspecs.modedb, &mode800x480, sizeof(struct fb_videomode));
1879                 } else {
1880                         // 800x600@60
1881                         par->NeoPanelHeight = 600;
1882                         memcpy(info->monspecs.modedb, &vesa_modes[8], sizeof(struct fb_videomode));
1883                 }
1884                 break;
1885         case 0x02:
1886                 // 1024x768@60
1887                 par->NeoPanelWidth = 1024;
1888                 par->NeoPanelHeight = 768;
1889                 memcpy(info->monspecs.modedb, &vesa_modes[13], sizeof(struct fb_videomode));
1890                 break;
1891         case 0x03:
1892                 /* 1280x1024@60 panel support needs to be added */
1893 #ifdef NOT_DONE
1894                 par->NeoPanelWidth = 1280;
1895                 par->NeoPanelHeight = 1024;
1896                 memcpy(info->monspecs.modedb, &vesa_modes[20], sizeof(struct fb_videomode));
1897                 break;
1898 #else
1899                 printk(KERN_ERR
1900                        "neofb: Only 640x480, 800x600/480 and 1024x768 panels are currently supported\n");
1901                 return -1;
1902 #endif
1903         default:
1904                 // 640x480@60
1905                 par->NeoPanelWidth = 640;
1906                 par->NeoPanelHeight = 480;
1907                 memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode));
1908                 break;
1909         }
1910
1911         printk(KERN_INFO "Panel is a %dx%d %s %s display\n",
1912                par->NeoPanelWidth,
1913                par->NeoPanelHeight,
1914                (type & 0x02) ? "color" : "monochrome",
1915                (type & 0x10) ? "TFT" : "dual scan");
1916         return 0;
1917 }
1918
1919 static int __devinit neo_init_hw(struct fb_info *info)
1920 {
1921         struct neofb_par *par = info->par;
1922         int videoRam = 896;
1923         int maxClock = 65000;
1924         int CursorMem = 1024;
1925         int CursorOff = 0x100;
1926         int linearSize = 1024;
1927         int maxWidth = 1024;
1928         int maxHeight = 1024;
1929
1930         DBG("neo_init_hw");
1931
1932         neoUnlock();
1933
1934 #if 0
1935         printk(KERN_DEBUG "--- Neo extended register dump ---\n");
1936         for (int w = 0; w < 0x85; w++)
1937                 printk(KERN_DEBUG "CR %p: %p\n", (void *) w,
1938                        (void *) vga_rcrt(NULL, w));
1939         for (int w = 0; w < 0xC7; w++)
1940                 printk(KERN_DEBUG "GR %p: %p\n", (void *) w,
1941                        (void *) vga_rgfx(NULL, w));
1942 #endif
1943         switch (info->fix.accel) {
1944         case FB_ACCEL_NEOMAGIC_NM2070:
1945                 videoRam = 896;
1946                 maxClock = 65000;
1947                 CursorMem = 2048;
1948                 CursorOff = 0x100;
1949                 linearSize = 1024;
1950                 maxWidth = 1024;
1951                 maxHeight = 1024;
1952                 break;
1953         case FB_ACCEL_NEOMAGIC_NM2090:
1954         case FB_ACCEL_NEOMAGIC_NM2093:
1955                 videoRam = 1152;
1956                 maxClock = 80000;
1957                 CursorMem = 2048;
1958                 CursorOff = 0x100;
1959                 linearSize = 2048;
1960                 maxWidth = 1024;
1961                 maxHeight = 1024;
1962                 break;
1963         case FB_ACCEL_NEOMAGIC_NM2097:
1964                 videoRam = 1152;
1965                 maxClock = 80000;
1966                 CursorMem = 1024;
1967                 CursorOff = 0x100;
1968                 linearSize = 2048;
1969                 maxWidth = 1024;
1970                 maxHeight = 1024;
1971                 break;
1972         case FB_ACCEL_NEOMAGIC_NM2160:
1973                 videoRam = 2048;
1974                 maxClock = 90000;
1975                 CursorMem = 1024;
1976                 CursorOff = 0x100;
1977                 linearSize = 2048;
1978                 maxWidth = 1024;
1979                 maxHeight = 1024;
1980                 break;
1981         case FB_ACCEL_NEOMAGIC_NM2200:
1982                 videoRam = 2560;
1983                 maxClock = 110000;
1984                 CursorMem = 1024;
1985                 CursorOff = 0x1000;
1986                 linearSize = 4096;
1987                 maxWidth = 1280;
1988                 maxHeight = 1024;       /* ???? */
1989
1990                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
1991                 break;
1992         case FB_ACCEL_NEOMAGIC_NM2230:
1993                 videoRam = 3008;
1994                 maxClock = 110000;
1995                 CursorMem = 1024;
1996                 CursorOff = 0x1000;
1997                 linearSize = 4096;
1998                 maxWidth = 1280;
1999                 maxHeight = 1024;       /* ???? */
2000
2001                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
2002                 break;
2003         case FB_ACCEL_NEOMAGIC_NM2360:
2004                 videoRam = 4096;
2005                 maxClock = 110000;
2006                 CursorMem = 1024;
2007                 CursorOff = 0x1000;
2008                 linearSize = 4096;
2009                 maxWidth = 1280;
2010                 maxHeight = 1024;       /* ???? */
2011
2012                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
2013                 break;
2014         case FB_ACCEL_NEOMAGIC_NM2380:
2015                 videoRam = 6144;
2016                 maxClock = 110000;
2017                 CursorMem = 1024;
2018                 CursorOff = 0x1000;
2019                 linearSize = 8192;
2020                 maxWidth = 1280;
2021                 maxHeight = 1024;       /* ???? */
2022
2023                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
2024                 break;
2025         }
2026 /*
2027         info->sprite.size = CursorMem;
2028         info->sprite.scan_align = 1;
2029         info->sprite.buf_align = 1;
2030         info->sprite.flags = FB_PIXMAP_IO;
2031         info->sprite.outbuf = neofb_draw_cursor;
2032 */
2033         par->maxClock = maxClock;
2034         par->cursorOff = CursorOff;
2035         return ((videoRam * 1024));
2036 }
2037
2038
2039 static struct fb_info *__devinit neo_alloc_fb_info(struct pci_dev *dev, const struct
2040                                                    pci_device_id *id)
2041 {
2042         struct fb_info *info;
2043         struct neofb_par *par;
2044
2045         info = framebuffer_alloc(sizeof(struct neofb_par), &dev->dev);
2046
2047         if (!info)
2048                 return NULL;
2049
2050         par = info->par;
2051
2052         info->fix.accel = id->driver_data;
2053
2054         mutex_init(&par->open_lock);
2055         par->pci_burst = !nopciburst;
2056         par->lcd_stretch = !nostretch;
2057         par->libretto = libretto;
2058
2059         par->internal_display = internal;
2060         par->external_display = external;
2061         info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
2062
2063         switch (info->fix.accel) {
2064         case FB_ACCEL_NEOMAGIC_NM2070:
2065                 snprintf(info->fix.id, sizeof(info->fix.id),
2066                                 "MagicGraph 128");
2067                 break;
2068         case FB_ACCEL_NEOMAGIC_NM2090:
2069                 snprintf(info->fix.id, sizeof(info->fix.id),
2070                                 "MagicGraph 128V");
2071                 break;
2072         case FB_ACCEL_NEOMAGIC_NM2093:
2073                 snprintf(info->fix.id, sizeof(info->fix.id),
2074                                 "MagicGraph 128ZV");
2075                 break;
2076         case FB_ACCEL_NEOMAGIC_NM2097:
2077                 snprintf(info->fix.id, sizeof(info->fix.id),
2078                                 "MagicGraph 128ZV+");
2079                 break;
2080         case FB_ACCEL_NEOMAGIC_NM2160:
2081                 snprintf(info->fix.id, sizeof(info->fix.id),
2082                                 "MagicGraph 128XD");
2083                 break;
2084         case FB_ACCEL_NEOMAGIC_NM2200:
2085                 snprintf(info->fix.id, sizeof(info->fix.id),
2086                                 "MagicGraph 256AV");
2087                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2088                                FBINFO_HWACCEL_COPYAREA |
2089                                FBINFO_HWACCEL_FILLRECT;
2090                 break;
2091         case FB_ACCEL_NEOMAGIC_NM2230:
2092                 snprintf(info->fix.id, sizeof(info->fix.id),
2093                                 "MagicGraph 256AV+");
2094                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2095                                FBINFO_HWACCEL_COPYAREA |
2096                                FBINFO_HWACCEL_FILLRECT;
2097                 break;
2098         case FB_ACCEL_NEOMAGIC_NM2360:
2099                 snprintf(info->fix.id, sizeof(info->fix.id),
2100                                 "MagicGraph 256ZX");
2101                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2102                                FBINFO_HWACCEL_COPYAREA |
2103                                FBINFO_HWACCEL_FILLRECT;
2104                 break;
2105         case FB_ACCEL_NEOMAGIC_NM2380:
2106                 snprintf(info->fix.id, sizeof(info->fix.id),
2107                                 "MagicGraph 256XL+");
2108                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2109                                FBINFO_HWACCEL_COPYAREA |
2110                                FBINFO_HWACCEL_FILLRECT;
2111                 break;
2112         }
2113
2114         info->fix.type = FB_TYPE_PACKED_PIXELS;
2115         info->fix.type_aux = 0;
2116         info->fix.xpanstep = 0;
2117         info->fix.ypanstep = 4;
2118         info->fix.ywrapstep = 0;
2119         info->fix.accel = id->driver_data;
2120
2121         info->fbops = &neofb_ops;
2122         info->pseudo_palette = par->palette;
2123         return info;
2124 }
2125
2126 static void neo_free_fb_info(struct fb_info *info)
2127 {
2128         if (info) {
2129                 /*
2130                  * Free the colourmap
2131                  */
2132                 fb_dealloc_cmap(&info->cmap);
2133                 framebuffer_release(info);
2134         }
2135 }
2136
2137 /* --------------------------------------------------------------------- */
2138
2139 static int __devinit neofb_probe(struct pci_dev *dev,
2140                                  const struct pci_device_id *id)
2141 {
2142         struct fb_info *info;
2143         u_int h_sync, v_sync;
2144         int video_len, err;
2145
2146         DBG("neofb_probe");
2147
2148         err = pci_enable_device(dev);
2149         if (err)
2150                 return err;
2151
2152         err = -ENOMEM;
2153         info = neo_alloc_fb_info(dev, id);
2154         if (!info)
2155                 return err;
2156
2157         err = neo_map_mmio(info, dev);
2158         if (err)
2159                 goto err_map_mmio;
2160
2161         err = neo_scan_monitor(info);
2162         if (err)
2163                 goto err_scan_monitor;
2164
2165         video_len = neo_init_hw(info);
2166         if (video_len < 0) {
2167                 err = video_len;
2168                 goto err_init_hw;
2169         }
2170
2171         err = neo_map_video(info, dev, video_len);
2172         if (err)
2173                 goto err_init_hw;
2174
2175         if (!fb_find_mode(&info->var, info, mode_option, NULL, 0,
2176                         info->monspecs.modedb, 16)) {
2177                 printk(KERN_ERR "neofb: Unable to find usable video mode.\n");
2178                 goto err_map_video;
2179         }
2180
2181         /*
2182          * Calculate the hsync and vsync frequencies.  Note that
2183          * we split the 1e12 constant up so that we can preserve
2184          * the precision and fit the results into 32-bit registers.
2185          *  (1953125000 * 512 = 1e12)
2186          */
2187         h_sync = 1953125000 / info->var.pixclock;
2188         h_sync =
2189             h_sync * 512 / (info->var.xres + info->var.left_margin +
2190                             info->var.right_margin + info->var.hsync_len);
2191         v_sync =
2192             h_sync / (info->var.yres + info->var.upper_margin +
2193                       info->var.lower_margin + info->var.vsync_len);
2194
2195         printk(KERN_INFO "neofb v" NEOFB_VERSION
2196                ": %dkB VRAM, using %dx%d, %d.%03dkHz, %dHz\n",
2197                info->fix.smem_len >> 10, info->var.xres,
2198                info->var.yres, h_sync / 1000, h_sync % 1000, v_sync);
2199
2200         if (fb_alloc_cmap(&info->cmap, 256, 0) < 0)
2201                 goto err_map_video;
2202
2203         err = register_framebuffer(info);
2204         if (err < 0)
2205                 goto err_reg_fb;
2206
2207         printk(KERN_INFO "fb%d: %s frame buffer device\n",
2208                info->node, info->fix.id);
2209
2210         /*
2211          * Our driver data
2212          */
2213         pci_set_drvdata(dev, info);
2214         return 0;
2215
2216 err_reg_fb:
2217         fb_dealloc_cmap(&info->cmap);
2218 err_map_video:
2219         neo_unmap_video(info);
2220 err_init_hw:
2221         fb_destroy_modedb(info->monspecs.modedb);
2222 err_scan_monitor:
2223         neo_unmap_mmio(info);
2224 err_map_mmio:
2225         neo_free_fb_info(info);
2226         return err;
2227 }
2228
2229 static void __devexit neofb_remove(struct pci_dev *dev)
2230 {
2231         struct fb_info *info = pci_get_drvdata(dev);
2232
2233         DBG("neofb_remove");
2234
2235         if (info) {
2236                 /*
2237                  * If unregister_framebuffer fails, then
2238                  * we will be leaving hooks that could cause
2239                  * oopsen laying around.
2240                  */
2241                 if (unregister_framebuffer(info))
2242                         printk(KERN_WARNING
2243                                "neofb: danger danger!  Oopsen imminent!\n");
2244
2245                 neo_unmap_video(info);
2246                 fb_destroy_modedb(info->monspecs.modedb);
2247                 neo_unmap_mmio(info);
2248                 neo_free_fb_info(info);
2249
2250                 /*
2251                  * Ensure that the driver data is no longer
2252                  * valid.
2253                  */
2254                 pci_set_drvdata(dev, NULL);
2255         }
2256 }
2257
2258 static struct pci_device_id neofb_devices[] = {
2259         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2070,
2260          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2070},
2261
2262         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2090,
2263          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2090},
2264
2265         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2093,
2266          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2093},
2267
2268         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2097,
2269          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2097},
2270
2271         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2160,
2272          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2160},
2273
2274         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2200,
2275          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2200},
2276
2277         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2230,
2278          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2230},
2279
2280         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2360,
2281          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2360},
2282
2283         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2380,
2284          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2380},
2285
2286         {0, 0, 0, 0, 0, 0, 0}
2287 };
2288
2289 MODULE_DEVICE_TABLE(pci, neofb_devices);
2290
2291 static struct pci_driver neofb_driver = {
2292         .name =         "neofb",
2293         .id_table =     neofb_devices,
2294         .probe =        neofb_probe,
2295         .remove =       __devexit_p(neofb_remove)
2296 };
2297
2298 /* ************************* init in-kernel code ************************** */
2299
2300 #ifndef MODULE
2301 static int __init neofb_setup(char *options)
2302 {
2303         char *this_opt;
2304
2305         DBG("neofb_setup");
2306
2307         if (!options || !*options)
2308                 return 0;
2309
2310         while ((this_opt = strsep(&options, ",")) != NULL) {
2311                 if (!*this_opt)
2312                         continue;
2313
2314                 if (!strncmp(this_opt, "internal", 8))
2315                         internal = 1;
2316                 else if (!strncmp(this_opt, "external", 8))
2317                         external = 1;
2318                 else if (!strncmp(this_opt, "nostretch", 9))
2319                         nostretch = 1;
2320                 else if (!strncmp(this_opt, "nopciburst", 10))
2321                         nopciburst = 1;
2322                 else if (!strncmp(this_opt, "libretto", 8))
2323                         libretto = 1;
2324                 else
2325                         mode_option = this_opt;
2326         }
2327         return 0;
2328 }
2329 #endif  /*  MODULE  */
2330
2331 static int __init neofb_init(void)
2332 {
2333 #ifndef MODULE
2334         char *option = NULL;
2335
2336         if (fb_get_options("neofb", &option))
2337                 return -ENODEV;
2338         neofb_setup(option);
2339 #endif
2340         return pci_register_driver(&neofb_driver);
2341 }
2342
2343 module_init(neofb_init);
2344
2345 #ifdef MODULE
2346 static void __exit neofb_exit(void)
2347 {
2348         pci_unregister_driver(&neofb_driver);
2349 }
2350
2351 module_exit(neofb_exit);
2352 #endif                          /* MODULE */