2 * Driver for AT91/AT32 LCD Controller
4 * Copyright (C) 2007 Atmel Corporation
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
20 #include <asm/arch/board.h>
21 #include <asm/arch/cpu.h>
22 #include <asm/arch/gpio.h>
24 #include <video/atmel_lcdc.h>
26 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
27 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
29 /* configurable parameters */
30 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
31 #define ATMEL_LCDC_DMA_BURST_LEN 8
33 #if defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91CAP9)
34 #define ATMEL_LCDC_FIFO_SIZE 2048
36 #define ATMEL_LCDC_FIFO_SIZE 512
39 #if defined(CONFIG_ARCH_AT91)
40 #define ATMEL_LCDFB_FBINFO_DEFAULT FBINFO_DEFAULT
42 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
43 struct fb_var_screeninfo *var)
47 #elif defined(CONFIG_AVR32)
48 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
49 | FBINFO_PARTIAL_PAN_OK \
50 | FBINFO_HWACCEL_XPAN \
51 | FBINFO_HWACCEL_YPAN)
53 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
54 struct fb_var_screeninfo *var)
59 pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
61 dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
62 dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
63 lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
65 /* Update configuration */
66 lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
67 lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
68 | ATMEL_LCDC_DMAUPDT);
73 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
74 .type = FB_TYPE_PACKED_PIXELS,
75 .visual = FB_VISUAL_TRUECOLOR,
79 .accel = FB_ACCEL_NONE,
82 static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
86 if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000()))
90 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
92 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
95 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
96 || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
97 && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
98 value = DIV_ROUND_UP(value, 4);
100 value = DIV_ROUND_UP(value, 8);
106 static void atmel_lcdfb_update_dma(struct fb_info *info,
107 struct fb_var_screeninfo *var)
109 struct atmel_lcdfb_info *sinfo = info->par;
110 struct fb_fix_screeninfo *fix = &info->fix;
111 unsigned long dma_addr;
113 dma_addr = (fix->smem_start + var->yoffset * fix->line_length
114 + var->xoffset * var->bits_per_pixel / 8);
118 /* Set framebuffer DMA base address and pixel offset */
119 lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
121 atmel_lcdfb_update_dma2d(sinfo, var);
124 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
126 struct fb_info *info = sinfo->info;
128 dma_free_writecombine(info->device, info->fix.smem_len,
129 info->screen_base, info->fix.smem_start);
133 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
134 * @sinfo: the frame buffer to allocate memory for
136 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
138 struct fb_info *info = sinfo->info;
139 struct fb_var_screeninfo *var = &info->var;
141 info->fix.smem_len = (var->xres_virtual * var->yres_virtual
142 * ((var->bits_per_pixel + 7) / 8));
144 info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
145 (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
147 if (!info->screen_base) {
155 * atmel_lcdfb_check_var - Validates a var passed in.
156 * @var: frame buffer variable screen structure
157 * @info: frame buffer structure that represents a single frame buffer
159 * Checks to see if the hardware supports the state requested by
160 * var passed in. This function does not alter the hardware
161 * state!!! This means the data stored in struct fb_info and
162 * struct atmel_lcdfb_info do not change. This includes the var
163 * inside of struct fb_info. Do NOT change these. This function
164 * can be called on its own if we intent to only test a mode and
165 * not actually set it. The stuff in modedb.c is a example of
166 * this. If the var passed in is slightly off by what the
167 * hardware can support then we alter the var PASSED in to what
168 * we can do. If the hardware doesn't support mode change a
169 * -EINVAL will be returned by the upper layers. You don't need
170 * to implement this function then. If you hardware doesn't
171 * support changing the resolution then this function is not
172 * needed. In this case the driver would just provide a var that
173 * represents the static state the screen is in.
175 * Returns negative errno on error, or zero on success.
177 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
178 struct fb_info *info)
180 struct device *dev = info->device;
181 struct atmel_lcdfb_info *sinfo = info->par;
182 unsigned long clk_value_khz;
184 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
186 dev_dbg(dev, "%s:\n", __func__);
187 dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
188 dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
189 dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
190 dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
192 if ((PICOS2KHZ(var->pixclock) * var->bits_per_pixel / 8) > clk_value_khz) {
193 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
197 /* Force same alignment for each line */
198 var->xres = (var->xres + 3) & ~3UL;
199 var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
201 var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
202 var->transp.msb_right = 0;
203 var->transp.offset = var->transp.length = 0;
204 var->xoffset = var->yoffset = 0;
206 /* Saturate vertical and horizontal timings at maximum values */
207 var->vsync_len = min_t(u32, var->vsync_len,
208 (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
209 var->upper_margin = min_t(u32, var->upper_margin,
210 ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
211 var->lower_margin = min_t(u32, var->lower_margin,
213 var->right_margin = min_t(u32, var->right_margin,
214 (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
215 var->hsync_len = min_t(u32, var->hsync_len,
216 (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
217 var->left_margin = min_t(u32, var->left_margin,
220 /* Some parameters can't be zero */
221 var->vsync_len = max_t(u32, var->vsync_len, 1);
222 var->right_margin = max_t(u32, var->right_margin, 1);
223 var->hsync_len = max_t(u32, var->hsync_len, 1);
224 var->left_margin = max_t(u32, var->left_margin, 1);
226 switch (var->bits_per_pixel) {
231 var->red.offset = var->green.offset = var->blue.offset = 0;
232 var->red.length = var->green.length = var->blue.length
233 = var->bits_per_pixel;
238 var->green.offset = 5;
239 var->blue.offset = 10;
240 var->red.length = var->green.length = var->blue.length = 5;
243 var->transp.offset = 24;
244 var->transp.length = 8;
248 var->green.offset = 8;
249 var->blue.offset = 16;
250 var->red.length = var->green.length = var->blue.length = 8;
253 dev_err(dev, "color depth %d not supported\n",
254 var->bits_per_pixel);
262 * atmel_lcdfb_set_par - Alters the hardware state.
263 * @info: frame buffer structure that represents a single frame buffer
265 * Using the fb_var_screeninfo in fb_info we set the resolution
266 * of the this particular framebuffer. This function alters the
267 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
268 * not alter var in fb_info since we are using that data. This
269 * means we depend on the data in var inside fb_info to be
270 * supported by the hardware. atmel_lcdfb_check_var is always called
271 * before atmel_lcdfb_set_par to ensure this. Again if you can't
272 * change the resolution you don't need this function.
275 static int atmel_lcdfb_set_par(struct fb_info *info)
277 struct atmel_lcdfb_info *sinfo = info->par;
278 unsigned long hozval_linesz;
280 unsigned long clk_value_khz;
281 unsigned long bits_per_line;
283 dev_dbg(info->device, "%s:\n", __func__);
284 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
285 info->var.xres, info->var.yres,
286 info->var.xres_virtual, info->var.yres_virtual);
288 /* Turn off the LCD controller and the DMA controller */
289 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
291 /* Wait for the LCDC core to become idle */
292 while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
295 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
297 if (info->var.bits_per_pixel == 1)
298 info->fix.visual = FB_VISUAL_MONO01;
299 else if (info->var.bits_per_pixel <= 8)
300 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
302 info->fix.visual = FB_VISUAL_TRUECOLOR;
304 bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
305 info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
307 /* Re-initialize the DMA engine... */
308 dev_dbg(info->device, " * update DMA engine\n");
309 atmel_lcdfb_update_dma(info, &info->var);
311 /* ...set frame size and burst length = 8 words (?) */
312 value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
313 value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
314 lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
316 /* Now, the LCDC core... */
318 /* Set pixel clock */
319 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
321 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
323 value = (value / 2) - 1;
324 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", value);
327 dev_notice(info->device, "Bypassing pixel clock divider\n");
328 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
330 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET);
331 info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1)));
332 dev_dbg(info->device, " updated pixclk: %lu KHz\n",
333 PICOS2KHZ(info->var.pixclock));
337 /* Initialize control register 2 */
338 value = sinfo->default_lcdcon2;
340 if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
341 value |= ATMEL_LCDC_INVLINE_INVERTED;
342 if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
343 value |= ATMEL_LCDC_INVFRAME_INVERTED;
345 switch (info->var.bits_per_pixel) {
346 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
347 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
348 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
349 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
350 case 15: /* fall through */
351 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
352 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
353 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
354 default: BUG(); break;
356 dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
357 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
359 /* Vertical timing */
360 value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
361 value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
362 value |= info->var.lower_margin;
363 dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
364 lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
366 /* Horizontal timing */
367 value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
368 value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
369 value |= (info->var.left_margin - 1);
370 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
371 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
373 /* Horizontal value (aka line size) */
374 hozval_linesz = compute_hozval(info->var.xres,
375 lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
378 value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
379 value |= info->var.yres - 1;
380 dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
381 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
383 /* FIFO Threshold: Use formula from data sheet */
384 value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
385 lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
387 /* Toggle LCD_MODE every frame */
388 lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
390 /* Disable all interrupts */
391 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
394 value = ATMEL_LCDC_PS_DIV8 | ATMEL_LCDC_POL_POSITIVE | ATMEL_LCDC_ENA_PWMENABLE;
395 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, value);
396 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
397 /* ...wait for DMA engine to become idle... */
398 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
401 dev_dbg(info->device, " * re-enable DMA engine\n");
402 /* ...and enable it with updated configuration */
403 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
405 dev_dbg(info->device, " * re-enable LCDC core\n");
406 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
407 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
409 dev_dbg(info->device, " * DONE\n");
414 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
417 chan >>= 16 - bf->length;
418 return chan << bf->offset;
422 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
423 * @regno: Which register in the CLUT we are programming
424 * @red: The red value which can be up to 16 bits wide
425 * @green: The green value which can be up to 16 bits wide
426 * @blue: The blue value which can be up to 16 bits wide.
427 * @transp: If supported the alpha value which can be up to 16 bits wide.
428 * @info: frame buffer info structure
430 * Set a single color register. The values supplied have a 16 bit
431 * magnitude which needs to be scaled in this function for the hardware.
432 * Things to take into consideration are how many color registers, if
433 * any, are supported with the current color visual. With truecolor mode
434 * no color palettes are supported. Here a psuedo palette is created
435 * which we store the value in pseudo_palette in struct fb_info. For
436 * pseudocolor mode we have a limited color palette. To deal with this
437 * we can program what color is displayed for a particular pixel value.
438 * DirectColor is similar in that we can program each color field. If
439 * we have a static colormap we don't need to implement this function.
441 * Returns negative errno on error, or zero on success. In an
442 * ideal world, this would have been the case, but as it turns
443 * out, the other drivers return 1 on failure, so that's what
446 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
447 unsigned int green, unsigned int blue,
448 unsigned int transp, struct fb_info *info)
450 struct atmel_lcdfb_info *sinfo = info->par;
455 if (info->var.grayscale)
456 red = green = blue = (19595 * red + 38470 * green
457 + 7471 * blue) >> 16;
459 switch (info->fix.visual) {
460 case FB_VISUAL_TRUECOLOR:
462 pal = info->pseudo_palette;
464 val = chan_to_field(red, &info->var.red);
465 val |= chan_to_field(green, &info->var.green);
466 val |= chan_to_field(blue, &info->var.blue);
473 case FB_VISUAL_PSEUDOCOLOR:
475 val = ((red >> 11) & 0x001f);
476 val |= ((green >> 6) & 0x03e0);
477 val |= ((blue >> 1) & 0x7c00);
480 * TODO: intensity bit. Maybe something like
481 * ~(red[10] ^ green[10] ^ blue[10]) & 1
484 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
489 case FB_VISUAL_MONO01:
491 val = (regno == 0) ? 0x00 : 0x1F;
492 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
502 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
503 struct fb_info *info)
505 dev_dbg(info->device, "%s\n", __func__);
507 atmel_lcdfb_update_dma(info, var);
512 static struct fb_ops atmel_lcdfb_ops = {
513 .owner = THIS_MODULE,
514 .fb_check_var = atmel_lcdfb_check_var,
515 .fb_set_par = atmel_lcdfb_set_par,
516 .fb_setcolreg = atmel_lcdfb_setcolreg,
517 .fb_pan_display = atmel_lcdfb_pan_display,
518 .fb_fillrect = cfb_fillrect,
519 .fb_copyarea = cfb_copyarea,
520 .fb_imageblit = cfb_imageblit,
523 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
525 struct fb_info *info = dev_id;
526 struct atmel_lcdfb_info *sinfo = info->par;
529 status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
530 lcdc_writel(sinfo, ATMEL_LCDC_IDR, status);
534 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
536 struct fb_info *info = sinfo->info;
539 memset_io(info->screen_base, 0, info->fix.smem_len);
540 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
542 dev_info(info->device,
543 "%luKiB frame buffer at %08lx (mapped at %p)\n",
544 (unsigned long)info->fix.smem_len / 1024,
545 (unsigned long)info->fix.smem_start,
548 /* Allocate colormap */
549 ret = fb_alloc_cmap(&info->cmap, 256, 0);
551 dev_err(info->device, "Alloc color map failed\n");
556 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
559 clk_enable(sinfo->bus_clk);
560 clk_enable(sinfo->lcdc_clk);
563 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
566 clk_disable(sinfo->bus_clk);
567 clk_disable(sinfo->lcdc_clk);
571 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
573 struct device *dev = &pdev->dev;
574 struct fb_info *info;
575 struct atmel_lcdfb_info *sinfo;
576 struct atmel_lcdfb_info *pdata_sinfo;
577 struct resource *regs = NULL;
578 struct resource *map = NULL;
581 dev_dbg(dev, "%s BEGIN\n", __func__);
584 info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
586 dev_err(dev, "cannot allocate memory\n");
592 if (dev->platform_data) {
593 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
594 sinfo->default_bpp = pdata_sinfo->default_bpp;
595 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
596 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
597 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
598 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
599 sinfo->guard_time = pdata_sinfo->guard_time;
601 dev_err(dev, "cannot get default configuration\n");
607 strcpy(info->fix.id, sinfo->pdev->name);
608 info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
609 info->pseudo_palette = sinfo->pseudo_palette;
610 info->fbops = &atmel_lcdfb_ops;
612 memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
613 info->fix = atmel_lcdfb_fix;
615 /* Enable LCDC Clocks */
616 if (cpu_is_at91sam9261() || cpu_is_at32ap7000()) {
617 sinfo->bus_clk = clk_get(dev, "hck1");
618 if (IS_ERR(sinfo->bus_clk)) {
619 ret = PTR_ERR(sinfo->bus_clk);
623 sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
624 if (IS_ERR(sinfo->lcdc_clk)) {
625 ret = PTR_ERR(sinfo->lcdc_clk);
628 atmel_lcdfb_start_clock(sinfo);
630 ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
631 info->monspecs.modedb_len, info->monspecs.modedb,
634 dev_err(dev, "no suitable video mode found\n");
639 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
641 dev_err(dev, "resources unusable\n");
646 sinfo->irq_base = platform_get_irq(pdev, 0);
647 if (sinfo->irq_base < 0) {
648 dev_err(dev, "unable to get irq\n");
649 ret = sinfo->irq_base;
653 /* Initialize video memory */
654 map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
656 /* use a pre-allocated memory buffer */
657 info->fix.smem_start = map->start;
658 info->fix.smem_len = map->end - map->start + 1;
659 if (!request_mem_region(info->fix.smem_start,
660 info->fix.smem_len, pdev->name)) {
665 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
666 if (!info->screen_base)
669 /* alocate memory buffer */
670 ret = atmel_lcdfb_alloc_video_memory(sinfo);
672 dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
678 info->fix.mmio_start = regs->start;
679 info->fix.mmio_len = regs->end - regs->start + 1;
681 if (!request_mem_region(info->fix.mmio_start,
682 info->fix.mmio_len, pdev->name)) {
687 sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
689 dev_err(dev, "cannot map LCDC registers\n");
694 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
696 dev_err(dev, "request_irq failed: %d\n", ret);
700 ret = atmel_lcdfb_init_fbinfo(sinfo);
702 dev_err(dev, "init fbinfo failed: %d\n", ret);
703 goto unregister_irqs;
707 * This makes sure that our colour bitfield
708 * descriptors are correctly initialised.
710 atmel_lcdfb_check_var(&info->var, info);
712 ret = fb_set_var(info, &info->var);
714 dev_warn(dev, "unable to set display parameters\n");
718 dev_set_drvdata(dev, info);
721 * Tell the world that we're ready to go
723 ret = register_framebuffer(info);
725 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
729 /* Power up the LCDC screen */
730 if (sinfo->atmel_lcdfb_power_control)
731 sinfo->atmel_lcdfb_power_control(1);
733 dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
734 info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
740 fb_dealloc_cmap(&info->cmap);
742 free_irq(sinfo->irq_base, info);
744 iounmap(sinfo->mmio);
746 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
749 iounmap(info->screen_base);
751 atmel_lcdfb_free_video_memory(sinfo);
755 release_mem_region(info->fix.smem_start, info->fix.smem_len);
757 atmel_lcdfb_stop_clock(sinfo);
758 clk_put(sinfo->lcdc_clk);
761 clk_put(sinfo->bus_clk);
763 framebuffer_release(info);
765 dev_dbg(dev, "%s FAILED\n", __func__);
769 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
771 struct device *dev = &pdev->dev;
772 struct fb_info *info = dev_get_drvdata(dev);
773 struct atmel_lcdfb_info *sinfo = info->par;
778 if (sinfo->atmel_lcdfb_power_control)
779 sinfo->atmel_lcdfb_power_control(0);
780 unregister_framebuffer(info);
781 atmel_lcdfb_stop_clock(sinfo);
782 clk_put(sinfo->lcdc_clk);
784 clk_put(sinfo->bus_clk);
785 fb_dealloc_cmap(&info->cmap);
786 free_irq(sinfo->irq_base, info);
787 iounmap(sinfo->mmio);
788 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
789 if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
790 iounmap(info->screen_base);
791 release_mem_region(info->fix.smem_start, info->fix.smem_len);
793 atmel_lcdfb_free_video_memory(sinfo);
796 dev_set_drvdata(dev, NULL);
797 framebuffer_release(info);
802 static struct platform_driver atmel_lcdfb_driver = {
803 .remove = __exit_p(atmel_lcdfb_remove),
805 .name = "atmel_lcdfb",
806 .owner = THIS_MODULE,
810 static int __init atmel_lcdfb_init(void)
812 return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
815 static void __exit atmel_lcdfb_exit(void)
817 platform_driver_unregister(&atmel_lcdfb_driver);
820 module_init(atmel_lcdfb_init);
821 module_exit(atmel_lcdfb_exit);
823 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
824 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
825 MODULE_LICENSE("GPL");