2 * Copyright (C) 2005-2006 by Texas Instruments
4 * This file is part of the Inventra Controller Driver for Linux.
6 * The Inventra Controller Driver for Linux is free software; you
7 * can redistribute it and/or modify it under the terms of the GNU
8 * General Public License version 2 as published by the Free Software
11 * The Inventra Controller Driver for Linux is distributed in
12 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
13 * without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 * License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with The Inventra Controller Driver for Linux ; if not,
19 * write to the Free Software Foundation, Inc., 59 Temple Place,
20 * Suite 330, Boston, MA 02111-1307 USA
23 #include <linux/module.h>
24 #include <linux/kernel.h>
25 #include <linux/sched.h>
26 #include <linux/slab.h>
27 #include <linux/init.h>
28 #include <linux/list.h>
29 #include <linux/clk.h>
32 #include <asm/mach-types.h>
33 #include <asm/arch/hardware.h>
34 #include <asm/arch/mux.h>
36 #include "musb_core.h"
39 #ifdef CONFIG_ARCH_OMAP3430
40 #define get_cpu_rev() 2
44 void musb_platform_enable(struct musb *musb)
47 void musb_platform_disable(struct musb *musb)
50 static void omap_vbus_power(struct musb *musb, int is_on, int sleeping)
54 static void omap_set_vbus(struct musb *musb, int is_on)
57 /* HDRC controls CPEN, but beware current surges during device
58 * connect. They can trigger transient overcurrent conditions
59 * that must be ignored.
62 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
66 musb->xceiv.default_a = 1;
67 musb->xceiv.state = OTG_STATE_A_WAIT_VRISE;
68 devctl |= MUSB_DEVCTL_SESSION;
74 /* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and
75 * jumping right to B_IDLE...
78 musb->xceiv.default_a = 0;
79 musb->xceiv.state = OTG_STATE_B_IDLE;
80 devctl &= ~MUSB_DEVCTL_SESSION;
84 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
86 DBG(1, "VBUS %s, devctl %02x "
87 /* otg %3x conf %08x prcm %08x */ "\n",
88 otg_state_string(musb),
89 musb_readb(musb->mregs, MUSB_DEVCTL));
91 static int omap_set_power(struct otg_transceiver *x, unsigned mA)
96 int musb_platform_resume(struct musb *musb);
98 int __init musb_platform_init(struct musb *musb)
100 #if defined(CONFIG_ARCH_OMAP2430)
101 omap_cfg_reg(AE5_2430_USB0HS_STP);
103 musb->clock = clk_get((struct device *)musb->controller, "usbhs_ick");
105 musb->clock = clk_get((struct device *)musb->controller, "hsusb_ick");
107 if(IS_ERR(musb->clock))
108 return PTR_ERR(musb->clock);
110 musb_platform_resume(musb);
112 OTG_INTERFSEL_REG |= ULPI_12PIN;
114 pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
115 "sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
116 OTG_REVISION_REG, OTG_SYSCONFIG_REG, OTG_SYSSTATUS_REG,
117 OTG_INTERFSEL_REG, OTG_SIMENABLE_REG);
119 omap_vbus_power(musb, musb->board_mode == MUSB_HOST, 1);
122 if (is_host_enabled(musb))
123 musb->board_set_vbus = omap_set_vbus;
124 if (is_peripheral_enabled(musb))
125 musb->xceiv.set_power = omap_set_power;
130 int musb_platform_suspend(struct musb *musb)
133 OTG_FORCESTDBY_REG &= ~ENABLEFORCE; /* disable MSTANDBY */
134 OTG_SYSCONFIG_REG &= FORCESTDBY; /* enable force standby */
135 OTG_SYSCONFIG_REG &= ~AUTOIDLE; /* disable auto idle */
136 OTG_SYSCONFIG_REG |= SMARTIDLE; /* enable smart idle */
137 OTG_FORCESTDBY_REG |= ENABLEFORCE; /* enable MSTANDBY */
138 OTG_SYSCONFIG_REG |= AUTOIDLE; /* enable auto idle */
140 clk_disable(musb->clock);
144 int musb_platform_resume(struct musb *musb)
146 clk_enable(musb->clock);
148 OTG_FORCESTDBY_REG &= ~ENABLEFORCE; /* disable MSTANDBY */
149 OTG_SYSCONFIG_REG |= SMARTSTDBY; /* enable smart standby */
150 OTG_SYSCONFIG_REG &= ~AUTOIDLE; /* disable auto idle */
151 OTG_SYSCONFIG_REG |= SMARTIDLE; /* enable smart idle */
152 OTG_SYSCONFIG_REG |= AUTOIDLE; /* enable auto idle */
158 int musb_platform_exit(struct musb *musb)
161 omap_vbus_power(musb, 0 /*off*/, 1);
163 musb_platform_suspend(musb);
165 clk_put(musb->clock);