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1 /*
2  * ehci-omap.h - register definitions for USBHOST in OMAP 34xx
3  *
4  * Copyright (C) 2007-2008 Texas Instruments, Inc.
5  * Copyright (C) 2007-2008 Vikram Pandita <vikram.pandita@ti.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
20  *
21  */
22
23 #ifndef __EHCI_OMAP_H
24 #define __EHCI_OMAP_H
25
26 #include <asm/hardware.h>
27 #include "../../../arch/arm/mach-omap2/cm.h"
28 #include "../../../arch/arm/mach-omap2/cm_regbits_34xx.h"
29
30 /*
31  * OMAP USBHOST Register addresses: PHYSICAL ADDRESSES
32  *      Use omap_readl()/omap_writel() functions
33  */
34
35 /* USBHOST: TLL, UUH, OHCI, EHCI */
36 #define OMAP_USBHOST_BASE       (L4_34XX_BASE + 0x60000)
37
38 /* TLL Register Set */
39 #define OMAP_USBHOST_TLL_BASE   (OMAP_USBHOST_BASE + 0x2000)
40 #define OMAP_USBTLL_REVISION    (OMAP_USBHOST_TLL_BASE + 0x00)
41 #define OMAP_USBTLL_SYSCONFIG   (OMAP_USBHOST_TLL_BASE + 0x10)
42         #define OMAP_USBTLL_SYSCONFIG_CACTIVITY_SHIFT   8
43         #define OMAP_USBTLL_SYSCONFIG_SIDLEMODE_SHIFT   3
44         #define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP_SHIFT   2
45         #define OMAP_USBTLL_SYSCONFIG_SOFTRESET_SHIFT   1
46         #define OMAP_USBTLL_SYSCONFIG_AUTOIDLE_SHIFT    0
47 #define OMAP_USBTLL_SYSSTATUS   (OMAP_USBHOST_TLL_BASE + 0x14)
48         #define OMAP_USBTLL_SYSSTATUS_RESETDONE_SHIFT   0
49 #define OMAP_USBTLL_IRQSTATUS   (OMAP_USBHOST_TLL_BASE + 0x18)
50 #define OMAP_USBTLL_IRQENABLE   (OMAP_USBHOST_TLL_BASE + 0x1C)
51
52 #define OMAP_TLL_SHARED_CONF    (OMAP_USBHOST_TLL_BASE + 0x30)
53         #define OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN_SHFT        6
54         #define OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN_SHIFT      5
55         #define OMAP_TLL_SHARED_CONF_USB_DIVRATION_SHIFT        2
56         #define OMAP_TLL_SHARED_CONF_FCLK_REQ_SHIFT             1
57         #define OMAP_TLL_SHARED_CONF_FCLK_IS_ON_SHIFT           0
58
59 #define OMAP_TLL_CHANNEL_CONF(num)\
60                         (OMAP_USBHOST_TLL_BASE + (0x040 + 0x004 * num))
61         #define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF_SHIFT      11
62         #define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE_SHIFT   10
63         #define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE_SHIFT        9
64         #define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE_SHIFT         8
65         #define OMAP_TLL_CHANNEL_CONF_CHANEN_SHIFT              0
66
67 #define OMAP_TLL_ULPI_FUNCTION_CTRL(num)\
68                         (OMAP_USBHOST_TLL_BASE + (0x804 + 0x100 * num))
69 #define OMAP_TLL_ULPI_INTERFACE_CTRL(num)\
70                         (OMAP_USBHOST_TLL_BASE + (0x807 + 0x100 * num))
71 #define OMAP_TLL_ULPI_OTG_CTRL(num)\
72                         (OMAP_USBHOST_TLL_BASE + (0x80A + 0x100 * num))
73 #define OMAP_TLL_ULPI_INT_EN_RISE(num)\
74                         (OMAP_USBHOST_TLL_BASE + (0x80D + 0x100 * num))
75 #define OMAP_TLL_ULPI_INT_EN_FALL(num)\
76                         (OMAP_USBHOST_TLL_BASE + (0x810 + 0x100 * num))
77 #define OMAP_TLL_ULPI_INT_STATUS(num)\
78                         (OMAP_USBHOST_TLL_BASE + (0x813 + 0x100 * num))
79 #define OMAP_TLL_ULPI_INT_LATCH(num)\
80                         (OMAP_USBHOST_TLL_BASE + (0x814 + 0x100 * num))
81 #define OMAP_TLL_ULPI_DEBUG(num)\
82                         (OMAP_USBHOST_TLL_BASE + (0x815 + 0x100 * num))
83 #define OMAP_TLL_ULPI_SCRATCH_REGISTER(num)\
84                         (OMAP_USBHOST_TLL_BASE + (0x8165 + 0x100 * num))
85
86 /* UHH Register Set */
87 #define OMAP_USBHOST_UHH_BASE   (OMAP_USBHOST_BASE + 0x4000)
88 #define OMAP_UHH_REVISION       (OMAP_USBHOST_UHH_BASE + 0x00)
89 #define OMAP_UHH_SYSCONFIG      (OMAP_USBHOST_UHH_BASE + 0x10)
90         #define OMAP_UHH_SYSCONFIG_MIDLEMODE_SHIFT      12
91         #define OMAP_UHH_SYSCONFIG_CACTIVITY_SHIFT      8
92         #define OMAP_UHH_SYSCONFIG_SIDLEMODE_SHIFT      3
93         #define OMAP_UHH_SYSCONFIG_ENAWAKEUP_SHIFT      2
94         #define OMAP_UHH_SYSCONFIG_SOFTRESET_SHIFT      1
95         #define OMAP_UHH_SYSCONFIG_AUTOIDLE_SHIFT       0
96
97 #define OMAP_UHH_SYSSTATUS      (OMAP_USBHOST_UHH_BASE + 0x14)
98 #define OMAP_UHH_HOSTCONFIG     (OMAP_USBHOST_UHH_BASE + 0x40)
99         #define OMAP_UHH_HOSTCONFIG_ULPI_BYPASS_SHIFT   0
100
101 #define OMAP_UHH_DEBUG_CSR      (OMAP_USBHOST_UHH_BASE + 0x44)
102
103 /* EHCI Register Set */
104 #define OMAP_USBHOST_EHCI_BASE  (OMAP_USBHOST_BASE + 0x4800)
105 #define EHCI_INSNREG05_ULPI             (OMAP_USBHOST_EHCI_BASE + 0xA4)
106         #define EHCI_INSNREG05_ULPI_CONTROL_SHIFT       31
107         #define EHCI_INSNREG05_ULPI_PORTSEL_SHIFT       24
108         #define EHCI_INSNREG05_ULPI_OPSEL_SHIFT         22
109         #define EHCI_INSNREG05_ULPI_REGADD_SHIFT        16
110         #define EHCI_INSNREG05_ULPI_EXTREGADD_SHIFT     8
111         #define EHCI_INSNREG05_ULPI_WRDATA_SHIFT        0
112
113 /* OHCI Register Set */
114 #define OMAP_USBHOST_OHCI_BASE  (OMAP_USBHOST_BASE + 0x4400)
115
116 #endif/* __EHCI_OMAP_H*/