drivers/usb/gadget/fsl_usb2_udc.c

   1 /*
   2  * Copyright (C) 2004-2007 Freescale Semicondutor, Inc. All rights reserved.
   3  *
   4  * Author: Li Yang <leoli@freescale.com>
   5  *         Jiang Bo <tanya.jiang@freescale.com>
   6  *
   7  * Description:
   8  * Freescale high-speed USB SOC DR module device controller driver.
   9  * This can be found on MPC8349E/MPC8313E cpus.
  10  * The driver is previously named as mpc_udc.  Based on bare board
  11  * code from Dave Liu and Shlomi Gridish.
  12  *
  13  * This program is free software; you can redistribute  it and/or modify it
  14  * under  the terms of  the GNU General  Public License as published by the
  15  * Free Software Foundation;  either version 2 of the  License, or (at your
  16  * option) any later version.
  17  */
  18
  19 #undef VERBOSE
  20
  21 #include <linux/module.h>
  22 #include <linux/kernel.h>
  23 #include <linux/ioport.h>
  24 #include <linux/types.h>
  25 #include <linux/errno.h>
  26 #include <linux/slab.h>
  27 #include <linux/init.h>
  28 #include <linux/list.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/proc_fs.h>
  31 #include <linux/mm.h>
  32 #include <linux/moduleparam.h>
  33 #include <linux/device.h>
  34 #include <linux/usb/ch9.h>
  35 #include <linux/usb/gadget.h>
  36 #include <linux/usb/otg.h>
  37 #include <linux/dma-mapping.h>
  38 #include <linux/platform_device.h>
  39 #include <linux/fsl_devices.h>
  40 #include <linux/dmapool.h>
  41
  42 #include <asm/byteorder.h>
  43 #include <asm/io.h>
  44 #include <asm/system.h>
  45 #include <asm/unaligned.h>
  46 #include <asm/dma.h>
  47
  48 #include "fsl_usb2_udc.h"
  49
  50 #define DRIVER_DESC     "Freescale High-Speed USB SOC Device Controller driver"
  51 #define DRIVER_AUTHOR   "Li Yang/Jiang Bo"
  52 #define DRIVER_VERSION  "Apr 20, 2007"
  53
  54 #define DMA_ADDR_INVALID        (~(dma_addr_t)0)
  55
  56 static const char driver_name[] = "fsl-usb2-udc";
  57 static const char driver_desc[] = DRIVER_DESC;
  58
  59 static struct usb_dr_device *dr_regs;
  60 static struct usb_sys_interface *usb_sys_regs;
  61
  62 /* it is initialized in probe()  */
  63 static struct fsl_udc *udc_controller = NULL;
  64
  65 static const struct usb_endpoint_descriptor
  66 fsl_ep0_desc = {
  67         .bLength =              USB_DT_ENDPOINT_SIZE,
  68         .bDescriptorType =      USB_DT_ENDPOINT,
  69         .bEndpointAddress =     0,
  70         .bmAttributes =         USB_ENDPOINT_XFER_CONTROL,
  71         .wMaxPacketSize =       USB_MAX_CTRL_PAYLOAD,
  72 };
  73
  74 static void fsl_ep_fifo_flush(struct usb_ep *_ep);
  75
  76 #ifdef CONFIG_PPC32
  77 #define fsl_readl(addr)         in_le32(addr)
  78 #define fsl_writel(val32, addr) out_le32(addr, val32)
  79 #else
  80 #define fsl_readl(addr)         readl(addr)
  81 #define fsl_writel(val32, addr) writel(val32, addr)
  82 #endif
  83
  84 /********************************************************************
  85  *      Internal Used Function
  86 ********************************************************************/
  87 /*-----------------------------------------------------------------
  88  * done() - retire a request; caller blocked irqs
  89  * @status : request status to be set, only works when
  90  *      request is still in progress.
  91  *--------------------------------------------------------------*/
  92 static void done(struct fsl_ep *ep, struct fsl_req *req, int status)
  93 {
  94         struct fsl_udc *udc = NULL;
  95         unsigned char stopped = ep->stopped;
  96         struct ep_td_struct *curr_td, *next_td;
  97         int j;
  98
  99         udc = (struct fsl_udc *)ep->udc;
 100         /* Removed the req from fsl_ep->queue */
 101         list_del_init(&req->queue);
 102
 103         /* req.status should be set as -EINPROGRESS in ep_queue() */
 104         if (req->req.status == -EINPROGRESS)
 105                 req->req.status = status;
 106         else
 107                 status = req->req.status;
 108
 109         /* Free dtd for the request */
 110         next_td = req->head;
 111         for (j = 0; j < req->dtd_count; j++) {
 112                 curr_td = next_td;
 113                 if (j != req->dtd_count - 1) {
 114                         next_td = curr_td->next_td_virt;
 115                 }
 116                 dma_pool_free(udc->td_pool, curr_td, curr_td->td_dma);
 117         }
 118
 119         if (req->mapped) {
 120                 dma_unmap_single(ep->udc->gadget.dev.parent,
 121                         req->req.dma, req->req.length,
 122                         ep_is_in(ep)
 123                                 ? DMA_TO_DEVICE
 124                                 : DMA_FROM_DEVICE);
 125                 req->req.dma = DMA_ADDR_INVALID;
 126                 req->mapped = 0;
 127         } else
 128                 dma_sync_single_for_cpu(ep->udc->gadget.dev.parent,
 129                         req->req.dma, req->req.length,
 130                         ep_is_in(ep)
 131                                 ? DMA_TO_DEVICE
 132                                 : DMA_FROM_DEVICE);
 133
 134         if (status && (status != -ESHUTDOWN))
 135                 VDBG("complete %s req %p stat %d len %u/%u",
 136                         ep->ep.name, &req->req, status,
 137                         req->req.actual, req->req.length);
 138
 139         ep->stopped = 1;
 140
 141         spin_unlock(&ep->udc->lock);
 142         /* complete() is from gadget layer,
 143          * eg fsg->bulk_in_complete() */
 144         if (req->req.complete)
 145                 req->req.complete(&ep->ep, &req->req);
 146
 147         spin_lock(&ep->udc->lock);
 148         ep->stopped = stopped;
 149 }
 150
 151 /*-----------------------------------------------------------------
 152  * nuke(): delete all requests related to this ep
 153  * called with spinlock held
 154  *--------------------------------------------------------------*/
 155 static void nuke(struct fsl_ep *ep, int status)
 156 {
 157         ep->stopped = 1;
 158
 159         /* Flush fifo */
 160         fsl_ep_fifo_flush(&ep->ep);
 161
 162         /* Whether this eq has request linked */
 163         while (!list_empty(&ep->queue)) {
 164                 struct fsl_req *req = NULL;
 165
 166                 req = list_entry(ep->queue.next, struct fsl_req, queue);
 167                 done(ep, req, status);
 168         }
 169 }
 170
 171 /*------------------------------------------------------------------
 172         Internal Hardware related function
 173  ------------------------------------------------------------------*/
 174
 175 static int dr_controller_setup(struct fsl_udc *udc)
 176 {
 177         unsigned int tmp = 0, portctrl = 0, ctrl = 0;
 178         unsigned long timeout;
 179 #define FSL_UDC_RESET_TIMEOUT 1000
 180
 181         /* Stop and reset the usb controller */
 182         tmp = fsl_readl(&dr_regs->usbcmd);
 183         tmp &= ~USB_CMD_RUN_STOP;
 184         fsl_writel(tmp, &dr_regs->usbcmd);
 185
 186         tmp = fsl_readl(&dr_regs->usbcmd);
 187         tmp |= USB_CMD_CTRL_RESET;
 188         fsl_writel(tmp, &dr_regs->usbcmd);
 189
 190         /* Wait for reset to complete */
 191         timeout = jiffies + FSL_UDC_RESET_TIMEOUT;
 192         while (fsl_readl(&dr_regs->usbcmd) & USB_CMD_CTRL_RESET) {
 193                 if (time_after(jiffies, timeout)) {
 194                         ERR("udc reset timeout!\n");
 195                         return -ETIMEDOUT;
 196                 }
 197                 cpu_relax();
 198         }
 199
 200         /* Set the controller as device mode */
 201         tmp = fsl_readl(&dr_regs->usbmode);
 202         tmp |= USB_MODE_CTRL_MODE_DEVICE;
 203         /* Disable Setup Lockout */
 204         tmp |= USB_MODE_SETUP_LOCK_OFF;
 205         fsl_writel(tmp, &dr_regs->usbmode);
 206
 207         /* Clear the setup status */
 208         fsl_writel(0, &dr_regs->usbsts);
 209
 210         tmp = udc->ep_qh_dma;
 211         tmp &= USB_EP_LIST_ADDRESS_MASK;
 212         fsl_writel(tmp, &dr_regs->endpointlistaddr);
 213
 214         VDBG("vir[qh_base] is %p phy[qh_base] is 0x%8x reg is 0x%8x",
 215                 udc->ep_qh, (int)tmp,
 216                 fsl_readl(&dr_regs->endpointlistaddr));
 217
 218         /* Config PHY interface */
 219         portctrl = fsl_readl(&dr_regs->portsc1);
 220         portctrl &= ~(PORTSCX_PHY_TYPE_SEL | PORTSCX_PORT_WIDTH);
 221         switch (udc->phy_mode) {
 222         case FSL_USB2_PHY_ULPI:
 223                 portctrl |= PORTSCX_PTS_ULPI;
 224                 break;
 225         case FSL_USB2_PHY_UTMI_WIDE:
 226                 portctrl |= PORTSCX_PTW_16BIT;
 227                 /* fall through */
 228         case FSL_USB2_PHY_UTMI:
 229                 portctrl |= PORTSCX_PTS_UTMI;
 230                 break;
 231         case FSL_USB2_PHY_SERIAL:
 232                 portctrl |= PORTSCX_PTS_FSLS;
 233                 break;
 234         default:
 235                 return -EINVAL;
 236         }
 237         fsl_writel(portctrl, &dr_regs->portsc1);
 238
 239         /* Config control enable i/o output, cpu endian register */
 240         ctrl = __raw_readl(&usb_sys_regs->control);
 241         ctrl |= USB_CTRL_IOENB;
 242         __raw_writel(ctrl, &usb_sys_regs->control);
 243
 244 #if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
 245         /* Turn on cache snooping hardware, since some PowerPC platforms
 246          * wholly rely on hardware to deal with cache coherent. */
 247
 248         /* Setup Snooping for all the 4GB space */
 249         tmp = SNOOP_SIZE_2GB;   /* starts from 0x0, size 2G */
 250         __raw_writel(tmp, &usb_sys_regs->snoop1);
 251         tmp |= 0x80000000;      /* starts from 0x8000000, size 2G */
 252         __raw_writel(tmp, &usb_sys_regs->snoop2);
 253 #endif
 254
 255         return 0;
 256 }
 257
 258 /* Enable DR irq and set controller to run state */
 259 static void dr_controller_run(struct fsl_udc *udc)
 260 {
 261         u32 temp;
 262
 263         /* Enable DR irq reg */
 264         temp = USB_INTR_INT_EN | USB_INTR_ERR_INT_EN
 265                 | USB_INTR_PTC_DETECT_EN | USB_INTR_RESET_EN
 266                 | USB_INTR_DEVICE_SUSPEND | USB_INTR_SYS_ERR_EN;
 267
 268         fsl_writel(temp, &dr_regs->usbintr);
 269
 270         /* Clear stopped bit */
 271         udc->stopped = 0;
 272
 273         /* Set the controller as device mode */
 274         temp = fsl_readl(&dr_regs->usbmode);
 275         temp |= USB_MODE_CTRL_MODE_DEVICE;
 276         fsl_writel(temp, &dr_regs->usbmode);
 277
 278         /* Set controller to Run */
 279         temp = fsl_readl(&dr_regs->usbcmd);
 280         temp |= USB_CMD_RUN_STOP;
 281         fsl_writel(temp, &dr_regs->usbcmd);
 282
 283         return;
 284 }
 285
 286 static void dr_controller_stop(struct fsl_udc *udc)
 287 {
 288         unsigned int tmp;
 289
 290         /* disable all INTR */
 291         fsl_writel(0, &dr_regs->usbintr);
 292
 293         /* Set stopped bit for isr */
 294         udc->stopped = 1;
 295
 296         /* disable IO output */
 297 /*      usb_sys_regs->control = 0; */
 298
 299         /* set controller to Stop */
 300         tmp = fsl_readl(&dr_regs->usbcmd);
 301         tmp &= ~USB_CMD_RUN_STOP;
 302         fsl_writel(tmp, &dr_regs->usbcmd);
 303
 304         return;
 305 }
 306
 307 static void dr_ep_setup(unsigned char ep_num, unsigned char dir,
 308                         unsigned char ep_type)
 309 {
 310         unsigned int tmp_epctrl = 0;
 311
 312         tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 313         if (dir) {
 314                 if (ep_num)
 315                         tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
 316                 tmp_epctrl |= EPCTRL_TX_ENABLE;
 317                 tmp_epctrl |= ((unsigned int)(ep_type)
 318                                 << EPCTRL_TX_EP_TYPE_SHIFT);
 319         } else {
 320                 if (ep_num)
 321                         tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
 322                 tmp_epctrl |= EPCTRL_RX_ENABLE;
 323                 tmp_epctrl |= ((unsigned int)(ep_type)
 324                                 << EPCTRL_RX_EP_TYPE_SHIFT);
 325         }
 326
 327         fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]);
 328 }
 329
 330 static void
 331 dr_ep_change_stall(unsigned char ep_num, unsigned char dir, int value)
 332 {
 333         u32 tmp_epctrl = 0;
 334
 335         tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 336
 337         if (value) {
 338                 /* set the stall bit */
 339                 if (dir)
 340                         tmp_epctrl |= EPCTRL_TX_EP_STALL;
 341                 else
 342                         tmp_epctrl |= EPCTRL_RX_EP_STALL;
 343         } else {
 344                 /* clear the stall bit and reset data toggle */
 345                 if (dir) {
 346                         tmp_epctrl &= ~EPCTRL_TX_EP_STALL;
 347                         tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
 348                 } else {
 349                         tmp_epctrl &= ~EPCTRL_RX_EP_STALL;
 350                         tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
 351                 }
 352         }
 353         fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]);
 354 }
 355
 356 /* Get stall status of a specific ep
 357    Return: 0: not stalled; 1:stalled */
 358 static int dr_ep_get_stall(unsigned char ep_num, unsigned char dir)
 359 {
 360         u32 epctrl;
 361
 362         epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 363         if (dir)
 364                 return (epctrl & EPCTRL_TX_EP_STALL) ? 1 : 0;
 365         else
 366                 return (epctrl & EPCTRL_RX_EP_STALL) ? 1 : 0;
 367 }
 368
 369 /********************************************************************
 370         Internal Structure Build up functions
 371 ********************************************************************/
 372
 373 /*------------------------------------------------------------------
 374 * struct_ep_qh_setup(): set the Endpoint Capabilites field of QH
 375  * @zlt: Zero Length Termination Select (1: disable; 0: enable)
 376  * @mult: Mult field
 377  ------------------------------------------------------------------*/
 378 static void struct_ep_qh_setup(struct fsl_udc *udc, unsigned char ep_num,
 379                 unsigned char dir, unsigned char ep_type,
 380                 unsigned int max_pkt_len,
 381                 unsigned int zlt, unsigned char mult)
 382 {
 383         struct ep_queue_head *p_QH = &udc->ep_qh[2 * ep_num + dir];
 384         unsigned int tmp = 0;
 385
 386         /* set the Endpoint Capabilites in QH */
 387         switch (ep_type) {
 388         case USB_ENDPOINT_XFER_CONTROL:
 389                 /* Interrupt On Setup (IOS). for control ep  */
 390                 tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS)
 391                         | EP_QUEUE_HEAD_IOS;
 392                 break;
 393         case USB_ENDPOINT_XFER_ISOC:
 394                 tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS)
 395                         | (mult << EP_QUEUE_HEAD_MULT_POS);
 396                 break;
 397         case USB_ENDPOINT_XFER_BULK:
 398         case USB_ENDPOINT_XFER_INT:
 399                 tmp = max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS;
 400                 break;
 401         default:
 402                 VDBG("error ep type is %d", ep_type);
 403                 return;
 404         }
 405         if (zlt)
 406                 tmp |= EP_QUEUE_HEAD_ZLT_SEL;
 407         p_QH->max_pkt_length = cpu_to_le32(tmp);
 408
 409         return;
 410 }
 411
 412 /* Setup qh structure and ep register for ep0. */
 413 static void ep0_setup(struct fsl_udc *udc)
 414 {
 415         /* the intialization of an ep includes: fields in QH, Regs,
 416          * fsl_ep struct */
 417         struct_ep_qh_setup(udc, 0, USB_RECV, USB_ENDPOINT_XFER_CONTROL,
 418                         USB_MAX_CTRL_PAYLOAD, 0, 0);
 419         struct_ep_qh_setup(udc, 0, USB_SEND, USB_ENDPOINT_XFER_CONTROL,
 420                         USB_MAX_CTRL_PAYLOAD, 0, 0);
 421         dr_ep_setup(0, USB_RECV, USB_ENDPOINT_XFER_CONTROL);
 422         dr_ep_setup(0, USB_SEND, USB_ENDPOINT_XFER_CONTROL);
 423
 424         return;
 425
 426 }
 427
 428 /***********************************************************************
 429                 Endpoint Management Functions
 430 ***********************************************************************/
 431
 432 /*-------------------------------------------------------------------------
 433  * when configurations are set, or when interface settings change
 434  * for example the do_set_interface() in gadget layer,
 435  * the driver will enable or disable the relevant endpoints
 436  * ep0 doesn't use this routine. It is always enabled.
 437 -------------------------------------------------------------------------*/
 438 static int fsl_ep_enable(struct usb_ep *_ep,
 439                 const struct usb_endpoint_descriptor *desc)
 440 {
 441         struct fsl_udc *udc = NULL;
 442         struct fsl_ep *ep = NULL;
 443         unsigned short max = 0;
 444         unsigned char mult = 0, zlt;
 445         int retval = -EINVAL;
 446         unsigned long flags = 0;
 447
 448         ep = container_of(_ep, struct fsl_ep, ep);
 449
 450         /* catch various bogus parameters */
 451         if (!_ep || !desc || ep->desc
 452                         || (desc->bDescriptorType != USB_DT_ENDPOINT))
 453                 return -EINVAL;
 454
 455         udc = ep->udc;
 456
 457         if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
 458                 return -ESHUTDOWN;
 459
 460         max = le16_to_cpu(desc->wMaxPacketSize);
 461
 462         /* Disable automatic zlp generation.  Driver is reponsible to indicate
 463          * explicitly through req->req.zero.  This is needed to enable multi-td
 464          * request. */
 465         zlt = 1;
 466
 467         /* Assume the max packet size from gadget is always correct */
 468         switch (desc->bmAttributes & 0x03) {
 469         case USB_ENDPOINT_XFER_CONTROL:
 470         case USB_ENDPOINT_XFER_BULK:
 471         case USB_ENDPOINT_XFER_INT:
 472                 /* mult = 0.  Execute N Transactions as demonstrated by
 473                  * the USB variable length packet protocol where N is
 474                  * computed using the Maximum Packet Length (dQH) and
 475                  * the Total Bytes field (dTD) */
 476                 mult = 0;
 477                 break;
 478         case USB_ENDPOINT_XFER_ISOC:
 479                 /* Calculate transactions needed for high bandwidth iso */
 480                 mult = (unsigned char)(1 + ((max >> 11) & 0x03));
 481                 max = max & 0x8ff;      /* bit 0~10 */
 482                 /* 3 transactions at most */
 483                 if (mult > 3)
 484                         goto en_done;
 485                 break;
 486         default:
 487                 goto en_done;
 488         }
 489
 490         spin_lock_irqsave(&udc->lock, flags);
 491         ep->ep.maxpacket = max;
 492         ep->desc = desc;
 493         ep->stopped = 0;
 494
 495         /* Controller related setup */
 496         /* Init EPx Queue Head (Ep Capabilites field in QH
 497          * according to max, zlt, mult) */
 498         struct_ep_qh_setup(udc, (unsigned char) ep_index(ep),
 499                         (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN)
 500                                         ?  USB_SEND : USB_RECV),
 501                         (unsigned char) (desc->bmAttributes
 502                                         & USB_ENDPOINT_XFERTYPE_MASK),
 503                         max, zlt, mult);
 504
 505         /* Init endpoint ctrl register */
 506         dr_ep_setup((unsigned char) ep_index(ep),
 507                         (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN)
 508                                         ? USB_SEND : USB_RECV),
 509                         (unsigned char) (desc->bmAttributes
 510                                         & USB_ENDPOINT_XFERTYPE_MASK));
 511
 512         spin_unlock_irqrestore(&udc->lock, flags);
 513         retval = 0;
 514
 515         VDBG("enabled %s (ep%d%s) maxpacket %d",ep->ep.name,
 516                         ep->desc->bEndpointAddress & 0x0f,
 517                         (desc->bEndpointAddress & USB_DIR_IN)
 518                                 ? "in" : "out", max);
 519 en_done:
 520         return retval;
 521 }
 522
 523 /*---------------------------------------------------------------------
 524  * @ep : the ep being unconfigured. May not be ep0
 525  * Any pending and uncomplete req will complete with status (-ESHUTDOWN)
 526 *---------------------------------------------------------------------*/
 527 static int fsl_ep_disable(struct usb_ep *_ep)
 528 {
 529         struct fsl_udc *udc = NULL;
 530         struct fsl_ep *ep = NULL;
 531         unsigned long flags = 0;
 532         u32 epctrl;
 533         int ep_num;
 534
 535         ep = container_of(_ep, struct fsl_ep, ep);
 536         if (!_ep || !ep->desc) {
 537                 VDBG("%s not enabled", _ep ? ep->ep.name : NULL);
 538                 return -EINVAL;
 539         }
 540
 541         /* disable ep on controller */
 542         ep_num = ep_index(ep);
 543         epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 544         if (ep_is_in(ep))
 545                 epctrl &= ~EPCTRL_TX_ENABLE;
 546         else
 547                 epctrl &= ~EPCTRL_RX_ENABLE;
 548         fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
 549
 550         udc = (struct fsl_udc *)ep->udc;
 551         spin_lock_irqsave(&udc->lock, flags);
 552
 553         /* nuke all pending requests (does flush) */
 554         nuke(ep, -ESHUTDOWN);
 555
 556         ep->desc = NULL;
 557         ep->stopped = 1;
 558         spin_unlock_irqrestore(&udc->lock, flags);
 559
 560         VDBG("disabled %s OK", _ep->name);
 561         return 0;
 562 }
 563
 564 /*---------------------------------------------------------------------
 565  * allocate a request object used by this endpoint
 566  * the main operation is to insert the req->queue to the eq->queue
 567  * Returns the request, or null if one could not be allocated
 568 *---------------------------------------------------------------------*/
 569 static struct usb_request *
 570 fsl_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
 571 {
 572         struct fsl_req *req = NULL;
 573
 574         req = kzalloc(sizeof *req, gfp_flags);
 575         if (!req)
 576                 return NULL;
 577
 578         req->req.dma = DMA_ADDR_INVALID;
 579         INIT_LIST_HEAD(&req->queue);
 580
 581         return &req->req;
 582 }
 583
 584 static void fsl_free_request(struct usb_ep *_ep, struct usb_request *_req)
 585 {
 586         struct fsl_req *req = NULL;
 587
 588         req = container_of(_req, struct fsl_req, req);
 589
 590         if (_req)
 591                 kfree(req);
 592 }
 593
 594 /*-------------------------------------------------------------------------*/
 595 static int fsl_queue_td(struct fsl_ep *ep, struct fsl_req *req)
 596 {
 597         int i = ep_index(ep) * 2 + ep_is_in(ep);
 598         u32 temp, bitmask, tmp_stat;
 599         struct ep_queue_head *dQH = &ep->udc->ep_qh[i];
 600
 601         /* VDBG("QH addr Register 0x%8x", dr_regs->endpointlistaddr);
 602         VDBG("ep_qh[%d] addr is 0x%8x", i, (u32)&(ep->udc->ep_qh[i])); */
 603
 604         bitmask = ep_is_in(ep)
 605                 ? (1 << (ep_index(ep) + 16))
 606                 : (1 << (ep_index(ep)));
 607
 608         /* check if the pipe is empty */
 609         if (!(list_empty(&ep->queue))) {
 610                 /* Add td to the end */
 611                 struct fsl_req *lastreq;
 612                 lastreq = list_entry(ep->queue.prev, struct fsl_req, queue);
 613                 lastreq->tail->next_td_ptr =
 614                         cpu_to_le32(req->head->td_dma & DTD_ADDR_MASK);
 615                 /* Read prime bit, if 1 goto done */
 616                 if (fsl_readl(&dr_regs->endpointprime) & bitmask)
 617                         goto out;
 618
 619                 do {
 620                         /* Set ATDTW bit in USBCMD */
 621                         temp = fsl_readl(&dr_regs->usbcmd);
 622                         fsl_writel(temp | USB_CMD_ATDTW, &dr_regs->usbcmd);
 623
 624                         /* Read correct status bit */
 625                         tmp_stat = fsl_readl(&dr_regs->endptstatus) & bitmask;
 626
 627                 } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_ATDTW));
 628
 629                 /* Write ATDTW bit to 0 */
 630                 temp = fsl_readl(&dr_regs->usbcmd);
 631                 fsl_writel(temp & ~USB_CMD_ATDTW, &dr_regs->usbcmd);
 632
 633                 if (tmp_stat)
 634                         goto out;
 635         }
 636
 637         /* Write dQH next pointer and terminate bit to 0 */
 638         temp = req->head->td_dma & EP_QUEUE_HEAD_NEXT_POINTER_MASK;
 639         dQH->next_dtd_ptr = cpu_to_le32(temp);
 640
 641         /* Clear active and halt bit */
 642         temp = cpu_to_le32(~(EP_QUEUE_HEAD_STATUS_ACTIVE
 643                         | EP_QUEUE_HEAD_STATUS_HALT));
 644         dQH->size_ioc_int_sts &= temp;
 645
 646         /* Prime endpoint by writing 1 to ENDPTPRIME */
 647         temp = ep_is_in(ep)
 648                 ? (1 << (ep_index(ep) + 16))
 649                 : (1 << (ep_index(ep)));
 650         fsl_writel(temp, &dr_regs->endpointprime);
 651 out:
 652         return 0;
 653 }
 654
 655 /* Fill in the dTD structure
 656  * @req: request that the transfer belongs to
 657  * @length: return actually data length of the dTD
 658  * @dma: return dma address of the dTD
 659  * @is_last: return flag if it is the last dTD of the request
 660  * return: pointer to the built dTD */
 661 static struct ep_td_struct *fsl_build_dtd(struct fsl_req *req, unsigned *length,
 662                 dma_addr_t *dma, int *is_last)
 663 {
 664         u32 swap_temp;
 665         struct ep_td_struct *dtd;
 666
 667         /* how big will this transfer be? */
 668         *length = min(req->req.length - req->req.actual,
 669                         (unsigned)EP_MAX_LENGTH_TRANSFER);
 670
 671         dtd = dma_pool_alloc(udc_controller->td_pool, GFP_KERNEL, dma);
 672         if (dtd == NULL)
 673                 return dtd;
 674
 675         dtd->td_dma = *dma;
 676         /* Clear reserved field */
 677         swap_temp = cpu_to_le32(dtd->size_ioc_sts);
 678         swap_temp &= ~DTD_RESERVED_FIELDS;
 679         dtd->size_ioc_sts = cpu_to_le32(swap_temp);
 680
 681         /* Init all of buffer page pointers */
 682         swap_temp = (u32) (req->req.dma + req->req.actual);
 683         dtd->buff_ptr0 = cpu_to_le32(swap_temp);
 684         dtd->buff_ptr1 = cpu_to_le32(swap_temp + 0x1000);
 685         dtd->buff_ptr2 = cpu_to_le32(swap_temp + 0x2000);
 686         dtd->buff_ptr3 = cpu_to_le32(swap_temp + 0x3000);
 687         dtd->buff_ptr4 = cpu_to_le32(swap_temp + 0x4000);
 688
 689         req->req.actual += *length;
 690
 691         /* zlp is needed if req->req.zero is set */
 692         if (req->req.zero) {
 693                 if (*length == 0 || (*length % req->ep->ep.maxpacket) != 0)
 694                         *is_last = 1;
 695                 else
 696                         *is_last = 0;
 697         } else if (req->req.length == req->req.actual)
 698                 *is_last = 1;
 699         else
 700                 *is_last = 0;
 701
 702         if ((*is_last) == 0)
 703                 VDBG("multi-dtd request!");
 704         /* Fill in the transfer size; set active bit */
 705         swap_temp = ((*length << DTD_LENGTH_BIT_POS) | DTD_STATUS_ACTIVE);
 706
 707         /* Enable interrupt for the last dtd of a request */
 708         if (*is_last && !req->req.no_interrupt)
 709                 swap_temp |= DTD_IOC;
 710
 711         dtd->size_ioc_sts = cpu_to_le32(swap_temp);
 712
 713         mb();
 714
 715         VDBG("length = %d address= 0x%x", *length, (int)*dma);
 716
 717         return dtd;
 718 }
 719
 720 /* Generate dtd chain for a request */
 721 static int fsl_req_to_dtd(struct fsl_req *req)
 722 {
 723         unsigned        count;
 724         int             is_last;
 725         int             is_first =1;
 726         struct ep_td_struct     *last_dtd = NULL, *dtd;
 727         dma_addr_t dma;
 728
 729         do {
 730                 dtd = fsl_build_dtd(req, &count, &dma, &is_last);
 731                 if (dtd == NULL)
 732                         return -ENOMEM;
 733
 734                 if (is_first) {
 735                         is_first = 0;
 736                         req->head = dtd;
 737                 } else {
 738                         last_dtd->next_td_ptr = cpu_to_le32(dma);
 739                         last_dtd->next_td_virt = dtd;
 740                 }
 741                 last_dtd = dtd;
 742
 743                 req->dtd_count++;
 744         } while (!is_last);
 745
 746         dtd->next_td_ptr = cpu_to_le32(DTD_NEXT_TERMINATE);
 747
 748         req->tail = dtd;
 749
 750         return 0;
 751 }
 752
 753 /* queues (submits) an I/O request to an endpoint */
 754 static int
 755 fsl_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
 756 {
 757         struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep);
 758         struct fsl_req *req = container_of(_req, struct fsl_req, req);
 759         struct fsl_udc *udc;
 760         unsigned long flags;
 761         int is_iso = 0;
 762
 763         /* catch various bogus parameters */
 764         if (!_req || !req->req.complete || !req->req.buf
 765                         || !list_empty(&req->queue)) {
 766                 VDBG("%s, bad params", __func__);
 767                 return -EINVAL;
 768         }
 769         if (unlikely(!_ep || !ep->desc)) {
 770                 VDBG("%s, bad ep", __func__);
 771                 return -EINVAL;
 772         }
 773         if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 774                 if (req->req.length > ep->ep.maxpacket)
 775                         return -EMSGSIZE;
 776                 is_iso = 1;
 777         }
 778
 779         udc = ep->udc;
 780         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
 781                 return -ESHUTDOWN;
 782
 783         req->ep = ep;
 784
 785         /* map virtual address to hardware */
 786         if (req->req.dma == DMA_ADDR_INVALID) {
 787                 req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
 788                                         req->req.buf,
 789                                         req->req.length, ep_is_in(ep)
 790                                                 ? DMA_TO_DEVICE
 791                                                 : DMA_FROM_DEVICE);
 792                 req->mapped = 1;
 793         } else {
 794                 dma_sync_single_for_device(ep->udc->gadget.dev.parent,
 795                                         req->req.dma, req->req.length,
 796                                         ep_is_in(ep)
 797                                                 ? DMA_TO_DEVICE
 798                                                 : DMA_FROM_DEVICE);
 799                 req->mapped = 0;
 800         }
 801
 802         req->req.status = -EINPROGRESS;
 803         req->req.actual = 0;
 804         req->dtd_count = 0;
 805
 806         spin_lock_irqsave(&udc->lock, flags);
 807
 808         /* build dtds and push them to device queue */
 809         if (!fsl_req_to_dtd(req)) {
 810                 fsl_queue_td(ep, req);
 811         } else {
 812                 spin_unlock_irqrestore(&udc->lock, flags);
 813                 return -ENOMEM;
 814         }
 815
 816         /* Update ep0 state */
 817         if ((ep_index(ep) == 0))
 818                 udc->ep0_state = DATA_STATE_XMIT;
 819
 820         /* irq handler advances the queue */
 821         if (req != NULL)
 822                 list_add_tail(&req->queue, &ep->queue);
 823         spin_unlock_irqrestore(&udc->lock, flags);
 824
 825         return 0;
 826 }
 827
 828 /* dequeues (cancels, unlinks) an I/O request from an endpoint */
 829 static int fsl_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 830 {
 831         struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep);
 832         struct fsl_req *req;
 833         unsigned long flags;
 834         int ep_num, stopped, ret = 0;
 835         u32 epctrl;
 836
 837         if (!_ep || !_req)
 838                 return -EINVAL;
 839
 840         spin_lock_irqsave(&ep->udc->lock, flags);
 841         stopped = ep->stopped;
 842
 843         /* Stop the ep before we deal with the queue */
 844         ep->stopped = 1;
 845         ep_num = ep_index(ep);
 846         epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 847         if (ep_is_in(ep))
 848                 epctrl &= ~EPCTRL_TX_ENABLE;
 849         else
 850                 epctrl &= ~EPCTRL_RX_ENABLE;
 851         fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
 852
 853         /* make sure it's actually queued on this endpoint */
 854         list_for_each_entry(req, &ep->queue, queue) {
 855                 if (&req->req == _req)
 856                         break;
 857         }
 858         if (&req->req != _req) {
 859                 ret = -EINVAL;
 860                 goto out;
 861         }
 862
 863         /* The request is in progress, or completed but not dequeued */
 864         if (ep->queue.next == &req->queue) {
 865                 _req->status = -ECONNRESET;
 866                 fsl_ep_fifo_flush(_ep); /* flush current transfer */
 867
 868                 /* The request isn't the last request in this ep queue */
 869                 if (req->queue.next != &ep->queue) {
 870                         struct ep_queue_head *qh;
 871                         struct fsl_req *next_req;
 872
 873                         qh = ep->qh;
 874                         next_req = list_entry(req->queue.next, struct fsl_req,
 875                                         queue);
 876
 877                         /* Point the QH to the first TD of next request */
 878                         fsl_writel((u32) next_req->head, &qh->curr_dtd_ptr);
 879                 }
 880
 881                 /* The request hasn't been processed, patch up the TD chain */
 882         } else {
 883                 struct fsl_req *prev_req;
 884
 885                 prev_req = list_entry(req->queue.prev, struct fsl_req, queue);
 886                 fsl_writel(fsl_readl(&req->tail->next_td_ptr),
 887                                 &prev_req->tail->next_td_ptr);
 888
 889         }
 890
 891         done(ep, req, -ECONNRESET);
 892
 893         /* Enable EP */
 894 out:    epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 895         if (ep_is_in(ep))
 896                 epctrl |= EPCTRL_TX_ENABLE;
 897         else
 898                 epctrl |= EPCTRL_RX_ENABLE;
 899         fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
 900         ep->stopped = stopped;
 901
 902         spin_unlock_irqrestore(&ep->udc->lock, flags);
 903         return ret;
 904 }
 905
 906 /*-------------------------------------------------------------------------*/
 907
 908 /*-----------------------------------------------------------------
 909  * modify the endpoint halt feature
 910  * @ep: the non-isochronous endpoint being stalled
 911  * @value: 1--set halt  0--clear halt
 912  * Returns zero, or a negative error code.
 913 *----------------------------------------------------------------*/
 914 static int fsl_ep_set_halt(struct usb_ep *_ep, int value)
 915 {
 916         struct fsl_ep *ep = NULL;
 917         unsigned long flags = 0;
 918         int status = -EOPNOTSUPP;       /* operation not supported */
 919         unsigned char ep_dir = 0, ep_num = 0;
 920         struct fsl_udc *udc = NULL;
 921
 922         ep = container_of(_ep, struct fsl_ep, ep);
 923         udc = ep->udc;
 924         if (!_ep || !ep->desc) {
 925                 status = -EINVAL;
 926                 goto out;
 927         }
 928
 929         if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 930                 status = -EOPNOTSUPP;
 931                 goto out;
 932         }
 933
 934         /* Attempt to halt IN ep will fail if any transfer requests
 935          * are still queue */
 936         if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
 937                 status = -EAGAIN;
 938                 goto out;
 939         }
 940
 941         status = 0;
 942         ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV;
 943         ep_num = (unsigned char)(ep_index(ep));
 944         spin_lock_irqsave(&ep->udc->lock, flags);
 945         dr_ep_change_stall(ep_num, ep_dir, value);
 946         spin_unlock_irqrestore(&ep->udc->lock, flags);
 947
 948         if (ep_index(ep) == 0) {
 949                 udc->ep0_state = WAIT_FOR_SETUP;
 950                 udc->ep0_dir = 0;
 951         }
 952 out:
 953         VDBG(" %s %s halt stat %d", ep->ep.name,
 954                         value ?  "set" : "clear", status);
 955
 956         return status;
 957 }
 958
 959 static void fsl_ep_fifo_flush(struct usb_ep *_ep)
 960 {
 961         struct fsl_ep *ep;
 962         int ep_num, ep_dir;
 963         u32 bits;
 964         unsigned long timeout;
 965 #define FSL_UDC_FLUSH_TIMEOUT 1000
 966
 967         if (!_ep) {
 968                 return;
 969         } else {
 970                 ep = container_of(_ep, struct fsl_ep, ep);
 971                 if (!ep->desc)
 972                         return;
 973         }
 974         ep_num = ep_index(ep);
 975         ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV;
 976
 977         if (ep_num == 0)
 978                 bits = (1 << 16) | 1;
 979         else if (ep_dir == USB_SEND)
 980                 bits = 1 << (16 + ep_num);
 981         else
 982                 bits = 1 << ep_num;
 983
 984         timeout = jiffies + FSL_UDC_FLUSH_TIMEOUT;
 985         do {
 986                 fsl_writel(bits, &dr_regs->endptflush);
 987
 988                 /* Wait until flush complete */
 989                 while (fsl_readl(&dr_regs->endptflush)) {
 990                         if (time_after(jiffies, timeout)) {
 991                                 ERR("ep flush timeout\n");
 992                                 return;
 993                         }
 994                         cpu_relax();
 995                 }
 996                 /* See if we need to flush again */
 997         } while (fsl_readl(&dr_regs->endptstatus) & bits);
 998 }
 999
1000 static struct usb_ep_ops fsl_ep_ops = {
1001         .enable = fsl_ep_enable,
1002         .disable = fsl_ep_disable,
1003
1004         .alloc_request = fsl_alloc_request,
1005         .free_request = fsl_free_request,
1006
1007         .queue = fsl_ep_queue,
1008         .dequeue = fsl_ep_dequeue,
1009
1010         .set_halt = fsl_ep_set_halt,
1011         .fifo_flush = fsl_ep_fifo_flush,        /* flush fifo */
1012 };
1013
1014 /*-------------------------------------------------------------------------
1015                 Gadget Driver Layer Operations
1016 -------------------------------------------------------------------------*/
1017
1018 /*----------------------------------------------------------------------
1019  * Get the current frame number (from DR frame_index Reg )
1020  *----------------------------------------------------------------------*/
1021 static int fsl_get_frame(struct usb_gadget *gadget)
1022 {
1023         return (int)(fsl_readl(&dr_regs->frindex) & USB_FRINDEX_MASKS);
1024 }
1025
1026 /*-----------------------------------------------------------------------
1027  * Tries to wake up the host connected to this gadget
1028  -----------------------------------------------------------------------*/
1029 static int fsl_wakeup(struct usb_gadget *gadget)
1030 {
1031         struct fsl_udc *udc = container_of(gadget, struct fsl_udc, gadget);
1032         u32 portsc;
1033
1034         /* Remote wakeup feature not enabled by host */
1035         if (!udc->remote_wakeup)
1036                 return -ENOTSUPP;
1037
1038         portsc = fsl_readl(&dr_regs->portsc1);
1039         /* not suspended? */
1040         if (!(portsc & PORTSCX_PORT_SUSPEND))
1041                 return 0;
1042         /* trigger force resume */
1043         portsc |= PORTSCX_PORT_FORCE_RESUME;
1044         fsl_writel(portsc, &dr_regs->portsc1);
1045         return 0;
1046 }
1047
1048 static int can_pullup(struct fsl_udc *udc)
1049 {
1050         return udc->driver && udc->softconnect && udc->vbus_active;
1051 }
1052
1053 /* Notify controller that VBUS is powered, Called by whatever
1054    detects VBUS sessions */
1055 static int fsl_vbus_session(struct usb_gadget *gadget, int is_active)
1056 {
1057         struct fsl_udc  *udc;
1058         unsigned long   flags;
1059
1060         udc = container_of(gadget, struct fsl_udc, gadget);
1061         spin_lock_irqsave(&udc->lock, flags);
1062         VDBG("VBUS %s", is_active ? "on" : "off");
1063         udc->vbus_active = (is_active != 0);
1064         if (can_pullup(udc))
1065                 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
1066                                 &dr_regs->usbcmd);
1067         else
1068                 fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP),
1069                                 &dr_regs->usbcmd);
1070         spin_unlock_irqrestore(&udc->lock, flags);
1071         return 0;
1072 }
1073
1074 /* constrain controller's VBUS power usage
1075  * This call is used by gadget drivers during SET_CONFIGURATION calls,
1076  * reporting how much power the device may consume.  For example, this
1077  * could affect how quickly batteries are recharged.
1078  *
1079  * Returns zero on success, else negative errno.
1080  */
1081 static int fsl_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1082 {
1083         struct fsl_udc *udc;
1084
1085         udc = container_of(gadget, struct fsl_udc, gadget);
1086         if (udc->transceiver)
1087                 return otg_set_power(udc->transceiver, mA);
1088         return -ENOTSUPP;
1089 }
1090
1091 /* Change Data+ pullup status
1092  * this func is used by usb_gadget_connect/disconnet
1093  */
1094 static int fsl_pullup(struct usb_gadget *gadget, int is_on)
1095 {
1096         struct fsl_udc *udc;
1097
1098         udc = container_of(gadget, struct fsl_udc, gadget);
1099         udc->softconnect = (is_on != 0);
1100         if (can_pullup(udc))
1101                 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
1102                                 &dr_regs->usbcmd);
1103         else
1104                 fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP),
1105                                 &dr_regs->usbcmd);
1106
1107         return 0;
1108 }
1109
1110 /* defined in gadget.h */
1111 static struct usb_gadget_ops fsl_gadget_ops = {
1112         .get_frame = fsl_get_frame,
1113         .wakeup = fsl_wakeup,
1114 /*      .set_selfpowered = fsl_set_selfpowered, */ /* Always selfpowered */
1115         .vbus_session = fsl_vbus_session,
1116         .vbus_draw = fsl_vbus_draw,
1117         .pullup = fsl_pullup,
1118 };
1119
1120 /* Set protocol stall on ep0, protocol stall will automatically be cleared
1121    on new transaction */
1122 static void ep0stall(struct fsl_udc *udc)
1123 {
1124         u32 tmp;
1125
1126         /* must set tx and rx to stall at the same time */
1127         tmp = fsl_readl(&dr_regs->endptctrl[0]);
1128         tmp |= EPCTRL_TX_EP_STALL | EPCTRL_RX_EP_STALL;
1129         fsl_writel(tmp, &dr_regs->endptctrl[0]);
1130         udc->ep0_state = WAIT_FOR_SETUP;
1131         udc->ep0_dir = 0;
1132 }
1133
1134 /* Prime a status phase for ep0 */
1135 static int ep0_prime_status(struct fsl_udc *udc, int direction)
1136 {
1137         struct fsl_req *req = udc->status_req;
1138         struct fsl_ep *ep;
1139         int status = 0;
1140
1141         if (direction == EP_DIR_IN)
1142                 udc->ep0_dir = USB_DIR_IN;
1143         else
1144                 udc->ep0_dir = USB_DIR_OUT;
1145
1146         ep = &udc->eps[0];
1147         udc->ep0_state = WAIT_FOR_OUT_STATUS;
1148
1149         req->ep = ep;
1150         req->req.length = 0;
1151         req->req.status = -EINPROGRESS;
1152         req->req.actual = 0;
1153         req->req.complete = NULL;
1154         req->dtd_count = 0;
1155
1156         if (fsl_req_to_dtd(req) == 0)
1157                 status = fsl_queue_td(ep, req);
1158         else
1159                 return -ENOMEM;
1160
1161         if (status)
1162                 ERR("Can't queue ep0 status request\n");
1163         list_add_tail(&req->queue, &ep->queue);
1164
1165         return status;
1166 }
1167
1168 static void udc_reset_ep_queue(struct fsl_udc *udc, u8 pipe)
1169 {
1170         struct fsl_ep *ep = get_ep_by_pipe(udc, pipe);
1171
1172         if (ep->name)
1173                 nuke(ep, -ESHUTDOWN);
1174 }
1175
1176 /*
1177  * ch9 Set address
1178  */
1179 static void ch9setaddress(struct fsl_udc *udc, u16 value, u16 index, u16 length)
1180 {
1181         /* Save the new address to device struct */
1182         udc->device_address = (u8) value;
1183         /* Update usb state */
1184         udc->usb_state = USB_STATE_ADDRESS;
1185         /* Status phase */
1186         if (ep0_prime_status(udc, EP_DIR_IN))
1187                 ep0stall(udc);
1188 }
1189
1190 /*
1191  * ch9 Get status
1192  */
1193 static void ch9getstatus(struct fsl_udc *udc, u8 request_type, u16 value,
1194                 u16 index, u16 length)
1195 {
1196         u16 tmp = 0;            /* Status, cpu endian */
1197
1198         struct fsl_req *req;
1199         struct fsl_ep *ep;
1200         int status = 0;
1201
1202         ep = &udc->eps[0];
1203
1204         if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1205                 /* Get device status */
1206                 tmp = 1 << USB_DEVICE_SELF_POWERED;
1207                 tmp |= udc->remote_wakeup << USB_DEVICE_REMOTE_WAKEUP;
1208         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
1209                 /* Get interface status */
1210                 /* We don't have interface information in udc driver */
1211                 tmp = 0;
1212         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
1213                 /* Get endpoint status */
1214                 struct fsl_ep *target_ep;
1215
1216                 target_ep = get_ep_by_pipe(udc, get_pipe_by_windex(index));
1217
1218                 /* stall if endpoint doesn't exist */
1219                 if (!target_ep->desc)
1220                         goto stall;
1221                 tmp = dr_ep_get_stall(ep_index(target_ep), ep_is_in(target_ep))
1222                                 << USB_ENDPOINT_HALT;
1223         }
1224
1225         udc->ep0_dir = USB_DIR_IN;
1226         /* Borrow the per device status_req */
1227         req = udc->status_req;
1228         /* Fill in the reqest structure */
1229         *((u16 *) req->req.buf) = cpu_to_le16(tmp);
1230         req->ep = ep;
1231         req->req.length = 2;
1232         req->req.status = -EINPROGRESS;
1233         req->req.actual = 0;
1234         req->req.complete = NULL;
1235         req->dtd_count = 0;
1236
1237         /* prime the data phase */
1238         if ((fsl_req_to_dtd(req) == 0))
1239                 status = fsl_queue_td(ep, req);
1240         else                    /* no mem */
1241                 goto stall;
1242
1243         if (status) {
1244                 ERR("Can't respond to getstatus request\n");
1245                 goto stall;
1246         }
1247         list_add_tail(&req->queue, &ep->queue);
1248         udc->ep0_state = DATA_STATE_XMIT;
1249         return;
1250 stall:
1251         ep0stall(udc);
1252 }
1253
1254 static void setup_received_irq(struct fsl_udc *udc,
1255                 struct usb_ctrlrequest *setup)
1256 {
1257         u16 wValue = le16_to_cpu(setup->wValue);
1258         u16 wIndex = le16_to_cpu(setup->wIndex);
1259         u16 wLength = le16_to_cpu(setup->wLength);
1260
1261         udc_reset_ep_queue(udc, 0);
1262
1263         /* We process some stardard setup requests here */
1264         switch (setup->bRequest) {
1265         case USB_REQ_GET_STATUS:
1266                 /* Data+Status phase from udc */
1267                 if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
1268                                         != (USB_DIR_IN | USB_TYPE_STANDARD))
1269                         break;
1270                 ch9getstatus(udc, setup->bRequestType, wValue, wIndex, wLength);
1271                 return;
1272
1273         case USB_REQ_SET_ADDRESS:
1274                 /* Status phase from udc */
1275                 if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD
1276                                                 | USB_RECIP_DEVICE))
1277                         break;
1278                 ch9setaddress(udc, wValue, wIndex, wLength);
1279                 return;
1280
1281         case USB_REQ_CLEAR_FEATURE:
1282         case USB_REQ_SET_FEATURE:
1283                 /* Status phase from udc */
1284         {
1285                 int rc = -EOPNOTSUPP;
1286
1287                 if ((setup->bRequestType & (USB_RECIP_MASK | USB_TYPE_MASK))
1288                                 == (USB_RECIP_ENDPOINT | USB_TYPE_STANDARD)) {
1289                         int pipe = get_pipe_by_windex(wIndex);
1290                         struct fsl_ep *ep;
1291
1292                         if (wValue != 0 || wLength != 0 || pipe > udc->max_ep)
1293                                 break;
1294                         ep = get_ep_by_pipe(udc, pipe);
1295
1296                         spin_unlock(&udc->lock);
1297                         rc = fsl_ep_set_halt(&ep->ep,
1298                                         (setup->bRequest == USB_REQ_SET_FEATURE)
1299                                                 ? 1 : 0);
1300                         spin_lock(&udc->lock);
1301
1302                 } else if ((setup->bRequestType & (USB_RECIP_MASK
1303                                 | USB_TYPE_MASK)) == (USB_RECIP_DEVICE
1304                                 | USB_TYPE_STANDARD)) {
1305                         /* Note: The driver has not include OTG support yet.
1306                          * This will be set when OTG support is added */
1307                         if (!gadget_is_otg(&udc->gadget))
1308                                 break;
1309                         else if (setup->bRequest == USB_DEVICE_B_HNP_ENABLE)
1310                                 udc->gadget.b_hnp_enable = 1;
1311                         else if (setup->bRequest == USB_DEVICE_A_HNP_SUPPORT)
1312                                 udc->gadget.a_hnp_support = 1;
1313                         else if (setup->bRequest ==
1314                                         USB_DEVICE_A_ALT_HNP_SUPPORT)
1315                                 udc->gadget.a_alt_hnp_support = 1;
1316                         else
1317                                 break;
1318                         rc = 0;
1319                 } else
1320                         break;
1321
1322                 if (rc == 0) {
1323                         if (ep0_prime_status(udc, EP_DIR_IN))
1324                                 ep0stall(udc);
1325                 }
1326                 return;
1327         }
1328
1329         default:
1330                 break;
1331         }
1332
1333         /* Requests handled by gadget */
1334         if (wLength) {
1335                 /* Data phase from gadget, status phase from udc */
1336                 udc->ep0_dir = (setup->bRequestType & USB_DIR_IN)
1337                                 ?  USB_DIR_IN : USB_DIR_OUT;
1338                 spin_unlock(&udc->lock);
1339                 if (udc->driver->setup(&udc->gadget,
1340                                 &udc->local_setup_buff) < 0)
1341                         ep0stall(udc);
1342                 spin_lock(&udc->lock);
1343                 udc->ep0_state = (setup->bRequestType & USB_DIR_IN)
1344                                 ?  DATA_STATE_XMIT : DATA_STATE_RECV;
1345         } else {
1346                 /* No data phase, IN status from gadget */
1347                 udc->ep0_dir = USB_DIR_IN;
1348                 spin_unlock(&udc->lock);
1349                 if (udc->driver->setup(&udc->gadget,
1350                                 &udc->local_setup_buff) < 0)
1351                         ep0stall(udc);
1352                 spin_lock(&udc->lock);
1353                 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1354         }
1355 }
1356
1357 /* Process request for Data or Status phase of ep0
1358  * prime status phase if needed */
1359 static void ep0_req_complete(struct fsl_udc *udc, struct fsl_ep *ep0,
1360                 struct fsl_req *req)
1361 {
1362         if (udc->usb_state == USB_STATE_ADDRESS) {
1363                 /* Set the new address */
1364                 u32 new_address = (u32) udc->device_address;
1365                 fsl_writel(new_address << USB_DEVICE_ADDRESS_BIT_POS,
1366                                 &dr_regs->deviceaddr);
1367         }
1368
1369         done(ep0, req, 0);
1370
1371         switch (udc->ep0_state) {
1372         case DATA_STATE_XMIT:
1373                 /* receive status phase */
1374                 if (ep0_prime_status(udc, EP_DIR_OUT))
1375                         ep0stall(udc);
1376                 break;
1377         case DATA_STATE_RECV:
1378                 /* send status phase */
1379                 if (ep0_prime_status(udc, EP_DIR_IN))
1380                         ep0stall(udc);
1381                 break;
1382         case WAIT_FOR_OUT_STATUS:
1383                 udc->ep0_state = WAIT_FOR_SETUP;
1384                 break;
1385         case WAIT_FOR_SETUP:
1386                 ERR("Unexpect ep0 packets\n");
1387                 break;
1388         default:
1389                 ep0stall(udc);
1390                 break;
1391         }
1392 }
1393
1394 /* Tripwire mechanism to ensure a setup packet payload is extracted without
1395  * being corrupted by another incoming setup packet */
1396 static void tripwire_handler(struct fsl_udc *udc, u8 ep_num, u8 *buffer_ptr)
1397 {
1398         u32 temp;
1399         struct ep_queue_head *qh;
1400
1401         qh = &udc->ep_qh[ep_num * 2 + EP_DIR_OUT];
1402
1403         /* Clear bit in ENDPTSETUPSTAT */
1404         temp = fsl_readl(&dr_regs->endptsetupstat);
1405         fsl_writel(temp | (1 << ep_num), &dr_regs->endptsetupstat);
1406
1407         /* while a hazard exists when setup package arrives */
1408         do {
1409                 /* Set Setup Tripwire */
1410                 temp = fsl_readl(&dr_regs->usbcmd);
1411                 fsl_writel(temp | USB_CMD_SUTW, &dr_regs->usbcmd);
1412
1413                 /* Copy the setup packet to local buffer */
1414                 memcpy(buffer_ptr, (u8 *) qh->setup_buffer, 8);
1415         } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_SUTW));
1416
1417         /* Clear Setup Tripwire */
1418         temp = fsl_readl(&dr_regs->usbcmd);
1419         fsl_writel(temp & ~USB_CMD_SUTW, &dr_regs->usbcmd);
1420 }
1421
1422 /* process-ep_req(): free the completed Tds for this req */
1423 static int process_ep_req(struct fsl_udc *udc, int pipe,
1424                 struct fsl_req *curr_req)
1425 {
1426         struct ep_td_struct *curr_td;
1427         int     td_complete, actual, remaining_length, j, tmp;
1428         int     status = 0;
1429         int     errors = 0;
1430         struct  ep_queue_head *curr_qh = &udc->ep_qh[pipe];
1431         int direction = pipe % 2;
1432
1433         curr_td = curr_req->head;
1434         td_complete = 0;
1435         actual = curr_req->req.length;
1436
1437         for (j = 0; j < curr_req->dtd_count; j++) {
1438                 remaining_length = (le32_to_cpu(curr_td->size_ioc_sts)
1439                                         & DTD_PACKET_SIZE)
1440                                 >> DTD_LENGTH_BIT_POS;
1441                 actual -= remaining_length;
1442
1443                 if ((errors = le32_to_cpu(curr_td->size_ioc_sts) &
1444                                                 DTD_ERROR_MASK)) {
1445                         if (errors & DTD_STATUS_HALTED) {
1446                                 ERR("dTD error %08x QH=%d\n", errors, pipe);
1447                                 /* Clear the errors and Halt condition */
1448                                 tmp = le32_to_cpu(curr_qh->size_ioc_int_sts);
1449                                 tmp &= ~errors;
1450                                 curr_qh->size_ioc_int_sts = cpu_to_le32(tmp);
1451                                 status = -EPIPE;
1452                                 /* FIXME: continue with next queued TD? */
1453
1454                                 break;
1455                         }
1456                         if (errors & DTD_STATUS_DATA_BUFF_ERR) {
1457                                 VDBG("Transfer overflow");
1458                                 status = -EPROTO;
1459                                 break;
1460                         } else if (errors & DTD_STATUS_TRANSACTION_ERR) {
1461                                 VDBG("ISO error");
1462                                 status = -EILSEQ;
1463                                 break;
1464                         } else
1465                                 ERR("Unknown error has occured (0x%x)!\n",
1466                                         errors);
1467
1468                 } else if (le32_to_cpu(curr_td->size_ioc_sts)
1469                                 & DTD_STATUS_ACTIVE) {
1470                         VDBG("Request not complete");
1471                         status = REQ_UNCOMPLETE;
1472                         return status;
1473                 } else if (remaining_length) {
1474                         if (direction) {
1475                                 VDBG("Transmit dTD remaining length not zero");
1476                                 status = -EPROTO;
1477                                 break;
1478                         } else {
1479                                 td_complete++;
1480                                 break;
1481                         }
1482                 } else {
1483                         td_complete++;
1484                         VDBG("dTD transmitted successful");
1485                 }
1486
1487                 if (j != curr_req->dtd_count - 1)
1488                         curr_td = (struct ep_td_struct *)curr_td->next_td_virt;
1489         }
1490
1491         if (status)
1492                 return status;
1493
1494         curr_req->req.actual = actual;
1495
1496         return 0;
1497 }
1498
1499 /* Process a DTD completion interrupt */
1500 static void dtd_complete_irq(struct fsl_udc *udc)
1501 {
1502         u32 bit_pos;
1503         int i, ep_num, direction, bit_mask, status;
1504         struct fsl_ep *curr_ep;
1505         struct fsl_req *curr_req, *temp_req;
1506
1507         /* Clear the bits in the register */
1508         bit_pos = fsl_readl(&dr_regs->endptcomplete);
1509         fsl_writel(bit_pos, &dr_regs->endptcomplete);
1510
1511         if (!bit_pos)
1512                 return;
1513
1514         for (i = 0; i < udc->max_ep * 2; i++) {
1515                 ep_num = i >> 1;
1516                 direction = i % 2;
1517
1518                 bit_mask = 1 << (ep_num + 16 * direction);
1519
1520                 if (!(bit_pos & bit_mask))
1521                         continue;
1522
1523                 curr_ep = get_ep_by_pipe(udc, i);
1524
1525                 /* If the ep is configured */
1526                 if (curr_ep->name == NULL) {
1527                         WARNING("Invalid EP?");
1528                         continue;
1529                 }
1530
1531                 /* process the req queue until an uncomplete request */
1532                 list_for_each_entry_safe(curr_req, temp_req, &curr_ep->queue,
1533                                 queue) {
1534                         status = process_ep_req(udc, i, curr_req);
1535
1536                         VDBG("status of process_ep_req= %d, ep = %d",
1537                                         status, ep_num);
1538                         if (status == REQ_UNCOMPLETE)
1539                                 break;
1540                         /* write back status to req */
1541                         curr_req->req.status = status;
1542
1543                         if (ep_num == 0) {
1544                                 ep0_req_complete(udc, curr_ep, curr_req);
1545                                 break;
1546                         } else
1547                                 done(curr_ep, curr_req, status);
1548                 }
1549         }
1550 }
1551
1552 /* Process a port change interrupt */
1553 static void port_change_irq(struct fsl_udc *udc)
1554 {
1555         u32 speed;
1556
1557         /* Bus resetting is finished */
1558         if (!(fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET)) {
1559                 /* Get the speed */
1560                 speed = (fsl_readl(&dr_regs->portsc1)
1561                                 & PORTSCX_PORT_SPEED_MASK);
1562                 switch (speed) {
1563                 case PORTSCX_PORT_SPEED_HIGH:
1564                         udc->gadget.speed = USB_SPEED_HIGH;
1565                         break;
1566                 case PORTSCX_PORT_SPEED_FULL:
1567                         udc->gadget.speed = USB_SPEED_FULL;
1568                         break;
1569                 case PORTSCX_PORT_SPEED_LOW:
1570                         udc->gadget.speed = USB_SPEED_LOW;
1571                         break;
1572                 default:
1573                         udc->gadget.speed = USB_SPEED_UNKNOWN;
1574                         break;
1575                 }
1576         }
1577
1578         /* Update USB state */
1579         if (!udc->resume_state)
1580                 udc->usb_state = USB_STATE_DEFAULT;
1581 }
1582
1583 /* Process suspend interrupt */
1584 static void suspend_irq(struct fsl_udc *udc)
1585 {
1586         udc->resume_state = udc->usb_state;
1587         udc->usb_state = USB_STATE_SUSPENDED;
1588
1589         /* report suspend to the driver, serial.c does not support this */
1590         if (udc->driver->suspend)
1591                 udc->driver->suspend(&udc->gadget);
1592 }
1593
1594 static void bus_resume(struct fsl_udc *udc)
1595 {
1596         udc->usb_state = udc->resume_state;
1597         udc->resume_state = 0;
1598
1599         /* report resume to the driver, serial.c does not support this */
1600         if (udc->driver->resume)
1601                 udc->driver->resume(&udc->gadget);
1602 }
1603
1604 /* Clear up all ep queues */
1605 static int reset_queues(struct fsl_udc *udc)
1606 {
1607         u8 pipe;
1608
1609         for (pipe = 0; pipe < udc->max_pipes; pipe++)
1610                 udc_reset_ep_queue(udc, pipe);
1611
1612         /* report disconnect; the driver is already quiesced */
1613         spin_unlock(&udc->lock);
1614         udc->driver->disconnect(&udc->gadget);
1615         spin_lock(&udc->lock);
1616
1617         return 0;
1618 }
1619
1620 /* Process reset interrupt */
1621 static void reset_irq(struct fsl_udc *udc)
1622 {
1623         u32 temp;
1624         unsigned long timeout;
1625
1626         /* Clear the device address */
1627         temp = fsl_readl(&dr_regs->deviceaddr);
1628         fsl_writel(temp & ~USB_DEVICE_ADDRESS_MASK, &dr_regs->deviceaddr);
1629
1630         udc->device_address = 0;
1631
1632         /* Clear usb state */
1633         udc->resume_state = 0;
1634         udc->ep0_dir = 0;
1635         udc->ep0_state = WAIT_FOR_SETUP;
1636         udc->remote_wakeup = 0; /* default to 0 on reset */
1637         udc->gadget.b_hnp_enable = 0;
1638         udc->gadget.a_hnp_support = 0;
1639         udc->gadget.a_alt_hnp_support = 0;
1640
1641         /* Clear all the setup token semaphores */
1642         temp = fsl_readl(&dr_regs->endptsetupstat);
1643         fsl_writel(temp, &dr_regs->endptsetupstat);
1644
1645         /* Clear all the endpoint complete status bits */
1646         temp = fsl_readl(&dr_regs->endptcomplete);
1647         fsl_writel(temp, &dr_regs->endptcomplete);
1648
1649         timeout = jiffies + 100;
1650         while (fsl_readl(&dr_regs->endpointprime)) {
1651                 /* Wait until all endptprime bits cleared */
1652                 if (time_after(jiffies, timeout)) {
1653                         ERR("Timeout for reset\n");
1654                         break;
1655                 }
1656                 cpu_relax();
1657         }
1658
1659         /* Write 1s to the flush register */
1660         fsl_writel(0xffffffff, &dr_regs->endptflush);
1661
1662         if (fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET) {
1663                 VDBG("Bus reset");
1664                 /* Reset all the queues, include XD, dTD, EP queue
1665                  * head and TR Queue */
1666                 reset_queues(udc);
1667                 udc->usb_state = USB_STATE_DEFAULT;
1668         } else {
1669                 VDBG("Controller reset");
1670                 /* initialize usb hw reg except for regs for EP, not
1671                  * touch usbintr reg */
1672                 dr_controller_setup(udc);
1673
1674                 /* Reset all internal used Queues */
1675                 reset_queues(udc);
1676
1677                 ep0_setup(udc);
1678
1679                 /* Enable DR IRQ reg, Set Run bit, change udc state */
1680                 dr_controller_run(udc);
1681                 udc->usb_state = USB_STATE_ATTACHED;
1682         }
1683 }
1684
1685 /*
1686  * USB device controller interrupt handler
1687  */
1688 static irqreturn_t fsl_udc_irq(int irq, void *_udc)
1689 {
1690         struct fsl_udc *udc = _udc;
1691         u32 irq_src;
1692         irqreturn_t status = IRQ_NONE;
1693         unsigned long flags;
1694
1695         /* Disable ISR for OTG host mode */
1696         if (udc->stopped)
1697                 return IRQ_NONE;
1698         spin_lock_irqsave(&udc->lock, flags);
1699         irq_src = fsl_readl(&dr_regs->usbsts) & fsl_readl(&dr_regs->usbintr);
1700         /* Clear notification bits */
1701         fsl_writel(irq_src, &dr_regs->usbsts);
1702
1703         /* VDBG("irq_src [0x%8x]", irq_src); */
1704
1705         /* Need to resume? */
1706         if (udc->usb_state == USB_STATE_SUSPENDED)
1707                 if ((fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_SUSPEND) == 0)
1708                         bus_resume(udc);
1709
1710         /* USB Interrupt */
1711         if (irq_src & USB_STS_INT) {
1712                 VDBG("Packet int");
1713                 /* Setup package, we only support ep0 as control ep */
1714                 if (fsl_readl(&dr_regs->endptsetupstat) & EP_SETUP_STATUS_EP0) {
1715                         tripwire_handler(udc, 0,
1716                                         (u8 *) (&udc->local_setup_buff));
1717                         setup_received_irq(udc, &udc->local_setup_buff);
1718                         status = IRQ_HANDLED;
1719                 }
1720
1721                 /* completion of dtd */
1722                 if (fsl_readl(&dr_regs->endptcomplete)) {
1723                         dtd_complete_irq(udc);
1724                         status = IRQ_HANDLED;
1725                 }
1726         }
1727
1728         /* SOF (for ISO transfer) */
1729         if (irq_src & USB_STS_SOF) {
1730                 status = IRQ_HANDLED;
1731         }
1732
1733         /* Port Change */
1734         if (irq_src & USB_STS_PORT_CHANGE) {
1735                 port_change_irq(udc);
1736                 status = IRQ_HANDLED;
1737         }
1738
1739         /* Reset Received */
1740         if (irq_src & USB_STS_RESET) {
1741                 reset_irq(udc);
1742                 status = IRQ_HANDLED;
1743         }
1744
1745         /* Sleep Enable (Suspend) */
1746         if (irq_src & USB_STS_SUSPEND) {
1747                 suspend_irq(udc);
1748                 status = IRQ_HANDLED;
1749         }
1750
1751         if (irq_src & (USB_STS_ERR | USB_STS_SYS_ERR)) {
1752                 VDBG("Error IRQ %x", irq_src);
1753         }
1754
1755         spin_unlock_irqrestore(&udc->lock, flags);
1756         return status;
1757 }
1758
1759 /*----------------------------------------------------------------*
1760  * Hook to gadget drivers
1761  * Called by initialization code of gadget drivers
1762 *----------------------------------------------------------------*/
1763 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1764 {
1765         int retval = -ENODEV;
1766         unsigned long flags = 0;
1767
1768         if (!udc_controller)
1769                 return -ENODEV;
1770
1771         if (!driver || (driver->speed != USB_SPEED_FULL
1772                                 && driver->speed != USB_SPEED_HIGH)
1773                         || !driver->bind || !driver->disconnect
1774                         || !driver->setup)
1775                 return -EINVAL;
1776
1777         if (udc_controller->driver)
1778                 return -EBUSY;
1779
1780         /* lock is needed but whether should use this lock or another */
1781         spin_lock_irqsave(&udc_controller->lock, flags);
1782
1783         driver->driver.bus = NULL;
1784         /* hook up the driver */
1785         udc_controller->driver = driver;
1786         udc_controller->gadget.dev.driver = &driver->driver;
1787         spin_unlock_irqrestore(&udc_controller->lock, flags);
1788
1789         /* bind udc driver to gadget driver */
1790         retval = driver->bind(&udc_controller->gadget);
1791         if (retval) {
1792                 VDBG("bind to %s --> %d", driver->driver.name, retval);
1793                 udc_controller->gadget.dev.driver = NULL;
1794                 udc_controller->driver = NULL;
1795                 goto out;
1796         }
1797
1798         /* Enable DR IRQ reg and Set usbcmd reg  Run bit */
1799         dr_controller_run(udc_controller);
1800         udc_controller->usb_state = USB_STATE_ATTACHED;
1801         udc_controller->ep0_state = WAIT_FOR_SETUP;
1802         udc_controller->ep0_dir = 0;
1803         printk(KERN_INFO "%s: bind to driver %s\n",
1804                         udc_controller->gadget.name, driver->driver.name);
1805
1806 out:
1807         if (retval)
1808                 printk("gadget driver register failed %d\n", retval);
1809         return retval;
1810 }
1811 EXPORT_SYMBOL(usb_gadget_register_driver);
1812
1813 /* Disconnect from gadget driver */
1814 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1815 {
1816         struct fsl_ep *loop_ep;
1817         unsigned long flags;
1818
1819         if (!udc_controller)
1820                 return -ENODEV;
1821
1822         if (!driver || driver != udc_controller->driver || !driver->unbind)
1823                 return -EINVAL;
1824
1825         if (udc_controller->transceiver)
1826                 otg_set_peripheral(udc_controller->transceiver, NULL);
1827
1828         /* stop DR, disable intr */
1829         dr_controller_stop(udc_controller);
1830
1831         /* in fact, no needed */
1832         udc_controller->usb_state = USB_STATE_ATTACHED;
1833         udc_controller->ep0_state = WAIT_FOR_SETUP;
1834         udc_controller->ep0_dir = 0;
1835
1836         /* stand operation */
1837         spin_lock_irqsave(&udc_controller->lock, flags);
1838         udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
1839         nuke(&udc_controller->eps[0], -ESHUTDOWN);
1840         list_for_each_entry(loop_ep, &udc_controller->gadget.ep_list,
1841                         ep.ep_list)
1842                 nuke(loop_ep, -ESHUTDOWN);
1843         spin_unlock_irqrestore(&udc_controller->lock, flags);
1844
1845         /* unbind gadget and unhook driver. */
1846         driver->unbind(&udc_controller->gadget);
1847         udc_controller->gadget.dev.driver = NULL;
1848         udc_controller->driver = NULL;
1849
1850         printk("unregistered gadget driver '%s'\n", driver->driver.name);
1851         return 0;
1852 }
1853 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1854
1855 /*-------------------------------------------------------------------------
1856                 PROC File System Support
1857 -------------------------------------------------------------------------*/
1858 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
1859
1860 #include <linux/seq_file.h>
1861
1862 static const char proc_filename[] = "driver/fsl_usb2_udc";
1863
1864 static int fsl_proc_read(char *page, char **start, off_t off, int count,
1865                 int *eof, void *_dev)
1866 {
1867         char *buf = page;
1868         char *next = buf;
1869         unsigned size = count;
1870         unsigned long flags;
1871         int t, i;
1872         u32 tmp_reg;
1873         struct fsl_ep *ep = NULL;
1874         struct fsl_req *req;
1875
1876         struct fsl_udc *udc = udc_controller;
1877         if (off != 0)
1878                 return 0;
1879
1880         spin_lock_irqsave(&udc->lock, flags);
1881
1882         /* ------basic driver information ---- */
1883         t = scnprintf(next, size,
1884                         DRIVER_DESC "\n"
1885                         "%s version: %s\n"
1886                         "Gadget driver: %s\n\n",
1887                         driver_name, DRIVER_VERSION,
1888                         udc->driver ? udc->driver->driver.name : "(none)");
1889         size -= t;
1890         next += t;
1891
1892         /* ------ DR Registers ----- */
1893         tmp_reg = fsl_readl(&dr_regs->usbcmd);
1894         t = scnprintf(next, size,
1895                         "USBCMD reg:\n"
1896                         "SetupTW: %d\n"
1897                         "Run/Stop: %s\n\n",
1898                         (tmp_reg & USB_CMD_SUTW) ? 1 : 0,
1899                         (tmp_reg & USB_CMD_RUN_STOP) ? "Run" : "Stop");
1900         size -= t;
1901         next += t;
1902
1903         tmp_reg = fsl_readl(&dr_regs->usbsts);
1904         t = scnprintf(next, size,
1905                         "USB Status Reg:\n"
1906                         "Dr Suspend: %d Reset Received: %d System Error: %s "
1907                         "USB Error Interrupt: %s\n\n",
1908                         (tmp_reg & USB_STS_SUSPEND) ? 1 : 0,
1909                         (tmp_reg & USB_STS_RESET) ? 1 : 0,
1910                         (tmp_reg & USB_STS_SYS_ERR) ? "Err" : "Normal",
1911                         (tmp_reg & USB_STS_ERR) ? "Err detected" : "No err");
1912         size -= t;
1913         next += t;
1914
1915         tmp_reg = fsl_readl(&dr_regs->usbintr);
1916         t = scnprintf(next, size,
1917                         "USB Intrrupt Enable Reg:\n"
1918                         "Sleep Enable: %d SOF Received Enable: %d "
1919                         "Reset Enable: %d\n"
1920                         "System Error Enable: %d "
1921                         "Port Change Dectected Enable: %d\n"
1922                         "USB Error Intr Enable: %d USB Intr Enable: %d\n\n",
1923                         (tmp_reg & USB_INTR_DEVICE_SUSPEND) ? 1 : 0,
1924                         (tmp_reg & USB_INTR_SOF_EN) ? 1 : 0,
1925                         (tmp_reg & USB_INTR_RESET_EN) ? 1 : 0,
1926                         (tmp_reg & USB_INTR_SYS_ERR_EN) ? 1 : 0,
1927                         (tmp_reg & USB_INTR_PTC_DETECT_EN) ? 1 : 0,
1928                         (tmp_reg & USB_INTR_ERR_INT_EN) ? 1 : 0,
1929                         (tmp_reg & USB_INTR_INT_EN) ? 1 : 0);
1930         size -= t;
1931         next += t;
1932
1933         tmp_reg = fsl_readl(&dr_regs->frindex);
1934         t = scnprintf(next, size,
1935                         "USB Frame Index Reg: Frame Number is 0x%x\n\n",
1936                         (tmp_reg & USB_FRINDEX_MASKS));
1937         size -= t;
1938         next += t;
1939
1940         tmp_reg = fsl_readl(&dr_regs->deviceaddr);
1941         t = scnprintf(next, size,
1942                         "USB Device Address Reg: Device Addr is 0x%x\n\n",
1943                         (tmp_reg & USB_DEVICE_ADDRESS_MASK));
1944         size -= t;
1945         next += t;
1946
1947         tmp_reg = fsl_readl(&dr_regs->endpointlistaddr);
1948         t = scnprintf(next, size,
1949                         "USB Endpoint List Address Reg: "
1950                         "Device Addr is 0x%x\n\n",
1951                         (tmp_reg & USB_EP_LIST_ADDRESS_MASK));
1952         size -= t;
1953         next += t;
1954
1955         tmp_reg = fsl_readl(&dr_regs->portsc1);
1956         t = scnprintf(next, size,
1957                 "USB Port Status&Control Reg:\n"
1958                 "Port Transceiver Type : %s Port Speed: %s\n"
1959                 "PHY Low Power Suspend: %s Port Reset: %s "
1960                 "Port Suspend Mode: %s\n"
1961                 "Over-current Change: %s "
1962                 "Port Enable/Disable Change: %s\n"
1963                 "Port Enabled/Disabled: %s "
1964                 "Current Connect Status: %s\n\n", ( {
1965                         char *s;
1966                         switch (tmp_reg & PORTSCX_PTS_FSLS) {
1967                         case PORTSCX_PTS_UTMI:
1968                                 s = "UTMI"; break;
1969                         case PORTSCX_PTS_ULPI:
1970                                 s = "ULPI "; break;
1971                         case PORTSCX_PTS_FSLS:
1972                                 s = "FS/LS Serial"; break;
1973                         default:
1974                                 s = "None"; break;
1975                         }
1976                         s;} ), ( {
1977                         char *s;
1978                         switch (tmp_reg & PORTSCX_PORT_SPEED_UNDEF) {
1979                         case PORTSCX_PORT_SPEED_FULL:
1980                                 s = "Full Speed"; break;
1981                         case PORTSCX_PORT_SPEED_LOW:
1982                                 s = "Low Speed"; break;
1983                         case PORTSCX_PORT_SPEED_HIGH:
1984                                 s = "High Speed"; break;
1985                         default:
1986                                 s = "Undefined"; break;
1987                         }
1988                         s;
1989                 } ),
1990                 (tmp_reg & PORTSCX_PHY_LOW_POWER_SPD) ?
1991                 "Normal PHY mode" : "Low power mode",
1992                 (tmp_reg & PORTSCX_PORT_RESET) ? "In Reset" :
1993                 "Not in Reset",
1994                 (tmp_reg & PORTSCX_PORT_SUSPEND) ? "In " : "Not in",
1995                 (tmp_reg & PORTSCX_OVER_CURRENT_CHG) ? "Dected" :
1996                 "No",
1997                 (tmp_reg & PORTSCX_PORT_EN_DIS_CHANGE) ? "Disable" :
1998                 "Not change",
1999                 (tmp_reg & PORTSCX_PORT_ENABLE) ? "Enable" :
2000                 "Not correct",
2001                 (tmp_reg & PORTSCX_CURRENT_CONNECT_STATUS) ?
2002                 "Attached" : "Not-Att");
2003         size -= t;
2004         next += t;
2005
2006         tmp_reg = fsl_readl(&dr_regs->usbmode);
2007         t = scnprintf(next, size,
2008                         "USB Mode Reg: Controller Mode is: %s\n\n", ( {
2009                                 char *s;
2010                                 switch (tmp_reg & USB_MODE_CTRL_MODE_HOST) {
2011                                 case USB_MODE_CTRL_MODE_IDLE:
2012                                         s = "Idle"; break;
2013                                 case USB_MODE_CTRL_MODE_DEVICE:
2014                                         s = "Device Controller"; break;
2015                                 case USB_MODE_CTRL_MODE_HOST:
2016                                         s = "Host Controller"; break;
2017                                 default:
2018                                         s = "None"; break;
2019                                 }
2020                                 s;
2021                         } ));
2022         size -= t;
2023         next += t;
2024
2025         tmp_reg = fsl_readl(&dr_regs->endptsetupstat);
2026         t = scnprintf(next, size,
2027                         "Endpoint Setup Status Reg: SETUP on ep 0x%x\n\n",
2028                         (tmp_reg & EP_SETUP_STATUS_MASK));
2029         size -= t;
2030         next += t;
2031
2032         for (i = 0; i < udc->max_ep / 2; i++) {
2033                 tmp_reg = fsl_readl(&dr_regs->endptctrl[i]);
2034                 t = scnprintf(next, size, "EP Ctrl Reg [0x%x]: = [0x%x]\n",
2035                                 i, tmp_reg);
2036                 size -= t;
2037                 next += t;
2038         }
2039         tmp_reg = fsl_readl(&dr_regs->endpointprime);
2040         t = scnprintf(next, size, "EP Prime Reg = [0x%x]\n\n", tmp_reg);
2041         size -= t;
2042         next += t;
2043
2044         tmp_reg = usb_sys_regs->snoop1;
2045         t = scnprintf(next, size, "Snoop1 Reg : = [0x%x]\n\n", tmp_reg);
2046         size -= t;
2047         next += t;
2048
2049         tmp_reg = usb_sys_regs->control;
2050         t = scnprintf(next, size, "General Control Reg : = [0x%x]\n\n",
2051                         tmp_reg);
2052         size -= t;
2053         next += t;
2054
2055         /* ------fsl_udc, fsl_ep, fsl_request structure information ----- */
2056         ep = &udc->eps[0];
2057         t = scnprintf(next, size, "For %s Maxpkt is 0x%x index is 0x%x\n",
2058                         ep->ep.name, ep_maxpacket(ep), ep_index(ep));
2059         size -= t;
2060         next += t;
2061
2062         if (list_empty(&ep->queue)) {
2063                 t = scnprintf(next, size, "its req queue is empty\n\n");
2064                 size -= t;
2065                 next += t;
2066         } else {
2067                 list_for_each_entry(req, &ep->queue, queue) {
2068                         t = scnprintf(next, size,
2069                                 "req %p actual 0x%x length 0x%x buf %p\n",
2070                                 &req->req, req->req.actual,
2071                                 req->req.length, req->req.buf);
2072                         size -= t;
2073                         next += t;
2074                 }
2075         }
2076         /* other gadget->eplist ep */
2077         list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
2078                 if (ep->desc) {
2079                         t = scnprintf(next, size,
2080                                         "\nFor %s Maxpkt is 0x%x "
2081                                         "index is 0x%x\n",
2082                                         ep->ep.name, ep_maxpacket(ep),
2083                                         ep_index(ep));
2084                         size -= t;
2085                         next += t;
2086
2087                         if (list_empty(&ep->queue)) {
2088                                 t = scnprintf(next, size,
2089                                                 "its req queue is empty\n\n");
2090                                 size -= t;
2091                                 next += t;
2092                         } else {
2093                                 list_for_each_entry(req, &ep->queue, queue) {
2094                                         t = scnprintf(next, size,
2095                                                 "req %p actual 0x%x length "
2096                                                 "0x%x  buf %p\n",
2097                                                 &req->req, req->req.actual,
2098                                                 req->req.length, req->req.buf);
2099                                         size -= t;
2100                                         next += t;
2101                                         }       /* end for each_entry of ep req */
2102                                 }       /* end for else */
2103                         }       /* end for if(ep->queue) */
2104                 }               /* end (ep->desc) */
2105
2106         spin_unlock_irqrestore(&udc->lock, flags);
2107
2108         *eof = 1;
2109         return count - size;
2110 }
2111
2112 #define create_proc_file()      create_proc_read_entry(proc_filename, \
2113                                 0, NULL, fsl_proc_read, NULL)
2114
2115 #define remove_proc_file()      remove_proc_entry(proc_filename, NULL)
2116
2117 #else                           /* !CONFIG_USB_GADGET_DEBUG_FILES */
2118
2119 #define create_proc_file()      do {} while (0)
2120 #define remove_proc_file()      do {} while (0)
2121
2122 #endif                          /* CONFIG_USB_GADGET_DEBUG_FILES */
2123
2124 /*-------------------------------------------------------------------------*/
2125
2126 /* Release udc structures */
2127 static void fsl_udc_release(struct device *dev)
2128 {
2129         complete(udc_controller->done);
2130         dma_free_coherent(dev, udc_controller->ep_qh_size,
2131                         udc_controller->ep_qh, udc_controller->ep_qh_dma);
2132         kfree(udc_controller);
2133 }
2134
2135 /******************************************************************
2136         Internal structure setup functions
2137 *******************************************************************/
2138 /*------------------------------------------------------------------
2139  * init resource for globle controller
2140  * Return the udc handle on success or NULL on failure
2141  ------------------------------------------------------------------*/
2142 static int __init struct_udc_setup(struct fsl_udc *udc,
2143                 struct platform_device *pdev)
2144 {
2145         struct fsl_usb2_platform_data *pdata;
2146         size_t size;
2147
2148         pdata = pdev->dev.platform_data;
2149         udc->phy_mode = pdata->phy_mode;
2150
2151         udc->eps = kzalloc(sizeof(struct fsl_ep) * udc->max_ep, GFP_KERNEL);
2152         if (!udc->eps) {
2153                 ERR("malloc fsl_ep failed\n");
2154                 return -1;
2155         }
2156
2157         /* initialized QHs, take care of alignment */
2158         size = udc->max_ep * sizeof(struct ep_queue_head);
2159         if (size < QH_ALIGNMENT)
2160                 size = QH_ALIGNMENT;
2161         else if ((size % QH_ALIGNMENT) != 0) {
2162                 size += QH_ALIGNMENT + 1;
2163                 size &= ~(QH_ALIGNMENT - 1);
2164         }
2165         udc->ep_qh = dma_alloc_coherent(&pdev->dev, size,
2166                                         &udc->ep_qh_dma, GFP_KERNEL);
2167         if (!udc->ep_qh) {
2168                 ERR("malloc QHs for udc failed\n");
2169                 kfree(udc->eps);
2170                 return -1;
2171         }
2172
2173         udc->ep_qh_size = size;
2174
2175         /* Initialize ep0 status request structure */
2176         /* FIXME: fsl_alloc_request() ignores ep argument */
2177         udc->status_req = container_of(fsl_alloc_request(NULL, GFP_KERNEL),
2178                         struct fsl_req, req);
2179         /* allocate a small amount of memory to get valid address */
2180         udc->status_req->req.buf = kmalloc(8, GFP_KERNEL);
2181         udc->status_req->req.dma = virt_to_phys(udc->status_req->req.buf);
2182
2183         udc->resume_state = USB_STATE_NOTATTACHED;
2184         udc->usb_state = USB_STATE_POWERED;
2185         udc->ep0_dir = 0;
2186         udc->remote_wakeup = 0; /* default to 0 on reset */
2187
2188         return 0;
2189 }
2190
2191 /*----------------------------------------------------------------
2192  * Setup the fsl_ep struct for eps
2193  * Link fsl_ep->ep to gadget->ep_list
2194  * ep0out is not used so do nothing here
2195  * ep0in should be taken care
2196  *--------------------------------------------------------------*/
2197 static int __init struct_ep_setup(struct fsl_udc *udc, unsigned char index,
2198                 char *name, int link)
2199 {
2200         struct fsl_ep *ep = &udc->eps[index];
2201
2202         ep->udc = udc;
2203         strcpy(ep->name, name);
2204         ep->ep.name = ep->name;
2205
2206         ep->ep.ops = &fsl_ep_ops;
2207         ep->stopped = 0;
2208
2209         /* for ep0: maxP defined in desc
2210          * for other eps, maxP is set by epautoconfig() called by gadget layer
2211          */
2212         ep->ep.maxpacket = (unsigned short) ~0;
2213
2214         /* the queue lists any req for this ep */
2215         INIT_LIST_HEAD(&ep->queue);
2216
2217         /* gagdet.ep_list used for ep_autoconfig so no ep0 */
2218         if (link)
2219                 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2220         ep->gadget = &udc->gadget;
2221         ep->qh = &udc->ep_qh[index];
2222
2223         return 0;
2224 }
2225
2226 /* Driver probe function
2227  * all intialization operations implemented here except enabling usb_intr reg
2228  * board setup should have been done in the platform code
2229  */
2230 static int __init fsl_udc_probe(struct platform_device *pdev)
2231 {
2232         struct resource *res;
2233         int ret = -ENODEV;
2234         unsigned int i;
2235         u32 dccparams;
2236
2237         if (strcmp(pdev->name, driver_name)) {
2238                 VDBG("Wrong device");
2239                 return -ENODEV;
2240         }
2241
2242         udc_controller = kzalloc(sizeof(struct fsl_udc), GFP_KERNEL);
2243         if (udc_controller == NULL) {
2244                 ERR("malloc udc failed\n");
2245                 return -ENOMEM;
2246         }
2247
2248         spin_lock_init(&udc_controller->lock);
2249         udc_controller->stopped = 1;
2250
2251         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2252         if (!res) {
2253                 kfree(udc_controller);
2254                 return -ENXIO;
2255         }
2256
2257         if (!request_mem_region(res->start, res->end - res->start + 1,
2258                                 driver_name)) {
2259                 ERR("request mem region for %s failed\n", pdev->name);
2260                 kfree(udc_controller);
2261                 return -EBUSY;
2262         }
2263
2264         dr_regs = ioremap(res->start, res->end - res->start + 1);
2265         if (!dr_regs) {
2266                 ret = -ENOMEM;
2267                 goto err1;
2268         }
2269
2270         usb_sys_regs = (struct usb_sys_interface *)
2271                         ((u32)dr_regs + USB_DR_SYS_OFFSET);
2272
2273         /* Read Device Controller Capability Parameters register */
2274         dccparams = fsl_readl(&dr_regs->dccparams);
2275         if (!(dccparams & DCCPARAMS_DC)) {
2276                 ERR("This SOC doesn't support device role\n");
2277                 ret = -ENODEV;
2278                 goto err2;
2279         }
2280         /* Get max device endpoints */
2281         /* DEN is bidirectional ep number, max_ep doubles the number */
2282         udc_controller->max_ep = (dccparams & DCCPARAMS_DEN_MASK) * 2;
2283
2284         udc_controller->irq = platform_get_irq(pdev, 0);
2285         if (!udc_controller->irq) {
2286                 ret = -ENODEV;
2287                 goto err2;
2288         }
2289
2290         ret = request_irq(udc_controller->irq, fsl_udc_irq, IRQF_SHARED,
2291                         driver_name, udc_controller);
2292         if (ret != 0) {
2293                 ERR("cannot request irq %d err %d\n",
2294                                 udc_controller->irq, ret);
2295                 goto err2;
2296         }
2297
2298         /* Initialize the udc structure including QH member and other member */
2299         if (struct_udc_setup(udc_controller, pdev)) {
2300                 ERR("Can't initialize udc data structure\n");
2301                 ret = -ENOMEM;
2302                 goto err3;
2303         }
2304
2305         /* initialize usb hw reg except for regs for EP,
2306          * leave usbintr reg untouched */
2307         dr_controller_setup(udc_controller);
2308
2309         /* Setup gadget structure */
2310         udc_controller->gadget.ops = &fsl_gadget_ops;
2311         udc_controller->gadget.is_dualspeed = 1;
2312         udc_controller->gadget.ep0 = &udc_controller->eps[0].ep;
2313         INIT_LIST_HEAD(&udc_controller->gadget.ep_list);
2314         udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
2315         udc_controller->gadget.name = driver_name;
2316
2317         /* Setup gadget.dev and register with kernel */
2318         dev_set_name(&udc_controller->gadget.dev, "gadget");
2319         udc_controller->gadget.dev.release = fsl_udc_release;
2320         udc_controller->gadget.dev.parent = &pdev->dev;
2321         ret = device_register(&udc_controller->gadget.dev);
2322         if (ret < 0)
2323                 goto err3;
2324
2325         /* setup QH and epctrl for ep0 */
2326         ep0_setup(udc_controller);
2327
2328         /* setup udc->eps[] for ep0 */
2329         struct_ep_setup(udc_controller, 0, "ep0", 0);
2330         /* for ep0: the desc defined here;
2331          * for other eps, gadget layer called ep_enable with defined desc
2332          */
2333         udc_controller->eps[0].desc = &fsl_ep0_desc;
2334         udc_controller->eps[0].ep.maxpacket = USB_MAX_CTRL_PAYLOAD;
2335
2336         /* setup the udc->eps[] for non-control endpoints and link
2337          * to gadget.ep_list */
2338         for (i = 1; i < (int)(udc_controller->max_ep / 2); i++) {
2339                 char name[14];
2340
2341                 sprintf(name, "ep%dout", i);
2342                 struct_ep_setup(udc_controller, i * 2, name, 1);
2343                 sprintf(name, "ep%din", i);
2344                 struct_ep_setup(udc_controller, i * 2 + 1, name, 1);
2345         }
2346
2347         /* use dma_pool for TD management */
2348         udc_controller->td_pool = dma_pool_create("udc_td", &pdev->dev,
2349                         sizeof(struct ep_td_struct),
2350                         DTD_ALIGNMENT, UDC_DMA_BOUNDARY);
2351         if (udc_controller->td_pool == NULL) {
2352                 ret = -ENOMEM;
2353                 goto err4;
2354         }
2355         create_proc_file();
2356         return 0;
2357
2358 err4:
2359         device_unregister(&udc_controller->gadget.dev);
2360 err3:
2361         free_irq(udc_controller->irq, udc_controller);
2362 err2:
2363         iounmap(dr_regs);
2364 err1:
2365         release_mem_region(res->start, res->end - res->start + 1);
2366         kfree(udc_controller);
2367         return ret;
2368 }
2369
2370 /* Driver removal function
2371  * Free resources and finish pending transactions
2372  */
2373 static int __exit fsl_udc_remove(struct platform_device *pdev)
2374 {
2375         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2376
2377         DECLARE_COMPLETION(done);
2378
2379         if (!udc_controller)
2380                 return -ENODEV;
2381         udc_controller->done = &done;
2382
2383         /* DR has been stopped in usb_gadget_unregister_driver() */
2384         remove_proc_file();
2385
2386         /* Free allocated memory */
2387         kfree(udc_controller->status_req->req.buf);
2388         kfree(udc_controller->status_req);
2389         kfree(udc_controller->eps);
2390
2391         dma_pool_destroy(udc_controller->td_pool);
2392         free_irq(udc_controller->irq, udc_controller);
2393         iounmap(dr_regs);
2394         release_mem_region(res->start, res->end - res->start + 1);
2395
2396         device_unregister(&udc_controller->gadget.dev);
2397         /* free udc --wait for the release() finished */
2398         wait_for_completion(&done);
2399
2400         return 0;
2401 }
2402
2403 /*-----------------------------------------------------------------
2404  * Modify Power management attributes
2405  * Used by OTG statemachine to disable gadget temporarily
2406  -----------------------------------------------------------------*/
2407 static int fsl_udc_suspend(struct platform_device *pdev, pm_message_t state)
2408 {
2409         dr_controller_stop(udc_controller);
2410         return 0;
2411 }
2412
2413 /*-----------------------------------------------------------------
2414  * Invoked on USB resume. May be called in_interrupt.
2415  * Here we start the DR controller and enable the irq
2416  *-----------------------------------------------------------------*/
2417 static int fsl_udc_resume(struct platform_device *pdev)
2418 {
2419         /* Enable DR irq reg and set controller Run */
2420         if (udc_controller->stopped) {
2421                 dr_controller_setup(udc_controller);
2422                 dr_controller_run(udc_controller);
2423         }
2424         udc_controller->usb_state = USB_STATE_ATTACHED;
2425         udc_controller->ep0_state = WAIT_FOR_SETUP;
2426         udc_controller->ep0_dir = 0;
2427         return 0;
2428 }
2429
2430 /*-------------------------------------------------------------------------
2431         Register entry point for the peripheral controller driver
2432 --------------------------------------------------------------------------*/
2433
2434 static struct platform_driver udc_driver = {
2435         .remove  = __exit_p(fsl_udc_remove),
2436         /* these suspend and resume are not usb suspend and resume */
2437         .suspend = fsl_udc_suspend,
2438         .resume  = fsl_udc_resume,
2439         .driver  = {
2440                 .name = (char *)driver_name,
2441                 .owner = THIS_MODULE,
2442         },
2443 };
2444
2445 static int __init udc_init(void)
2446 {
2447         printk(KERN_INFO "%s (%s)\n", driver_desc, DRIVER_VERSION);
2448         return platform_driver_probe(&udc_driver, fsl_udc_probe);
2449 }
2450
2451 module_init(udc_init);
2452
2453 static void __exit udc_exit(void)
2454 {
2455         platform_driver_unregister(&udc_driver);
2456         printk("%s unregistered\n", driver_desc);
2457 }
2458
2459 module_exit(udc_exit);
2460
2461 MODULE_DESCRIPTION(DRIVER_DESC);
2462 MODULE_AUTHOR(DRIVER_AUTHOR);
2463 MODULE_LICENSE("GPL");
2464 MODULE_ALIAS("platform:fsl-usb2-udc");