drivers/staging/winbond/mds_s.h

   1 #ifndef __WINBOND_MDS_H
   2 #define __WINBOND_MDS_H
   3
   4 #include <linux/timer.h>
   5 #include <linux/types.h>
   6 #include <asm/atomic.h>
   7
   8 #include "localpara.h"
   9 #include "mac_structures.h"
  10 #include "scan_s.h"
  11
  12 ////////////////////////////////////////////////////////////////////////////////////////////////////////
  13 #define MAX_USB_TX_DESCRIPTOR           15              // IS89C35 ability
  14 #define MAX_USB_TX_BUFFER_NUMBER        4               // Virtual pre-buffer number of MAX_USB_TX_BUFFER
  15 #define MAX_USB_TX_BUFFER                       4096    // IS89C35 ability 4n alignment is required for hardware
  16
  17 #define AUTH_REQUEST_PAIRWISE_ERROR                     0               // _F flag setting
  18 #define AUTH_REQUEST_GROUP_ERROR                        1               // _F flag setting
  19
  20 // For variable setting
  21 #define CURRENT_BSS_TYPE                                psBSS(psLOCAL->wConnectedSTAindex)->bBssType
  22 #define CURRENT_WEP_MODE                                psSME->_dot11PrivacyInvoked
  23 #define CURRENT_BSSID                                   psBSS(psLOCAL->wConnectedSTAindex)->abBssID
  24 #define CURRENT_DESIRED_WPA_ENABLE              ((psSME->bDesiredAuthMode==WPA_AUTH)||(psSME->bDesiredAuthMode==WPAPSK_AUTH))
  25 #ifdef _WPA2_
  26 #define CURRENT_DESIRED_WPA2_ENABLE             ((psSME->bDesiredAuthMode==WPA2_AUTH)||(psSME->bDesiredAuthMode==WPA2PSK_AUTH))
  27 #endif //end def _WPA2_
  28 #define CURRENT_PAIRWISE_KEY_OK                 psSME->pairwise_key_ok
  29 //[20040712 WS]
  30 #define CURRENT_GROUP_KEY_OK                    psSME->group_key_ok
  31 #define CURRENT_PAIRWISE_KEY                    psSME->tx_mic_key
  32 #define CURRENT_GROUP_KEY                               psSME->group_tx_mic_key
  33 #define CURRENT_ENCRYPT_STATUS                  psSME->encrypt_status
  34 #define CURRENT_WEP_ID                                  adapter->sSmePara._dot11WEPDefaultKeyID
  35 #define CURRENT_CONTROL_PORT_BLOCK              ( psSME->wpa_ok!=1 || (adapter->Mds.boCounterMeasureBlock==1 && (CURRENT_ENCRYPT_STATUS==ENCRYPT_TKIP)) )
  36 #define CURRENT_FRAGMENT_THRESHOLD              (adapter->Mds.TxFragmentThreshold & ~0x1)
  37 #define CURRENT_PREAMBLE_MODE                   psLOCAL->boShortPreamble?WLAN_PREAMBLE_TYPE_SHORT:WLAN_PREAMBLE_TYPE_LONG
  38 #define CURRENT_TX_RATE                                 adapter->sLocalPara.CurrentTxRate
  39 #define CURRENT_FALL_BACK_TX_RATE               adapter->sLocalPara.CurrentTxFallbackRate
  40 #define CURRENT_TX_RATE_FOR_MNG                 adapter->sLocalPara.CurrentTxRateForMng
  41 #define CURRENT_PROTECT_MECHANISM               psLOCAL->boProtectMechanism
  42 #define CURRENT_RTS_THRESHOLD                   adapter->Mds.TxRTSThreshold
  43
  44 #define MIB_GS_XMIT_OK_INC                              adapter->sLocalPara.GS_XMIT_OK++
  45 #define MIB_GS_RCV_OK_INC                               adapter->sLocalPara.GS_RCV_OK++
  46 #define MIB_GS_XMIT_ERROR_INC                   adapter->sLocalPara.GS_XMIT_ERROR
  47
  48 //---------- TX -----------------------------------
  49 #define ETHERNET_TX_DESCRIPTORS         MAX_USB_TX_BUFFER_NUMBER
  50
  51 //---------- RX ------------------------------------
  52 #define ETHERNET_RX_DESCRIPTORS                 8       //It's not necessary to allocate more than 2 in sync indicate
  53
  54 //================================================================
  55 // Configration default value
  56 //================================================================
  57 #define DEFAULT_MULTICASTLISTMAX                32              // standard
  58 #define DEFAULT_TX_BURSTLENGTH                  3               // 32 Longwords
  59 #define DEFAULT_RX_BURSTLENGTH                  3               // 32 Longwords
  60 #define DEFAULT_TX_THRESHOLD                    0               // Full Packet
  61 #define DEFAULT_RX_THRESHOLD                    0               // Full Packet
  62 #define DEFAULT_MAXTXRATE                               6               // 11 Mbps (Long)
  63 #define DEFAULT_CHANNEL                                 3               // Chennel 3
  64 #define DEFAULT_RTSThreshold                    2347    // Disable RTS
  65 //#define DEFAULT_PME                                           1               // Enable
  66 #define DEFAULT_PME                                             0               // Disable
  67 #define DEFAULT_SIFSTIME                                10
  68 #define DEFAULT_ACKTIME_1ML             304     // 148+44+112 911220 by LCC
  69 #define DEFAULT_ACKTIME_2ML             248     // 148+44+56 911220 by LCC
  70 #define DEFAULT_FRAGMENT_THRESHOLD      2346    // No fragment
  71 #define DEFAULT_PREAMBLE_LENGTH                 72
  72 #define DEFAULT_PLCPHEADERTIME_LENGTH   24
  73
  74 /*------------------------------------------------------------------------
  75  0.96 sec since time unit of the R03 for the current, W89C32 is about 60ns
  76  instead of 960 ns. This shall be fixed in the future W89C32
  77  -------------------------------------------------------------------------*/
  78 #define DEFAULT_MAX_RECEIVE_TIME        16440000
  79
  80 #define RX_BUF_SIZE                                             2352        // 600      // For 301 must be multiple of 8
  81 #define MAX_RX_DESCRIPTORS              18         // Rx Layer 2
  82 #define MAX_BUFFER_QUEUE        8 // The value is always equal 8 due to NDIS_PACKET's MiniportReserved field size
  83
  84
  85 // For brand-new rx system
  86 #define MDS_ID_IGNORE                           ETHERNET_RX_DESCRIPTORS
  87
  88 // For Tx Packet status classify
  89 #define PACKET_FREE_TO_USE                                              0
  90 #define PACKET_COME_FROM_NDIS                                   0x08
  91 #define PACKET_COME_FROM_MLME                                   0x80
  92 #define PACKET_SEND_COMPLETE                                    0xff
  93
  94 typedef struct _MDS
  95 {
  96         // For Tx usage
  97         u8      TxOwner[ ((MAX_USB_TX_BUFFER_NUMBER + 3) & ~0x03) ];
  98         u8      *pTxBuffer;
  99         u16     TxBufferSize[ ((MAX_USB_TX_BUFFER_NUMBER + 1) & ~0x01) ];
 100         u8      TxDesFrom[ ((MAX_USB_TX_DESCRIPTOR + 3) & ~0x03) ];//931130.4.u // 1: MLME 2: NDIS control 3: NDIS data
 101         u8      TxCountInBuffer[ ((MAX_USB_TX_DESCRIPTOR + 3) & ~0x03) ]; // 20060928
 102
 103         u8      TxFillIndex;//the next index of TxBuffer can be used
 104         u8      TxDesIndex;//The next index of TxDes can be used
 105         u8      ScanTxPause;    //data Tx pause because the scanning is progressing, but probe request Tx won't.
 106         u8      TxPause;//For pause the Mds_Tx modult
 107
 108         atomic_t        TxThreadCount;//For thread counting 931130.4.v
 109 //950301 delete due to HW
 110 //      atomic_t        TxConcurrentCount;//931130.4.w
 111
 112         u16     TxResult[ ((MAX_USB_TX_DESCRIPTOR + 1) & ~0x01) ];//Collect the sending result of Mpdu
 113
 114         u8      MicRedundant[8]; // For tmp use
 115         u8      *MicWriteAddress[2]; //The start address to fill the Mic, use 2 point due to Mic maybe fragment
 116
 117         u16     MicWriteSize[2]; //931130.4.x
 118
 119         u16     MicAdd; // If want to add the Mic, this variable equal to 8
 120         u16     MicWriteIndex;//The number of MicWriteAddress 931130.4.y
 121
 122         u8      TxRate[ ((MAX_USB_TX_DESCRIPTOR+1)&~0x01) ][2]; // [0] current tx rate, [1] fall back rate
 123         u8      TxInfo[ ((MAX_USB_TX_DESCRIPTOR+1)&~0x01) ];    //Store information for callback function
 124
 125         //WKCHEN added for scanning mechanism
 126         u8      TxToggle;               //It is TRUE if there are tx activities in some time interval
 127         u8      Reserved_[3];
 128
 129         //---------- for Tx Parameter
 130         u16     TxFragmentThreshold;            // For frame body only
 131         u16     TxRTSThreshold;
 132
 133         u32             MaxReceiveTime;//911220.3 Add
 134
 135         // depend on OS,
 136         u32                                     MulticastListNo;
 137         u32                                     PacketFilter; // Setting by NDIS, the current packet filter in use.
 138         u8                                      MulticastAddressesArray[DEFAULT_MULTICASTLISTMAX][MAC_ADDR_LENGTH];
 139
 140         //COUNTERMEASURE
 141         u8              bMICfailCount;
 142         u8              boCounterMeasureBlock;
 143         u8              reserved_4[2];
 144
 145         struct timer_list timer;
 146
 147         u32     TxTsc; // 20060214
 148         u32     TxTsc_2; // 20060214
 149
 150 } MDS, *PMDS;
 151
 152
 153 typedef struct _RxBuffer
 154 {
 155     u8 * pBufferAddress;     // Pointer the received data buffer.
 156         u16     BufferSize;
 157         u8      RESERVED;
 158         u8      BufferIndex;// Only 1 byte
 159 } RXBUFFER, *PRXBUFFER;
 160
 161 //
 162 // Reveive Layer 1 Format.
 163 //----------------------------
 164 typedef struct _RXLAYER1
 165 {
 166     u16  SequenceNumber;     // The sequence number of the last received packet.
 167         u16     BufferTotalSize;
 168
 169         u32     InUsed;
 170     u32   DecryptionMethod;   // The desired defragment number of the next incoming packet.
 171
 172         u8      DeFragmentNumber;
 173         u8      FrameType;
 174     u8  TypeEncapsulated;
 175         u8      BufferNumber;
 176
 177         u32     FirstFrameArrivedTime;
 178
 179         RXBUFFER        BufferQueue[ MAX_BUFFER_QUEUE ];
 180
 181         u8              LastFrameType; // 20061004 for fix intel 3945 's bug
 182         u8              RESERVED[3];  //@@ anson
 183
 184         /////////////////////////////////////////////////////////////////////////////////////////////
 185         // For brand-new Rx system
 186         u8      ReservedBuffer[ 2400 ];//If Buffer ID is reserved one, it must copy the data into this area
 187         u8      *ReservedBufferPoint;// Point to the next availabe address of reserved buffer
 188
 189 }RXLAYER1, * PRXLAYER1;
 190
 191 #endif