drivers/staging/otus/hal/hprw.c

   1 /*
   2  * Copyright (c) 2007-2008 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16 #include "../80211core/cprecomp.h"
  17 #include "hpani.h"
  18 #include "hpusb.h"
  19 #include "hpreg.h"
  20 #include "../80211core/ratectrl.h"
  21
  22 extern void zfIdlCmd(zdev_t* dev, u32_t* cmd, u16_t cmdLen);
  23
  24 extern void zfCoreCwmBusy(zdev_t* dev, u16_t busy);
  25 u16_t zfDelayWriteInternalReg(zdev_t* dev, u32_t addr, u32_t val);
  26 u16_t zfFlushDelayWrite(zdev_t* dev);
  27
  28 //#define zm_hp_priv(x) struct zsHpPriv* hpPriv=zgWlanDev.hpPrivate;
  29
  30 void zfInitCmdQueue(zdev_t* dev)
  31 {
  32     zmw_get_wlan_dev(dev);
  33     struct zsHpPriv* hpPriv = (struct zsHpPriv*)(wd->hpPrivate);
  34
  35     zmw_declare_for_critical_section();
  36
  37     zmw_enter_critical_section(dev);
  38 #ifdef ZM_XP_USB_MULTCMD
  39     hpPriv->cmdTail = hpPriv->cmdHead = hpPriv->cmdSend = 0;
  40 #else
  41     hpPriv->cmdTail = hpPriv->cmdHead = 0;
  42 #endif
  43     hpPriv->cmdPending = 0;
  44     hpPriv->cmd.delayWcmdCount = 0;
  45     zmw_leave_critical_section(dev);
  46 }
  47
  48 u16_t zfPutCmd(zdev_t* dev, u32_t* cmd, u16_t cmdLen, u16_t src, u8_t* buf)
  49 {
  50     u16_t i;
  51
  52     zmw_get_wlan_dev(dev);
  53     struct zsHpPriv* hpPriv=wd->hpPrivate;
  54
  55     /* Make sure command length < ZM_MAX_CMD_SIZE */
  56     zm_assert(cmdLen <= ZM_MAX_CMD_SIZE);
  57     /* Make sure command queue not full */
  58     //zm_assert(((hpPriv->cmdTail+1) & (ZM_CMD_QUEUE_SIZE-1)) != hpPriv->cmdHead);
  59     if (((hpPriv->cmdTail+1) & (ZM_CMD_QUEUE_SIZE-1)) == hpPriv->cmdHead ) {
  60         zm_debug_msg0("CMD queue full!!");
  61         return 0;
  62     }
  63
  64     hpPriv->cmdQ[hpPriv->cmdTail].cmdLen = cmdLen;
  65     hpPriv->cmdQ[hpPriv->cmdTail].src = src;
  66     hpPriv->cmdQ[hpPriv->cmdTail].buf = buf;
  67     for (i=0; i<(cmdLen>>2); i++)
  68     {
  69         hpPriv->cmdQ[hpPriv->cmdTail].cmd[i] = cmd[i];
  70     }
  71
  72     hpPriv->cmdTail = (hpPriv->cmdTail+1) & (ZM_CMD_QUEUE_SIZE-1);
  73
  74     return 0;
  75 }
  76
  77 u16_t zfGetCmd(zdev_t* dev, u32_t* cmd, u16_t* cmdLen, u16_t* src, u8_t** buf)
  78 {
  79     u16_t i;
  80
  81     zmw_get_wlan_dev(dev);
  82     struct zsHpPriv* hpPriv=wd->hpPrivate;
  83
  84     if (hpPriv->cmdTail == hpPriv->cmdHead)
  85     {
  86         return 3;
  87     }
  88
  89     *cmdLen = hpPriv->cmdQ[hpPriv->cmdHead].cmdLen;
  90     *src = hpPriv->cmdQ[hpPriv->cmdHead].src;
  91     *buf = hpPriv->cmdQ[hpPriv->cmdHead].buf;
  92     for (i=0; i<((*cmdLen)>>2); i++)
  93     {
  94         cmd[i] = hpPriv->cmdQ[hpPriv->cmdHead].cmd[i];
  95     }
  96
  97     hpPriv->cmdHead = (hpPriv->cmdHead+1) & (ZM_CMD_QUEUE_SIZE-1);
  98
  99     return 0;
 100 }
 101
 102 #ifdef ZM_XP_USB_MULTCMD
 103 void zfSendCmdEx(zdev_t* dev)
 104 {
 105     u32_t ncmd[ZM_MAX_CMD_SIZE/4];
 106     u16_t ncmdLen = 0;
 107     u16_t cmdFlag = 0;
 108     u16_t i;
 109
 110     zmw_get_wlan_dev(dev);
 111     struct zsHpPriv* hpPriv=wd->hpPrivate;
 112
 113     zmw_declare_for_critical_section();
 114
 115     zmw_enter_critical_section(dev);
 116
 117     if (hpPriv->cmdPending == 0)
 118     {
 119         if (hpPriv->cmdTail != hpPriv->cmdSend)
 120         {
 121             cmdFlag = 1;
 122             /* Get queueing command */
 123             ncmdLen= hpPriv->cmdQ[hpPriv->cmdSend].cmdLen;
 124             for (i=0; i<(ncmdLen>>2); i++)
 125             {
 126                 ncmd[i] = hpPriv->cmdQ[hpPriv->cmdSend].cmd[i];
 127             }
 128             hpPriv->cmdSend = (hpPriv->cmdSend+1) & (ZM_CMD_QUEUE_SIZE-1);
 129
 130             hpPriv->cmdPending = 1;
 131         }
 132     }
 133
 134     zmw_leave_critical_section(dev);
 135
 136     if ((cmdFlag == 1))
 137     {
 138         zfIdlCmd(dev, ncmd, ncmdLen);
 139     }
 140 }
 141
 142 void zfiSendCmdComp(zdev_t* dev)
 143 {
 144     zmw_get_wlan_dev(dev);
 145     struct zsHpPriv* hpPriv=wd->hpPrivate;
 146
 147     zmw_declare_for_critical_section();
 148
 149     zmw_enter_critical_section(dev);
 150     hpPriv->cmdPending = 0;
 151     zmw_leave_critical_section(dev);
 152
 153     zfSendCmdEx(dev);
 154 }
 155 #endif
 156
 157 u16_t zfIssueCmd(zdev_t* dev, u32_t* cmd, u16_t cmdLen, u16_t src, u8_t* buf)
 158 {
 159     u16_t cmdFlag = 0;
 160     u16_t ret;
 161
 162     zmw_get_wlan_dev(dev);
 163     struct zsHpPriv* hpPriv=wd->hpPrivate;
 164
 165     zmw_declare_for_critical_section();
 166
 167     zm_msg2_mm(ZM_LV_1, "cmdLen=", cmdLen);
 168
 169     zmw_enter_critical_section(dev);
 170
 171 #ifdef ZM_XP_USB_MULTCMD
 172     ret = zfPutCmd(dev, cmd, cmdLen, src, buf);
 173     zmw_leave_critical_section(dev);
 174
 175     if (ret != 0)
 176     {
 177         return 1;
 178     }
 179
 180     zfSendCmdEx(dev);
 181 #else
 182     if (hpPriv->cmdPending == 0)
 183     {
 184         hpPriv->cmdPending = 1;
 185         cmdFlag = 1;
 186     }
 187     ret = zfPutCmd(dev, cmd, cmdLen, src, buf);
 188
 189     zmw_leave_critical_section(dev);
 190
 191     if (ret != 0)
 192     {
 193         return 1;
 194     }
 195
 196     if (cmdFlag == 1)
 197     {
 198         zfIdlCmd(dev, cmd, cmdLen);
 199     }
 200 #endif
 201     return 0;
 202 }
 203
 204 void zfIdlRsp(zdev_t* dev, u32_t* rsp, u16_t rspLen)
 205 {
 206     u32_t cmd[ZM_MAX_CMD_SIZE/4];
 207     u16_t cmdLen;
 208     u16_t src;
 209     u8_t* buf;
 210     u32_t ncmd[ZM_MAX_CMD_SIZE/4];
 211     u16_t ncmdLen = 0;
 212     u16_t ret;
 213     u16_t cmdFlag = 0;
 214     u16_t i;
 215     s32_t nf;
 216     s32_t noisefloor[4];
 217
 218     zmw_get_wlan_dev(dev);
 219     struct zsHpPriv* hpPriv=wd->hpPrivate;
 220
 221
 222     zmw_declare_for_critical_section();
 223
 224     zmw_enter_critical_section(dev);
 225
 226     ret = zfGetCmd(dev, cmd, &cmdLen, &src, &buf);
 227     #if 0
 228     zm_assert(ret == 0);
 229     #else
 230     if (ret != 0)
 231     {
 232         zm_debug_msg0("Error IdlRsp because none cmd!!\n");
 233         #ifndef ZM_XP_USB_MULTCMD
 234         zmw_leave_critical_section(dev);
 235         return;
 236         #endif
 237     }
 238     #endif
 239 #ifdef ZM_XP_USB_MULTCMD
 240     zmw_leave_critical_section(dev);
 241 #else
 242     if (hpPriv->cmdTail != hpPriv->cmdHead)
 243     {
 244         cmdFlag = 1;
 245         /* Get queueing command */
 246         ncmdLen= hpPriv->cmdQ[hpPriv->cmdHead].cmdLen;
 247         for (i=0; i<(ncmdLen>>2); i++)
 248         {
 249             ncmd[i] = hpPriv->cmdQ[hpPriv->cmdHead].cmd[i];
 250         }
 251     }
 252     else
 253     {
 254         hpPriv->cmdPending = 0;
 255     }
 256
 257     zmw_leave_critical_section(dev);
 258
 259     if (cmdFlag == 1)
 260     {
 261         zfIdlCmd(dev, ncmd, ncmdLen);
 262     }
 263 #endif
 264     if (src == ZM_OID_READ)
 265     {
 266         ZM_PERFORMANCE_REG(dev, 0x11772c, rsp[1]);
 267         zfwDbgReadRegDone(dev, cmd[1], rsp[1]);
 268     }
 269     else if (src == ZM_OID_FLASH_CHKSUM)
 270     {
 271         zfwDbgGetFlashChkSumDone(dev, rsp+1);
 272     }
 273     else if (src == ZM_OID_FLASH_READ)
 274     {
 275         u32_t  datalen;
 276         u16_t i;
 277
 278         datalen = (rsp[0] & 255);
 279
 280         zfwDbgReadFlashDone(dev, cmd[1], rsp+1, datalen);
 281     }
 282     else if (src == ZM_OID_FLASH_PROGRAM)
 283     {
 284         /* Non do */
 285     }
 286     else if (src == ZM_OID_WRITE)
 287     {
 288         zfwDbgWriteRegDone(dev, cmd[1], cmd[2]);
 289     }
 290     else if (src == ZM_OID_TALLY)
 291     {
 292                 zfCollectHWTally(dev, rsp, 0);
 293     }
 294     else if (src == ZM_OID_TALLY_APD)
 295     {
 296                 zfCollectHWTally(dev, rsp, 1);
 297         zfwDbgReadTallyDone(dev);
 298 #ifdef ZM_ENABLE_BA_RATECTRL
 299         zfRateCtrlAggrSta(dev);
 300 #endif
 301     }
 302     else if (src == ZM_OID_DKTX_STATUS)
 303     {
 304         zm_debug_msg0("src = zm_OID_DKTX_STATUS");
 305         zfwDbgQueryHwTxBusyDone(dev, rsp[1]);
 306     }
 307     else if (src == ZM_CMD_SET_FREQUENCY)
 308     {
 309
 310 //#ifdef ZM_OTUS_ENABLE_RETRY_FREQ_CHANGE
 311 #if 0
 312     zm_debug_msg1("Retry Set Frequency = ", rsp[1]);
 313
 314     #if 1
 315     // Read the Noise Floor value !
 316     nf = ((rsp[2]>>19) & 0x1ff);
 317     if ((nf & 0x100) != 0x0)
 318     {
 319         noisefloor[0] = 0 - ((nf ^ 0x1ff) + 1);
 320     }
 321     else
 322     {
 323         noisefloor[0] = nf;
 324     }
 325
 326     zm_debug_msg1("Noise Floor[1] = ", noisefloor[0]);
 327
 328     nf = ((rsp[3]>>19) & 0x1ff);
 329     if ((nf & 0x100) != 0x0)
 330     {
 331         noisefloor[1] = 0 - ((nf ^ 0x1ff) + 1);
 332     }
 333     else
 334     {
 335         noisefloor[1] = nf;
 336     }
 337
 338     zm_debug_msg1("Noise Floor[2] = ", noisefloor[1]);
 339     zm_debug_msg1("Is Site Survey = ", hpPriv->isSiteSurvey);
 340     #endif
 341
 342         if ( (rsp[1] && hpPriv->freqRetryCounter == 0) ||
 343              (((noisefloor[0]>-60)||(noisefloor[1]>-60)) && hpPriv->freqRetryCounter==0) ||
 344              ((abs(noisefloor[0]-noisefloor[1])>=9) && hpPriv->freqRetryCounter==0) )
 345         {
 346             zm_debug_msg0("Retry to issue the frequency change command");
 347
 348             if ( hpPriv->recordFreqRetryCounter == 1 )
 349             {
 350                 zm_debug_msg0("Cold Reset");
 351
 352                 zfHpSetFrequencyEx(dev, hpPriv->latestFrequency,
 353                                         hpPriv->latestBw40,
 354                                         hpPriv->latestExtOffset,
 355                                         2);
 356
 357                 if ( hpPriv->isSiteSurvey != 2 )
 358                 {
 359                     hpPriv->freqRetryCounter++;
 360                 }
 361                 hpPriv->recordFreqRetryCounter = 0;
 362             }
 363             else
 364             {
 365                 zfHpSetFrequencyEx(dev, hpPriv->latestFrequency,
 366                                         hpPriv->latestBw40,
 367                                         hpPriv->latestExtOffset,
 368                                         0);
 369             }
 370             hpPriv->recordFreqRetryCounter++;
 371         }
 372         else
 373 #endif
 374
 375 /* ret: Bit0: AGC calibration   0=>finish  1=>unfinish               */
 376 /*      Bit1: Noise calibration 0=>finish  1=>unfinish               */
 377 /*      Bit2: Noise calibration finish, but NF value unexcepted => 1 */
 378         if ( (rsp[1] & 0x1) || (rsp[1] & 0x4) )
 379         {
 380             zm_debug_msg1("Set Frequency fail : ret = ", rsp[1]);
 381
 382             /* 1. AGC Calibration fail                                  */
 383             /* 2. Noise Calibration finish but error NoiseFloor value   */
 384             /*      and not in sitesurvey, try more twice               */
 385             if ( hpPriv->isSiteSurvey == 2 )
 386             {
 387                 if ( hpPriv->recordFreqRetryCounter < 2 )
 388                 {
 389                     /* cold reset */
 390                     zfHpSetFrequencyEx(dev, hpPriv->latestFrequency,
 391                                             hpPriv->latestBw40,
 392                                             hpPriv->latestExtOffset,
 393                                             2);
 394                     hpPriv->recordFreqRetryCounter++;
 395                     zm_debug_msg1("Retry to issue the frequency change command(cold reset) counter = ", hpPriv->recordFreqRetryCounter);
 396                 }
 397                 else
 398                 {
 399                     /* Fail : we would not accept this result! */
 400                     zm_debug_msg0("\n\n\n\n  Fail twice cold reset \n\n\n\n");
 401                     hpPriv->coldResetNeedFreq = 0;
 402                     hpPriv->recordFreqRetryCounter = 0;
 403                     zfCoreSetFrequencyComplete(dev);
 404                 }
 405             }
 406             else
 407             {
 408                 /* in sitesurvey, coldreset in next channel */
 409                 hpPriv->coldResetNeedFreq = 1;
 410                 hpPriv->recordFreqRetryCounter = 0;
 411                 zfCoreSetFrequencyComplete(dev);
 412             }
 413         }
 414         else if (rsp[1] & 0x2)
 415         {
 416             zm_debug_msg1("Set Frequency fail 2 : ret = ", rsp[1]);
 417
 418             /* Noise Calibration un-finish                          */
 419             /*      and not in sitesurvey, try more once            */
 420             if ( hpPriv->isSiteSurvey == 2 )
 421             {
 422                 if ( hpPriv->recordFreqRetryCounter < 1 )
 423                 {
 424                     /* cold reset */
 425                     zfHpSetFrequencyEx(dev, hpPriv->latestFrequency,
 426                                             hpPriv->latestBw40,
 427                                             hpPriv->latestExtOffset,
 428                                             2);
 429                     hpPriv->recordFreqRetryCounter++;
 430                     zm_debug_msg1("2 Retry to issue the frequency change command(cold reset) counter = ", hpPriv->recordFreqRetryCounter);
 431                 }
 432                 else
 433                 {
 434                     /* Fail : we would not accept this result! */
 435                     zm_debug_msg0("\n\n\n\n  2 Fail twice cold reset \n\n\n\n");
 436                     hpPriv->coldResetNeedFreq = 0;
 437                     hpPriv->recordFreqRetryCounter = 0;
 438                     zfCoreSetFrequencyComplete(dev);
 439                 }
 440             }
 441             else
 442             {
 443                 /* in sitesurvey, skip this frequency */
 444                 hpPriv->coldResetNeedFreq = 0;
 445                 hpPriv->recordFreqRetryCounter = 0;
 446                 zfCoreSetFrequencyComplete(dev);
 447             }
 448         }
 449         //else if (rsp[1] & 0x4)
 450         //{
 451         //    zm_debug_msg1("Set Frequency fail 3 : ret = ", rsp[1]);
 452         //    hpPriv->coldResetNeedFreq = 0;
 453         //    hpPriv->recordFreqRetryCounter = 0;
 454         //    zfCoreSetFrequencyComplete(dev);
 455         //}
 456         else
 457         {
 458             //hpPriv->freqRetryCounter = 0;
 459             zm_debug_msg2(" return complete, ret = ", rsp[1]);
 460
 461             /* set bb_heavy_clip_enable */
 462             if (hpPriv->enableBBHeavyClip && hpPriv->hwBBHeavyClip &&
 463                 hpPriv->doBBHeavyClip)
 464             {
 465                 u32_t setValue = 0x200;
 466
 467                 setValue |= hpPriv->setValueHeavyClip;
 468
 469                 //zm_dbg(("Do heavy clip setValue = %d\n", setValue));
 470
 471                 zfDelayWriteInternalReg(dev, 0x99e0+0x1bc000, setValue);
 472                 zfFlushDelayWrite(dev);
 473             }
 474
 475             hpPriv->coldResetNeedFreq = 0;
 476             hpPriv->recordFreqRetryCounter = 0;
 477             zfCoreSetFrequencyComplete(dev);
 478         }
 479
 480         #if 1
 481         // Read the Noise Floor value !
 482         nf = ((rsp[2]>>19) & 0x1ff);
 483         if ((nf & 0x100) != 0x0)
 484         {
 485             noisefloor[0] = 0 - ((nf ^ 0x1ff) + 1);
 486         }
 487         else
 488         {
 489             noisefloor[0] = nf;
 490         }
 491
 492         //zm_debug_msg1("Noise Floor[1] = ", noisefloor[0]);
 493
 494         nf = ((rsp[3]>>19) & 0x1ff);
 495         if ((nf & 0x100) != 0x0)
 496         {
 497             noisefloor[1] = 0 - ((nf ^ 0x1ff) + 1);
 498         }
 499         else
 500         {
 501             noisefloor[1] = nf;
 502         }
 503
 504         //zm_debug_msg1("Noise Floor[2] = ", noisefloor[1]);
 505
 506         nf = ((rsp[5]>>23) & 0x1ff);
 507         if ((nf & 0x100) != 0x0)
 508         {
 509             noisefloor[2] = 0 - ((nf ^ 0x1ff) + 1);
 510         }
 511         else
 512         {
 513             noisefloor[2] = nf;
 514         }
 515
 516         //zm_debug_msg1("Noise Floor ext[1] = ", noisefloor[2]);
 517
 518         nf = ((rsp[6]>>23) & 0x1ff);
 519         if ((nf & 0x100) != 0x0)
 520         {
 521             noisefloor[3] = 0 - ((nf ^ 0x1ff) + 1);
 522         }
 523         else
 524         {
 525             noisefloor[3] = nf;
 526         }
 527
 528         //zm_debug_msg1("Noise Floor ext[2] = ", noisefloor[3]);
 529
 530         //zm_debug_msg1("Is Site Survey = ", hpPriv->isSiteSurvey);
 531         #endif
 532     }
 533     else if (src == ZM_CMD_SET_KEY)
 534     {
 535         zfCoreSetKeyComplete(dev);
 536     }
 537     else if (src == ZM_CWM_READ)
 538     {
 539         zm_msg2_mm(ZM_LV_0, "CWM rsp[1]=", rsp[1]);
 540         zm_msg2_mm(ZM_LV_0, "CWM rsp[2]=", rsp[2]);
 541         zfCoreCwmBusy(dev, zfCwmIsExtChanBusy(rsp[1], rsp[2]));
 542     }
 543     else if (src == ZM_MAC_READ)
 544     {
 545         /* rsp[1] = ZM_SEEPROM_MAC_ADDRESS_OFFSET;   */
 546         /* rsp[2] = ZM_SEEPROM_MAC_ADDRESS_OFFSET+4; */
 547         /* rsp[3] = ZM_SEEPROM_REGDOMAIN_OFFSET;     */
 548         /* rsp[4] = ZM_SEEPROM_VERISON_OFFSET;       */
 549         /* rsp[5] = ZM_SEEPROM_HARDWARE_TYPE_OFFSET; */
 550         /* rsp[6] = ZM_SEEPROM_HW_HEAVY_CLIP;        */
 551
 552         u8_t addr[6], CCS, WWR;
 553         u16_t CountryDomainCode;
 554
 555         /* BB heavy clip */
 556         //hpPriv->eepromHeavyClipFlag = (u8_t)((rsp[6]>>24) & 0xff); // force enable 8107
 557         //zm_msg2_mm(ZM_LV_0, "eepromHeavyClipFlag", hpPriv->eepromHeavyClipFlag);
 558         #if 0
 559         if (hpPriv->hwBBHeavyClip)
 560         {
 561             zm_msg0_mm(ZM_LV_0, "enable BB Heavy Clip");
 562         }
 563         else
 564         {
 565             zm_msg0_mm(ZM_LV_0, "Not enable BB Heavy Clip");
 566         }
 567         #endif
 568         zm_msg2_mm(ZM_LV_0, "MAC rsp[1]=", rsp[1]);
 569         zm_msg2_mm(ZM_LV_0, "MAC rsp[2]=", rsp[2]);
 570
 571         addr[0] = (u8_t)(rsp[1] & 0xff);
 572         addr[1] = (u8_t)((rsp[1]>>8) & 0xff);
 573         addr[2] = (u8_t)((rsp[1]>>16) & 0xff);
 574         addr[3] = (u8_t)((rsp[1]>>24) & 0xff);
 575         addr[4] = (u8_t)(rsp[2] & 0xff);
 576         addr[5] = (u8_t)((rsp[2]>>8) & 0xff);
 577 /*#ifdef ZM_FB50
 578         addr[0] = (u8_t)(0 & 0xff);
 579         addr[1] = (u8_t)(3 & 0xff);
 580         addr[2] = (u8_t)(127 & 0xff);
 581         addr[3] = (u8_t)(0 & 0xff);
 582         addr[4] = (u8_t)(9 & 0xff);
 583         addr[5] = (u8_t)(11 & 0xff);
 584 #endif*/
 585
 586         zfDelayWriteInternalReg(dev, ZM_MAC_REG_MAC_ADDR_L,
 587                 ((((u32_t)addr[3])<<24) | (((u32_t)addr[2])<<16) | (((u32_t)addr[1])<<8) | addr[0]));
 588         zfDelayWriteInternalReg(dev, ZM_MAC_REG_MAC_ADDR_H,
 589                 ((((u32_t)addr[5])<<8) | addr[4]));
 590         zfFlushDelayWrite(dev);
 591
 592         wd->ledStruct.ledMode[0] = (u16_t)(rsp[5]&0xffff);
 593         wd->ledStruct.ledMode[1] = (u16_t)(rsp[5]>>16);
 594         zm_msg2_mm(ZM_LV_0, "ledMode[0]=", wd->ledStruct.ledMode[0]);
 595         zm_msg2_mm(ZM_LV_0, "ledMode[1]=", wd->ledStruct.ledMode[1]);
 596
 597         /* Regulatory Related Setting */
 598         zm_msg2_mm(ZM_LV_0, "RegDomain rsp=", rsp[3]);
 599         zm_msg2_mm(ZM_LV_0, "OpFlags+EepMisc=", rsp[4]);
 600         hpPriv->OpFlags = (u8_t)((rsp[4]>>16) & 0xff);
 601         if ((rsp[2] >> 24) == 0x1) //Tx mask == 0x1
 602         {
 603             zm_msg0_mm(ZM_LV_0, "OTUS 1x2");
 604             hpPriv->halCapability |= ZM_HP_CAP_11N_ONE_TX_STREAM;
 605         }
 606         else
 607         {
 608             zm_msg0_mm(ZM_LV_0, "OTUS 2x2");
 609         }
 610         if (hpPriv->OpFlags & 0x1)
 611         {
 612             hpPriv->halCapability |= ZM_HP_CAP_5G;
 613         }
 614         if (hpPriv->OpFlags & 0x2)
 615         {
 616             hpPriv->halCapability |= ZM_HP_CAP_2G;
 617         }
 618
 619
 620         CCS = (u8_t)((rsp[3] & 0x8000) >> 15);
 621         WWR = (u8_t)((rsp[3] & 0x4000) >> 14);
 622         CountryDomainCode = (u16_t)(rsp[3] & 0x3FFF);
 623
 624         if (rsp[3] != 0xffffffff)
 625         {
 626             if (CCS)
 627             {
 628                 //zm_debug_msg0("CWY - Get Regulation Table from Country Code");
 629                 zfHpGetRegulationTablefromCountry(dev, CountryDomainCode);
 630             }
 631             else
 632             {
 633                 //zm_debug_msg0("CWY - Get Regulation Table from Reg Domain");
 634                 zfHpGetRegulationTablefromRegionCode(dev, CountryDomainCode);
 635             }
 636             if (WWR)
 637             {
 638                 //zm_debug_msg0("CWY - Enable 802.11d");
 639                 /* below line shall be unmarked after A band is ready */
 640                 //zfiWlanSetDot11DMode(dev, 1);
 641             }
 642         }
 643         else
 644         {
 645             zfHpGetRegulationTablefromRegionCode(dev, NO_ENUMRD);
 646         }
 647
 648         zfCoreMacAddressNotify(dev, addr);
 649
 650     }
 651     else if (src == ZM_EEPROM_READ)
 652     {
 653 #if 0
 654         u8_t addr[6], CCS, WWR;
 655         u16_t CountryDomainCode;
 656 #endif
 657         for (i=0; i<ZM_HAL_MAX_EEPROM_PRQ; i++)
 658         {
 659             if (hpPriv->eepromImageIndex < 1024)
 660             {
 661                 hpPriv->eepromImage[hpPriv->eepromImageIndex++] = rsp[i+1];
 662             }
 663         }
 664
 665         if (hpPriv->eepromImageIndex == (ZM_HAL_MAX_EEPROM_REQ*ZM_HAL_MAX_EEPROM_PRQ))
 666         {
 667             #if 0
 668             for (i=0; i<1024; i++)
 669             {
 670                 zm_msg2_mm(ZM_LV_0, "index=", i);
 671                 zm_msg2_mm(ZM_LV_0, "eepromImage=", hpPriv->eepromImage[i]);
 672             }
 673             #endif
 674             zm_msg2_mm(ZM_LV_0, "MAC [1]=", hpPriv->eepromImage[0x20c/4]);
 675             zm_msg2_mm(ZM_LV_0, "MAC [2]=", hpPriv->eepromImage[0x210/4]);
 676 #if 0
 677             addr[0] = (u8_t)(hpPriv->eepromImage[0x20c/4] & 0xff);
 678             addr[1] = (u8_t)((hpPriv->eepromImage[0x20c/4]>>8) & 0xff);
 679             addr[2] = (u8_t)((hpPriv->eepromImage[0x20c/4]>>16) & 0xff);
 680             addr[3] = (u8_t)((hpPriv->eepromImage[0x20c/4]>>24) & 0xff);
 681             addr[4] = (u8_t)(hpPriv->eepromImage[0x210/4] & 0xff);
 682             addr[5] = (u8_t)((hpPriv->eepromImage[0x210/4]>>8) & 0xff);
 683
 684             zfCoreMacAddressNotify(dev, addr);
 685
 686             zfDelayWriteInternalReg(dev, ZM_MAC_REG_MAC_ADDR_L,
 687                     ((((u32_t)addr[3])<<24) | (((u32_t)addr[2])<<16) | (((u32_t)addr[1])<<8) | addr[0]));
 688             zfDelayWriteInternalReg(dev, ZM_MAC_REG_MAC_ADDR_H,
 689                     ((((u32_t)addr[5])<<8) | addr[4]));
 690             zfFlushDelayWrite(dev);
 691
 692             /* Regulatory Related Setting */
 693             zm_msg2_mm(ZM_LV_0, "RegDomain =", hpPriv->eepromImage[0x208/4]);
 694             CCS = (u8_t)((hpPriv->eepromImage[0x208/4] & 0x8000) >> 15);
 695             WWR = (u8_t)((hpPriv->eepromImage[0x208/4] & 0x4000) >> 14);
 696             /* below line shall be unmarked after A band is ready */
 697             //CountryDomainCode = (u16_t)(hpPriv->eepromImage[0x208/4] & 0x3FFF);
 698             CountryDomainCode = 8;
 699             if (CCS)
 700             {
 701                 //zm_debug_msg0("CWY - Get Regulation Table from Country Code");
 702                 zfHpGetRegulationTablefromCountry(dev, CountryDomainCode);
 703             }
 704             else
 705             {
 706                 //zm_debug_msg0("CWY - Get Regulation Table from Reg Domain");
 707                 zfHpGetRegulationTablefromRegionCode(dev, CountryDomainCode);
 708             }
 709             if (WWR)
 710             {
 711                 //zm_debug_msg0("CWY - Enable 802.11d");
 712                 /* below line shall be unmarked after A band is ready */
 713                 //zfiWlanSetDot11DMode(dev, 1);
 714             }
 715 #endif
 716             zfCoreHalInitComplete(dev);
 717         }
 718         else
 719         {
 720             hpPriv->eepromImageRdReq++;
 721             zfHpLoadEEPROMFromFW(dev);
 722         }
 723     }
 724     else if (src == ZM_EEPROM_WRITE)
 725     {
 726         zfwDbgWriteEepromDone(dev, cmd[1], cmd[2]);
 727     }
 728     else if (src == ZM_ANI_READ)
 729     {
 730         u32_t cycleTime, ctlClear;
 731
 732         zm_msg2_mm(ZM_LV_0, "ANI rsp[1]=", rsp[1]);
 733         zm_msg2_mm(ZM_LV_0, "ANI rsp[2]=", rsp[2]);
 734         zm_msg2_mm(ZM_LV_0, "ANI rsp[3]=", rsp[3]);
 735         zm_msg2_mm(ZM_LV_0, "ANI rsp[4]=", rsp[4]);
 736
 737         hpPriv->ctlBusy += rsp[1];
 738         hpPriv->extBusy += rsp[2];
 739
 740         cycleTime = 100000; //100 miniseconds
 741
 742         if (cycleTime > rsp[1])
 743         {
 744             ctlClear = (cycleTime - rsp[1]) / 100;
 745         }
 746         else
 747         {
 748             ctlClear = 0;
 749         }
 750         if (wd->aniEnable)
 751             zfHpAniArPoll(dev, ctlClear, rsp[3], rsp[4]);
 752     }
 753     else if (src == ZM_CMD_ECHO)
 754     {
 755         if ( ((struct zsHpPriv*)wd->hpPrivate)->halReInit )
 756         {
 757             zfCoreHalInitComplete(dev);
 758             ((struct zsHpPriv*)wd->hpPrivate)->halReInit = 0;
 759         }
 760         else
 761         {
 762             zfHpLoadEEPROMFromFW(dev);
 763         }
 764     }
 765     else if (src == ZM_OID_FW_DL_INIT)
 766     {
 767         zfwDbgDownloadFwInitDone(dev);
 768     }
 769     return;
 770 }
 771
 772
 773 /************************************************************************/
 774 /*                                                                      */
 775 /*    FUNCTION DESCRIPTION                  zfWriteRegInternalReg       */
 776 /*      Write on chip internal register immediately.                    */
 777 /*                                                                      */
 778 /*    INPUTS                                                            */
 779 /*      dev : device pointer                                            */
 780 /*      addr : register address                                         */
 781 /*      val : value                                                     */
 782 /*                                                                      */
 783 /*    OUTPUTS                                                           */
 784 /*      0 : success                                                     */
 785 /*      other : fail                                                    */
 786 /*                                                                      */
 787 /*    AUTHOR                                                            */
 788 /*      Stephen Chen        ZyDAS Technology Corporation    2005.11     */
 789 /*                                                                      */
 790 /************************************************************************/
 791 u32_t zfWriteRegInternalReg(zdev_t* dev, u32_t addr, u32_t val)
 792 {
 793     u32_t cmd[3];
 794     u16_t ret;
 795
 796     cmd[0] = 0x00000108;
 797     cmd[1] = addr;
 798     cmd[2] = val;
 799
 800     ret = zfIssueCmd(dev, cmd, 12, ZM_OID_INTERNAL_WRITE, NULL);
 801     return ret;
 802 }
 803
 804
 805 /************************************************************************/
 806 /*                                                                      */
 807 /*    FUNCTION DESCRIPTION                  zfDelayWriteInternalReg     */
 808 /*      Write on chip internal register, write operation may be         */
 809 /*      postponed to form a multiple write command.                     */
 810 /*                                                                      */
 811 /*    INPUTS                                                            */
 812 /*      dev : device pointer                                            */
 813 /*      addr : register address                                         */
 814 /*      val : value                                                     */
 815 /*                                                                      */
 816 /*    OUTPUTS                                                           */
 817 /*      0 : command been postponed                                      */
 818 /*      1 : commands been executed                                      */
 819 /*                                                                      */
 820 /*    AUTHOR                                                            */
 821 /*      Stephen Chen        ZyDAS Technology Corporation    2005.11     */
 822 /*                                                                      */
 823 /************************************************************************/
 824 u16_t zfDelayWriteInternalReg(zdev_t* dev, u32_t addr, u32_t val)
 825 {
 826     u32_t cmd[(ZM_MAX_CMD_SIZE/4)];
 827     u16_t i;
 828     u16_t ret;
 829
 830     zmw_get_wlan_dev(dev);
 831     struct zsHpPriv* hpPriv=wd->hpPrivate;
 832
 833     zmw_declare_for_critical_section();
 834
 835     /* enter critical section */
 836     zmw_enter_critical_section(dev);
 837
 838     /* Store command to global buffer */
 839     hpPriv->cmd.delayWcmdAddr[hpPriv->cmd.delayWcmdCount] = addr;
 840     hpPriv->cmd.delayWcmdVal[hpPriv->cmd.delayWcmdCount++] = val;
 841
 842     /* If pending command reach size limit */
 843     if ((hpPriv->cmd.delayWcmdCount) >= ((ZM_MAX_CMD_SIZE - 4) >> 3))
 844     {
 845         cmd[0] = 0x00000100 + (hpPriv->cmd.delayWcmdCount<<3);
 846
 847         /* copy command to cmd buffer */
 848         for (i=0; i<hpPriv->cmd.delayWcmdCount; i++)
 849         {
 850             cmd[1+(i<<1)] = hpPriv->cmd.delayWcmdAddr[i];
 851             cmd[2+(i<<1)] = hpPriv->cmd.delayWcmdVal[i];
 852         }
 853         /* reset pending command */
 854         hpPriv->cmd.delayWcmdCount = 0;
 855
 856         /* leave critical section */
 857         zmw_leave_critical_section(dev);
 858
 859         /* issue write command */
 860         ret = zfIssueCmd(dev, cmd, 4+(i<<3), ZM_OID_INTERNAL_WRITE, NULL);
 861
 862         return 1;
 863     }
 864     else
 865     {
 866         /* leave critical section */
 867         zmw_leave_critical_section(dev);
 868
 869         return 0;
 870     }
 871 }
 872
 873
 874 /************************************************************************/
 875 /*                                                                      */
 876 /*    FUNCTION DESCRIPTION                  zfFlushDelayWrite           */
 877 /*      Flush pending write command.                                    */
 878 /*                                                                      */
 879 /*    INPUTS                                                            */
 880 /*      dev : device pointer                                            */
 881 /*                                                                      */
 882 /*    OUTPUTS                                                           */
 883 /*      0 : no pending command                                          */
 884 /*      1 : commands been executed                                      */
 885 /*                                                                      */
 886 /*    AUTHOR                                                            */
 887 /*      Stephen Chen        ZyDAS Technology Corporation    2005.11     */
 888 /*                                                                      */
 889 /************************************************************************/
 890 u16_t zfFlushDelayWrite(zdev_t* dev)
 891 {
 892     u32_t cmd[(ZM_MAX_CMD_SIZE/4)];
 893     u16_t i;
 894     u16_t ret;
 895     zmw_get_wlan_dev(dev);
 896     struct zsHpPriv* hpPriv=wd->hpPrivate;
 897
 898     zmw_declare_for_critical_section();
 899
 900     /* enter critical section */
 901     zmw_enter_critical_section(dev);
 902
 903     /* If there is pending command */
 904     if (hpPriv->cmd.delayWcmdCount > 0)
 905     {
 906         cmd[0] = 0x00000100 + (hpPriv->cmd.delayWcmdCount<<3);
 907
 908         /* copy command to cmd buffer */
 909         for (i=0; i<hpPriv->cmd.delayWcmdCount; i++)
 910         {
 911             cmd[1+(i<<1)] = hpPriv->cmd.delayWcmdAddr[i];
 912             cmd[2+(i<<1)] = hpPriv->cmd.delayWcmdVal[i];
 913         }
 914         /* reset pending command */
 915         hpPriv->cmd.delayWcmdCount = 0;
 916
 917         /* leave critical section */
 918         zmw_leave_critical_section(dev);
 919
 920         /* issue write command */
 921         ret = zfIssueCmd(dev, cmd, 4+(i<<3), ZM_OID_INTERNAL_WRITE, NULL);
 922
 923         return 1;
 924     }
 925     else
 926     {
 927         /* leave critical section */
 928         zmw_leave_critical_section(dev);
 929
 930         return 0;
 931     }
 932 }
 933
 934
 935 u32_t zfiDbgDelayWriteReg(zdev_t* dev, u32_t addr, u32_t val)
 936 {
 937         zfDelayWriteInternalReg(dev, addr, val);
 938         return 0;
 939 }
 940
 941 u32_t zfiDbgFlushDelayWrite(zdev_t* dev)
 942 {
 943         zfFlushDelayWrite(dev);
 944         return 0;
 945 }
 946
 947 /************************************************************************/
 948 /*                                                                      */
 949 /*    FUNCTION DESCRIPTION                  zfiDbgWriteReg              */
 950 /*      Write register.                                                 */
 951 /*                                                                      */
 952 /*    INPUTS                                                            */
 953 /*      dev : device pointer                                            */
 954 /*      addr : register address                                         */
 955 /*      val : value                                                     */
 956 /*                                                                      */
 957 /*    OUTPUTS                                                           */
 958 /*      0 : success                                                     */
 959 /*      other : fail                                                    */
 960 /*                                                                      */
 961 /*    AUTHOR                                                            */
 962 /*      Stephen Chen        ZyDAS Technology Corporation    2005.10     */
 963 /*                                                                      */
 964 /************************************************************************/
 965 u32_t zfiDbgWriteReg(zdev_t* dev, u32_t addr, u32_t val)
 966 {
 967     u32_t cmd[3];
 968     u16_t ret;
 969
 970     cmd[0] = 0x00000108;
 971     cmd[1] = addr;
 972     cmd[2] = val;
 973
 974     ret = zfIssueCmd(dev, cmd, 12, ZM_OID_WRITE, 0);
 975     return ret;
 976 }
 977 /************************************************************************/
 978 /*                                                                      */
 979 /*    FUNCTION DESCRIPTION                  zfiDbgWriteFlash            */
 980 /*      Write flash.                                                    */
 981 /*                                                                      */
 982 /*    INPUTS                                                            */
 983 /*      dev : device pointer                                            */
 984 /*      addr : register address                                         */
 985 /*      val : value                                                     */
 986 /*                                                                      */
 987 /*    OUTPUTS                                                           */
 988 /*      0 : success                                                     */
 989 /*      other : fail                                                    */
 990 /*                                                                      */
 991 /*    AUTHOR                                                            */
 992 /*      Yjsung        ZyDAS Technology Corporation    2007.02           */
 993 /*                                                                      */
 994 /************************************************************************/
 995 u32_t zfiDbgWriteFlash(zdev_t* dev, u32_t addr, u32_t val)
 996 {
 997     u32_t cmd[3];
 998     u16_t ret;
 999
1000     //cmd[0] = 0x0000B008;
1001         /* len[0] : type[0xB0] : seq[?] */
1002     cmd[0] = 8 | (ZM_CMD_WFLASH << 8);
1003     cmd[1] = addr;
1004     cmd[2] = val;
1005
1006     ret = zfIssueCmd(dev, cmd, 12, ZM_OID_WRITE, 0);
1007     return ret;
1008 }
1009
1010 /************************************************************************/
1011 /*                                                                      */
1012 /*    FUNCTION DESCRIPTION                  zfiDbgWriteEeprom            */
1013 /*      Write EEPROM.                                                    */
1014 /*                                                                      */
1015 /*    INPUTS                                                            */
1016 /*      dev : device pointer                                            */
1017 /*      addr : register address                                         */
1018 /*      val : value                                                     */
1019 /*                                                                      */
1020 /*    OUTPUTS                                                           */
1021 /*      0 : success                                                     */
1022 /*      other : fail                                                    */
1023 /*                                                                      */
1024 /*    AUTHOR                                                            */
1025 /*      Paul        ZyDAS Technology Corporation    2007.06             */
1026 /*                                                                      */
1027 /************************************************************************/
1028 u32_t zfiDbgWriteEeprom(zdev_t* dev, u32_t addr, u32_t val)
1029 {
1030     u32_t cmd[3];
1031     u16_t ret;
1032
1033     //cmd[0] = 0x0000B008;
1034         /* len[0] : type[0xB0] : seq[?] */
1035     cmd[0] = 8 | (ZM_CMD_WREEPROM << 8);
1036     cmd[1] = addr;
1037     cmd[2] = val;
1038
1039     ret = zfIssueCmd(dev, cmd, 12, ZM_EEPROM_WRITE, 0);
1040     return ret;
1041 }
1042
1043 /************************************************************************/
1044 /*                                                                      */
1045 /*    FUNCTION DESCRIPTION                  zfiDbgBlockWriteEeprom      */
1046 /*      Block Write Eeprom.                                             */
1047 /*                                                                      */
1048 /*      p.s: now,it will write 16 bytes register data per block (N=4)   */
1049 /*                                                                      */
1050 /*    INPUTS                                                            */
1051 /*      dev : device pointer                                            */
1052 /*      addr : register address                                         */
1053 /*      buf : input data buffer pointer                                 */
1054 /*                                                                      */
1055 /*    OUTPUTS                                                           */
1056 /*      0 : success                                                     */
1057 /*      other : fail                                                    */
1058 /*                                                                      */
1059 /*    AUTHOR                                                            */
1060 /*      Paul        ZyDAS Technology Corporation    2007.06             */
1061 /*                                                                      */
1062 /************************************************************************/
1063 //#define N       buflen/4
1064 //#define SIZE    (2*N+1)
1065
1066 u32_t zfiDbgBlockWriteEeprom(zdev_t* dev, u32_t addr, u32_t* buf)
1067 {
1068     u32_t cmd[9];  //2N+1
1069     u16_t ret,i;
1070
1071     //cmd[0] = 0x0000B008;
1072           /* len[0] : type[0xB0] : seq[?] */
1073
1074     //cmd[0] = (8*N) | (ZM_CMD_WFLASH << 8);
1075     cmd[0] = 32 | (ZM_CMD_WREEPROM << 8);    //8N
1076
1077     for (i=0; i<4; i++)   // i<N
1078     {
1079         cmd[(2*i)+1] = addr+(4*i);
1080         cmd[(2*i)+2] = *(buf+i);
1081     }
1082
1083     ret = zfIssueCmd(dev, cmd, 36, ZM_EEPROM_WRITE, 0);    //8N+4
1084
1085     // added for EEPROMUpdate, wait a moment for prevent cmd queue full!
1086     //zfwSleep(dev, 1);
1087
1088     return ret;
1089 }
1090
1091
1092 /* write EEPROM with wrlen : wrlen must be 4*n */
1093 /* command format : cmd_info(4) + addr(4) + eeprom(wrlen) */
1094 u32_t zfiDbgBlockWriteEeprom_v2(zdev_t* dev, u32_t addr, u32_t* buf, u32_t wrlen)
1095 {
1096     u32_t cmd[16];
1097     u16_t ret,i;
1098
1099           /* len[0] : type[0xB0] : seq[?] */
1100           /* len = addr(4) + eeprom_block(wrlen) */
1101     cmd[0] = (wrlen+4) | (ZM_CMD_MEM_WREEPROM << 8);
1102     cmd[1] = addr;
1103
1104     for (i=0; i<(wrlen/4); i++)   // i<wrlen/4
1105     {
1106         cmd[2+i] = *(buf+i);
1107     }
1108     /* cmd_info(4) + addr(4) + eeprom(wrlen) */
1109     ret = zfIssueCmd(dev, cmd, (u16_t)(wrlen+8), ZM_EEPROM_WRITE, 0);
1110
1111     return ret;
1112 }
1113
1114 /************************************************************************/
1115 /*                                                                      */
1116 /*    FUNCTION DESCRIPTION                  zfDbgOpenEeprom            */
1117 /*      Open EEPROM.                                                    */
1118 /*                                                                      */
1119 /*    INPUTS                                                            */
1120 /*      dev : device pointer                                            */
1121 /*                                                                      */
1122 /*    OUTPUTS                                                           */
1123 /*                                                                      */
1124 /*    AUTHOR                                                            */
1125 /*      Paul                ZyDAS Technology Corporation    2007.06     */
1126 /*                                                                      */
1127 /************************************************************************/
1128 void zfDbgOpenEeprom(zdev_t* dev)
1129 {
1130     // unlock EEPROM
1131     zfDelayWriteInternalReg(dev, 0x1D1400, 0x12345678);
1132     zfDelayWriteInternalReg(dev, 0x1D1404, 0x55aa00ff);
1133     zfDelayWriteInternalReg(dev, 0x1D1408, 0x13579ace);
1134     zfDelayWriteInternalReg(dev, 0x1D1414, 0x0);
1135     zfFlushDelayWrite(dev);
1136 }
1137
1138 /************************************************************************/
1139 /*                                                                      */
1140 /*    FUNCTION DESCRIPTION                  zfDbgCloseEeprom            */
1141 /*      Close EEPROM.                                                    */
1142 /*                                                                      */
1143 /*    INPUTS                                                            */
1144 /*      dev : device pointer                                            */
1145 /*                                                                      */
1146 /*    OUTPUTS                                                           */
1147 /*                                                                      */
1148 /*    AUTHOR                                                            */
1149 /*      Paul                ZyDAS Technology Corporation    2007.05     */
1150 /*                                                                      */
1151 /************************************************************************/
1152 void zfDbgCloseEeprom(zdev_t* dev)
1153 {
1154     // lock EEPROM
1155     zfDelayWriteInternalReg(dev, 0x1D1400, 0x87654321);
1156     //zfDelayWriteInternalReg(dev, 0x1D1404, 0xffffffff);
1157     //zfDelayWriteInternalReg(dev, 0x1D1408, 0xffffffff);
1158     //zfDelayWriteInternalReg(dev, 0x1D1414, 0x100);
1159     zfFlushDelayWrite(dev);
1160 }
1161 #if 0
1162 /************************************************************************/
1163 /*                                                                      */
1164 /*    FUNCTION DESCRIPTION                  zfiSeriallyWriteEeprom      */
1165 /*      Write EEPROM Serially.                                          */
1166 /*                                                                      */
1167 /*    INPUTS                                                            */
1168 /*      dev : device pointer                                            */
1169 /*      addr : start address of writing EEPROM                          */
1170 /*      buf : input data buffer                                         */
1171 /*      buflen : size of input data buffer                              */
1172 /*               (length of data write into EEPROM)                     */
1173 /*                                                                      */
1174 /*    OUTPUTS                                                           */
1175 /*                                                                      */
1176 /*                                                                      */
1177 /*                                                                      */
1178 /*    AUTHOR                                                            */
1179 /*      Paul                ZyDAS Technology Corporation    2007.06     */
1180 /*                                                                      */
1181 /************************************************************************/
1182 u32_t zfiSeriallyWriteEeprom(zdev_t* dev, u32_t addr, u32_t* buf, u32_t buflen)
1183 {
1184     u32_t count;
1185     u16_t i,ret,blocksize;
1186     u8_t  temp[2];
1187
1188     // per 4 bytes = 1 count
1189     count = buflen/4;
1190
1191     // Open EEPROM
1192     zfDbgOpenEeprom(dev);
1193
1194     // Write EEPROM
1195     for (i=0; i<count; i++)
1196     {
1197         if (zfwWriteEeprom(dev, (addr+(4*i)), *(buf+i), 0) != 0)
1198         {
1199             // Update failed, Close EEPROM
1200             zm_debug_msg0("zfwWriteEeprom failed \n");
1201             zfDbgCloseEeprom(dev);
1202             return 1;
1203         }
1204     }
1205
1206     // Close EEPROM
1207     zfDbgCloseEeprom(dev);
1208     return 0;
1209 }
1210 #endif
1211 #if 0
1212 /************************************************************************/
1213 /*                                                                      */
1214 /*    FUNCTION DESCRIPTION                  zfiSeriallyBlockWriteEeprom */
1215 /*       Block Write EEPROM Serially.                                   */
1216 /*      (BlockWrite: per 16bytes write EEPROM once)                     */
1217 /*                                                                      */
1218 /*    INPUTS                                                            */
1219 /*      dev : device pointer                                            */
1220 /*      addr : register address                                         */
1221 /*      buf : input data buffer                                         */
1222 /*      buflen : access data size of buf                                */
1223 /*                                                                      */
1224 /*    OUTPUTS                                                           */
1225 /*      0 : success                                                     */
1226 /*      other : fail                                                    */
1227 /*                                                                      */
1228 /*    AUTHOR                                                            */
1229 /*      Paul                ZyDAS Technology Corporation    2007.05     */
1230 /*                                                                      */
1231 /************************************************************************/
1232 u32_t zfiSeriallyBlockWriteEeprom(zdev_t* dev, u32_t addr, u32_t* buf, u32_t buflen)
1233 {
1234     u32_t count;
1235     u16_t i,ret,blocksize;
1236     u8_t  temp[2];
1237
1238     // per 4 bytes = 1 count
1239     count = buflen/4;
1240
1241     // Open EEPROM
1242     zfDbgOpenEeprom(dev);
1243
1244     // Write EEPROM
1245     // EEPROM Write start address from: 0x1000!?
1246     // per 16bytes(N=4) block write EEPROM once
1247     for (i=0; i<(count/4); i++)   // count/N
1248     {
1249         //zfiDbgBlockWriteEeprom(dev, (addr+(4*N*i)), buf+(N*i));
1250         //zfiDbgBlockWriteEeprom(dev, (addr+(16*i)), buf+(4*i));
1251         if (zfwBlockWriteEeprom(dev, (addr+(16*i)), buf+(4*i), 0) != 0)
1252         {
1253             zm_debug_msg0("zfiDbgBlockWriteEeprom failed \n");
1254             // Close EEPROM
1255             zfDbgCloseEeprom(dev);
1256             return 1;
1257         }
1258     }
1259
1260     // Close EEPROM
1261     zfDbgCloseEeprom(dev);
1262     return 0;
1263 }
1264 #endif
1265 #if 0
1266 /************************************************************************/
1267 /*                                                                      */
1268 /*    FUNCTION DESCRIPTION                  zfiDbgDumpEeprom            */
1269 /*      Dump EEPROM.                                                    */
1270 /*                                                                      */
1271 /*    INPUTS                                                            */
1272 /*      dev : device pointer                                            */
1273 /*      addr : start address of dumping EEPROM                          */
1274 /*      datalen :  length of access EEPROM data                           */
1275 /*      buf :  point of buffer, the buffer saved dump data              */
1276 /*                                                                      */
1277 /*    OUTPUTS                                                           */
1278 /*      0 : success                                                     */
1279 /*      other : fail                                                    */
1280 /*                                                                      */
1281 /*    AUTHOR                                                            */
1282 /*      Paul                ZyDAS Technology Corporation    2007.06     */
1283 /*                                                                      */
1284 /************************************************************************/
1285 u32_t zfiDbgDumpEeprom(zdev_t* dev, u32_t addr, u32_t datalen, u32_t* buf)
1286 {
1287     u32_t count;
1288     u16_t i,ret;
1289
1290     count = datalen/4;
1291
1292     // over EEPROM length
1293     if(datalen > 0x2000)
1294     {
1295         return 1;
1296     }
1297
1298     for(i=0; i<count; i++)
1299     {
1300         buf[i] = zfwReadEeprom(dev, addr+(4*i));
1301     }
1302
1303     return 0;
1304 }
1305 #endif
1306 /************************************************************************/
1307 /*                                                                      */
1308 /*    FUNCTION DESCRIPTION                  zfiDbgReadReg               */
1309 /*      Read register.                                                  */
1310 /*                                                                      */
1311 /*    INPUTS                                                            */
1312 /*      dev : device pointer                                            */
1313 /*      addr : register address                                         */
1314 /*                                                                      */
1315 /*    OUTPUTS                                                           */
1316 /*      0 : success                                                     */
1317 /*      other : fail                                                    */
1318 /*                                                                      */
1319 /*    AUTHOR                                                            */
1320 /*      Stephen Chen        ZyDAS Technology Corporation    2005.10     */
1321 /*                                                                      */
1322 /************************************************************************/
1323 u32_t zfiDbgReadReg(zdev_t* dev, u32_t addr)
1324 {
1325     u32_t cmd[2];
1326     u16_t ret;
1327
1328     cmd[0] = 0x00000004;
1329     cmd[1] = addr;
1330
1331     ret = zfIssueCmd(dev, cmd, 8, ZM_OID_READ, 0);
1332     return ret;
1333 }
1334
1335
1336 /************************************************************************/
1337 /*                                                                      */
1338 /*    FUNCTION DESCRIPTION                  zfiDbgReadTally             */
1339 /*      Read register.                                                  */
1340 /*                                                                      */
1341 /*    INPUTS                                                            */
1342 /*      dev : device pointer                                            */
1343 /*                                                                      */
1344 /*    OUTPUTS                                                           */
1345 /*      0 : success                                                     */
1346 /*      other : fail                                                    */
1347 /*                                                                      */
1348 /*    AUTHOR                                                            */
1349 /*      Stephen Chen        ZyDAS Technology Corporation    2005.10     */
1350 /*                                                                      */
1351 /************************************************************************/
1352 u32_t zfiDbgReadTally(zdev_t* dev)
1353 {
1354     u32_t cmd[1];
1355     u16_t ret;
1356         zmw_get_wlan_dev(dev);
1357
1358         if ( ((struct zsHpPriv*)wd->hpPrivate)->halReInit )
1359         {
1360             return 1;
1361         }
1362
1363         /* len[0] : type[0x81] : seq[?] */
1364     cmd[0] = 0 | (ZM_CMD_TALLY << 8);
1365     ret = zfIssueCmd(dev, cmd, 4, ZM_OID_TALLY, 0);
1366
1367         /* len[0] : type[0x82] : seq[?] */
1368     cmd[0] = 0 | (ZM_CMD_TALLY_APD << 8);
1369     ret = zfIssueCmd(dev, cmd, 4, ZM_OID_TALLY_APD, 0);
1370
1371     return ret;
1372 }
1373
1374
1375 u32_t zfiDbgSetIFSynthesizer(zdev_t* dev, u32_t value)
1376 {
1377     u32_t cmd[2];
1378     u16_t ret;
1379
1380         /* len[4] : type[0x32] : seq[?] */
1381     cmd[0] = 0x4 | (ZM_OID_SYNTH << 8);
1382     cmd[1] = value;
1383
1384     ret = zfIssueCmd(dev, cmd, 8, ZM_OID_SYNTH, 0);
1385     return ret;
1386 }
1387
1388 u32_t zfiDbgQueryHwTxBusy(zdev_t* dev)
1389 {
1390     u32_t cmd[1];
1391     u16_t ret;
1392
1393         /* len[4] : type[0xC0] : seq[?] */
1394         cmd[0] = 0 | (ZM_CMD_DKTX_STATUS << 8);
1395
1396     ret = zfIssueCmd(dev, cmd, 4, ZM_OID_DKTX_STATUS, 0);
1397     return ret;
1398 }
1399
1400 //Paul++
1401 #if 0
1402 u16_t zfHpBlockEraseFlash(zdev_t *dev, u32_t addr)
1403 {
1404     u32_t cmd[(ZM_MAX_CMD_SIZE/4)];
1405     u16_t ret;
1406
1407     cmd[0] = 0x00000004 | (ZM_CMD_FLASH_ERASE << 8);
1408     cmd[1] = addr;
1409
1410     ret = zfIssueCmd(dev, cmd, 8, ZM_OID_INTERNAL_WRITE, NULL);
1411     return ret;
1412 }
1413 #endif
1414
1415 #if 0
1416 u16_t zfiDbgProgramFlash(zdev_t *dev, u32_t offset, u32_t len, u32_t *data)
1417 {
1418     u32_t cmd[(ZM_MAX_CMD_SIZE/4)];
1419     u16_t ret;
1420     u16_t i;
1421
1422
1423     cmd[0] = (ZM_CMD_FLASH_PROG << 8) | ((len+8) & 0xff);
1424     cmd[1] = offset;
1425     cmd[2] = len;
1426
1427     for (i = 0; i < (len >> 2); i++)
1428     {
1429          cmd[3+i] = data[i];
1430     }
1431
1432     ret = zfIssueCmd(dev, cmd, 12, ZM_OID_FLASH_PROGRAM, NULL);
1433
1434     return ret;
1435 }
1436 #endif
1437
1438 /************************************************************************/
1439 /*                                                                      */
1440 /*    FUNCTION DESCRIPTION                  zfiDbgChipEraseFlash        */
1441 /*      Chip Erase Flash.                                               */
1442 /*                                                                      */
1443 /*    INPUTS                                                            */
1444 /*      dev : device pointer                                            */
1445 /*                                                                      */
1446 /*    OUTPUTS                                                           */
1447 /*      0 : success                                                     */
1448 /*      other : fail                                                    */
1449 /*                                                                      */
1450 /*    AUTHOR                                                            */
1451 /*      Paul                Atheros Technology Corporation    2007.09   */
1452 /*                                                                      */
1453 /************************************************************************/
1454 u16_t zfiDbgChipEraseFlash(zdev_t *dev)
1455 {
1456     u32_t cmd[(ZM_MAX_CMD_SIZE/4)];
1457     u16_t ret;
1458
1459     cmd[0] = 0x00000000 | (ZM_CMD_FLASH_ERASE << 8);
1460
1461     ret = zfIssueCmd(dev, cmd, 4, ZM_OID_INTERNAL_WRITE, NULL);
1462     return ret;
1463 }
1464 /************************************************************************/
1465 /*                                                                      */
1466 /*    FUNCTION DESCRIPTION                  zfiDbgGetFlashCheckSum      */
1467 /*      Get FlashCheckSum.                                              */
1468 /*                                                                      */
1469 /*    INPUTS                                                            */
1470 /*      dev : device pointer                                            */
1471 /*      addr : Start address of getchksum                               */
1472 /*      len : total lenth of calculate getchksum                        */
1473 /*                                                                      */
1474 /*    OUTPUTS                                                           */
1475 /*      0 : success                                                     */
1476 /*      other : fail                                                    */
1477 /*                                                                      */
1478 /*    AUTHOR                                                            */
1479 /*      Paul                Atheros Technology Corporation    2007.08   */
1480 /*                                                                      */
1481 /************************************************************************/
1482 u32_t zfiDbgGetFlashCheckSum(zdev_t *dev, u32_t addr, u32_t len)
1483 {
1484     u32_t cmd[(ZM_MAX_CMD_SIZE/4)];
1485     u32_t ret;
1486
1487     cmd[0] = 0x00000008 | (ZM_CMD_FLASH_CHKSUM << 8);
1488     cmd[1] = addr;
1489     cmd[2] = len;
1490
1491     ret = zfIssueCmd(dev, cmd, 12, ZM_OID_FLASH_CHKSUM, NULL);
1492
1493     return ret;
1494 }
1495
1496 /************************************************************************/
1497 /*                                                                      */
1498 /*    FUNCTION DESCRIPTION                  zfiDbgReadFlash             */
1499 /*      Read Flash.                                                     */
1500 /*                                                                      */
1501 /*    INPUTS                                                            */
1502 /*      dev : device pointer                                            */
1503 /*      addr : Start address of read flash                              */
1504 /*      len : total lenth of read flash data                            */
1505 /*                                                                      */
1506 /*    OUTPUTS                                                           */
1507 /*      0 : success                                                     */
1508 /*      other : fail                                                    */
1509 /*                                                                      */
1510 /*    AUTHOR                                                            */
1511 /*      Paul                Atheros Technology Corporation    2007.09   */
1512 /*                                                                      */
1513 /************************************************************************/
1514 u32_t zfiDbgReadFlash(zdev_t *dev, u32_t addr, u32_t len)
1515 {
1516     u32_t cmd[(ZM_MAX_CMD_SIZE/4)];
1517     u32_t ret;
1518
1519     cmd[0] = len | (ZM_CMD_FLASH_READ << 8);
1520     cmd[1] = addr;
1521
1522     ret = zfIssueCmd(dev, cmd, 8, ZM_OID_FLASH_READ, NULL);
1523     return ret;
1524 }
1525
1526 /************************************************************************/
1527 /*                                                                      */
1528 /*    FUNCTION DESCRIPTION                  zfiDownloadFwSet            */
1529 /*      Before Download FW,                                             */
1530 /*      Command FW to Software reset and close watch dog control.       */
1531 /*                                                                      */
1532 /*                                                                      */
1533 /*    INPUTS                                                            */
1534 /*      dev : device pointer                                            */
1535 /*                                                                      */
1536 /*    OUTPUTS                                                           */
1537 /*      0 : success                                                     */
1538 /*      other : fail                                                    */
1539 /*                                                                      */
1540 /*    AUTHOR                                                            */
1541 /*      Paul                Atheros Technology Corporation    2007.09   */
1542 /*                                                                      */
1543 /************************************************************************/
1544 u32_t zfiDownloadFwSet(zdev_t *dev)
1545 {
1546 //softwarereset
1547 //close watch dog
1548     u32_t cmd[(ZM_MAX_CMD_SIZE/4)];
1549     u32_t ret;
1550
1551     cmd[0] = 0x00000008 | (ZM_CMD_FW_DL_INIT << 8);
1552
1553     ret = zfIssueCmd(dev, cmd, 12, ZM_OID_FW_DL_INIT, NULL);
1554
1555     return ret;
1556 }
1557 //Paul--