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[ARM] S3C64XX: add AHB_CON and SPCON register address definitions
[linux-2.6-omap-h63xx.git] / drivers / staging / benet / fwcmd_common.h
1 /*
2  * Copyright (C) 2005 - 2008 ServerEngines
3  * All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or
6  * modify it under the terms of the GNU General Public License version 2
7  * as published by the Free Software Foundation.  The full GNU General
8  * Public License is included in this distribution in the file called COPYING.
9  *
10  * Contact Information:
11  * linux-drivers@serverengines.com
12  *
13  * ServerEngines
14  * 209 N. Fair Oaks Ave
15  * Sunnyvale, CA 94085
16  */
17 /*
18  * Autogenerated by srcgen version: 0127
19  */
20 #ifndef __fwcmd_common_amap_h__
21 #define __fwcmd_common_amap_h__
22 #include "host_struct.h"
23
24 /* --- PHY_LINK_DUPLEX_ENUM --- */
25 #define PHY_LINK_DUPLEX_NONE            (0)
26 #define PHY_LINK_DUPLEX_HALF            (1)
27 #define PHY_LINK_DUPLEX_FULL            (2)
28
29 /* --- PHY_LINK_SPEED_ENUM --- */
30 #define PHY_LINK_SPEED_ZERO             (0)     /* No link. */
31 #define PHY_LINK_SPEED_10MBPS           (1)     /* 10 Mbps */
32 #define PHY_LINK_SPEED_100MBPS          (2)     /* 100 Mbps */
33 #define PHY_LINK_SPEED_1GBPS            (3)     /* 1 Gbps */
34 #define PHY_LINK_SPEED_10GBPS           (4)     /* 10 Gbps */
35
36 /* --- PHY_LINK_FAULT_ENUM --- */
37 #define PHY_LINK_FAULT_NONE             (0)     /* No fault status
38                                                         available or detected */
39 #define PHY_LINK_FAULT_LOCAL            (1)     /* Local fault detected */
40 #define PHY_LINK_FAULT_REMOTE           (2)     /* Remote fault detected */
41
42 /* --- BE_ULP_MASK --- */
43 #define BE_ULP0_MASK                    (1)
44 #define BE_ULP1_MASK                    (2)
45 #define BE_ULP2_MASK                    (4)
46
47 /* --- NTWK_ACTIVE_PORT --- */
48 #define NTWK_PORT_A                     (0)     /* Port A is currently active */
49 #define NTWK_PORT_B                     (1)     /* Port B is currently active */
50 #define NTWK_NO_ACTIVE_PORT             (15)    /* Both ports have lost link */
51
52 /* --- NTWK_LINK_TYPE --- */
53 #define NTWK_LINK_TYPE_PHYSICAL         (0)     /* link up/down event
54                                                    applies to BladeEngine's
55                                                    Physical Ports
56                                                    */
57 #define NTWK_LINK_TYPE_VIRTUAL          (1)     /* Virtual link up/down event
58                                                    reported by BladeExchange.
59                                                    This applies only when the
60                                                    VLD feature is enabled
61                                                    */
62
63 /*
64  * --- FWCMD_MAC_TYPE_ENUM ---
65  * This enum defines the types of MAC addresses in the RXF MAC Address Table.
66  */
67 #define MAC_ADDRESS_TYPE_STORAGE        (0)     /* Storage MAC Address */
68 #define MAC_ADDRESS_TYPE_NETWORK        (1)     /* Network MAC Address */
69 #define MAC_ADDRESS_TYPE_PD             (2)     /* Protection Domain MAC Addr */
70 #define MAC_ADDRESS_TYPE_MANAGEMENT     (3)     /* Managment MAC Address */
71
72
73 /* --- FWCMD_RING_TYPE_ENUM --- */
74 #define FWCMD_RING_TYPE_ETH_RX          (1)     /* Ring created with */
75                                         /* FWCMD_COMMON_ETH_RX_CREATE. */
76 #define FWCMD_RING_TYPE_ETH_TX          (2)     /* Ring created with */
77                                         /* FWCMD_COMMON_ETH_TX_CREATE. */
78 #define FWCMD_RING_TYPE_ISCSI_WRBQ      (3)     /* Ring created with */
79                                         /* FWCMD_COMMON_ISCSI_WRBQ_CREATE. */
80 #define FWCMD_RING_TYPE_ISCSI_DEFQ      (4)     /* Ring created with */
81                                         /* FWCMD_COMMON_ISCSI_DEFQ_CREATE. */
82 #define FWCMD_RING_TYPE_TPM_WRBQ        (5)     /* Ring created with */
83                                         /* FWCMD_COMMON_TPM_WRBQ_CREATE. */
84 #define FWCMD_RING_TYPE_TPM_DEFQ        (6)     /* Ring created with */
85                                         /* FWCMD_COMMONTPM_TDEFQ_CREATE. */
86 #define FWCMD_RING_TYPE_TPM_RQ          (7)     /* Ring created with */
87                                         /* FWCMD_COMMON_TPM_RQ_CREATE. */
88 #define FWCMD_RING_TYPE_MCC             (8)     /* Ring created with */
89                                         /* FWCMD_COMMON_MCC_CREATE. */
90 #define FWCMD_RING_TYPE_CQ              (9)     /* Ring created with */
91                                         /* FWCMD_COMMON_CQ_CREATE. */
92 #define FWCMD_RING_TYPE_EQ              (10)    /* Ring created with */
93                                         /* FWCMD_COMMON_EQ_CREATE. */
94 #define FWCMD_RING_TYPE_QP              (11)    /* Ring created with */
95                                         /* FWCMD_RDMA_QP_CREATE. */
96
97
98 /* --- ETH_TX_RING_TYPE_ENUM --- */
99 #define ETH_TX_RING_TYPE_FORWARDING     (1)     /* Ethernet ring for
100                                                    forwarding packets */
101 #define ETH_TX_RING_TYPE_STANDARD       (2)     /* Ethernet ring for sending
102                                                    network packets. */
103 #define ETH_TX_RING_TYPE_BOUND          (3)     /* Ethernet ring bound to the
104                                                    port specified in the command
105                                                    header.port_number field.
106                                                    Rings of this type are
107                                                    NOT subject to the
108                                                    failover logic implemented
109                                                    in the BladeEngine.
110                                                    */
111
112 /* --- FWCMD_COMMON_QOS_TYPE_ENUM --- */
113 #define QOS_BITS_NIC                    (1)     /* max_bits_per_second_NIC */
114                                                   /* field is valid.  */
115 #define QOS_PKTS_NIC                    (2)     /* max_packets_per_second_NIC */
116                                                   /* field is valid.  */
117 #define QOS_IOPS_ISCSI                  (4)     /* max_ios_per_second_iSCSI */
118                                                   /*field is valid.  */
119 #define QOS_VLAN_TAG                    (8)     /* domain_VLAN_tag field
120                                                    is valid. */
121 #define QOS_FABRIC_ID                   (16)    /* fabric_domain_ID field
122                                                    is valid. */
123 #define QOS_OEM_PARAMS                  (32)    /* qos_params_oem field
124                                                    is valid. */
125 #define QOS_TPUT_ISCSI                  (64)    /* max_bytes_per_second_iSCSI
126                                                    field  is valid.  */
127
128
129 /*
130  * --- FAILOVER_CONFIG_ENUM ---
131  * Failover configuration setting used in FWCMD_COMMON_FORCE_FAILOVER
132  */
133 #define FAILOVER_CONFIG_NO_CHANGE       (0)     /* No change to automatic */
134                                                   /* port failover setting. */
135 #define FAILOVER_CONFIG_ON              (1)     /* Automatic port failover
136                                                    on link down  is enabled. */
137 #define FAILOVER_CONFIG_OFF             (2)     /* Automatic port failover
138                                                    on link down is disabled. */
139
140 /*
141  * --- FAILOVER_PORT_ENUM ---
142  * Failover port setting used in FWCMD_COMMON_FORCE_FAILOVER
143  */
144 #define FAILOVER_PORT_A                 (0)     /* Selects port A. */
145 #define FAILOVER_PORT_B                 (1)     /* Selects port B. */
146 #define FAILOVER_PORT_NONE              (15)    /* No port change requested. */
147
148
149 /*
150  * --- MGMT_FLASHROM_OPCODE ---
151  * Flash ROM operation code
152  */
153 #define MGMT_FLASHROM_OPCODE_FLASH      (1)     /* Commit downloaded data
154                                                    to Flash ROM */
155 #define MGMT_FLASHROM_OPCODE_SAVE       (2)     /* Save downloaded data to
156                                                    ARM's DDR - do not flash */
157 #define MGMT_FLASHROM_OPCODE_CLEAR      (3)     /* Erase specified component
158                                                    from FlashROM */
159 #define MGMT_FLASHROM_OPCODE_REPORT     (4)     /* Read specified component
160                                                    from Flash ROM */
161 #define MGMT_FLASHROM_OPCODE_IMAGE_INFO (5)     /* Returns size of a
162                                                    component */
163
164 /*
165  * --- MGMT_FLASHROM_OPTYPE ---
166  * Flash ROM operation type
167  */
168 #define MGMT_FLASHROM_OPTYPE_CODE_FIRMWARE (0)  /* Includes ARM firmware,
169                                                    IPSec (optional) and EP
170                                                    firmware  */
171 #define MGMT_FLASHROM_OPTYPE_CODE_REDBOOT (1)
172 #define MGMT_FLASHROM_OPTYPE_CODE_BIOS  (2)
173 #define MGMT_FLASHROM_OPTYPE_CODE_PXE_BIOS (3)
174 #define MGMT_FLASHROM_OPTYPE_CODE_CTRLS (4)
175 #define MGMT_FLASHROM_OPTYPE_CFG_IPSEC  (5)
176 #define MGMT_FLASHROM_OPTYPE_CFG_INI    (6)
177 #define MGMT_FLASHROM_OPTYPE_ROM_OFFSET_SPECIFIED (7)
178
179 /*
180  * --- FLASHROM_TYPE ---
181  * Flash ROM manufacturers supported in the f/w
182  */
183 #define INTEL                           (0)
184 #define SPANSION                        (1)
185 #define MICRON                          (2)
186
187 /* --- DDR_CAS_TYPE --- */
188 #define CAS_3                           (0)
189 #define CAS_4                           (1)
190 #define CAS_5                           (2)
191
192 /* --- DDR_SIZE_TYPE --- */
193 #define SIZE_256MB                      (0)
194 #define SIZE_512MB                      (1)
195
196 /* --- DDR_MODE_TYPE --- */
197 #define DDR_NO_ECC                      (0)
198 #define DDR_ECC                         (1)
199
200 /* --- INTERFACE_10GB_TYPE --- */
201 #define CX4_TYPE                        (0)
202 #define XFP_TYPE                        (1)
203
204 /* --- BE_CHIP_MAX_MTU --- */
205 #define CHIP_MAX_MTU                    (9000)
206
207 /* --- XAUI_STATE_ENUM --- */
208 #define XAUI_STATE_ENABLE               (0)     /* This MUST be the default
209                                                    value for all requests
210                                                    which set/change
211                                                    equalization parameter.  */
212 #define XAUI_STATE_DISABLE              (255)   /* The XAUI for both ports
213                                                    may be disabled for EMI
214                                                    tests. There is no
215                                                    provision for turning off
216                                                    individual ports.
217                                                    */
218 /* --- BE_ASIC_REVISION --- */
219 #define BE_ASIC_REV_A0                  (1)
220 #define BE_ASIC_REV_A1                  (2)
221
222 #endif /* __fwcmd_common_amap_h__ */