drivers/spi/tsc2102.c

   1 /*
   2  * drivers/spi/tsc2102.c
   3  *
   4  * TSC2102 interface driver.
   5  *
   6  * Copyright (c) 2005 Andrzej Zaborowski  <balrog@zabor.org>
   7  *
   8  * This package is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This package is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this package; if not, write to the Free Software
  20  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/init.h>
  25 #include <linux/sched.h>
  26 #include <linux/errno.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/delay.h>
  29 #include <linux/suspend.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/clk.h>
  32 #include <linux/spi/spi.h>
  33 #include <linux/spi/tsc2102.h>
  34 #include <linux/err.h>
  35 #include <linux/hwmon.h>
  36 #include <linux/hwmon-sysfs.h>
  37
  38 #include <asm/system.h>
  39 #include <asm/irq.h>
  40 #include <asm/io.h>
  41 #include <asm/mach-types.h>
  42 #include <asm/hardware.h>
  43
  44 #ifdef CONFIG_APM
  45 #include <asm/apm.h>
  46 #endif
  47
  48 /* Bit field definitions for chip registers */
  49 #define TSC2102_ADC_TS_CONTROL          0x8bf4
  50 #define TSC2102_ADC_SCAN_CONTROL        0x2ff4
  51 #define TSC2102_ADC_T1_CONTROL          0x2bf4
  52 #define TSC2102_ADC_T2_CONTROL          0x33f4
  53 #define TSC2102_ADC_DAV                 0x4000
  54 #define TSC2102_ADC_INT_REF             0x0016
  55 #define TSC2102_ADC_EXT_REF             0x0002
  56 #define TSC2102_CONFIG_TIMES            0x0008
  57 #define TSC2102_RESET                   0xbb00
  58 #define TSC2102_ADC_PSTCM               (1 << 15)
  59 #define TSC2102_ADC_ADST                (1 << 14)
  60 #define TSC2102_TS_DAV                  0x0780
  61 #define TSC2102_PS_DAV                  0x0078
  62 #define TSC2102_T1_DAV                  0x0004
  63 #define TSC2102_T2_DAV                  0x0002
  64 #define TSC2102_DAC_ON                  0x3ba0
  65 #define TSC2102_DAC_OFF                 0xafa0
  66 #define TSC2102_FS44K                   (1 << 13)
  67 #define TSC2102_PLL1_OFF                0x0000
  68 #define TSC2102_PLL1_44K                0x811c
  69 #define TSC2102_PLL1_48K                0x8120
  70 #define TSC2102_PLL2_44K                (5462 << 2)
  71 #define TSC2102_PLL2_48K                (1920 << 2)
  72 #define TSC2102_SLVMS                   (1 << 11)
  73 #define TSC2102_DEEMPF                  (1 << 0)
  74 #define TSC2102_BASSBC                  (1 << 1)
  75 #define TSC2102_KEYCLICK_OFF            0x0000
  76
  77 #define CS_CHANGE(val)                  0
  78
  79 struct tsc2102_spi_req {
  80         struct spi_device *dev;
  81         uint16_t command;
  82         uint16_t data;
  83         struct spi_transfer *transfer;
  84         struct spi_message message;
  85 };
  86
  87 struct tsc2102_dev {
  88         struct tsc2102_config *pdata;
  89         spinlock_t lock, lock_sync;
  90         struct clk *bclk_ck;
  91
  92         int state;                      /* 0: TS, 1: Portscan, 2-3: Temps */
  93         struct timer_list ts_timer;     /* Busy-wait for PEN UP */
  94         struct timer_list mode_timer;   /* Change .state every some time */
  95         int pendown;
  96         int data_pending;
  97         uint16_t status, adc_status, adc_data[4];
  98         tsc2102_touch_t touch_cb;
  99         tsc2102_coords_t coords_cb;
 100         tsc2102_ports_t ports_cb;
 101         tsc2102_temp_t temp1_cb;
 102         tsc2102_temp_t temp2_cb;
 103         unsigned int ts_msecs;          /* Interval for .ts_timer */
 104         unsigned int mode_msecs;        /* Interval for .mode_timer */
 105
 106         struct spi_device *spi;
 107         struct spi_transfer *transfers;
 108         struct tsc2102_spi_req req_adc;
 109         struct tsc2102_spi_req req_status;
 110         struct tsc2102_spi_req req_pressure;
 111         struct tsc2102_spi_req req_stopadc;
 112         struct tsc2102_spi_req req_mode;
 113
 114         int bat[2], aux[1], temp[2];
 115         struct class_device *hwmondev;
 116 };
 117
 118 static struct tsc2102_dev tsc;
 119
 120 module_param_named(touch_check_msecs, tsc.ts_msecs, uint, 0);
 121 MODULE_PARM_DESC(touch_check_msecs, "Pen-up polling interval in msecs");
 122
 123 module_param_named(sensor_scan_msecs, tsc.mode_msecs, uint, 0);
 124 MODULE_PARM_DESC(sensor_scan_msecs, "Temperature & battery scan interval");
 125
 126 void tsc2102_write_sync(int page, u8 address, u16 data)
 127 {
 128         static struct tsc2102_spi_req req;
 129         static struct spi_transfer transfer[2];
 130         int ret;
 131
 132         spi_message_init(&req.message);
 133         req.transfer = transfer;
 134
 135         /* Address */
 136         req.command = (page << 11) | (address << 5);
 137         req.transfer[0].tx_buf = &req.command;
 138         req.transfer[0].rx_buf = 0;
 139         req.transfer[0].len = 2;
 140         spi_message_add_tail(&req.transfer[0], &req.message);
 141
 142         /* Data */
 143         req.transfer[1].tx_buf = &data;
 144         req.transfer[1].rx_buf = 0;
 145         req.transfer[1].len = 2;
 146         req.transfer[1].cs_change = CS_CHANGE(1);
 147         spi_message_add_tail(&req.transfer[1], &req.message);
 148
 149         ret = spi_sync(tsc.spi, &req.message);
 150         if (!ret && req.message.status)
 151                 ret = req.message.status;
 152
 153         if (ret)
 154                 printk(KERN_ERR "%s: error %i in SPI request\n",
 155                                 __FUNCTION__, ret);
 156 }
 157
 158 void tsc2102_reads_sync(int page, u8 startaddress, u16 *data, int numregs)
 159 {
 160         static struct tsc2102_spi_req req;
 161         static struct spi_transfer transfer[6];
 162         int ret, i, j;
 163
 164         BUG_ON(numregs + 1 > ARRAY_SIZE(transfer));
 165
 166         spi_message_init(&req.message);
 167         req.transfer = transfer;
 168         i = 0;
 169         j = 0;
 170
 171         /* Address */
 172         req.command = 0x8000 | (page << 11) | (startaddress << 5);
 173         req.transfer[i].tx_buf = &req.command;
 174         req.transfer[i].rx_buf = 0;
 175         req.transfer[i].len = 2;
 176         spi_message_add_tail(&req.transfer[i ++], &req.message);
 177
 178         /* Data */
 179         while (j < numregs) {
 180                 req.transfer[i].tx_buf = 0;
 181                 req.transfer[i].rx_buf = &data[j ++];
 182                 req.transfer[i].len = 2;
 183                 req.transfer[i].cs_change = CS_CHANGE(j == numregs);
 184                 spi_message_add_tail(&req.transfer[i ++], &req.message);
 185         }
 186
 187         ret = spi_sync(tsc.spi, &req.message);
 188         if (!ret && req.message.status)
 189                 ret = req.message.status;
 190
 191         if (ret)
 192                 printk(KERN_ERR "%s: error %i in SPI request\n",
 193                                 __FUNCTION__, ret);
 194 }
 195
 196 u16 tsc2102_read_sync(int page, u8 address)
 197 {
 198         u16 ret;
 199         tsc2102_reads_sync(page, address, &ret, 1);
 200         return ret;
 201 }
 202
 203 static void tsc2102_write_async(
 204                 struct tsc2102_spi_req *spi, int page, u8 address, u16 data,
 205                 void (*complete)(struct tsc2102_dev *context))
 206 {
 207         int ret;
 208
 209         spi_message_init(&spi->message);
 210         spi->message.complete = (void (*)(void *)) complete;
 211         spi->message.context = &tsc;
 212
 213         /* Address */
 214         spi->command = (page << 11) | (address << 5);
 215         spi->transfer[0].tx_buf = &spi->command;
 216         spi->transfer[0].rx_buf = 0;
 217         spi->transfer[0].len = 2;
 218         spi_message_add_tail(&spi->transfer[0], &spi->message);
 219
 220         /* Data */
 221         spi->data = data;
 222         spi->transfer[1].tx_buf = &spi->data;
 223         spi->transfer[1].rx_buf = 0;
 224         spi->transfer[1].len = 2;
 225         spi->transfer[1].cs_change = CS_CHANGE(1);
 226         spi_message_add_tail(&spi->transfer[1], &spi->message);
 227
 228         ret = spi_async(spi->dev, &spi->message);
 229         if (ret)
 230                 printk(KERN_ERR "%s: error %i in SPI request\n",
 231                                 __FUNCTION__, ret);
 232 }
 233
 234 static void tsc2102_reads_async(struct tsc2102_spi_req *spi,
 235                 int page, u8 startaddress, u16 *data, int numregs,
 236                 void (*complete)(struct tsc2102_dev *context))
 237 {
 238         int ret, i, j;
 239
 240         spi_message_init(&spi->message);
 241         spi->message.complete = (void (*)(void *)) complete;
 242         spi->message.context = &tsc;
 243         i = 0;
 244         j = 0;
 245
 246         /* Address */
 247         spi->command = 0x8000 | (page << 11) | (startaddress << 5);
 248         spi->transfer[i].tx_buf = &spi->command;
 249         spi->transfer[i].rx_buf = 0;
 250         spi->transfer[i].len = 2;
 251         spi_message_add_tail(&spi->transfer[i ++], &spi->message);
 252
 253         /* Data */
 254         while (j < numregs) {
 255                 spi->transfer[i].tx_buf = 0;
 256                 spi->transfer[i].rx_buf = &data[j ++];
 257                 spi->transfer[i].len = 2;
 258                 spi->transfer[i].cs_change = CS_CHANGE(j == numregs);
 259                 spi_message_add_tail(&spi->transfer[i ++], &spi->message);
 260         }
 261
 262         ret = spi_async(spi->dev, &spi->message);
 263         if (ret)
 264                 printk(KERN_ERR "%s: error %i in SPI request\n",
 265                                 __FUNCTION__, ret);
 266 }
 267
 268 static void tsc2102_read_async(struct tsc2102_spi_req *spi,
 269                 int page, u8 address, u16 *ret,
 270                 void (*complete)(struct tsc2102_dev *context))
 271 {
 272         tsc2102_reads_async(spi, page, address, ret, 1, complete);
 273 }
 274
 275 static void tsc2102_request_alloc(struct tsc2102_dev *dev,
 276                 struct tsc2102_spi_req *spi, int direction, int numregs,
 277                 struct spi_transfer **buffer)
 278 {
 279         spi->dev = dev->spi;
 280
 281         if (direction == 1)     /* Write */
 282                 numregs = 2;
 283         else                    /* Read */
 284                 numregs += 1;
 285
 286         spi->transfer = *buffer;
 287         *buffer += numregs;
 288 }
 289
 290 #define tsc2102_cb_register_func(cb, cb_t)      \
 291 int tsc2102_ ## cb(cb_t handler)        \
 292 {       \
 293         spin_lock(&tsc.lock);   \
 294         \
 295         /* Lock the module */   \
 296         if (handler && !tsc.cb) \
 297                 if (!try_module_get(THIS_MODULE)) {     \
 298                         printk(KERN_INFO "Failed to get TSC module\n"); \
 299                 }       \
 300         if (!handler && tsc.cb) \
 301                 module_put(THIS_MODULE);        \
 302         \
 303         tsc.cb = handler;       \
 304         \
 305         spin_unlock(&tsc.lock); \
 306         return 0;       \
 307 }
 308
 309 tsc2102_cb_register_func(touch_cb, tsc2102_touch_t)
 310 tsc2102_cb_register_func(coords_cb, tsc2102_coords_t)
 311 tsc2102_cb_register_func(ports_cb, tsc2102_ports_t)
 312 tsc2102_cb_register_func(temp1_cb, tsc2102_temp_t)
 313 tsc2102_cb_register_func(temp2_cb, tsc2102_temp_t)
 314
 315 #ifdef DEBUG
 316 static void tsc2102_print_dav(void)
 317 {
 318         u16 status = tsc2102_read_sync(TSC2102_TS_STATUS_CTRL);
 319         if (status & 0x0fff)
 320                 printk("TSC2102: data in");
 321         if (status & 0x0400)
 322                 printk(" X");
 323         if (status & 0x0200)
 324                 printk(" Y");
 325         if (status & 0x0100)
 326                 printk(" Z1");
 327         if (status & 0x0080)
 328                 printk(" Z2");
 329         if (status & 0x0040)
 330                 printk(" BAT1");
 331         if (status & 0x0020)
 332                 printk(" BAT2");
 333         if (status & 0x0010)
 334                 printk(" AUX1");
 335         if (status & 0x0008)
 336                 printk(" AUX2");
 337         if (status & 0x0004)
 338                 printk(" TEMP1");
 339         if (status & 0x0002)
 340                 printk(" TEMP2");
 341         if (status & 0x0001)
 342                 printk(" KP");
 343         if (status & 0x0fff)
 344                 printk(".\n");
 345 }
 346 #endif
 347
 348 static void tsc2102_complete_dummy(struct tsc2102_dev *dev)
 349 {
 350 }
 351
 352 static inline void tsc2102_touchscreen_mode(struct tsc2102_dev *dev)
 353 {
 354         /* Scan X, Y, Z1, Z2, chip controlled, 12-bit, 16 samples, 500 usec */
 355         tsc2102_write_async(&dev->req_mode,
 356                         TSC2102_TS_ADC_CTRL, TSC2102_ADC_TS_CONTROL,
 357                         tsc2102_complete_dummy);
 358 }
 359
 360 static inline void tsc2102_portscan_mode(struct tsc2102_dev *dev)
 361 {
 362         /* Scan BAT1, BAT2, AUX, 12-bit, 16 samples, 500 usec */
 363         tsc2102_write_async(&dev->req_mode,
 364                         TSC2102_TS_ADC_CTRL, TSC2102_ADC_SCAN_CONTROL,
 365                         tsc2102_complete_dummy);
 366 }
 367
 368 static inline void tsc2102_temp1_mode(struct tsc2102_dev *dev)
 369 {
 370         /* Scan TEMP1, 12-bit, 16 samples, 500 usec */
 371         tsc2102_write_async(&dev->req_mode,
 372                         TSC2102_TS_ADC_CTRL, TSC2102_ADC_T1_CONTROL,
 373                         tsc2102_complete_dummy);
 374 }
 375
 376 static inline void tsc2102_temp2_mode(struct tsc2102_dev *dev)
 377 {
 378         /* Scan TEMP2, 12-bit, 16 samples, 500 usec */
 379         tsc2102_write_async(&dev->req_mode,
 380                         TSC2102_TS_ADC_CTRL, TSC2102_ADC_T2_CONTROL,
 381                         tsc2102_complete_dummy);
 382 }
 383
 384 static void tsc2102_mode(struct tsc2102_dev *dev)
 385 {
 386         switch (dev->state) {
 387         case 0:
 388                 tsc2102_touchscreen_mode(dev);
 389                 break;
 390         case 1:
 391                 tsc2102_portscan_mode(dev);
 392                 break;
 393         case 2:
 394                 tsc2102_temp1_mode(dev);
 395                 break;
 396         case 3:
 397                 tsc2102_temp2_mode(dev);
 398                 break;
 399         default:
 400                 dev->state = 0;
 401                 tsc2102_touchscreen_mode(dev);
 402                 break;
 403         }
 404 }
 405
 406 /* Lock is held when this is called.  */
 407 static void tsc2102_new_mode(struct tsc2102_dev *dev)
 408 {
 409         /* Abort current conversion if any */
 410         tsc2102_write_async(&dev->req_stopadc,
 411                         TSC2102_TS_ADC_CTRL, TSC2102_ADC_ADST,
 412                         tsc2102_complete_dummy);
 413
 414         dev->state ++;
 415         tsc2102_mode(dev);
 416 }
 417
 418 static void tsc2102_check_status(struct tsc2102_dev *dev);
 419
 420 /* TSC has new data for us availiable.  */
 421 static irqreturn_t tsc2102_handler(int irq, void *dev_id)
 422 {
 423         struct tsc2102_dev *dev = (struct tsc2102_dev *) dev_id;
 424         spin_lock_irq(&dev->lock);
 425
 426         if (!dev->data_pending)
 427                 tsc2102_check_status(dev);
 428
 429         dev->data_pending ++;
 430
 431         spin_unlock_irq(&dev->lock);
 432         return IRQ_HANDLED;
 433 }
 434
 435 static void tsc2102_data_report(struct tsc2102_dev *dev)
 436 {
 437         if (dev->status & TSC2102_TS_DAV) {
 438                 if (dev->coords_cb)
 439                         dev->coords_cb(
 440                                         dev->adc_data[0], dev->adc_data[1],
 441                                         dev->adc_data[2], dev->adc_data[3]);
 442         }
 443
 444         if (dev->status & TSC2102_PS_DAV) {
 445                 if (dev->ports_cb)
 446                         dev->ports_cb(dev->adc_data[0],
 447                                         dev->adc_data[1], dev->adc_data[2]);
 448                 dev->bat[0] = dev->adc_data[0];
 449                 dev->bat[1] = dev->adc_data[1];
 450                 dev->aux[0] = dev->adc_data[2];
 451         }
 452
 453         if (dev->status & TSC2102_T1_DAV) {
 454                 if (dev->temp1_cb)
 455                         dev->temp1_cb(*dev->adc_data);
 456                 dev->temp[0] = *dev->adc_data;
 457         }
 458
 459         if (dev->status & TSC2102_T2_DAV) {
 460                 if (dev->temp2_cb)
 461                         dev->temp2_cb(*dev->adc_data);
 462                 dev->temp[1] = *dev->adc_data;
 463         }
 464
 465         spin_lock_irq(&dev->lock);
 466
 467         dev->data_pending --;
 468
 469         /*
 470          * This may happen if the registers were successfully read and a
 471          * new conversion was started and completed by the TSC before the
 472          * completion for SPI read was called.
 473          */
 474         if (dev->data_pending)
 475                 tsc2102_check_status(dev);
 476
 477         if (dev->status & (TSC2102_PS_DAV | TSC2102_T1_DAV | TSC2102_T2_DAV))
 478                 tsc2102_new_mode(dev);
 479
 480         spin_unlock_irq(&dev->lock);
 481 }
 482
 483 static void tsc2102_status_report(struct tsc2102_dev *dev)
 484 {
 485         /*
 486          * Read all converted data from corresponding registers
 487          * so that the ADC can move on to a new conversion.
 488          */
 489         if (dev->status & TSC2102_TS_DAV) {
 490                 tsc2102_reads_async(&dev->req_adc, TSC2102_TS_X,
 491                                 dev->adc_data, 4, tsc2102_data_report);
 492                 if (!dev->pendown) {
 493                         dev->pendown = 1;
 494                         if (dev->touch_cb)
 495                                 dev->touch_cb(1);
 496
 497                         mod_timer(&dev->ts_timer, jiffies +
 498                                 msecs_to_jiffies(dev->ts_msecs));
 499                 }
 500         }
 501
 502         if (dev->status & TSC2102_PS_DAV) {
 503                 tsc2102_reads_async(&dev->req_adc, TSC2102_TS_BAT1,
 504                                 dev->adc_data, 3, tsc2102_data_report);
 505         }
 506
 507         if (dev->status & TSC2102_T1_DAV) {
 508                 tsc2102_read_async(&dev->req_adc, TSC2102_TS_TEMP1,
 509                                 dev->adc_data, tsc2102_data_report);
 510         }
 511
 512         if (dev->status & TSC2102_T2_DAV) {
 513                 tsc2102_read_async(&dev->req_adc, TSC2102_TS_TEMP2,
 514                                 dev->adc_data, tsc2102_data_report);
 515         }
 516
 517         if (!(dev->status & (TSC2102_TS_DAV | TSC2102_PS_DAV |
 518                                         TSC2102_T1_DAV | TSC2102_T2_DAV))) {
 519                 spin_lock_irq(&dev->lock);
 520                 dev->data_pending --;
 521                 spin_unlock_irq(&dev->lock);
 522
 523                 WARN_ON(!dev->state);
 524         }
 525 }
 526
 527 static void tsc2102_check_status(struct tsc2102_dev *dev)
 528 {
 529         tsc2102_read_async(&dev->req_status, TSC2102_TS_STATUS_CTRL,
 530                         &dev->status, tsc2102_status_report);
 531 }
 532
 533 static void tsc2102_mode_timer(unsigned long data)
 534 {
 535         struct tsc2102_dev *dev = (struct tsc2102_dev *) data;
 536         spin_lock_irq(&dev->lock);
 537
 538         BUG_ON(dev->state);
 539
 540         tsc2102_new_mode(dev);
 541
 542         mod_timer(&dev->mode_timer, jiffies +
 543                         msecs_to_jiffies(dev->mode_msecs));
 544         spin_unlock_irq(&dev->lock);
 545 }
 546
 547 /*
 548  * There are at least three ways to check for pen-up:
 549  *      - the PINT/DAV pin state,
 550  *      - reading PSTCM bit in ADC Control register (D15, offset 0x00),
 551  *      - reading ADST bit in ADC Control register (D14, offset 0x00),
 552  *              ADC idle would indicate no screen touch.
 553  * Unfortunately none of them seems to be 100% accurate and you will
 554  * find they are totally inconsistent, i.e. you get to see any arbitrary
 555  * combination of values in these three bits.  So we will busy-wait
 556  * for a moment when all three indicate a pen-up, using a timer, before
 557  * we report a pen-up.
 558  */
 559 static void tsc2102_pressure_report(struct tsc2102_dev *dev)
 560 {
 561         if (!dev->pendown)
 562                 return;
 563
 564         if (dev->state ||
 565                         (dev->adc_status & TSC2102_ADC_PSTCM) ||
 566                         !(dev->adc_status & TSC2102_ADC_ADST)) {
 567                 mod_timer(&dev->ts_timer, jiffies +
 568                                 msecs_to_jiffies(dev->ts_msecs));
 569         } else {
 570                 dev->pendown = 0;
 571                 if (dev->touch_cb)
 572                         dev->touch_cb(0);
 573         }
 574 }
 575
 576 static void tsc2102_pressure(unsigned long data)
 577 {
 578         struct tsc2102_dev *dev = (struct tsc2102_dev *) data;
 579
 580         BUG_ON(!dev->pendown);
 581
 582         tsc2102_read_async(&dev->req_pressure, TSC2102_TS_ADC_CTRL,
 583                         &dev->adc_status, tsc2102_pressure_report);
 584 }
 585
 586 #if defined(CONFIG_SND_OMAP_TSC2102) || defined(CONFIG_SND_OMAP_TSC2102_MODULE)
 587
 588 /*
 589  * Volume level values should be in the range [0, 127].
 590  * Higher values mean lower volume.
 591  */
 592 void tsc2102_set_volume(uint8_t left_ch, uint8_t right_ch)
 593 {
 594         u16 val;
 595         if (left_ch == 0x00 || left_ch == 0x7f) /* All 0's or all 1's */
 596                 left_ch ^= 0x7f;
 597         if (right_ch == 0x00 || right_ch == 0x7f)
 598                 right_ch ^= 0x7f;
 599
 600         spin_lock(&tsc.lock_sync);
 601
 602         val = tsc2102_read_sync(TSC2102_DAC_GAIN_CTRL);
 603
 604         val &= 0x8080;  /* Preserve mute-bits */
 605         val |= (left_ch << 8) | right_ch;
 606
 607         tsc2102_write_sync(TSC2102_DAC_GAIN_CTRL, val);
 608
 609         spin_unlock(&tsc.lock_sync);
 610 }
 611 EXPORT_SYMBOL_GPL(tsc2102_set_volume);
 612
 613 void tsc2102_set_mute(int left_ch, int right_ch)
 614 {
 615         u16 val;
 616         spin_lock(&tsc.lock_sync);
 617
 618         val = tsc2102_read_sync(TSC2102_DAC_GAIN_CTRL);
 619
 620         val &= 0x7f7f;  /* Preserve volume settings */
 621         val |= (left_ch << 15) | (right_ch << 7);
 622
 623         tsc2102_write_sync(TSC2102_DAC_GAIN_CTRL, val);
 624
 625         spin_unlock(&tsc.lock_sync);
 626 }
 627 EXPORT_SYMBOL_GPL(tsc2102_set_mute);
 628
 629 void tsc2102_get_mute(int *left_ch, int *right_ch)
 630 {
 631         u16 val;
 632         spin_lock(&tsc.lock_sync);
 633
 634         val = tsc2102_read_sync(TSC2102_DAC_GAIN_CTRL);
 635
 636         spin_unlock(&tsc.lock_sync);
 637
 638         *left_ch = !!(val & (1 << 15));
 639         *right_ch = !!(val & (1 << 7));
 640 }
 641
 642 void tsc2102_set_deemphasis(int enable)
 643 {
 644         u16 val;
 645         spin_lock(&tsc.lock_sync);
 646         val = tsc2102_read_sync(TSC2102_DAC_POWER_CTRL);
 647
 648         if (enable)
 649                 val &= ~TSC2102_DEEMPF;
 650         else
 651                 val |= TSC2102_DEEMPF;
 652
 653         tsc2102_write_sync(TSC2102_DAC_POWER_CTRL, val);
 654         spin_unlock(&tsc.lock_sync);
 655 }
 656 EXPORT_SYMBOL_GPL(tsc2102_set_deemphasis);
 657
 658 void tsc2102_set_bassboost(int enable)
 659 {
 660         u16 val;
 661         spin_lock(&tsc.lock_sync);
 662         val = tsc2102_read_sync(TSC2102_DAC_POWER_CTRL);
 663
 664         if (enable)
 665                 val &= ~TSC2102_BASSBC;
 666         else
 667                 val |= TSC2102_BASSBC;
 668
 669         tsc2102_write_sync(TSC2102_DAC_POWER_CTRL, val);
 670         spin_unlock(&tsc.lock_sync);
 671 }
 672 EXPORT_SYMBOL_GPL(tsc2102_set_bassboost);
 673
 674 /*      {rate, dsor, fsref}     */
 675 static const struct tsc2102_rate_info_s tsc2102_rates[] = {
 676         /* Fsref / 6.0 */
 677         {7350,  63,     1},
 678         {8000,  63,     0},
 679         /* Fsref / 6.0 */
 680         {7350,  54,     1},
 681         {8000,  54,     0},
 682         /* Fsref / 5.0 */
 683         {8820,  45,     1},
 684         {9600,  45,     0},
 685         /* Fsref / 4.0 */
 686         {11025, 36,     1},
 687         {12000, 36,     0},
 688         /* Fsref / 3.0 */
 689         {14700, 27,     1},
 690         {16000, 27,     0},
 691         /* Fsref / 2.0 */
 692         {22050, 18,     1},
 693         {24000, 18,     0},
 694         /* Fsref / 1.5 */
 695         {29400, 9,      1},
 696         {32000, 9,      0},
 697         /* Fsref */
 698         {44100, 0,      1},
 699         {48000, 0,      0},
 700
 701         {0,     0,      0},
 702 };
 703
 704 int tsc2102_set_rate(int rate)
 705 {
 706         int i;
 707         uint16_t val;
 708
 709         for (i = 0; tsc2102_rates[i].sample_rate; i ++)
 710                 if (tsc2102_rates[i].sample_rate == rate)
 711                         break;
 712         if (tsc2102_rates[i].sample_rate == 0) {
 713                 printk(KERN_ERR "Unknown sampling rate %i.0 Hz\n", rate);
 714                 return -EINVAL;
 715         }
 716
 717         spin_lock(&tsc.lock_sync);
 718
 719         tsc2102_write_sync(TSC2102_AUDIO1_CTRL, tsc2102_rates[i].divisor);
 720
 721         val = tsc2102_read_sync(TSC2102_AUDIO3_CTRL);
 722
 723         if (tsc2102_rates[i].fs_44k) {
 724                 tsc2102_write_sync(TSC2102_AUDIO3_CTRL, val | TSC2102_FS44K);
 725                 /* Enable Phase-locked-loop, set up clock dividers */
 726                 tsc2102_write_sync(TSC2102_PLL1_CTRL, TSC2102_PLL1_44K);
 727                 tsc2102_write_sync(TSC2102_PLL2_CTRL, TSC2102_PLL2_44K);
 728         } else {
 729                 tsc2102_write_sync(TSC2102_AUDIO3_CTRL, val & ~TSC2102_FS44K);
 730                 /* Enable Phase-locked-loop, set up clock dividers */
 731                 tsc2102_write_sync(TSC2102_PLL1_CTRL, TSC2102_PLL1_48K);
 732                 tsc2102_write_sync(TSC2102_PLL2_CTRL, TSC2102_PLL2_48K);
 733         }
 734
 735         spin_unlock(&tsc.lock_sync);
 736         return 0;
 737 }
 738 EXPORT_SYMBOL(tsc2102_set_rate);
 739
 740 /*
 741  * Perform basic set-up with default values and power the DAC on.
 742  */
 743 void tsc2102_dac_power(int state)
 744 {
 745         spin_lock(&tsc.lock_sync);
 746
 747         if (state) {
 748                 /* 16-bit words, DSP mode, sample at Fsref */
 749                 tsc2102_write_sync(TSC2102_AUDIO1_CTRL, 0x0100);
 750                 /* Keyclicks off, soft-stepping at normal rate */
 751                 tsc2102_write_sync(TSC2102_AUDIO2_CTRL, TSC2102_KEYCLICK_OFF);
 752                 /* 44.1 kHz Fsref, continuous transfer mode, master DAC */
 753                 tsc2102_write_sync(TSC2102_AUDIO3_CTRL, 0x2800);
 754                 /* Soft-stepping enabled */
 755                 tsc2102_write_sync(TSC2102_AUDIO4_CTRL, 0x0000);
 756
 757                 /* PLL generates 44.1 kHz */
 758                 tsc2102_write_sync(TSC2102_PLL1_CTRL, TSC2102_PLL1_44K);
 759                 tsc2102_write_sync(TSC2102_PLL2_CTRL, TSC2102_PLL2_44K);
 760
 761                 /* Codec & DAC power up, virtual ground disabled */
 762                 tsc2102_write_sync(TSC2102_DAC_POWER_CTRL, TSC2102_DAC_ON);
 763         } else {
 764                 /* All off */
 765                 tsc2102_write_sync(TSC2102_AUDIO4_CTRL, TSC2102_KEYCLICK_OFF);
 766                 tsc2102_write_sync(TSC2102_PLL1_CTRL, TSC2102_PLL1_OFF);
 767         }
 768
 769         spin_unlock(&tsc.lock_sync);
 770 }
 771 EXPORT_SYMBOL_GPL(tsc2102_dac_power);
 772
 773 void tsc2102_set_i2s_master(int state)
 774 {
 775         uint16_t val;
 776         spin_lock(&tsc.lock_sync);
 777
 778         val = tsc2102_read_sync(TSC2102_AUDIO3_CTRL);
 779
 780         if (state)
 781                 tsc2102_write_sync(TSC2102_AUDIO3_CTRL, val | TSC2102_SLVMS);
 782         else
 783                 tsc2102_write_sync(TSC2102_AUDIO3_CTRL, val & ~TSC2102_SLVMS);
 784
 785         spin_unlock(&tsc.lock_sync);
 786 }
 787 EXPORT_SYMBOL_GPL(tsc2102_set_i2s_master);
 788
 789 #endif  /* CONFIG_SND_OMAP_TSC2101 */
 790
 791 static int tsc2102_configure(struct tsc2102_dev *dev)
 792 {
 793         /* Reset the chip */
 794         tsc2102_write_sync(TSC2102_TS_RESET_CTRL, TSC2102_RESET);
 795
 796         /* Reference mode, 100 usec delay, 1.25 V reference */
 797         if (dev->pdata->use_internal)
 798                 tsc2102_write_sync(TSC2102_TS_REF_CTRL, TSC2102_ADC_INT_REF);
 799         else
 800                 tsc2102_write_sync(TSC2102_TS_REF_CTRL, TSC2102_ADC_EXT_REF);
 801
 802         /* 84 usec precharge time, 32 usec sense time */
 803         tsc2102_write_sync(TSC2102_TS_CONFIG_CTRL, TSC2102_CONFIG_TIMES);
 804
 805         /* PINT/DAV acts as DAV */
 806         tsc2102_write_sync(TSC2102_TS_STATUS_CTRL, TSC2102_ADC_DAV);
 807
 808         tsc2102_mode(dev);
 809         mod_timer(&dev->mode_timer, jiffies +
 810                         msecs_to_jiffies(dev->mode_msecs));
 811         return 0;
 812 }
 813
 814 /*
 815  * Retrieves chip revision.  Should be always 1.
 816  */
 817 int tsc2102_get_revision(void)
 818 {
 819         return tsc2102_read_sync(TSC2102_AUDIO3_CTRL) & 7;
 820 }
 821
 822 /*
 823  * Emit a short keyclick typically in order to give feedback to
 824  * user on specific events.
 825  *
 826  * amplitude must be between 0 (lowest) and 2 (highest).
 827  * freq must be between 0 (corresponds to 62.5 Hz) and 7 (8 kHz).
 828  * length should be between 2 and 32 periods.
 829  *
 830  * This function sleeps but doesn't sleep until the sound has
 831  * finished.
 832  */
 833 void tsc2102_keyclick(int amplitude, int freq, int length)
 834 {
 835         u16 val;
 836         spin_lock(&tsc.lock_sync);
 837         val = tsc2102_read_sync(TSC2102_AUDIO2_CTRL);
 838         val &= 0x800f;
 839
 840         /* Set amplitude */
 841         switch (amplitude) {
 842         case 1:
 843                 val |= 4 << 12;
 844                 break;
 845         case 2:
 846                 val |= 7 << 12;
 847                 break;
 848         default:
 849                 break;
 850         }
 851
 852         /* Frequency */
 853         val |= (freq & 0x7) << 8;
 854
 855         /* Round to nearest supported length */
 856         if (length > 20)
 857                 val |= 4 << 4;
 858         else if (length > 6)
 859                 val |= 3 << 4;
 860         else if (length > 4)
 861                 val |= 2 << 4;
 862         else if (length > 2)
 863                 val |= 1 << 4;
 864
 865         /* Enable keyclick */
 866         val |= 0x8000;
 867
 868         tsc2102_write_sync(TSC2102_AUDIO2_CTRL, val);
 869         spin_unlock(&tsc.lock_sync);
 870 }
 871
 872 #ifdef CONFIG_HWMON
 873 #define TSC2102_INPUT(devname, field)   \
 874 static ssize_t show_ ## devname(struct device *dev,     \
 875                 struct device_attribute *devattr, char *buf)    \
 876 {       \
 877         struct tsc2102_dev *devhwmon = dev_get_drvdata(dev);    \
 878         int value = devhwmon->field;    \
 879         return sprintf(buf, "%i\n", value);     \
 880 }       \
 881 static DEVICE_ATTR(devname ## _input, S_IRUGO, show_ ## devname, NULL);
 882
 883 TSC2102_INPUT(in0, bat[0])
 884 TSC2102_INPUT(in1, bat[1])
 885 TSC2102_INPUT(in2, aux[0])
 886 TSC2102_INPUT(in3, temp[0])
 887 TSC2102_INPUT(in4, temp[1])
 888
 889 static ssize_t show_temp1(struct device *dev,
 890                 struct device_attribute *devattr, char *buf)
 891 {
 892         struct tsc2102_dev *devhwmon = dev_get_drvdata(dev);
 893         int t1, t2;
 894         int value, diff;
 895
 896         t1 = devhwmon->temp[0];
 897         t2 = devhwmon->temp[1];
 898
 899         /*
 900          * Use method #2 (differential) to calculate current temperature.
 901          * The difference between TEMP2 and TEMP1 input values is
 902          * multiplied by a constant to obtain current temperature.
 903          * To find this constant we use the values measured at 25 C as
 904          * thermometer calibration data.
 905          *
 906          * 298150 is 25 degrees Celcius represented in Kelvins and
 907          * multiplied by 1000 for fixed point precision (273.15 + 25).
 908          * 273150 is zero degrees Celcius.
 909          */
 910         diff = devhwmon->pdata->temp_at25c[1] - devhwmon->pdata->temp_at25c[0];
 911         BUG_ON(diff == 0);
 912         value = (t2 - t1) * 298150 / diff;      /* This is in Kelvins now */
 913
 914         t1 = value - 273150;                    /* Celcius millidegree */
 915         return sprintf(buf, "%i\n", t1);
 916 }
 917 static DEVICE_ATTR(temp1_input, S_IRUGO, show_temp1, NULL);
 918 #endif  /* CONFIG_HWMON */
 919
 920 #ifdef CONFIG_APM
 921 static void tsc2102_get_power_status(struct apm_power_info *info)
 922 {
 923         tsc.pdata->apm_report(info, tsc.bat);
 924 }
 925 #endif
 926
 927 #ifdef CONFIG_PM
 928 /*
 929  * Suspend the chip.
 930  */
 931 static int
 932 tsc2102_suspend(struct spi_device *spi, pm_message_t state)
 933 {
 934         struct tsc2102_dev *dev = dev_get_drvdata(&spi->dev);
 935
 936         if (!dev)
 937                 return 0;
 938
 939         spin_lock(&dev->lock_sync);
 940
 941         del_timer(&dev->mode_timer);
 942         del_timer(&dev->ts_timer);
 943
 944         if (dev->pendown && dev->touch_cb)
 945                 dev->touch_cb(0);
 946
 947         /* Abort current conversion and power down the ADC */
 948         tsc2102_write_sync(TSC2102_TS_ADC_CTRL, TSC2102_ADC_ADST);
 949
 950         dev->spi->dev.power.power_state = state;
 951
 952         spin_unlock(&dev->lock_sync);
 953         return 0;
 954 }
 955
 956 /*
 957  * Resume chip operation.
 958  */
 959 static int tsc2102_resume(struct spi_device *spi)
 960 {
 961         struct tsc2102_dev *dev = dev_get_drvdata(&spi->dev);
 962         int err;
 963
 964         if (!dev)
 965                 return 0;
 966
 967         spin_lock(&dev->lock_sync);
 968
 969         dev->spi->dev.power.power_state = PMSG_ON;
 970
 971         dev->state = 0;
 972         dev->pendown = 0;
 973
 974         err = tsc2102_configure(dev);
 975
 976         spin_unlock(&dev->lock_sync);
 977         return err;
 978 }
 979 #else
 980 #define tsc2102_suspend NULL
 981 #define tsc2102_resume  NULL
 982 #endif
 983
 984 static struct platform_device tsc2102_ts_device = {
 985         .name           = "tsc2102-ts",
 986         .id             = -1,
 987 };
 988
 989 static struct platform_device tsc2102_alsa_device = {
 990         .name           = "tsc2102-alsa",
 991         .id             = -1,
 992 };
 993
 994 static int tsc2102_probe(struct spi_device *spi)
 995 {
 996         struct tsc2102_config *pdata = spi->dev.platform_data;
 997         struct spi_transfer *spi_buffer;
 998         int err = 0;
 999
1000         if (!pdata) {
1001                 printk(KERN_ERR "TSC2102: Platform data not supplied\n");
1002                 return -ENOENT;
1003         }
1004
1005         if (!spi->irq) {
1006                 printk(KERN_ERR "TSC2102: Invalid irq value\n");
1007                 return -ENOENT;
1008         }
1009
1010         tsc.pdata = pdata;
1011         tsc.state = 0;
1012         tsc.pendown = 0;
1013         tsc.data_pending = 0;
1014         tsc.ts_msecs = 20;
1015         tsc.mode_msecs = 1000;
1016         tsc.spi = spi;
1017
1018         /* Allocate enough struct spi_transfer's for all requests */
1019         spi_buffer = kzalloc(sizeof(struct spi_transfer) * 16, GFP_KERNEL);
1020         if (!spi_buffer) {
1021                 printk(KERN_ERR "TSC2102: No memory for SPI buffers\n");
1022                 return -ENOMEM;
1023         }
1024
1025         tsc.transfers = spi_buffer;
1026         tsc2102_request_alloc(&tsc, &tsc.req_adc, 0, 4, &spi_buffer);
1027         tsc2102_request_alloc(&tsc, &tsc.req_status, 0, 1, &spi_buffer);
1028         tsc2102_request_alloc(&tsc, &tsc.req_pressure, 0, 1, &spi_buffer);
1029         tsc2102_request_alloc(&tsc, &tsc.req_stopadc, 1, 1, &spi_buffer);
1030         tsc2102_request_alloc(&tsc, &tsc.req_mode, 1, 1, &spi_buffer);
1031
1032         spin_lock_init(&tsc.lock);
1033         spin_lock(&tsc.lock_sync);
1034
1035         /* Get the BCLK - assuming the rate is at 12000000 */
1036         tsc.bclk_ck = clk_get(0, "bclk");
1037         if (!tsc.bclk_ck) {
1038                 printk(KERN_ERR "Unable to get the clock BCLK\n");
1039                 err = -EPERM;
1040                 goto done;
1041         }
1042
1043         clk_enable(tsc.bclk_ck);
1044
1045         if (request_irq(spi->irq, tsc2102_handler, IRQF_SAMPLE_RANDOM |
1046                                 IRQF_TRIGGER_FALLING, "tsc2102", &tsc)) {
1047                 printk(KERN_ERR "Could not allocate touchscreen IRQ!\n");
1048                 err = -EINVAL;
1049                 goto err_clk;
1050         }
1051
1052         setup_timer(&tsc.ts_timer,
1053                         tsc2102_pressure, (unsigned long) &tsc);
1054         setup_timer(&tsc.mode_timer,
1055                         tsc2102_mode_timer, (unsigned long) &tsc);
1056
1057         /* Set up the communication bus */
1058         dev_set_drvdata(&spi->dev, &tsc);
1059         spi->dev.power.power_state = PMSG_ON;
1060         spi->mode = SPI_MODE_1;
1061         spi->bits_per_word = 16;
1062         err = spi_setup(spi);
1063         if (err)
1064                 goto err_timer;
1065
1066         /* Now try to detect the chip, make first contact */
1067         if (tsc2102_get_revision() != 0x1) {
1068                 printk(KERN_ERR "No TI TSC2102 chip found!\n");
1069                 goto err_timer;
1070         }
1071
1072         err = tsc2102_configure(&tsc);
1073         if (err)
1074                 goto err_timer;
1075
1076         /* Register devices controlled by TSC 2102 */
1077         tsc2102_ts_device.dev.platform_data = pdata;
1078         tsc2102_ts_device.dev.parent = &spi->dev;
1079         err = platform_device_register(&tsc2102_ts_device);
1080         if (err)
1081                 goto err_timer;
1082
1083         tsc2102_alsa_device.dev.platform_data = pdata->alsa_config;
1084         tsc2102_alsa_device.dev.parent = &spi->dev;
1085         err = platform_device_register(&tsc2102_alsa_device);
1086         if (err)
1087                 goto err_ts;
1088
1089 #ifdef CONFIG_HWMON
1090         tsc.hwmondev = hwmon_device_register(&spi->dev);
1091         if (IS_ERR(tsc.hwmondev)) {
1092                 printk(KERN_ERR "tsc2102_hwmon: Device registration failed\n");
1093                 err = PTR_ERR(tsc.hwmondev);
1094                 goto err_alsa;
1095         }
1096
1097         if (pdata->monitor & TSC_BAT1)
1098                 err |= device_create_file(&spi->dev, &dev_attr_in0_input);
1099         if (pdata->monitor & TSC_BAT2)
1100                 err |= device_create_file(&spi->dev, &dev_attr_in1_input);
1101         if (pdata->monitor & TSC_AUX)
1102                 err |= device_create_file(&spi->dev, &dev_attr_in2_input);
1103         if (pdata->monitor & TSC_TEMP) {
1104                 err |= device_create_file(&spi->dev, &dev_attr_temp1_input);
1105                 err |= device_create_file(&spi->dev, &dev_attr_in3_input);
1106                 err |= device_create_file(&spi->dev, &dev_attr_in4_input);
1107         }
1108
1109         if (err)
1110                 printk(KERN_ERR "tsc2102_hwmon: Creating one or more "
1111                                 "attribute files failed\n");
1112         err = 0;        /* Not fatal */
1113 #endif
1114
1115 #ifdef CONFIG_APM
1116         if (pdata->apm_report)
1117                 apm_get_power_status = tsc2102_get_power_status;
1118 #endif
1119
1120         if (!err)
1121                 goto done;
1122
1123 err_alsa:
1124         platform_device_unregister(&tsc2102_alsa_device);
1125 err_ts:
1126         platform_device_unregister(&tsc2102_ts_device);
1127 err_timer:
1128         del_timer(&tsc.ts_timer);
1129         del_timer(&tsc.mode_timer);
1130         dev_set_drvdata(&spi->dev, NULL);
1131 err_clk:
1132         clk_disable(tsc.bclk_ck);
1133         clk_put(tsc.bclk_ck);
1134 done:
1135         spin_unlock(&tsc.lock_sync);
1136         return err;
1137 }
1138
1139 static int tsc2102_remove(struct spi_device *spi)
1140 {
1141         struct tsc2102_dev *dev = dev_get_drvdata(&spi->dev);
1142
1143         spin_lock(&dev->lock_sync);
1144
1145         platform_device_unregister(&tsc2102_ts_device);
1146         platform_device_unregister(&tsc2102_alsa_device);
1147
1148         dev_set_drvdata(&spi->dev, NULL);
1149
1150         /* Release the BCLK */
1151         clk_disable(dev->bclk_ck);
1152         clk_put(dev->bclk_ck);
1153
1154         del_timer(&tsc.mode_timer);
1155         del_timer(&tsc.ts_timer);
1156
1157         kfree(tsc.transfers);
1158
1159 #ifdef CONFIG_HWMON
1160         hwmon_device_unregister(dev->hwmondev);
1161 #endif
1162
1163 #ifdef CONFIG_APM
1164         apm_get_power_status = 0;
1165 #endif
1166
1167         spin_unlock(&dev->lock_sync);
1168
1169         return 0;
1170 }
1171
1172 static struct spi_driver tsc2102_driver = {
1173         .probe          = tsc2102_probe,
1174         .remove         = tsc2102_remove,
1175         .suspend        = tsc2102_suspend,
1176         .resume         = tsc2102_resume,
1177         .driver         = {
1178                 .name   = "tsc2102",
1179                 .owner  = THIS_MODULE,
1180                 .bus    = &spi_bus_type,
1181         },
1182 };
1183
1184 static char __initdata banner[] = KERN_INFO "TI TSC2102 driver initializing\n";
1185
1186 static int __init tsc2102_init(void)
1187 {
1188         printk(banner);
1189         return spi_register_driver(&tsc2102_driver);
1190 }
1191
1192 static void __exit tsc2102_exit(void)
1193 {
1194         spi_unregister_driver(&tsc2102_driver);
1195 }
1196
1197 module_init(tsc2102_init);
1198 module_exit(tsc2102_exit);
1199
1200 EXPORT_SYMBOL(tsc2102_read_sync);
1201 EXPORT_SYMBOL(tsc2102_reads_sync);
1202 EXPORT_SYMBOL(tsc2102_write_sync);
1203 EXPORT_SYMBOL(tsc2102_keyclick);
1204
1205 MODULE_AUTHOR("Andrzej Zaborowski");
1206 MODULE_DESCRIPTION("Interface driver for TI TSC2102 chips.");
1207 MODULE_LICENSE("GPL");