2 * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
4 * FIXME According to the usermanual the status bits in the status register
5 * are only updated when the peripherals access the FIFO and not when the
6 * CPU access them. So since we use this bits to know when we stop writing
7 * and reading, they may not be updated in-time and a race condition may
8 * exists. But I haven't be able to prove this and I don't care. But if
9 * any problem arises, it might worth checking. The TX/RX FIFO Stats
10 * registers should be used in addition.
11 * Update: Actually, they seem updated ... At least the bits we use.
14 * Maintainer : Sylvain Munaut <tnt@246tNt.com>
16 * Some of the code has been inspired/copied from the 2.4 code written
17 * by Dale Farnsworth <dfarnsworth@mvista.com>.
19 * Copyright (C) 2008 Freescale Semiconductor Inc.
20 * John Rigby <jrigby@gmail.com>
21 * Added support for MPC5121
22 * Copyright (C) 2006 Secret Lab Technologies Ltd.
23 * Grant Likely <grant.likely@secretlab.ca>
24 * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
25 * Copyright (C) 2003 MontaVista, Software, Inc.
27 * This file is licensed under the terms of the GNU General Public License
28 * version 2. This program is licensed "as is" without any warranty of any
29 * kind, whether express or implied.
32 /* Platform device Usage :
34 * Since PSCs can have multiple function, the correct driver for each one
35 * is selected by calling mpc52xx_match_psc_function(...). The function
36 * handled by this driver is "uart".
38 * The driver init all necessary registers to place the PSC in uart mode without
39 * DCD. However, the pin multiplexing aren't changed and should be set either
40 * by the bootloader or in the platform init code.
42 * The idx field must be equal to the PSC index (e.g. 0 for PSC1, 1 for PSC2,
43 * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
44 * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
45 * fpr the console code : without this 1:1 mapping, at early boot time, when we
46 * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it
50 /* OF Platform device Usage :
52 * This driver is only used for PSCs configured in uart mode. The device
53 * tree will have a node for each PSC in uart mode w/ device_type = "serial"
54 * and "mpc52xx-psc-uart" in the compatible string
56 * By default, PSC devices are enumerated in the order they are found. However
57 * a particular PSC number can be forces by adding 'device_no = <port#>'
60 * The driver init all necessary registers to place the PSC in uart mode without
61 * DCD. However, the pin multiplexing aren't changed and should be set either
62 * by the bootloader or in the platform init code.
67 #include <linux/device.h>
68 #include <linux/module.h>
69 #include <linux/tty.h>
70 #include <linux/serial.h>
71 #include <linux/sysrq.h>
72 #include <linux/console.h>
73 #include <linux/delay.h>
76 #if defined(CONFIG_PPC_MERGE)
78 #include <linux/of_platform.h>
80 #include <linux/platform_device.h>
83 #include <asm/mpc52xx.h>
84 #include <asm/mpc512x.h>
85 #include <asm/mpc52xx_psc.h>
87 #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
91 #include <linux/serial_core.h>
94 /* We've been assigned a range on the "Low-density serial ports" major */
95 #define SERIAL_PSC_MAJOR 204
96 #define SERIAL_PSC_MINOR 148
99 #define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */
102 static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
103 /* Rem: - We use the read_status_mask as a shadow of
104 * psc->mpc52xx_psc_imr
105 * - It's important that is array is all zero on start as we
106 * use it to know if it's initialized or not ! If it's not sure
107 * it's cleared, then a memset(...,0,...) should be added to
110 #if defined(CONFIG_PPC_MERGE)
111 /* lookup table for matching device nodes to index numbers */
112 static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM];
114 static void mpc52xx_uart_of_enumerate(void);
118 #define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
121 /* Forward declaration of the interruption handling routine */
122 static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id);
125 /* Simple macro to test if a port is console or not. This one is taken
126 * for serial_core.c and maybe should be moved to serial_core.h ? */
127 #ifdef CONFIG_SERIAL_CORE_CONSOLE
128 #define uart_console(port) \
129 ((port)->cons && (port)->cons->index == (port)->line)
131 #define uart_console(port) (0)
134 #if defined(CONFIG_PPC_MERGE)
135 static struct of_device_id mpc52xx_uart_of_match[] = {
136 #ifdef CONFIG_PPC_MPC52xx
137 { .compatible = "fsl,mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
138 /* binding used by old lite5200 device trees: */
139 { .compatible = "mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
140 /* binding used by efika: */
141 { .compatible = "mpc5200-serial", .data = &mpc52xx_psc_ops, },
143 #ifdef CONFIG_PPC_MPC512x
144 { .compatible = "fsl,mpc5121-psc-uart", .data = &mpc512x_psc_ops, },
148 #if defined(CONFIG_PPC_MERGE)
149 static const struct of_device_id mpc52xx_uart_of_match[] = {
151 .compatible = "mpc5200-psc-uart",
159 /* ======================================================================== */
160 /* PSC fifo operations for isolating differences between 52xx and 512x */
161 /* ======================================================================== */
164 void (*fifo_init)(struct uart_port *port);
165 int (*raw_rx_rdy)(struct uart_port *port);
166 int (*raw_tx_rdy)(struct uart_port *port);
167 int (*rx_rdy)(struct uart_port *port);
168 int (*tx_rdy)(struct uart_port *port);
169 int (*tx_empty)(struct uart_port *port);
170 void (*stop_rx)(struct uart_port *port);
171 void (*start_tx)(struct uart_port *port);
172 void (*stop_tx)(struct uart_port *port);
173 void (*rx_clr_irq)(struct uart_port *port);
174 void (*tx_clr_irq)(struct uart_port *port);
175 void (*write_char)(struct uart_port *port, unsigned char c);
176 unsigned char (*read_char)(struct uart_port *port);
177 void (*cw_disable_ints)(struct uart_port *port);
178 void (*cw_restore_ints)(struct uart_port *port);
179 unsigned long (*getuartclk)(void *p);
182 #ifdef CONFIG_PPC_MPC52xx
183 #define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
184 static void mpc52xx_psc_fifo_init(struct uart_port *port)
186 struct mpc52xx_psc __iomem *psc = PSC(port);
187 struct mpc52xx_psc_fifo __iomem *fifo = FIFO_52xx(port);
190 out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00);
192 out_8(&fifo->rfcntl, 0x00);
193 out_be16(&fifo->rfalarm, 0x1ff);
194 out_8(&fifo->tfcntl, 0x07);
195 out_be16(&fifo->tfalarm, 0x80);
197 port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
198 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
201 static int mpc52xx_psc_raw_rx_rdy(struct uart_port *port)
203 return in_be16(&PSC(port)->mpc52xx_psc_status)
204 & MPC52xx_PSC_SR_RXRDY;
207 static int mpc52xx_psc_raw_tx_rdy(struct uart_port *port)
209 return in_be16(&PSC(port)->mpc52xx_psc_status)
210 & MPC52xx_PSC_SR_TXRDY;
214 static int mpc52xx_psc_rx_rdy(struct uart_port *port)
216 return in_be16(&PSC(port)->mpc52xx_psc_isr)
217 & port->read_status_mask
218 & MPC52xx_PSC_IMR_RXRDY;
221 static int mpc52xx_psc_tx_rdy(struct uart_port *port)
223 return in_be16(&PSC(port)->mpc52xx_psc_isr)
224 & port->read_status_mask
225 & MPC52xx_PSC_IMR_TXRDY;
228 static int mpc52xx_psc_tx_empty(struct uart_port *port)
230 return in_be16(&PSC(port)->mpc52xx_psc_status)
231 & MPC52xx_PSC_SR_TXEMP;
234 static void mpc52xx_psc_start_tx(struct uart_port *port)
236 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
237 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
240 static void mpc52xx_psc_stop_tx(struct uart_port *port)
242 port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
243 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
246 static void mpc52xx_psc_stop_rx(struct uart_port *port)
248 port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
249 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
252 static void mpc52xx_psc_rx_clr_irq(struct uart_port *port)
256 static void mpc52xx_psc_tx_clr_irq(struct uart_port *port)
260 static void mpc52xx_psc_write_char(struct uart_port *port, unsigned char c)
262 out_8(&PSC(port)->mpc52xx_psc_buffer_8, c);
265 static unsigned char mpc52xx_psc_read_char(struct uart_port *port)
267 return in_8(&PSC(port)->mpc52xx_psc_buffer_8);
270 static void mpc52xx_psc_cw_disable_ints(struct uart_port *port)
272 out_be16(&PSC(port)->mpc52xx_psc_imr, 0);
275 static void mpc52xx_psc_cw_restore_ints(struct uart_port *port)
277 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
280 /* Search for bus-frequency property in this node or a parent */
281 static unsigned long mpc52xx_getuartclk(void *p)
283 #if defined(CONFIG_PPC_MERGE)
285 * 5200 UARTs have a / 32 prescaler
286 * but the generic serial code assumes 16
287 * so return ipb freq / 2
289 return mpc52xx_find_ipb_freq(p) / 2;
291 pr_debug("unexpected call to mpc52xx_getuartclk with arch/ppc\n");
296 static struct psc_ops mpc52xx_psc_ops = {
297 .fifo_init = mpc52xx_psc_fifo_init,
298 .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy,
299 .raw_tx_rdy = mpc52xx_psc_raw_tx_rdy,
300 .rx_rdy = mpc52xx_psc_rx_rdy,
301 .tx_rdy = mpc52xx_psc_tx_rdy,
302 .tx_empty = mpc52xx_psc_tx_empty,
303 .stop_rx = mpc52xx_psc_stop_rx,
304 .start_tx = mpc52xx_psc_start_tx,
305 .stop_tx = mpc52xx_psc_stop_tx,
306 .rx_clr_irq = mpc52xx_psc_rx_clr_irq,
307 .tx_clr_irq = mpc52xx_psc_tx_clr_irq,
308 .write_char = mpc52xx_psc_write_char,
309 .read_char = mpc52xx_psc_read_char,
310 .cw_disable_ints = mpc52xx_psc_cw_disable_ints,
311 .cw_restore_ints = mpc52xx_psc_cw_restore_ints,
312 .getuartclk = mpc52xx_getuartclk,
315 #endif /* CONFIG_MPC52xx */
317 #ifdef CONFIG_PPC_MPC512x
318 #define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1))
319 static void mpc512x_psc_fifo_init(struct uart_port *port)
321 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE);
322 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
323 out_be32(&FIFO_512x(port)->txalarm, 1);
324 out_be32(&FIFO_512x(port)->tximr, 0);
326 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE);
327 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
328 out_be32(&FIFO_512x(port)->rxalarm, 1);
329 out_be32(&FIFO_512x(port)->rximr, 0);
331 out_be32(&FIFO_512x(port)->tximr, MPC512x_PSC_FIFO_ALARM);
332 out_be32(&FIFO_512x(port)->rximr, MPC512x_PSC_FIFO_ALARM);
335 static int mpc512x_psc_raw_rx_rdy(struct uart_port *port)
337 return !(in_be32(&FIFO_512x(port)->rxsr) & MPC512x_PSC_FIFO_EMPTY);
340 static int mpc512x_psc_raw_tx_rdy(struct uart_port *port)
342 return !(in_be32(&FIFO_512x(port)->txsr) & MPC512x_PSC_FIFO_FULL);
345 static int mpc512x_psc_rx_rdy(struct uart_port *port)
347 return in_be32(&FIFO_512x(port)->rxsr)
348 & in_be32(&FIFO_512x(port)->rximr)
349 & MPC512x_PSC_FIFO_ALARM;
352 static int mpc512x_psc_tx_rdy(struct uart_port *port)
354 return in_be32(&FIFO_512x(port)->txsr)
355 & in_be32(&FIFO_512x(port)->tximr)
356 & MPC512x_PSC_FIFO_ALARM;
359 static int mpc512x_psc_tx_empty(struct uart_port *port)
361 return in_be32(&FIFO_512x(port)->txsr)
362 & MPC512x_PSC_FIFO_EMPTY;
365 static void mpc512x_psc_stop_rx(struct uart_port *port)
367 unsigned long rx_fifo_imr;
369 rx_fifo_imr = in_be32(&FIFO_512x(port)->rximr);
370 rx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
371 out_be32(&FIFO_512x(port)->rximr, rx_fifo_imr);
374 static void mpc512x_psc_start_tx(struct uart_port *port)
376 unsigned long tx_fifo_imr;
378 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
379 tx_fifo_imr |= MPC512x_PSC_FIFO_ALARM;
380 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
383 static void mpc512x_psc_stop_tx(struct uart_port *port)
385 unsigned long tx_fifo_imr;
387 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
388 tx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
389 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
392 static void mpc512x_psc_rx_clr_irq(struct uart_port *port)
394 out_be32(&FIFO_512x(port)->rxisr, in_be32(&FIFO_512x(port)->rxisr));
397 static void mpc512x_psc_tx_clr_irq(struct uart_port *port)
399 out_be32(&FIFO_512x(port)->txisr, in_be32(&FIFO_512x(port)->txisr));
402 static void mpc512x_psc_write_char(struct uart_port *port, unsigned char c)
404 out_8(&FIFO_512x(port)->txdata_8, c);
407 static unsigned char mpc512x_psc_read_char(struct uart_port *port)
409 return in_8(&FIFO_512x(port)->rxdata_8);
412 static void mpc512x_psc_cw_disable_ints(struct uart_port *port)
414 port->read_status_mask =
415 in_be32(&FIFO_512x(port)->tximr) << 16 |
416 in_be32(&FIFO_512x(port)->rximr);
417 out_be32(&FIFO_512x(port)->tximr, 0);
418 out_be32(&FIFO_512x(port)->rximr, 0);
421 static void mpc512x_psc_cw_restore_ints(struct uart_port *port)
423 out_be32(&FIFO_512x(port)->tximr,
424 (port->read_status_mask >> 16) & 0x7f);
425 out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f);
428 static unsigned long mpc512x_getuartclk(void *p)
430 return mpc512x_find_ips_freq(p);
433 static struct psc_ops mpc512x_psc_ops = {
434 .fifo_init = mpc512x_psc_fifo_init,
435 .raw_rx_rdy = mpc512x_psc_raw_rx_rdy,
436 .raw_tx_rdy = mpc512x_psc_raw_tx_rdy,
437 .rx_rdy = mpc512x_psc_rx_rdy,
438 .tx_rdy = mpc512x_psc_tx_rdy,
439 .tx_empty = mpc512x_psc_tx_empty,
440 .stop_rx = mpc512x_psc_stop_rx,
441 .start_tx = mpc512x_psc_start_tx,
442 .stop_tx = mpc512x_psc_stop_tx,
443 .rx_clr_irq = mpc512x_psc_rx_clr_irq,
444 .tx_clr_irq = mpc512x_psc_tx_clr_irq,
445 .write_char = mpc512x_psc_write_char,
446 .read_char = mpc512x_psc_read_char,
447 .cw_disable_ints = mpc512x_psc_cw_disable_ints,
448 .cw_restore_ints = mpc512x_psc_cw_restore_ints,
449 .getuartclk = mpc512x_getuartclk,
453 static struct psc_ops *psc_ops;
455 /* ======================================================================== */
456 /* UART operations */
457 /* ======================================================================== */
460 mpc52xx_uart_tx_empty(struct uart_port *port)
462 return psc_ops->tx_empty(port) ? TIOCSER_TEMT : 0;
466 mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
468 /* Not implemented */
472 mpc52xx_uart_get_mctrl(struct uart_port *port)
474 /* Not implemented */
475 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
479 mpc52xx_uart_stop_tx(struct uart_port *port)
481 /* port->lock taken by caller */
482 psc_ops->stop_tx(port);
486 mpc52xx_uart_start_tx(struct uart_port *port)
488 /* port->lock taken by caller */
489 psc_ops->start_tx(port);
493 mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
496 spin_lock_irqsave(&port->lock, flags);
500 /* Make sure tx interrupts are on */
501 /* Truly necessary ??? They should be anyway */
502 psc_ops->start_tx(port);
505 spin_unlock_irqrestore(&port->lock, flags);
509 mpc52xx_uart_stop_rx(struct uart_port *port)
511 /* port->lock taken by caller */
512 psc_ops->stop_rx(port);
516 mpc52xx_uart_enable_ms(struct uart_port *port)
518 /* Not implemented */
522 mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
525 spin_lock_irqsave(&port->lock, flags);
528 out_8(&PSC(port)->command, MPC52xx_PSC_START_BRK);
530 out_8(&PSC(port)->command, MPC52xx_PSC_STOP_BRK);
532 spin_unlock_irqrestore(&port->lock, flags);
536 mpc52xx_uart_startup(struct uart_port *port)
538 struct mpc52xx_psc __iomem *psc = PSC(port);
542 ret = request_irq(port->irq, mpc52xx_uart_int,
543 IRQF_DISABLED | IRQF_SAMPLE_RANDOM | IRQF_SHARED,
544 "mpc52xx_psc_uart", port);
548 /* Reset/activate the port, clear and enable interrupts */
549 out_8(&psc->command, MPC52xx_PSC_RST_RX);
550 out_8(&psc->command, MPC52xx_PSC_RST_TX);
552 out_be32(&psc->sicr, 0); /* UART mode DCD ignored */
554 psc_ops->fifo_init(port);
556 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
557 out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
563 mpc52xx_uart_shutdown(struct uart_port *port)
565 struct mpc52xx_psc __iomem *psc = PSC(port);
567 /* Shut down the port. Leave TX active if on a console port */
568 out_8(&psc->command, MPC52xx_PSC_RST_RX);
569 if (!uart_console(port))
570 out_8(&psc->command, MPC52xx_PSC_RST_TX);
572 port->read_status_mask = 0;
573 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
575 /* Release interrupt */
576 free_irq(port->irq, port);
580 mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
581 struct ktermios *old)
583 struct mpc52xx_psc __iomem *psc = PSC(port);
585 unsigned char mr1, mr2;
587 unsigned int j, baud, quot;
589 /* Prepare what we're gonna write */
592 switch (new->c_cflag & CSIZE) {
593 case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
595 case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS;
597 case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS;
600 default: mr1 |= MPC52xx_PSC_MODE_8_BITS;
603 if (new->c_cflag & PARENB) {
604 mr1 |= (new->c_cflag & PARODD) ?
605 MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
607 mr1 |= MPC52xx_PSC_MODE_PARNONE;
612 if (new->c_cflag & CSTOPB)
613 mr2 |= MPC52xx_PSC_MODE_TWO_STOP;
615 mr2 |= ((new->c_cflag & CSIZE) == CS5) ?
616 MPC52xx_PSC_MODE_ONE_STOP_5_BITS :
617 MPC52xx_PSC_MODE_ONE_STOP;
620 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
621 quot = uart_get_divisor(port, baud);
625 spin_lock_irqsave(&port->lock, flags);
627 /* Update the per-port timeout */
628 uart_update_timeout(port, new->c_cflag, baud);
630 /* Do our best to flush TX & RX, so we don't loose anything */
631 /* But we don't wait indefinitly ! */
632 j = 5000000; /* Maximum wait */
633 /* FIXME Can't receive chars since set_termios might be called at early
634 * boot for the console, all stuff is not yet ready to receive at that
635 * time and that just makes the kernel oops */
636 /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
637 while (!mpc52xx_uart_tx_empty(port) && --j)
641 printk(KERN_ERR "mpc52xx_uart.c: "
642 "Unable to flush RX & TX fifos in-time in set_termios."
643 "Some chars may have been lost.\n");
645 /* Reset the TX & RX */
646 out_8(&psc->command, MPC52xx_PSC_RST_RX);
647 out_8(&psc->command, MPC52xx_PSC_RST_TX);
649 /* Send new mode settings */
650 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
651 out_8(&psc->mode, mr1);
652 out_8(&psc->mode, mr2);
653 out_8(&psc->ctur, ctr >> 8);
654 out_8(&psc->ctlr, ctr & 0xff);
656 /* Reenable TX & RX */
657 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
658 out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
660 /* We're all set, release the lock */
661 spin_unlock_irqrestore(&port->lock, flags);
665 mpc52xx_uart_type(struct uart_port *port)
667 return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL;
671 mpc52xx_uart_release_port(struct uart_port *port)
673 /* remapped by us ? */
674 if (port->flags & UPF_IOREMAP) {
675 iounmap(port->membase);
676 port->membase = NULL;
679 release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc));
683 mpc52xx_uart_request_port(struct uart_port *port)
687 if (port->flags & UPF_IOREMAP) /* Need to remap ? */
688 port->membase = ioremap(port->mapbase,
689 sizeof(struct mpc52xx_psc));
694 err = request_mem_region(port->mapbase, sizeof(struct mpc52xx_psc),
695 "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
697 if (err && (port->flags & UPF_IOREMAP)) {
698 iounmap(port->membase);
699 port->membase = NULL;
706 mpc52xx_uart_config_port(struct uart_port *port, int flags)
708 if ((flags & UART_CONFIG_TYPE)
709 && (mpc52xx_uart_request_port(port) == 0))
710 port->type = PORT_MPC52xx;
714 mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
716 if (ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx)
719 if ((ser->irq != port->irq) ||
720 (ser->io_type != SERIAL_IO_MEM) ||
721 (ser->baud_base != port->uartclk) ||
722 (ser->iomem_base != (void *)port->mapbase) ||
730 static struct uart_ops mpc52xx_uart_ops = {
731 .tx_empty = mpc52xx_uart_tx_empty,
732 .set_mctrl = mpc52xx_uart_set_mctrl,
733 .get_mctrl = mpc52xx_uart_get_mctrl,
734 .stop_tx = mpc52xx_uart_stop_tx,
735 .start_tx = mpc52xx_uart_start_tx,
736 .send_xchar = mpc52xx_uart_send_xchar,
737 .stop_rx = mpc52xx_uart_stop_rx,
738 .enable_ms = mpc52xx_uart_enable_ms,
739 .break_ctl = mpc52xx_uart_break_ctl,
740 .startup = mpc52xx_uart_startup,
741 .shutdown = mpc52xx_uart_shutdown,
742 .set_termios = mpc52xx_uart_set_termios,
743 /* .pm = mpc52xx_uart_pm, Not supported yet */
744 /* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
745 .type = mpc52xx_uart_type,
746 .release_port = mpc52xx_uart_release_port,
747 .request_port = mpc52xx_uart_request_port,
748 .config_port = mpc52xx_uart_config_port,
749 .verify_port = mpc52xx_uart_verify_port
753 /* ======================================================================== */
754 /* Interrupt handling */
755 /* ======================================================================== */
758 mpc52xx_uart_int_rx_chars(struct uart_port *port)
760 struct tty_struct *tty = port->info->tty;
761 unsigned char ch, flag;
762 unsigned short status;
764 /* While we can read, do so ! */
765 while (psc_ops->raw_rx_rdy(port)) {
767 ch = psc_ops->read_char(port);
769 /* Handle sysreq char */
771 if (uart_handle_sysrq_char(port, ch)) {
782 status = in_be16(&PSC(port)->mpc52xx_psc_status);
784 if (status & (MPC52xx_PSC_SR_PE |
786 MPC52xx_PSC_SR_RB)) {
788 if (status & MPC52xx_PSC_SR_RB) {
790 uart_handle_break(port);
791 } else if (status & MPC52xx_PSC_SR_PE)
793 else if (status & MPC52xx_PSC_SR_FE)
796 /* Clear error condition */
797 out_8(&PSC(port)->command, MPC52xx_PSC_RST_ERR_STAT);
800 tty_insert_flip_char(tty, ch, flag);
801 if (status & MPC52xx_PSC_SR_OE) {
803 * Overrun is special, since it's
804 * reported immediately, and doesn't
805 * affect the current character
807 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
811 tty_flip_buffer_push(tty);
813 return psc_ops->raw_rx_rdy(port);
817 mpc52xx_uart_int_tx_chars(struct uart_port *port)
819 struct circ_buf *xmit = &port->info->xmit;
821 /* Process out of band chars */
823 psc_ops->write_char(port, port->x_char);
829 /* Nothing to do ? */
830 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
831 mpc52xx_uart_stop_tx(port);
836 while (psc_ops->raw_tx_rdy(port)) {
837 psc_ops->write_char(port, xmit->buf[xmit->tail]);
838 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
840 if (uart_circ_empty(xmit))
845 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
846 uart_write_wakeup(port);
848 /* Maybe we're done after all */
849 if (uart_circ_empty(xmit)) {
850 mpc52xx_uart_stop_tx(port);
858 mpc52xx_uart_int(int irq, void *dev_id)
860 struct uart_port *port = dev_id;
861 unsigned long pass = ISR_PASS_LIMIT;
862 unsigned int keepgoing;
864 spin_lock(&port->lock);
866 /* While we have stuff to do, we continue */
868 /* If we don't find anything to do, we stop */
871 psc_ops->rx_clr_irq(port);
872 if (psc_ops->rx_rdy(port))
873 keepgoing |= mpc52xx_uart_int_rx_chars(port);
875 psc_ops->tx_clr_irq(port);
876 if (psc_ops->tx_rdy(port))
877 keepgoing |= mpc52xx_uart_int_tx_chars(port);
879 /* Limit number of iteration */
885 spin_unlock(&port->lock);
891 /* ======================================================================== */
892 /* Console ( if applicable ) */
893 /* ======================================================================== */
895 #ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
898 mpc52xx_console_get_options(struct uart_port *port,
899 int *baud, int *parity, int *bits, int *flow)
901 struct mpc52xx_psc __iomem *psc = PSC(port);
904 pr_debug("mpc52xx_console_get_options(port=%p)\n", port);
906 /* Read the mode registers */
907 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
908 mr1 = in_8(&psc->mode);
910 /* CT{U,L}R are write-only ! */
911 *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
912 #if !defined(CONFIG_PPC_MERGE)
913 if (__res.bi_baudrate)
914 *baud = __res.bi_baudrate;
918 switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
919 case MPC52xx_PSC_MODE_5_BITS:
922 case MPC52xx_PSC_MODE_6_BITS:
925 case MPC52xx_PSC_MODE_7_BITS:
928 case MPC52xx_PSC_MODE_8_BITS:
933 if (mr1 & MPC52xx_PSC_MODE_PARNONE)
936 *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
940 mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
942 struct uart_port *port = &mpc52xx_uart_ports[co->index];
945 /* Disable interrupts */
946 psc_ops->cw_disable_ints(port);
948 /* Wait the TX buffer to be empty */
949 j = 5000000; /* Maximum wait */
950 while (!mpc52xx_uart_tx_empty(port) && --j)
953 /* Write all the chars */
954 for (i = 0; i < count; i++, s++) {
955 /* Line return handling */
957 psc_ops->write_char(port, '\r');
960 psc_ops->write_char(port, *s);
962 /* Wait the TX buffer to be empty */
963 j = 20000; /* Maximum wait */
964 while (!mpc52xx_uart_tx_empty(port) && --j)
968 /* Restore interrupt state */
969 psc_ops->cw_restore_ints(port);
972 #if !defined(CONFIG_PPC_MERGE)
974 mpc52xx_console_setup(struct console *co, char *options)
976 struct uart_port *port = &mpc52xx_uart_ports[co->index];
978 int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
983 if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM)
986 /* Basic port init. Needed since we use some uart_??? func before
987 * real init for early access */
988 spin_lock_init(&port->lock);
989 port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
990 port->ops = &mpc52xx_uart_ops;
991 port->mapbase = MPC52xx_PA(MPC52xx_PSCx_OFFSET(co->index+1));
993 /* We ioremap ourself */
994 port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE);
995 if (port->membase == NULL)
998 /* Setup the port parameters accoding to options */
1000 uart_parse_options(options, &baud, &parity, &bits, &flow);
1002 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
1004 return uart_set_options(port, co, baud, parity, bits, flow);
1010 mpc52xx_console_setup(struct console *co, char *options)
1012 struct uart_port *port = &mpc52xx_uart_ports[co->index];
1013 struct device_node *np = mpc52xx_uart_nodes[co->index];
1014 unsigned int uartclk;
1015 struct resource res;
1018 int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
1023 pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n",
1024 co, co->index, options);
1026 if ((co->index < 0) || (co->index > MPC52xx_PSC_MAXNUM)) {
1027 pr_debug("PSC%x out of range\n", co->index);
1032 pr_debug("PSC%x not found in device tree\n", co->index);
1036 pr_debug("Console on ttyPSC%x is %s\n",
1037 co->index, mpc52xx_uart_nodes[co->index]->full_name);
1039 /* Fetch register locations */
1040 ret = of_address_to_resource(np, 0, &res);
1042 pr_debug("Could not get resources for PSC%x\n", co->index);
1046 uartclk = psc_ops->getuartclk(np);
1048 pr_debug("Could not find uart clock frequency!\n");
1052 /* Basic port init. Needed since we use some uart_??? func before
1053 * real init for early access */
1054 spin_lock_init(&port->lock);
1055 port->uartclk = uartclk;
1056 port->ops = &mpc52xx_uart_ops;
1057 port->mapbase = res.start;
1058 port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
1059 port->irq = irq_of_parse_and_map(np, 0);
1061 if (port->membase == NULL)
1064 pr_debug("mpc52xx-psc uart at %p, mapped to %p, irq=%x, freq=%i\n",
1065 (void *)port->mapbase, port->membase,
1066 port->irq, port->uartclk);
1068 /* Setup the port parameters accoding to options */
1070 uart_parse_options(options, &baud, &parity, &bits, &flow);
1072 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
1074 pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
1075 baud, bits, parity, flow);
1077 return uart_set_options(port, co, baud, parity, bits, flow);
1079 #endif /* defined(CONFIG_PPC_MERGE) */
1082 static struct uart_driver mpc52xx_uart_driver;
1084 static struct console mpc52xx_console = {
1086 .write = mpc52xx_console_write,
1087 .device = uart_console_device,
1088 .setup = mpc52xx_console_setup,
1089 .flags = CON_PRINTBUFFER,
1090 .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0) */
1091 .data = &mpc52xx_uart_driver,
1096 mpc52xx_console_init(void)
1098 #if defined(CONFIG_PPC_MERGE)
1099 mpc52xx_uart_of_enumerate();
1101 register_console(&mpc52xx_console);
1105 console_initcall(mpc52xx_console_init);
1107 #define MPC52xx_PSC_CONSOLE &mpc52xx_console
1109 #define MPC52xx_PSC_CONSOLE NULL
1113 /* ======================================================================== */
1115 /* ======================================================================== */
1117 static struct uart_driver mpc52xx_uart_driver = {
1118 .driver_name = "mpc52xx_psc_uart",
1119 .dev_name = "ttyPSC",
1120 .major = SERIAL_PSC_MAJOR,
1121 .minor = SERIAL_PSC_MINOR,
1122 .nr = MPC52xx_PSC_MAXNUM,
1123 .cons = MPC52xx_PSC_CONSOLE,
1127 #if !defined(CONFIG_PPC_MERGE)
1128 /* ======================================================================== */
1129 /* Platform Driver */
1130 /* ======================================================================== */
1132 static int __devinit
1133 mpc52xx_uart_probe(struct platform_device *dev)
1135 struct resource *res = dev->resource;
1137 struct uart_port *port = NULL;
1140 /* Check validity & presence */
1142 if (idx < 0 || idx >= MPC52xx_PSC_MAXNUM)
1145 if (!mpc52xx_match_psc_function(idx, "uart"))
1148 /* Init the port structure */
1149 port = &mpc52xx_uart_ports[idx];
1151 spin_lock_init(&port->lock);
1152 port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
1153 port->fifosize = 512;
1154 port->iotype = UPIO_MEM;
1155 port->flags = UPF_BOOT_AUTOCONF |
1156 (uart_console(port) ? 0 : UPF_IOREMAP);
1158 port->ops = &mpc52xx_uart_ops;
1159 port->dev = &dev->dev;
1161 /* Search for IRQ and mapbase */
1162 for (i = 0 ; i < dev->num_resources ; i++, res++) {
1163 if (res->flags & IORESOURCE_MEM)
1164 port->mapbase = res->start;
1165 else if (res->flags & IORESOURCE_IRQ)
1166 port->irq = res->start;
1168 if (!port->irq || !port->mapbase)
1171 /* Add the port to the uart sub-system */
1172 ret = uart_add_one_port(&mpc52xx_uart_driver, port);
1174 platform_set_drvdata(dev, (void *)port);
1180 mpc52xx_uart_remove(struct platform_device *dev)
1182 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
1184 platform_set_drvdata(dev, NULL);
1187 uart_remove_one_port(&mpc52xx_uart_driver, port);
1194 mpc52xx_uart_suspend(struct platform_device *dev, pm_message_t state)
1196 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
1199 uart_suspend_port(&mpc52xx_uart_driver, port);
1205 mpc52xx_uart_resume(struct platform_device *dev)
1207 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
1210 uart_resume_port(&mpc52xx_uart_driver, port);
1217 static struct platform_driver mpc52xx_uart_platform_driver = {
1218 .probe = mpc52xx_uart_probe,
1219 .remove = mpc52xx_uart_remove,
1221 .suspend = mpc52xx_uart_suspend,
1222 .resume = mpc52xx_uart_resume,
1225 .owner = THIS_MODULE,
1226 .name = "mpc52xx-psc",
1229 #endif /* !defined(CONFIG_PPC_MERGE) */
1232 #if defined(CONFIG_PPC_MERGE)
1233 /* ======================================================================== */
1234 /* OF Platform Driver */
1235 /* ======================================================================== */
1237 static int __devinit
1238 mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
1241 unsigned int uartclk;
1242 struct uart_port *port = NULL;
1243 struct resource res;
1246 dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match);
1248 /* Check validity & presence */
1249 for (idx = 0; idx < MPC52xx_PSC_MAXNUM; idx++)
1250 if (mpc52xx_uart_nodes[idx] == op->node)
1252 if (idx >= MPC52xx_PSC_MAXNUM)
1254 pr_debug("Found %s assigned to ttyPSC%x\n",
1255 mpc52xx_uart_nodes[idx]->full_name, idx);
1257 uartclk = psc_ops->getuartclk(op->node);
1259 dev_dbg(&op->dev, "Could not find uart clock frequency!\n");
1263 /* Init the port structure */
1264 port = &mpc52xx_uart_ports[idx];
1266 spin_lock_init(&port->lock);
1267 port->uartclk = uartclk;
1268 port->fifosize = 512;
1269 port->iotype = UPIO_MEM;
1270 port->flags = UPF_BOOT_AUTOCONF |
1271 (uart_console(port) ? 0 : UPF_IOREMAP);
1273 port->ops = &mpc52xx_uart_ops;
1274 port->dev = &op->dev;
1276 /* Search for IRQ and mapbase */
1277 ret = of_address_to_resource(op->node, 0, &res);
1281 port->mapbase = res.start;
1282 port->irq = irq_of_parse_and_map(op->node, 0);
1284 dev_dbg(&op->dev, "mpc52xx-psc uart at %p, irq=%x, freq=%i\n",
1285 (void *)port->mapbase, port->irq, port->uartclk);
1287 if ((port->irq == NO_IRQ) || !port->mapbase) {
1288 printk(KERN_ERR "Could not allocate resources for PSC\n");
1292 /* Add the port to the uart sub-system */
1293 ret = uart_add_one_port(&mpc52xx_uart_driver, port);
1295 dev_set_drvdata(&op->dev, (void *)port);
1301 mpc52xx_uart_of_remove(struct of_device *op)
1303 struct uart_port *port = dev_get_drvdata(&op->dev);
1304 dev_set_drvdata(&op->dev, NULL);
1307 uart_remove_one_port(&mpc52xx_uart_driver, port);
1308 irq_dispose_mapping(port->irq);
1316 mpc52xx_uart_of_suspend(struct of_device *op, pm_message_t state)
1318 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1321 uart_suspend_port(&mpc52xx_uart_driver, port);
1327 mpc52xx_uart_of_resume(struct of_device *op)
1329 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1332 uart_resume_port(&mpc52xx_uart_driver, port);
1339 mpc52xx_uart_of_assign(struct device_node *np, int idx)
1344 /* Find the first free node */
1345 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1346 if (mpc52xx_uart_nodes[i] == NULL) {
1352 if ((idx < 0) || (idx >= MPC52xx_PSC_MAXNUM))
1356 return; /* No free slot; abort */
1359 /* If the slot is already occupied, then swap slots */
1360 if (mpc52xx_uart_nodes[idx] && (free_idx != -1))
1361 mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx];
1362 mpc52xx_uart_nodes[idx] = np;
1366 mpc52xx_uart_of_enumerate(void)
1368 static int enum_done;
1369 struct device_node *np;
1370 const unsigned int *devno;
1371 const struct of_device_id *match;
1377 for_each_node_by_type(np, "serial") {
1378 match = of_match_node(mpc52xx_uart_of_match, np);
1382 psc_ops = match->data;
1384 /* Is a particular device number requested? */
1385 devno = of_get_property(np, "port-number", NULL);
1386 mpc52xx_uart_of_assign(np, devno ? *devno : -1);
1391 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1392 if (mpc52xx_uart_nodes[i])
1393 pr_debug("%s assigned to ttyPSC%x\n",
1394 mpc52xx_uart_nodes[i]->full_name, i);
1398 MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match);
1400 static struct of_platform_driver mpc52xx_uart_of_driver = {
1401 .match_table = mpc52xx_uart_of_match,
1402 .probe = mpc52xx_uart_of_probe,
1403 .remove = mpc52xx_uart_of_remove,
1405 .suspend = mpc52xx_uart_of_suspend,
1406 .resume = mpc52xx_uart_of_resume,
1409 .name = "mpc52xx-psc-uart",
1412 #endif /* defined(CONFIG_PPC_MERGE) */
1415 /* ======================================================================== */
1417 /* ======================================================================== */
1420 mpc52xx_uart_init(void)
1424 printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n");
1426 ret = uart_register_driver(&mpc52xx_uart_driver);
1428 printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
1433 #if defined(CONFIG_PPC_MERGE)
1434 mpc52xx_uart_of_enumerate();
1436 ret = of_register_platform_driver(&mpc52xx_uart_of_driver);
1438 printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n",
1440 uart_unregister_driver(&mpc52xx_uart_driver);
1444 psc_ops = &mpc52xx_psc_ops;
1445 ret = platform_driver_register(&mpc52xx_uart_platform_driver);
1447 printk(KERN_ERR "%s: platform_driver_register failed (%i)\n",
1449 uart_unregister_driver(&mpc52xx_uart_driver);
1458 mpc52xx_uart_exit(void)
1460 #if defined(CONFIG_PPC_MERGE)
1461 of_unregister_platform_driver(&mpc52xx_uart_of_driver);
1463 platform_driver_unregister(&mpc52xx_uart_platform_driver);
1465 uart_unregister_driver(&mpc52xx_uart_driver);
1469 module_init(mpc52xx_uart_init);
1470 module_exit(mpc52xx_uart_exit);
1472 MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
1473 MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
1474 MODULE_LICENSE("GPL");