2 * Blackfin On-Chip Serial Driver
4 * Copyright 2006-2007 Analog Devices Inc.
6 * Enter bugs at http://blackfin.uclinux.org/
8 * Licensed under the GPL-2 or later.
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/init.h>
18 #include <linux/console.h>
19 #include <linux/sysrq.h>
20 #include <linux/platform_device.h>
21 #include <linux/tty.h>
22 #include <linux/tty_flip.h>
23 #include <linux/serial_core.h>
25 #ifdef CONFIG_KGDB_UART
26 #include <linux/kgdb.h>
27 #include <asm/irq_regs.h>
31 #include <asm/mach/bfin_serial_5xx.h>
33 #ifdef CONFIG_SERIAL_BFIN_DMA
34 #include <linux/dma-mapping.h>
37 #include <asm/cacheflush.h>
40 /* UART name and device definitions */
41 #define BFIN_SERIAL_NAME "ttyBF"
42 #define BFIN_SERIAL_MAJOR 204
43 #define BFIN_SERIAL_MINOR 64
46 * Setup for console. Argument comes from the menuconfig
48 #define DMA_RX_XCOUNT 512
49 #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
51 #define DMA_RX_FLUSH_JIFFIES 5
53 #ifdef CONFIG_SERIAL_BFIN_DMA
54 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
56 static void bfin_serial_do_work(struct work_struct *work);
57 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
60 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
63 * interrupts are disabled on entry
65 static void bfin_serial_stop_tx(struct uart_port *port)
67 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
68 #if !defined(CONFIG_BF54x) && !defined(CONFIG_SERIAL_BFIN_DMA)
72 while (!(UART_GET_LSR(uart) & TEMT))
75 #ifdef CONFIG_SERIAL_BFIN_DMA
76 disable_dma(uart->tx_dma_channel);
80 UART_PUT_LSR(uart, TFI);
81 UART_CLEAR_IER(uart, ETBEI);
83 ier = UART_GET_IER(uart);
85 UART_PUT_IER(uart, ier);
91 * port is locked and interrupts are disabled
93 static void bfin_serial_start_tx(struct uart_port *port)
95 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
97 #ifdef CONFIG_SERIAL_BFIN_DMA
98 bfin_serial_dma_tx_chars(uart);
101 UART_SET_IER(uart, ETBEI);
104 ier = UART_GET_IER(uart);
106 UART_PUT_IER(uart, ier);
108 bfin_serial_tx_chars(uart);
113 * Interrupts are enabled
115 static void bfin_serial_stop_rx(struct uart_port *port)
117 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
118 #ifdef CONFIG_KGDB_UART
119 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
122 UART_CLEAR_IER(uart, ERBFI);
126 ier = UART_GET_IER(uart);
128 UART_PUT_IER(uart, ier);
130 #ifdef CONFIG_KGDB_UART
136 * Set the modem control timer to fire immediately.
138 static void bfin_serial_enable_ms(struct uart_port *port)
142 #ifdef CONFIG_KGDB_UART
143 static int kgdb_entry_state;
145 void kgdb_put_debug_char(int chr)
147 struct bfin_serial_port *uart;
149 if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
150 uart = &bfin_serial_ports[0];
152 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
154 while (!(UART_GET_LSR(uart) & THRE)) {
159 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
162 UART_PUT_CHAR(uart, (unsigned char)chr);
166 int kgdb_get_debug_char(void)
168 struct bfin_serial_port *uart;
171 if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
172 uart = &bfin_serial_ports[0];
174 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
176 while(!(UART_GET_LSR(uart) & DR)) {
180 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
183 chr = UART_GET_CHAR(uart);
190 #if ANOMALY_05000230 && defined(CONFIG_SERIAL_BFIN_PIO)
191 # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
192 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
194 # define UART_GET_ANOMALY_THRESHOLD(uart) 0
195 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
198 #ifdef CONFIG_SERIAL_BFIN_PIO
199 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
201 struct tty_struct *tty = uart->port.info->tty;
202 unsigned int status, ch, flg;
203 static struct timeval anomaly_start = { .tv_sec = 0 };
204 #ifdef CONFIG_KGDB_UART
205 struct pt_regs *regs = get_irq_regs();
208 status = UART_GET_LSR(uart);
209 UART_CLEAR_LSR(uart);
211 ch = UART_GET_CHAR(uart);
212 uart->port.icount.rx++;
214 #ifdef CONFIG_KGDB_UART
215 if (uart->port.line == CONFIG_KGDB_UART_PORT) {
216 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
217 kgdb_breakkey_pressed(regs);
219 } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
220 kgdb_entry_state = 1;
221 } else if (kgdb_entry_state == 1 && ch == 'q') {
222 kgdb_entry_state = 0;
223 kgdb_breakkey_pressed(regs);
225 } else if (ch == 0x3) {/* Ctrl + C */
226 kgdb_entry_state = 0;
227 kgdb_breakkey_pressed(regs);
230 kgdb_entry_state = 0;
235 if (ANOMALY_05000230) {
236 /* The BF533 (and BF561) family of processors have a nice anomaly
237 * where they continuously generate characters for a "single" break.
238 * We have to basically ignore this flood until the "next" valid
239 * character comes across. Due to the nature of the flood, it is
240 * not possible to reliably catch bytes that are sent too quickly
241 * after this break. So application code talking to the Blackfin
242 * which sends a break signal must allow at least 1.5 character
243 * times after the end of the break for things to stabilize. This
244 * timeout was picked as it must absolutely be larger than 1
245 * character time +/- some percent. So 1.5 sounds good. All other
246 * Blackfin families operate properly. Woo.
247 * Note: While Anomaly 05000230 does not directly address this,
248 * the changes that went in for it also fixed this issue.
249 * That anomaly was fixed in 0.5+ silicon. I like bunnies.
251 if (anomaly_start.tv_sec) {
255 if ((~ch & (~ch + 1)) & 0xff)
256 goto known_good_char;
258 do_gettimeofday(&curr);
259 if (curr.tv_sec - anomaly_start.tv_sec > 1)
260 goto known_good_char;
263 if (curr.tv_sec != anomaly_start.tv_sec)
264 usecs += USEC_PER_SEC;
265 usecs += curr.tv_usec - anomaly_start.tv_usec;
267 if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
268 goto known_good_char;
271 anomaly_start.tv_sec = 0;
273 anomaly_start = curr;
278 anomaly_start.tv_sec = 0;
283 if (ANOMALY_05000230)
284 if (bfin_revid() < 5)
285 do_gettimeofday(&anomaly_start);
286 uart->port.icount.brk++;
287 if (uart_handle_break(&uart->port))
289 status &= ~(PE | FE);
292 uart->port.icount.parity++;
294 uart->port.icount.overrun++;
296 uart->port.icount.frame++;
298 status &= uart->port.read_status_mask;
302 else if (status & PE)
304 else if (status & FE)
309 if (uart_handle_sysrq_char(&uart->port, ch))
312 uart_insert_char(&uart->port, status, OE, ch, flg);
315 tty_flip_buffer_push(tty);
318 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
320 struct circ_buf *xmit = &uart->port.info->xmit;
322 if (uart->port.x_char) {
323 UART_PUT_CHAR(uart, uart->port.x_char);
324 uart->port.icount.tx++;
325 uart->port.x_char = 0;
328 * Check the modem control lines before
329 * transmitting anything.
331 bfin_serial_mctrl_check(uart);
333 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
334 bfin_serial_stop_tx(&uart->port);
338 while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
339 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
340 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
341 uart->port.icount.tx++;
345 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
346 uart_write_wakeup(&uart->port);
348 if (uart_circ_empty(xmit))
349 bfin_serial_stop_tx(&uart->port);
352 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
354 struct bfin_serial_port *uart = dev_id;
356 spin_lock(&uart->port.lock);
357 while (UART_GET_LSR(uart) & DR)
358 bfin_serial_rx_chars(uart);
359 spin_unlock(&uart->port.lock);
364 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
366 struct bfin_serial_port *uart = dev_id;
368 spin_lock(&uart->port.lock);
369 if (UART_GET_LSR(uart) & THRE)
370 bfin_serial_tx_chars(uart);
371 spin_unlock(&uart->port.lock);
377 static void bfin_serial_do_work(struct work_struct *work)
379 struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
381 bfin_serial_mctrl_check(uart);
385 #ifdef CONFIG_SERIAL_BFIN_DMA
386 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
388 struct circ_buf *xmit = &uart->port.info->xmit;
396 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
397 bfin_serial_stop_tx(&uart->port);
402 if (uart->port.x_char) {
403 UART_PUT_CHAR(uart, uart->port.x_char);
404 uart->port.icount.tx++;
405 uart->port.x_char = 0;
409 * Check the modem control lines before
410 * transmitting anything.
412 bfin_serial_mctrl_check(uart);
414 spin_lock_irqsave(&uart->port.lock, flags);
415 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
416 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
417 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
418 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
419 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
420 set_dma_config(uart->tx_dma_channel,
421 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
426 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
427 set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
428 set_dma_x_modify(uart->tx_dma_channel, 1);
429 enable_dma(uart->tx_dma_channel);
431 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
432 uart->port.icount.tx += uart->tx_count;
435 UART_SET_IER(uart, ETBEI);
437 ier = UART_GET_IER(uart);
439 UART_PUT_IER(uart, ier);
441 spin_unlock_irqrestore(&uart->port.lock, flags);
444 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
446 struct tty_struct *tty = uart->port.info->tty;
449 status = UART_GET_LSR(uart);
450 UART_CLEAR_LSR(uart);
452 uart->port.icount.rx += CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, UART_XMIT_SIZE);;
455 uart->port.icount.brk++;
456 if (uart_handle_break(&uart->port))
457 goto dma_ignore_char;
458 status &= ~(PE | FE);
461 uart->port.icount.parity++;
463 uart->port.icount.overrun++;
465 uart->port.icount.frame++;
467 status &= uart->port.read_status_mask;
471 else if (status & PE)
473 else if (status & FE)
478 for (i = uart->rx_dma_buf.head; i < uart->rx_dma_buf.tail; i++) {
479 if (uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
480 goto dma_ignore_char;
481 uart_insert_char(&uart->port, status, OE, uart->rx_dma_buf.buf[i], flg);
485 tty_flip_buffer_push(tty);
488 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
493 spin_lock_irqsave(&uart->port.lock, flags);
494 x_pos = DMA_RX_XCOUNT - get_dma_curr_xcount(uart->rx_dma_channel);
495 if (x_pos == DMA_RX_XCOUNT)
498 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
500 if (pos>uart->rx_dma_buf.tail) {
501 uart->rx_dma_buf.tail = pos;
502 bfin_serial_dma_rx_chars(uart);
503 uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
505 spin_unlock_irqrestore(&uart->port.lock, flags);
506 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
507 add_timer(&(uart->rx_dma_timer));
510 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
512 struct bfin_serial_port *uart = dev_id;
513 struct circ_buf *xmit = &uart->port.info->xmit;
516 spin_lock(&uart->port.lock);
517 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
518 clear_dma_irqstat(uart->tx_dma_channel);
519 disable_dma(uart->tx_dma_channel);
521 UART_CLEAR_IER(uart, ETBEI);
523 ier = UART_GET_IER(uart);
525 UART_PUT_IER(uart, ier);
527 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
528 uart_write_wakeup(&uart->port);
532 bfin_serial_dma_tx_chars(uart);
535 spin_unlock(&uart->port.lock);
539 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
541 struct bfin_serial_port *uart = dev_id;
542 unsigned short irqstat;
544 uart->rx_dma_nrows++;
545 if (uart->rx_dma_nrows == DMA_RX_YCOUNT) {
546 uart->rx_dma_nrows = 0;
547 uart->rx_dma_buf.tail = DMA_RX_XCOUNT*DMA_RX_YCOUNT;
548 bfin_serial_dma_rx_chars(uart);
549 uart->rx_dma_buf.head = uart->rx_dma_buf.tail = 0;
551 spin_lock(&uart->port.lock);
552 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
553 clear_dma_irqstat(uart->rx_dma_channel);
555 spin_unlock(&uart->port.lock);
561 * Return TIOCSER_TEMT when transmitter is not busy.
563 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
565 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
568 lsr = UART_GET_LSR(uart);
575 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
577 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
578 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
579 if (uart->cts_pin < 0)
580 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
582 if (gpio_get_value(uart->cts_pin))
583 return TIOCM_DSR | TIOCM_CAR;
586 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
589 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
591 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
592 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
593 if (uart->rts_pin < 0)
596 if (mctrl & TIOCM_RTS)
597 gpio_set_value(uart->rts_pin, 0);
599 gpio_set_value(uart->rts_pin, 1);
604 * Handle any change of modem status signal since we were last called.
606 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
608 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
610 # ifdef CONFIG_SERIAL_BFIN_DMA
611 struct uart_info *info = uart->port.info;
612 struct tty_struct *tty = info->tty;
614 status = bfin_serial_get_mctrl(&uart->port);
615 if (!(status & TIOCM_CTS)) {
621 status = bfin_serial_get_mctrl(&uart->port);
622 uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
623 if (!(status & TIOCM_CTS))
624 schedule_work(&uart->cts_workqueue);
630 * Interrupts are always disabled.
632 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
634 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
635 u16 lcr = UART_GET_LCR(uart);
640 UART_PUT_LCR(uart, lcr);
644 static int bfin_serial_startup(struct uart_port *port)
646 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
648 #ifdef CONFIG_SERIAL_BFIN_DMA
649 dma_addr_t dma_handle;
651 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
652 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
656 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
657 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
658 free_dma(uart->rx_dma_channel);
662 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
663 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
665 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
666 uart->rx_dma_buf.head = 0;
667 uart->rx_dma_buf.tail = 0;
668 uart->rx_dma_nrows = 0;
670 set_dma_config(uart->rx_dma_channel,
671 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
672 INTR_ON_ROW, DIMENSION_2D,
675 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
676 set_dma_x_modify(uart->rx_dma_channel, 1);
677 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
678 set_dma_y_modify(uart->rx_dma_channel, 1);
679 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
680 enable_dma(uart->rx_dma_channel);
682 uart->rx_dma_timer.data = (unsigned long)(uart);
683 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
684 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
685 add_timer(&(uart->rx_dma_timer));
687 if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
688 "BFIN_UART_RX", uart)) {
689 # ifdef CONFIG_KGDB_UART
690 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
692 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
694 # ifdef CONFIG_KGDB_UART
701 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
702 "BFIN_UART_TX", uart)) {
703 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
704 free_irq(uart->port.irq, uart);
709 UART_SET_IER(uart, ERBFI);
711 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
716 static void bfin_serial_shutdown(struct uart_port *port)
718 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
720 #ifdef CONFIG_SERIAL_BFIN_DMA
721 disable_dma(uart->tx_dma_channel);
722 free_dma(uart->tx_dma_channel);
723 disable_dma(uart->rx_dma_channel);
724 free_dma(uart->rx_dma_channel);
725 del_timer(&(uart->rx_dma_timer));
726 dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
728 #ifdef CONFIG_KGDB_UART
729 if (uart->port.line != CONFIG_KGDB_UART_PORT)
731 free_irq(uart->port.irq, uart);
732 free_irq(uart->port.irq+1, uart);
737 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
738 struct ktermios *old)
740 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
742 unsigned int baud, quot;
743 unsigned short val, ier, lsr, lcr = 0;
745 switch (termios->c_cflag & CSIZE) {
759 printk(KERN_ERR "%s: word lengh not supported\n",
763 if (termios->c_cflag & CSTOPB)
765 if (termios->c_cflag & PARENB)
767 if (!(termios->c_cflag & PARODD))
769 if (termios->c_cflag & CMSPAR)
772 port->read_status_mask = OE;
773 if (termios->c_iflag & INPCK)
774 port->read_status_mask |= (FE | PE);
775 if (termios->c_iflag & (BRKINT | PARMRK))
776 port->read_status_mask |= BI;
779 * Characters to ignore
781 port->ignore_status_mask = 0;
782 if (termios->c_iflag & IGNPAR)
783 port->ignore_status_mask |= FE | PE;
784 if (termios->c_iflag & IGNBRK) {
785 port->ignore_status_mask |= BI;
787 * If we're ignoring parity and break indicators,
788 * ignore overruns too (for real raw support).
790 if (termios->c_iflag & IGNPAR)
791 port->ignore_status_mask |= OE;
794 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
795 quot = uart_get_divisor(port, baud);
796 spin_lock_irqsave(&uart->port.lock, flags);
798 UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
801 lsr = UART_GET_LSR(uart);
802 } while (!(lsr & TEMT));
805 ier = UART_GET_IER(uart);
807 UART_CLEAR_IER(uart, 0xF);
809 UART_PUT_IER(uart, 0);
813 /* Set DLAB in LCR to Access DLL and DLH */
814 val = UART_GET_LCR(uart);
816 UART_PUT_LCR(uart, val);
820 UART_PUT_DLL(uart, quot & 0xFF);
822 UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
826 /* Clear DLAB in LCR to Access THR RBR IER */
827 val = UART_GET_LCR(uart);
829 UART_PUT_LCR(uart, val);
833 UART_PUT_LCR(uart, lcr);
837 UART_SET_IER(uart, ier);
839 UART_PUT_IER(uart, ier);
842 val = UART_GET_GCTL(uart);
844 UART_PUT_GCTL(uart, val);
846 spin_unlock_irqrestore(&uart->port.lock, flags);
849 static const char *bfin_serial_type(struct uart_port *port)
851 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
853 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
857 * Release the memory region(s) being used by 'port'.
859 static void bfin_serial_release_port(struct uart_port *port)
864 * Request the memory region(s) being used by 'port'.
866 static int bfin_serial_request_port(struct uart_port *port)
872 * Configure/autoconfigure the port.
874 static void bfin_serial_config_port(struct uart_port *port, int flags)
876 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
878 if (flags & UART_CONFIG_TYPE &&
879 bfin_serial_request_port(&uart->port) == 0)
880 uart->port.type = PORT_BFIN;
884 * Verify the new serial_struct (for TIOCSSERIAL).
885 * The only change we allow are to the flags and type, and
886 * even then only between PORT_BFIN and PORT_UNKNOWN
889 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
894 static struct uart_ops bfin_serial_pops = {
895 .tx_empty = bfin_serial_tx_empty,
896 .set_mctrl = bfin_serial_set_mctrl,
897 .get_mctrl = bfin_serial_get_mctrl,
898 .stop_tx = bfin_serial_stop_tx,
899 .start_tx = bfin_serial_start_tx,
900 .stop_rx = bfin_serial_stop_rx,
901 .enable_ms = bfin_serial_enable_ms,
902 .break_ctl = bfin_serial_break_ctl,
903 .startup = bfin_serial_startup,
904 .shutdown = bfin_serial_shutdown,
905 .set_termios = bfin_serial_set_termios,
906 .type = bfin_serial_type,
907 .release_port = bfin_serial_release_port,
908 .request_port = bfin_serial_request_port,
909 .config_port = bfin_serial_config_port,
910 .verify_port = bfin_serial_verify_port,
913 static void __init bfin_serial_init_ports(void)
915 static int first = 1;
922 for (i = 0; i < nr_ports; i++) {
923 bfin_serial_ports[i].port.uartclk = get_sclk();
924 bfin_serial_ports[i].port.ops = &bfin_serial_pops;
925 bfin_serial_ports[i].port.line = i;
926 bfin_serial_ports[i].port.iotype = UPIO_MEM;
927 bfin_serial_ports[i].port.membase =
928 (void __iomem *)bfin_serial_resource[i].uart_base_addr;
929 bfin_serial_ports[i].port.mapbase =
930 bfin_serial_resource[i].uart_base_addr;
931 bfin_serial_ports[i].port.irq =
932 bfin_serial_resource[i].uart_irq;
933 bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
934 #ifdef CONFIG_SERIAL_BFIN_DMA
935 bfin_serial_ports[i].tx_done = 1;
936 bfin_serial_ports[i].tx_count = 0;
937 bfin_serial_ports[i].tx_dma_channel =
938 bfin_serial_resource[i].uart_tx_dma_channel;
939 bfin_serial_ports[i].rx_dma_channel =
940 bfin_serial_resource[i].uart_rx_dma_channel;
941 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
943 INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
945 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
946 bfin_serial_ports[i].cts_pin =
947 bfin_serial_resource[i].uart_cts_pin;
948 bfin_serial_ports[i].rts_pin =
949 bfin_serial_resource[i].uart_rts_pin;
951 bfin_serial_hw_init(&bfin_serial_ports[i]);
956 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
958 * If the port was already initialised (eg, by a boot loader),
959 * try to determine the current setup.
962 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
963 int *parity, int *bits)
965 unsigned short status;
967 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
968 if (status == (ERBFI | ETBEI)) {
969 /* ok, the port was enabled */
970 unsigned short lcr, val;
971 unsigned short dlh, dll;
973 lcr = UART_GET_LCR(uart);
982 switch (lcr & 0x03) {
983 case 0: *bits = 5; break;
984 case 1: *bits = 6; break;
985 case 2: *bits = 7; break;
986 case 3: *bits = 8; break;
989 /* Set DLAB in LCR to Access DLL and DLH */
990 val = UART_GET_LCR(uart);
992 UART_PUT_LCR(uart, val);
995 dll = UART_GET_DLL(uart);
996 dlh = UART_GET_DLH(uart);
999 /* Clear DLAB in LCR to Access THR RBR IER */
1000 val = UART_GET_LCR(uart);
1002 UART_PUT_LCR(uart, val);
1005 *baud = get_sclk() / (16*(dll | dlh << 8));
1007 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
1011 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1012 static struct uart_driver bfin_serial_reg;
1015 bfin_serial_console_setup(struct console *co, char *options)
1017 struct bfin_serial_port *uart;
1018 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
1022 # ifdef CONFIG_SERIAL_BFIN_CTSRTS
1030 * Check whether an invalid uart number has been specified, and
1031 * if so, search for the first available port that does have
1034 if (co->index == -1 || co->index >= nr_ports)
1036 uart = &bfin_serial_ports[co->index];
1038 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
1040 uart_parse_options(options, &baud, &parity, &bits, &flow);
1042 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1044 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1049 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1050 defined (CONFIG_EARLY_PRINTK) */
1052 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1053 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1055 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1056 while (!(UART_GET_LSR(uart) & THRE))
1058 UART_PUT_CHAR(uart, ch);
1063 * Interrupts are disabled on entering
1066 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1068 struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1071 spin_lock_irqsave(&uart->port.lock, flags);
1072 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1073 spin_unlock_irqrestore(&uart->port.lock, flags);
1077 static struct console bfin_serial_console = {
1078 .name = BFIN_SERIAL_NAME,
1079 .write = bfin_serial_console_write,
1080 .device = uart_console_device,
1081 .setup = bfin_serial_console_setup,
1082 .flags = CON_PRINTBUFFER,
1084 .data = &bfin_serial_reg,
1087 static int __init bfin_serial_rs_console_init(void)
1089 bfin_serial_init_ports();
1090 register_console(&bfin_serial_console);
1091 #ifdef CONFIG_KGDB_UART
1092 kgdb_entry_state = 0;
1097 console_initcall(bfin_serial_rs_console_init);
1099 #define BFIN_SERIAL_CONSOLE &bfin_serial_console
1101 #define BFIN_SERIAL_CONSOLE NULL
1102 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1105 #ifdef CONFIG_EARLY_PRINTK
1106 static __init void early_serial_putc(struct uart_port *port, int ch)
1108 unsigned timeout = 0xffff;
1109 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1111 while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1113 UART_PUT_CHAR(uart, ch);
1116 static __init void early_serial_write(struct console *con, const char *s,
1119 struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1122 for (i = 0; i < n; i++, s++) {
1124 early_serial_putc(&uart->port, '\r');
1125 early_serial_putc(&uart->port, *s);
1129 static struct __init console bfin_early_serial_console = {
1130 .name = "early_BFuart",
1131 .write = early_serial_write,
1132 .device = uart_console_device,
1133 .flags = CON_PRINTBUFFER,
1134 .setup = bfin_serial_console_setup,
1136 .data = &bfin_serial_reg,
1139 struct console __init *bfin_earlyserial_init(unsigned int port,
1142 struct bfin_serial_port *uart;
1145 if (port == -1 || port >= nr_ports)
1147 bfin_serial_init_ports();
1148 bfin_early_serial_console.index = port;
1149 uart = &bfin_serial_ports[port];
1155 bfin_serial_set_termios(&uart->port, &t, &t);
1156 return &bfin_early_serial_console;
1159 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1161 static struct uart_driver bfin_serial_reg = {
1162 .owner = THIS_MODULE,
1163 .driver_name = "bfin-uart",
1164 .dev_name = BFIN_SERIAL_NAME,
1165 .major = BFIN_SERIAL_MAJOR,
1166 .minor = BFIN_SERIAL_MINOR,
1168 .cons = BFIN_SERIAL_CONSOLE,
1171 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1173 struct bfin_serial_port *uart = platform_get_drvdata(dev);
1176 uart_suspend_port(&bfin_serial_reg, &uart->port);
1181 static int bfin_serial_resume(struct platform_device *dev)
1183 struct bfin_serial_port *uart = platform_get_drvdata(dev);
1186 uart_resume_port(&bfin_serial_reg, &uart->port);
1191 static int bfin_serial_probe(struct platform_device *dev)
1193 struct resource *res = dev->resource;
1196 for (i = 0; i < dev->num_resources; i++, res++)
1197 if (res->flags & IORESOURCE_MEM)
1200 if (i < dev->num_resources) {
1201 for (i = 0; i < nr_ports; i++, res++) {
1202 if (bfin_serial_ports[i].port.mapbase != res->start)
1204 bfin_serial_ports[i].port.dev = &dev->dev;
1205 uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1206 platform_set_drvdata(dev, &bfin_serial_ports[i]);
1213 static int bfin_serial_remove(struct platform_device *pdev)
1215 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1218 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1219 gpio_free(uart->cts_pin);
1220 gpio_free(uart->rts_pin);
1223 platform_set_drvdata(pdev, NULL);
1226 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1231 static struct platform_driver bfin_serial_driver = {
1232 .probe = bfin_serial_probe,
1233 .remove = bfin_serial_remove,
1234 .suspend = bfin_serial_suspend,
1235 .resume = bfin_serial_resume,
1237 .name = "bfin-uart",
1241 static int __init bfin_serial_init(void)
1244 #ifdef CONFIG_KGDB_UART
1245 struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
1249 pr_info("Serial: Blackfin serial driver\n");
1251 bfin_serial_init_ports();
1253 ret = uart_register_driver(&bfin_serial_reg);
1255 ret = platform_driver_register(&bfin_serial_driver);
1257 pr_debug("uart register failed\n");
1258 uart_unregister_driver(&bfin_serial_reg);
1261 #ifdef CONFIG_KGDB_UART
1262 if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
1263 request_irq(uart->port.irq, bfin_serial_rx_int,
1264 IRQF_DISABLED, "BFIN_UART_RX", uart);
1265 pr_info("Request irq for kgdb uart port\n");
1267 UART_SET_IER(uart, ERBFI);
1269 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
1272 t.c_cflag = CS8|B57600;
1276 t.c_line = CONFIG_KGDB_UART_PORT;
1277 bfin_serial_set_termios(&uart->port, &t, &t);
1283 static void __exit bfin_serial_exit(void)
1285 platform_driver_unregister(&bfin_serial_driver);
1286 uart_unregister_driver(&bfin_serial_reg);
1289 module_init(bfin_serial_init);
1290 module_exit(bfin_serial_exit);
1292 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1293 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1294 MODULE_LICENSE("GPL");
1295 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);