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Blackfin Serial Driver: Fix bug - Increase buffer tail immediately before starting...
[linux-2.6-omap-h63xx.git] / drivers / serial / bfin_5xx.c
1 /*
2  * Blackfin On-Chip Serial Driver
3  *
4  * Copyright 2006-2007 Analog Devices Inc.
5  *
6  * Enter bugs at http://blackfin.uclinux.org/
7  *
8  * Licensed under the GPL-2 or later.
9  */
10
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
12 #define SUPPORT_SYSRQ
13 #endif
14
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/init.h>
18 #include <linux/console.h>
19 #include <linux/sysrq.h>
20 #include <linux/platform_device.h>
21 #include <linux/tty.h>
22 #include <linux/tty_flip.h>
23 #include <linux/serial_core.h>
24
25 #ifdef CONFIG_KGDB_UART
26 #include <linux/kgdb.h>
27 #include <asm/irq_regs.h>
28 #endif
29
30 #include <asm/gpio.h>
31 #include <asm/mach/bfin_serial_5xx.h>
32
33 #ifdef CONFIG_SERIAL_BFIN_DMA
34 #include <linux/dma-mapping.h>
35 #include <asm/io.h>
36 #include <asm/irq.h>
37 #include <asm/cacheflush.h>
38 #endif
39
40 /* UART name and device definitions */
41 #define BFIN_SERIAL_NAME        "ttyBF"
42 #define BFIN_SERIAL_MAJOR       204
43 #define BFIN_SERIAL_MINOR       64
44
45 /*
46  * Setup for console. Argument comes from the menuconfig
47  */
48 #define DMA_RX_XCOUNT           512
49 #define DMA_RX_YCOUNT           (PAGE_SIZE / DMA_RX_XCOUNT)
50
51 #define DMA_RX_FLUSH_JIFFIES    5
52
53 #ifdef CONFIG_SERIAL_BFIN_DMA
54 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
55 #else
56 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
57 #endif
58
59 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
60
61 /*
62  * interrupts are disabled on entry
63  */
64 static void bfin_serial_stop_tx(struct uart_port *port)
65 {
66         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
67         struct circ_buf *xmit = &uart->port.info->xmit;
68 #if !defined(CONFIG_BF54x) && !defined(CONFIG_SERIAL_BFIN_DMA)
69         unsigned short ier;
70 #endif
71
72         while (!(UART_GET_LSR(uart) & TEMT))
73                 cpu_relax();
74
75 #ifdef CONFIG_SERIAL_BFIN_DMA
76         disable_dma(uart->tx_dma_channel);
77         xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
78         uart->port.icount.tx += uart->tx_count;
79         uart->tx_count = 0;
80         uart->tx_done = 1;
81 #else
82 #ifdef CONFIG_BF54x
83         /* Clear TFI bit */
84         UART_PUT_LSR(uart, TFI);
85         UART_CLEAR_IER(uart, ETBEI);
86 #else
87         ier = UART_GET_IER(uart);
88         ier &= ~ETBEI;
89         UART_PUT_IER(uart, ier);
90 #endif
91 #endif
92 }
93
94 /*
95  * port is locked and interrupts are disabled
96  */
97 static void bfin_serial_start_tx(struct uart_port *port)
98 {
99         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
100
101 #ifdef CONFIG_SERIAL_BFIN_DMA
102         if (uart->tx_done)
103                 bfin_serial_dma_tx_chars(uart);
104 #else
105 #ifdef CONFIG_BF54x
106         UART_SET_IER(uart, ETBEI);
107 #else
108         unsigned short ier;
109         ier = UART_GET_IER(uart);
110         ier |= ETBEI;
111         UART_PUT_IER(uart, ier);
112 #endif
113         bfin_serial_tx_chars(uart);
114 #endif
115 }
116
117 /*
118  * Interrupts are enabled
119  */
120 static void bfin_serial_stop_rx(struct uart_port *port)
121 {
122         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
123 #ifdef  CONFIG_KGDB_UART
124         if (uart->port.line != CONFIG_KGDB_UART_PORT) {
125 #endif
126 #ifdef CONFIG_BF54x
127         UART_CLEAR_IER(uart, ERBFI);
128 #else
129         unsigned short ier;
130
131         ier = UART_GET_IER(uart);
132         ier &= ~ERBFI;
133         UART_PUT_IER(uart, ier);
134 #endif
135 #ifdef  CONFIG_KGDB_UART
136         }
137 #endif
138 }
139
140 /*
141  * Set the modem control timer to fire immediately.
142  */
143 static void bfin_serial_enable_ms(struct uart_port *port)
144 {
145 }
146
147 #ifdef CONFIG_KGDB_UART
148 static int kgdb_entry_state;
149
150 void kgdb_put_debug_char(int chr)
151 {
152         struct bfin_serial_port *uart;
153         
154         if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
155                 uart = &bfin_serial_ports[0];
156         else
157                 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
158         
159         while (!(UART_GET_LSR(uart) & THRE)) {
160                 SSYNC();
161         }
162
163 #ifndef CONFIG_BF54x
164         UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
165         SSYNC();
166 #endif
167         UART_PUT_CHAR(uart, (unsigned char)chr);
168         SSYNC();
169 }
170
171 int kgdb_get_debug_char(void)
172 {
173         struct bfin_serial_port *uart;
174         unsigned char chr;
175
176         if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
177                 uart = &bfin_serial_ports[0];
178         else
179                 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
180         
181         while(!(UART_GET_LSR(uart) & DR)) {
182                 SSYNC();
183         }
184 #ifndef CONFIG_BF54x
185         UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
186         SSYNC();
187 #endif
188         chr = UART_GET_CHAR(uart);
189         SSYNC();
190
191         return chr;
192 }
193 #endif
194
195 #if ANOMALY_05000230 && defined(CONFIG_SERIAL_BFIN_PIO)
196 # define UART_GET_ANOMALY_THRESHOLD(uart)    ((uart)->anomaly_threshold)
197 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
198 #else
199 # define UART_GET_ANOMALY_THRESHOLD(uart)    0
200 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
201 #endif
202
203 #ifdef CONFIG_SERIAL_BFIN_PIO
204 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
205 {
206         struct tty_struct *tty = uart->port.info->tty;
207         unsigned int status, ch, flg;
208         static struct timeval anomaly_start = { .tv_sec = 0 };
209 #ifdef CONFIG_KGDB_UART
210         struct pt_regs *regs = get_irq_regs();
211 #endif
212
213         status = UART_GET_LSR(uart);
214         UART_CLEAR_LSR(uart);
215
216         ch = UART_GET_CHAR(uart);
217         uart->port.icount.rx++;
218
219 #ifdef CONFIG_KGDB_UART
220         if (uart->port.line == CONFIG_KGDB_UART_PORT) {
221                 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
222                         kgdb_breakkey_pressed(regs);
223                         return;
224                 } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
225                         kgdb_entry_state = 1;
226                 } else if (kgdb_entry_state == 1 && ch == 'q') {
227                         kgdb_entry_state = 0;
228                         kgdb_breakkey_pressed(regs);
229                         return;
230                 } else if (ch == 0x3) {/* Ctrl + C */
231                         kgdb_entry_state = 0;
232                         kgdb_breakkey_pressed(regs);
233                         return;
234                 } else {
235                         kgdb_entry_state = 0;
236                 }
237         }
238 #endif
239
240         if (ANOMALY_05000230) {
241                 /* The BF533 (and BF561) family of processors have a nice anomaly
242                  * where they continuously generate characters for a "single" break.
243                  * We have to basically ignore this flood until the "next" valid
244                  * character comes across.  Due to the nature of the flood, it is
245                  * not possible to reliably catch bytes that are sent too quickly
246                  * after this break.  So application code talking to the Blackfin
247                  * which sends a break signal must allow at least 1.5 character
248                  * times after the end of the break for things to stabilize.  This
249                  * timeout was picked as it must absolutely be larger than 1
250                  * character time +/- some percent.  So 1.5 sounds good.  All other
251                  * Blackfin families operate properly.  Woo.
252                  * Note: While Anomaly 05000230 does not directly address this,
253                  *       the changes that went in for it also fixed this issue.
254                  *       That anomaly was fixed in 0.5+ silicon.  I like bunnies.
255                  */
256                 if (anomaly_start.tv_sec) {
257                         struct timeval curr;
258                         suseconds_t usecs;
259
260                         if ((~ch & (~ch + 1)) & 0xff)
261                                 goto known_good_char;
262
263                         do_gettimeofday(&curr);
264                         if (curr.tv_sec - anomaly_start.tv_sec > 1)
265                                 goto known_good_char;
266
267                         usecs = 0;
268                         if (curr.tv_sec != anomaly_start.tv_sec)
269                                 usecs += USEC_PER_SEC;
270                         usecs += curr.tv_usec - anomaly_start.tv_usec;
271
272                         if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
273                                 goto known_good_char;
274
275                         if (ch)
276                                 anomaly_start.tv_sec = 0;
277                         else
278                                 anomaly_start = curr;
279
280                         return;
281
282  known_good_char:
283                         anomaly_start.tv_sec = 0;
284                 }
285         }
286
287         if (status & BI) {
288                 if (ANOMALY_05000230)
289                         if (bfin_revid() < 5)
290                                 do_gettimeofday(&anomaly_start);
291                 uart->port.icount.brk++;
292                 if (uart_handle_break(&uart->port))
293                         goto ignore_char;
294                 status &= ~(PE | FE);
295         }
296         if (status & PE)
297                 uart->port.icount.parity++;
298         if (status & OE)
299                 uart->port.icount.overrun++;
300         if (status & FE)
301                 uart->port.icount.frame++;
302
303         status &= uart->port.read_status_mask;
304
305         if (status & BI)
306                 flg = TTY_BREAK;
307         else if (status & PE)
308                 flg = TTY_PARITY;
309         else if (status & FE)
310                 flg = TTY_FRAME;
311         else
312                 flg = TTY_NORMAL;
313
314         if (uart_handle_sysrq_char(&uart->port, ch))
315                 goto ignore_char;
316
317         uart_insert_char(&uart->port, status, OE, ch, flg);
318
319  ignore_char:
320         tty_flip_buffer_push(tty);
321 }
322
323 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
324 {
325         struct circ_buf *xmit = &uart->port.info->xmit;
326
327         if (uart->port.x_char) {
328                 UART_PUT_CHAR(uart, uart->port.x_char);
329                 uart->port.icount.tx++;
330                 uart->port.x_char = 0;
331         }
332         /*
333          * Check the modem control lines before
334          * transmitting anything.
335          */
336         bfin_serial_mctrl_check(uart);
337
338         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
339                 bfin_serial_stop_tx(&uart->port);
340                 return;
341         }
342
343         while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
344                 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
345                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
346                 uart->port.icount.tx++;
347                 SSYNC();
348         }
349
350         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
351                 uart_write_wakeup(&uart->port);
352
353         if (uart_circ_empty(xmit))
354                 bfin_serial_stop_tx(&uart->port);
355 }
356
357 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
358 {
359         struct bfin_serial_port *uart = dev_id;
360
361         spin_lock(&uart->port.lock);
362         while (UART_GET_LSR(uart) & DR)
363                 bfin_serial_rx_chars(uart);
364         spin_unlock(&uart->port.lock);
365
366         return IRQ_HANDLED;
367 }
368
369 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
370 {
371         struct bfin_serial_port *uart = dev_id;
372
373         spin_lock(&uart->port.lock);
374         if (UART_GET_LSR(uart) & THRE)
375                 bfin_serial_tx_chars(uart);
376         spin_unlock(&uart->port.lock);
377
378         return IRQ_HANDLED;
379 }
380 #endif
381
382 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
383 static void bfin_serial_do_work(struct work_struct *work)
384 {
385         struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
386
387         bfin_serial_mctrl_check(uart);
388 }
389 #endif
390
391 #ifdef CONFIG_SERIAL_BFIN_DMA
392 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
393 {
394         struct circ_buf *xmit = &uart->port.info->xmit;
395         unsigned short ier;
396         int flags = 0;
397
398         uart->tx_done = 0;
399
400         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
401                 uart->tx_count = 0;
402                 uart->tx_done = 1;
403                 return;
404         }
405
406         if (uart->port.x_char) {
407                 UART_PUT_CHAR(uart, uart->port.x_char);
408                 uart->port.icount.tx++;
409                 uart->port.x_char = 0;
410         }
411
412         /*
413          * Check the modem control lines before
414          * transmitting anything.
415          */
416         bfin_serial_mctrl_check(uart);
417
418         spin_lock_irqsave(&uart->port.lock, flags);
419         uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
420         if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
421                 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
422         blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
423                                         (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
424         set_dma_config(uart->tx_dma_channel,
425                 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
426                         INTR_ON_BUF,
427                         DIMENSION_LINEAR,
428                         DATA_SIZE_8,
429                         DMA_SYNC_RESTART));
430         set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
431         set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
432         set_dma_x_modify(uart->tx_dma_channel, 1);
433         enable_dma(uart->tx_dma_channel);
434
435 #ifdef CONFIG_BF54x
436         UART_SET_IER(uart, ETBEI);
437 #else
438         ier = UART_GET_IER(uart);
439         ier |= ETBEI;
440         UART_PUT_IER(uart, ier);
441 #endif
442         spin_unlock_irqrestore(&uart->port.lock, flags);
443 }
444
445 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
446 {
447         struct tty_struct *tty = uart->port.info->tty;
448         int i, flg, status;
449
450         status = UART_GET_LSR(uart);
451         UART_CLEAR_LSR(uart);
452
453         uart->port.icount.rx += CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, UART_XMIT_SIZE);;
454
455         if (status & BI) {
456                 uart->port.icount.brk++;
457                 if (uart_handle_break(&uart->port))
458                         goto dma_ignore_char;
459                 status &= ~(PE | FE);
460         }
461         if (status & PE)
462                 uart->port.icount.parity++;
463         if (status & OE)
464                 uart->port.icount.overrun++;
465         if (status & FE)
466                 uart->port.icount.frame++;
467
468         status &= uart->port.read_status_mask;
469
470         if (status & BI)
471                 flg = TTY_BREAK;
472         else if (status & PE)
473                 flg = TTY_PARITY;
474         else if (status & FE)
475                 flg = TTY_FRAME;
476         else
477                 flg = TTY_NORMAL;
478
479         for (i = uart->rx_dma_buf.head; i < uart->rx_dma_buf.tail; i++) {
480                 if (uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
481                         goto dma_ignore_char;
482                 uart_insert_char(&uart->port, status, OE, uart->rx_dma_buf.buf[i], flg);
483         }
484
485  dma_ignore_char:
486         tty_flip_buffer_push(tty);
487 }
488
489 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
490 {
491         int x_pos, pos;
492         int flags = 0;
493
494         spin_lock_irqsave(&uart->port.lock, flags);
495         x_pos = DMA_RX_XCOUNT - get_dma_curr_xcount(uart->rx_dma_channel);
496         if (x_pos == DMA_RX_XCOUNT)
497                 x_pos = 0;
498
499         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
500
501         if (pos>uart->rx_dma_buf.tail) {
502                 uart->rx_dma_buf.tail = pos;
503                 bfin_serial_dma_rx_chars(uart);
504                 uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
505         }
506         spin_unlock_irqrestore(&uart->port.lock, flags);
507         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
508         add_timer(&(uart->rx_dma_timer));
509 }
510
511 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
512 {
513         struct bfin_serial_port *uart = dev_id;
514         struct circ_buf *xmit = &uart->port.info->xmit;
515         unsigned short ier;
516
517         spin_lock(&uart->port.lock);
518         if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
519                 disable_dma(uart->tx_dma_channel);
520                 clear_dma_irqstat(uart->tx_dma_channel);
521 #ifdef CONFIG_BF54x
522                 UART_CLEAR_IER(uart, ETBEI);
523 #else
524                 ier = UART_GET_IER(uart);
525                 ier &= ~ETBEI;
526                 UART_PUT_IER(uart, ier);
527 #endif
528                 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
529                         uart_write_wakeup(&uart->port);
530
531                 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
532                 uart->port.icount.tx += uart->tx_count;
533
534                 bfin_serial_dma_tx_chars(uart);
535         }
536
537         spin_unlock(&uart->port.lock);
538         return IRQ_HANDLED;
539 }
540
541 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
542 {
543         struct bfin_serial_port *uart = dev_id;
544         unsigned short irqstat;
545
546         uart->rx_dma_nrows++;
547         uart->rx_dma_buf.tail = DMA_RX_XCOUNT * uart->rx_dma_nrows;
548         bfin_serial_dma_rx_chars(uart);
549         if (uart->rx_dma_nrows >= DMA_RX_YCOUNT) {
550                 uart->rx_dma_nrows = 0;
551                 uart->rx_dma_buf.tail = 0;
552         }
553         uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
554
555         spin_lock(&uart->port.lock);
556         irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
557         clear_dma_irqstat(uart->rx_dma_channel);
558
559         spin_unlock(&uart->port.lock);
560         return IRQ_HANDLED;
561 }
562 #endif
563
564 /*
565  * Return TIOCSER_TEMT when transmitter is not busy.
566  */
567 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
568 {
569         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
570         unsigned short lsr;
571
572         lsr = UART_GET_LSR(uart);
573         if (lsr & TEMT)
574                 return TIOCSER_TEMT;
575         else
576                 return 0;
577 }
578
579 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
580 {
581 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
582         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
583         if (uart->cts_pin < 0)
584                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
585
586 # ifdef BF54x
587         if (UART_GET_MSR(uart) & CTS)
588 # else
589         if (gpio_get_value(uart->cts_pin))
590 # endif
591                 return TIOCM_DSR | TIOCM_CAR;
592         else
593 #endif
594                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
595 }
596
597 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
598 {
599 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
600         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
601         if (uart->rts_pin < 0)
602                 return;
603
604         if (mctrl & TIOCM_RTS)
605 # ifdef BF54x
606                 UART_PUT_MCR(uart, UART_GET_MCR(uart) & ~MRTS);
607 # else
608                 gpio_set_value(uart->rts_pin, 0);
609 # endif
610         else
611 # ifdef BF54x
612                 UART_PUT_MCR(uart, UART_GET_MCR(uart) | MRTS);
613 # else
614                 gpio_set_value(uart->rts_pin, 1);
615 # endif
616 #endif
617 }
618
619 /*
620  * Handle any change of modem status signal since we were last called.
621  */
622 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
623 {
624 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
625         unsigned int status;
626         struct uart_info *info = uart->port.info;
627         struct tty_struct *tty = info->tty;
628
629         status = bfin_serial_get_mctrl(&uart->port);
630         uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
631         if (!(status & TIOCM_CTS)) {
632                 tty->hw_stopped = 1;
633                 schedule_work(&uart->cts_workqueue);
634         } else {
635                 tty->hw_stopped = 0;
636         }
637 #endif
638 }
639
640 /*
641  * Interrupts are always disabled.
642  */
643 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
644 {
645         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
646         u16 lcr = UART_GET_LCR(uart);
647         if (break_state)
648                 lcr |= SB;
649         else
650                 lcr &= ~SB;
651         UART_PUT_LCR(uart, lcr);
652         SSYNC();
653 }
654
655 static int bfin_serial_startup(struct uart_port *port)
656 {
657         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
658
659 #ifdef CONFIG_SERIAL_BFIN_DMA
660         dma_addr_t dma_handle;
661
662         if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
663                 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
664                 return -EBUSY;
665         }
666
667         if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
668                 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
669                 free_dma(uart->rx_dma_channel);
670                 return -EBUSY;
671         }
672
673         set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
674         set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
675
676         uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
677         uart->rx_dma_buf.head = 0;
678         uart->rx_dma_buf.tail = 0;
679         uart->rx_dma_nrows = 0;
680
681         set_dma_config(uart->rx_dma_channel,
682                 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
683                                 INTR_ON_ROW, DIMENSION_2D,
684                                 DATA_SIZE_8,
685                                 DMA_SYNC_RESTART));
686         set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
687         set_dma_x_modify(uart->rx_dma_channel, 1);
688         set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
689         set_dma_y_modify(uart->rx_dma_channel, 1);
690         set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
691         enable_dma(uart->rx_dma_channel);
692
693         uart->rx_dma_timer.data = (unsigned long)(uart);
694         uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
695         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
696         add_timer(&(uart->rx_dma_timer));
697 #else
698         if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
699              "BFIN_UART_RX", uart)) {
700 # ifdef CONFIG_KGDB_UART
701                 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
702 # endif
703                 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
704                 return -EBUSY;
705 # ifdef CONFIG_KGDB_UART
706                 }
707 # endif
708         }
709
710
711         if (request_irq
712             (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
713              "BFIN_UART_TX", uart)) {
714                 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
715                 free_irq(uart->port.irq, uart);
716                 return -EBUSY;
717         }
718 #endif
719 #ifdef CONFIG_BF54x
720         UART_SET_IER(uart, ERBFI);
721 #else
722         UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
723 #endif
724         return 0;
725 }
726
727 static void bfin_serial_shutdown(struct uart_port *port)
728 {
729         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
730
731 #ifdef CONFIG_SERIAL_BFIN_DMA
732         disable_dma(uart->tx_dma_channel);
733         free_dma(uart->tx_dma_channel);
734         disable_dma(uart->rx_dma_channel);
735         free_dma(uart->rx_dma_channel);
736         del_timer(&(uart->rx_dma_timer));
737         dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
738 #else
739 #ifdef  CONFIG_KGDB_UART
740         if (uart->port.line != CONFIG_KGDB_UART_PORT)
741 #endif
742         free_irq(uart->port.irq, uart);
743         free_irq(uart->port.irq+1, uart);
744 #endif
745 }
746
747 static void
748 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
749                    struct ktermios *old)
750 {
751         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
752         unsigned long flags;
753         unsigned int baud, quot;
754         unsigned short val, ier, lsr, lcr = 0;
755
756         switch (termios->c_cflag & CSIZE) {
757         case CS8:
758                 lcr = WLS(8);
759                 break;
760         case CS7:
761                 lcr = WLS(7);
762                 break;
763         case CS6:
764                 lcr = WLS(6);
765                 break;
766         case CS5:
767                 lcr = WLS(5);
768                 break;
769         default:
770                 printk(KERN_ERR "%s: word lengh not supported\n",
771                         __FUNCTION__);
772         }
773
774         if (termios->c_cflag & CSTOPB)
775                 lcr |= STB;
776         if (termios->c_cflag & PARENB)
777                 lcr |= PEN;
778         if (!(termios->c_cflag & PARODD))
779                 lcr |= EPS;
780         if (termios->c_cflag & CMSPAR)
781                 lcr |= STP;
782
783         port->read_status_mask = OE;
784         if (termios->c_iflag & INPCK)
785                 port->read_status_mask |= (FE | PE);
786         if (termios->c_iflag & (BRKINT | PARMRK))
787                 port->read_status_mask |= BI;
788
789         /*
790          * Characters to ignore
791          */
792         port->ignore_status_mask = 0;
793         if (termios->c_iflag & IGNPAR)
794                 port->ignore_status_mask |= FE | PE;
795         if (termios->c_iflag & IGNBRK) {
796                 port->ignore_status_mask |= BI;
797                 /*
798                  * If we're ignoring parity and break indicators,
799                  * ignore overruns too (for real raw support).
800                  */
801                 if (termios->c_iflag & IGNPAR)
802                         port->ignore_status_mask |= OE;
803         }
804
805         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
806         quot = uart_get_divisor(port, baud);
807         spin_lock_irqsave(&uart->port.lock, flags);
808
809         UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
810
811         do {
812                 lsr = UART_GET_LSR(uart);
813         } while (!(lsr & TEMT));
814
815         /* Disable UART */
816         ier = UART_GET_IER(uart);
817 #ifdef CONFIG_BF54x
818         UART_CLEAR_IER(uart, 0xF);
819 #else
820         UART_PUT_IER(uart, 0);
821 #endif
822
823 #ifndef CONFIG_BF54x
824         /* Set DLAB in LCR to Access DLL and DLH */
825         val = UART_GET_LCR(uart);
826         val |= DLAB;
827         UART_PUT_LCR(uart, val);
828         SSYNC();
829 #endif
830
831         UART_PUT_DLL(uart, quot & 0xFF);
832         SSYNC();
833         UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
834         SSYNC();
835
836 #ifndef CONFIG_BF54x
837         /* Clear DLAB in LCR to Access THR RBR IER */
838         val = UART_GET_LCR(uart);
839         val &= ~DLAB;
840         UART_PUT_LCR(uart, val);
841         SSYNC();
842 #endif
843
844         UART_PUT_LCR(uart, lcr);
845
846         /* Enable UART */
847 #ifdef CONFIG_BF54x
848         UART_SET_IER(uart, ier);
849 #else
850         UART_PUT_IER(uart, ier);
851 #endif
852
853         val = UART_GET_GCTL(uart);
854         val |= UCEN;
855         UART_PUT_GCTL(uart, val);
856
857         spin_unlock_irqrestore(&uart->port.lock, flags);
858 }
859
860 static const char *bfin_serial_type(struct uart_port *port)
861 {
862         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
863
864         return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
865 }
866
867 /*
868  * Release the memory region(s) being used by 'port'.
869  */
870 static void bfin_serial_release_port(struct uart_port *port)
871 {
872 }
873
874 /*
875  * Request the memory region(s) being used by 'port'.
876  */
877 static int bfin_serial_request_port(struct uart_port *port)
878 {
879         return 0;
880 }
881
882 /*
883  * Configure/autoconfigure the port.
884  */
885 static void bfin_serial_config_port(struct uart_port *port, int flags)
886 {
887         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
888
889         if (flags & UART_CONFIG_TYPE &&
890             bfin_serial_request_port(&uart->port) == 0)
891                 uart->port.type = PORT_BFIN;
892 }
893
894 /*
895  * Verify the new serial_struct (for TIOCSSERIAL).
896  * The only change we allow are to the flags and type, and
897  * even then only between PORT_BFIN and PORT_UNKNOWN
898  */
899 static int
900 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
901 {
902         return 0;
903 }
904
905 static struct uart_ops bfin_serial_pops = {
906         .tx_empty       = bfin_serial_tx_empty,
907         .set_mctrl      = bfin_serial_set_mctrl,
908         .get_mctrl      = bfin_serial_get_mctrl,
909         .stop_tx        = bfin_serial_stop_tx,
910         .start_tx       = bfin_serial_start_tx,
911         .stop_rx        = bfin_serial_stop_rx,
912         .enable_ms      = bfin_serial_enable_ms,
913         .break_ctl      = bfin_serial_break_ctl,
914         .startup        = bfin_serial_startup,
915         .shutdown       = bfin_serial_shutdown,
916         .set_termios    = bfin_serial_set_termios,
917         .type           = bfin_serial_type,
918         .release_port   = bfin_serial_release_port,
919         .request_port   = bfin_serial_request_port,
920         .config_port    = bfin_serial_config_port,
921         .verify_port    = bfin_serial_verify_port,
922 };
923
924 static void __init bfin_serial_init_ports(void)
925 {
926         static int first = 1;
927         int i;
928
929         if (!first)
930                 return;
931         first = 0;
932
933         for (i = 0; i < nr_ports; i++) {
934                 bfin_serial_ports[i].port.uartclk   = get_sclk();
935                 bfin_serial_ports[i].port.ops       = &bfin_serial_pops;
936                 bfin_serial_ports[i].port.line      = i;
937                 bfin_serial_ports[i].port.iotype    = UPIO_MEM;
938                 bfin_serial_ports[i].port.membase   =
939                         (void __iomem *)bfin_serial_resource[i].uart_base_addr;
940                 bfin_serial_ports[i].port.mapbase   =
941                         bfin_serial_resource[i].uart_base_addr;
942                 bfin_serial_ports[i].port.irq       =
943                         bfin_serial_resource[i].uart_irq;
944                 bfin_serial_ports[i].port.flags     = UPF_BOOT_AUTOCONF;
945 #ifdef CONFIG_SERIAL_BFIN_DMA
946                 bfin_serial_ports[i].tx_done        = 1;
947                 bfin_serial_ports[i].tx_count       = 0;
948                 bfin_serial_ports[i].tx_dma_channel =
949                         bfin_serial_resource[i].uart_tx_dma_channel;
950                 bfin_serial_ports[i].rx_dma_channel =
951                         bfin_serial_resource[i].uart_rx_dma_channel;
952                 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
953 #endif
954 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
955                 INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
956                 bfin_serial_ports[i].cts_pin        =
957                         bfin_serial_resource[i].uart_cts_pin;
958                 bfin_serial_ports[i].rts_pin        =
959                         bfin_serial_resource[i].uart_rts_pin;
960 #endif
961                 bfin_serial_hw_init(&bfin_serial_ports[i]);
962         }
963
964 }
965
966 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
967 /*
968  * If the port was already initialised (eg, by a boot loader),
969  * try to determine the current setup.
970  */
971 static void __init
972 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
973                            int *parity, int *bits)
974 {
975         unsigned short status;
976
977         status = UART_GET_IER(uart) & (ERBFI | ETBEI);
978         if (status == (ERBFI | ETBEI)) {
979                 /* ok, the port was enabled */
980                 unsigned short lcr, val;
981                 unsigned short dlh, dll;
982
983                 lcr = UART_GET_LCR(uart);
984
985                 *parity = 'n';
986                 if (lcr & PEN) {
987                         if (lcr & EPS)
988                                 *parity = 'e';
989                         else
990                                 *parity = 'o';
991                 }
992                 switch (lcr & 0x03) {
993                         case 0: *bits = 5; break;
994                         case 1: *bits = 6; break;
995                         case 2: *bits = 7; break;
996                         case 3: *bits = 8; break;
997                 }
998 #ifndef CONFIG_BF54x
999                 /* Set DLAB in LCR to Access DLL and DLH */
1000                 val = UART_GET_LCR(uart);
1001                 val |= DLAB;
1002                 UART_PUT_LCR(uart, val);
1003 #endif
1004
1005                 dll = UART_GET_DLL(uart);
1006                 dlh = UART_GET_DLH(uart);
1007
1008 #ifndef CONFIG_BF54x
1009                 /* Clear DLAB in LCR to Access THR RBR IER */
1010                 val = UART_GET_LCR(uart);
1011                 val &= ~DLAB;
1012                 UART_PUT_LCR(uart, val);
1013 #endif
1014
1015                 *baud = get_sclk() / (16*(dll | dlh << 8));
1016         }
1017         pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
1018 }
1019 #endif
1020
1021 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1022 static struct uart_driver bfin_serial_reg;
1023
1024 static int __init
1025 bfin_serial_console_setup(struct console *co, char *options)
1026 {
1027         struct bfin_serial_port *uart;
1028 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
1029         int baud = 57600;
1030         int bits = 8;
1031         int parity = 'n';
1032 #  ifdef CONFIG_SERIAL_BFIN_CTSRTS
1033         int flow = 'r';
1034 #  else
1035         int flow = 'n';
1036 #  endif
1037 # endif
1038
1039         /*
1040          * Check whether an invalid uart number has been specified, and
1041          * if so, search for the first available port that does have
1042          * console support.
1043          */
1044         if (co->index == -1 || co->index >= nr_ports)
1045                 co->index = 0;
1046         uart = &bfin_serial_ports[co->index];
1047
1048 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
1049         if (options)
1050                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1051         else
1052                 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1053
1054         return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1055 # else
1056         return 0;
1057 # endif
1058 }
1059 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1060                                  defined (CONFIG_EARLY_PRINTK) */
1061
1062 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1063 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1064 {
1065         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1066         while (!(UART_GET_LSR(uart) & THRE))
1067                 barrier();
1068         UART_PUT_CHAR(uart, ch);
1069         SSYNC();
1070 }
1071
1072 /*
1073  * Interrupts are disabled on entering
1074  */
1075 static void
1076 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1077 {
1078         struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1079         int flags = 0;
1080
1081         spin_lock_irqsave(&uart->port.lock, flags);
1082         uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1083         spin_unlock_irqrestore(&uart->port.lock, flags);
1084
1085 }
1086
1087 static struct console bfin_serial_console = {
1088         .name           = BFIN_SERIAL_NAME,
1089         .write          = bfin_serial_console_write,
1090         .device         = uart_console_device,
1091         .setup          = bfin_serial_console_setup,
1092         .flags          = CON_PRINTBUFFER,
1093         .index          = -1,
1094         .data           = &bfin_serial_reg,
1095 };
1096
1097 static int __init bfin_serial_rs_console_init(void)
1098 {
1099         bfin_serial_init_ports();
1100         register_console(&bfin_serial_console);
1101 #ifdef CONFIG_KGDB_UART
1102         kgdb_entry_state = 0;
1103         init_kgdb_uart();
1104 #endif
1105         return 0;
1106 }
1107 console_initcall(bfin_serial_rs_console_init);
1108
1109 #define BFIN_SERIAL_CONSOLE     &bfin_serial_console
1110 #else
1111 #define BFIN_SERIAL_CONSOLE     NULL
1112 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1113
1114
1115 #ifdef CONFIG_EARLY_PRINTK
1116 static __init void early_serial_putc(struct uart_port *port, int ch)
1117 {
1118         unsigned timeout = 0xffff;
1119         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1120
1121         while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1122                 cpu_relax();
1123         UART_PUT_CHAR(uart, ch);
1124 }
1125
1126 static __init void early_serial_write(struct console *con, const char *s,
1127                                         unsigned int n)
1128 {
1129         struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1130         unsigned int i;
1131
1132         for (i = 0; i < n; i++, s++) {
1133                 if (*s == '\n')
1134                         early_serial_putc(&uart->port, '\r');
1135                 early_serial_putc(&uart->port, *s);
1136         }
1137 }
1138
1139 static struct __init console bfin_early_serial_console = {
1140         .name = "early_BFuart",
1141         .write = early_serial_write,
1142         .device = uart_console_device,
1143         .flags = CON_PRINTBUFFER,
1144         .setup = bfin_serial_console_setup,
1145         .index = -1,
1146         .data  = &bfin_serial_reg,
1147 };
1148
1149 struct console __init *bfin_earlyserial_init(unsigned int port,
1150                                                 unsigned int cflag)
1151 {
1152         struct bfin_serial_port *uart;
1153         struct ktermios t;
1154
1155         if (port == -1 || port >= nr_ports)
1156                 port = 0;
1157         bfin_serial_init_ports();
1158         bfin_early_serial_console.index = port;
1159         uart = &bfin_serial_ports[port];
1160         t.c_cflag = cflag;
1161         t.c_iflag = 0;
1162         t.c_oflag = 0;
1163         t.c_lflag = ICANON;
1164         t.c_line = port;
1165         bfin_serial_set_termios(&uart->port, &t, &t);
1166         return &bfin_early_serial_console;
1167 }
1168
1169 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1170
1171 static struct uart_driver bfin_serial_reg = {
1172         .owner                  = THIS_MODULE,
1173         .driver_name            = "bfin-uart",
1174         .dev_name               = BFIN_SERIAL_NAME,
1175         .major                  = BFIN_SERIAL_MAJOR,
1176         .minor                  = BFIN_SERIAL_MINOR,
1177         .nr                     = NR_PORTS,
1178         .cons                   = BFIN_SERIAL_CONSOLE,
1179 };
1180
1181 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1182 {
1183         struct bfin_serial_port *uart = platform_get_drvdata(dev);
1184
1185         if (uart)
1186                 uart_suspend_port(&bfin_serial_reg, &uart->port);
1187
1188         return 0;
1189 }
1190
1191 static int bfin_serial_resume(struct platform_device *dev)
1192 {
1193         struct bfin_serial_port *uart = platform_get_drvdata(dev);
1194
1195         if (uart)
1196                 uart_resume_port(&bfin_serial_reg, &uart->port);
1197
1198         return 0;
1199 }
1200
1201 static int bfin_serial_probe(struct platform_device *dev)
1202 {
1203         struct resource *res = dev->resource;
1204         int i;
1205
1206         for (i = 0; i < dev->num_resources; i++, res++)
1207                 if (res->flags & IORESOURCE_MEM)
1208                         break;
1209
1210         if (i < dev->num_resources) {
1211                 for (i = 0; i < nr_ports; i++, res++) {
1212                         if (bfin_serial_ports[i].port.mapbase != res->start)
1213                                 continue;
1214                         bfin_serial_ports[i].port.dev = &dev->dev;
1215                         uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1216                         platform_set_drvdata(dev, &bfin_serial_ports[i]);
1217                 }
1218         }
1219
1220         return 0;
1221 }
1222
1223 static int bfin_serial_remove(struct platform_device *pdev)
1224 {
1225         struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1226
1227
1228 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1229         gpio_free(uart->cts_pin);
1230         gpio_free(uart->rts_pin);
1231 #endif
1232
1233         platform_set_drvdata(pdev, NULL);
1234
1235         if (uart)
1236                 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1237
1238         return 0;
1239 }
1240
1241 static struct platform_driver bfin_serial_driver = {
1242         .probe          = bfin_serial_probe,
1243         .remove         = bfin_serial_remove,
1244         .suspend        = bfin_serial_suspend,
1245         .resume         = bfin_serial_resume,
1246         .driver         = {
1247                 .name   = "bfin-uart",
1248         },
1249 };
1250
1251 static int __init bfin_serial_init(void)
1252 {
1253         int ret;
1254 #ifdef CONFIG_KGDB_UART
1255         struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
1256         struct ktermios t;
1257 #endif
1258
1259         pr_info("Serial: Blackfin serial driver\n");
1260
1261         bfin_serial_init_ports();
1262
1263         ret = uart_register_driver(&bfin_serial_reg);
1264         if (ret == 0) {
1265                 ret = platform_driver_register(&bfin_serial_driver);
1266                 if (ret) {
1267                         pr_debug("uart register failed\n");
1268                         uart_unregister_driver(&bfin_serial_reg);
1269                 }
1270         }
1271 #ifdef CONFIG_KGDB_UART
1272         if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
1273                 request_irq(uart->port.irq, bfin_serial_rx_int,
1274                         IRQF_DISABLED, "BFIN_UART_RX", uart);
1275                 pr_info("Request irq for kgdb uart port\n");
1276 #ifdef CONFIG_BF54x
1277                 UART_SET_IER(uart, ERBFI);
1278 #else
1279                 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
1280 #endif
1281                 SSYNC();
1282                 t.c_cflag = CS8|B57600;
1283                 t.c_iflag = 0;
1284                 t.c_oflag = 0;
1285                 t.c_lflag = ICANON;
1286                 t.c_line = CONFIG_KGDB_UART_PORT;
1287                 bfin_serial_set_termios(&uart->port, &t, &t);
1288         }
1289 #endif
1290         return ret;
1291 }
1292
1293 static void __exit bfin_serial_exit(void)
1294 {
1295         platform_driver_unregister(&bfin_serial_driver);
1296         uart_unregister_driver(&bfin_serial_reg);
1297 }
1298
1299 module_init(bfin_serial_init);
1300 module_exit(bfin_serial_exit);
1301
1302 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1303 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1304 MODULE_LICENSE("GPL");
1305 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);