2 * File: drivers/serial/bfin_5xx.c
3 * Based on: Based on drivers/serial/sa1100.c
4 * Author: Aubrey Li <aubrey.li@analog.com>
7 * Description: Driver for blackfin 5xx serial ports
10 * Copyright 2006 Analog Devices Inc.
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
30 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
34 #include <linux/module.h>
35 #include <linux/ioport.h>
36 #include <linux/init.h>
37 #include <linux/console.h>
38 #include <linux/sysrq.h>
39 #include <linux/platform_device.h>
40 #include <linux/tty.h>
41 #include <linux/tty_flip.h>
42 #include <linux/serial_core.h>
44 #ifdef CONFIG_KGDB_UART
45 #include <linux/kgdb.h>
46 #include <asm/irq_regs.h>
50 #include <asm/mach/bfin_serial_5xx.h>
52 #ifdef CONFIG_SERIAL_BFIN_DMA
53 #include <linux/dma-mapping.h>
56 #include <asm/cacheflush.h>
59 /* UART name and device definitions */
60 #define BFIN_SERIAL_NAME "ttyBF"
61 #define BFIN_SERIAL_MAJOR 204
62 #define BFIN_SERIAL_MINOR 64
65 * Setup for console. Argument comes from the menuconfig
67 #define DMA_RX_XCOUNT 512
68 #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
70 #define DMA_RX_FLUSH_JIFFIES 5
72 #ifdef CONFIG_SERIAL_BFIN_DMA
73 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
75 static void bfin_serial_do_work(struct work_struct *work);
76 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
77 static void local_put_char(struct bfin_serial_port *uart, char ch);
80 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
83 * interrupts are disabled on entry
85 static void bfin_serial_stop_tx(struct uart_port *port)
87 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
89 #ifdef CONFIG_SERIAL_BFIN_DMA
90 disable_dma(uart->tx_dma_channel);
94 ier = UART_GET_IER(uart);
96 UART_PUT_IER(uart, ier);
101 * port is locked and interrupts are disabled
103 static void bfin_serial_start_tx(struct uart_port *port)
105 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
107 #ifdef CONFIG_SERIAL_BFIN_DMA
108 bfin_serial_dma_tx_chars(uart);
111 ier = UART_GET_IER(uart);
113 UART_PUT_IER(uart, ier);
114 bfin_serial_tx_chars(uart);
119 * Interrupts are enabled
121 static void bfin_serial_stop_rx(struct uart_port *port)
123 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
126 ier = UART_GET_IER(uart);
127 #ifdef CONFIG_KGDB_UART
128 if (uart->port.line != CONFIG_KGDB_UART_PORT)
131 UART_PUT_IER(uart, ier);
135 * Set the modem control timer to fire immediately.
137 static void bfin_serial_enable_ms(struct uart_port *port)
141 #ifdef CONFIG_KGDB_UART
142 static int kgdb_entry_state;
144 void kgdb_put_debug_char(int chr)
146 struct bfin_serial_port *uart;
148 if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
149 uart = &bfin_serial_ports[0];
151 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
153 while (!(UART_GET_LSR(uart) & THRE)) {
154 __builtin_bfin_ssync();
156 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
157 __builtin_bfin_ssync();
158 UART_PUT_CHAR(uart, (unsigned char)chr);
159 __builtin_bfin_ssync();
162 int kgdb_get_debug_char(void)
164 struct bfin_serial_port *uart;
167 if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
168 uart = &bfin_serial_ports[0];
170 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
172 while(!(UART_GET_LSR(uart) & DR)) {
173 __builtin_bfin_ssync();
175 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
176 __builtin_bfin_ssync();
177 chr = UART_GET_CHAR(uart);
178 __builtin_bfin_ssync();
184 #ifdef CONFIG_SERIAL_BFIN_PIO
185 static void local_put_char(struct bfin_serial_port *uart, char ch)
187 unsigned short status;
190 spin_lock_irqsave(&uart->port.lock, flags);
193 status = UART_GET_LSR(uart);
194 } while (!(status & THRE));
196 UART_PUT_CHAR(uart, ch);
199 spin_unlock_irqrestore(&uart->port.lock, flags);
202 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
204 struct tty_struct *tty = uart->port.info->tty;
205 unsigned int status, ch, flg;
206 #ifdef CONFIG_KGDB_UART
207 struct pt_regs *regs = get_irq_regs();
210 static int in_break = 0;
213 status = UART_GET_LSR(uart);
214 ch = UART_GET_CHAR(uart);
215 uart->port.icount.rx++;
217 #ifdef CONFIG_KGDB_UART
218 if (uart->port.line == CONFIG_KGDB_UART_PORT) {
219 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
220 kgdb_breakkey_pressed(regs);
222 } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
223 kgdb_entry_state = 1;
224 } else if (kgdb_entry_state == 1 && ch == 'q') {
225 kgdb_entry_state = 0;
226 kgdb_breakkey_pressed(regs);
228 } else if (ch == 0x3) {/* Ctrl + C */
229 kgdb_entry_state = 0;
230 kgdb_breakkey_pressed(regs);
233 kgdb_entry_state = 0;
239 /* The BF533 family of processors have a nice misbehavior where
240 * they continuously generate characters for a "single" break.
241 * We have to basically ignore this flood until the "next" valid
242 * character comes across. All other Blackfin families operate
248 ch = UART_GET_CHAR(uart);
249 if (bfin_revid() < 5)
260 uart->port.icount.brk++;
261 if (uart_handle_break(&uart->port))
263 status &= ~(PE | FE);
266 uart->port.icount.parity++;
268 uart->port.icount.overrun++;
270 uart->port.icount.frame++;
272 status &= uart->port.read_status_mask;
276 else if (status & PE)
278 else if (status & FE)
283 if (uart_handle_sysrq_char(&uart->port, ch))
286 uart_insert_char(&uart->port, status, OE, ch, flg);
289 tty_flip_buffer_push(tty);
292 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
294 struct circ_buf *xmit = &uart->port.info->xmit;
296 if (uart->port.x_char) {
297 UART_PUT_CHAR(uart, uart->port.x_char);
298 uart->port.icount.tx++;
299 uart->port.x_char = 0;
303 * Check the modem control lines before
304 * transmitting anything.
306 bfin_serial_mctrl_check(uart);
308 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
309 bfin_serial_stop_tx(&uart->port);
313 local_put_char(uart, xmit->buf[xmit->tail]);
314 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
315 uart->port.icount.tx++;
317 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
318 uart_write_wakeup(&uart->port);
320 if (uart_circ_empty(xmit))
321 bfin_serial_stop_tx(&uart->port);
324 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
326 struct bfin_serial_port *uart = dev_id;
328 spin_lock(&uart->port.lock);
329 while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_RX_READY)
330 bfin_serial_rx_chars(uart);
331 spin_unlock(&uart->port.lock);
335 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
337 struct bfin_serial_port *uart = dev_id;
339 spin_lock(&uart->port.lock);
340 while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_TX_READY)
341 bfin_serial_tx_chars(uart);
342 spin_unlock(&uart->port.lock);
347 static void bfin_serial_do_work(struct work_struct *work)
349 struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
351 bfin_serial_mctrl_check(uart);
356 #ifdef CONFIG_SERIAL_BFIN_DMA
357 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
359 struct circ_buf *xmit = &uart->port.info->xmit;
368 if (uart->port.x_char) {
369 UART_PUT_CHAR(uart, uart->port.x_char);
370 uart->port.icount.tx++;
371 uart->port.x_char = 0;
376 * Check the modem control lines before
377 * transmitting anything.
379 bfin_serial_mctrl_check(uart);
381 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
382 bfin_serial_stop_tx(&uart->port);
387 spin_lock_irqsave(&uart->port.lock, flags);
388 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
389 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
390 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
391 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
392 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
393 set_dma_config(uart->tx_dma_channel,
394 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
398 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
399 set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
400 set_dma_x_modify(uart->tx_dma_channel, 1);
401 enable_dma(uart->tx_dma_channel);
402 ier = UART_GET_IER(uart);
404 UART_PUT_IER(uart, ier);
405 spin_unlock_irqrestore(&uart->port.lock, flags);
408 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
410 struct tty_struct *tty = uart->port.info->tty;
413 status = UART_GET_LSR(uart);
414 uart->port.icount.rx += CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, UART_XMIT_SIZE);;
417 uart->port.icount.brk++;
418 if (uart_handle_break(&uart->port))
419 goto dma_ignore_char;
420 status &= ~(PE | FE);
423 uart->port.icount.parity++;
425 uart->port.icount.overrun++;
427 uart->port.icount.frame++;
429 status &= uart->port.read_status_mask;
433 else if (status & PE)
435 else if (status & FE)
440 for (i = uart->rx_dma_buf.head; i < uart->rx_dma_buf.tail; i++) {
441 if (uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
442 goto dma_ignore_char;
443 uart_insert_char(&uart->port, status, OE, uart->rx_dma_buf.buf[i], flg);
447 tty_flip_buffer_push(tty);
450 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
455 bfin_serial_dma_tx_chars(uart);
457 spin_lock_irqsave(&uart->port.lock, flags);
458 x_pos = DMA_RX_XCOUNT - get_dma_curr_xcount(uart->rx_dma_channel);
459 if (x_pos == DMA_RX_XCOUNT)
462 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
464 if (pos>uart->rx_dma_buf.tail) {
465 uart->rx_dma_buf.tail = pos;
466 bfin_serial_dma_rx_chars(uart);
467 uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
469 spin_unlock_irqrestore(&uart->port.lock, flags);
470 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
471 add_timer(&(uart->rx_dma_timer));
474 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
476 struct bfin_serial_port *uart = dev_id;
477 struct circ_buf *xmit = &uart->port.info->xmit;
480 spin_lock(&uart->port.lock);
481 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
482 clear_dma_irqstat(uart->tx_dma_channel);
483 disable_dma(uart->tx_dma_channel);
484 ier = UART_GET_IER(uart);
486 UART_PUT_IER(uart, ier);
487 xmit->tail = (xmit->tail+uart->tx_count) &(UART_XMIT_SIZE -1);
488 uart->port.icount.tx+=uart->tx_count;
490 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
491 uart_write_wakeup(&uart->port);
493 if (uart_circ_empty(xmit))
494 bfin_serial_stop_tx(&uart->port);
498 spin_unlock(&uart->port.lock);
502 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
504 struct bfin_serial_port *uart = dev_id;
505 unsigned short irqstat;
507 uart->rx_dma_nrows++;
508 if (uart->rx_dma_nrows == DMA_RX_YCOUNT) {
509 uart->rx_dma_nrows = 0;
510 uart->rx_dma_buf.tail = DMA_RX_XCOUNT*DMA_RX_YCOUNT;
511 bfin_serial_dma_rx_chars(uart);
512 uart->rx_dma_buf.head = uart->rx_dma_buf.tail = 0;
514 spin_lock(&uart->port.lock);
515 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
516 clear_dma_irqstat(uart->rx_dma_channel);
518 spin_unlock(&uart->port.lock);
524 * Return TIOCSER_TEMT when transmitter is not busy.
526 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
528 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
531 lsr = UART_GET_LSR(uart);
538 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
540 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
541 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
542 if (uart->cts_pin < 0)
543 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
545 if (gpio_get_value(uart->cts_pin))
546 return TIOCM_DSR | TIOCM_CAR;
549 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
552 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
554 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
555 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
556 if (uart->rts_pin < 0)
559 if (mctrl & TIOCM_RTS)
560 gpio_set_value(uart->rts_pin, 0);
562 gpio_set_value(uart->rts_pin, 1);
567 * Handle any change of modem status signal since we were last called.
569 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
571 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
573 # ifdef CONFIG_SERIAL_BFIN_DMA
574 struct uart_info *info = uart->port.info;
575 struct tty_struct *tty = info->tty;
577 status = bfin_serial_get_mctrl(&uart->port);
578 if (!(status & TIOCM_CTS)) {
584 status = bfin_serial_get_mctrl(&uart->port);
585 uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
586 if (!(status & TIOCM_CTS))
587 schedule_work(&uart->cts_workqueue);
593 * Interrupts are always disabled.
595 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
597 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
598 u16 lcr = UART_GET_LCR(uart);
603 UART_PUT_LCR(uart, lcr);
607 static int bfin_serial_startup(struct uart_port *port)
609 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
611 #ifdef CONFIG_SERIAL_BFIN_DMA
612 dma_addr_t dma_handle;
614 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
615 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
619 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
620 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
621 free_dma(uart->rx_dma_channel);
625 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
626 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
628 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
629 uart->rx_dma_buf.head = 0;
630 uart->rx_dma_buf.tail = 0;
631 uart->rx_dma_nrows = 0;
633 set_dma_config(uart->rx_dma_channel,
634 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
635 INTR_ON_ROW, DIMENSION_2D,
637 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
638 set_dma_x_modify(uart->rx_dma_channel, 1);
639 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
640 set_dma_y_modify(uart->rx_dma_channel, 1);
641 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
642 enable_dma(uart->rx_dma_channel);
644 uart->rx_dma_timer.data = (unsigned long)(uart);
645 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
646 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
647 add_timer(&(uart->rx_dma_timer));
649 # ifdef CONFIG_KGDB_UART
650 if (uart->port.line != CONFIG_KGDB_UART_PORT && request_irq
654 (uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
655 "BFIN_UART_RX", uart)) {
656 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
661 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
662 "BFIN_UART_TX", uart)) {
663 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
664 free_irq(uart->port.irq, uart);
668 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
672 static void bfin_serial_shutdown(struct uart_port *port)
674 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
676 #ifdef CONFIG_SERIAL_BFIN_DMA
677 disable_dma(uart->tx_dma_channel);
678 free_dma(uart->tx_dma_channel);
679 disable_dma(uart->rx_dma_channel);
680 free_dma(uart->rx_dma_channel);
681 del_timer(&(uart->rx_dma_timer));
683 #ifdef CONFIG_KGDB_UART
684 if (uart->port.line != CONFIG_KGDB_UART_PORT)
686 free_irq(uart->port.irq, uart);
687 free_irq(uart->port.irq+1, uart);
692 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
693 struct ktermios *old)
695 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
697 unsigned int baud, quot;
698 unsigned short val, ier, lsr, lcr = 0;
700 switch (termios->c_cflag & CSIZE) {
714 printk(KERN_ERR "%s: word lengh not supported\n",
718 if (termios->c_cflag & CSTOPB)
720 if (termios->c_cflag & PARENB)
722 if (!(termios->c_cflag & PARODD))
724 if (termios->c_cflag & CMSPAR)
727 port->read_status_mask = OE;
728 if (termios->c_iflag & INPCK)
729 port->read_status_mask |= (FE | PE);
730 if (termios->c_iflag & (BRKINT | PARMRK))
731 port->read_status_mask |= BI;
734 * Characters to ignore
736 port->ignore_status_mask = 0;
737 if (termios->c_iflag & IGNPAR)
738 port->ignore_status_mask |= FE | PE;
739 if (termios->c_iflag & IGNBRK) {
740 port->ignore_status_mask |= BI;
742 * If we're ignoring parity and break indicators,
743 * ignore overruns too (for real raw support).
745 if (termios->c_iflag & IGNPAR)
746 port->ignore_status_mask |= OE;
749 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
750 quot = uart_get_divisor(port, baud);
751 spin_lock_irqsave(&uart->port.lock, flags);
754 lsr = UART_GET_LSR(uart);
755 } while (!(lsr & TEMT));
758 ier = UART_GET_IER(uart);
759 UART_PUT_IER(uart, 0);
761 /* Set DLAB in LCR to Access DLL and DLH */
762 val = UART_GET_LCR(uart);
764 UART_PUT_LCR(uart, val);
767 UART_PUT_DLL(uart, quot & 0xFF);
769 UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
772 /* Clear DLAB in LCR to Access THR RBR IER */
773 val = UART_GET_LCR(uart);
775 UART_PUT_LCR(uart, val);
778 UART_PUT_LCR(uart, lcr);
781 UART_PUT_IER(uart, ier);
783 val = UART_GET_GCTL(uart);
785 UART_PUT_GCTL(uart, val);
787 spin_unlock_irqrestore(&uart->port.lock, flags);
790 static const char *bfin_serial_type(struct uart_port *port)
792 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
794 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
798 * Release the memory region(s) being used by 'port'.
800 static void bfin_serial_release_port(struct uart_port *port)
805 * Request the memory region(s) being used by 'port'.
807 static int bfin_serial_request_port(struct uart_port *port)
813 * Configure/autoconfigure the port.
815 static void bfin_serial_config_port(struct uart_port *port, int flags)
817 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
819 if (flags & UART_CONFIG_TYPE &&
820 bfin_serial_request_port(&uart->port) == 0)
821 uart->port.type = PORT_BFIN;
825 * Verify the new serial_struct (for TIOCSSERIAL).
826 * The only change we allow are to the flags and type, and
827 * even then only between PORT_BFIN and PORT_UNKNOWN
830 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
835 static struct uart_ops bfin_serial_pops = {
836 .tx_empty = bfin_serial_tx_empty,
837 .set_mctrl = bfin_serial_set_mctrl,
838 .get_mctrl = bfin_serial_get_mctrl,
839 .stop_tx = bfin_serial_stop_tx,
840 .start_tx = bfin_serial_start_tx,
841 .stop_rx = bfin_serial_stop_rx,
842 .enable_ms = bfin_serial_enable_ms,
843 .break_ctl = bfin_serial_break_ctl,
844 .startup = bfin_serial_startup,
845 .shutdown = bfin_serial_shutdown,
846 .set_termios = bfin_serial_set_termios,
847 .type = bfin_serial_type,
848 .release_port = bfin_serial_release_port,
849 .request_port = bfin_serial_request_port,
850 .config_port = bfin_serial_config_port,
851 .verify_port = bfin_serial_verify_port,
854 static void __init bfin_serial_init_ports(void)
856 static int first = 1;
863 for (i = 0; i < nr_ports; i++) {
864 bfin_serial_ports[i].port.uartclk = get_sclk();
865 bfin_serial_ports[i].port.ops = &bfin_serial_pops;
866 bfin_serial_ports[i].port.line = i;
867 bfin_serial_ports[i].port.iotype = UPIO_MEM;
868 bfin_serial_ports[i].port.membase =
869 (void __iomem *)bfin_serial_resource[i].uart_base_addr;
870 bfin_serial_ports[i].port.mapbase =
871 bfin_serial_resource[i].uart_base_addr;
872 bfin_serial_ports[i].port.irq =
873 bfin_serial_resource[i].uart_irq;
874 bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
875 #ifdef CONFIG_SERIAL_BFIN_DMA
876 bfin_serial_ports[i].tx_done = 1;
877 bfin_serial_ports[i].tx_count = 0;
878 bfin_serial_ports[i].tx_dma_channel =
879 bfin_serial_resource[i].uart_tx_dma_channel;
880 bfin_serial_ports[i].rx_dma_channel =
881 bfin_serial_resource[i].uart_rx_dma_channel;
882 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
884 INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
886 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
887 bfin_serial_ports[i].cts_pin =
888 bfin_serial_resource[i].uart_cts_pin;
889 bfin_serial_ports[i].rts_pin =
890 bfin_serial_resource[i].uart_rts_pin;
892 bfin_serial_hw_init(&bfin_serial_ports[i]);
897 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
898 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
900 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
901 while (!(UART_GET_LSR(uart)))
903 UART_PUT_CHAR(uart, ch);
908 * Interrupts are disabled on entering
911 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
913 struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
916 spin_lock_irqsave(&uart->port.lock, flags);
917 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
918 spin_unlock_irqrestore(&uart->port.lock, flags);
923 * If the port was already initialised (eg, by a boot loader),
924 * try to determine the current setup.
927 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
928 int *parity, int *bits)
930 unsigned short status;
932 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
933 if (status == (ERBFI | ETBEI)) {
934 /* ok, the port was enabled */
935 unsigned short lcr, val;
936 unsigned short dlh, dll;
938 lcr = UART_GET_LCR(uart);
947 switch (lcr & 0x03) {
948 case 0: *bits = 5; break;
949 case 1: *bits = 6; break;
950 case 2: *bits = 7; break;
951 case 3: *bits = 8; break;
953 /* Set DLAB in LCR to Access DLL and DLH */
954 val = UART_GET_LCR(uart);
956 UART_PUT_LCR(uart, val);
958 dll = UART_GET_DLL(uart);
959 dlh = UART_GET_DLH(uart);
961 /* Clear DLAB in LCR to Access THR RBR IER */
962 val = UART_GET_LCR(uart);
964 UART_PUT_LCR(uart, val);
966 *baud = get_sclk() / (16*(dll | dlh << 8));
968 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
972 bfin_serial_console_setup(struct console *co, char *options)
974 struct bfin_serial_port *uart;
978 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
985 * Check whether an invalid uart number has been specified, and
986 * if so, search for the first available port that does have
989 if (co->index == -1 || co->index >= nr_ports)
991 uart = &bfin_serial_ports[co->index];
994 uart_parse_options(options, &baud, &parity, &bits, &flow);
996 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
998 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1001 static struct uart_driver bfin_serial_reg;
1002 static struct console bfin_serial_console = {
1003 .name = BFIN_SERIAL_NAME,
1004 .write = bfin_serial_console_write,
1005 .device = uart_console_device,
1006 .setup = bfin_serial_console_setup,
1007 .flags = CON_PRINTBUFFER,
1009 .data = &bfin_serial_reg,
1012 static int __init bfin_serial_rs_console_init(void)
1014 bfin_serial_init_ports();
1015 register_console(&bfin_serial_console);
1016 #ifdef CONFIG_KGDB_UART
1017 kgdb_entry_state = 0;
1022 console_initcall(bfin_serial_rs_console_init);
1024 #define BFIN_SERIAL_CONSOLE &bfin_serial_console
1026 #define BFIN_SERIAL_CONSOLE NULL
1029 static struct uart_driver bfin_serial_reg = {
1030 .owner = THIS_MODULE,
1031 .driver_name = "bfin-uart",
1032 .dev_name = BFIN_SERIAL_NAME,
1033 .major = BFIN_SERIAL_MAJOR,
1034 .minor = BFIN_SERIAL_MINOR,
1036 .cons = BFIN_SERIAL_CONSOLE,
1039 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1041 struct bfin_serial_port *uart = platform_get_drvdata(dev);
1044 uart_suspend_port(&bfin_serial_reg, &uart->port);
1049 static int bfin_serial_resume(struct platform_device *dev)
1051 struct bfin_serial_port *uart = platform_get_drvdata(dev);
1054 uart_resume_port(&bfin_serial_reg, &uart->port);
1059 static int bfin_serial_probe(struct platform_device *dev)
1061 struct resource *res = dev->resource;
1064 for (i = 0; i < dev->num_resources; i++, res++)
1065 if (res->flags & IORESOURCE_MEM)
1068 if (i < dev->num_resources) {
1069 for (i = 0; i < nr_ports; i++, res++) {
1070 if (bfin_serial_ports[i].port.mapbase != res->start)
1072 bfin_serial_ports[i].port.dev = &dev->dev;
1073 uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1074 platform_set_drvdata(dev, &bfin_serial_ports[i]);
1081 static int bfin_serial_remove(struct platform_device *pdev)
1083 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1086 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1087 gpio_free(uart->cts_pin);
1088 gpio_free(uart->rts_pin);
1091 platform_set_drvdata(pdev, NULL);
1094 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1099 static struct platform_driver bfin_serial_driver = {
1100 .probe = bfin_serial_probe,
1101 .remove = bfin_serial_remove,
1102 .suspend = bfin_serial_suspend,
1103 .resume = bfin_serial_resume,
1105 .name = "bfin-uart",
1109 static int __init bfin_serial_init(void)
1112 #ifdef CONFIG_KGDB_UART
1113 struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
1117 pr_info("Serial: Blackfin serial driver\n");
1119 bfin_serial_init_ports();
1121 ret = uart_register_driver(&bfin_serial_reg);
1123 ret = platform_driver_register(&bfin_serial_driver);
1125 pr_debug("uart register failed\n");
1126 uart_unregister_driver(&bfin_serial_reg);
1129 #ifdef CONFIG_KGDB_UART
1130 if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
1131 request_irq(uart->port.irq, bfin_serial_int,
1132 IRQF_DISABLED, "BFIN_UART_RX", uart);
1133 pr_info("Request irq for kgdb uart port\n");
1134 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
1135 __builtin_bfin_ssync();
1136 t.c_cflag = CS8|B57600;
1140 t.c_line = CONFIG_KGDB_UART_PORT;
1141 bfin_serial_set_termios(&uart->port, &t, &t);
1147 static void __exit bfin_serial_exit(void)
1149 platform_driver_unregister(&bfin_serial_driver);
1150 uart_unregister_driver(&bfin_serial_reg);
1153 module_init(bfin_serial_init);
1154 module_exit(bfin_serial_exit);
1156 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1157 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1158 MODULE_LICENSE("GPL");
1159 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);