2 * linux/drivers/char/8250.c
4 * Driver for 8250/16550-type serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright (C) 2001 Russell King.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * A note about mapbase / membase
17 * mapbase is the physical address of the IO port.
18 * membase is an 'ioremapped' cookie.
21 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
25 #include <linux/module.h>
26 #include <linux/moduleparam.h>
27 #include <linux/ioport.h>
28 #include <linux/init.h>
29 #include <linux/console.h>
30 #include <linux/sysrq.h>
31 #include <linux/delay.h>
32 #include <linux/platform_device.h>
33 #include <linux/tty.h>
34 #include <linux/tty_flip.h>
35 #include <linux/serial_reg.h>
36 #include <linux/serial_core.h>
37 #include <linux/serial.h>
38 #include <linux/serial_8250.h>
39 #include <linux/nmi.h>
40 #include <linux/mutex.h>
53 * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
54 * is unsafe when used on edge-triggered interrupts.
56 static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
58 static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;
64 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
66 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
70 #define DEBUG_INTR(fmt...) printk(fmt)
72 #define DEBUG_INTR(fmt...) do { } while (0)
75 #define PASS_LIMIT 256
78 * We default to IRQ0 for the "no irq" hack. Some
79 * machine types want others as well - they're free
80 * to redefine this in their header file.
82 #define is_real_interrupt(irq) ((irq) != 0)
84 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
85 #define CONFIG_SERIAL_DETECT_IRQ 1
87 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
88 #define CONFIG_SERIAL_MANY_PORTS 1
92 * HUB6 is always on. This will be removed once the header
93 * files have been cleaned.
97 #include <asm/serial.h>
99 * SERIAL_PORT_DFNS tells us about built-in ports that have no
100 * standard enumeration mechanism. Platforms that can find all
101 * serial ports via mechanisms like ACPI or PCI need not supply it.
103 #ifndef SERIAL_PORT_DFNS
104 #define SERIAL_PORT_DFNS
107 static const struct old_serial_port old_serial_port[] = {
108 SERIAL_PORT_DFNS /* defined in asm/serial.h */
111 #define UART_NR CONFIG_SERIAL_8250_NR_UARTS
113 #ifdef CONFIG_SERIAL_8250_RSA
115 #define PORT_RSA_MAX 4
116 static unsigned long probe_rsa[PORT_RSA_MAX];
117 static unsigned int probe_rsa_count;
118 #endif /* CONFIG_SERIAL_8250_RSA */
120 struct uart_8250_port {
121 struct uart_port port;
122 struct timer_list timer; /* "no irq" timer */
123 struct list_head list; /* ports on this IRQ */
124 unsigned short capabilities; /* port capabilities */
125 unsigned short bugs; /* port bugs */
126 unsigned int tx_loadsz; /* transmit fifo load size */
131 unsigned char mcr_mask; /* mask of user bits */
132 unsigned char mcr_force; /* mask of forced bits */
135 * Some bits in registers are cleared on a read, so they must
136 * be saved whenever the register is read but the bits will not
137 * be immediately processed.
139 #define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS
140 unsigned char lsr_saved_flags;
141 #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
142 unsigned char msr_saved_flags;
145 * We provide a per-port pm hook.
147 void (*pm)(struct uart_port *port,
148 unsigned int state, unsigned int old);
153 struct list_head *head;
156 static struct irq_info irq_lists[NR_IRQS];
159 * Here we define the default xmit fifo size used for each type of UART.
161 static const struct serial8250_config uart_config[] = {
186 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
187 .flags = UART_CAP_FIFO,
198 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
204 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
206 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
212 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
214 .flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
222 .name = "16C950/954",
225 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
226 .flags = UART_CAP_FIFO,
232 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
234 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
240 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
241 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
247 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
248 .flags = UART_CAP_FIFO,
254 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
255 .flags = UART_CAP_FIFO | UART_NATSEMI,
261 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
262 .flags = UART_CAP_FIFO | UART_CAP_UUE,
268 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
269 .flags = UART_CAP_FIFO,
273 #if defined (CONFIG_SERIAL_8250_AU1X00)
275 /* Au1x00 UART hardware has a weird register layout */
276 static const u8 au_io_in_map[] = {
286 static const u8 au_io_out_map[] = {
294 /* sane hardware needs no mapping */
295 static inline int map_8250_in_reg(struct uart_8250_port *up, int offset)
297 if (up->port.iotype != UPIO_AU)
299 return au_io_in_map[offset];
302 static inline int map_8250_out_reg(struct uart_8250_port *up, int offset)
304 if (up->port.iotype != UPIO_AU)
306 return au_io_out_map[offset];
309 #elif defined(CONFIG_SERIAL_8250_RM9K)
333 static inline int map_8250_in_reg(struct uart_8250_port *up, int offset)
335 if (up->port.iotype != UPIO_RM9000)
337 return regmap_in[offset];
340 static inline int map_8250_out_reg(struct uart_8250_port *up, int offset)
342 if (up->port.iotype != UPIO_RM9000)
344 return regmap_out[offset];
349 /* sane hardware needs no mapping */
350 #define map_8250_in_reg(up, offset) (offset)
351 #define map_8250_out_reg(up, offset) (offset)
355 static unsigned int serial_in(struct uart_8250_port *up, int offset)
358 offset = map_8250_in_reg(up, offset) << up->port.regshift;
360 switch (up->port.iotype) {
362 outb(up->port.hub6 - 1 + offset, up->port.iobase);
363 return inb(up->port.iobase + 1);
367 return readb(up->port.membase + offset);
371 return readl(up->port.membase + offset);
373 #ifdef CONFIG_SERIAL_8250_AU1X00
375 return __raw_readl(up->port.membase + offset);
379 if (offset == UART_IIR) {
380 tmp = readl(up->port.membase + (UART_IIR & ~3));
381 return (tmp >> 16) & 0xff; /* UART_IIR % 4 == 2 */
383 return readb(up->port.membase + offset);
386 return inb(up->port.iobase + offset);
391 serial_out(struct uart_8250_port *up, int offset, int value)
393 /* Save the offset before it's remapped */
394 int save_offset = offset;
395 offset = map_8250_out_reg(up, offset) << up->port.regshift;
397 switch (up->port.iotype) {
399 outb(up->port.hub6 - 1 + offset, up->port.iobase);
400 outb(value, up->port.iobase + 1);
404 writeb(value, up->port.membase + offset);
409 writel(value, up->port.membase + offset);
412 #ifdef CONFIG_SERIAL_8250_AU1X00
414 __raw_writel(value, up->port.membase + offset);
418 if (!((offset == UART_IER) && (value & UART_IER_UUE)))
419 writeb(value, up->port.membase + offset);
423 /* Save the LCR value so it can be re-written when a
424 * Busy Detect interrupt occurs. */
425 if (save_offset == UART_LCR)
427 writeb(value, up->port.membase + offset);
428 /* Read the IER to ensure any interrupt is cleared before
429 * returning from ISR. */
430 if (save_offset == UART_TX || save_offset == UART_IER)
431 value = serial_in(up, UART_IER);
435 outb(value, up->port.iobase + offset);
440 serial_out_sync(struct uart_8250_port *up, int offset, int value)
442 switch (up->port.iotype) {
445 #ifdef CONFIG_SERIAL_8250_AU1X00
449 serial_out(up, offset, value);
450 serial_in(up, UART_LCR); /* safe, no side-effects */
453 serial_out(up, offset, value);
458 * We used to support using pause I/O for certain machines. We
459 * haven't supported this for a while, but just in case it's badly
460 * needed for certain old 386 machines, I've left these #define's
463 #define serial_inp(up, offset) serial_in(up, offset)
464 #define serial_outp(up, offset, value) serial_out(up, offset, value)
466 /* Uart divisor latch read */
467 static inline int _serial_dl_read(struct uart_8250_port *up)
469 return serial_inp(up, UART_DLL) | serial_inp(up, UART_DLM) << 8;
472 /* Uart divisor latch write */
473 static inline void _serial_dl_write(struct uart_8250_port *up, int value)
475 serial_outp(up, UART_DLL, value & 0xff);
476 serial_outp(up, UART_DLM, value >> 8 & 0xff);
479 #if defined(CONFIG_SERIAL_8250_AU1X00)
480 /* Au1x00 haven't got a standard divisor latch */
481 static int serial_dl_read(struct uart_8250_port *up)
483 if (up->port.iotype == UPIO_AU)
484 return __raw_readl(up->port.membase + 0x28);
486 return _serial_dl_read(up);
489 static void serial_dl_write(struct uart_8250_port *up, int value)
491 if (up->port.iotype == UPIO_AU)
492 __raw_writel(value, up->port.membase + 0x28);
494 _serial_dl_write(up, value);
496 #elif defined(CONFIG_SERIAL_8250_RM9K)
497 static int serial_dl_read(struct uart_8250_port *up)
499 return (up->port.iotype == UPIO_RM9000) ?
500 (((__raw_readl(up->port.membase + 0x10) << 8) |
501 (__raw_readl(up->port.membase + 0x08) & 0xff)) & 0xffff) :
505 static void serial_dl_write(struct uart_8250_port *up, int value)
507 if (up->port.iotype == UPIO_RM9000) {
508 __raw_writel(value, up->port.membase + 0x08);
509 __raw_writel(value >> 8, up->port.membase + 0x10);
511 _serial_dl_write(up, value);
515 #define serial_dl_read(up) _serial_dl_read(up)
516 #define serial_dl_write(up, value) _serial_dl_write(up, value)
522 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
524 serial_out(up, UART_SCR, offset);
525 serial_out(up, UART_ICR, value);
528 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
532 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
533 serial_out(up, UART_SCR, offset);
534 value = serial_in(up, UART_ICR);
535 serial_icr_write(up, UART_ACR, up->acr);
543 static void serial8250_clear_fifos(struct uart_8250_port *p)
545 if (p->capabilities & UART_CAP_FIFO) {
546 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO);
547 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO |
548 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
549 serial_outp(p, UART_FCR, 0);
554 * IER sleep support. UARTs which have EFRs need the "extended
555 * capability" bit enabled. Note that on XR16C850s, we need to
556 * reset LCR to write to IER.
558 static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
560 if (p->capabilities & UART_CAP_SLEEP) {
561 if (p->capabilities & UART_CAP_EFR) {
562 serial_outp(p, UART_LCR, 0xBF);
563 serial_outp(p, UART_EFR, UART_EFR_ECB);
564 serial_outp(p, UART_LCR, 0);
566 serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
567 if (p->capabilities & UART_CAP_EFR) {
568 serial_outp(p, UART_LCR, 0xBF);
569 serial_outp(p, UART_EFR, 0);
570 serial_outp(p, UART_LCR, 0);
575 #ifdef CONFIG_SERIAL_8250_RSA
577 * Attempts to turn on the RSA FIFO. Returns zero on failure.
578 * We set the port uart clock rate if we succeed.
580 static int __enable_rsa(struct uart_8250_port *up)
585 mode = serial_inp(up, UART_RSA_MSR);
586 result = mode & UART_RSA_MSR_FIFO;
589 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
590 mode = serial_inp(up, UART_RSA_MSR);
591 result = mode & UART_RSA_MSR_FIFO;
595 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
600 static void enable_rsa(struct uart_8250_port *up)
602 if (up->port.type == PORT_RSA) {
603 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
604 spin_lock_irq(&up->port.lock);
606 spin_unlock_irq(&up->port.lock);
608 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
609 serial_outp(up, UART_RSA_FRR, 0);
614 * Attempts to turn off the RSA FIFO. Returns zero on failure.
615 * It is unknown why interrupts were disabled in here. However,
616 * the caller is expected to preserve this behaviour by grabbing
617 * the spinlock before calling this function.
619 static void disable_rsa(struct uart_8250_port *up)
624 if (up->port.type == PORT_RSA &&
625 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
626 spin_lock_irq(&up->port.lock);
628 mode = serial_inp(up, UART_RSA_MSR);
629 result = !(mode & UART_RSA_MSR_FIFO);
632 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
633 mode = serial_inp(up, UART_RSA_MSR);
634 result = !(mode & UART_RSA_MSR_FIFO);
638 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
639 spin_unlock_irq(&up->port.lock);
642 #endif /* CONFIG_SERIAL_8250_RSA */
645 * This is a quickie test to see how big the FIFO is.
646 * It doesn't work at all the time, more's the pity.
648 static int size_fifo(struct uart_8250_port *up)
650 unsigned char old_fcr, old_mcr, old_lcr;
651 unsigned short old_dl;
654 old_lcr = serial_inp(up, UART_LCR);
655 serial_outp(up, UART_LCR, 0);
656 old_fcr = serial_inp(up, UART_FCR);
657 old_mcr = serial_inp(up, UART_MCR);
658 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
659 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
660 serial_outp(up, UART_MCR, UART_MCR_LOOP);
661 serial_outp(up, UART_LCR, UART_LCR_DLAB);
662 old_dl = serial_dl_read(up);
663 serial_dl_write(up, 0x0001);
664 serial_outp(up, UART_LCR, 0x03);
665 for (count = 0; count < 256; count++)
666 serial_outp(up, UART_TX, count);
667 mdelay(20);/* FIXME - schedule_timeout */
668 for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) &&
669 (count < 256); count++)
670 serial_inp(up, UART_RX);
671 serial_outp(up, UART_FCR, old_fcr);
672 serial_outp(up, UART_MCR, old_mcr);
673 serial_outp(up, UART_LCR, UART_LCR_DLAB);
674 serial_dl_write(up, old_dl);
675 serial_outp(up, UART_LCR, old_lcr);
681 * Read UART ID using the divisor method - set DLL and DLM to zero
682 * and the revision will be in DLL and device type in DLM. We
683 * preserve the device state across this.
685 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
687 unsigned char old_dll, old_dlm, old_lcr;
690 old_lcr = serial_inp(p, UART_LCR);
691 serial_outp(p, UART_LCR, UART_LCR_DLAB);
693 old_dll = serial_inp(p, UART_DLL);
694 old_dlm = serial_inp(p, UART_DLM);
696 serial_outp(p, UART_DLL, 0);
697 serial_outp(p, UART_DLM, 0);
699 id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;
701 serial_outp(p, UART_DLL, old_dll);
702 serial_outp(p, UART_DLM, old_dlm);
703 serial_outp(p, UART_LCR, old_lcr);
709 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
710 * When this function is called we know it is at least a StarTech
711 * 16650 V2, but it might be one of several StarTech UARTs, or one of
712 * its clones. (We treat the broken original StarTech 16650 V1 as a
713 * 16550, and why not? Startech doesn't seem to even acknowledge its
716 * What evil have men's minds wrought...
718 static void autoconfig_has_efr(struct uart_8250_port *up)
720 unsigned int id1, id2, id3, rev;
723 * Everything with an EFR has SLEEP
725 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
728 * First we check to see if it's an Oxford Semiconductor UART.
730 * If we have to do this here because some non-National
731 * Semiconductor clone chips lock up if you try writing to the
732 * LSR register (which serial_icr_read does)
736 * Check for Oxford Semiconductor 16C950.
738 * EFR [4] must be set else this test fails.
740 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
741 * claims that it's needed for 952 dual UART's (which are not
742 * recommended for new designs).
745 serial_out(up, UART_LCR, 0xBF);
746 serial_out(up, UART_EFR, UART_EFR_ECB);
747 serial_out(up, UART_LCR, 0x00);
748 id1 = serial_icr_read(up, UART_ID1);
749 id2 = serial_icr_read(up, UART_ID2);
750 id3 = serial_icr_read(up, UART_ID3);
751 rev = serial_icr_read(up, UART_REV);
753 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
755 if (id1 == 0x16 && id2 == 0xC9 &&
756 (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
757 up->port.type = PORT_16C950;
760 * Enable work around for the Oxford Semiconductor 952 rev B
761 * chip which causes it to seriously miscalculate baud rates
764 if (id3 == 0x52 && rev == 0x01)
765 up->bugs |= UART_BUG_QUOT;
770 * We check for a XR16C850 by setting DLL and DLM to 0, and then
771 * reading back DLL and DLM. The chip type depends on the DLM
773 * 0x10 - XR16C850 and the DLL contains the chip revision.
777 id1 = autoconfig_read_divisor_id(up);
778 DEBUG_AUTOCONF("850id=%04x ", id1);
781 if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
782 up->port.type = PORT_16850;
787 * It wasn't an XR16C850.
789 * We distinguish between the '654 and the '650 by counting
790 * how many bytes are in the FIFO. I'm using this for now,
791 * since that's the technique that was sent to me in the
792 * serial driver update, but I'm not convinced this works.
793 * I've had problems doing this in the past. -TYT
795 if (size_fifo(up) == 64)
796 up->port.type = PORT_16654;
798 up->port.type = PORT_16650V2;
802 * We detected a chip without a FIFO. Only two fall into
803 * this category - the original 8250 and the 16450. The
804 * 16450 has a scratch register (accessible with LCR=0)
806 static void autoconfig_8250(struct uart_8250_port *up)
808 unsigned char scratch, status1, status2;
810 up->port.type = PORT_8250;
812 scratch = serial_in(up, UART_SCR);
813 serial_outp(up, UART_SCR, 0xa5);
814 status1 = serial_in(up, UART_SCR);
815 serial_outp(up, UART_SCR, 0x5a);
816 status2 = serial_in(up, UART_SCR);
817 serial_outp(up, UART_SCR, scratch);
819 if (status1 == 0xa5 && status2 == 0x5a)
820 up->port.type = PORT_16450;
823 static int broken_efr(struct uart_8250_port *up)
826 * Exar ST16C2550 "A2" devices incorrectly detect as
827 * having an EFR, and report an ID of 0x0201. See
828 * http://www.exar.com/info.php?pdf=dan180_oct2004.pdf
830 if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
837 * We know that the chip has FIFOs. Does it have an EFR? The
838 * EFR is located in the same register position as the IIR and
839 * we know the top two bits of the IIR are currently set. The
840 * EFR should contain zero. Try to read the EFR.
842 static void autoconfig_16550a(struct uart_8250_port *up)
844 unsigned char status1, status2;
845 unsigned int iersave;
847 up->port.type = PORT_16550A;
848 up->capabilities |= UART_CAP_FIFO;
851 * Check for presence of the EFR when DLAB is set.
852 * Only ST16C650V1 UARTs pass this test.
854 serial_outp(up, UART_LCR, UART_LCR_DLAB);
855 if (serial_in(up, UART_EFR) == 0) {
856 serial_outp(up, UART_EFR, 0xA8);
857 if (serial_in(up, UART_EFR) != 0) {
858 DEBUG_AUTOCONF("EFRv1 ");
859 up->port.type = PORT_16650;
860 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
862 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
864 serial_outp(up, UART_EFR, 0);
869 * Maybe it requires 0xbf to be written to the LCR.
870 * (other ST16C650V2 UARTs, TI16C752A, etc)
872 serial_outp(up, UART_LCR, 0xBF);
873 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
874 DEBUG_AUTOCONF("EFRv2 ");
875 autoconfig_has_efr(up);
880 * Check for a National Semiconductor SuperIO chip.
881 * Attempt to switch to bank 2, read the value of the LOOP bit
882 * from EXCR1. Switch back to bank 0, change it in MCR. Then
883 * switch back to bank 2, read it from EXCR1 again and check
884 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
886 serial_outp(up, UART_LCR, 0);
887 status1 = serial_in(up, UART_MCR);
888 serial_outp(up, UART_LCR, 0xE0);
889 status2 = serial_in(up, 0x02); /* EXCR1 */
891 if (!((status2 ^ status1) & UART_MCR_LOOP)) {
892 serial_outp(up, UART_LCR, 0);
893 serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP);
894 serial_outp(up, UART_LCR, 0xE0);
895 status2 = serial_in(up, 0x02); /* EXCR1 */
896 serial_outp(up, UART_LCR, 0);
897 serial_outp(up, UART_MCR, status1);
899 if ((status2 ^ status1) & UART_MCR_LOOP) {
902 serial_outp(up, UART_LCR, 0xE0);
904 quot = serial_dl_read(up);
907 status1 = serial_in(up, 0x04); /* EXCR2 */
908 status1 &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
909 status1 |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
910 serial_outp(up, 0x04, status1);
912 serial_dl_write(up, quot);
914 serial_outp(up, UART_LCR, 0);
916 up->port.uartclk = 921600*16;
917 up->port.type = PORT_NS16550A;
918 up->capabilities |= UART_NATSEMI;
924 * No EFR. Try to detect a TI16750, which only sets bit 5 of
925 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
926 * Try setting it with and without DLAB set. Cheap clones
927 * set bit 5 without DLAB set.
929 serial_outp(up, UART_LCR, 0);
930 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
931 status1 = serial_in(up, UART_IIR) >> 5;
932 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
933 serial_outp(up, UART_LCR, UART_LCR_DLAB);
934 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
935 status2 = serial_in(up, UART_IIR) >> 5;
936 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
937 serial_outp(up, UART_LCR, 0);
939 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
941 if (status1 == 6 && status2 == 7) {
942 up->port.type = PORT_16750;
943 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
948 * Try writing and reading the UART_IER_UUE bit (b6).
949 * If it works, this is probably one of the Xscale platform's
951 * We're going to explicitly set the UUE bit to 0 before
952 * trying to write and read a 1 just to make sure it's not
953 * already a 1 and maybe locked there before we even start start.
955 iersave = serial_in(up, UART_IER);
956 serial_outp(up, UART_IER, iersave & ~UART_IER_UUE);
957 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
959 * OK it's in a known zero state, try writing and reading
960 * without disturbing the current state of the other bits.
962 serial_outp(up, UART_IER, iersave | UART_IER_UUE);
963 if (serial_in(up, UART_IER) & UART_IER_UUE) {
966 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
968 DEBUG_AUTOCONF("Xscale ");
969 up->port.type = PORT_XSCALE;
970 up->capabilities |= UART_CAP_UUE;
975 * If we got here we couldn't force the IER_UUE bit to 0.
976 * Log it and continue.
978 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
980 serial_outp(up, UART_IER, iersave);
984 * This routine is called by rs_init() to initialize a specific serial
985 * port. It determines what type of UART chip this serial port is
986 * using: 8250, 16450, 16550, 16550A. The important question is
987 * whether or not this UART is a 16550A or not, since this will
988 * determine whether or not we can use its FIFO features or not.
990 static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
992 unsigned char status1, scratch, scratch2, scratch3;
993 unsigned char save_lcr, save_mcr;
996 if (!up->port.iobase && !up->port.mapbase && !up->port.membase)
999 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%p): ",
1000 up->port.line, up->port.iobase, up->port.membase);
1003 * We really do need global IRQs disabled here - we're going to
1004 * be frobbing the chips IRQ enable register to see if it exists.
1006 spin_lock_irqsave(&up->port.lock, flags);
1008 up->capabilities = 0;
1011 if (!(up->port.flags & UPF_BUGGY_UART)) {
1013 * Do a simple existence test first; if we fail this,
1014 * there's no point trying anything else.
1016 * 0x80 is used as a nonsense port to prevent against
1017 * false positives due to ISA bus float. The
1018 * assumption is that 0x80 is a non-existent port;
1019 * which should be safe since include/asm/io.h also
1020 * makes this assumption.
1022 * Note: this is safe as long as MCR bit 4 is clear
1023 * and the device is in "PC" mode.
1025 scratch = serial_inp(up, UART_IER);
1026 serial_outp(up, UART_IER, 0);
1031 * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
1032 * 16C754B) allow only to modify them if an EFR bit is set.
1034 scratch2 = serial_inp(up, UART_IER) & 0x0f;
1035 serial_outp(up, UART_IER, 0x0F);
1039 scratch3 = serial_inp(up, UART_IER) & 0x0f;
1040 serial_outp(up, UART_IER, scratch);
1041 if (scratch2 != 0 || scratch3 != 0x0F) {
1043 * We failed; there's nothing here
1045 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
1046 scratch2, scratch3);
1051 save_mcr = serial_in(up, UART_MCR);
1052 save_lcr = serial_in(up, UART_LCR);
1055 * Check to see if a UART is really there. Certain broken
1056 * internal modems based on the Rockwell chipset fail this
1057 * test, because they apparently don't implement the loopback
1058 * test mode. So this test is skipped on the COM 1 through
1059 * COM 4 ports. This *should* be safe, since no board
1060 * manufacturer would be stupid enough to design a board
1061 * that conflicts with COM 1-4 --- we hope!
1063 if (!(up->port.flags & UPF_SKIP_TEST)) {
1064 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1065 status1 = serial_inp(up, UART_MSR) & 0xF0;
1066 serial_outp(up, UART_MCR, save_mcr);
1067 if (status1 != 0x90) {
1068 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
1075 * We're pretty sure there's a port here. Lets find out what
1076 * type of port it is. The IIR top two bits allows us to find
1077 * out if it's 8250 or 16450, 16550, 16550A or later. This
1078 * determines what we test for next.
1080 * We also initialise the EFR (if any) to zero for later. The
1081 * EFR occupies the same register location as the FCR and IIR.
1083 serial_outp(up, UART_LCR, 0xBF);
1084 serial_outp(up, UART_EFR, 0);
1085 serial_outp(up, UART_LCR, 0);
1087 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1088 scratch = serial_in(up, UART_IIR) >> 6;
1090 DEBUG_AUTOCONF("iir=%d ", scratch);
1094 autoconfig_8250(up);
1097 up->port.type = PORT_UNKNOWN;
1100 up->port.type = PORT_16550;
1103 autoconfig_16550a(up);
1107 #ifdef CONFIG_SERIAL_8250_RSA
1109 * Only probe for RSA ports if we got the region.
1111 if (up->port.type == PORT_16550A && probeflags & PROBE_RSA) {
1114 for (i = 0 ; i < probe_rsa_count; ++i) {
1115 if (probe_rsa[i] == up->port.iobase &&
1117 up->port.type = PORT_RSA;
1124 #ifdef CONFIG_SERIAL_8250_AU1X00
1125 /* if access method is AU, it is a 16550 with a quirk */
1126 if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)
1127 up->bugs |= UART_BUG_NOMSR;
1130 serial_outp(up, UART_LCR, save_lcr);
1132 if (up->capabilities != uart_config[up->port.type].flags) {
1134 "ttyS%d: detected caps %08x should be %08x\n",
1135 up->port.line, up->capabilities,
1136 uart_config[up->port.type].flags);
1139 up->port.fifosize = uart_config[up->port.type].fifo_size;
1140 up->capabilities = uart_config[up->port.type].flags;
1141 up->tx_loadsz = uart_config[up->port.type].tx_loadsz;
1143 if (up->port.type == PORT_UNKNOWN)
1149 #ifdef CONFIG_SERIAL_8250_RSA
1150 if (up->port.type == PORT_RSA)
1151 serial_outp(up, UART_RSA_FRR, 0);
1153 serial_outp(up, UART_MCR, save_mcr);
1154 serial8250_clear_fifos(up);
1155 serial_in(up, UART_RX);
1156 if (up->capabilities & UART_CAP_UUE)
1157 serial_outp(up, UART_IER, UART_IER_UUE);
1159 serial_outp(up, UART_IER, 0);
1162 spin_unlock_irqrestore(&up->port.lock, flags);
1163 DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);
1166 static void autoconfig_irq(struct uart_8250_port *up)
1168 unsigned char save_mcr, save_ier;
1169 unsigned char save_ICP = 0;
1170 unsigned int ICP = 0;
1174 if (up->port.flags & UPF_FOURPORT) {
1175 ICP = (up->port.iobase & 0xfe0) | 0x1f;
1176 save_ICP = inb_p(ICP);
1181 /* forget possible initially masked and pending IRQ */
1182 probe_irq_off(probe_irq_on());
1183 save_mcr = serial_inp(up, UART_MCR);
1184 save_ier = serial_inp(up, UART_IER);
1185 serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
1187 irqs = probe_irq_on();
1188 serial_outp(up, UART_MCR, 0);
1190 if (up->port.flags & UPF_FOURPORT) {
1191 serial_outp(up, UART_MCR,
1192 UART_MCR_DTR | UART_MCR_RTS);
1194 serial_outp(up, UART_MCR,
1195 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
1197 serial_outp(up, UART_IER, 0x0f); /* enable all intrs */
1198 (void)serial_inp(up, UART_LSR);
1199 (void)serial_inp(up, UART_RX);
1200 (void)serial_inp(up, UART_IIR);
1201 (void)serial_inp(up, UART_MSR);
1202 serial_outp(up, UART_TX, 0xFF);
1204 irq = probe_irq_off(irqs);
1206 serial_outp(up, UART_MCR, save_mcr);
1207 serial_outp(up, UART_IER, save_ier);
1209 if (up->port.flags & UPF_FOURPORT)
1210 outb_p(save_ICP, ICP);
1212 up->port.irq = (irq > 0) ? irq : 0;
1215 static inline void __stop_tx(struct uart_8250_port *p)
1217 if (p->ier & UART_IER_THRI) {
1218 p->ier &= ~UART_IER_THRI;
1219 serial_out(p, UART_IER, p->ier);
1223 static void serial8250_stop_tx(struct uart_port *port)
1225 struct uart_8250_port *up = (struct uart_8250_port *)port;
1230 * We really want to stop the transmitter from sending.
1232 if (up->port.type == PORT_16C950) {
1233 up->acr |= UART_ACR_TXDIS;
1234 serial_icr_write(up, UART_ACR, up->acr);
1238 static void transmit_chars(struct uart_8250_port *up);
1240 static void serial8250_start_tx(struct uart_port *port)
1242 struct uart_8250_port *up = (struct uart_8250_port *)port;
1244 if (!(up->ier & UART_IER_THRI)) {
1245 up->ier |= UART_IER_THRI;
1246 serial_out(up, UART_IER, up->ier);
1248 if (up->bugs & UART_BUG_TXEN) {
1249 unsigned char lsr, iir;
1250 lsr = serial_in(up, UART_LSR);
1251 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1252 iir = serial_in(up, UART_IIR) & 0x0f;
1253 if ((up->port.type == PORT_RM9000) ?
1254 (lsr & UART_LSR_THRE &&
1255 (iir == UART_IIR_NO_INT || iir == UART_IIR_THRI)) :
1256 (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT))
1262 * Re-enable the transmitter if we disabled it.
1264 if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
1265 up->acr &= ~UART_ACR_TXDIS;
1266 serial_icr_write(up, UART_ACR, up->acr);
1270 static void serial8250_stop_rx(struct uart_port *port)
1272 struct uart_8250_port *up = (struct uart_8250_port *)port;
1274 up->ier &= ~UART_IER_RLSI;
1275 up->port.read_status_mask &= ~UART_LSR_DR;
1276 serial_out(up, UART_IER, up->ier);
1279 static void serial8250_enable_ms(struct uart_port *port)
1281 struct uart_8250_port *up = (struct uart_8250_port *)port;
1283 /* no MSR capabilities */
1284 if (up->bugs & UART_BUG_NOMSR)
1287 up->ier |= UART_IER_MSI;
1288 serial_out(up, UART_IER, up->ier);
1292 receive_chars(struct uart_8250_port *up, unsigned int *status)
1294 struct tty_struct *tty = up->port.info->port.tty;
1295 unsigned char ch, lsr = *status;
1296 int max_count = 256;
1300 if (likely(lsr & UART_LSR_DR))
1301 ch = serial_inp(up, UART_RX);
1304 * Intel 82571 has a Serial Over Lan device that will
1305 * set UART_LSR_BI without setting UART_LSR_DR when
1306 * it receives a break. To avoid reading from the
1307 * receive buffer without UART_LSR_DR bit set, we
1308 * just force the read character to be 0
1313 up->port.icount.rx++;
1315 lsr |= up->lsr_saved_flags;
1316 up->lsr_saved_flags = 0;
1318 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
1320 * For statistics only
1322 if (lsr & UART_LSR_BI) {
1323 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
1324 up->port.icount.brk++;
1326 * We do the SysRQ and SAK checking
1327 * here because otherwise the break
1328 * may get masked by ignore_status_mask
1329 * or read_status_mask.
1331 if (uart_handle_break(&up->port))
1333 } else if (lsr & UART_LSR_PE)
1334 up->port.icount.parity++;
1335 else if (lsr & UART_LSR_FE)
1336 up->port.icount.frame++;
1337 if (lsr & UART_LSR_OE)
1338 up->port.icount.overrun++;
1341 * Mask off conditions which should be ignored.
1343 lsr &= up->port.read_status_mask;
1345 if (lsr & UART_LSR_BI) {
1346 DEBUG_INTR("handling break....");
1348 } else if (lsr & UART_LSR_PE)
1350 else if (lsr & UART_LSR_FE)
1353 if (uart_handle_sysrq_char(&up->port, ch))
1356 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
1359 lsr = serial_inp(up, UART_LSR);
1360 } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));
1361 spin_unlock(&up->port.lock);
1362 tty_flip_buffer_push(tty);
1363 spin_lock(&up->port.lock);
1367 static void transmit_chars(struct uart_8250_port *up)
1369 struct circ_buf *xmit = &up->port.info->xmit;
1372 if (up->port.x_char) {
1373 serial_outp(up, UART_TX, up->port.x_char);
1374 up->port.icount.tx++;
1375 up->port.x_char = 0;
1378 if (uart_tx_stopped(&up->port)) {
1379 serial8250_stop_tx(&up->port);
1382 if (uart_circ_empty(xmit)) {
1387 count = up->tx_loadsz;
1389 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1390 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
1391 up->port.icount.tx++;
1392 if (uart_circ_empty(xmit))
1394 } while (--count > 0);
1396 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1397 uart_write_wakeup(&up->port);
1399 DEBUG_INTR("THRE...");
1401 if (uart_circ_empty(xmit))
1405 static unsigned int check_modem_status(struct uart_8250_port *up)
1407 unsigned int status = serial_in(up, UART_MSR);
1409 status |= up->msr_saved_flags;
1410 up->msr_saved_flags = 0;
1411 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
1412 up->port.info != NULL) {
1413 if (status & UART_MSR_TERI)
1414 up->port.icount.rng++;
1415 if (status & UART_MSR_DDSR)
1416 up->port.icount.dsr++;
1417 if (status & UART_MSR_DDCD)
1418 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
1419 if (status & UART_MSR_DCTS)
1420 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
1422 wake_up_interruptible(&up->port.info->delta_msr_wait);
1429 * This handles the interrupt from one port.
1431 static void serial8250_handle_port(struct uart_8250_port *up)
1433 unsigned int status;
1434 unsigned long flags;
1436 spin_lock_irqsave(&up->port.lock, flags);
1438 status = serial_inp(up, UART_LSR);
1440 DEBUG_INTR("status = %x...", status);
1442 if (status & (UART_LSR_DR | UART_LSR_BI))
1443 receive_chars(up, &status);
1444 check_modem_status(up);
1445 if (status & UART_LSR_THRE)
1448 spin_unlock_irqrestore(&up->port.lock, flags);
1452 * This is the serial driver's interrupt routine.
1454 * Arjan thinks the old way was overly complex, so it got simplified.
1455 * Alan disagrees, saying that need the complexity to handle the weird
1456 * nature of ISA shared interrupts. (This is a special exception.)
1458 * In order to handle ISA shared interrupts properly, we need to check
1459 * that all ports have been serviced, and therefore the ISA interrupt
1460 * line has been de-asserted.
1462 * This means we need to loop through all ports. checking that they
1463 * don't have an interrupt pending.
1465 static irqreturn_t serial8250_interrupt(int irq, void *dev_id)
1467 struct irq_info *i = dev_id;
1468 struct list_head *l, *end = NULL;
1469 int pass_counter = 0, handled = 0;
1471 DEBUG_INTR("serial8250_interrupt(%d)...", irq);
1473 spin_lock(&i->lock);
1477 struct uart_8250_port *up;
1480 up = list_entry(l, struct uart_8250_port, list);
1482 iir = serial_in(up, UART_IIR);
1483 if (!(iir & UART_IIR_NO_INT)) {
1484 serial8250_handle_port(up);
1489 } else if (up->port.iotype == UPIO_DWAPB &&
1490 (iir & UART_IIR_BUSY) == UART_IIR_BUSY) {
1491 /* The DesignWare APB UART has an Busy Detect (0x07)
1492 * interrupt meaning an LCR write attempt occured while the
1493 * UART was busy. The interrupt must be cleared by reading
1494 * the UART status register (USR) and the LCR re-written. */
1495 unsigned int status;
1496 status = *(volatile u32 *)up->port.private_data;
1497 serial_out(up, UART_LCR, up->lcr);
1502 } else if (end == NULL)
1507 if (l == i->head && pass_counter++ > PASS_LIMIT) {
1508 /* If we hit this, we're dead. */
1509 printk(KERN_ERR "serial8250: too much work for "
1515 spin_unlock(&i->lock);
1517 DEBUG_INTR("end.\n");
1519 return IRQ_RETVAL(handled);
1523 * To support ISA shared interrupts, we need to have one interrupt
1524 * handler that ensures that the IRQ line has been deasserted
1525 * before returning. Failing to do this will result in the IRQ
1526 * line being stuck active, and, since ISA irqs are edge triggered,
1527 * no more IRQs will be seen.
1529 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
1531 spin_lock_irq(&i->lock);
1533 if (!list_empty(i->head)) {
1534 if (i->head == &up->list)
1535 i->head = i->head->next;
1536 list_del(&up->list);
1538 BUG_ON(i->head != &up->list);
1542 spin_unlock_irq(&i->lock);
1545 static int serial_link_irq_chain(struct uart_8250_port *up)
1547 struct irq_info *i = irq_lists + up->port.irq;
1548 int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;
1550 spin_lock_irq(&i->lock);
1553 list_add(&up->list, i->head);
1554 spin_unlock_irq(&i->lock);
1558 INIT_LIST_HEAD(&up->list);
1559 i->head = &up->list;
1560 spin_unlock_irq(&i->lock);
1562 ret = request_irq(up->port.irq, serial8250_interrupt,
1563 irq_flags, "serial", i);
1565 serial_do_unlink(i, up);
1571 static void serial_unlink_irq_chain(struct uart_8250_port *up)
1573 struct irq_info *i = irq_lists + up->port.irq;
1575 BUG_ON(i->head == NULL);
1577 if (list_empty(i->head))
1578 free_irq(up->port.irq, i);
1580 serial_do_unlink(i, up);
1583 /* Base timer interval for polling */
1584 static inline int poll_timeout(int timeout)
1586 return timeout > 6 ? (timeout / 2 - 2) : 1;
1590 * This function is used to handle ports that do not have an
1591 * interrupt. This doesn't work very well for 16450's, but gives
1592 * barely passable results for a 16550A. (Although at the expense
1593 * of much CPU overhead).
1595 static void serial8250_timeout(unsigned long data)
1597 struct uart_8250_port *up = (struct uart_8250_port *)data;
1600 iir = serial_in(up, UART_IIR);
1601 if (!(iir & UART_IIR_NO_INT))
1602 serial8250_handle_port(up);
1603 mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));
1606 static void serial8250_backup_timeout(unsigned long data)
1608 struct uart_8250_port *up = (struct uart_8250_port *)data;
1609 unsigned int iir, ier = 0, lsr;
1610 unsigned long flags;
1613 * Must disable interrupts or else we risk racing with the interrupt
1616 if (is_real_interrupt(up->port.irq)) {
1617 ier = serial_in(up, UART_IER);
1618 serial_out(up, UART_IER, 0);
1621 iir = serial_in(up, UART_IIR);
1624 * This should be a safe test for anyone who doesn't trust the
1625 * IIR bits on their UART, but it's specifically designed for
1626 * the "Diva" UART used on the management processor on many HP
1627 * ia64 and parisc boxes.
1629 spin_lock_irqsave(&up->port.lock, flags);
1630 lsr = serial_in(up, UART_LSR);
1631 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1632 spin_unlock_irqrestore(&up->port.lock, flags);
1633 if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
1634 (!uart_circ_empty(&up->port.info->xmit) || up->port.x_char) &&
1635 (lsr & UART_LSR_THRE)) {
1636 iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);
1637 iir |= UART_IIR_THRI;
1640 if (!(iir & UART_IIR_NO_INT))
1641 serial8250_handle_port(up);
1643 if (is_real_interrupt(up->port.irq))
1644 serial_out(up, UART_IER, ier);
1646 /* Standard timer interval plus 0.2s to keep the port running */
1647 mod_timer(&up->timer,
1648 jiffies + poll_timeout(up->port.timeout) + HZ / 5);
1651 static unsigned int serial8250_tx_empty(struct uart_port *port)
1653 struct uart_8250_port *up = (struct uart_8250_port *)port;
1654 unsigned long flags;
1657 spin_lock_irqsave(&up->port.lock, flags);
1658 lsr = serial_in(up, UART_LSR);
1659 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1660 spin_unlock_irqrestore(&up->port.lock, flags);
1662 return lsr & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
1665 static unsigned int serial8250_get_mctrl(struct uart_port *port)
1667 struct uart_8250_port *up = (struct uart_8250_port *)port;
1668 unsigned int status;
1671 status = check_modem_status(up);
1674 if (status & UART_MSR_DCD)
1676 if (status & UART_MSR_RI)
1678 if (status & UART_MSR_DSR)
1680 if (status & UART_MSR_CTS)
1685 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
1687 struct uart_8250_port *up = (struct uart_8250_port *)port;
1688 unsigned char mcr = 0;
1690 if (mctrl & TIOCM_RTS)
1691 mcr |= UART_MCR_RTS;
1692 if (mctrl & TIOCM_DTR)
1693 mcr |= UART_MCR_DTR;
1694 if (mctrl & TIOCM_OUT1)
1695 mcr |= UART_MCR_OUT1;
1696 if (mctrl & TIOCM_OUT2)
1697 mcr |= UART_MCR_OUT2;
1698 if (mctrl & TIOCM_LOOP)
1699 mcr |= UART_MCR_LOOP;
1701 mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
1703 serial_out(up, UART_MCR, mcr);
1706 static void serial8250_break_ctl(struct uart_port *port, int break_state)
1708 struct uart_8250_port *up = (struct uart_8250_port *)port;
1709 unsigned long flags;
1711 spin_lock_irqsave(&up->port.lock, flags);
1712 if (break_state == -1)
1713 up->lcr |= UART_LCR_SBC;
1715 up->lcr &= ~UART_LCR_SBC;
1716 serial_out(up, UART_LCR, up->lcr);
1717 spin_unlock_irqrestore(&up->port.lock, flags);
1720 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1723 * Wait for transmitter & holding register to empty
1725 static void wait_for_xmitr(struct uart_8250_port *up, int bits)
1727 unsigned int status, tmout = 10000;
1729 /* Wait up to 10ms for the character(s) to be sent. */
1731 status = serial_in(up, UART_LSR);
1733 up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;
1738 } while ((status & bits) != bits);
1740 /* Wait up to 1s for flow control if necessary */
1741 if (up->port.flags & UPF_CONS_FLOW) {
1743 for (tmout = 1000000; tmout; tmout--) {
1744 unsigned int msr = serial_in(up, UART_MSR);
1745 up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
1746 if (msr & UART_MSR_CTS)
1749 touch_nmi_watchdog();
1754 #ifdef CONFIG_CONSOLE_POLL
1756 * Console polling routines for writing and reading from the uart while
1757 * in an interrupt or debug context.
1760 static int serial8250_get_poll_char(struct uart_port *port)
1762 struct uart_8250_port *up = (struct uart_8250_port *)port;
1763 unsigned char lsr = serial_inp(up, UART_LSR);
1765 while (!(lsr & UART_LSR_DR))
1766 lsr = serial_inp(up, UART_LSR);
1768 return serial_inp(up, UART_RX);
1772 static void serial8250_put_poll_char(struct uart_port *port,
1776 struct uart_8250_port *up = (struct uart_8250_port *)port;
1779 * First save the IER then disable the interrupts
1781 ier = serial_in(up, UART_IER);
1782 if (up->capabilities & UART_CAP_UUE)
1783 serial_out(up, UART_IER, UART_IER_UUE);
1785 serial_out(up, UART_IER, 0);
1787 wait_for_xmitr(up, BOTH_EMPTY);
1789 * Send the character out.
1790 * If a LF, also do CR...
1792 serial_out(up, UART_TX, c);
1794 wait_for_xmitr(up, BOTH_EMPTY);
1795 serial_out(up, UART_TX, 13);
1799 * Finally, wait for transmitter to become empty
1800 * and restore the IER
1802 wait_for_xmitr(up, BOTH_EMPTY);
1803 serial_out(up, UART_IER, ier);
1806 #endif /* CONFIG_CONSOLE_POLL */
1808 static int serial8250_startup(struct uart_port *port)
1810 struct uart_8250_port *up = (struct uart_8250_port *)port;
1811 unsigned long flags;
1812 unsigned char lsr, iir;
1815 up->capabilities = uart_config[up->port.type].flags;
1818 if (up->port.type == PORT_16C950) {
1819 /* Wake up and initialize UART */
1821 serial_outp(up, UART_LCR, 0xBF);
1822 serial_outp(up, UART_EFR, UART_EFR_ECB);
1823 serial_outp(up, UART_IER, 0);
1824 serial_outp(up, UART_LCR, 0);
1825 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
1826 serial_outp(up, UART_LCR, 0xBF);
1827 serial_outp(up, UART_EFR, UART_EFR_ECB);
1828 serial_outp(up, UART_LCR, 0);
1831 #ifdef CONFIG_SERIAL_8250_RSA
1833 * If this is an RSA port, see if we can kick it up to the
1834 * higher speed clock.
1840 * Clear the FIFO buffers and disable them.
1841 * (they will be reenabled in set_termios())
1843 serial8250_clear_fifos(up);
1846 * Clear the interrupt registers.
1848 (void) serial_inp(up, UART_LSR);
1849 (void) serial_inp(up, UART_RX);
1850 (void) serial_inp(up, UART_IIR);
1851 (void) serial_inp(up, UART_MSR);
1854 * At this point, there's no way the LSR could still be 0xff;
1855 * if it is, then bail out, because there's likely no UART
1858 if (!(up->port.flags & UPF_BUGGY_UART) &&
1859 (serial_inp(up, UART_LSR) == 0xff)) {
1860 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
1865 * For a XR16C850, we need to set the trigger levels
1867 if (up->port.type == PORT_16850) {
1870 serial_outp(up, UART_LCR, 0xbf);
1872 fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
1873 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);
1874 serial_outp(up, UART_TRG, UART_TRG_96);
1875 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX);
1876 serial_outp(up, UART_TRG, UART_TRG_96);
1878 serial_outp(up, UART_LCR, 0);
1881 if (is_real_interrupt(up->port.irq)) {
1884 * Test for UARTs that do not reassert THRE when the
1885 * transmitter is idle and the interrupt has already
1886 * been cleared. Real 16550s should always reassert
1887 * this interrupt whenever the transmitter is idle and
1888 * the interrupt is enabled. Delays are necessary to
1889 * allow register changes to become visible.
1891 spin_lock_irqsave(&up->port.lock, flags);
1892 if (up->port.flags & UPF_SHARE_IRQ)
1893 disable_irq_nosync(up->port.irq);
1895 wait_for_xmitr(up, UART_LSR_THRE);
1896 serial_out_sync(up, UART_IER, UART_IER_THRI);
1897 udelay(1); /* allow THRE to set */
1898 iir1 = serial_in(up, UART_IIR);
1899 serial_out(up, UART_IER, 0);
1900 serial_out_sync(up, UART_IER, UART_IER_THRI);
1901 udelay(1); /* allow a working UART time to re-assert THRE */
1902 iir = serial_in(up, UART_IIR);
1903 serial_out(up, UART_IER, 0);
1905 if (up->port.flags & UPF_SHARE_IRQ)
1906 enable_irq(up->port.irq);
1907 spin_unlock_irqrestore(&up->port.lock, flags);
1910 * If the interrupt is not reasserted, setup a timer to
1911 * kick the UART on a regular basis.
1913 if (!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) {
1914 up->bugs |= UART_BUG_THRE;
1915 pr_debug("ttyS%d - using backup timer\n", port->line);
1920 * The above check will only give an accurate result the first time
1921 * the port is opened so this value needs to be preserved.
1923 if (up->bugs & UART_BUG_THRE) {
1924 up->timer.function = serial8250_backup_timeout;
1925 up->timer.data = (unsigned long)up;
1926 mod_timer(&up->timer, jiffies +
1927 poll_timeout(up->port.timeout) + HZ / 5);
1931 * If the "interrupt" for this port doesn't correspond with any
1932 * hardware interrupt, we use a timer-based system. The original
1933 * driver used to do this with IRQ0.
1935 if (!is_real_interrupt(up->port.irq)) {
1936 up->timer.data = (unsigned long)up;
1937 mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));
1939 retval = serial_link_irq_chain(up);
1945 * Now, initialize the UART
1947 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
1949 spin_lock_irqsave(&up->port.lock, flags);
1950 if (up->port.flags & UPF_FOURPORT) {
1951 if (!is_real_interrupt(up->port.irq))
1952 up->port.mctrl |= TIOCM_OUT1;
1955 * Most PC uarts need OUT2 raised to enable interrupts.
1957 if (is_real_interrupt(up->port.irq))
1958 up->port.mctrl |= TIOCM_OUT2;
1960 serial8250_set_mctrl(&up->port, up->port.mctrl);
1963 * Do a quick test to see if we receive an
1964 * interrupt when we enable the TX irq.
1966 serial_outp(up, UART_IER, UART_IER_THRI);
1967 lsr = serial_in(up, UART_LSR);
1968 iir = serial_in(up, UART_IIR);
1969 serial_outp(up, UART_IER, 0);
1971 if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
1972 if (!(up->bugs & UART_BUG_TXEN)) {
1973 up->bugs |= UART_BUG_TXEN;
1974 pr_debug("ttyS%d - enabling bad tx status workarounds\n",
1978 up->bugs &= ~UART_BUG_TXEN;
1981 spin_unlock_irqrestore(&up->port.lock, flags);
1984 * Clear the interrupt registers again for luck, and clear the
1985 * saved flags to avoid getting false values from polling
1986 * routines or the previous session.
1988 serial_inp(up, UART_LSR);
1989 serial_inp(up, UART_RX);
1990 serial_inp(up, UART_IIR);
1991 serial_inp(up, UART_MSR);
1992 up->lsr_saved_flags = 0;
1993 up->msr_saved_flags = 0;
1996 * Finally, enable interrupts. Note: Modem status interrupts
1997 * are set via set_termios(), which will be occurring imminently
1998 * anyway, so we don't enable them here.
2000 up->ier = UART_IER_RLSI | UART_IER_RDI;
2001 serial_outp(up, UART_IER, up->ier);
2003 if (up->port.flags & UPF_FOURPORT) {
2006 * Enable interrupts on the AST Fourport board
2008 icp = (up->port.iobase & 0xfe0) | 0x01f;
2016 static void serial8250_shutdown(struct uart_port *port)
2018 struct uart_8250_port *up = (struct uart_8250_port *)port;
2019 unsigned long flags;
2022 * Disable interrupts from this port
2025 serial_outp(up, UART_IER, 0);
2027 spin_lock_irqsave(&up->port.lock, flags);
2028 if (up->port.flags & UPF_FOURPORT) {
2029 /* reset interrupts on the AST Fourport board */
2030 inb((up->port.iobase & 0xfe0) | 0x1f);
2031 up->port.mctrl |= TIOCM_OUT1;
2033 up->port.mctrl &= ~TIOCM_OUT2;
2035 serial8250_set_mctrl(&up->port, up->port.mctrl);
2036 spin_unlock_irqrestore(&up->port.lock, flags);
2039 * Disable break condition and FIFOs
2041 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
2042 serial8250_clear_fifos(up);
2044 #ifdef CONFIG_SERIAL_8250_RSA
2046 * Reset the RSA board back to 115kbps compat mode.
2052 * Read data port to reset things, and then unlink from
2055 (void) serial_in(up, UART_RX);
2057 del_timer_sync(&up->timer);
2058 up->timer.function = serial8250_timeout;
2059 if (is_real_interrupt(up->port.irq))
2060 serial_unlink_irq_chain(up);
2063 static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
2068 * Handle magic divisors for baud rates above baud_base on
2069 * SMSC SuperIO chips.
2071 if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2072 baud == (port->uartclk/4))
2074 else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2075 baud == (port->uartclk/8))
2078 quot = uart_get_divisor(port, baud);
2084 serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
2085 struct ktermios *old)
2087 struct uart_8250_port *up = (struct uart_8250_port *)port;
2088 unsigned char cval, fcr = 0;
2089 unsigned long flags;
2090 unsigned int baud, quot;
2092 switch (termios->c_cflag & CSIZE) {
2094 cval = UART_LCR_WLEN5;
2097 cval = UART_LCR_WLEN6;
2100 cval = UART_LCR_WLEN7;
2104 cval = UART_LCR_WLEN8;
2108 if (termios->c_cflag & CSTOPB)
2109 cval |= UART_LCR_STOP;
2110 if (termios->c_cflag & PARENB)
2111 cval |= UART_LCR_PARITY;
2112 if (!(termios->c_cflag & PARODD))
2113 cval |= UART_LCR_EPAR;
2115 if (termios->c_cflag & CMSPAR)
2116 cval |= UART_LCR_SPAR;
2120 * Ask the core to calculate the divisor for us.
2122 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
2123 quot = serial8250_get_divisor(port, baud);
2126 * Oxford Semi 952 rev B workaround
2128 if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
2131 if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {
2133 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
2135 fcr = uart_config[up->port.type].fcr;
2139 * MCR-based auto flow control. When AFE is enabled, RTS will be
2140 * deasserted when the receive FIFO contains more characters than
2141 * the trigger, or the MCR RTS bit is cleared. In the case where
2142 * the remote UART is not using CTS auto flow control, we must
2143 * have sufficient FIFO entries for the latency of the remote
2144 * UART to respond. IOW, at least 32 bytes of FIFO.
2146 if (up->capabilities & UART_CAP_AFE && up->port.fifosize >= 32) {
2147 up->mcr &= ~UART_MCR_AFE;
2148 if (termios->c_cflag & CRTSCTS)
2149 up->mcr |= UART_MCR_AFE;
2153 * Ok, we're now changing the port state. Do it with
2154 * interrupts disabled.
2156 spin_lock_irqsave(&up->port.lock, flags);
2159 * Update the per-port timeout.
2161 uart_update_timeout(port, termios->c_cflag, baud);
2163 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2164 if (termios->c_iflag & INPCK)
2165 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2166 if (termios->c_iflag & (BRKINT | PARMRK))
2167 up->port.read_status_mask |= UART_LSR_BI;
2170 * Characteres to ignore
2172 up->port.ignore_status_mask = 0;
2173 if (termios->c_iflag & IGNPAR)
2174 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
2175 if (termios->c_iflag & IGNBRK) {
2176 up->port.ignore_status_mask |= UART_LSR_BI;
2178 * If we're ignoring parity and break indicators,
2179 * ignore overruns too (for real raw support).
2181 if (termios->c_iflag & IGNPAR)
2182 up->port.ignore_status_mask |= UART_LSR_OE;
2186 * ignore all characters if CREAD is not set
2188 if ((termios->c_cflag & CREAD) == 0)
2189 up->port.ignore_status_mask |= UART_LSR_DR;
2192 * CTS flow control flag and modem status interrupts
2194 up->ier &= ~UART_IER_MSI;
2195 if (!(up->bugs & UART_BUG_NOMSR) &&
2196 UART_ENABLE_MS(&up->port, termios->c_cflag))
2197 up->ier |= UART_IER_MSI;
2198 if (up->capabilities & UART_CAP_UUE)
2199 up->ier |= UART_IER_UUE | UART_IER_RTOIE;
2201 serial_out(up, UART_IER, up->ier);
2203 if (up->capabilities & UART_CAP_EFR) {
2204 unsigned char efr = 0;
2206 * TI16C752/Startech hardware flow control. FIXME:
2207 * - TI16C752 requires control thresholds to be set.
2208 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
2210 if (termios->c_cflag & CRTSCTS)
2211 efr |= UART_EFR_CTS;
2213 serial_outp(up, UART_LCR, 0xBF);
2214 serial_outp(up, UART_EFR, efr);
2217 #ifdef CONFIG_ARCH_OMAP15XX
2218 /* Workaround to enable 115200 baud on OMAP1510 internal ports */
2219 if (cpu_is_omap1510() && is_omap_port((unsigned int)up->port.membase)) {
2220 if (baud == 115200) {
2222 serial_out(up, UART_OMAP_OSC_12M_SEL, 1);
2224 serial_out(up, UART_OMAP_OSC_12M_SEL, 0);
2228 if (up->capabilities & UART_NATSEMI) {
2229 /* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
2230 serial_outp(up, UART_LCR, 0xe0);
2232 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
2235 serial_dl_write(up, quot);
2238 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
2239 * is written without DLAB set, this mode will be disabled.
2241 if (up->port.type == PORT_16750)
2242 serial_outp(up, UART_FCR, fcr);
2244 serial_outp(up, UART_LCR, cval); /* reset DLAB */
2245 up->lcr = cval; /* Save LCR */
2246 if (up->port.type != PORT_16750) {
2247 if (fcr & UART_FCR_ENABLE_FIFO) {
2248 /* emulated UARTs (Lucent Venus 167x) need two steps */
2249 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
2251 serial_outp(up, UART_FCR, fcr); /* set fcr */
2253 serial8250_set_mctrl(&up->port, up->port.mctrl);
2254 spin_unlock_irqrestore(&up->port.lock, flags);
2255 /* Don't rewrite B0 */
2256 if (tty_termios_baud_rate(termios))
2257 tty_termios_encode_baud_rate(termios, baud, baud);
2261 serial8250_pm(struct uart_port *port, unsigned int state,
2262 unsigned int oldstate)
2264 struct uart_8250_port *p = (struct uart_8250_port *)port;
2266 serial8250_set_sleep(p, state != 0);
2269 p->pm(port, state, oldstate);
2273 * Resource handling.
2275 static int serial8250_request_std_resource(struct uart_8250_port *up)
2277 unsigned int size = 8 << up->port.regshift;
2280 switch (up->port.iotype) {
2288 if (!up->port.mapbase)
2291 if (!request_mem_region(up->port.mapbase, size, "serial")) {
2296 if (up->port.flags & UPF_IOREMAP) {
2297 up->port.membase = ioremap_nocache(up->port.mapbase,
2299 if (!up->port.membase) {
2300 release_mem_region(up->port.mapbase, size);
2308 if (!request_region(up->port.iobase, size, "serial"))
2315 static void serial8250_release_std_resource(struct uart_8250_port *up)
2317 unsigned int size = 8 << up->port.regshift;
2319 switch (up->port.iotype) {
2327 if (!up->port.mapbase)
2330 if (up->port.flags & UPF_IOREMAP) {
2331 iounmap(up->port.membase);
2332 up->port.membase = NULL;
2335 release_mem_region(up->port.mapbase, size);
2340 release_region(up->port.iobase, size);
2345 static int serial8250_request_rsa_resource(struct uart_8250_port *up)
2347 unsigned long start = UART_RSA_BASE << up->port.regshift;
2348 unsigned int size = 8 << up->port.regshift;
2351 switch (up->port.iotype) {
2354 start += up->port.iobase;
2355 if (request_region(start, size, "serial-rsa"))
2365 static void serial8250_release_rsa_resource(struct uart_8250_port *up)
2367 unsigned long offset = UART_RSA_BASE << up->port.regshift;
2368 unsigned int size = 8 << up->port.regshift;
2370 switch (up->port.iotype) {
2373 release_region(up->port.iobase + offset, size);
2378 static void serial8250_release_port(struct uart_port *port)
2380 struct uart_8250_port *up = (struct uart_8250_port *)port;
2382 serial8250_release_std_resource(up);
2383 if (up->port.type == PORT_RSA)
2384 serial8250_release_rsa_resource(up);
2387 static int serial8250_request_port(struct uart_port *port)
2389 struct uart_8250_port *up = (struct uart_8250_port *)port;
2392 ret = serial8250_request_std_resource(up);
2393 if (ret == 0 && up->port.type == PORT_RSA) {
2394 ret = serial8250_request_rsa_resource(up);
2396 serial8250_release_std_resource(up);
2402 static void serial8250_config_port(struct uart_port *port, int flags)
2404 struct uart_8250_port *up = (struct uart_8250_port *)port;
2405 int probeflags = PROBE_ANY;
2409 * Find the region that we can probe for. This in turn
2410 * tells us whether we can probe for the type of port.
2412 ret = serial8250_request_std_resource(up);
2416 ret = serial8250_request_rsa_resource(up);
2418 probeflags &= ~PROBE_RSA;
2420 if (flags & UART_CONFIG_TYPE)
2421 autoconfig(up, probeflags);
2422 if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
2425 if (up->port.type != PORT_RSA && probeflags & PROBE_RSA)
2426 serial8250_release_rsa_resource(up);
2427 if (up->port.type == PORT_UNKNOWN)
2428 serial8250_release_std_resource(up);
2432 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
2434 if (ser->irq >= NR_IRQS || ser->irq < 0 ||
2435 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
2436 ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
2437 ser->type == PORT_STARTECH)
2443 serial8250_type(struct uart_port *port)
2445 int type = port->type;
2447 if (type >= ARRAY_SIZE(uart_config))
2449 return uart_config[type].name;
2452 static struct uart_ops serial8250_pops = {
2453 .tx_empty = serial8250_tx_empty,
2454 .set_mctrl = serial8250_set_mctrl,
2455 .get_mctrl = serial8250_get_mctrl,
2456 .stop_tx = serial8250_stop_tx,
2457 .start_tx = serial8250_start_tx,
2458 .stop_rx = serial8250_stop_rx,
2459 .enable_ms = serial8250_enable_ms,
2460 .break_ctl = serial8250_break_ctl,
2461 .startup = serial8250_startup,
2462 .shutdown = serial8250_shutdown,
2463 .set_termios = serial8250_set_termios,
2464 .pm = serial8250_pm,
2465 .type = serial8250_type,
2466 .release_port = serial8250_release_port,
2467 .request_port = serial8250_request_port,
2468 .config_port = serial8250_config_port,
2469 .verify_port = serial8250_verify_port,
2470 #ifdef CONFIG_CONSOLE_POLL
2471 .poll_get_char = serial8250_get_poll_char,
2472 .poll_put_char = serial8250_put_poll_char,
2476 static struct uart_8250_port serial8250_ports[UART_NR];
2478 static void __init serial8250_isa_init_ports(void)
2480 struct uart_8250_port *up;
2481 static int first = 1;
2488 for (i = 0; i < nr_uarts; i++) {
2489 struct uart_8250_port *up = &serial8250_ports[i];
2492 spin_lock_init(&up->port.lock);
2494 init_timer(&up->timer);
2495 up->timer.function = serial8250_timeout;
2498 * ALPHA_KLUDGE_MCR needs to be killed.
2500 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
2501 up->mcr_force = ALPHA_KLUDGE_MCR;
2503 up->port.ops = &serial8250_pops;
2506 for (i = 0, up = serial8250_ports;
2507 i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;
2509 up->port.iobase = old_serial_port[i].port;
2510 up->port.irq = irq_canonicalize(old_serial_port[i].irq);
2511 up->port.uartclk = old_serial_port[i].baud_base * 16;
2512 up->port.flags = old_serial_port[i].flags;
2513 up->port.hub6 = old_serial_port[i].hub6;
2514 up->port.membase = old_serial_port[i].iomem_base;
2515 up->port.iotype = old_serial_port[i].io_type;
2516 up->port.regshift = old_serial_port[i].iomem_reg_shift;
2518 up->port.flags |= UPF_SHARE_IRQ;
2523 serial8250_register_ports(struct uart_driver *drv, struct device *dev)
2527 serial8250_isa_init_ports();
2529 for (i = 0; i < nr_uarts; i++) {
2530 struct uart_8250_port *up = &serial8250_ports[i];
2533 uart_add_one_port(drv, &up->port);
2537 #ifdef CONFIG_SERIAL_8250_CONSOLE
2539 static void serial8250_console_putchar(struct uart_port *port, int ch)
2541 struct uart_8250_port *up = (struct uart_8250_port *)port;
2543 wait_for_xmitr(up, UART_LSR_THRE);
2544 serial_out(up, UART_TX, ch);
2548 * Print a string to the serial port trying not to disturb
2549 * any possible real use of the port...
2551 * The console_lock must be held when we get here.
2554 serial8250_console_write(struct console *co, const char *s, unsigned int count)
2556 struct uart_8250_port *up = &serial8250_ports[co->index];
2557 unsigned long flags;
2561 touch_nmi_watchdog();
2563 local_irq_save(flags);
2564 if (up->port.sysrq) {
2565 /* serial8250_handle_port() already took the lock */
2567 } else if (oops_in_progress) {
2568 locked = spin_trylock(&up->port.lock);
2570 spin_lock(&up->port.lock);
2573 * First save the IER then disable the interrupts
2575 ier = serial_in(up, UART_IER);
2577 if (up->capabilities & UART_CAP_UUE)
2578 serial_out(up, UART_IER, UART_IER_UUE);
2580 serial_out(up, UART_IER, 0);
2582 uart_console_write(&up->port, s, count, serial8250_console_putchar);
2585 * Finally, wait for transmitter to become empty
2586 * and restore the IER
2588 wait_for_xmitr(up, BOTH_EMPTY);
2589 serial_out(up, UART_IER, ier);
2592 * The receive handling will happen properly because the
2593 * receive ready bit will still be set; it is not cleared
2594 * on read. However, modem control will not, we must
2595 * call it if we have saved something in the saved flags
2596 * while processing with interrupts off.
2598 if (up->msr_saved_flags)
2599 check_modem_status(up);
2602 spin_unlock(&up->port.lock);
2603 local_irq_restore(flags);
2606 static int __init serial8250_console_setup(struct console *co, char *options)
2608 struct uart_port *port;
2615 * Check whether an invalid uart number has been specified, and
2616 * if so, search for the first available port that does have
2619 if (co->index >= nr_uarts)
2621 port = &serial8250_ports[co->index].port;
2622 if (!port->iobase && !port->membase)
2626 uart_parse_options(options, &baud, &parity, &bits, &flow);
2628 return uart_set_options(port, co, baud, parity, bits, flow);
2631 static int serial8250_console_early_setup(void)
2633 return serial8250_find_port_for_earlycon();
2636 static struct uart_driver serial8250_reg;
2637 static struct console serial8250_console = {
2639 .write = serial8250_console_write,
2640 .device = uart_console_device,
2641 .setup = serial8250_console_setup,
2642 .early_setup = serial8250_console_early_setup,
2643 .flags = CON_PRINTBUFFER,
2645 .data = &serial8250_reg,
2648 static int __init serial8250_console_init(void)
2650 if (nr_uarts > UART_NR)
2653 serial8250_isa_init_ports();
2654 register_console(&serial8250_console);
2657 console_initcall(serial8250_console_init);
2659 int serial8250_find_port(struct uart_port *p)
2662 struct uart_port *port;
2664 for (line = 0; line < nr_uarts; line++) {
2665 port = &serial8250_ports[line].port;
2666 if (uart_match_port(p, port))
2672 #define SERIAL8250_CONSOLE &serial8250_console
2674 #define SERIAL8250_CONSOLE NULL
2677 static struct uart_driver serial8250_reg = {
2678 .owner = THIS_MODULE,
2679 .driver_name = "serial",
2683 .cons = SERIAL8250_CONSOLE,
2687 * early_serial_setup - early registration for 8250 ports
2689 * Setup an 8250 port structure prior to console initialisation. Use
2690 * after console initialisation will cause undefined behaviour.
2692 int __init early_serial_setup(struct uart_port *port)
2694 if (port->line >= ARRAY_SIZE(serial8250_ports))
2697 serial8250_isa_init_ports();
2698 serial8250_ports[port->line].port = *port;
2699 serial8250_ports[port->line].port.ops = &serial8250_pops;
2704 * serial8250_suspend_port - suspend one serial port
2705 * @line: serial line number
2707 * Suspend one serial port.
2709 void serial8250_suspend_port(int line)
2711 uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
2715 * serial8250_resume_port - resume one serial port
2716 * @line: serial line number
2718 * Resume one serial port.
2720 void serial8250_resume_port(int line)
2722 struct uart_8250_port *up = &serial8250_ports[line];
2724 if (up->capabilities & UART_NATSEMI) {
2727 /* Ensure it's still in high speed mode */
2728 serial_outp(up, UART_LCR, 0xE0);
2730 tmp = serial_in(up, 0x04); /* EXCR2 */
2731 tmp &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
2732 tmp |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
2733 serial_outp(up, 0x04, tmp);
2735 serial_outp(up, UART_LCR, 0);
2737 uart_resume_port(&serial8250_reg, &up->port);
2741 * Register a set of serial devices attached to a platform device. The
2742 * list is terminated with a zero flags entry, which means we expect
2743 * all entries to have at least UPF_BOOT_AUTOCONF set.
2745 static int __devinit serial8250_probe(struct platform_device *dev)
2747 struct plat_serial8250_port *p = dev->dev.platform_data;
2748 struct uart_port port;
2751 memset(&port, 0, sizeof(struct uart_port));
2753 for (i = 0; p && p->flags != 0; p++, i++) {
2754 port.iobase = p->iobase;
2755 port.membase = p->membase;
2757 port.uartclk = p->uartclk;
2758 port.regshift = p->regshift;
2759 port.iotype = p->iotype;
2760 port.flags = p->flags;
2761 port.mapbase = p->mapbase;
2762 port.hub6 = p->hub6;
2763 port.private_data = p->private_data;
2764 port.dev = &dev->dev;
2766 port.flags |= UPF_SHARE_IRQ;
2767 ret = serial8250_register_port(&port);
2769 dev_err(&dev->dev, "unable to register port at index %d "
2770 "(IO%lx MEM%llx IRQ%d): %d\n", i,
2771 p->iobase, (unsigned long long)p->mapbase,
2779 * Remove serial ports registered against a platform device.
2781 static int __devexit serial8250_remove(struct platform_device *dev)
2785 for (i = 0; i < nr_uarts; i++) {
2786 struct uart_8250_port *up = &serial8250_ports[i];
2788 if (up->port.dev == &dev->dev)
2789 serial8250_unregister_port(i);
2794 static int serial8250_suspend(struct platform_device *dev, pm_message_t state)
2798 for (i = 0; i < UART_NR; i++) {
2799 struct uart_8250_port *up = &serial8250_ports[i];
2801 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
2802 uart_suspend_port(&serial8250_reg, &up->port);
2808 static int serial8250_resume(struct platform_device *dev)
2812 for (i = 0; i < UART_NR; i++) {
2813 struct uart_8250_port *up = &serial8250_ports[i];
2815 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
2816 serial8250_resume_port(i);
2822 static struct platform_driver serial8250_isa_driver = {
2823 .probe = serial8250_probe,
2824 .remove = __devexit_p(serial8250_remove),
2825 .suspend = serial8250_suspend,
2826 .resume = serial8250_resume,
2828 .name = "serial8250",
2829 .owner = THIS_MODULE,
2834 * This "device" covers _all_ ISA 8250-compatible serial devices listed
2835 * in the table in include/asm/serial.h
2837 static struct platform_device *serial8250_isa_devs;
2840 * serial8250_register_port and serial8250_unregister_port allows for
2841 * 16x50 serial ports to be configured at run-time, to support PCMCIA
2842 * modems and PCI multiport cards.
2844 static DEFINE_MUTEX(serial_mutex);
2846 static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
2851 * First, find a port entry which matches.
2853 for (i = 0; i < nr_uarts; i++)
2854 if (uart_match_port(&serial8250_ports[i].port, port))
2855 return &serial8250_ports[i];
2858 * We didn't find a matching entry, so look for the first
2859 * free entry. We look for one which hasn't been previously
2860 * used (indicated by zero iobase).
2862 for (i = 0; i < nr_uarts; i++)
2863 if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
2864 serial8250_ports[i].port.iobase == 0)
2865 return &serial8250_ports[i];
2868 * That also failed. Last resort is to find any entry which
2869 * doesn't have a real port associated with it.
2871 for (i = 0; i < nr_uarts; i++)
2872 if (serial8250_ports[i].port.type == PORT_UNKNOWN)
2873 return &serial8250_ports[i];
2879 * serial8250_register_port - register a serial port
2880 * @port: serial port template
2882 * Configure the serial port specified by the request. If the
2883 * port exists and is in use, it is hung up and unregistered
2886 * The port is then probed and if necessary the IRQ is autodetected
2887 * If this fails an error is returned.
2889 * On success the port is ready to use and the line number is returned.
2891 int serial8250_register_port(struct uart_port *port)
2893 struct uart_8250_port *uart;
2896 if (port->uartclk == 0)
2899 mutex_lock(&serial_mutex);
2901 uart = serial8250_find_match_or_unused(port);
2903 uart_remove_one_port(&serial8250_reg, &uart->port);
2905 uart->port.iobase = port->iobase;
2906 uart->port.membase = port->membase;
2907 uart->port.irq = port->irq;
2908 uart->port.uartclk = port->uartclk;
2909 uart->port.fifosize = port->fifosize;
2910 uart->port.regshift = port->regshift;
2911 uart->port.iotype = port->iotype;
2912 uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;
2913 uart->port.mapbase = port->mapbase;
2914 uart->port.private_data = port->private_data;
2916 uart->port.dev = port->dev;
2918 ret = uart_add_one_port(&serial8250_reg, &uart->port);
2920 ret = uart->port.line;
2922 mutex_unlock(&serial_mutex);
2926 EXPORT_SYMBOL(serial8250_register_port);
2929 * serial8250_unregister_port - remove a 16x50 serial port at runtime
2930 * @line: serial line number
2932 * Remove one serial port. This may not be called from interrupt
2933 * context. We hand the port back to the our control.
2935 void serial8250_unregister_port(int line)
2937 struct uart_8250_port *uart = &serial8250_ports[line];
2939 mutex_lock(&serial_mutex);
2940 uart_remove_one_port(&serial8250_reg, &uart->port);
2941 if (serial8250_isa_devs) {
2942 uart->port.flags &= ~UPF_BOOT_AUTOCONF;
2943 uart->port.type = PORT_UNKNOWN;
2944 uart->port.dev = &serial8250_isa_devs->dev;
2945 uart_add_one_port(&serial8250_reg, &uart->port);
2947 uart->port.dev = NULL;
2949 mutex_unlock(&serial_mutex);
2951 EXPORT_SYMBOL(serial8250_unregister_port);
2953 static int __init serial8250_init(void)
2957 if (nr_uarts > UART_NR)
2960 printk(KERN_INFO "Serial: 8250/16550 driver"
2961 "%d ports, IRQ sharing %sabled\n", nr_uarts,
2962 share_irqs ? "en" : "dis");
2965 ret = sunserial_register_minors(&serial8250_reg, UART_NR);
2967 serial8250_reg.nr = UART_NR;
2968 ret = uart_register_driver(&serial8250_reg);
2973 serial8250_isa_devs = platform_device_alloc("serial8250",
2974 PLAT8250_DEV_LEGACY);
2975 if (!serial8250_isa_devs) {
2977 goto unreg_uart_drv;
2980 ret = platform_device_add(serial8250_isa_devs);
2984 serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
2986 ret = platform_driver_register(&serial8250_isa_driver);
2990 platform_device_del(serial8250_isa_devs);
2992 platform_device_put(serial8250_isa_devs);
2995 sunserial_unregister_minors(&serial8250_reg, UART_NR);
2997 uart_unregister_driver(&serial8250_reg);
3003 static void __exit serial8250_exit(void)
3005 struct platform_device *isa_dev = serial8250_isa_devs;
3008 * This tells serial8250_unregister_port() not to re-register
3009 * the ports (thereby making serial8250_isa_driver permanently
3012 serial8250_isa_devs = NULL;
3014 platform_driver_unregister(&serial8250_isa_driver);
3015 platform_device_unregister(isa_dev);
3018 sunserial_unregister_minors(&serial8250_reg, UART_NR);
3020 uart_unregister_driver(&serial8250_reg);
3024 module_init(serial8250_init);
3025 module_exit(serial8250_exit);
3027 EXPORT_SYMBOL(serial8250_suspend_port);
3028 EXPORT_SYMBOL(serial8250_resume_port);
3030 MODULE_LICENSE("GPL");
3031 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");
3033 module_param(share_irqs, uint, 0644);
3034 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
3037 module_param(nr_uarts, uint, 0644);
3038 MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");
3040 #ifdef CONFIG_SERIAL_8250_RSA
3041 module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
3042 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
3044 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);