2 * linux/drivers/char/8250.c
4 * Driver for 8250/16550-type serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright (C) 2001 Russell King.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * $Id: 8250.c,v 1.90 2002/07/28 10:03:27 rmk Exp $
17 * A note about mapbase / membase
19 * mapbase is the physical address of the IO port.
20 * membase is an 'ioremapped' cookie.
22 #include <linux/config.h>
24 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/ioport.h>
31 #include <linux/init.h>
32 #include <linux/console.h>
33 #include <linux/sysrq.h>
34 #include <linux/mca.h>
35 #include <linux/delay.h>
36 #include <linux/device.h>
37 #include <linux/tty.h>
38 #include <linux/tty_flip.h>
39 #include <linux/serial_reg.h>
40 #include <linux/serial_core.h>
41 #include <linux/serial.h>
42 #include <linux/serial_8250.h>
51 * share_irqs - whether we pass SA_SHIRQ to request_irq(). This option
52 * is unsafe when used on edge-triggered interrupts.
54 static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
60 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
62 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
66 #define DEBUG_INTR(fmt...) printk(fmt)
68 #define DEBUG_INTR(fmt...) do { } while (0)
71 #define PASS_LIMIT 256
74 * We default to IRQ0 for the "no irq" hack. Some
75 * machine types want others as well - they're free
76 * to redefine this in their header file.
78 #define is_real_interrupt(irq) ((irq) != 0)
80 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
81 #define CONFIG_SERIAL_DETECT_IRQ 1
83 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
84 #define CONFIG_SERIAL_MANY_PORTS 1
88 * HUB6 is always on. This will be removed once the header
89 * files have been cleaned.
93 #include <asm/serial.h>
96 * SERIAL_PORT_DFNS tells us about built-in ports that have no
97 * standard enumeration mechanism. Platforms that can find all
98 * serial ports via mechanisms like ACPI or PCI need not supply it.
100 #ifndef SERIAL_PORT_DFNS
101 #define SERIAL_PORT_DFNS
104 static struct old_serial_port old_serial_port[] = {
105 SERIAL_PORT_DFNS /* defined in asm/serial.h */
108 #define UART_NR CONFIG_SERIAL_8250_NR_UARTS
110 #ifdef CONFIG_SERIAL_8250_RSA
112 #define PORT_RSA_MAX 4
113 static unsigned long probe_rsa[PORT_RSA_MAX];
114 static unsigned int probe_rsa_count;
115 #endif /* CONFIG_SERIAL_8250_RSA */
117 struct uart_8250_port {
118 struct uart_port port;
119 struct timer_list timer; /* "no irq" timer */
120 struct list_head list; /* ports on this IRQ */
121 unsigned short capabilities; /* port capabilities */
122 unsigned short bugs; /* port bugs */
123 unsigned int tx_loadsz; /* transmit fifo load size */
128 unsigned char mcr_mask; /* mask of user bits */
129 unsigned char mcr_force; /* mask of forced bits */
130 unsigned char lsr_break_flag;
133 * We provide a per-port pm hook.
135 void (*pm)(struct uart_port *port,
136 unsigned int state, unsigned int old);
141 struct list_head *head;
144 static struct irq_info irq_lists[NR_IRQS];
147 * Here we define the default xmit fifo size used for each type of UART.
149 static const struct serial8250_config uart_config[] = {
174 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
175 .flags = UART_CAP_FIFO,
186 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
192 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
194 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
200 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
202 .flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
210 .name = "16C950/954",
213 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
214 .flags = UART_CAP_FIFO,
220 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
222 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
228 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
229 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
235 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
236 .flags = UART_CAP_FIFO,
242 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
243 .flags = UART_CAP_FIFO | UART_NATSEMI,
249 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
250 .flags = UART_CAP_FIFO | UART_CAP_UUE,
254 static _INLINE_ unsigned int serial_in(struct uart_8250_port *up, int offset)
256 offset <<= up->port.regshift;
258 switch (up->port.iotype) {
260 outb(up->port.hub6 - 1 + offset, up->port.iobase);
261 return inb(up->port.iobase + 1);
264 return readb(up->port.membase + offset);
267 return readl(up->port.membase + offset);
270 return inb(up->port.iobase + offset);
275 serial_out(struct uart_8250_port *up, int offset, int value)
277 offset <<= up->port.regshift;
279 switch (up->port.iotype) {
281 outb(up->port.hub6 - 1 + offset, up->port.iobase);
282 outb(value, up->port.iobase + 1);
286 writeb(value, up->port.membase + offset);
290 writel(value, up->port.membase + offset);
294 outb(value, up->port.iobase + offset);
299 * We used to support using pause I/O for certain machines. We
300 * haven't supported this for a while, but just in case it's badly
301 * needed for certain old 386 machines, I've left these #define's
304 #define serial_inp(up, offset) serial_in(up, offset)
305 #define serial_outp(up, offset, value) serial_out(up, offset, value)
311 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
313 serial_out(up, UART_SCR, offset);
314 serial_out(up, UART_ICR, value);
317 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
321 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
322 serial_out(up, UART_SCR, offset);
323 value = serial_in(up, UART_ICR);
324 serial_icr_write(up, UART_ACR, up->acr);
332 static inline void serial8250_clear_fifos(struct uart_8250_port *p)
334 if (p->capabilities & UART_CAP_FIFO) {
335 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO);
336 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO |
337 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
338 serial_outp(p, UART_FCR, 0);
343 * IER sleep support. UARTs which have EFRs need the "extended
344 * capability" bit enabled. Note that on XR16C850s, we need to
345 * reset LCR to write to IER.
347 static inline void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
349 if (p->capabilities & UART_CAP_SLEEP) {
350 if (p->capabilities & UART_CAP_EFR) {
351 serial_outp(p, UART_LCR, 0xBF);
352 serial_outp(p, UART_EFR, UART_EFR_ECB);
353 serial_outp(p, UART_LCR, 0);
355 serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
356 if (p->capabilities & UART_CAP_EFR) {
357 serial_outp(p, UART_LCR, 0xBF);
358 serial_outp(p, UART_EFR, 0);
359 serial_outp(p, UART_LCR, 0);
364 #ifdef CONFIG_SERIAL_8250_RSA
366 * Attempts to turn on the RSA FIFO. Returns zero on failure.
367 * We set the port uart clock rate if we succeed.
369 static int __enable_rsa(struct uart_8250_port *up)
374 mode = serial_inp(up, UART_RSA_MSR);
375 result = mode & UART_RSA_MSR_FIFO;
378 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
379 mode = serial_inp(up, UART_RSA_MSR);
380 result = mode & UART_RSA_MSR_FIFO;
384 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
389 static void enable_rsa(struct uart_8250_port *up)
391 if (up->port.type == PORT_RSA) {
392 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
393 spin_lock_irq(&up->port.lock);
395 spin_unlock_irq(&up->port.lock);
397 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
398 serial_outp(up, UART_RSA_FRR, 0);
403 * Attempts to turn off the RSA FIFO. Returns zero on failure.
404 * It is unknown why interrupts were disabled in here. However,
405 * the caller is expected to preserve this behaviour by grabbing
406 * the spinlock before calling this function.
408 static void disable_rsa(struct uart_8250_port *up)
413 if (up->port.type == PORT_RSA &&
414 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
415 spin_lock_irq(&up->port.lock);
417 mode = serial_inp(up, UART_RSA_MSR);
418 result = !(mode & UART_RSA_MSR_FIFO);
421 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
422 mode = serial_inp(up, UART_RSA_MSR);
423 result = !(mode & UART_RSA_MSR_FIFO);
427 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
428 spin_unlock_irq(&up->port.lock);
431 #endif /* CONFIG_SERIAL_8250_RSA */
434 * This is a quickie test to see how big the FIFO is.
435 * It doesn't work at all the time, more's the pity.
437 static int size_fifo(struct uart_8250_port *up)
439 unsigned char old_fcr, old_mcr, old_dll, old_dlm, old_lcr;
442 old_lcr = serial_inp(up, UART_LCR);
443 serial_outp(up, UART_LCR, 0);
444 old_fcr = serial_inp(up, UART_FCR);
445 old_mcr = serial_inp(up, UART_MCR);
446 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
447 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
448 serial_outp(up, UART_MCR, UART_MCR_LOOP);
449 serial_outp(up, UART_LCR, UART_LCR_DLAB);
450 old_dll = serial_inp(up, UART_DLL);
451 old_dlm = serial_inp(up, UART_DLM);
452 serial_outp(up, UART_DLL, 0x01);
453 serial_outp(up, UART_DLM, 0x00);
454 serial_outp(up, UART_LCR, 0x03);
455 for (count = 0; count < 256; count++)
456 serial_outp(up, UART_TX, count);
457 mdelay(20);/* FIXME - schedule_timeout */
458 for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) &&
459 (count < 256); count++)
460 serial_inp(up, UART_RX);
461 serial_outp(up, UART_FCR, old_fcr);
462 serial_outp(up, UART_MCR, old_mcr);
463 serial_outp(up, UART_LCR, UART_LCR_DLAB);
464 serial_outp(up, UART_DLL, old_dll);
465 serial_outp(up, UART_DLM, old_dlm);
466 serial_outp(up, UART_LCR, old_lcr);
472 * Read UART ID using the divisor method - set DLL and DLM to zero
473 * and the revision will be in DLL and device type in DLM. We
474 * preserve the device state across this.
476 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
478 unsigned char old_dll, old_dlm, old_lcr;
481 old_lcr = serial_inp(p, UART_LCR);
482 serial_outp(p, UART_LCR, UART_LCR_DLAB);
484 old_dll = serial_inp(p, UART_DLL);
485 old_dlm = serial_inp(p, UART_DLM);
487 serial_outp(p, UART_DLL, 0);
488 serial_outp(p, UART_DLM, 0);
490 id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;
492 serial_outp(p, UART_DLL, old_dll);
493 serial_outp(p, UART_DLM, old_dlm);
494 serial_outp(p, UART_LCR, old_lcr);
500 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
501 * When this function is called we know it is at least a StarTech
502 * 16650 V2, but it might be one of several StarTech UARTs, or one of
503 * its clones. (We treat the broken original StarTech 16650 V1 as a
504 * 16550, and why not? Startech doesn't seem to even acknowledge its
507 * What evil have men's minds wrought...
509 static void autoconfig_has_efr(struct uart_8250_port *up)
511 unsigned int id1, id2, id3, rev;
514 * Everything with an EFR has SLEEP
516 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
519 * First we check to see if it's an Oxford Semiconductor UART.
521 * If we have to do this here because some non-National
522 * Semiconductor clone chips lock up if you try writing to the
523 * LSR register (which serial_icr_read does)
527 * Check for Oxford Semiconductor 16C950.
529 * EFR [4] must be set else this test fails.
531 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
532 * claims that it's needed for 952 dual UART's (which are not
533 * recommended for new designs).
536 serial_out(up, UART_LCR, 0xBF);
537 serial_out(up, UART_EFR, UART_EFR_ECB);
538 serial_out(up, UART_LCR, 0x00);
539 id1 = serial_icr_read(up, UART_ID1);
540 id2 = serial_icr_read(up, UART_ID2);
541 id3 = serial_icr_read(up, UART_ID3);
542 rev = serial_icr_read(up, UART_REV);
544 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
546 if (id1 == 0x16 && id2 == 0xC9 &&
547 (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
548 up->port.type = PORT_16C950;
551 * Enable work around for the Oxford Semiconductor 952 rev B
552 * chip which causes it to seriously miscalculate baud rates
555 if (id3 == 0x52 && rev == 0x01)
556 up->bugs |= UART_BUG_QUOT;
561 * We check for a XR16C850 by setting DLL and DLM to 0, and then
562 * reading back DLL and DLM. The chip type depends on the DLM
564 * 0x10 - XR16C850 and the DLL contains the chip revision.
568 id1 = autoconfig_read_divisor_id(up);
569 DEBUG_AUTOCONF("850id=%04x ", id1);
572 if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
573 up->port.type = PORT_16850;
578 * It wasn't an XR16C850.
580 * We distinguish between the '654 and the '650 by counting
581 * how many bytes are in the FIFO. I'm using this for now,
582 * since that's the technique that was sent to me in the
583 * serial driver update, but I'm not convinced this works.
584 * I've had problems doing this in the past. -TYT
586 if (size_fifo(up) == 64)
587 up->port.type = PORT_16654;
589 up->port.type = PORT_16650V2;
593 * We detected a chip without a FIFO. Only two fall into
594 * this category - the original 8250 and the 16450. The
595 * 16450 has a scratch register (accessible with LCR=0)
597 static void autoconfig_8250(struct uart_8250_port *up)
599 unsigned char scratch, status1, status2;
601 up->port.type = PORT_8250;
603 scratch = serial_in(up, UART_SCR);
604 serial_outp(up, UART_SCR, 0xa5);
605 status1 = serial_in(up, UART_SCR);
606 serial_outp(up, UART_SCR, 0x5a);
607 status2 = serial_in(up, UART_SCR);
608 serial_outp(up, UART_SCR, scratch);
610 if (status1 == 0xa5 && status2 == 0x5a)
611 up->port.type = PORT_16450;
614 static int broken_efr(struct uart_8250_port *up)
617 * Exar ST16C2550 "A2" devices incorrectly detect as
618 * having an EFR, and report an ID of 0x0201. See
619 * http://www.exar.com/info.php?pdf=dan180_oct2004.pdf
621 if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
628 * We know that the chip has FIFOs. Does it have an EFR? The
629 * EFR is located in the same register position as the IIR and
630 * we know the top two bits of the IIR are currently set. The
631 * EFR should contain zero. Try to read the EFR.
633 static void autoconfig_16550a(struct uart_8250_port *up)
635 unsigned char status1, status2;
636 unsigned int iersave;
638 up->port.type = PORT_16550A;
639 up->capabilities |= UART_CAP_FIFO;
642 * Check for presence of the EFR when DLAB is set.
643 * Only ST16C650V1 UARTs pass this test.
645 serial_outp(up, UART_LCR, UART_LCR_DLAB);
646 if (serial_in(up, UART_EFR) == 0) {
647 serial_outp(up, UART_EFR, 0xA8);
648 if (serial_in(up, UART_EFR) != 0) {
649 DEBUG_AUTOCONF("EFRv1 ");
650 up->port.type = PORT_16650;
651 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
653 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
655 serial_outp(up, UART_EFR, 0);
660 * Maybe it requires 0xbf to be written to the LCR.
661 * (other ST16C650V2 UARTs, TI16C752A, etc)
663 serial_outp(up, UART_LCR, 0xBF);
664 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
665 DEBUG_AUTOCONF("EFRv2 ");
666 autoconfig_has_efr(up);
671 * Check for a National Semiconductor SuperIO chip.
672 * Attempt to switch to bank 2, read the value of the LOOP bit
673 * from EXCR1. Switch back to bank 0, change it in MCR. Then
674 * switch back to bank 2, read it from EXCR1 again and check
675 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
677 serial_outp(up, UART_LCR, 0);
678 status1 = serial_in(up, UART_MCR);
679 serial_outp(up, UART_LCR, 0xE0);
680 status2 = serial_in(up, 0x02); /* EXCR1 */
682 if (!((status2 ^ status1) & UART_MCR_LOOP)) {
683 serial_outp(up, UART_LCR, 0);
684 serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP);
685 serial_outp(up, UART_LCR, 0xE0);
686 status2 = serial_in(up, 0x02); /* EXCR1 */
687 serial_outp(up, UART_LCR, 0);
688 serial_outp(up, UART_MCR, status1);
690 if ((status2 ^ status1) & UART_MCR_LOOP) {
693 serial_outp(up, UART_LCR, 0xE0);
695 quot = serial_inp(up, UART_DLM) << 8;
696 quot += serial_inp(up, UART_DLL);
699 status1 = serial_in(up, 0x04); /* EXCR1 */
700 status1 &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
701 status1 |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
702 serial_outp(up, 0x04, status1);
704 serial_outp(up, UART_DLL, quot & 0xff);
705 serial_outp(up, UART_DLM, quot >> 8);
707 serial_outp(up, UART_LCR, 0);
709 up->port.uartclk = 921600*16;
710 up->port.type = PORT_NS16550A;
711 up->capabilities |= UART_NATSEMI;
717 * No EFR. Try to detect a TI16750, which only sets bit 5 of
718 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
719 * Try setting it with and without DLAB set. Cheap clones
720 * set bit 5 without DLAB set.
722 serial_outp(up, UART_LCR, 0);
723 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
724 status1 = serial_in(up, UART_IIR) >> 5;
725 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
726 serial_outp(up, UART_LCR, UART_LCR_DLAB);
727 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
728 status2 = serial_in(up, UART_IIR) >> 5;
729 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
730 serial_outp(up, UART_LCR, 0);
732 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
734 if (status1 == 6 && status2 == 7) {
735 up->port.type = PORT_16750;
736 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
741 * Try writing and reading the UART_IER_UUE bit (b6).
742 * If it works, this is probably one of the Xscale platform's
744 * We're going to explicitly set the UUE bit to 0 before
745 * trying to write and read a 1 just to make sure it's not
746 * already a 1 and maybe locked there before we even start start.
748 iersave = serial_in(up, UART_IER);
749 serial_outp(up, UART_IER, iersave & ~UART_IER_UUE);
750 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
752 * OK it's in a known zero state, try writing and reading
753 * without disturbing the current state of the other bits.
755 serial_outp(up, UART_IER, iersave | UART_IER_UUE);
756 if (serial_in(up, UART_IER) & UART_IER_UUE) {
759 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
761 DEBUG_AUTOCONF("Xscale ");
762 up->port.type = PORT_XSCALE;
763 up->capabilities |= UART_CAP_UUE;
768 * If we got here we couldn't force the IER_UUE bit to 0.
769 * Log it and continue.
771 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
773 serial_outp(up, UART_IER, iersave);
777 * This routine is called by rs_init() to initialize a specific serial
778 * port. It determines what type of UART chip this serial port is
779 * using: 8250, 16450, 16550, 16550A. The important question is
780 * whether or not this UART is a 16550A or not, since this will
781 * determine whether or not we can use its FIFO features or not.
783 static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
785 unsigned char status1, scratch, scratch2, scratch3;
786 unsigned char save_lcr, save_mcr;
789 if (!up->port.iobase && !up->port.mapbase && !up->port.membase)
792 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%p): ",
793 up->port.line, up->port.iobase, up->port.membase);
796 * We really do need global IRQs disabled here - we're going to
797 * be frobbing the chips IRQ enable register to see if it exists.
799 spin_lock_irqsave(&up->port.lock, flags);
800 // save_flags(flags); cli();
802 up->capabilities = 0;
805 if (!(up->port.flags & UPF_BUGGY_UART)) {
807 * Do a simple existence test first; if we fail this,
808 * there's no point trying anything else.
810 * 0x80 is used as a nonsense port to prevent against
811 * false positives due to ISA bus float. The
812 * assumption is that 0x80 is a non-existent port;
813 * which should be safe since include/asm/io.h also
814 * makes this assumption.
816 * Note: this is safe as long as MCR bit 4 is clear
817 * and the device is in "PC" mode.
819 scratch = serial_inp(up, UART_IER);
820 serial_outp(up, UART_IER, 0);
824 scratch2 = serial_inp(up, UART_IER);
825 serial_outp(up, UART_IER, 0x0F);
829 scratch3 = serial_inp(up, UART_IER);
830 serial_outp(up, UART_IER, scratch);
831 if (scratch2 != 0 || scratch3 != 0x0F) {
833 * We failed; there's nothing here
835 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
841 save_mcr = serial_in(up, UART_MCR);
842 save_lcr = serial_in(up, UART_LCR);
845 * Check to see if a UART is really there. Certain broken
846 * internal modems based on the Rockwell chipset fail this
847 * test, because they apparently don't implement the loopback
848 * test mode. So this test is skipped on the COM 1 through
849 * COM 4 ports. This *should* be safe, since no board
850 * manufacturer would be stupid enough to design a board
851 * that conflicts with COM 1-4 --- we hope!
853 if (!(up->port.flags & UPF_SKIP_TEST)) {
854 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
855 status1 = serial_inp(up, UART_MSR) & 0xF0;
856 serial_outp(up, UART_MCR, save_mcr);
857 if (status1 != 0x90) {
858 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
865 * We're pretty sure there's a port here. Lets find out what
866 * type of port it is. The IIR top two bits allows us to find
867 * out if its 8250 or 16450, 16550, 16550A or later. This
868 * determines what we test for next.
870 * We also initialise the EFR (if any) to zero for later. The
871 * EFR occupies the same register location as the FCR and IIR.
873 serial_outp(up, UART_LCR, 0xBF);
874 serial_outp(up, UART_EFR, 0);
875 serial_outp(up, UART_LCR, 0);
877 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
878 scratch = serial_in(up, UART_IIR) >> 6;
880 DEBUG_AUTOCONF("iir=%d ", scratch);
887 up->port.type = PORT_UNKNOWN;
890 up->port.type = PORT_16550;
893 autoconfig_16550a(up);
897 #ifdef CONFIG_SERIAL_8250_RSA
899 * Only probe for RSA ports if we got the region.
901 if (up->port.type == PORT_16550A && probeflags & PROBE_RSA) {
904 for (i = 0 ; i < probe_rsa_count; ++i) {
905 if (probe_rsa[i] == up->port.iobase &&
907 up->port.type = PORT_RSA;
913 serial_outp(up, UART_LCR, save_lcr);
915 if (up->capabilities != uart_config[up->port.type].flags) {
917 "ttyS%d: detected caps %08x should be %08x\n",
918 up->port.line, up->capabilities,
919 uart_config[up->port.type].flags);
922 up->port.fifosize = uart_config[up->port.type].fifo_size;
923 up->capabilities = uart_config[up->port.type].flags;
924 up->tx_loadsz = uart_config[up->port.type].tx_loadsz;
926 if (up->port.type == PORT_UNKNOWN)
932 #ifdef CONFIG_SERIAL_8250_RSA
933 if (up->port.type == PORT_RSA)
934 serial_outp(up, UART_RSA_FRR, 0);
936 serial_outp(up, UART_MCR, save_mcr);
937 serial8250_clear_fifos(up);
938 (void)serial_in(up, UART_RX);
939 serial_outp(up, UART_IER, 0);
942 spin_unlock_irqrestore(&up->port.lock, flags);
943 // restore_flags(flags);
944 DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);
947 static void autoconfig_irq(struct uart_8250_port *up)
949 unsigned char save_mcr, save_ier;
950 unsigned char save_ICP = 0;
951 unsigned int ICP = 0;
955 if (up->port.flags & UPF_FOURPORT) {
956 ICP = (up->port.iobase & 0xfe0) | 0x1f;
957 save_ICP = inb_p(ICP);
962 /* forget possible initially masked and pending IRQ */
963 probe_irq_off(probe_irq_on());
964 save_mcr = serial_inp(up, UART_MCR);
965 save_ier = serial_inp(up, UART_IER);
966 serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
968 irqs = probe_irq_on();
969 serial_outp(up, UART_MCR, 0);
971 if (up->port.flags & UPF_FOURPORT) {
972 serial_outp(up, UART_MCR,
973 UART_MCR_DTR | UART_MCR_RTS);
975 serial_outp(up, UART_MCR,
976 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
978 serial_outp(up, UART_IER, 0x0f); /* enable all intrs */
979 (void)serial_inp(up, UART_LSR);
980 (void)serial_inp(up, UART_RX);
981 (void)serial_inp(up, UART_IIR);
982 (void)serial_inp(up, UART_MSR);
983 serial_outp(up, UART_TX, 0xFF);
985 irq = probe_irq_off(irqs);
987 serial_outp(up, UART_MCR, save_mcr);
988 serial_outp(up, UART_IER, save_ier);
990 if (up->port.flags & UPF_FOURPORT)
991 outb_p(save_ICP, ICP);
993 up->port.irq = (irq > 0) ? irq : 0;
996 static inline void __stop_tx(struct uart_8250_port *p)
998 if (p->ier & UART_IER_THRI) {
999 p->ier &= ~UART_IER_THRI;
1000 serial_out(p, UART_IER, p->ier);
1004 static void serial8250_stop_tx(struct uart_port *port)
1006 struct uart_8250_port *up = (struct uart_8250_port *)port;
1011 * We really want to stop the transmitter from sending.
1013 if (up->port.type == PORT_16C950) {
1014 up->acr |= UART_ACR_TXDIS;
1015 serial_icr_write(up, UART_ACR, up->acr);
1019 static void transmit_chars(struct uart_8250_port *up);
1021 static void serial8250_start_tx(struct uart_port *port)
1023 struct uart_8250_port *up = (struct uart_8250_port *)port;
1025 if (!(up->ier & UART_IER_THRI)) {
1026 up->ier |= UART_IER_THRI;
1027 serial_out(up, UART_IER, up->ier);
1029 if (up->bugs & UART_BUG_TXEN) {
1030 unsigned char lsr, iir;
1031 lsr = serial_in(up, UART_LSR);
1032 iir = serial_in(up, UART_IIR);
1033 if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT)
1039 * Re-enable the transmitter if we disabled it.
1041 if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
1042 up->acr &= ~UART_ACR_TXDIS;
1043 serial_icr_write(up, UART_ACR, up->acr);
1047 static void serial8250_stop_rx(struct uart_port *port)
1049 struct uart_8250_port *up = (struct uart_8250_port *)port;
1051 up->ier &= ~UART_IER_RLSI;
1052 up->port.read_status_mask &= ~UART_LSR_DR;
1053 serial_out(up, UART_IER, up->ier);
1056 static void serial8250_enable_ms(struct uart_port *port)
1058 struct uart_8250_port *up = (struct uart_8250_port *)port;
1060 up->ier |= UART_IER_MSI;
1061 serial_out(up, UART_IER, up->ier);
1064 static _INLINE_ void
1065 receive_chars(struct uart_8250_port *up, int *status, struct pt_regs *regs)
1067 struct tty_struct *tty = up->port.info->tty;
1068 unsigned char ch, lsr = *status;
1069 int max_count = 256;
1073 /* The following is not allowed by the tty layer and
1074 unsafe. It should be fixed ASAP */
1075 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
1076 if (tty->low_latency) {
1077 spin_unlock(&up->port.lock);
1078 tty_flip_buffer_push(tty);
1079 spin_lock(&up->port.lock);
1082 * If this failed then we will throw away the
1083 * bytes but must do so to clear interrupts
1086 ch = serial_inp(up, UART_RX);
1088 up->port.icount.rx++;
1090 #ifdef CONFIG_SERIAL_8250_CONSOLE
1092 * Recover the break flag from console xmit
1094 if (up->port.line == up->port.cons->index) {
1095 lsr |= up->lsr_break_flag;
1096 up->lsr_break_flag = 0;
1100 if (unlikely(lsr & (UART_LSR_BI | UART_LSR_PE |
1101 UART_LSR_FE | UART_LSR_OE))) {
1103 * For statistics only
1105 if (lsr & UART_LSR_BI) {
1106 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
1107 up->port.icount.brk++;
1109 * We do the SysRQ and SAK checking
1110 * here because otherwise the break
1111 * may get masked by ignore_status_mask
1112 * or read_status_mask.
1114 if (uart_handle_break(&up->port))
1116 } else if (lsr & UART_LSR_PE)
1117 up->port.icount.parity++;
1118 else if (lsr & UART_LSR_FE)
1119 up->port.icount.frame++;
1120 if (lsr & UART_LSR_OE)
1121 up->port.icount.overrun++;
1124 * Mask off conditions which should be ignored.
1126 lsr &= up->port.read_status_mask;
1128 if (lsr & UART_LSR_BI) {
1129 DEBUG_INTR("handling break....");
1131 } else if (lsr & UART_LSR_PE)
1133 else if (lsr & UART_LSR_FE)
1136 if (uart_handle_sysrq_char(&up->port, ch, regs))
1139 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
1142 lsr = serial_inp(up, UART_LSR);
1143 } while ((lsr & UART_LSR_DR) && (max_count-- > 0));
1144 spin_unlock(&up->port.lock);
1145 tty_flip_buffer_push(tty);
1146 spin_lock(&up->port.lock);
1150 static _INLINE_ void transmit_chars(struct uart_8250_port *up)
1152 struct circ_buf *xmit = &up->port.info->xmit;
1155 if (up->port.x_char) {
1156 serial_outp(up, UART_TX, up->port.x_char);
1157 up->port.icount.tx++;
1158 up->port.x_char = 0;
1161 if (uart_tx_stopped(&up->port)) {
1162 serial8250_stop_tx(&up->port);
1165 if (uart_circ_empty(xmit)) {
1170 count = up->tx_loadsz;
1172 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1173 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
1174 up->port.icount.tx++;
1175 if (uart_circ_empty(xmit))
1177 } while (--count > 0);
1179 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1180 uart_write_wakeup(&up->port);
1182 DEBUG_INTR("THRE...");
1184 if (uart_circ_empty(xmit))
1188 static _INLINE_ void check_modem_status(struct uart_8250_port *up)
1192 status = serial_in(up, UART_MSR);
1194 if ((status & UART_MSR_ANY_DELTA) == 0)
1197 if (status & UART_MSR_TERI)
1198 up->port.icount.rng++;
1199 if (status & UART_MSR_DDSR)
1200 up->port.icount.dsr++;
1201 if (status & UART_MSR_DDCD)
1202 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
1203 if (status & UART_MSR_DCTS)
1204 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
1206 wake_up_interruptible(&up->port.info->delta_msr_wait);
1210 * This handles the interrupt from one port.
1213 serial8250_handle_port(struct uart_8250_port *up, struct pt_regs *regs)
1215 unsigned int status = serial_inp(up, UART_LSR);
1217 DEBUG_INTR("status = %x...", status);
1219 if (status & UART_LSR_DR)
1220 receive_chars(up, &status, regs);
1221 check_modem_status(up);
1222 if (status & UART_LSR_THRE)
1227 * This is the serial driver's interrupt routine.
1229 * Arjan thinks the old way was overly complex, so it got simplified.
1230 * Alan disagrees, saying that need the complexity to handle the weird
1231 * nature of ISA shared interrupts. (This is a special exception.)
1233 * In order to handle ISA shared interrupts properly, we need to check
1234 * that all ports have been serviced, and therefore the ISA interrupt
1235 * line has been de-asserted.
1237 * This means we need to loop through all ports. checking that they
1238 * don't have an interrupt pending.
1240 static irqreturn_t serial8250_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1242 struct irq_info *i = dev_id;
1243 struct list_head *l, *end = NULL;
1244 int pass_counter = 0, handled = 0;
1246 DEBUG_INTR("serial8250_interrupt(%d)...", irq);
1248 spin_lock(&i->lock);
1252 struct uart_8250_port *up;
1255 up = list_entry(l, struct uart_8250_port, list);
1257 iir = serial_in(up, UART_IIR);
1258 if (!(iir & UART_IIR_NO_INT)) {
1259 spin_lock(&up->port.lock);
1260 serial8250_handle_port(up, regs);
1261 spin_unlock(&up->port.lock);
1266 } else if (end == NULL)
1271 if (l == i->head && pass_counter++ > PASS_LIMIT) {
1272 /* If we hit this, we're dead. */
1273 printk(KERN_ERR "serial8250: too much work for "
1279 spin_unlock(&i->lock);
1281 DEBUG_INTR("end.\n");
1283 //return IRQ_RETVAL(handled);
1284 return IRQ_HANDLED; /* FIXME: iir status not ready on 1510 */
1288 * To support ISA shared interrupts, we need to have one interrupt
1289 * handler that ensures that the IRQ line has been deasserted
1290 * before returning. Failing to do this will result in the IRQ
1291 * line being stuck active, and, since ISA irqs are edge triggered,
1292 * no more IRQs will be seen.
1294 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
1296 spin_lock_irq(&i->lock);
1298 if (!list_empty(i->head)) {
1299 if (i->head == &up->list)
1300 i->head = i->head->next;
1301 list_del(&up->list);
1303 BUG_ON(i->head != &up->list);
1307 spin_unlock_irq(&i->lock);
1310 static int serial_link_irq_chain(struct uart_8250_port *up)
1312 struct irq_info *i = irq_lists + up->port.irq;
1313 int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? SA_SHIRQ : 0;
1315 spin_lock_irq(&i->lock);
1318 list_add(&up->list, i->head);
1319 spin_unlock_irq(&i->lock);
1323 INIT_LIST_HEAD(&up->list);
1324 i->head = &up->list;
1325 spin_unlock_irq(&i->lock);
1327 ret = request_irq(up->port.irq, serial8250_interrupt,
1328 irq_flags, "serial", i);
1330 serial_do_unlink(i, up);
1336 static void serial_unlink_irq_chain(struct uart_8250_port *up)
1338 struct irq_info *i = irq_lists + up->port.irq;
1340 BUG_ON(i->head == NULL);
1342 if (list_empty(i->head))
1343 free_irq(up->port.irq, i);
1345 serial_do_unlink(i, up);
1349 * This function is used to handle ports that do not have an
1350 * interrupt. This doesn't work very well for 16450's, but gives
1351 * barely passable results for a 16550A. (Although at the expense
1352 * of much CPU overhead).
1354 static void serial8250_timeout(unsigned long data)
1356 struct uart_8250_port *up = (struct uart_8250_port *)data;
1357 unsigned int timeout;
1360 iir = serial_in(up, UART_IIR);
1361 if (!(iir & UART_IIR_NO_INT)) {
1362 spin_lock(&up->port.lock);
1363 serial8250_handle_port(up, NULL);
1364 spin_unlock(&up->port.lock);
1367 timeout = up->port.timeout;
1368 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
1369 mod_timer(&up->timer, jiffies + timeout);
1372 static unsigned int serial8250_tx_empty(struct uart_port *port)
1374 struct uart_8250_port *up = (struct uart_8250_port *)port;
1375 unsigned long flags;
1378 spin_lock_irqsave(&up->port.lock, flags);
1379 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
1380 spin_unlock_irqrestore(&up->port.lock, flags);
1385 static unsigned int serial8250_get_mctrl(struct uart_port *port)
1387 struct uart_8250_port *up = (struct uart_8250_port *)port;
1388 unsigned char status;
1391 status = serial_in(up, UART_MSR);
1394 if (status & UART_MSR_DCD)
1396 if (status & UART_MSR_RI)
1398 if (status & UART_MSR_DSR)
1400 if (status & UART_MSR_CTS)
1405 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
1407 struct uart_8250_port *up = (struct uart_8250_port *)port;
1408 unsigned char mcr = 0;
1410 if (mctrl & TIOCM_RTS)
1411 mcr |= UART_MCR_RTS;
1412 if (mctrl & TIOCM_DTR)
1413 mcr |= UART_MCR_DTR;
1414 if (mctrl & TIOCM_OUT1)
1415 mcr |= UART_MCR_OUT1;
1416 if (mctrl & TIOCM_OUT2)
1417 mcr |= UART_MCR_OUT2;
1418 if (mctrl & TIOCM_LOOP)
1419 mcr |= UART_MCR_LOOP;
1421 mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
1423 serial_out(up, UART_MCR, mcr);
1426 static void serial8250_break_ctl(struct uart_port *port, int break_state)
1428 struct uart_8250_port *up = (struct uart_8250_port *)port;
1429 unsigned long flags;
1431 spin_lock_irqsave(&up->port.lock, flags);
1432 if (break_state == -1)
1433 up->lcr |= UART_LCR_SBC;
1435 up->lcr &= ~UART_LCR_SBC;
1436 serial_out(up, UART_LCR, up->lcr);
1437 spin_unlock_irqrestore(&up->port.lock, flags);
1440 static int serial8250_startup(struct uart_port *port)
1442 struct uart_8250_port *up = (struct uart_8250_port *)port;
1443 unsigned long flags;
1444 unsigned char lsr, iir;
1447 up->capabilities = uart_config[up->port.type].flags;
1450 if (up->port.type == PORT_16C950) {
1451 /* Wake up and initialize UART */
1453 serial_outp(up, UART_LCR, 0xBF);
1454 serial_outp(up, UART_EFR, UART_EFR_ECB);
1455 serial_outp(up, UART_IER, 0);
1456 serial_outp(up, UART_LCR, 0);
1457 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
1458 serial_outp(up, UART_LCR, 0xBF);
1459 serial_outp(up, UART_EFR, UART_EFR_ECB);
1460 serial_outp(up, UART_LCR, 0);
1463 #ifdef CONFIG_SERIAL_8250_RSA
1465 * If this is an RSA port, see if we can kick it up to the
1466 * higher speed clock.
1472 * Clear the FIFO buffers and disable them.
1473 * (they will be reeanbled in set_termios())
1475 serial8250_clear_fifos(up);
1478 * Clear the interrupt registers.
1480 (void) serial_inp(up, UART_LSR);
1481 (void) serial_inp(up, UART_RX);
1482 (void) serial_inp(up, UART_IIR);
1483 (void) serial_inp(up, UART_MSR);
1486 * At this point, there's no way the LSR could still be 0xff;
1487 * if it is, then bail out, because there's likely no UART
1490 if (!(up->port.flags & UPF_BUGGY_UART) &&
1491 (serial_inp(up, UART_LSR) == 0xff)) {
1492 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
1497 * For a XR16C850, we need to set the trigger levels
1499 if (up->port.type == PORT_16850) {
1502 serial_outp(up, UART_LCR, 0xbf);
1504 fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
1505 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);
1506 serial_outp(up, UART_TRG, UART_TRG_96);
1507 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX);
1508 serial_outp(up, UART_TRG, UART_TRG_96);
1510 serial_outp(up, UART_LCR, 0);
1514 * If the "interrupt" for this port doesn't correspond with any
1515 * hardware interrupt, we use a timer-based system. The original
1516 * driver used to do this with IRQ0.
1518 if (!is_real_interrupt(up->port.irq)) {
1519 unsigned int timeout = up->port.timeout;
1521 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
1523 up->timer.data = (unsigned long)up;
1524 mod_timer(&up->timer, jiffies + timeout);
1526 retval = serial_link_irq_chain(up);
1532 * Now, initialize the UART
1534 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
1536 spin_lock_irqsave(&up->port.lock, flags);
1537 if (up->port.flags & UPF_FOURPORT) {
1538 if (!is_real_interrupt(up->port.irq))
1539 up->port.mctrl |= TIOCM_OUT1;
1542 * Most PC uarts need OUT2 raised to enable interrupts.
1544 if (is_real_interrupt(up->port.irq))
1545 up->port.mctrl |= TIOCM_OUT2;
1547 serial8250_set_mctrl(&up->port, up->port.mctrl);
1550 * Do a quick test to see if we receive an
1551 * interrupt when we enable the TX irq.
1553 serial_outp(up, UART_IER, UART_IER_THRI);
1554 lsr = serial_in(up, UART_LSR);
1555 iir = serial_in(up, UART_IIR);
1556 serial_outp(up, UART_IER, 0);
1558 if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
1559 if (!(up->bugs & UART_BUG_TXEN)) {
1560 up->bugs |= UART_BUG_TXEN;
1561 pr_debug("ttyS%d - enabling bad tx status workarounds\n",
1565 up->bugs &= ~UART_BUG_TXEN;
1568 spin_unlock_irqrestore(&up->port.lock, flags);
1571 * Finally, enable interrupts. Note: Modem status interrupts
1572 * are set via set_termios(), which will be occurring imminently
1573 * anyway, so we don't enable them here.
1575 up->ier = UART_IER_RLSI | UART_IER_RDI;
1576 serial_outp(up, UART_IER, up->ier);
1578 if (up->port.flags & UPF_FOURPORT) {
1581 * Enable interrupts on the AST Fourport board
1583 icp = (up->port.iobase & 0xfe0) | 0x01f;
1589 * And clear the interrupt registers again for luck.
1591 (void) serial_inp(up, UART_LSR);
1592 (void) serial_inp(up, UART_RX);
1593 (void) serial_inp(up, UART_IIR);
1594 (void) serial_inp(up, UART_MSR);
1599 static void serial8250_shutdown(struct uart_port *port)
1601 struct uart_8250_port *up = (struct uart_8250_port *)port;
1602 unsigned long flags;
1605 * Disable interrupts from this port
1608 serial_outp(up, UART_IER, 0);
1610 spin_lock_irqsave(&up->port.lock, flags);
1611 if (up->port.flags & UPF_FOURPORT) {
1612 /* reset interrupts on the AST Fourport board */
1613 inb((up->port.iobase & 0xfe0) | 0x1f);
1614 up->port.mctrl |= TIOCM_OUT1;
1616 up->port.mctrl &= ~TIOCM_OUT2;
1618 serial8250_set_mctrl(&up->port, up->port.mctrl);
1619 spin_unlock_irqrestore(&up->port.lock, flags);
1622 * Disable break condition and FIFOs
1624 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
1625 serial8250_clear_fifos(up);
1627 #ifdef CONFIG_SERIAL_8250_RSA
1629 * Reset the RSA board back to 115kbps compat mode.
1635 * Read data port to reset things, and then unlink from
1638 (void) serial_in(up, UART_RX);
1640 if (!is_real_interrupt(up->port.irq))
1641 del_timer_sync(&up->timer);
1643 serial_unlink_irq_chain(up);
1646 static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
1651 * Handle magic divisors for baud rates above baud_base on
1652 * SMSC SuperIO chips.
1654 if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
1655 baud == (port->uartclk/4))
1657 else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
1658 baud == (port->uartclk/8))
1661 quot = uart_get_divisor(port, baud);
1667 serial8250_set_termios(struct uart_port *port, struct termios *termios,
1668 struct termios *old)
1670 struct uart_8250_port *up = (struct uart_8250_port *)port;
1671 unsigned char cval, fcr = 0;
1672 unsigned long flags;
1673 unsigned int baud, quot;
1675 switch (termios->c_cflag & CSIZE) {
1677 cval = UART_LCR_WLEN5;
1680 cval = UART_LCR_WLEN6;
1683 cval = UART_LCR_WLEN7;
1687 cval = UART_LCR_WLEN8;
1691 if (termios->c_cflag & CSTOPB)
1692 cval |= UART_LCR_STOP;
1693 if (termios->c_cflag & PARENB)
1694 cval |= UART_LCR_PARITY;
1695 if (!(termios->c_cflag & PARODD))
1696 cval |= UART_LCR_EPAR;
1698 if (termios->c_cflag & CMSPAR)
1699 cval |= UART_LCR_SPAR;
1703 * Ask the core to calculate the divisor for us.
1705 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
1706 quot = serial8250_get_divisor(port, baud);
1709 * Oxford Semi 952 rev B workaround
1711 if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
1714 if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {
1716 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
1718 fcr = uart_config[up->port.type].fcr;
1722 * MCR-based auto flow control. When AFE is enabled, RTS will be
1723 * deasserted when the receive FIFO contains more characters than
1724 * the trigger, or the MCR RTS bit is cleared. In the case where
1725 * the remote UART is not using CTS auto flow control, we must
1726 * have sufficient FIFO entries for the latency of the remote
1727 * UART to respond. IOW, at least 32 bytes of FIFO.
1729 if (up->capabilities & UART_CAP_AFE && up->port.fifosize >= 32) {
1730 up->mcr &= ~UART_MCR_AFE;
1731 if (termios->c_cflag & CRTSCTS)
1732 up->mcr |= UART_MCR_AFE;
1736 * Ok, we're now changing the port state. Do it with
1737 * interrupts disabled.
1739 spin_lock_irqsave(&up->port.lock, flags);
1742 * Update the per-port timeout.
1744 uart_update_timeout(port, termios->c_cflag, baud);
1746 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
1747 if (termios->c_iflag & INPCK)
1748 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
1749 if (termios->c_iflag & (BRKINT | PARMRK))
1750 up->port.read_status_mask |= UART_LSR_BI;
1753 * Characteres to ignore
1755 up->port.ignore_status_mask = 0;
1756 if (termios->c_iflag & IGNPAR)
1757 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
1758 if (termios->c_iflag & IGNBRK) {
1759 up->port.ignore_status_mask |= UART_LSR_BI;
1761 * If we're ignoring parity and break indicators,
1762 * ignore overruns too (for real raw support).
1764 if (termios->c_iflag & IGNPAR)
1765 up->port.ignore_status_mask |= UART_LSR_OE;
1769 * ignore all characters if CREAD is not set
1771 if ((termios->c_cflag & CREAD) == 0)
1772 up->port.ignore_status_mask |= UART_LSR_DR;
1775 * CTS flow control flag and modem status interrupts
1777 up->ier &= ~UART_IER_MSI;
1778 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
1779 up->ier |= UART_IER_MSI;
1780 if (up->capabilities & UART_CAP_UUE)
1781 up->ier |= UART_IER_UUE | UART_IER_RTOIE;
1783 serial_out(up, UART_IER, up->ier);
1785 if (up->capabilities & UART_CAP_EFR) {
1786 unsigned char efr = 0;
1788 * TI16C752/Startech hardware flow control. FIXME:
1789 * - TI16C752 requires control thresholds to be set.
1790 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
1792 if (termios->c_cflag & CRTSCTS)
1793 efr |= UART_EFR_CTS;
1795 serial_outp(up, UART_LCR, 0xBF);
1796 serial_outp(up, UART_EFR, efr);
1799 #ifdef CONFIG_ARCH_OMAP1510
1800 /* Workaround to enable 115200 baud on OMAP1510 internal ports */
1801 if (cpu_is_omap1510() && is_omap_port((unsigned int)up->port.membase)) {
1802 if (baud == 115200) {
1804 serial_out(up, UART_OMAP_OSC_12M_SEL, 1);
1806 serial_out(up, UART_OMAP_OSC_12M_SEL, 0);
1810 if (up->capabilities & UART_NATSEMI) {
1811 /* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
1812 serial_outp(up, UART_LCR, 0xe0);
1814 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
1817 serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
1818 serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
1821 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
1822 * is written without DLAB set, this mode will be disabled.
1824 if (up->port.type == PORT_16750)
1825 serial_outp(up, UART_FCR, fcr);
1827 serial_outp(up, UART_LCR, cval); /* reset DLAB */
1828 up->lcr = cval; /* Save LCR */
1829 if (up->port.type != PORT_16750) {
1830 if (fcr & UART_FCR_ENABLE_FIFO) {
1831 /* emulated UARTs (Lucent Venus 167x) need two steps */
1832 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1834 serial_outp(up, UART_FCR, fcr); /* set fcr */
1836 serial8250_set_mctrl(&up->port, up->port.mctrl);
1837 spin_unlock_irqrestore(&up->port.lock, flags);
1841 serial8250_pm(struct uart_port *port, unsigned int state,
1842 unsigned int oldstate)
1844 struct uart_8250_port *p = (struct uart_8250_port *)port;
1846 serial8250_set_sleep(p, state != 0);
1849 p->pm(port, state, oldstate);
1853 * Resource handling.
1855 static int serial8250_request_std_resource(struct uart_8250_port *up)
1857 unsigned int size = 8 << up->port.regshift;
1860 #ifdef CONFIG_ARCH_OMAP
1861 if (is_omap_port((unsigned int)up->port.membase))
1862 size = 0x16 << up->port.regshift;
1865 switch (up->port.iotype) {
1867 if (!up->port.mapbase)
1870 if (!request_mem_region(up->port.mapbase, size, "serial")) {
1875 if (up->port.flags & UPF_IOREMAP) {
1876 up->port.membase = ioremap(up->port.mapbase, size);
1877 if (!up->port.membase) {
1878 release_mem_region(up->port.mapbase, size);
1886 if (!request_region(up->port.iobase, size, "serial"))
1893 static void serial8250_release_std_resource(struct uart_8250_port *up)
1895 unsigned int size = 8 << up->port.regshift;
1897 switch (up->port.iotype) {
1899 if (!up->port.mapbase)
1902 if (up->port.flags & UPF_IOREMAP) {
1903 iounmap(up->port.membase);
1904 up->port.membase = NULL;
1907 release_mem_region(up->port.mapbase, size);
1912 release_region(up->port.iobase, size);
1917 static int serial8250_request_rsa_resource(struct uart_8250_port *up)
1919 unsigned long start = UART_RSA_BASE << up->port.regshift;
1920 unsigned int size = 8 << up->port.regshift;
1923 switch (up->port.iotype) {
1930 start += up->port.iobase;
1931 if (!request_region(start, size, "serial-rsa"))
1939 static void serial8250_release_rsa_resource(struct uart_8250_port *up)
1941 unsigned long offset = UART_RSA_BASE << up->port.regshift;
1942 unsigned int size = 8 << up->port.regshift;
1944 switch (up->port.iotype) {
1950 release_region(up->port.iobase + offset, size);
1955 static void serial8250_release_port(struct uart_port *port)
1957 struct uart_8250_port *up = (struct uart_8250_port *)port;
1959 serial8250_release_std_resource(up);
1960 if (up->port.type == PORT_RSA)
1961 serial8250_release_rsa_resource(up);
1964 static int serial8250_request_port(struct uart_port *port)
1966 struct uart_8250_port *up = (struct uart_8250_port *)port;
1969 ret = serial8250_request_std_resource(up);
1970 if (ret == 0 && up->port.type == PORT_RSA) {
1971 ret = serial8250_request_rsa_resource(up);
1973 serial8250_release_std_resource(up);
1979 static void serial8250_config_port(struct uart_port *port, int flags)
1981 struct uart_8250_port *up = (struct uart_8250_port *)port;
1982 int probeflags = PROBE_ANY;
1986 * Don't probe for MCA ports on non-MCA machines.
1988 if (up->port.flags & UPF_BOOT_ONLYMCA && !MCA_bus)
1992 * Find the region that we can probe for. This in turn
1993 * tells us whether we can probe for the type of port.
1995 ret = serial8250_request_std_resource(up);
1999 ret = serial8250_request_rsa_resource(up);
2001 probeflags &= ~PROBE_RSA;
2003 if (flags & UART_CONFIG_TYPE)
2004 autoconfig(up, probeflags);
2005 if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
2008 if (up->port.type != PORT_RSA && probeflags & PROBE_RSA)
2009 serial8250_release_rsa_resource(up);
2010 if (up->port.type == PORT_UNKNOWN)
2011 serial8250_release_std_resource(up);
2015 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
2017 if (ser->irq >= NR_IRQS || ser->irq < 0 ||
2018 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
2019 ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
2020 ser->type == PORT_STARTECH)
2026 serial8250_type(struct uart_port *port)
2028 int type = port->type;
2030 if (type >= ARRAY_SIZE(uart_config))
2032 return uart_config[type].name;
2035 static struct uart_ops serial8250_pops = {
2036 .tx_empty = serial8250_tx_empty,
2037 .set_mctrl = serial8250_set_mctrl,
2038 .get_mctrl = serial8250_get_mctrl,
2039 .stop_tx = serial8250_stop_tx,
2040 .start_tx = serial8250_start_tx,
2041 .stop_rx = serial8250_stop_rx,
2042 .enable_ms = serial8250_enable_ms,
2043 .break_ctl = serial8250_break_ctl,
2044 .startup = serial8250_startup,
2045 .shutdown = serial8250_shutdown,
2046 .set_termios = serial8250_set_termios,
2047 .pm = serial8250_pm,
2048 .type = serial8250_type,
2049 .release_port = serial8250_release_port,
2050 .request_port = serial8250_request_port,
2051 .config_port = serial8250_config_port,
2052 .verify_port = serial8250_verify_port,
2055 static struct uart_8250_port serial8250_ports[UART_NR];
2057 static void __init serial8250_isa_init_ports(void)
2059 struct uart_8250_port *up;
2060 static int first = 1;
2067 for (i = 0; i < UART_NR; i++) {
2068 struct uart_8250_port *up = &serial8250_ports[i];
2071 spin_lock_init(&up->port.lock);
2073 init_timer(&up->timer);
2074 up->timer.function = serial8250_timeout;
2077 * ALPHA_KLUDGE_MCR needs to be killed.
2079 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
2080 up->mcr_force = ALPHA_KLUDGE_MCR;
2082 up->port.ops = &serial8250_pops;
2085 for (i = 0, up = serial8250_ports;
2086 i < ARRAY_SIZE(old_serial_port) && i < UART_NR;
2088 up->port.iobase = old_serial_port[i].port;
2089 up->port.irq = irq_canonicalize(old_serial_port[i].irq);
2090 up->port.uartclk = old_serial_port[i].baud_base * 16;
2091 up->port.flags = old_serial_port[i].flags;
2092 up->port.hub6 = old_serial_port[i].hub6;
2093 up->port.membase = old_serial_port[i].iomem_base;
2094 up->port.iotype = old_serial_port[i].io_type;
2095 up->port.regshift = old_serial_port[i].iomem_reg_shift;
2097 up->port.flags |= UPF_SHARE_IRQ;
2102 serial8250_register_ports(struct uart_driver *drv, struct device *dev)
2106 serial8250_isa_init_ports();
2108 for (i = 0; i < UART_NR; i++) {
2109 struct uart_8250_port *up = &serial8250_ports[i];
2112 uart_add_one_port(drv, &up->port);
2116 #ifdef CONFIG_SERIAL_8250_CONSOLE
2118 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
2121 * Wait for transmitter & holding register to empty
2123 static inline void wait_for_xmitr(struct uart_8250_port *up)
2125 unsigned int status, tmout = 10000;
2127 /* Wait up to 10ms for the character(s) to be sent. */
2129 status = serial_in(up, UART_LSR);
2131 if (status & UART_LSR_BI)
2132 up->lsr_break_flag = UART_LSR_BI;
2137 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
2139 /* Wait up to 1s for flow control if necessary */
2140 if (up->port.flags & UPF_CONS_FLOW) {
2143 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
2149 * Print a string to the serial port trying not to disturb
2150 * any possible real use of the port...
2152 * The console_lock must be held when we get here.
2155 serial8250_console_write(struct console *co, const char *s, unsigned int count)
2157 struct uart_8250_port *up = &serial8250_ports[co->index];
2162 * First save the UER then disable the interrupts
2164 ier = serial_in(up, UART_IER);
2166 if (up->capabilities & UART_CAP_UUE)
2167 serial_out(up, UART_IER, UART_IER_UUE);
2169 serial_out(up, UART_IER, 0);
2172 * Now, do each character
2174 for (i = 0; i < count; i++, s++) {
2178 * Send the character out.
2179 * If a LF, also do CR...
2181 serial_out(up, UART_TX, *s);
2184 serial_out(up, UART_TX, 13);
2189 * Finally, wait for transmitter to become empty
2190 * and restore the IER
2193 serial_out(up, UART_IER, ier);
2196 static int serial8250_console_setup(struct console *co, char *options)
2198 struct uart_port *port;
2205 * Check whether an invalid uart number has been specified, and
2206 * if so, search for the first available port that does have
2209 if (co->index >= UART_NR)
2211 port = &serial8250_ports[co->index].port;
2212 if (!port->iobase && !port->membase)
2216 uart_parse_options(options, &baud, &parity, &bits, &flow);
2218 return uart_set_options(port, co, baud, parity, bits, flow);
2221 static struct uart_driver serial8250_reg;
2222 static struct console serial8250_console = {
2224 .write = serial8250_console_write,
2225 .device = uart_console_device,
2226 .setup = serial8250_console_setup,
2227 .flags = CON_PRINTBUFFER,
2229 .data = &serial8250_reg,
2232 static int __init serial8250_console_init(void)
2234 serial8250_isa_init_ports();
2235 register_console(&serial8250_console);
2238 console_initcall(serial8250_console_init);
2240 static int __init find_port(struct uart_port *p)
2243 struct uart_port *port;
2245 for (line = 0; line < UART_NR; line++) {
2246 port = &serial8250_ports[line].port;
2247 if (p->iotype == port->iotype &&
2248 p->iobase == port->iobase &&
2249 p->membase == port->membase)
2255 int __init serial8250_start_console(struct uart_port *port, char *options)
2259 line = find_port(port);
2263 add_preferred_console("ttyS", line, options);
2264 printk("Adding console on ttyS%d at %s 0x%lx (options '%s')\n",
2265 line, port->iotype == UPIO_MEM ? "MMIO" : "I/O port",
2266 port->iotype == UPIO_MEM ? (unsigned long) port->mapbase :
2267 (unsigned long) port->iobase, options);
2268 if (!(serial8250_console.flags & CON_ENABLED)) {
2269 serial8250_console.flags &= ~CON_PRINTBUFFER;
2270 register_console(&serial8250_console);
2275 #define SERIAL8250_CONSOLE &serial8250_console
2277 #define SERIAL8250_CONSOLE NULL
2280 static struct uart_driver serial8250_reg = {
2281 .owner = THIS_MODULE,
2282 .driver_name = "serial",
2283 .devfs_name = "tts/",
2288 .cons = SERIAL8250_CONSOLE,
2291 int __init early_serial_setup(struct uart_port *port)
2293 if (port->line >= ARRAY_SIZE(serial8250_ports))
2296 serial8250_isa_init_ports();
2297 serial8250_ports[port->line].port = *port;
2298 serial8250_ports[port->line].port.ops = &serial8250_pops;
2303 * serial8250_suspend_port - suspend one serial port
2304 * @line: serial line number
2305 * @level: the level of port suspension, as per uart_suspend_port
2307 * Suspend one serial port.
2309 void serial8250_suspend_port(int line)
2311 uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
2315 * serial8250_resume_port - resume one serial port
2316 * @line: serial line number
2317 * @level: the level of port resumption, as per uart_resume_port
2319 * Resume one serial port.
2321 void serial8250_resume_port(int line)
2323 uart_resume_port(&serial8250_reg, &serial8250_ports[line].port);
2327 * Register a set of serial devices attached to a platform device. The
2328 * list is terminated with a zero flags entry, which means we expect
2329 * all entries to have at least UPF_BOOT_AUTOCONF set.
2331 static int __devinit serial8250_probe(struct device *dev)
2333 struct plat_serial8250_port *p = dev->platform_data;
2334 struct uart_port port;
2337 memset(&port, 0, sizeof(struct uart_port));
2339 for (i = 0; p && p->flags != 0; p++, i++) {
2340 port.iobase = p->iobase;
2341 port.membase = p->membase;
2343 port.uartclk = p->uartclk;
2344 port.regshift = p->regshift;
2345 port.iotype = p->iotype;
2346 port.flags = p->flags;
2347 port.mapbase = p->mapbase;
2348 port.hub6 = p->hub6;
2351 port.flags |= UPF_SHARE_IRQ;
2352 ret = serial8250_register_port(&port);
2354 dev_err(dev, "unable to register port at index %d "
2355 "(IO%lx MEM%lx IRQ%d): %d\n", i,
2356 p->iobase, p->mapbase, p->irq, ret);
2363 * Remove serial ports registered against a platform device.
2365 static int __devexit serial8250_remove(struct device *dev)
2369 for (i = 0; i < UART_NR; i++) {
2370 struct uart_8250_port *up = &serial8250_ports[i];
2372 if (up->port.dev == dev)
2373 serial8250_unregister_port(i);
2378 static int serial8250_suspend(struct device *dev, pm_message_t state, u32 level)
2382 if (level != SUSPEND_DISABLE)
2385 for (i = 0; i < UART_NR; i++) {
2386 struct uart_8250_port *up = &serial8250_ports[i];
2388 if (up->port.type != PORT_UNKNOWN && up->port.dev == dev)
2389 uart_suspend_port(&serial8250_reg, &up->port);
2395 static int serial8250_resume(struct device *dev, u32 level)
2399 if (level != RESUME_ENABLE)
2402 for (i = 0; i < UART_NR; i++) {
2403 struct uart_8250_port *up = &serial8250_ports[i];
2405 if (up->port.type != PORT_UNKNOWN && up->port.dev == dev)
2406 uart_resume_port(&serial8250_reg, &up->port);
2412 static struct device_driver serial8250_isa_driver = {
2413 .name = "serial8250",
2414 .bus = &platform_bus_type,
2415 .probe = serial8250_probe,
2416 .remove = __devexit_p(serial8250_remove),
2417 .suspend = serial8250_suspend,
2418 .resume = serial8250_resume,
2422 * This "device" covers _all_ ISA 8250-compatible serial devices listed
2423 * in the table in include/asm/serial.h
2425 static struct platform_device *serial8250_isa_devs;
2428 * serial8250_register_port and serial8250_unregister_port allows for
2429 * 16x50 serial ports to be configured at run-time, to support PCMCIA
2430 * modems and PCI multiport cards.
2432 static DECLARE_MUTEX(serial_sem);
2434 static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
2439 * First, find a port entry which matches.
2441 for (i = 0; i < UART_NR; i++)
2442 if (uart_match_port(&serial8250_ports[i].port, port))
2443 return &serial8250_ports[i];
2446 * We didn't find a matching entry, so look for the first
2447 * free entry. We look for one which hasn't been previously
2448 * used (indicated by zero iobase).
2450 for (i = 0; i < UART_NR; i++)
2451 if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
2452 serial8250_ports[i].port.iobase == 0)
2453 return &serial8250_ports[i];
2456 * That also failed. Last resort is to find any entry which
2457 * doesn't have a real port associated with it.
2459 for (i = 0; i < UART_NR; i++)
2460 if (serial8250_ports[i].port.type == PORT_UNKNOWN)
2461 return &serial8250_ports[i];
2467 * serial8250_register_port - register a serial port
2468 * @port: serial port template
2470 * Configure the serial port specified by the request. If the
2471 * port exists and is in use, it is hung up and unregistered
2474 * The port is then probed and if necessary the IRQ is autodetected
2475 * If this fails an error is returned.
2477 * On success the port is ready to use and the line number is returned.
2479 int serial8250_register_port(struct uart_port *port)
2481 struct uart_8250_port *uart;
2484 if (port->uartclk == 0)
2489 uart = serial8250_find_match_or_unused(port);
2491 uart_remove_one_port(&serial8250_reg, &uart->port);
2493 uart->port.iobase = port->iobase;
2494 uart->port.membase = port->membase;
2495 uart->port.irq = port->irq;
2496 uart->port.uartclk = port->uartclk;
2497 uart->port.fifosize = port->fifosize;
2498 uart->port.regshift = port->regshift;
2499 uart->port.iotype = port->iotype;
2500 uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;
2501 uart->port.mapbase = port->mapbase;
2503 uart->port.dev = port->dev;
2505 ret = uart_add_one_port(&serial8250_reg, &uart->port);
2507 ret = uart->port.line;
2513 EXPORT_SYMBOL(serial8250_register_port);
2516 * serial8250_unregister_port - remove a 16x50 serial port at runtime
2517 * @line: serial line number
2519 * Remove one serial port. This may not be called from interrupt
2520 * context. We hand the port back to the our control.
2522 void serial8250_unregister_port(int line)
2524 struct uart_8250_port *uart = &serial8250_ports[line];
2527 uart_remove_one_port(&serial8250_reg, &uart->port);
2528 if (serial8250_isa_devs) {
2529 uart->port.flags &= ~UPF_BOOT_AUTOCONF;
2530 uart->port.type = PORT_UNKNOWN;
2531 uart->port.dev = &serial8250_isa_devs->dev;
2532 uart_add_one_port(&serial8250_reg, &uart->port);
2534 uart->port.dev = NULL;
2538 EXPORT_SYMBOL(serial8250_unregister_port);
2540 static int __init serial8250_init(void)
2544 printk(KERN_INFO "Serial: 8250/16550 driver $Revision: 1.90 $ "
2545 "%d ports, IRQ sharing %sabled\n", (int) UART_NR,
2546 share_irqs ? "en" : "dis");
2548 for (i = 0; i < NR_IRQS; i++)
2549 spin_lock_init(&irq_lists[i].lock);
2551 ret = uart_register_driver(&serial8250_reg);
2555 serial8250_isa_devs = platform_device_register_simple("serial8250",
2557 if (IS_ERR(serial8250_isa_devs)) {
2558 ret = PTR_ERR(serial8250_isa_devs);
2562 serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
2564 ret = driver_register(&serial8250_isa_driver);
2568 platform_device_unregister(serial8250_isa_devs);
2570 uart_unregister_driver(&serial8250_reg);
2575 static void __exit serial8250_exit(void)
2577 struct platform_device *isa_dev = serial8250_isa_devs;
2580 * This tells serial8250_unregister_port() not to re-register
2581 * the ports (thereby making serial8250_isa_driver permanently
2584 serial8250_isa_devs = NULL;
2586 driver_unregister(&serial8250_isa_driver);
2587 platform_device_unregister(isa_dev);
2589 uart_unregister_driver(&serial8250_reg);
2592 module_init(serial8250_init);
2593 module_exit(serial8250_exit);
2595 EXPORT_SYMBOL(serial8250_suspend_port);
2596 EXPORT_SYMBOL(serial8250_resume_port);
2598 MODULE_LICENSE("GPL");
2599 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver $Revision: 1.90 $");
2601 module_param(share_irqs, uint, 0644);
2602 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
2605 #ifdef CONFIG_SERIAL_8250_RSA
2606 module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
2607 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
2609 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);