2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
55 #include "scsi_priv.h"
56 #include <scsi/scsi_host.h>
57 #include <linux/libata.h>
59 #include <asm/semaphore.h>
60 #include <asm/byteorder.h>
64 static unsigned int ata_busy_sleep (struct ata_port *ap,
65 unsigned long tmout_pat,
67 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev);
68 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev);
69 static void ata_set_mode(struct ata_port *ap);
70 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
71 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift);
72 static int fgb(u32 bitmap);
73 static int ata_choose_xfer_mode(const struct ata_port *ap,
75 unsigned int *xfer_shift_out);
76 static void __ata_qc_complete(struct ata_queued_cmd *qc);
78 static unsigned int ata_unique_id = 1;
79 static struct workqueue_struct *ata_wq;
81 int atapi_enabled = 0;
82 module_param(atapi_enabled, int, 0444);
83 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
85 MODULE_AUTHOR("Jeff Garzik");
86 MODULE_DESCRIPTION("Library module for ATA devices");
87 MODULE_LICENSE("GPL");
88 MODULE_VERSION(DRV_VERSION);
91 * ata_tf_load_pio - send taskfile registers to host controller
92 * @ap: Port to which output is sent
93 * @tf: ATA taskfile register set
95 * Outputs ATA taskfile to standard ATA host controller.
98 * Inherited from caller.
101 static void ata_tf_load_pio(struct ata_port *ap, const struct ata_taskfile *tf)
103 struct ata_ioports *ioaddr = &ap->ioaddr;
104 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
106 if (tf->ctl != ap->last_ctl) {
107 outb(tf->ctl, ioaddr->ctl_addr);
108 ap->last_ctl = tf->ctl;
112 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
113 outb(tf->hob_feature, ioaddr->feature_addr);
114 outb(tf->hob_nsect, ioaddr->nsect_addr);
115 outb(tf->hob_lbal, ioaddr->lbal_addr);
116 outb(tf->hob_lbam, ioaddr->lbam_addr);
117 outb(tf->hob_lbah, ioaddr->lbah_addr);
118 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
127 outb(tf->feature, ioaddr->feature_addr);
128 outb(tf->nsect, ioaddr->nsect_addr);
129 outb(tf->lbal, ioaddr->lbal_addr);
130 outb(tf->lbam, ioaddr->lbam_addr);
131 outb(tf->lbah, ioaddr->lbah_addr);
132 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
140 if (tf->flags & ATA_TFLAG_DEVICE) {
141 outb(tf->device, ioaddr->device_addr);
142 VPRINTK("device 0x%X\n", tf->device);
149 * ata_tf_load_mmio - send taskfile registers to host controller
150 * @ap: Port to which output is sent
151 * @tf: ATA taskfile register set
153 * Outputs ATA taskfile to standard ATA host controller using MMIO.
156 * Inherited from caller.
159 static void ata_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
161 struct ata_ioports *ioaddr = &ap->ioaddr;
162 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
164 if (tf->ctl != ap->last_ctl) {
165 writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
166 ap->last_ctl = tf->ctl;
170 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
171 writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr);
172 writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr);
173 writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr);
174 writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr);
175 writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr);
176 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
185 writeb(tf->feature, (void __iomem *) ioaddr->feature_addr);
186 writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr);
187 writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr);
188 writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr);
189 writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr);
190 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
198 if (tf->flags & ATA_TFLAG_DEVICE) {
199 writeb(tf->device, (void __iomem *) ioaddr->device_addr);
200 VPRINTK("device 0x%X\n", tf->device);
208 * ata_tf_load - send taskfile registers to host controller
209 * @ap: Port to which output is sent
210 * @tf: ATA taskfile register set
212 * Outputs ATA taskfile to standard ATA host controller using MMIO
213 * or PIO as indicated by the ATA_FLAG_MMIO flag.
214 * Writes the control, feature, nsect, lbal, lbam, and lbah registers.
215 * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect,
216 * hob_lbal, hob_lbam, and hob_lbah.
218 * This function waits for idle (!BUSY and !DRQ) after writing
219 * registers. If the control register has a new value, this
220 * function also waits for idle after writing control and before
221 * writing the remaining registers.
223 * May be used as the tf_load() entry in ata_port_operations.
226 * Inherited from caller.
228 void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
230 if (ap->flags & ATA_FLAG_MMIO)
231 ata_tf_load_mmio(ap, tf);
233 ata_tf_load_pio(ap, tf);
237 * ata_exec_command_pio - issue ATA command to host controller
238 * @ap: port to which command is being issued
239 * @tf: ATA taskfile register set
241 * Issues PIO write to ATA command register, with proper
242 * synchronization with interrupt handler / other threads.
245 * spin_lock_irqsave(host_set lock)
248 static void ata_exec_command_pio(struct ata_port *ap, const struct ata_taskfile *tf)
250 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
252 outb(tf->command, ap->ioaddr.command_addr);
258 * ata_exec_command_mmio - issue ATA command to host controller
259 * @ap: port to which command is being issued
260 * @tf: ATA taskfile register set
262 * Issues MMIO write to ATA command register, with proper
263 * synchronization with interrupt handler / other threads.
266 * spin_lock_irqsave(host_set lock)
269 static void ata_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
271 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
273 writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr);
279 * ata_exec_command - issue ATA command to host controller
280 * @ap: port to which command is being issued
281 * @tf: ATA taskfile register set
283 * Issues PIO/MMIO write to ATA command register, with proper
284 * synchronization with interrupt handler / other threads.
287 * spin_lock_irqsave(host_set lock)
289 void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
291 if (ap->flags & ATA_FLAG_MMIO)
292 ata_exec_command_mmio(ap, tf);
294 ata_exec_command_pio(ap, tf);
298 * ata_exec - issue ATA command to host controller
299 * @ap: port to which command is being issued
300 * @tf: ATA taskfile register set
302 * Issues PIO/MMIO write to ATA command register, with proper
303 * synchronization with interrupt handler / other threads.
306 * Obtains host_set lock.
309 static inline void ata_exec(struct ata_port *ap, const struct ata_taskfile *tf)
313 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
314 spin_lock_irqsave(&ap->host_set->lock, flags);
315 ap->ops->exec_command(ap, tf);
316 spin_unlock_irqrestore(&ap->host_set->lock, flags);
320 * ata_tf_to_host - issue ATA taskfile to host controller
321 * @ap: port to which command is being issued
322 * @tf: ATA taskfile register set
324 * Issues ATA taskfile register set to ATA host controller,
325 * with proper synchronization with interrupt handler and
329 * Obtains host_set lock.
332 static void ata_tf_to_host(struct ata_port *ap, const struct ata_taskfile *tf)
334 ap->ops->tf_load(ap, tf);
340 * ata_tf_to_host_nolock - issue ATA taskfile to host controller
341 * @ap: port to which command is being issued
342 * @tf: ATA taskfile register set
344 * Issues ATA taskfile register set to ATA host controller,
345 * with proper synchronization with interrupt handler and
349 * spin_lock_irqsave(host_set lock)
352 void ata_tf_to_host_nolock(struct ata_port *ap, const struct ata_taskfile *tf)
354 ap->ops->tf_load(ap, tf);
355 ap->ops->exec_command(ap, tf);
359 * ata_tf_read_pio - input device's ATA taskfile shadow registers
360 * @ap: Port from which input is read
361 * @tf: ATA taskfile register set for storing input
363 * Reads ATA taskfile registers for currently-selected device
367 * Inherited from caller.
370 static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf)
372 struct ata_ioports *ioaddr = &ap->ioaddr;
374 tf->command = ata_check_status(ap);
375 tf->feature = inb(ioaddr->error_addr);
376 tf->nsect = inb(ioaddr->nsect_addr);
377 tf->lbal = inb(ioaddr->lbal_addr);
378 tf->lbam = inb(ioaddr->lbam_addr);
379 tf->lbah = inb(ioaddr->lbah_addr);
380 tf->device = inb(ioaddr->device_addr);
382 if (tf->flags & ATA_TFLAG_LBA48) {
383 outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
384 tf->hob_feature = inb(ioaddr->error_addr);
385 tf->hob_nsect = inb(ioaddr->nsect_addr);
386 tf->hob_lbal = inb(ioaddr->lbal_addr);
387 tf->hob_lbam = inb(ioaddr->lbam_addr);
388 tf->hob_lbah = inb(ioaddr->lbah_addr);
393 * ata_tf_read_mmio - input device's ATA taskfile shadow registers
394 * @ap: Port from which input is read
395 * @tf: ATA taskfile register set for storing input
397 * Reads ATA taskfile registers for currently-selected device
401 * Inherited from caller.
404 static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf)
406 struct ata_ioports *ioaddr = &ap->ioaddr;
408 tf->command = ata_check_status(ap);
409 tf->feature = readb((void __iomem *)ioaddr->error_addr);
410 tf->nsect = readb((void __iomem *)ioaddr->nsect_addr);
411 tf->lbal = readb((void __iomem *)ioaddr->lbal_addr);
412 tf->lbam = readb((void __iomem *)ioaddr->lbam_addr);
413 tf->lbah = readb((void __iomem *)ioaddr->lbah_addr);
414 tf->device = readb((void __iomem *)ioaddr->device_addr);
416 if (tf->flags & ATA_TFLAG_LBA48) {
417 writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr);
418 tf->hob_feature = readb((void __iomem *)ioaddr->error_addr);
419 tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr);
420 tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr);
421 tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr);
422 tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr);
428 * ata_tf_read - input device's ATA taskfile shadow registers
429 * @ap: Port from which input is read
430 * @tf: ATA taskfile register set for storing input
432 * Reads ATA taskfile registers for currently-selected device
435 * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48
436 * is set, also reads the hob registers.
438 * May be used as the tf_read() entry in ata_port_operations.
441 * Inherited from caller.
443 void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
445 if (ap->flags & ATA_FLAG_MMIO)
446 ata_tf_read_mmio(ap, tf);
448 ata_tf_read_pio(ap, tf);
452 * ata_check_status_pio - Read device status reg & clear interrupt
453 * @ap: port where the device is
455 * Reads ATA taskfile status register for currently-selected device
456 * and return its value. This also clears pending interrupts
460 * Inherited from caller.
462 static u8 ata_check_status_pio(struct ata_port *ap)
464 return inb(ap->ioaddr.status_addr);
468 * ata_check_status_mmio - Read device status reg & clear interrupt
469 * @ap: port where the device is
471 * Reads ATA taskfile status register for currently-selected device
472 * via MMIO and return its value. This also clears pending interrupts
476 * Inherited from caller.
478 static u8 ata_check_status_mmio(struct ata_port *ap)
480 return readb((void __iomem *) ap->ioaddr.status_addr);
485 * ata_check_status - Read device status reg & clear interrupt
486 * @ap: port where the device is
488 * Reads ATA taskfile status register for currently-selected device
489 * and return its value. This also clears pending interrupts
492 * May be used as the check_status() entry in ata_port_operations.
495 * Inherited from caller.
497 u8 ata_check_status(struct ata_port *ap)
499 if (ap->flags & ATA_FLAG_MMIO)
500 return ata_check_status_mmio(ap);
501 return ata_check_status_pio(ap);
506 * ata_altstatus - Read device alternate status reg
507 * @ap: port where the device is
509 * Reads ATA taskfile alternate status register for
510 * currently-selected device and return its value.
512 * Note: may NOT be used as the check_altstatus() entry in
513 * ata_port_operations.
516 * Inherited from caller.
518 u8 ata_altstatus(struct ata_port *ap)
520 if (ap->ops->check_altstatus)
521 return ap->ops->check_altstatus(ap);
523 if (ap->flags & ATA_FLAG_MMIO)
524 return readb((void __iomem *)ap->ioaddr.altstatus_addr);
525 return inb(ap->ioaddr.altstatus_addr);
530 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
531 * @tf: Taskfile to convert
532 * @fis: Buffer into which data will output
533 * @pmp: Port multiplier port
535 * Converts a standard ATA taskfile to a Serial ATA
536 * FIS structure (Register - Host to Device).
539 * Inherited from caller.
542 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
544 fis[0] = 0x27; /* Register - Host to Device FIS */
545 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
546 bit 7 indicates Command FIS */
547 fis[2] = tf->command;
548 fis[3] = tf->feature;
555 fis[8] = tf->hob_lbal;
556 fis[9] = tf->hob_lbam;
557 fis[10] = tf->hob_lbah;
558 fis[11] = tf->hob_feature;
561 fis[13] = tf->hob_nsect;
572 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
573 * @fis: Buffer from which data will be input
574 * @tf: Taskfile to output
576 * Converts a standard ATA taskfile to a Serial ATA
577 * FIS structure (Register - Host to Device).
580 * Inherited from caller.
583 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
585 tf->command = fis[2]; /* status */
586 tf->feature = fis[3]; /* error */
593 tf->hob_lbal = fis[8];
594 tf->hob_lbam = fis[9];
595 tf->hob_lbah = fis[10];
598 tf->hob_nsect = fis[13];
601 static const u8 ata_rw_cmds[] = {
605 ATA_CMD_READ_MULTI_EXT,
606 ATA_CMD_WRITE_MULTI_EXT,
610 ATA_CMD_PIO_READ_EXT,
611 ATA_CMD_PIO_WRITE_EXT,
620 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
621 * @qc: command to examine and configure
623 * Examine the device configuration and tf->flags to calculate
624 * the proper read/write commands and protocol to use.
629 void ata_rwcmd_protocol(struct ata_queued_cmd *qc)
631 struct ata_taskfile *tf = &qc->tf;
632 struct ata_device *dev = qc->dev;
634 int index, lba48, write;
636 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
637 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
639 if (dev->flags & ATA_DFLAG_PIO) {
640 tf->protocol = ATA_PROT_PIO;
641 index = dev->multi_count ? 0 : 4;
643 tf->protocol = ATA_PROT_DMA;
647 tf->command = ata_rw_cmds[index + lba48 + write];
650 static const char * xfer_mode_str[] = {
670 * ata_udma_string - convert UDMA bit offset to string
671 * @mask: mask of bits supported; only highest bit counts.
673 * Determine string which represents the highest speed
674 * (highest bit in @udma_mask).
680 * Constant C string representing highest speed listed in
681 * @udma_mask, or the constant C string "<n/a>".
684 static const char *ata_mode_string(unsigned int mask)
688 for (i = 7; i >= 0; i--)
691 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
694 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
701 return xfer_mode_str[i];
705 * ata_pio_devchk - PATA device presence detection
706 * @ap: ATA channel to examine
707 * @device: Device to examine (starting at zero)
709 * This technique was originally described in
710 * Hale Landis's ATADRVR (www.ata-atapi.com), and
711 * later found its way into the ATA/ATAPI spec.
713 * Write a pattern to the ATA shadow registers,
714 * and if a device is present, it will respond by
715 * correctly storing and echoing back the
716 * ATA shadow register contents.
722 static unsigned int ata_pio_devchk(struct ata_port *ap,
725 struct ata_ioports *ioaddr = &ap->ioaddr;
728 ap->ops->dev_select(ap, device);
730 outb(0x55, ioaddr->nsect_addr);
731 outb(0xaa, ioaddr->lbal_addr);
733 outb(0xaa, ioaddr->nsect_addr);
734 outb(0x55, ioaddr->lbal_addr);
736 outb(0x55, ioaddr->nsect_addr);
737 outb(0xaa, ioaddr->lbal_addr);
739 nsect = inb(ioaddr->nsect_addr);
740 lbal = inb(ioaddr->lbal_addr);
742 if ((nsect == 0x55) && (lbal == 0xaa))
743 return 1; /* we found a device */
745 return 0; /* nothing found */
749 * ata_mmio_devchk - PATA device presence detection
750 * @ap: ATA channel to examine
751 * @device: Device to examine (starting at zero)
753 * This technique was originally described in
754 * Hale Landis's ATADRVR (www.ata-atapi.com), and
755 * later found its way into the ATA/ATAPI spec.
757 * Write a pattern to the ATA shadow registers,
758 * and if a device is present, it will respond by
759 * correctly storing and echoing back the
760 * ATA shadow register contents.
766 static unsigned int ata_mmio_devchk(struct ata_port *ap,
769 struct ata_ioports *ioaddr = &ap->ioaddr;
772 ap->ops->dev_select(ap, device);
774 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
775 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
777 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
778 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
780 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
781 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
783 nsect = readb((void __iomem *) ioaddr->nsect_addr);
784 lbal = readb((void __iomem *) ioaddr->lbal_addr);
786 if ((nsect == 0x55) && (lbal == 0xaa))
787 return 1; /* we found a device */
789 return 0; /* nothing found */
793 * ata_devchk - PATA device presence detection
794 * @ap: ATA channel to examine
795 * @device: Device to examine (starting at zero)
797 * Dispatch ATA device presence detection, depending
798 * on whether we are using PIO or MMIO to talk to the
799 * ATA shadow registers.
805 static unsigned int ata_devchk(struct ata_port *ap,
808 if (ap->flags & ATA_FLAG_MMIO)
809 return ata_mmio_devchk(ap, device);
810 return ata_pio_devchk(ap, device);
814 * ata_dev_classify - determine device type based on ATA-spec signature
815 * @tf: ATA taskfile register set for device to be identified
817 * Determine from taskfile register contents whether a device is
818 * ATA or ATAPI, as per "Signature and persistence" section
819 * of ATA/PI spec (volume 1, sect 5.14).
825 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
826 * the event of failure.
829 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
831 /* Apple's open source Darwin code hints that some devices only
832 * put a proper signature into the LBA mid/high registers,
833 * So, we only check those. It's sufficient for uniqueness.
836 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
837 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
838 DPRINTK("found ATA device by sig\n");
842 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
843 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
844 DPRINTK("found ATAPI device by sig\n");
845 return ATA_DEV_ATAPI;
848 DPRINTK("unknown device\n");
849 return ATA_DEV_UNKNOWN;
853 * ata_dev_try_classify - Parse returned ATA device signature
854 * @ap: ATA channel to examine
855 * @device: Device to examine (starting at zero)
857 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
858 * an ATA/ATAPI-defined set of values is placed in the ATA
859 * shadow registers, indicating the results of device detection
862 * Select the ATA device, and read the values from the ATA shadow
863 * registers. Then parse according to the Error register value,
864 * and the spec-defined values examined by ata_dev_classify().
870 static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device)
872 struct ata_device *dev = &ap->device[device];
873 struct ata_taskfile tf;
877 ap->ops->dev_select(ap, device);
879 memset(&tf, 0, sizeof(tf));
881 ap->ops->tf_read(ap, &tf);
884 dev->class = ATA_DEV_NONE;
886 /* see if device passed diags */
889 else if ((device == 0) && (err == 0x81))
894 /* determine if device if ATA or ATAPI */
895 class = ata_dev_classify(&tf);
896 if (class == ATA_DEV_UNKNOWN)
898 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
907 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
908 * @id: IDENTIFY DEVICE results we will examine
909 * @s: string into which data is output
910 * @ofs: offset into identify device page
911 * @len: length of string to return. must be an even number.
913 * The strings in the IDENTIFY DEVICE page are broken up into
914 * 16-bit chunks. Run through the string, and output each
915 * 8-bit chunk linearly, regardless of platform.
921 void ata_dev_id_string(const u16 *id, unsigned char *s,
922 unsigned int ofs, unsigned int len)
942 * ata_noop_dev_select - Select device 0/1 on ATA bus
943 * @ap: ATA channel to manipulate
944 * @device: ATA device (numbered from zero) to select
946 * This function performs no actual function.
948 * May be used as the dev_select() entry in ata_port_operations.
953 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
959 * ata_std_dev_select - Select device 0/1 on ATA bus
960 * @ap: ATA channel to manipulate
961 * @device: ATA device (numbered from zero) to select
963 * Use the method defined in the ATA specification to
964 * make either device 0, or device 1, active on the
965 * ATA channel. Works with both PIO and MMIO.
967 * May be used as the dev_select() entry in ata_port_operations.
973 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
978 tmp = ATA_DEVICE_OBS;
980 tmp = ATA_DEVICE_OBS | ATA_DEV1;
982 if (ap->flags & ATA_FLAG_MMIO) {
983 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
985 outb(tmp, ap->ioaddr.device_addr);
987 ata_pause(ap); /* needed; also flushes, for mmio */
991 * ata_dev_select - Select device 0/1 on ATA bus
992 * @ap: ATA channel to manipulate
993 * @device: ATA device (numbered from zero) to select
994 * @wait: non-zero to wait for Status register BSY bit to clear
995 * @can_sleep: non-zero if context allows sleeping
997 * Use the method defined in the ATA specification to
998 * make either device 0, or device 1, active on the
1001 * This is a high-level version of ata_std_dev_select(),
1002 * which additionally provides the services of inserting
1003 * the proper pauses and status polling, where needed.
1009 void ata_dev_select(struct ata_port *ap, unsigned int device,
1010 unsigned int wait, unsigned int can_sleep)
1012 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
1013 ap->id, device, wait);
1018 ap->ops->dev_select(ap, device);
1021 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
1028 * ata_dump_id - IDENTIFY DEVICE info debugging output
1029 * @dev: Device whose IDENTIFY DEVICE page we will dump
1031 * Dump selected 16-bit words from a detected device's
1032 * IDENTIFY PAGE page.
1038 static inline void ata_dump_id(const struct ata_device *dev)
1040 DPRINTK("49==0x%04x "
1050 DPRINTK("80==0x%04x "
1060 DPRINTK("88==0x%04x "
1067 * Compute the PIO modes available for this device. This is not as
1068 * trivial as it seems if we must consider early devices correctly.
1070 * FIXME: pre IDE drive timing (do we care ?).
1073 static unsigned int ata_pio_modes(const struct ata_device *adev)
1077 /* Usual case. Word 53 indicates word 88 is valid */
1078 if (adev->id[ATA_ID_FIELD_VALID] & (1 << 2)) {
1079 modes = adev->id[ATA_ID_PIO_MODES] & 0x03;
1085 /* If word 88 isn't valid then Word 51 holds the PIO timing number
1086 for the maximum. Turn it into a mask and return it */
1087 modes = (2 << (adev->id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
1092 * ata_dev_identify - obtain IDENTIFY x DEVICE page
1093 * @ap: port on which device we wish to probe resides
1094 * @device: device bus address, starting at zero
1096 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
1097 * command, and read back the 512-byte device information page.
1098 * The device information page is fed to us via the standard
1099 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
1100 * using standard PIO-IN paths)
1102 * After reading the device information page, we use several
1103 * bits of information from it to initialize data structures
1104 * that will be used during the lifetime of the ata_device.
1105 * Other data from the info page is used to disqualify certain
1106 * older ATA devices we do not wish to support.
1109 * Inherited from caller. Some functions called by this function
1110 * obtain the host_set lock.
1113 static void ata_dev_identify(struct ata_port *ap, unsigned int device)
1115 struct ata_device *dev = &ap->device[device];
1116 unsigned int major_version;
1118 unsigned long xfer_modes;
1119 unsigned int using_edd;
1120 DECLARE_COMPLETION(wait);
1121 struct ata_queued_cmd *qc;
1122 unsigned long flags;
1125 if (!ata_dev_present(dev)) {
1126 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1131 if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1136 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
1138 assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI ||
1139 dev->class == ATA_DEV_NONE);
1141 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
1143 qc = ata_qc_new_init(ap, dev);
1146 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
1147 qc->dma_dir = DMA_FROM_DEVICE;
1148 qc->tf.protocol = ATA_PROT_PIO;
1152 if (dev->class == ATA_DEV_ATA) {
1153 qc->tf.command = ATA_CMD_ID_ATA;
1154 DPRINTK("do ATA identify\n");
1156 qc->tf.command = ATA_CMD_ID_ATAPI;
1157 DPRINTK("do ATAPI identify\n");
1160 qc->waiting = &wait;
1161 qc->complete_fn = ata_qc_complete_noop;
1163 spin_lock_irqsave(&ap->host_set->lock, flags);
1164 rc = ata_qc_issue(qc);
1165 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1170 wait_for_completion(&wait);
1172 spin_lock_irqsave(&ap->host_set->lock, flags);
1173 ap->ops->tf_read(ap, &qc->tf);
1174 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1176 if (qc->tf.command & ATA_ERR) {
1178 * arg! EDD works for all test cases, but seems to return
1179 * the ATA signature for some ATAPI devices. Until the
1180 * reason for this is found and fixed, we fix up the mess
1181 * here. If IDENTIFY DEVICE returns command aborted
1182 * (as ATAPI devices do), then we issue an
1183 * IDENTIFY PACKET DEVICE.
1185 * ATA software reset (SRST, the default) does not appear
1186 * to have this problem.
1188 if ((using_edd) && (qc->tf.command == ATA_CMD_ID_ATA)) {
1189 u8 err = qc->tf.feature;
1190 if (err & ATA_ABORTED) {
1191 dev->class = ATA_DEV_ATAPI;
1202 swap_buf_le16(dev->id, ATA_ID_WORDS);
1204 /* print device capabilities */
1205 printk(KERN_DEBUG "ata%u: dev %u cfg "
1206 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1207 ap->id, device, dev->id[49],
1208 dev->id[82], dev->id[83], dev->id[84],
1209 dev->id[85], dev->id[86], dev->id[87],
1213 * common ATA, ATAPI feature tests
1216 /* we require DMA support (bits 8 of word 49) */
1217 if (!ata_id_has_dma(dev->id)) {
1218 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
1222 /* quick-n-dirty find max transfer mode; for printk only */
1223 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1225 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
1227 xfer_modes = ata_pio_modes(dev);
1231 /* ATA-specific feature tests */
1232 if (dev->class == ATA_DEV_ATA) {
1233 if (!ata_id_is_ata(dev->id)) /* sanity check */
1236 /* get major version */
1237 tmp = dev->id[ATA_ID_MAJOR_VER];
1238 for (major_version = 14; major_version >= 1; major_version--)
1239 if (tmp & (1 << major_version))
1243 * The exact sequence expected by certain pre-ATA4 drives is:
1246 * INITIALIZE DEVICE PARAMETERS
1248 * Some drives were very specific about that exact sequence.
1250 if (major_version < 4 || (!ata_id_has_lba(dev->id))) {
1251 ata_dev_init_params(ap, dev);
1253 /* current CHS translation info (id[53-58]) might be
1254 * changed. reread the identify device info.
1256 ata_dev_reread_id(ap, dev);
1259 if (ata_id_has_lba(dev->id)) {
1260 dev->flags |= ATA_DFLAG_LBA;
1262 if (ata_id_has_lba48(dev->id)) {
1263 dev->flags |= ATA_DFLAG_LBA48;
1264 dev->n_sectors = ata_id_u64(dev->id, 100);
1266 dev->n_sectors = ata_id_u32(dev->id, 60);
1269 /* print device info to dmesg */
1270 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n",
1273 ata_mode_string(xfer_modes),
1274 (unsigned long long)dev->n_sectors,
1275 dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA");
1279 /* Default translation */
1280 dev->cylinders = dev->id[1];
1281 dev->heads = dev->id[3];
1282 dev->sectors = dev->id[6];
1283 dev->n_sectors = dev->cylinders * dev->heads * dev->sectors;
1285 if (ata_id_current_chs_valid(dev->id)) {
1286 /* Current CHS translation is valid. */
1287 dev->cylinders = dev->id[54];
1288 dev->heads = dev->id[55];
1289 dev->sectors = dev->id[56];
1291 dev->n_sectors = ata_id_u32(dev->id, 57);
1294 /* print device info to dmesg */
1295 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n",
1298 ata_mode_string(xfer_modes),
1299 (unsigned long long)dev->n_sectors,
1300 (int)dev->cylinders, (int)dev->heads, (int)dev->sectors);
1304 ap->host->max_cmd_len = 16;
1307 /* ATAPI-specific feature tests */
1309 if (ata_id_is_ata(dev->id)) /* sanity check */
1312 rc = atapi_cdb_len(dev->id);
1313 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1314 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1317 ap->cdb_len = (unsigned int) rc;
1318 ap->host->max_cmd_len = (unsigned char) ap->cdb_len;
1320 /* print device info to dmesg */
1321 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1323 ata_mode_string(xfer_modes));
1326 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1330 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1333 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1334 DPRINTK("EXIT, err\n");
1338 static inline u8 ata_dev_knobble(const struct ata_port *ap)
1340 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id)));
1344 * ata_dev_config - Run device specific handlers and check for
1345 * SATA->PATA bridges
1352 void ata_dev_config(struct ata_port *ap, unsigned int i)
1354 /* limit bridge transfers to udma5, 200 sectors */
1355 if (ata_dev_knobble(ap)) {
1356 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1357 ap->id, ap->device->devno);
1358 ap->udma_mask &= ATA_UDMA5;
1359 ap->host->max_sectors = ATA_MAX_SECTORS;
1360 ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
1361 ap->device->flags |= ATA_DFLAG_LOCK_SECTORS;
1364 if (ap->ops->dev_config)
1365 ap->ops->dev_config(ap, &ap->device[i]);
1369 * ata_bus_probe - Reset and probe ATA bus
1372 * Master ATA bus probing function. Initiates a hardware-dependent
1373 * bus reset, then attempts to identify any devices found on
1377 * PCI/etc. bus probe sem.
1380 * Zero on success, non-zero on error.
1383 static int ata_bus_probe(struct ata_port *ap)
1385 unsigned int i, found = 0;
1387 ap->ops->phy_reset(ap);
1388 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1391 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1392 ata_dev_identify(ap, i);
1393 if (ata_dev_present(&ap->device[i])) {
1395 ata_dev_config(ap,i);
1399 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1400 goto err_out_disable;
1403 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1404 goto err_out_disable;
1409 ap->ops->port_disable(ap);
1415 * ata_port_probe - Mark port as enabled
1416 * @ap: Port for which we indicate enablement
1418 * Modify @ap data structure such that the system
1419 * thinks that the entire port is enabled.
1421 * LOCKING: host_set lock, or some other form of
1425 void ata_port_probe(struct ata_port *ap)
1427 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1431 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1432 * @ap: SATA port associated with target SATA PHY.
1434 * This function issues commands to standard SATA Sxxx
1435 * PHY registers, to wake up the phy (and device), and
1436 * clear any reset condition.
1439 * PCI/etc. bus probe sem.
1442 void __sata_phy_reset(struct ata_port *ap)
1445 unsigned long timeout = jiffies + (HZ * 5);
1447 if (ap->flags & ATA_FLAG_SATA_RESET) {
1448 /* issue phy wake/reset */
1449 scr_write_flush(ap, SCR_CONTROL, 0x301);
1450 /* Couldn't find anything in SATA I/II specs, but
1451 * AHCI-1.1 10.4.2 says at least 1 ms. */
1454 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1456 /* wait for phy to become ready, if necessary */
1459 sstatus = scr_read(ap, SCR_STATUS);
1460 if ((sstatus & 0xf) != 1)
1462 } while (time_before(jiffies, timeout));
1464 /* TODO: phy layer with polling, timeouts, etc. */
1465 if (sata_dev_present(ap))
1468 sstatus = scr_read(ap, SCR_STATUS);
1469 printk(KERN_INFO "ata%u: no device found (phy stat %08x)\n",
1471 ata_port_disable(ap);
1474 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1477 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1478 ata_port_disable(ap);
1482 ap->cbl = ATA_CBL_SATA;
1486 * sata_phy_reset - Reset SATA bus.
1487 * @ap: SATA port associated with target SATA PHY.
1489 * This function resets the SATA bus, and then probes
1490 * the bus for devices.
1493 * PCI/etc. bus probe sem.
1496 void sata_phy_reset(struct ata_port *ap)
1498 __sata_phy_reset(ap);
1499 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1505 * ata_port_disable - Disable port.
1506 * @ap: Port to be disabled.
1508 * Modify @ap data structure such that the system
1509 * thinks that the entire port is disabled, and should
1510 * never attempt to probe or communicate with devices
1513 * LOCKING: host_set lock, or some other form of
1517 void ata_port_disable(struct ata_port *ap)
1519 ap->device[0].class = ATA_DEV_NONE;
1520 ap->device[1].class = ATA_DEV_NONE;
1521 ap->flags |= ATA_FLAG_PORT_DISABLED;
1525 * This mode timing computation functionality is ported over from
1526 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1529 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1530 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1531 * for PIO 5, which is a nonstandard extension and UDMA6, which
1532 * is currently supported only by Maxtor drives.
1535 static const struct ata_timing ata_timing[] = {
1537 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1538 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1539 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1540 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1542 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1543 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1544 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1546 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1548 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1549 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1550 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1552 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1553 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1554 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1556 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1557 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1558 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1560 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1561 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1562 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1564 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1569 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1570 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1572 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1574 q->setup = EZ(t->setup * 1000, T);
1575 q->act8b = EZ(t->act8b * 1000, T);
1576 q->rec8b = EZ(t->rec8b * 1000, T);
1577 q->cyc8b = EZ(t->cyc8b * 1000, T);
1578 q->active = EZ(t->active * 1000, T);
1579 q->recover = EZ(t->recover * 1000, T);
1580 q->cycle = EZ(t->cycle * 1000, T);
1581 q->udma = EZ(t->udma * 1000, UT);
1584 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1585 struct ata_timing *m, unsigned int what)
1587 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1588 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1589 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1590 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1591 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1592 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1593 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1594 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1597 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1599 const struct ata_timing *t;
1601 for (t = ata_timing; t->mode != speed; t++)
1602 if (t->mode == 0xFF)
1607 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1608 struct ata_timing *t, int T, int UT)
1610 const struct ata_timing *s;
1611 struct ata_timing p;
1617 if (!(s = ata_timing_find_mode(speed)))
1621 * If the drive is an EIDE drive, it can tell us it needs extended
1622 * PIO/MW_DMA cycle timing.
1625 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1626 memset(&p, 0, sizeof(p));
1627 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1628 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1629 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1630 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1631 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1633 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1637 * Convert the timing to bus clock counts.
1640 ata_timing_quantize(s, t, T, UT);
1643 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, S.M.A.R.T
1644 * and some other commands. We have to ensure that the DMA cycle timing is
1645 * slower/equal than the fastest PIO timing.
1648 if (speed > XFER_PIO_4) {
1649 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1650 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1654 * Lenghten active & recovery time so that cycle time is correct.
1657 if (t->act8b + t->rec8b < t->cyc8b) {
1658 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1659 t->rec8b = t->cyc8b - t->act8b;
1662 if (t->active + t->recover < t->cycle) {
1663 t->active += (t->cycle - (t->active + t->recover)) / 2;
1664 t->recover = t->cycle - t->active;
1670 static const struct {
1673 } xfer_mode_classes[] = {
1674 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1675 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1676 { ATA_SHIFT_PIO, XFER_PIO_0 },
1679 static inline u8 base_from_shift(unsigned int shift)
1683 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1684 if (xfer_mode_classes[i].shift == shift)
1685 return xfer_mode_classes[i].base;
1690 static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1695 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1698 if (dev->xfer_shift == ATA_SHIFT_PIO)
1699 dev->flags |= ATA_DFLAG_PIO;
1701 ata_dev_set_xfermode(ap, dev);
1703 base = base_from_shift(dev->xfer_shift);
1704 ofs = dev->xfer_mode - base;
1705 idx = ofs + dev->xfer_shift;
1706 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1708 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1709 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1711 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1712 ap->id, dev->devno, xfer_mode_str[idx]);
1715 static int ata_host_set_pio(struct ata_port *ap)
1721 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1724 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1728 base = base_from_shift(ATA_SHIFT_PIO);
1729 xfer_mode = base + x;
1731 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1732 (int)base, (int)xfer_mode, mask, x);
1734 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1735 struct ata_device *dev = &ap->device[i];
1736 if (ata_dev_present(dev)) {
1737 dev->pio_mode = xfer_mode;
1738 dev->xfer_mode = xfer_mode;
1739 dev->xfer_shift = ATA_SHIFT_PIO;
1740 if (ap->ops->set_piomode)
1741 ap->ops->set_piomode(ap, dev);
1748 static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1749 unsigned int xfer_shift)
1753 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1754 struct ata_device *dev = &ap->device[i];
1755 if (ata_dev_present(dev)) {
1756 dev->dma_mode = xfer_mode;
1757 dev->xfer_mode = xfer_mode;
1758 dev->xfer_shift = xfer_shift;
1759 if (ap->ops->set_dmamode)
1760 ap->ops->set_dmamode(ap, dev);
1766 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1767 * @ap: port on which timings will be programmed
1769 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1772 * PCI/etc. bus probe sem.
1775 static void ata_set_mode(struct ata_port *ap)
1777 unsigned int xfer_shift;
1781 /* step 1: always set host PIO timings */
1782 rc = ata_host_set_pio(ap);
1786 /* step 2: choose the best data xfer mode */
1787 xfer_mode = xfer_shift = 0;
1788 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1792 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1793 if (xfer_shift != ATA_SHIFT_PIO)
1794 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1796 /* step 4: update devices' xfer mode */
1797 ata_dev_set_mode(ap, &ap->device[0]);
1798 ata_dev_set_mode(ap, &ap->device[1]);
1800 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1803 if (ap->ops->post_set_mode)
1804 ap->ops->post_set_mode(ap);
1809 ata_port_disable(ap);
1813 * ata_busy_sleep - sleep until BSY clears, or timeout
1814 * @ap: port containing status register to be polled
1815 * @tmout_pat: impatience timeout
1816 * @tmout: overall timeout
1818 * Sleep until ATA Status register bit BSY clears,
1819 * or a timeout occurs.
1825 static unsigned int ata_busy_sleep (struct ata_port *ap,
1826 unsigned long tmout_pat,
1827 unsigned long tmout)
1829 unsigned long timer_start, timeout;
1832 status = ata_busy_wait(ap, ATA_BUSY, 300);
1833 timer_start = jiffies;
1834 timeout = timer_start + tmout_pat;
1835 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1837 status = ata_busy_wait(ap, ATA_BUSY, 3);
1840 if (status & ATA_BUSY)
1841 printk(KERN_WARNING "ata%u is slow to respond, "
1842 "please be patient\n", ap->id);
1844 timeout = timer_start + tmout;
1845 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1847 status = ata_chk_status(ap);
1850 if (status & ATA_BUSY) {
1851 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1852 ap->id, tmout / HZ);
1859 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1861 struct ata_ioports *ioaddr = &ap->ioaddr;
1862 unsigned int dev0 = devmask & (1 << 0);
1863 unsigned int dev1 = devmask & (1 << 1);
1864 unsigned long timeout;
1866 /* if device 0 was found in ata_devchk, wait for its
1870 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1872 /* if device 1 was found in ata_devchk, wait for
1873 * register access, then wait for BSY to clear
1875 timeout = jiffies + ATA_TMOUT_BOOT;
1879 ap->ops->dev_select(ap, 1);
1880 if (ap->flags & ATA_FLAG_MMIO) {
1881 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1882 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1884 nsect = inb(ioaddr->nsect_addr);
1885 lbal = inb(ioaddr->lbal_addr);
1887 if ((nsect == 1) && (lbal == 1))
1889 if (time_after(jiffies, timeout)) {
1893 msleep(50); /* give drive a breather */
1896 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1898 /* is all this really necessary? */
1899 ap->ops->dev_select(ap, 0);
1901 ap->ops->dev_select(ap, 1);
1903 ap->ops->dev_select(ap, 0);
1907 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1908 * @ap: Port to reset and probe
1910 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1911 * probe the bus. Not often used these days.
1914 * PCI/etc. bus probe sem.
1918 static unsigned int ata_bus_edd(struct ata_port *ap)
1920 struct ata_taskfile tf;
1922 /* set up execute-device-diag (bus reset) taskfile */
1923 /* also, take interrupts to a known state (disabled) */
1924 DPRINTK("execute-device-diag\n");
1925 ata_tf_init(ap, &tf, 0);
1927 tf.command = ATA_CMD_EDD;
1928 tf.protocol = ATA_PROT_NODATA;
1931 ata_tf_to_host(ap, &tf);
1933 /* spec says at least 2ms. but who knows with those
1934 * crazy ATAPI devices...
1938 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1941 static unsigned int ata_bus_softreset(struct ata_port *ap,
1942 unsigned int devmask)
1944 struct ata_ioports *ioaddr = &ap->ioaddr;
1946 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1948 /* software reset. causes dev0 to be selected */
1949 if (ap->flags & ATA_FLAG_MMIO) {
1950 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1951 udelay(20); /* FIXME: flush */
1952 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1953 udelay(20); /* FIXME: flush */
1954 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1956 outb(ap->ctl, ioaddr->ctl_addr);
1958 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1960 outb(ap->ctl, ioaddr->ctl_addr);
1963 /* spec mandates ">= 2ms" before checking status.
1964 * We wait 150ms, because that was the magic delay used for
1965 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1966 * between when the ATA command register is written, and then
1967 * status is checked. Because waiting for "a while" before
1968 * checking status is fine, post SRST, we perform this magic
1969 * delay here as well.
1973 ata_bus_post_reset(ap, devmask);
1979 * ata_bus_reset - reset host port and associated ATA channel
1980 * @ap: port to reset
1982 * This is typically the first time we actually start issuing
1983 * commands to the ATA channel. We wait for BSY to clear, then
1984 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
1985 * result. Determine what devices, if any, are on the channel
1986 * by looking at the device 0/1 error register. Look at the signature
1987 * stored in each device's taskfile registers, to determine if
1988 * the device is ATA or ATAPI.
1991 * PCI/etc. bus probe sem.
1992 * Obtains host_set lock.
1995 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
1998 void ata_bus_reset(struct ata_port *ap)
2000 struct ata_ioports *ioaddr = &ap->ioaddr;
2001 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2003 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
2005 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2007 /* determine if device 0/1 are present */
2008 if (ap->flags & ATA_FLAG_SATA_RESET)
2011 dev0 = ata_devchk(ap, 0);
2013 dev1 = ata_devchk(ap, 1);
2017 devmask |= (1 << 0);
2019 devmask |= (1 << 1);
2021 /* select device 0 again */
2022 ap->ops->dev_select(ap, 0);
2024 /* issue bus reset */
2025 if (ap->flags & ATA_FLAG_SRST)
2026 rc = ata_bus_softreset(ap, devmask);
2027 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
2028 /* set up device control */
2029 if (ap->flags & ATA_FLAG_MMIO)
2030 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2032 outb(ap->ctl, ioaddr->ctl_addr);
2033 rc = ata_bus_edd(ap);
2040 * determine by signature whether we have ATA or ATAPI devices
2042 err = ata_dev_try_classify(ap, 0);
2043 if ((slave_possible) && (err != 0x81))
2044 ata_dev_try_classify(ap, 1);
2046 /* re-enable interrupts */
2047 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2050 /* is double-select really necessary? */
2051 if (ap->device[1].class != ATA_DEV_NONE)
2052 ap->ops->dev_select(ap, 1);
2053 if (ap->device[0].class != ATA_DEV_NONE)
2054 ap->ops->dev_select(ap, 0);
2056 /* if no devices were detected, disable this port */
2057 if ((ap->device[0].class == ATA_DEV_NONE) &&
2058 (ap->device[1].class == ATA_DEV_NONE))
2061 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2062 /* set up device control for ATA_FLAG_SATA_RESET */
2063 if (ap->flags & ATA_FLAG_MMIO)
2064 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2066 outb(ap->ctl, ioaddr->ctl_addr);
2073 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2074 ap->ops->port_disable(ap);
2079 static void ata_pr_blacklisted(const struct ata_port *ap,
2080 const struct ata_device *dev)
2082 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
2083 ap->id, dev->devno);
2086 static const char * ata_dma_blacklist [] = {
2105 "Toshiba CD-ROM XM-6202B",
2106 "TOSHIBA CD-ROM XM-1702BC",
2108 "E-IDE CD-ROM CR-840",
2111 "SAMSUNG CD-ROM SC-148C",
2112 "SAMSUNG CD-ROM SC",
2114 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2118 static int ata_dma_blacklisted(const struct ata_device *dev)
2120 unsigned char model_num[40];
2125 ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2128 len = strnlen(s, sizeof(model_num));
2130 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2131 while ((len > 0) && (s[len - 1] == ' ')) {
2136 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2137 if (!strncmp(ata_dma_blacklist[i], s, len))
2143 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift)
2145 const struct ata_device *master, *slave;
2148 master = &ap->device[0];
2149 slave = &ap->device[1];
2151 assert (ata_dev_present(master) || ata_dev_present(slave));
2153 if (shift == ATA_SHIFT_UDMA) {
2154 mask = ap->udma_mask;
2155 if (ata_dev_present(master)) {
2156 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
2157 if (ata_dma_blacklisted(master)) {
2159 ata_pr_blacklisted(ap, master);
2162 if (ata_dev_present(slave)) {
2163 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
2164 if (ata_dma_blacklisted(slave)) {
2166 ata_pr_blacklisted(ap, slave);
2170 else if (shift == ATA_SHIFT_MWDMA) {
2171 mask = ap->mwdma_mask;
2172 if (ata_dev_present(master)) {
2173 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
2174 if (ata_dma_blacklisted(master)) {
2176 ata_pr_blacklisted(ap, master);
2179 if (ata_dev_present(slave)) {
2180 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
2181 if (ata_dma_blacklisted(slave)) {
2183 ata_pr_blacklisted(ap, slave);
2187 else if (shift == ATA_SHIFT_PIO) {
2188 mask = ap->pio_mask;
2189 if (ata_dev_present(master)) {
2190 /* spec doesn't return explicit support for
2191 * PIO0-2, so we fake it
2193 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2198 if (ata_dev_present(slave)) {
2199 /* spec doesn't return explicit support for
2200 * PIO0-2, so we fake it
2202 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2209 mask = 0xffffffff; /* shut up compiler warning */
2216 /* find greatest bit */
2217 static int fgb(u32 bitmap)
2222 for (i = 0; i < 32; i++)
2223 if (bitmap & (1 << i))
2230 * ata_choose_xfer_mode - attempt to find best transfer mode
2231 * @ap: Port for which an xfer mode will be selected
2232 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2233 * @xfer_shift_out: (output) bit shift that selects this mode
2235 * Based on host and device capabilities, determine the
2236 * maximum transfer mode that is amenable to all.
2239 * PCI/etc. bus probe sem.
2242 * Zero on success, negative on error.
2245 static int ata_choose_xfer_mode(const struct ata_port *ap,
2247 unsigned int *xfer_shift_out)
2249 unsigned int mask, shift;
2252 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2253 shift = xfer_mode_classes[i].shift;
2254 mask = ata_get_mode_mask(ap, shift);
2258 *xfer_mode_out = xfer_mode_classes[i].base + x;
2259 *xfer_shift_out = shift;
2268 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2269 * @ap: Port associated with device @dev
2270 * @dev: Device to which command will be sent
2272 * Issue SET FEATURES - XFER MODE command to device @dev
2276 * PCI/etc. bus probe sem.
2279 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2281 DECLARE_COMPLETION(wait);
2282 struct ata_queued_cmd *qc;
2284 unsigned long flags;
2286 /* set up set-features taskfile */
2287 DPRINTK("set features - xfer mode\n");
2289 qc = ata_qc_new_init(ap, dev);
2292 qc->tf.command = ATA_CMD_SET_FEATURES;
2293 qc->tf.feature = SETFEATURES_XFER;
2294 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2295 qc->tf.protocol = ATA_PROT_NODATA;
2296 qc->tf.nsect = dev->xfer_mode;
2298 qc->waiting = &wait;
2299 qc->complete_fn = ata_qc_complete_noop;
2301 spin_lock_irqsave(&ap->host_set->lock, flags);
2302 rc = ata_qc_issue(qc);
2303 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2306 ata_port_disable(ap);
2308 wait_for_completion(&wait);
2314 * ata_dev_reread_id - Reread the device identify device info
2315 * @ap: port where the device is
2316 * @dev: device to reread the identify device info
2321 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev)
2323 DECLARE_COMPLETION(wait);
2324 struct ata_queued_cmd *qc;
2325 unsigned long flags;
2328 qc = ata_qc_new_init(ap, dev);
2331 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
2332 qc->dma_dir = DMA_FROM_DEVICE;
2334 if (dev->class == ATA_DEV_ATA) {
2335 qc->tf.command = ATA_CMD_ID_ATA;
2336 DPRINTK("do ATA identify\n");
2338 qc->tf.command = ATA_CMD_ID_ATAPI;
2339 DPRINTK("do ATAPI identify\n");
2342 qc->tf.flags |= ATA_TFLAG_DEVICE;
2343 qc->tf.protocol = ATA_PROT_PIO;
2346 qc->waiting = &wait;
2347 qc->complete_fn = ata_qc_complete_noop;
2349 spin_lock_irqsave(&ap->host_set->lock, flags);
2350 rc = ata_qc_issue(qc);
2351 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2356 wait_for_completion(&wait);
2358 swap_buf_le16(dev->id, ATA_ID_WORDS);
2366 ata_port_disable(ap);
2370 * ata_dev_init_params - Issue INIT DEV PARAMS command
2371 * @ap: Port associated with device @dev
2372 * @dev: Device to which command will be sent
2377 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev)
2379 DECLARE_COMPLETION(wait);
2380 struct ata_queued_cmd *qc;
2382 unsigned long flags;
2383 u16 sectors = dev->id[6];
2384 u16 heads = dev->id[3];
2386 /* Number of sectors per track 1-255. Number of heads 1-16 */
2387 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2390 /* set up init dev params taskfile */
2391 DPRINTK("init dev params \n");
2393 qc = ata_qc_new_init(ap, dev);
2396 qc->tf.command = ATA_CMD_INIT_DEV_PARAMS;
2397 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2398 qc->tf.protocol = ATA_PROT_NODATA;
2399 qc->tf.nsect = sectors;
2400 qc->tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
2402 qc->waiting = &wait;
2403 qc->complete_fn = ata_qc_complete_noop;
2405 spin_lock_irqsave(&ap->host_set->lock, flags);
2406 rc = ata_qc_issue(qc);
2407 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2410 ata_port_disable(ap);
2412 wait_for_completion(&wait);
2418 * ata_sg_clean - Unmap DMA memory associated with command
2419 * @qc: Command containing DMA memory to be released
2421 * Unmap all mapped DMA memory associated with this command.
2424 * spin_lock_irqsave(host_set lock)
2427 static void ata_sg_clean(struct ata_queued_cmd *qc)
2429 struct ata_port *ap = qc->ap;
2430 struct scatterlist *sg = qc->sg;
2431 int dir = qc->dma_dir;
2433 assert(qc->flags & ATA_QCFLAG_DMAMAP);
2436 if (qc->flags & ATA_QCFLAG_SINGLE)
2437 assert(qc->n_elem == 1);
2439 DPRINTK("unmapping %u sg elements\n", qc->n_elem);
2441 if (qc->flags & ATA_QCFLAG_SG)
2442 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2444 dma_unmap_single(ap->host_set->dev, sg_dma_address(&sg[0]),
2445 sg_dma_len(&sg[0]), dir);
2447 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2452 * ata_fill_sg - Fill PCI IDE PRD table
2453 * @qc: Metadata associated with taskfile to be transferred
2455 * Fill PCI IDE PRD (scatter-gather) table with segments
2456 * associated with the current disk command.
2459 * spin_lock_irqsave(host_set lock)
2462 static void ata_fill_sg(struct ata_queued_cmd *qc)
2464 struct scatterlist *sg = qc->sg;
2465 struct ata_port *ap = qc->ap;
2466 unsigned int idx, nelem;
2469 assert(qc->n_elem > 0);
2472 for (nelem = qc->n_elem; nelem; nelem--,sg++) {
2476 /* determine if physical DMA addr spans 64K boundary.
2477 * Note h/w doesn't support 64-bit, so we unconditionally
2478 * truncate dma_addr_t to u32.
2480 addr = (u32) sg_dma_address(sg);
2481 sg_len = sg_dma_len(sg);
2484 offset = addr & 0xffff;
2486 if ((offset + sg_len) > 0x10000)
2487 len = 0x10000 - offset;
2489 ap->prd[idx].addr = cpu_to_le32(addr);
2490 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2491 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2500 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2503 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2504 * @qc: Metadata associated with taskfile to check
2506 * Allow low-level driver to filter ATA PACKET commands, returning
2507 * a status indicating whether or not it is OK to use DMA for the
2508 * supplied PACKET command.
2511 * spin_lock_irqsave(host_set lock)
2513 * RETURNS: 0 when ATAPI DMA can be used
2516 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2518 struct ata_port *ap = qc->ap;
2519 int rc = 0; /* Assume ATAPI DMA is OK by default */
2521 if (ap->ops->check_atapi_dma)
2522 rc = ap->ops->check_atapi_dma(qc);
2527 * ata_qc_prep - Prepare taskfile for submission
2528 * @qc: Metadata associated with taskfile to be prepared
2530 * Prepare ATA taskfile for submission.
2533 * spin_lock_irqsave(host_set lock)
2535 void ata_qc_prep(struct ata_queued_cmd *qc)
2537 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2544 * ata_sg_init_one - Associate command with memory buffer
2545 * @qc: Command to be associated
2546 * @buf: Memory buffer
2547 * @buflen: Length of memory buffer, in bytes.
2549 * Initialize the data-related elements of queued_cmd @qc
2550 * to point to a single memory buffer, @buf of byte length @buflen.
2553 * spin_lock_irqsave(host_set lock)
2556 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2558 qc->flags |= ATA_QCFLAG_SINGLE;
2560 qc->sg = &qc->sgent;
2563 sg_init_one(qc->sg, buf, buflen);
2567 * ata_sg_init - Associate command with scatter-gather table.
2568 * @qc: Command to be associated
2569 * @sg: Scatter-gather table.
2570 * @n_elem: Number of elements in s/g table.
2572 * Initialize the data-related elements of queued_cmd @qc
2573 * to point to a scatter-gather table @sg, containing @n_elem
2577 * spin_lock_irqsave(host_set lock)
2580 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2581 unsigned int n_elem)
2583 qc->flags |= ATA_QCFLAG_SG;
2585 qc->n_elem = n_elem;
2589 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2590 * @qc: Command with memory buffer to be mapped.
2592 * DMA-map the memory buffer associated with queued_cmd @qc.
2595 * spin_lock_irqsave(host_set lock)
2598 * Zero on success, negative on error.
2601 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2603 struct ata_port *ap = qc->ap;
2604 int dir = qc->dma_dir;
2605 struct scatterlist *sg = qc->sg;
2606 dma_addr_t dma_address;
2608 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
2610 if (dma_mapping_error(dma_address))
2613 sg_dma_address(sg) = dma_address;
2614 sg_dma_len(sg) = sg->length;
2616 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2617 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2623 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2624 * @qc: Command with scatter-gather table to be mapped.
2626 * DMA-map the scatter-gather table associated with queued_cmd @qc.
2629 * spin_lock_irqsave(host_set lock)
2632 * Zero on success, negative on error.
2636 static int ata_sg_setup(struct ata_queued_cmd *qc)
2638 struct ata_port *ap = qc->ap;
2639 struct scatterlist *sg = qc->sg;
2642 VPRINTK("ENTER, ata%u\n", ap->id);
2643 assert(qc->flags & ATA_QCFLAG_SG);
2646 n_elem = dma_map_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2650 DPRINTK("%d sg elements mapped\n", n_elem);
2652 qc->n_elem = n_elem;
2658 * ata_poll_qc_complete - turn irq back on and finish qc
2659 * @qc: Command to complete
2660 * @drv_stat: ATA status register content
2663 * None. (grabs host lock)
2666 void ata_poll_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
2668 struct ata_port *ap = qc->ap;
2669 unsigned long flags;
2671 spin_lock_irqsave(&ap->host_set->lock, flags);
2672 ap->flags &= ~ATA_FLAG_NOINTR;
2674 ata_qc_complete(qc, drv_stat);
2675 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2680 * @ap: the target ata_port
2683 * None. (executing in kernel thread context)
2686 * timeout value to use
2689 static unsigned long ata_pio_poll(struct ata_port *ap)
2692 unsigned int poll_state = HSM_ST_UNKNOWN;
2693 unsigned int reg_state = HSM_ST_UNKNOWN;
2694 const unsigned int tmout_state = HSM_ST_TMOUT;
2696 switch (ap->hsm_task_state) {
2699 poll_state = HSM_ST_POLL;
2703 case HSM_ST_LAST_POLL:
2704 poll_state = HSM_ST_LAST_POLL;
2705 reg_state = HSM_ST_LAST;
2712 status = ata_chk_status(ap);
2713 if (status & ATA_BUSY) {
2714 if (time_after(jiffies, ap->pio_task_timeout)) {
2715 ap->hsm_task_state = tmout_state;
2718 ap->hsm_task_state = poll_state;
2719 return ATA_SHORT_PAUSE;
2722 ap->hsm_task_state = reg_state;
2727 * ata_pio_complete - check if drive is busy or idle
2728 * @ap: the target ata_port
2731 * None. (executing in kernel thread context)
2734 * Non-zero if qc completed, zero otherwise.
2737 static int ata_pio_complete (struct ata_port *ap)
2739 struct ata_queued_cmd *qc;
2743 * This is purely heuristic. This is a fast path. Sometimes when
2744 * we enter, BSY will be cleared in a chk-status or two. If not,
2745 * the drive is probably seeking or something. Snooze for a couple
2746 * msecs, then chk-status again. If still busy, fall back to
2747 * HSM_ST_POLL state.
2749 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2750 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2752 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2753 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2754 ap->hsm_task_state = HSM_ST_LAST_POLL;
2755 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2760 drv_stat = ata_wait_idle(ap);
2761 if (!ata_ok(drv_stat)) {
2762 ap->hsm_task_state = HSM_ST_ERR;
2766 qc = ata_qc_from_tag(ap, ap->active_tag);
2769 ap->hsm_task_state = HSM_ST_IDLE;
2771 ata_poll_qc_complete(qc, drv_stat);
2773 /* another command may start at this point */
2780 * swap_buf_le16 - swap halves of 16-words in place
2781 * @buf: Buffer to swap
2782 * @buf_words: Number of 16-bit words in buffer.
2784 * Swap halves of 16-bit words if needed to convert from
2785 * little-endian byte order to native cpu byte order, or
2789 * Inherited from caller.
2791 void swap_buf_le16(u16 *buf, unsigned int buf_words)
2796 for (i = 0; i < buf_words; i++)
2797 buf[i] = le16_to_cpu(buf[i]);
2798 #endif /* __BIG_ENDIAN */
2802 * ata_mmio_data_xfer - Transfer data by MMIO
2803 * @ap: port to read/write
2805 * @buflen: buffer length
2806 * @write_data: read/write
2808 * Transfer data from/to the device data register by MMIO.
2811 * Inherited from caller.
2814 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
2815 unsigned int buflen, int write_data)
2818 unsigned int words = buflen >> 1;
2819 u16 *buf16 = (u16 *) buf;
2820 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
2822 /* Transfer multiple of 2 bytes */
2824 for (i = 0; i < words; i++)
2825 writew(le16_to_cpu(buf16[i]), mmio);
2827 for (i = 0; i < words; i++)
2828 buf16[i] = cpu_to_le16(readw(mmio));
2831 /* Transfer trailing 1 byte, if any. */
2832 if (unlikely(buflen & 0x01)) {
2833 u16 align_buf[1] = { 0 };
2834 unsigned char *trailing_buf = buf + buflen - 1;
2837 memcpy(align_buf, trailing_buf, 1);
2838 writew(le16_to_cpu(align_buf[0]), mmio);
2840 align_buf[0] = cpu_to_le16(readw(mmio));
2841 memcpy(trailing_buf, align_buf, 1);
2847 * ata_pio_data_xfer - Transfer data by PIO
2848 * @ap: port to read/write
2850 * @buflen: buffer length
2851 * @write_data: read/write
2853 * Transfer data from/to the device data register by PIO.
2856 * Inherited from caller.
2859 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
2860 unsigned int buflen, int write_data)
2862 unsigned int words = buflen >> 1;
2864 /* Transfer multiple of 2 bytes */
2866 outsw(ap->ioaddr.data_addr, buf, words);
2868 insw(ap->ioaddr.data_addr, buf, words);
2870 /* Transfer trailing 1 byte, if any. */
2871 if (unlikely(buflen & 0x01)) {
2872 u16 align_buf[1] = { 0 };
2873 unsigned char *trailing_buf = buf + buflen - 1;
2876 memcpy(align_buf, trailing_buf, 1);
2877 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
2879 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
2880 memcpy(trailing_buf, align_buf, 1);
2886 * ata_data_xfer - Transfer data from/to the data register.
2887 * @ap: port to read/write
2889 * @buflen: buffer length
2890 * @do_write: read/write
2892 * Transfer data from/to the device data register.
2895 * Inherited from caller.
2898 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
2899 unsigned int buflen, int do_write)
2901 if (ap->flags & ATA_FLAG_MMIO)
2902 ata_mmio_data_xfer(ap, buf, buflen, do_write);
2904 ata_pio_data_xfer(ap, buf, buflen, do_write);
2908 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
2909 * @qc: Command on going
2911 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
2914 * Inherited from caller.
2917 static void ata_pio_sector(struct ata_queued_cmd *qc)
2919 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2920 struct scatterlist *sg = qc->sg;
2921 struct ata_port *ap = qc->ap;
2923 unsigned int offset;
2926 if (qc->cursect == (qc->nsect - 1))
2927 ap->hsm_task_state = HSM_ST_LAST;
2929 page = sg[qc->cursg].page;
2930 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
2932 /* get the current page and offset */
2933 page = nth_page(page, (offset >> PAGE_SHIFT));
2934 offset %= PAGE_SIZE;
2936 buf = kmap(page) + offset;
2941 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
2946 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2948 /* do the actual data transfer */
2949 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2950 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
2956 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
2957 * @qc: Command on going
2958 * @bytes: number of bytes
2960 * Transfer Transfer data from/to the ATAPI device.
2963 * Inherited from caller.
2967 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
2969 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2970 struct scatterlist *sg = qc->sg;
2971 struct ata_port *ap = qc->ap;
2974 unsigned int offset, count;
2976 if (qc->curbytes + bytes >= qc->nbytes)
2977 ap->hsm_task_state = HSM_ST_LAST;
2980 if (unlikely(qc->cursg >= qc->n_elem)) {
2982 * The end of qc->sg is reached and the device expects
2983 * more data to transfer. In order not to overrun qc->sg
2984 * and fulfill length specified in the byte count register,
2985 * - for read case, discard trailing data from the device
2986 * - for write case, padding zero data to the device
2988 u16 pad_buf[1] = { 0 };
2989 unsigned int words = bytes >> 1;
2992 if (words) /* warning if bytes > 1 */
2993 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
2996 for (i = 0; i < words; i++)
2997 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
2999 ap->hsm_task_state = HSM_ST_LAST;
3003 sg = &qc->sg[qc->cursg];
3006 offset = sg->offset + qc->cursg_ofs;
3008 /* get the current page and offset */
3009 page = nth_page(page, (offset >> PAGE_SHIFT));
3010 offset %= PAGE_SIZE;
3012 /* don't overrun current sg */
3013 count = min(sg->length - qc->cursg_ofs, bytes);
3015 /* don't cross page boundaries */
3016 count = min(count, (unsigned int)PAGE_SIZE - offset);
3018 buf = kmap(page) + offset;
3021 qc->curbytes += count;
3022 qc->cursg_ofs += count;
3024 if (qc->cursg_ofs == sg->length) {
3029 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3031 /* do the actual data transfer */
3032 ata_data_xfer(ap, buf, count, do_write);
3041 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3042 * @qc: Command on going
3044 * Transfer Transfer data from/to the ATAPI device.
3047 * Inherited from caller.
3050 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3052 struct ata_port *ap = qc->ap;
3053 struct ata_device *dev = qc->dev;
3054 unsigned int ireason, bc_lo, bc_hi, bytes;
3055 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3057 ap->ops->tf_read(ap, &qc->tf);
3058 ireason = qc->tf.nsect;
3059 bc_lo = qc->tf.lbam;
3060 bc_hi = qc->tf.lbah;
3061 bytes = (bc_hi << 8) | bc_lo;
3063 /* shall be cleared to zero, indicating xfer of data */
3064 if (ireason & (1 << 0))
3067 /* make sure transfer direction matches expected */
3068 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3069 if (do_write != i_write)
3072 __atapi_pio_bytes(qc, bytes);
3077 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3078 ap->id, dev->devno);
3079 ap->hsm_task_state = HSM_ST_ERR;
3083 * ata_pio_block - start PIO on a block
3084 * @ap: the target ata_port
3087 * None. (executing in kernel thread context)
3090 static void ata_pio_block(struct ata_port *ap)
3092 struct ata_queued_cmd *qc;
3096 * This is purely heuristic. This is a fast path.
3097 * Sometimes when we enter, BSY will be cleared in
3098 * a chk-status or two. If not, the drive is probably seeking
3099 * or something. Snooze for a couple msecs, then
3100 * chk-status again. If still busy, fall back to
3101 * HSM_ST_POLL state.
3103 status = ata_busy_wait(ap, ATA_BUSY, 5);
3104 if (status & ATA_BUSY) {
3106 status = ata_busy_wait(ap, ATA_BUSY, 10);
3107 if (status & ATA_BUSY) {
3108 ap->hsm_task_state = HSM_ST_POLL;
3109 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3114 qc = ata_qc_from_tag(ap, ap->active_tag);
3117 if (is_atapi_taskfile(&qc->tf)) {
3118 /* no more data to transfer or unsupported ATAPI command */
3119 if ((status & ATA_DRQ) == 0) {
3120 ap->hsm_task_state = HSM_ST_LAST;
3124 atapi_pio_bytes(qc);
3126 /* handle BSY=0, DRQ=0 as error */
3127 if ((status & ATA_DRQ) == 0) {
3128 ap->hsm_task_state = HSM_ST_ERR;
3136 static void ata_pio_error(struct ata_port *ap)
3138 struct ata_queued_cmd *qc;
3141 qc = ata_qc_from_tag(ap, ap->active_tag);
3144 drv_stat = ata_chk_status(ap);
3145 printk(KERN_WARNING "ata%u: PIO error, drv_stat 0x%x\n",
3148 ap->hsm_task_state = HSM_ST_IDLE;
3150 ata_poll_qc_complete(qc, drv_stat | ATA_ERR);
3153 static void ata_pio_task(void *_data)
3155 struct ata_port *ap = _data;
3156 unsigned long timeout;
3163 switch (ap->hsm_task_state) {
3172 qc_completed = ata_pio_complete(ap);
3176 case HSM_ST_LAST_POLL:
3177 timeout = ata_pio_poll(ap);
3187 queue_delayed_work(ata_wq, &ap->pio_task, timeout);
3188 else if (!qc_completed)
3193 * ata_qc_timeout - Handle timeout of queued command
3194 * @qc: Command that timed out
3196 * Some part of the kernel (currently, only the SCSI layer)
3197 * has noticed that the active command on port @ap has not
3198 * completed after a specified length of time. Handle this
3199 * condition by disabling DMA (if necessary) and completing
3200 * transactions, with error if necessary.
3202 * This also handles the case of the "lost interrupt", where
3203 * for some reason (possibly hardware bug, possibly driver bug)
3204 * an interrupt was not delivered to the driver, even though the
3205 * transaction completed successfully.
3208 * Inherited from SCSI layer (none, can sleep)
3211 static void ata_qc_timeout(struct ata_queued_cmd *qc)
3213 struct ata_port *ap = qc->ap;
3214 struct ata_host_set *host_set = ap->host_set;
3215 struct ata_device *dev = qc->dev;
3216 u8 host_stat = 0, drv_stat;
3217 unsigned long flags;
3221 /* FIXME: doesn't this conflict with timeout handling? */
3222 if (qc->dev->class == ATA_DEV_ATAPI && qc->scsicmd) {
3223 struct scsi_cmnd *cmd = qc->scsicmd;
3225 if (!(cmd->eh_eflags & SCSI_EH_CANCEL_CMD)) {
3227 /* finish completing original command */
3228 spin_lock_irqsave(&host_set->lock, flags);
3229 __ata_qc_complete(qc);
3230 spin_unlock_irqrestore(&host_set->lock, flags);
3232 atapi_request_sense(ap, dev, cmd);
3234 cmd->result = (CHECK_CONDITION << 1) | (DID_OK << 16);
3235 scsi_finish_command(cmd);
3241 spin_lock_irqsave(&host_set->lock, flags);
3243 /* hack alert! We cannot use the supplied completion
3244 * function from inside the ->eh_strategy_handler() thread.
3245 * libata is the only user of ->eh_strategy_handler() in
3246 * any kernel, so the default scsi_done() assumes it is
3247 * not being called from the SCSI EH.
3249 qc->scsidone = scsi_finish_command;
3251 switch (qc->tf.protocol) {
3254 case ATA_PROT_ATAPI_DMA:
3255 host_stat = ap->ops->bmdma_status(ap);
3257 /* before we do anything else, clear DMA-Start bit */
3258 ap->ops->bmdma_stop(qc);
3264 drv_stat = ata_chk_status(ap);
3266 /* ack bmdma irq events */
3267 ap->ops->irq_clear(ap);
3269 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3270 ap->id, qc->tf.command, drv_stat, host_stat);
3272 /* complete taskfile transaction */
3273 ata_qc_complete(qc, drv_stat);
3277 spin_unlock_irqrestore(&host_set->lock, flags);
3284 * ata_eng_timeout - Handle timeout of queued command
3285 * @ap: Port on which timed-out command is active
3287 * Some part of the kernel (currently, only the SCSI layer)
3288 * has noticed that the active command on port @ap has not
3289 * completed after a specified length of time. Handle this
3290 * condition by disabling DMA (if necessary) and completing
3291 * transactions, with error if necessary.
3293 * This also handles the case of the "lost interrupt", where
3294 * for some reason (possibly hardware bug, possibly driver bug)
3295 * an interrupt was not delivered to the driver, even though the
3296 * transaction completed successfully.
3299 * Inherited from SCSI layer (none, can sleep)
3302 void ata_eng_timeout(struct ata_port *ap)
3304 struct ata_queued_cmd *qc;
3308 qc = ata_qc_from_tag(ap, ap->active_tag);
3312 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
3322 * ata_qc_new - Request an available ATA command, for queueing
3323 * @ap: Port associated with device @dev
3324 * @dev: Device from whom we request an available command structure
3330 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3332 struct ata_queued_cmd *qc = NULL;
3335 for (i = 0; i < ATA_MAX_QUEUE; i++)
3336 if (!test_and_set_bit(i, &ap->qactive)) {
3337 qc = ata_qc_from_tag(ap, i);
3348 * ata_qc_new_init - Request an available ATA command, and initialize it
3349 * @ap: Port associated with device @dev
3350 * @dev: Device from whom we request an available command structure
3356 struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3357 struct ata_device *dev)
3359 struct ata_queued_cmd *qc;
3361 qc = ata_qc_new(ap);
3368 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
3370 qc->nbytes = qc->curbytes = 0;
3372 ata_tf_init(ap, &qc->tf, dev->devno);
3378 int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat)
3383 static void __ata_qc_complete(struct ata_queued_cmd *qc)
3385 struct ata_port *ap = qc->ap;
3386 unsigned int tag, do_clear = 0;
3390 if (likely(ata_tag_valid(tag))) {
3391 if (tag == ap->active_tag)
3392 ap->active_tag = ATA_TAG_POISON;
3393 qc->tag = ATA_TAG_POISON;
3398 struct completion *waiting = qc->waiting;
3403 if (likely(do_clear))
3404 clear_bit(tag, &ap->qactive);
3408 * ata_qc_free - free unused ata_queued_cmd
3409 * @qc: Command to complete
3411 * Designed to free unused ata_queued_cmd object
3412 * in case something prevents using it.
3415 * spin_lock_irqsave(host_set lock)
3417 void ata_qc_free(struct ata_queued_cmd *qc)
3419 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3420 assert(qc->waiting == NULL); /* nothing should be waiting */
3422 __ata_qc_complete(qc);
3426 * ata_qc_complete - Complete an active ATA command
3427 * @qc: Command to complete
3428 * @drv_stat: ATA Status register contents
3430 * Indicate to the mid and upper layers that an ATA
3431 * command has completed, with either an ok or not-ok status.
3434 * spin_lock_irqsave(host_set lock)
3437 void ata_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
3441 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3442 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3444 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3447 /* atapi: mark qc as inactive to prevent the interrupt handler
3448 * from completing the command twice later, before the error handler
3449 * is called. (when rc != 0 and atapi request sense is needed)
3451 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3453 /* call completion callback */
3454 rc = qc->complete_fn(qc, drv_stat);
3456 /* if callback indicates not to complete command (non-zero),
3457 * return immediately
3462 __ata_qc_complete(qc);
3467 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3469 struct ata_port *ap = qc->ap;
3471 switch (qc->tf.protocol) {
3473 case ATA_PROT_ATAPI_DMA:
3476 case ATA_PROT_ATAPI:
3478 case ATA_PROT_PIO_MULT:
3479 if (ap->flags & ATA_FLAG_PIO_DMA)
3492 * ata_qc_issue - issue taskfile to device
3493 * @qc: command to issue to device
3495 * Prepare an ATA command to submission to device.
3496 * This includes mapping the data into a DMA-able
3497 * area, filling in the S/G table, and finally
3498 * writing the taskfile to hardware, starting the command.
3501 * spin_lock_irqsave(host_set lock)
3504 * Zero on success, negative on error.
3507 int ata_qc_issue(struct ata_queued_cmd *qc)
3509 struct ata_port *ap = qc->ap;
3511 if (ata_should_dma_map(qc)) {
3512 if (qc->flags & ATA_QCFLAG_SG) {
3513 if (ata_sg_setup(qc))
3515 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3516 if (ata_sg_setup_one(qc))
3520 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3523 ap->ops->qc_prep(qc);
3525 qc->ap->active_tag = qc->tag;
3526 qc->flags |= ATA_QCFLAG_ACTIVE;
3528 return ap->ops->qc_issue(qc);
3536 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3537 * @qc: command to issue to device
3539 * Using various libata functions and hooks, this function
3540 * starts an ATA command. ATA commands are grouped into
3541 * classes called "protocols", and issuing each type of protocol
3542 * is slightly different.
3544 * May be used as the qc_issue() entry in ata_port_operations.
3547 * spin_lock_irqsave(host_set lock)
3550 * Zero on success, negative on error.
3553 int ata_qc_issue_prot(struct ata_queued_cmd *qc)
3555 struct ata_port *ap = qc->ap;
3557 ata_dev_select(ap, qc->dev->devno, 1, 0);
3559 switch (qc->tf.protocol) {
3560 case ATA_PROT_NODATA:
3561 ata_tf_to_host_nolock(ap, &qc->tf);
3565 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3566 ap->ops->bmdma_setup(qc); /* set up bmdma */
3567 ap->ops->bmdma_start(qc); /* initiate bmdma */
3570 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
3571 ata_qc_set_polling(qc);
3572 ata_tf_to_host_nolock(ap, &qc->tf);
3573 ap->hsm_task_state = HSM_ST;
3574 queue_work(ata_wq, &ap->pio_task);
3577 case ATA_PROT_ATAPI:
3578 ata_qc_set_polling(qc);
3579 ata_tf_to_host_nolock(ap, &qc->tf);
3580 queue_work(ata_wq, &ap->packet_task);
3583 case ATA_PROT_ATAPI_NODATA:
3584 ap->flags |= ATA_FLAG_NOINTR;
3585 ata_tf_to_host_nolock(ap, &qc->tf);
3586 queue_work(ata_wq, &ap->packet_task);
3589 case ATA_PROT_ATAPI_DMA:
3590 ap->flags |= ATA_FLAG_NOINTR;
3591 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3592 ap->ops->bmdma_setup(qc); /* set up bmdma */
3593 queue_work(ata_wq, &ap->packet_task);
3605 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
3606 * @qc: Info associated with this ATA transaction.
3609 * spin_lock_irqsave(host_set lock)
3612 static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
3614 struct ata_port *ap = qc->ap;
3615 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3617 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3619 /* load PRD table addr. */
3620 mb(); /* make sure PRD table writes are visible to controller */
3621 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
3623 /* specify data direction, triple-check start bit is clear */
3624 dmactl = readb(mmio + ATA_DMA_CMD);
3625 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3627 dmactl |= ATA_DMA_WR;
3628 writeb(dmactl, mmio + ATA_DMA_CMD);
3630 /* issue r/w command */
3631 ap->ops->exec_command(ap, &qc->tf);
3635 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
3636 * @qc: Info associated with this ATA transaction.
3639 * spin_lock_irqsave(host_set lock)
3642 static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
3644 struct ata_port *ap = qc->ap;
3645 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3648 /* start host DMA transaction */
3649 dmactl = readb(mmio + ATA_DMA_CMD);
3650 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
3652 /* Strictly, one may wish to issue a readb() here, to
3653 * flush the mmio write. However, control also passes
3654 * to the hardware at this point, and it will interrupt
3655 * us when we are to resume control. So, in effect,
3656 * we don't care when the mmio write flushes.
3657 * Further, a read of the DMA status register _immediately_
3658 * following the write may not be what certain flaky hardware
3659 * is expected, so I think it is best to not add a readb()
3660 * without first all the MMIO ATA cards/mobos.
3661 * Or maybe I'm just being paranoid.
3666 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
3667 * @qc: Info associated with this ATA transaction.
3670 * spin_lock_irqsave(host_set lock)
3673 static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
3675 struct ata_port *ap = qc->ap;
3676 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3679 /* load PRD table addr. */
3680 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
3682 /* specify data direction, triple-check start bit is clear */
3683 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3684 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3686 dmactl |= ATA_DMA_WR;
3687 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3689 /* issue r/w command */
3690 ap->ops->exec_command(ap, &qc->tf);
3694 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
3695 * @qc: Info associated with this ATA transaction.
3698 * spin_lock_irqsave(host_set lock)
3701 static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
3703 struct ata_port *ap = qc->ap;
3706 /* start host DMA transaction */
3707 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3708 outb(dmactl | ATA_DMA_START,
3709 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3714 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3715 * @qc: Info associated with this ATA transaction.
3717 * Writes the ATA_DMA_START flag to the DMA command register.
3719 * May be used as the bmdma_start() entry in ata_port_operations.
3722 * spin_lock_irqsave(host_set lock)
3724 void ata_bmdma_start(struct ata_queued_cmd *qc)
3726 if (qc->ap->flags & ATA_FLAG_MMIO)
3727 ata_bmdma_start_mmio(qc);
3729 ata_bmdma_start_pio(qc);
3734 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
3735 * @qc: Info associated with this ATA transaction.
3737 * Writes address of PRD table to device's PRD Table Address
3738 * register, sets the DMA control register, and calls
3739 * ops->exec_command() to start the transfer.
3741 * May be used as the bmdma_setup() entry in ata_port_operations.
3744 * spin_lock_irqsave(host_set lock)
3746 void ata_bmdma_setup(struct ata_queued_cmd *qc)
3748 if (qc->ap->flags & ATA_FLAG_MMIO)
3749 ata_bmdma_setup_mmio(qc);
3751 ata_bmdma_setup_pio(qc);
3756 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
3757 * @ap: Port associated with this ATA transaction.
3759 * Clear interrupt and error flags in DMA status register.
3761 * May be used as the irq_clear() entry in ata_port_operations.
3764 * spin_lock_irqsave(host_set lock)
3767 void ata_bmdma_irq_clear(struct ata_port *ap)
3769 if (ap->flags & ATA_FLAG_MMIO) {
3770 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
3771 writeb(readb(mmio), mmio);
3773 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
3774 outb(inb(addr), addr);
3781 * ata_bmdma_status - Read PCI IDE BMDMA status
3782 * @ap: Port associated with this ATA transaction.
3784 * Read and return BMDMA status register.
3786 * May be used as the bmdma_status() entry in ata_port_operations.
3789 * spin_lock_irqsave(host_set lock)
3792 u8 ata_bmdma_status(struct ata_port *ap)
3795 if (ap->flags & ATA_FLAG_MMIO) {
3796 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3797 host_stat = readb(mmio + ATA_DMA_STATUS);
3799 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
3805 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
3806 * @qc: Command we are ending DMA for
3808 * Clears the ATA_DMA_START flag in the dma control register
3810 * May be used as the bmdma_stop() entry in ata_port_operations.
3813 * spin_lock_irqsave(host_set lock)
3816 void ata_bmdma_stop(struct ata_queued_cmd *qc)
3818 struct ata_port *ap = qc->ap;
3819 if (ap->flags & ATA_FLAG_MMIO) {
3820 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3822 /* clear start/stop bit */
3823 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
3824 mmio + ATA_DMA_CMD);
3826 /* clear start/stop bit */
3827 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
3828 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3831 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
3832 ata_altstatus(ap); /* dummy read */
3836 * ata_host_intr - Handle host interrupt for given (port, task)
3837 * @ap: Port on which interrupt arrived (possibly...)
3838 * @qc: Taskfile currently active in engine
3840 * Handle host interrupt for given queued command. Currently,
3841 * only DMA interrupts are handled. All other commands are
3842 * handled via polling with interrupts disabled (nIEN bit).
3845 * spin_lock_irqsave(host_set lock)
3848 * One if interrupt was handled, zero if not (shared irq).
3851 inline unsigned int ata_host_intr (struct ata_port *ap,
3852 struct ata_queued_cmd *qc)
3854 u8 status, host_stat;
3856 switch (qc->tf.protocol) {
3859 case ATA_PROT_ATAPI_DMA:
3860 case ATA_PROT_ATAPI:
3861 /* check status of DMA engine */
3862 host_stat = ap->ops->bmdma_status(ap);
3863 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
3865 /* if it's not our irq... */
3866 if (!(host_stat & ATA_DMA_INTR))
3869 /* before we do anything else, clear DMA-Start bit */
3870 ap->ops->bmdma_stop(qc);
3874 case ATA_PROT_ATAPI_NODATA:
3875 case ATA_PROT_NODATA:
3876 /* check altstatus */
3877 status = ata_altstatus(ap);
3878 if (status & ATA_BUSY)
3881 /* check main status, clearing INTRQ */
3882 status = ata_chk_status(ap);
3883 if (unlikely(status & ATA_BUSY))
3885 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
3886 ap->id, qc->tf.protocol, status);
3888 /* ack bmdma irq events */
3889 ap->ops->irq_clear(ap);
3891 /* complete taskfile transaction */
3892 ata_qc_complete(qc, status);
3899 return 1; /* irq handled */
3902 ap->stats.idle_irq++;
3905 if ((ap->stats.idle_irq % 1000) == 0) {
3907 ata_irq_ack(ap, 0); /* debug trap */
3908 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
3911 return 0; /* irq not handled */
3915 * ata_interrupt - Default ATA host interrupt handler
3916 * @irq: irq line (unused)
3917 * @dev_instance: pointer to our ata_host_set information structure
3920 * Default interrupt handler for PCI IDE devices. Calls
3921 * ata_host_intr() for each port that is not disabled.
3924 * Obtains host_set lock during operation.
3927 * IRQ_NONE or IRQ_HANDLED.
3930 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
3932 struct ata_host_set *host_set = dev_instance;
3934 unsigned int handled = 0;
3935 unsigned long flags;
3937 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
3938 spin_lock_irqsave(&host_set->lock, flags);
3940 for (i = 0; i < host_set->n_ports; i++) {
3941 struct ata_port *ap;
3943 ap = host_set->ports[i];
3945 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
3946 struct ata_queued_cmd *qc;
3948 qc = ata_qc_from_tag(ap, ap->active_tag);
3949 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
3950 (qc->flags & ATA_QCFLAG_ACTIVE))
3951 handled |= ata_host_intr(ap, qc);
3955 spin_unlock_irqrestore(&host_set->lock, flags);
3957 return IRQ_RETVAL(handled);
3961 * atapi_packet_task - Write CDB bytes to hardware
3962 * @_data: Port to which ATAPI device is attached.
3964 * When device has indicated its readiness to accept
3965 * a CDB, this function is called. Send the CDB.
3966 * If DMA is to be performed, exit immediately.
3967 * Otherwise, we are in polling mode, so poll
3968 * status under operation succeeds or fails.
3971 * Kernel thread context (may sleep)
3974 static void atapi_packet_task(void *_data)
3976 struct ata_port *ap = _data;
3977 struct ata_queued_cmd *qc;
3980 qc = ata_qc_from_tag(ap, ap->active_tag);
3982 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3984 /* sleep-wait for BSY to clear */
3985 DPRINTK("busy wait\n");
3986 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB))
3989 /* make sure DRQ is set */
3990 status = ata_chk_status(ap);
3991 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)
3995 DPRINTK("send cdb\n");
3996 assert(ap->cdb_len >= 12);
3998 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
3999 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
4000 unsigned long flags;
4002 /* Once we're done issuing command and kicking bmdma,
4003 * irq handler takes over. To not lose irq, we need
4004 * to clear NOINTR flag before sending cdb, but
4005 * interrupt handler shouldn't be invoked before we're
4006 * finished. Hence, the following locking.
4008 spin_lock_irqsave(&ap->host_set->lock, flags);
4009 ap->flags &= ~ATA_FLAG_NOINTR;
4010 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
4011 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
4012 ap->ops->bmdma_start(qc); /* initiate bmdma */
4013 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4015 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
4017 /* PIO commands are handled by polling */
4018 ap->hsm_task_state = HSM_ST;
4019 queue_work(ata_wq, &ap->pio_task);
4025 ata_poll_qc_complete(qc, ATA_ERR);
4030 * ata_port_start - Set port up for dma.
4031 * @ap: Port to initialize
4033 * Called just after data structures for each port are
4034 * initialized. Allocates space for PRD table.
4036 * May be used as the port_start() entry in ata_port_operations.
4039 * Inherited from caller.
4042 int ata_port_start (struct ata_port *ap)
4044 struct device *dev = ap->host_set->dev;
4046 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4050 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4057 * ata_port_stop - Undo ata_port_start()
4058 * @ap: Port to shut down
4060 * Frees the PRD table.
4062 * May be used as the port_stop() entry in ata_port_operations.
4065 * Inherited from caller.
4068 void ata_port_stop (struct ata_port *ap)
4070 struct device *dev = ap->host_set->dev;
4072 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4075 void ata_host_stop (struct ata_host_set *host_set)
4077 if (host_set->mmio_base)
4078 iounmap(host_set->mmio_base);
4083 * ata_host_remove - Unregister SCSI host structure with upper layers
4084 * @ap: Port to unregister
4085 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4088 * Inherited from caller.
4091 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4093 struct Scsi_Host *sh = ap->host;
4098 scsi_remove_host(sh);
4100 ap->ops->port_stop(ap);
4104 * ata_host_init - Initialize an ata_port structure
4105 * @ap: Structure to initialize
4106 * @host: associated SCSI mid-layer structure
4107 * @host_set: Collection of hosts to which @ap belongs
4108 * @ent: Probe information provided by low-level driver
4109 * @port_no: Port number associated with this ata_port
4111 * Initialize a new ata_port structure, and its associated
4115 * Inherited from caller.
4118 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4119 struct ata_host_set *host_set,
4120 const struct ata_probe_ent *ent, unsigned int port_no)
4126 host->max_channel = 1;
4127 host->unique_id = ata_unique_id++;
4128 host->max_cmd_len = 12;
4130 scsi_assign_lock(host, &host_set->lock);
4132 ap->flags = ATA_FLAG_PORT_DISABLED;
4133 ap->id = host->unique_id;
4135 ap->ctl = ATA_DEVCTL_OBS;
4136 ap->host_set = host_set;
4137 ap->port_no = port_no;
4139 ent->legacy_mode ? ent->hard_port_no : port_no;
4140 ap->pio_mask = ent->pio_mask;
4141 ap->mwdma_mask = ent->mwdma_mask;
4142 ap->udma_mask = ent->udma_mask;
4143 ap->flags |= ent->host_flags;
4144 ap->ops = ent->port_ops;
4145 ap->cbl = ATA_CBL_NONE;
4146 ap->active_tag = ATA_TAG_POISON;
4147 ap->last_ctl = 0xFF;
4149 INIT_WORK(&ap->packet_task, atapi_packet_task, ap);
4150 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
4152 for (i = 0; i < ATA_MAX_DEVICES; i++)
4153 ap->device[i].devno = i;
4156 ap->stats.unhandled_irq = 1;
4157 ap->stats.idle_irq = 1;
4160 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4164 * ata_host_add - Attach low-level ATA driver to system
4165 * @ent: Information provided by low-level driver
4166 * @host_set: Collections of ports to which we add
4167 * @port_no: Port number associated with this host
4169 * Attach low-level ATA driver to system.
4172 * PCI/etc. bus probe sem.
4175 * New ata_port on success, for NULL on error.
4178 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
4179 struct ata_host_set *host_set,
4180 unsigned int port_no)
4182 struct Scsi_Host *host;
4183 struct ata_port *ap;
4187 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4191 ap = (struct ata_port *) &host->hostdata[0];
4193 ata_host_init(ap, host, host_set, ent, port_no);
4195 rc = ap->ops->port_start(ap);
4202 scsi_host_put(host);
4207 * ata_device_add - Register hardware device with ATA and SCSI layers
4208 * @ent: Probe information describing hardware device to be registered
4210 * This function processes the information provided in the probe
4211 * information struct @ent, allocates the necessary ATA and SCSI
4212 * host information structures, initializes them, and registers
4213 * everything with requisite kernel subsystems.
4215 * This function requests irqs, probes the ATA bus, and probes
4219 * PCI/etc. bus probe sem.
4222 * Number of ports registered. Zero on error (no ports registered).
4225 int ata_device_add(const struct ata_probe_ent *ent)
4227 unsigned int count = 0, i;
4228 struct device *dev = ent->dev;
4229 struct ata_host_set *host_set;
4232 /* alloc a container for our list of ATA ports (buses) */
4233 host_set = kzalloc(sizeof(struct ata_host_set) +
4234 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4237 spin_lock_init(&host_set->lock);
4239 host_set->dev = dev;
4240 host_set->n_ports = ent->n_ports;
4241 host_set->irq = ent->irq;
4242 host_set->mmio_base = ent->mmio_base;
4243 host_set->private_data = ent->private_data;
4244 host_set->ops = ent->port_ops;
4246 /* register each port bound to this device */
4247 for (i = 0; i < ent->n_ports; i++) {
4248 struct ata_port *ap;
4249 unsigned long xfer_mode_mask;
4251 ap = ata_host_add(ent, host_set, i);
4255 host_set->ports[i] = ap;
4256 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4257 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4258 (ap->pio_mask << ATA_SHIFT_PIO);
4260 /* print per-port info to dmesg */
4261 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4262 "bmdma 0x%lX irq %lu\n",
4264 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4265 ata_mode_string(xfer_mode_mask),
4266 ap->ioaddr.cmd_addr,
4267 ap->ioaddr.ctl_addr,
4268 ap->ioaddr.bmdma_addr,
4272 host_set->ops->irq_clear(ap);
4279 /* obtain irq, that is shared between channels */
4280 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4281 DRV_NAME, host_set))
4284 /* perform each probe synchronously */
4285 DPRINTK("probe begin\n");
4286 for (i = 0; i < count; i++) {
4287 struct ata_port *ap;
4290 ap = host_set->ports[i];
4292 DPRINTK("ata%u: probe begin\n", ap->id);
4293 rc = ata_bus_probe(ap);
4294 DPRINTK("ata%u: probe end\n", ap->id);
4297 /* FIXME: do something useful here?
4298 * Current libata behavior will
4299 * tear down everything when
4300 * the module is removed
4301 * or the h/w is unplugged.
4305 rc = scsi_add_host(ap->host, dev);
4307 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4309 /* FIXME: do something useful here */
4310 /* FIXME: handle unconditional calls to
4311 * scsi_scan_host and ata_host_remove, below,
4317 /* probes are done, now scan each port's disk(s) */
4318 DPRINTK("probe begin\n");
4319 for (i = 0; i < count; i++) {
4320 struct ata_port *ap = host_set->ports[i];
4322 ata_scsi_scan_host(ap);
4325 dev_set_drvdata(dev, host_set);
4327 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4328 return ent->n_ports; /* success */
4331 for (i = 0; i < count; i++) {
4332 ata_host_remove(host_set->ports[i], 1);
4333 scsi_host_put(host_set->ports[i]->host);
4337 VPRINTK("EXIT, returning 0\n");
4342 * ata_host_set_remove - PCI layer callback for device removal
4343 * @host_set: ATA host set that was removed
4345 * Unregister all objects associated with this host set. Free those
4349 * Inherited from calling layer (may sleep).
4352 void ata_host_set_remove(struct ata_host_set *host_set)
4354 struct ata_port *ap;
4357 for (i = 0; i < host_set->n_ports; i++) {
4358 ap = host_set->ports[i];
4359 scsi_remove_host(ap->host);
4362 free_irq(host_set->irq, host_set);
4364 for (i = 0; i < host_set->n_ports; i++) {
4365 ap = host_set->ports[i];
4367 ata_scsi_release(ap->host);
4369 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4370 struct ata_ioports *ioaddr = &ap->ioaddr;
4372 if (ioaddr->cmd_addr == 0x1f0)
4373 release_region(0x1f0, 8);
4374 else if (ioaddr->cmd_addr == 0x170)
4375 release_region(0x170, 8);
4378 scsi_host_put(ap->host);
4381 if (host_set->ops->host_stop)
4382 host_set->ops->host_stop(host_set);
4388 * ata_scsi_release - SCSI layer callback hook for host unload
4389 * @host: libata host to be unloaded
4391 * Performs all duties necessary to shut down a libata port...
4392 * Kill port kthread, disable port, and release resources.
4395 * Inherited from SCSI layer.
4401 int ata_scsi_release(struct Scsi_Host *host)
4403 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4407 ap->ops->port_disable(ap);
4408 ata_host_remove(ap, 0);
4415 * ata_std_ports - initialize ioaddr with standard port offsets.
4416 * @ioaddr: IO address structure to be initialized
4418 * Utility function which initializes data_addr, error_addr,
4419 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4420 * device_addr, status_addr, and command_addr to standard offsets
4421 * relative to cmd_addr.
4423 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
4426 void ata_std_ports(struct ata_ioports *ioaddr)
4428 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4429 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4430 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4431 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4432 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4433 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4434 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4435 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4436 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4437 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4440 static struct ata_probe_ent *
4441 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
4443 struct ata_probe_ent *probe_ent;
4445 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
4447 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
4448 kobject_name(&(dev->kobj)));
4452 INIT_LIST_HEAD(&probe_ent->node);
4453 probe_ent->dev = dev;
4455 probe_ent->sht = port->sht;
4456 probe_ent->host_flags = port->host_flags;
4457 probe_ent->pio_mask = port->pio_mask;
4458 probe_ent->mwdma_mask = port->mwdma_mask;
4459 probe_ent->udma_mask = port->udma_mask;
4460 probe_ent->port_ops = port->port_ops;
4469 void ata_pci_host_stop (struct ata_host_set *host_set)
4471 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4473 pci_iounmap(pdev, host_set->mmio_base);
4477 * ata_pci_init_native_mode - Initialize native-mode driver
4478 * @pdev: pci device to be initialized
4479 * @port: array[2] of pointers to port info structures.
4480 * @ports: bitmap of ports present
4482 * Utility function which allocates and initializes an
4483 * ata_probe_ent structure for a standard dual-port
4484 * PIO-based IDE controller. The returned ata_probe_ent
4485 * structure can be passed to ata_device_add(). The returned
4486 * ata_probe_ent structure should then be freed with kfree().
4488 * The caller need only pass the address of the primary port, the
4489 * secondary will be deduced automatically. If the device has non
4490 * standard secondary port mappings this function can be called twice,
4491 * once for each interface.
4494 struct ata_probe_ent *
4495 ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int ports)
4497 struct ata_probe_ent *probe_ent =
4498 ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4504 probe_ent->irq = pdev->irq;
4505 probe_ent->irq_flags = SA_SHIRQ;
4507 if (ports & ATA_PORT_PRIMARY) {
4508 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 0);
4509 probe_ent->port[p].altstatus_addr =
4510 probe_ent->port[p].ctl_addr =
4511 pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
4512 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4);
4513 ata_std_ports(&probe_ent->port[p]);
4517 if (ports & ATA_PORT_SECONDARY) {
4518 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 2);
4519 probe_ent->port[p].altstatus_addr =
4520 probe_ent->port[p].ctl_addr =
4521 pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
4522 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4) + 8;
4523 ata_std_ports(&probe_ent->port[p]);
4527 probe_ent->n_ports = p;
4531 static struct ata_probe_ent *ata_pci_init_legacy_port(struct pci_dev *pdev, struct ata_port_info **port, int port_num)
4533 struct ata_probe_ent *probe_ent;
4535 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4539 probe_ent->legacy_mode = 1;
4540 probe_ent->n_ports = 1;
4541 probe_ent->hard_port_no = port_num;
4546 probe_ent->irq = 14;
4547 probe_ent->port[0].cmd_addr = 0x1f0;
4548 probe_ent->port[0].altstatus_addr =
4549 probe_ent->port[0].ctl_addr = 0x3f6;
4552 probe_ent->irq = 15;
4553 probe_ent->port[0].cmd_addr = 0x170;
4554 probe_ent->port[0].altstatus_addr =
4555 probe_ent->port[0].ctl_addr = 0x376;
4558 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4) + 8 * port_num;
4559 ata_std_ports(&probe_ent->port[0]);
4564 * ata_pci_init_one - Initialize/register PCI IDE host controller
4565 * @pdev: Controller to be initialized
4566 * @port_info: Information from low-level host driver
4567 * @n_ports: Number of ports attached to host controller
4569 * This is a helper function which can be called from a driver's
4570 * xxx_init_one() probe function if the hardware uses traditional
4571 * IDE taskfile registers.
4573 * This function calls pci_enable_device(), reserves its register
4574 * regions, sets the dma mask, enables bus master mode, and calls
4578 * Inherited from PCI layer (may sleep).
4581 * Zero on success, negative on errno-based value on error.
4584 int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
4585 unsigned int n_ports)
4587 struct ata_probe_ent *probe_ent = NULL, *probe_ent2 = NULL;
4588 struct ata_port_info *port[2];
4590 unsigned int legacy_mode = 0;
4591 int disable_dev_on_err = 1;
4596 port[0] = port_info[0];
4598 port[1] = port_info[1];
4602 if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0
4603 && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
4604 /* TODO: What if one channel is in native mode ... */
4605 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
4606 mask = (1 << 2) | (1 << 0);
4607 if ((tmp8 & mask) != mask)
4608 legacy_mode = (1 << 3);
4612 if ((!legacy_mode) && (n_ports > 2)) {
4613 printk(KERN_ERR "ata: BUG: native mode, n_ports > 2\n");
4618 /* FIXME: Really for ATA it isn't safe because the device may be
4619 multi-purpose and we want to leave it alone if it was already
4620 enabled. Secondly for shared use as Arjan says we want refcounting
4622 Checking dev->is_enabled is insufficient as this is not set at
4623 boot for the primary video which is BIOS enabled
4626 rc = pci_enable_device(pdev);
4630 rc = pci_request_regions(pdev, DRV_NAME);
4632 disable_dev_on_err = 0;
4636 /* FIXME: Should use platform specific mappers for legacy port ranges */
4638 if (!request_region(0x1f0, 8, "libata")) {
4639 struct resource *conflict, res;
4641 res.end = 0x1f0 + 8 - 1;
4642 conflict = ____request_resource(&ioport_resource, &res);
4643 if (!strcmp(conflict->name, "libata"))
4644 legacy_mode |= (1 << 0);
4646 disable_dev_on_err = 0;
4647 printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n");
4650 legacy_mode |= (1 << 0);
4652 if (!request_region(0x170, 8, "libata")) {
4653 struct resource *conflict, res;
4655 res.end = 0x170 + 8 - 1;
4656 conflict = ____request_resource(&ioport_resource, &res);
4657 if (!strcmp(conflict->name, "libata"))
4658 legacy_mode |= (1 << 1);
4660 disable_dev_on_err = 0;
4661 printk(KERN_WARNING "ata: 0x170 IDE port busy\n");
4664 legacy_mode |= (1 << 1);
4667 /* we have legacy mode, but all ports are unavailable */
4668 if (legacy_mode == (1 << 3)) {
4670 goto err_out_regions;
4673 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
4675 goto err_out_regions;
4676 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
4678 goto err_out_regions;
4681 if (legacy_mode & (1 << 0))
4682 probe_ent = ata_pci_init_legacy_port(pdev, port, 0);
4683 if (legacy_mode & (1 << 1))
4684 probe_ent2 = ata_pci_init_legacy_port(pdev, port, 1);
4687 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
4689 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY);
4691 if (!probe_ent && !probe_ent2) {
4693 goto err_out_regions;
4696 pci_set_master(pdev);
4698 /* FIXME: check ata_device_add return */
4700 if (legacy_mode & (1 << 0))
4701 ata_device_add(probe_ent);
4702 if (legacy_mode & (1 << 1))
4703 ata_device_add(probe_ent2);
4705 ata_device_add(probe_ent);
4713 if (legacy_mode & (1 << 0))
4714 release_region(0x1f0, 8);
4715 if (legacy_mode & (1 << 1))
4716 release_region(0x170, 8);
4717 pci_release_regions(pdev);
4719 if (disable_dev_on_err)
4720 pci_disable_device(pdev);
4725 * ata_pci_remove_one - PCI layer callback for device removal
4726 * @pdev: PCI device that was removed
4728 * PCI layer indicates to libata via this hook that
4729 * hot-unplug or module unload event has occurred.
4730 * Handle this by unregistering all objects associated
4731 * with this PCI device. Free those objects. Then finally
4732 * release PCI resources and disable device.
4735 * Inherited from PCI layer (may sleep).
4738 void ata_pci_remove_one (struct pci_dev *pdev)
4740 struct device *dev = pci_dev_to_dev(pdev);
4741 struct ata_host_set *host_set = dev_get_drvdata(dev);
4743 ata_host_set_remove(host_set);
4744 pci_release_regions(pdev);
4745 pci_disable_device(pdev);
4746 dev_set_drvdata(dev, NULL);
4749 /* move to PCI subsystem */
4750 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
4752 unsigned long tmp = 0;
4754 switch (bits->width) {
4757 pci_read_config_byte(pdev, bits->reg, &tmp8);
4763 pci_read_config_word(pdev, bits->reg, &tmp16);
4769 pci_read_config_dword(pdev, bits->reg, &tmp32);
4780 return (tmp == bits->val) ? 1 : 0;
4782 #endif /* CONFIG_PCI */
4785 static int __init ata_init(void)
4787 ata_wq = create_workqueue("ata");
4791 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4795 static void __exit ata_exit(void)
4797 destroy_workqueue(ata_wq);
4800 module_init(ata_init);
4801 module_exit(ata_exit);
4803 static unsigned long ratelimit_time;
4804 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
4806 int ata_ratelimit(void)
4809 unsigned long flags;
4811 spin_lock_irqsave(&ata_ratelimit_lock, flags);
4813 if (time_after(jiffies, ratelimit_time)) {
4815 ratelimit_time = jiffies + (HZ/5);
4819 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
4825 * libata is essentially a library of internal helper functions for
4826 * low-level ATA host controller drivers. As such, the API/ABI is
4827 * likely to change as new drivers are added and updated.
4828 * Do not depend on ABI/API stability.
4831 EXPORT_SYMBOL_GPL(ata_std_bios_param);
4832 EXPORT_SYMBOL_GPL(ata_std_ports);
4833 EXPORT_SYMBOL_GPL(ata_device_add);
4834 EXPORT_SYMBOL_GPL(ata_host_set_remove);
4835 EXPORT_SYMBOL_GPL(ata_sg_init);
4836 EXPORT_SYMBOL_GPL(ata_sg_init_one);
4837 EXPORT_SYMBOL_GPL(ata_qc_complete);
4838 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
4839 EXPORT_SYMBOL_GPL(ata_eng_timeout);
4840 EXPORT_SYMBOL_GPL(ata_tf_load);
4841 EXPORT_SYMBOL_GPL(ata_tf_read);
4842 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
4843 EXPORT_SYMBOL_GPL(ata_std_dev_select);
4844 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
4845 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
4846 EXPORT_SYMBOL_GPL(ata_check_status);
4847 EXPORT_SYMBOL_GPL(ata_altstatus);
4848 EXPORT_SYMBOL_GPL(ata_exec_command);
4849 EXPORT_SYMBOL_GPL(ata_port_start);
4850 EXPORT_SYMBOL_GPL(ata_port_stop);
4851 EXPORT_SYMBOL_GPL(ata_host_stop);
4852 EXPORT_SYMBOL_GPL(ata_interrupt);
4853 EXPORT_SYMBOL_GPL(ata_qc_prep);
4854 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
4855 EXPORT_SYMBOL_GPL(ata_bmdma_start);
4856 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
4857 EXPORT_SYMBOL_GPL(ata_bmdma_status);
4858 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
4859 EXPORT_SYMBOL_GPL(ata_port_probe);
4860 EXPORT_SYMBOL_GPL(sata_phy_reset);
4861 EXPORT_SYMBOL_GPL(__sata_phy_reset);
4862 EXPORT_SYMBOL_GPL(ata_bus_reset);
4863 EXPORT_SYMBOL_GPL(ata_port_disable);
4864 EXPORT_SYMBOL_GPL(ata_ratelimit);
4865 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
4866 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
4867 EXPORT_SYMBOL_GPL(ata_scsi_error);
4868 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
4869 EXPORT_SYMBOL_GPL(ata_scsi_release);
4870 EXPORT_SYMBOL_GPL(ata_host_intr);
4871 EXPORT_SYMBOL_GPL(ata_dev_classify);
4872 EXPORT_SYMBOL_GPL(ata_dev_id_string);
4873 EXPORT_SYMBOL_GPL(ata_dev_config);
4874 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
4876 EXPORT_SYMBOL_GPL(ata_timing_compute);
4877 EXPORT_SYMBOL_GPL(ata_timing_merge);
4880 EXPORT_SYMBOL_GPL(pci_test_config_bits);
4881 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
4882 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
4883 EXPORT_SYMBOL_GPL(ata_pci_init_one);
4884 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
4885 #endif /* CONFIG_PCI */