drivers/scsi/a100u2w.c

   1 /*
   2  * Initio A100 device driver for Linux.
   3  *
   4  * Copyright (c) 1994-1998 Initio Corporation
   5  * Copyright (c) 2003-2004 Christoph Hellwig
   6  * All rights reserved.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2, or (at your option)
  11  * any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; see the file COPYING.  If not, write to
  20  * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  25  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
  26  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  32  * SUCH DAMAGE.
  33  */
  34
  35 /*
  36  * Revision History:
  37  * 07/02/98 hl  - v.91n Initial drivers.
  38  * 09/14/98 hl - v1.01 Support new Kernel.
  39  * 09/22/98 hl - v1.01a Support reset.
  40  * 09/24/98 hl - v1.01b Fixed reset.
  41  * 10/05/98 hl - v1.02 split the source code and release.
  42  * 12/19/98 bv - v1.02a Use spinlocks for 2.1.95 and up
  43  * 01/31/99 bv - v1.02b Use mdelay instead of waitForPause
  44  * 08/08/99 bv - v1.02c Use waitForPause again.
  45  * 06/25/02 Doug Ledford <dledford@redhat.com> - v1.02d
  46  *          - Remove limit on number of controllers
  47  *          - Port to DMA mapping API
  48  *          - Clean up interrupt handler registration
  49  *          - Fix memory leaks
  50  *          - Fix allocation of scsi host structs and private data
  51  * 11/18/03 Christoph Hellwig <hch@lst.de>
  52  *          - Port to new probing API
  53  *          - Fix some more leaks in init failure cases
  54  * 9/28/04 Christoph Hellwig <hch@lst.de>
  55  *          - merge the two source files
  56  *          - remove internal queueing code
  57  * 14/06/07 Alan Cox <alan@redhat.com>
  58  *       - Grand cleanup and Linuxisation
  59  */
  60
  61 #include <linux/module.h>
  62 #include <linux/errno.h>
  63 #include <linux/delay.h>
  64 #include <linux/interrupt.h>
  65 #include <linux/pci.h>
  66 #include <linux/init.h>
  67 #include <linux/blkdev.h>
  68 #include <linux/spinlock.h>
  69 #include <linux/kernel.h>
  70 #include <linux/string.h>
  71 #include <linux/ioport.h>
  72 #include <linux/slab.h>
  73 #include <linux/dma-mapping.h>
  74
  75 #include <asm/io.h>
  76 #include <asm/irq.h>
  77
  78 #include <scsi/scsi.h>
  79 #include <scsi/scsi_cmnd.h>
  80 #include <scsi/scsi_device.h>
  81 #include <scsi/scsi_host.h>
  82
  83 #include "a100u2w.h"
  84
  85
  86 static struct orc_scb *__orc_alloc_scb(struct orc_host * host);
  87 static void inia100_scb_handler(struct orc_host *host, struct orc_scb *scb);
  88
  89 static struct orc_nvram nvram, *nvramp = &nvram;
  90
  91 static u8 default_nvram[64] =
  92 {
  93 /*----------header -------------*/
  94         0x01,                   /* 0x00: Sub System Vendor ID 0 */
  95         0x11,                   /* 0x01: Sub System Vendor ID 1 */
  96         0x60,                   /* 0x02: Sub System ID 0        */
  97         0x10,                   /* 0x03: Sub System ID 1        */
  98         0x00,                   /* 0x04: SubClass               */
  99         0x01,                   /* 0x05: Vendor ID 0            */
 100         0x11,                   /* 0x06: Vendor ID 1            */
 101         0x60,                   /* 0x07: Device ID 0            */
 102         0x10,                   /* 0x08: Device ID 1            */
 103         0x00,                   /* 0x09: Reserved               */
 104         0x00,                   /* 0x0A: Reserved               */
 105         0x01,                   /* 0x0B: Revision of Data Structure     */
 106                                 /* -- Host Adapter Structure --- */
 107         0x01,                   /* 0x0C: Number Of SCSI Channel */
 108         0x01,                   /* 0x0D: BIOS Configuration 1   */
 109         0x00,                   /* 0x0E: BIOS Configuration 2   */
 110         0x00,                   /* 0x0F: BIOS Configuration 3   */
 111                                 /* --- SCSI Channel 0 Configuration --- */
 112         0x07,                   /* 0x10: H/A ID                 */
 113         0x83,                   /* 0x11: Channel Configuration  */
 114         0x20,                   /* 0x12: MAX TAG per target     */
 115         0x0A,                   /* 0x13: SCSI Reset Recovering time     */
 116         0x00,                   /* 0x14: Channel Configuration4 */
 117         0x00,                   /* 0x15: Channel Configuration5 */
 118                                 /* SCSI Channel 0 Target Configuration  */
 119                                 /* 0x16-0x25                    */
 120         0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8,
 121         0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8,
 122                                 /* --- SCSI Channel 1 Configuration --- */
 123         0x07,                   /* 0x26: H/A ID                 */
 124         0x83,                   /* 0x27: Channel Configuration  */
 125         0x20,                   /* 0x28: MAX TAG per target     */
 126         0x0A,                   /* 0x29: SCSI Reset Recovering time     */
 127         0x00,                   /* 0x2A: Channel Configuration4 */
 128         0x00,                   /* 0x2B: Channel Configuration5 */
 129                                 /* SCSI Channel 1 Target Configuration  */
 130                                 /* 0x2C-0x3B                    */
 131         0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8,
 132         0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8,
 133         0x00,                   /* 0x3C: Reserved               */
 134         0x00,                   /* 0x3D: Reserved               */
 135         0x00,                   /* 0x3E: Reserved               */
 136         0x00                    /* 0x3F: Checksum               */
 137 };
 138
 139
 140 static u8 wait_chip_ready(struct orc_host * host)
 141 {
 142         int i;
 143
 144         for (i = 0; i < 10; i++) {      /* Wait 1 second for report timeout     */
 145                 if (inb(host->base + ORC_HCTRL) & HOSTSTOP)     /* Wait HOSTSTOP set */
 146                         return 1;
 147                 mdelay(100);
 148         }
 149         return 0;
 150 }
 151
 152 static u8 wait_firmware_ready(struct orc_host * host)
 153 {
 154         int i;
 155
 156         for (i = 0; i < 10; i++) {      /* Wait 1 second for report timeout     */
 157                 if (inb(host->base + ORC_HSTUS) & RREADY)               /* Wait READY set */
 158                         return 1;
 159                 mdelay(100);    /* wait 100ms before try again  */
 160         }
 161         return 0;
 162 }
 163
 164 /***************************************************************************/
 165 static u8 wait_scsi_reset_done(struct orc_host * host)
 166 {
 167         int i;
 168
 169         for (i = 0; i < 10; i++) {      /* Wait 1 second for report timeout     */
 170                 if (!(inb(host->base + ORC_HCTRL) & SCSIRST))   /* Wait SCSIRST done */
 171                         return 1;
 172                 mdelay(100);    /* wait 100ms before try again  */
 173         }
 174         return 0;
 175 }
 176
 177 /***************************************************************************/
 178 static u8 wait_HDO_off(struct orc_host * host)
 179 {
 180         int i;
 181
 182         for (i = 0; i < 10; i++) {      /* Wait 1 second for report timeout     */
 183                 if (!(inb(host->base + ORC_HCTRL) & HDO))               /* Wait HDO off */
 184                         return 1;
 185                 mdelay(100);    /* wait 100ms before try again  */
 186         }
 187         return 0;
 188 }
 189
 190 /***************************************************************************/
 191 static u8 wait_hdi_set(struct orc_host * host, u8 * data)
 192 {
 193         int i;
 194
 195         for (i = 0; i < 10; i++) {      /* Wait 1 second for report timeout     */
 196                 if ((*data = inb(host->base + ORC_HSTUS)) & HDI)
 197                         return 1;       /* Wait HDI set */
 198                 mdelay(100);    /* wait 100ms before try again  */
 199         }
 200         return 0;
 201 }
 202
 203 /***************************************************************************/
 204 static unsigned short orc_read_fwrev(struct orc_host * host)
 205 {
 206         u16 version;
 207         u8 data;
 208
 209         outb(ORC_CMD_VERSION, host->base + ORC_HDATA);
 210         outb(HDO, host->base + ORC_HCTRL);
 211         if (wait_HDO_off(host) == 0)    /* Wait HDO off   */
 212                 return 0;
 213
 214         if (wait_hdi_set(host, &data) == 0)     /* Wait HDI set   */
 215                 return 0;
 216         version = inb(host->base + ORC_HDATA);
 217         outb(data, host->base + ORC_HSTUS);     /* Clear HDI            */
 218
 219         if (wait_hdi_set(host, &data) == 0)     /* Wait HDI set   */
 220                 return 0;
 221         version |= inb(host->base + ORC_HDATA) << 8;
 222         outb(data, host->base + ORC_HSTUS);     /* Clear HDI            */
 223
 224         return version;
 225 }
 226
 227 /***************************************************************************/
 228 static u8 orc_nv_write(struct orc_host * host, unsigned char address, unsigned char value)
 229 {
 230         outb(ORC_CMD_SET_NVM, host->base + ORC_HDATA);  /* Write command */
 231         outb(HDO, host->base + ORC_HCTRL);
 232         if (wait_HDO_off(host) == 0)    /* Wait HDO off   */
 233                 return 0;
 234
 235         outb(address, host->base + ORC_HDATA);  /* Write address */
 236         outb(HDO, host->base + ORC_HCTRL);
 237         if (wait_HDO_off(host) == 0)    /* Wait HDO off   */
 238                 return 0;
 239
 240         outb(value, host->base + ORC_HDATA);    /* Write value  */
 241         outb(HDO, host->base + ORC_HCTRL);
 242         if (wait_HDO_off(host) == 0)    /* Wait HDO off   */
 243                 return 0;
 244
 245         return 1;
 246 }
 247
 248 /***************************************************************************/
 249 static u8 orc_nv_read(struct orc_host * host, u8 address, u8 *ptr)
 250 {
 251         unsigned char data;
 252
 253         outb(ORC_CMD_GET_NVM, host->base + ORC_HDATA);  /* Write command */
 254         outb(HDO, host->base + ORC_HCTRL);
 255         if (wait_HDO_off(host) == 0)    /* Wait HDO off   */
 256                 return 0;
 257
 258         outb(address, host->base + ORC_HDATA);  /* Write address */
 259         outb(HDO, host->base + ORC_HCTRL);
 260         if (wait_HDO_off(host) == 0)    /* Wait HDO off   */
 261                 return 0;
 262
 263         if (wait_hdi_set(host, &data) == 0)     /* Wait HDI set   */
 264                 return 0;
 265         *ptr = inb(host->base + ORC_HDATA);
 266         outb(data, host->base + ORC_HSTUS);     /* Clear HDI    */
 267
 268         return 1;
 269
 270 }
 271
 272 /**
 273  *      orc_exec_sb             -       Queue an SCB with the HA
 274  *      @host: host adapter the SCB belongs to
 275  *      @scb: SCB to queue for execution
 276  */
 277
 278 static void orc_exec_scb(struct orc_host * host, struct orc_scb * scb)
 279 {
 280         scb->status = ORCSCB_POST;
 281         outb(scb->scbidx, host->base + ORC_PQUEUE);
 282 }
 283
 284
 285 /**
 286  *      se2_rd_all      -       read SCSI parameters from EEPROM
 287  *      @host: Host whose EEPROM is being loaded
 288  *
 289  *      Read SCSI H/A configuration parameters from serial EEPROM
 290  */
 291
 292 static int se2_rd_all(struct orc_host * host)
 293 {
 294         int i;
 295         u8 *np, chksum = 0;
 296
 297         np = (u8 *) nvramp;
 298         for (i = 0; i < 64; i++, np++) {        /* <01> */
 299                 if (orc_nv_read(host, (u8) i, np) == 0)
 300                         return -1;
 301         }
 302
 303         /*------ Is ckecksum ok ? ------*/
 304         np = (u8 *) nvramp;
 305         for (i = 0; i < 63; i++)
 306                 chksum += *np++;
 307
 308         if (nvramp->CheckSum != (u8) chksum)
 309                 return -1;
 310         return 1;
 311 }
 312
 313 /**
 314  *      se2_update_all          -       update the EEPROM
 315  *      @host: Host whose EEPROM is being updated
 316  *
 317  *      Update changed bytes in the EEPROM image.
 318  */
 319
 320 static void se2_update_all(struct orc_host * host)
 321 {                               /* setup default pattern  */
 322         int i;
 323         u8 *np, *np1, chksum = 0;
 324
 325         /* Calculate checksum first   */
 326         np = (u8 *) default_nvram;
 327         for (i = 0; i < 63; i++)
 328                 chksum += *np++;
 329         *np = chksum;
 330
 331         np = (u8 *) default_nvram;
 332         np1 = (u8 *) nvramp;
 333         for (i = 0; i < 64; i++, np++, np1++) {
 334                 if (*np != *np1)
 335                         orc_nv_write(host, (u8) i, *np);
 336         }
 337 }
 338
 339 /**
 340  *      read_eeprom             -       load EEPROM
 341  *      @host: Host EEPROM to read
 342  *
 343  *      Read the EEPROM for a given host. If it is invalid or fails
 344  *      the restore the defaults and use them.
 345  */
 346
 347 static void read_eeprom(struct orc_host * host)
 348 {
 349         if (se2_rd_all(host) != 1) {
 350                 se2_update_all(host);   /* setup default pattern        */
 351                 se2_rd_all(host);       /* load again                   */
 352         }
 353 }
 354
 355
 356 /**
 357  *      orc_load_firmware       -       initialise firmware
 358  *      @host: Host to set up
 359  *
 360  *      Load the firmware from the EEPROM into controller SRAM. This
 361  *      is basically a 4K block copy and then a 4K block read to check
 362  *      correctness. The rest is convulted by the indirect interfaces
 363  *      in the hardware
 364  */
 365
 366 static u8 orc_load_firmware(struct orc_host * host)
 367 {
 368         u32 data32;
 369         u16 bios_addr;
 370         u16 i;
 371         u8 *data32_ptr, data;
 372
 373
 374         /* Set up the EEPROM for access */
 375
 376         data = inb(host->base + ORC_GCFG);
 377         outb(data | EEPRG, host->base + ORC_GCFG);      /* Enable EEPROM programming */
 378         outb(0x00, host->base + ORC_EBIOSADR2);
 379         outw(0x0000, host->base + ORC_EBIOSADR0);
 380         if (inb(host->base + ORC_EBIOSDATA) != 0x55) {
 381                 outb(data, host->base + ORC_GCFG);      /* Disable EEPROM programming */
 382                 return 0;
 383         }
 384         outw(0x0001, host->base + ORC_EBIOSADR0);
 385         if (inb(host->base + ORC_EBIOSDATA) != 0xAA) {
 386                 outb(data, host->base + ORC_GCFG);      /* Disable EEPROM programming */
 387                 return 0;
 388         }
 389
 390         outb(PRGMRST | DOWNLOAD, host->base + ORC_RISCCTL);     /* Enable SRAM programming */
 391         data32_ptr = (u8 *) & data32;
 392         data32 = cpu_to_le32(0);                /* Initial FW address to 0 */
 393         outw(0x0010, host->base + ORC_EBIOSADR0);
 394         *data32_ptr = inb(host->base + ORC_EBIOSDATA);          /* Read from BIOS */
 395         outw(0x0011, host->base + ORC_EBIOSADR0);
 396         *(data32_ptr + 1) = inb(host->base + ORC_EBIOSDATA);    /* Read from BIOS */
 397         outw(0x0012, host->base + ORC_EBIOSADR0);
 398         *(data32_ptr + 2) = inb(host->base + ORC_EBIOSDATA);    /* Read from BIOS */
 399         outw(*(data32_ptr + 2), host->base + ORC_EBIOSADR2);
 400         outl(le32_to_cpu(data32), host->base + ORC_FWBASEADR);          /* Write FW address */
 401
 402         /* Copy the code from the BIOS to the SRAM */
 403
 404         udelay(500);    /* Required on Sun Ultra 5 ... 350 -> failures */
 405         bios_addr = (u16) le32_to_cpu(data32);  /* FW code locate at BIOS address + ? */
 406         for (i = 0, data32_ptr = (u8 *) & data32;       /* Download the code    */
 407              i < 0x1000;        /* Firmware code size = 4K      */
 408              i++, bios_addr++) {
 409                 outw(bios_addr, host->base + ORC_EBIOSADR0);
 410                 *data32_ptr++ = inb(host->base + ORC_EBIOSDATA);        /* Read from BIOS */
 411                 if ((i % 4) == 3) {
 412                         outl(le32_to_cpu(data32), host->base + ORC_RISCRAM);    /* Write every 4 bytes */
 413                         data32_ptr = (u8 *) & data32;
 414                 }
 415         }
 416
 417         /* Go back and check they match */
 418
 419         outb(PRGMRST | DOWNLOAD, host->base + ORC_RISCCTL);     /* Reset program count 0 */
 420         bios_addr -= 0x1000;    /* Reset the BIOS adddress      */
 421         for (i = 0, data32_ptr = (u8 *) & data32;       /* Check the code       */
 422              i < 0x1000;        /* Firmware code size = 4K      */
 423              i++, bios_addr++) {
 424                 outw(bios_addr, host->base + ORC_EBIOSADR0);
 425                 *data32_ptr++ = inb(host->base + ORC_EBIOSDATA);        /* Read from BIOS */
 426                 if ((i % 4) == 3) {
 427                         if (inl(host->base + ORC_RISCRAM) != le32_to_cpu(data32)) {
 428                                 outb(PRGMRST, host->base + ORC_RISCCTL);        /* Reset program to 0 */
 429                                 outb(data, host->base + ORC_GCFG);      /*Disable EEPROM programming */
 430                                 return 0;
 431                         }
 432                         data32_ptr = (u8 *) & data32;
 433                 }
 434         }
 435
 436         /* Success */
 437         outb(PRGMRST, host->base + ORC_RISCCTL);        /* Reset program to 0   */
 438         outb(data, host->base + ORC_GCFG);      /* Disable EEPROM programming */
 439         return 1;
 440 }
 441
 442 /***************************************************************************/
 443 static void setup_SCBs(struct orc_host * host)
 444 {
 445         struct orc_scb *scb;
 446         int i;
 447         struct orc_extended_scb *escb;
 448         dma_addr_t escb_phys;
 449
 450         /* Setup SCB base and SCB Size registers */
 451         outb(ORC_MAXQUEUE, host->base + ORC_SCBSIZE);   /* Total number of SCBs */
 452         /* SCB base address 0      */
 453         outl(host->scb_phys, host->base + ORC_SCBBASE0);
 454         /* SCB base address 1      */
 455         outl(host->scb_phys, host->base + ORC_SCBBASE1);
 456
 457         /* setup scatter list address with one buffer */
 458         scb = host->scb_virt;
 459         escb = host->escb_virt;
 460
 461         for (i = 0; i < ORC_MAXQUEUE; i++) {
 462                 escb_phys = (host->escb_phys + (sizeof(struct orc_extended_scb) * i));
 463                 scb->sg_addr = cpu_to_le32((u32) escb_phys);
 464                 scb->sense_addr = cpu_to_le32((u32) escb_phys);
 465                 scb->escb = escb;
 466                 scb->scbidx = i;
 467                 scb++;
 468                 escb++;
 469         }
 470 }
 471
 472 /**
 473  *      init_alloc_map          -       initialise allocation map
 474  *      @host: host map to configure
 475  *
 476  *      Initialise the allocation maps for this device. If the device
 477  *      is not quiescent the caller must hold the allocation lock
 478  */
 479
 480 static void init_alloc_map(struct orc_host * host)
 481 {
 482         u8 i, j;
 483
 484         for (i = 0; i < MAX_CHANNELS; i++) {
 485                 for (j = 0; j < 8; j++) {
 486                         host->allocation_map[i][j] = 0xffffffff;
 487                 }
 488         }
 489 }
 490
 491 /**
 492  *      init_orchid             -       initialise the host adapter
 493  *      @host:host adapter to initialise
 494  *
 495  *      Initialise the controller and if neccessary load the firmware.
 496  *
 497  *      Returns -1 if the initialisation fails.
 498  */
 499
 500 static int init_orchid(struct orc_host * host)
 501 {
 502         u8 *ptr;
 503         u16 revision;
 504         u8 i;
 505
 506         init_alloc_map(host);
 507         outb(0xFF, host->base + ORC_GIMSK);     /* Disable all interrupts */
 508
 509         if (inb(host->base + ORC_HSTUS) & RREADY) {     /* Orchid is ready */
 510                 revision = orc_read_fwrev(host);
 511                 if (revision == 0xFFFF) {
 512                         outb(DEVRST, host->base + ORC_HCTRL);   /* Reset Host Adapter   */
 513                         if (wait_chip_ready(host) == 0)
 514                                 return -1;
 515                         orc_load_firmware(host);        /* Download FW                  */
 516                         setup_SCBs(host);       /* Setup SCB base and SCB Size registers */
 517                         outb(0x00, host->base + ORC_HCTRL);     /* clear HOSTSTOP       */
 518                         if (wait_firmware_ready(host) == 0)
 519                                 return -1;
 520                         /* Wait for firmware ready     */
 521                 } else {
 522                         setup_SCBs(host);       /* Setup SCB base and SCB Size registers */
 523                 }
 524         } else {                /* Orchid is not Ready          */
 525                 outb(DEVRST, host->base + ORC_HCTRL);   /* Reset Host Adapter   */
 526                 if (wait_chip_ready(host) == 0)
 527                         return -1;
 528                 orc_load_firmware(host);        /* Download FW                  */
 529                 setup_SCBs(host);       /* Setup SCB base and SCB Size registers */
 530                 outb(HDO, host->base + ORC_HCTRL);      /* Do Hardware Reset &  */
 531
 532                 /*     clear HOSTSTOP  */
 533                 if (wait_firmware_ready(host) == 0)             /* Wait for firmware ready      */
 534                         return -1;
 535         }
 536
 537         /* Load an EEProm copy into RAM */
 538         /* Assumes single threaded at this point */
 539         read_eeprom(host);
 540
 541         if (nvramp->revision != 1)
 542                 return -1;
 543
 544         host->scsi_id = nvramp->scsi_id;
 545         host->BIOScfg = nvramp->BIOSConfig1;
 546         host->max_targets = MAX_TARGETS;
 547         ptr = (u8 *) & (nvramp->Target00Config);
 548         for (i = 0; i < 16; ptr++, i++) {
 549                 host->target_flag[i] = *ptr;
 550                 host->max_tags[i] = ORC_MAXTAGS;
 551         }
 552
 553         if (nvramp->SCSI0Config & NCC_BUSRESET)
 554                 host->flags |= HCF_SCSI_RESET;
 555         outb(0xFB, host->base + ORC_GIMSK);     /* enable RP FIFO interrupt     */
 556         return 0;
 557 }
 558
 559 /**
 560  *      orc_reset_scsi_bus              -       perform bus reset
 561  *      @host: host being reset
 562  *
 563  *      Perform a full bus reset on the adapter.
 564  */
 565
 566 static int orc_reset_scsi_bus(struct orc_host * host)
 567 {                               /* I need Host Control Block Information */
 568         unsigned long flags;
 569
 570         spin_lock_irqsave(&host->allocation_lock, flags);
 571
 572         init_alloc_map(host);
 573         /* reset scsi bus */
 574         outb(SCSIRST, host->base + ORC_HCTRL);
 575         /* FIXME: We can spend up to a second with the lock held and
 576            interrupts off here */
 577         if (wait_scsi_reset_done(host) == 0) {
 578                 spin_unlock_irqrestore(&host->allocation_lock, flags);
 579                 return FAILED;
 580         } else {
 581                 spin_unlock_irqrestore(&host->allocation_lock, flags);
 582                 return SUCCESS;
 583         }
 584 }
 585
 586 /**
 587  *      orc_device_reset        -       device reset handler
 588  *      @host: host to reset
 589  *      @cmd: command causing the reset
 590  *      @target; target device
 591  *
 592  *      Reset registers, reset a hanging bus and kill active and disconnected
 593  *      commands for target w/o soft reset
 594  */
 595
 596 static int orc_device_reset(struct orc_host * host, struct scsi_cmnd *cmd, unsigned int target)
 597 {                               /* I need Host Control Block Information */
 598         struct orc_scb *scb;
 599         struct orc_extended_scb *escb;
 600         struct orc_scb *host_scb;
 601         u8 i;
 602         unsigned long flags;
 603
 604         spin_lock_irqsave(&(host->allocation_lock), flags);
 605         scb = (struct orc_scb *) NULL;
 606         escb = (struct orc_extended_scb *) NULL;
 607
 608         /* setup scatter list address with one buffer */
 609         host_scb = host->scb_virt;
 610
 611         /* FIXME: is this safe if we then fail to issue the reset or race
 612            a completion ? */
 613         init_alloc_map(host);
 614
 615         /* Find the scb corresponding to the command */
 616         for (i = 0; i < ORC_MAXQUEUE; i++) {
 617                 escb = host_scb->escb;
 618                 if (host_scb->status && escb->srb == cmd)
 619                         break;
 620                 host_scb++;
 621         }
 622
 623         if (i == ORC_MAXQUEUE) {
 624                 printk(KERN_ERR "Unable to Reset - No SCB Found\n");
 625                 spin_unlock_irqrestore(&(host->allocation_lock), flags);
 626                 return FAILED;
 627         }
 628
 629         /* Allocate a new SCB for the reset command to the firmware */
 630         if ((scb = __orc_alloc_scb(host)) == NULL) {
 631                 /* Can't happen.. */
 632                 spin_unlock_irqrestore(&(host->allocation_lock), flags);
 633                 return FAILED;
 634         }
 635
 636         /* Reset device is handled by the firmare, we fill in an SCB and
 637            fire it at the controller, it does the rest */
 638         scb->opcode = ORC_BUSDEVRST;
 639         scb->target = target;
 640         scb->hastat = 0;
 641         scb->tastat = 0;
 642         scb->status = 0x0;
 643         scb->link = 0xFF;
 644         scb->reserved0 = 0;
 645         scb->reserved1 = 0;
 646         scb->xferlen = cpu_to_le32(0);
 647         scb->sg_len = cpu_to_le32(0);
 648
 649         escb->srb = NULL;
 650         escb->srb = cmd;
 651         orc_exec_scb(host, scb);        /* Start execute SCB            */
 652         spin_unlock_irqrestore(&host->allocation_lock, flags);
 653         return SUCCESS;
 654 }
 655
 656 /**
 657  *      __orc_alloc_scb         -               allocate an SCB
 658  *      @host: host to allocate from
 659  *
 660  *      Allocate an SCB and return a pointer to the SCB object. NULL
 661  *      is returned if no SCB is free. The caller must already hold
 662  *      the allocator lock at this point.
 663  */
 664
 665
 666 static struct orc_scb *__orc_alloc_scb(struct orc_host * host)
 667 {
 668         u8 channel;
 669         unsigned long idx;
 670         u8 index;
 671         u8 i;
 672
 673         channel = host->index;
 674         for (i = 0; i < 8; i++) {
 675                 for (index = 0; index < 32; index++) {
 676                         if ((host->allocation_map[channel][i] >> index) & 0x01) {
 677                                 host->allocation_map[channel][i] &= ~(1 << index);
 678                                 idx = index + 32 * i;
 679                                 /*
 680                                  * Translate the index to a structure instance
 681                                  */
 682                                 return host->scb_virt + idx;
 683                         }
 684                 }
 685         }
 686         return NULL;
 687 }
 688
 689 /**
 690  *      orc_alloc_scb           -               allocate an SCB
 691  *      @host: host to allocate from
 692  *
 693  *      Allocate an SCB and return a pointer to the SCB object. NULL
 694  *      is returned if no SCB is free.
 695  */
 696
 697 static struct orc_scb *orc_alloc_scb(struct orc_host * host)
 698 {
 699         struct orc_scb *scb;
 700         unsigned long flags;
 701
 702         spin_lock_irqsave(&host->allocation_lock, flags);
 703         scb = __orc_alloc_scb(host);
 704         spin_unlock_irqrestore(&host->allocation_lock, flags);
 705         return scb;
 706 }
 707
 708 /**
 709  *      orc_release_scb                 -       release an SCB
 710  *      @host: host owning the SCB
 711  *      @scb: SCB that is now free
 712  *
 713  *      Called to return a completed SCB to the allocation pool. Before
 714  *      calling the SCB must be out of use on both the host and the HA.
 715  */
 716
 717 static void orc_release_scb(struct orc_host *host, struct orc_scb *scb)
 718 {
 719         unsigned long flags;
 720         u8 index, i, channel;
 721
 722         spin_lock_irqsave(&(host->allocation_lock), flags);
 723         channel = host->index;  /* Channel */
 724         index = scb->scbidx;
 725         i = index / 32;
 726         index %= 32;
 727         host->allocation_map[channel][i] |= (1 << index);
 728         spin_unlock_irqrestore(&(host->allocation_lock), flags);
 729 }
 730
 731 /**
 732  *      orchid_abort_scb        -       abort a command
 733  *
 734  *      Abort a queued command that has been passed to the firmware layer
 735  *      if possible. This is all handled by the firmware. We aks the firmware
 736  *      and it either aborts the command or fails
 737  */
 738
 739 static int orchid_abort_scb(struct orc_host * host, struct orc_scb * scb)
 740 {
 741         unsigned char data, status;
 742
 743         outb(ORC_CMD_ABORT_SCB, host->base + ORC_HDATA);        /* Write command */
 744         outb(HDO, host->base + ORC_HCTRL);
 745         if (wait_HDO_off(host) == 0)    /* Wait HDO off   */
 746                 return 0;
 747
 748         outb(scb->scbidx, host->base + ORC_HDATA);      /* Write address */
 749         outb(HDO, host->base + ORC_HCTRL);
 750         if (wait_HDO_off(host) == 0)    /* Wait HDO off   */
 751                 return 0;
 752
 753         if (wait_hdi_set(host, &data) == 0)     /* Wait HDI set   */
 754                 return 0;
 755         status = inb(host->base + ORC_HDATA);
 756         outb(data, host->base + ORC_HSTUS);     /* Clear HDI    */
 757
 758         if (status == 1)        /* 0 - Successfully               */
 759                 return 0;       /* 1 - Fail                     */
 760         return 1;
 761 }
 762
 763 static int inia100_abort_cmd(struct orc_host * host, struct scsi_cmnd *cmd)
 764 {
 765         struct orc_extended_scb *escb;
 766         struct orc_scb *scb;
 767         u8 i;
 768         unsigned long flags;
 769
 770         spin_lock_irqsave(&(host->allocation_lock), flags);
 771
 772         scb = host->scb_virt;
 773
 774         /* Walk the queue until we find the SCB that belongs to the command
 775            block. This isn't a performance critical path so a walk in the park
 776            here does no harm */
 777
 778         for (i = 0; i < ORC_MAXQUEUE; i++, scb++) {
 779                 escb = scb->escb;
 780                 if (scb->status && escb->srb == cmd) {
 781                         if (scb->tag_msg == 0) {
 782                                 goto out;
 783                         } else {
 784                                 /* Issue an ABORT to the firmware */
 785                                 if (orchid_abort_scb(host, scb)) {
 786                                         escb->srb = NULL;
 787                                         spin_unlock_irqrestore(&host->allocation_lock, flags);
 788                                         return SUCCESS;
 789                                 } else
 790                                         goto out;
 791                         }
 792                 }
 793         }
 794 out:
 795         spin_unlock_irqrestore(&host->allocation_lock, flags);
 796         return FAILED;
 797 }
 798
 799 /**
 800  *      orc_interrupt           -       IRQ processing
 801  *      @host: Host causing the interrupt
 802  *
 803  *      This function is called from the IRQ handler and protected
 804  *      by the host lock. While the controller reports that there are
 805  *      scb's for processing we pull them off the controller, turn the
 806  *      index into a host address pointer to the scb and call the scb
 807  *      handler.
 808  *
 809  *      Returns IRQ_HANDLED if any SCBs were processed, IRQ_NONE otherwise
 810  */
 811
 812 static irqreturn_t orc_interrupt(struct orc_host * host)
 813 {
 814         u8 scb_index;
 815         struct orc_scb *scb;
 816
 817         /* Check if we have an SCB queued for servicing */
 818         if (inb(host->base + ORC_RQUEUECNT) == 0)
 819                 return IRQ_NONE;
 820
 821         do {
 822                 /* Get the SCB index of the SCB to service */
 823                 scb_index = inb(host->base + ORC_RQUEUE);
 824
 825                 /* Translate it back to a host pointer */
 826                 scb = (struct orc_scb *) ((unsigned long) host->scb_virt + (unsigned long) (sizeof(struct orc_scb) * scb_index));
 827                 scb->status = 0x0;
 828                 /* Process the SCB */
 829                 inia100_scb_handler(host, scb);
 830         } while (inb(host->base + ORC_RQUEUECNT));
 831         return IRQ_HANDLED;
 832 }                               /* End of I1060Interrupt() */
 833
 834 /**
 835  *      inia100_build_scb       -       build SCB
 836  *      @host: host owing the control block
 837  *      @scb: control block to use
 838  *      @cmd: Mid layer command
 839  *
 840  *      Build a host adapter control block from the SCSI mid layer command
 841  */
 842
 843 static void inia100_build_scb(struct orc_host * host, struct orc_scb * scb, struct scsi_cmnd * cmd)
 844 {                               /* Create corresponding SCB     */
 845         struct scatterlist *sg;
 846         struct orc_sgent *sgent;                /* Pointer to SG list           */
 847         int i, count_sg;
 848         struct orc_extended_scb *escb;
 849
 850         /* Links between the escb, scb and Linux scsi midlayer cmd */
 851         escb = scb->escb;
 852         escb->srb = cmd;
 853         sgent = NULL;
 854
 855         /* Set up the SCB to do a SCSI command block */
 856         scb->opcode = ORC_EXECSCSI;
 857         scb->flags = SCF_NO_DCHK;       /* Clear done bit               */
 858         scb->target = cmd->device->id;
 859         scb->lun = cmd->device->lun;
 860         scb->reserved0 = 0;
 861         scb->reserved1 = 0;
 862         scb->sg_len = cpu_to_le32(0);
 863
 864         scb->xferlen = cpu_to_le32((u32) scsi_bufflen(cmd));
 865         sgent = (struct orc_sgent *) & escb->sglist[0];
 866
 867         count_sg = scsi_dma_map(cmd);
 868         BUG_ON(count_sg < 0);
 869         BUG_ON(count_sg > TOTAL_SG_ENTRY);
 870
 871         /* Build the scatter gather lists */
 872         if (count_sg) {
 873                 scb->sg_len = cpu_to_le32((u32) (count_sg * 8));
 874                 scsi_for_each_sg(cmd, sg, count_sg, i) {
 875                         sgent->base = cpu_to_le32((u32) sg_dma_address(sg));
 876                         sgent->length = cpu_to_le32((u32) sg_dma_len(sg));
 877                         sgent++;
 878                 }
 879         } else {
 880                 scb->sg_len = cpu_to_le32(0);
 881                 sgent->base = cpu_to_le32(0);
 882                 sgent->length = cpu_to_le32(0);
 883         }
 884         scb->sg_addr = (u32) scb->sense_addr;   /* sense_addr is already little endian */
 885         scb->hastat = 0;
 886         scb->tastat = 0;
 887         scb->link = 0xFF;
 888         scb->sense_len = SENSE_SIZE;
 889         scb->cdb_len = cmd->cmd_len;
 890         if (scb->cdb_len >= IMAX_CDB) {
 891                 printk("max cdb length= %x\b", cmd->cmd_len);
 892                 scb->cdb_len = IMAX_CDB;
 893         }
 894         scb->ident = cmd->device->lun | DISC_ALLOW;
 895         if (cmd->device->tagged_supported) {    /* Tag Support                  */
 896                 scb->tag_msg = SIMPLE_QUEUE_TAG;        /* Do simple tag only   */
 897         } else {
 898                 scb->tag_msg = 0;       /* No tag support               */
 899         }
 900         memcpy(scb->cdb, cmd->cmnd, scb->cdb_len);
 901 }
 902
 903 /**
 904  *      inia100_queue           -       queue command with host
 905  *      @cmd: Command block
 906  *      @done: Completion function
 907  *
 908  *      Called by the mid layer to queue a command. Process the command
 909  *      block, build the host specific scb structures and if there is room
 910  *      queue the command down to the controller
 911  */
 912
 913 static int inia100_queue(struct scsi_cmnd * cmd, void (*done) (struct scsi_cmnd *))
 914 {
 915         struct orc_scb *scb;
 916         struct orc_host *host;          /* Point to Host adapter control block */
 917
 918         host = (struct orc_host *) cmd->device->host->hostdata;
 919         cmd->scsi_done = done;
 920         /* Get free SCSI control block  */
 921         if ((scb = orc_alloc_scb(host)) == NULL)
 922                 return SCSI_MLQUEUE_HOST_BUSY;
 923
 924         inia100_build_scb(host, scb, cmd);
 925         orc_exec_scb(host, scb);        /* Start execute SCB            */
 926         return 0;
 927 }
 928
 929 /*****************************************************************************
 930  Function name  : inia100_abort
 931  Description    : Abort a queued command.
 932                          (commands that are on the bus can't be aborted easily)
 933  Input          : host  -       Pointer to host adapter structure
 934  Output         : None.
 935  Return         : pSRB  -       Pointer to SCSI request block.
 936 *****************************************************************************/
 937 static int inia100_abort(struct scsi_cmnd * cmd)
 938 {
 939         struct orc_host *host;
 940
 941         host = (struct orc_host *) cmd->device->host->hostdata;
 942         return inia100_abort_cmd(host, cmd);
 943 }
 944
 945 /*****************************************************************************
 946  Function name  : inia100_reset
 947  Description    : Reset registers, reset a hanging bus and
 948                   kill active and disconnected commands for target w/o soft reset
 949  Input          : host  -       Pointer to host adapter structure
 950  Output         : None.
 951  Return         : pSRB  -       Pointer to SCSI request block.
 952 *****************************************************************************/
 953 static int inia100_bus_reset(struct scsi_cmnd * cmd)
 954 {                               /* I need Host Control Block Information */
 955         struct orc_host *host;
 956         host = (struct orc_host *) cmd->device->host->hostdata;
 957         return orc_reset_scsi_bus(host);
 958 }
 959
 960 /*****************************************************************************
 961  Function name  : inia100_device_reset
 962  Description    : Reset the device
 963  Input          : host  -       Pointer to host adapter structure
 964  Output         : None.
 965  Return         : pSRB  -       Pointer to SCSI request block.
 966 *****************************************************************************/
 967 static int inia100_device_reset(struct scsi_cmnd * cmd)
 968 {                               /* I need Host Control Block Information */
 969         struct orc_host *host;
 970         host = (struct orc_host *) cmd->device->host->hostdata;
 971         return orc_device_reset(host, cmd, scmd_id(cmd));
 972
 973 }
 974
 975 /**
 976  *      inia100_scb_handler     -       interrupt callback
 977  *      @host: Host causing the interrupt
 978  *      @scb: SCB the controller returned as needing processing
 979  *
 980  *      Perform completion processing on a control block. Do the conversions
 981  *      from host to SCSI midlayer error coding, save any sense data and
 982  *      the complete with the midlayer and recycle the scb.
 983  */
 984
 985 static void inia100_scb_handler(struct orc_host *host, struct orc_scb *scb)
 986 {
 987         struct scsi_cmnd *cmd;  /* Pointer to SCSI request block */
 988         struct orc_extended_scb *escb;
 989
 990         escb = scb->escb;
 991         if ((cmd = (struct scsi_cmnd *) escb->srb) == NULL) {
 992                 printk(KERN_ERR "inia100_scb_handler: SRB pointer is empty\n");
 993                 orc_release_scb(host, scb);     /* Release SCB for current channel */
 994                 return;
 995         }
 996         escb->srb = NULL;
 997
 998         switch (scb->hastat) {
 999         case 0x0:
1000         case 0xa:               /* Linked command complete without error and linked normally */
1001         case 0xb:               /* Linked command complete without error interrupt generated */
1002                 scb->hastat = 0;
1003                 break;
1004
1005         case 0x11:              /* Selection time out-The initiator selection or target
1006                                    reselection was not complete within the SCSI Time out period */
1007                 scb->hastat = DID_TIME_OUT;
1008                 break;
1009
1010         case 0x14:              /* Target bus phase sequence failure-An invalid bus phase or bus
1011                                    phase sequence was requested by the target. The host adapter
1012                                    will generate a SCSI Reset Condition, notifying the host with
1013                                    a SCRD interrupt */
1014                 scb->hastat = DID_RESET;
1015                 break;
1016
1017         case 0x1a:              /* SCB Aborted. 07/21/98 */
1018                 scb->hastat = DID_ABORT;
1019                 break;
1020
1021         case 0x12:              /* Data overrun/underrun-The target attempted to transfer more data
1022                                    than was allocated by the Data Length field or the sum of the
1023                                    Scatter / Gather Data Length fields. */
1024         case 0x13:              /* Unexpected bus free-The target dropped the SCSI BSY at an unexpected time. */
1025         case 0x16:              /* Invalid CCB Operation Code-The first byte of the CCB was invalid. */
1026
1027         default:
1028                 printk(KERN_DEBUG "inia100: %x %x\n", scb->hastat, scb->tastat);
1029                 scb->hastat = DID_ERROR;        /* Couldn't find any better */
1030                 break;
1031         }
1032
1033         if (scb->tastat == 2) { /* Check condition              */
1034                 memcpy((unsigned char *) &cmd->sense_buffer[0],
1035                    (unsigned char *) &escb->sglist[0], SENSE_SIZE);
1036         }
1037         cmd->result = scb->tastat | (scb->hastat << 16);
1038         scsi_dma_unmap(cmd);
1039         cmd->scsi_done(cmd);    /* Notify system DONE           */
1040         orc_release_scb(host, scb);     /* Release SCB for current channel */
1041 }
1042
1043 /**
1044  *      inia100_intr            -       interrupt handler
1045  *      @irqno: Interrupt value
1046  *      @devid: Host adapter
1047  *
1048  *      Entry point for IRQ handling. All the real work is performed
1049  *      by orc_interrupt.
1050  */
1051 static irqreturn_t inia100_intr(int irqno, void *devid)
1052 {
1053         struct Scsi_Host *shost = (struct Scsi_Host *)devid;
1054         struct orc_host *host = (struct orc_host *)shost->hostdata;
1055         unsigned long flags;
1056         irqreturn_t res;
1057
1058         spin_lock_irqsave(shost->host_lock, flags);
1059         res = orc_interrupt(host);
1060         spin_unlock_irqrestore(shost->host_lock, flags);
1061
1062         return res;
1063 }
1064
1065 static struct scsi_host_template inia100_template = {
1066         .proc_name              = "inia100",
1067         .name                   = inia100_REVID,
1068         .queuecommand           = inia100_queue,
1069         .eh_abort_handler       = inia100_abort,
1070         .eh_bus_reset_handler   = inia100_bus_reset,
1071         .eh_device_reset_handler = inia100_device_reset,
1072         .can_queue              = 1,
1073         .this_id                = 1,
1074         .sg_tablesize           = SG_ALL,
1075         .cmd_per_lun            = 1,
1076         .use_clustering         = ENABLE_CLUSTERING,
1077 };
1078
1079 static int __devinit inia100_probe_one(struct pci_dev *pdev,
1080                 const struct pci_device_id *id)
1081 {
1082         struct Scsi_Host *shost;
1083         struct orc_host *host;
1084         unsigned long port, bios;
1085         int error = -ENODEV;
1086         u32 sz;
1087         unsigned long biosaddr;
1088         char *bios_phys;
1089
1090         if (pci_enable_device(pdev))
1091                 goto out;
1092         if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1093                 printk(KERN_WARNING "Unable to set 32bit DMA "
1094                                     "on inia100 adapter, ignoring.\n");
1095                 goto out_disable_device;
1096         }
1097
1098         pci_set_master(pdev);
1099
1100         port = pci_resource_start(pdev, 0);
1101         if (!request_region(port, 256, "inia100")) {
1102                 printk(KERN_WARNING "inia100: io port 0x%lx, is busy.\n", port);
1103                 goto out_disable_device;
1104         }
1105
1106         /* <02> read from base address + 0x50 offset to get the bios value. */
1107         bios = inw(port + 0x50);
1108
1109
1110         shost = scsi_host_alloc(&inia100_template, sizeof(struct orc_host));
1111         if (!shost)
1112                 goto out_release_region;
1113
1114         host = (struct orc_host *)shost->hostdata;
1115         host->pdev = pdev;
1116         host->base = port;
1117         host->BIOScfg = bios;
1118         spin_lock_init(&host->allocation_lock);
1119
1120         /* Get total memory needed for SCB */
1121         sz = ORC_MAXQUEUE * sizeof(struct orc_scb);
1122         host->scb_virt = pci_alloc_consistent(pdev, sz,
1123                         &host->scb_phys);
1124         if (!host->scb_virt) {
1125                 printk("inia100: SCB memory allocation error\n");
1126                 goto out_host_put;
1127         }
1128         memset(host->scb_virt, 0, sz);
1129
1130         /* Get total memory needed for ESCB */
1131         sz = ORC_MAXQUEUE * sizeof(struct orc_extended_scb);
1132         host->escb_virt = pci_alloc_consistent(pdev, sz,
1133                         &host->escb_phys);
1134         if (!host->escb_virt) {
1135                 printk("inia100: ESCB memory allocation error\n");
1136                 goto out_free_scb_array;
1137         }
1138         memset(host->escb_virt, 0, sz);
1139
1140         biosaddr = host->BIOScfg;
1141         biosaddr = (biosaddr << 4);
1142         bios_phys = phys_to_virt(biosaddr);
1143         if (init_orchid(host)) {        /* Initialize orchid chip */
1144                 printk("inia100: initial orchid fail!!\n");
1145                 goto out_free_escb_array;
1146         }
1147
1148         shost->io_port = host->base;
1149         shost->n_io_port = 0xff;
1150         shost->can_queue = ORC_MAXQUEUE;
1151         shost->unique_id = shost->io_port;
1152         shost->max_id = host->max_targets;
1153         shost->max_lun = 16;
1154         shost->irq = pdev->irq;
1155         shost->this_id = host->scsi_id; /* Assign HCS index */
1156         shost->sg_tablesize = TOTAL_SG_ENTRY;
1157
1158         /* Initial orc chip           */
1159         error = request_irq(pdev->irq, inia100_intr, IRQF_SHARED,
1160                         "inia100", shost);
1161         if (error < 0) {
1162                 printk(KERN_WARNING "inia100: unable to get irq %d\n",
1163                                 pdev->irq);
1164                 goto out_free_escb_array;
1165         }
1166
1167         pci_set_drvdata(pdev, shost);
1168
1169         error = scsi_add_host(shost, &pdev->dev);
1170         if (error)
1171                 goto out_free_irq;
1172
1173         scsi_scan_host(shost);
1174         return 0;
1175
1176 out_free_irq:
1177         free_irq(shost->irq, shost);
1178 out_free_escb_array:
1179         pci_free_consistent(pdev, ORC_MAXQUEUE * sizeof(struct orc_extended_scb),
1180                         host->escb_virt, host->escb_phys);
1181 out_free_scb_array:
1182         pci_free_consistent(pdev, ORC_MAXQUEUE * sizeof(struct orc_scb),
1183                         host->scb_virt, host->scb_phys);
1184 out_host_put:
1185         scsi_host_put(shost);
1186 out_release_region:
1187         release_region(port, 256);
1188 out_disable_device:
1189         pci_disable_device(pdev);
1190 out:
1191         return error;
1192 }
1193
1194 static void __devexit inia100_remove_one(struct pci_dev *pdev)
1195 {
1196         struct Scsi_Host *shost = pci_get_drvdata(pdev);
1197         struct orc_host *host = (struct orc_host *)shost->hostdata;
1198
1199         scsi_remove_host(shost);
1200
1201         free_irq(shost->irq, shost);
1202         pci_free_consistent(pdev, ORC_MAXQUEUE * sizeof(struct orc_extended_scb),
1203                         host->escb_virt, host->escb_phys);
1204         pci_free_consistent(pdev, ORC_MAXQUEUE * sizeof(struct orc_scb),
1205                         host->scb_virt, host->scb_phys);
1206         release_region(shost->io_port, 256);
1207
1208         scsi_host_put(shost);
1209 }
1210
1211 static struct pci_device_id inia100_pci_tbl[] = {
1212         {PCI_VENDOR_ID_INIT, 0x1060, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1213         {0,}
1214 };
1215 MODULE_DEVICE_TABLE(pci, inia100_pci_tbl);
1216
1217 static struct pci_driver inia100_pci_driver = {
1218         .name           = "inia100",
1219         .id_table       = inia100_pci_tbl,
1220         .probe          = inia100_probe_one,
1221         .remove         = __devexit_p(inia100_remove_one),
1222 };
1223
1224 static int __init inia100_init(void)
1225 {
1226         return pci_register_driver(&inia100_pci_driver);
1227 }
1228
1229 static void __exit inia100_exit(void)
1230 {
1231         pci_unregister_driver(&inia100_pci_driver);
1232 }
1233
1234 MODULE_DESCRIPTION("Initio A100U2W SCSI driver");
1235 MODULE_AUTHOR("Initio Corporation");
1236 MODULE_LICENSE("Dual BSD/GPL");
1237
1238 module_init(inia100_init);
1239 module_exit(inia100_exit);