2 * drivers/s390/net/qeth_core_main.c
4 * Copyright IBM Corp. 2007
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
11 #include <linux/module.h>
12 #include <linux/moduleparam.h>
13 #include <linux/string.h>
14 #include <linux/errno.h>
15 #include <linux/kernel.h>
17 #include <linux/ipv6.h>
18 #include <linux/tcp.h>
19 #include <linux/mii.h>
20 #include <linux/kthread.h>
22 #include <asm/ebcdic.h>
24 #include <asm/s390_rdev.h>
26 #include "qeth_core.h"
27 #include "qeth_core_offl.h"
29 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
30 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
32 [QETH_DBF_SETUP] = {"qeth_setup",
33 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
34 [QETH_DBF_QERR] = {"qeth_qerr",
35 2, 1, 8, 2, &debug_hex_ascii_view, NULL},
36 [QETH_DBF_TRACE] = {"qeth_trace",
37 4, 1, 8, 3, &debug_hex_ascii_view, NULL},
38 [QETH_DBF_MSG] = {"qeth_msg",
39 8, 1, 128, 3, &debug_sprintf_view, NULL},
40 [QETH_DBF_SENSE] = {"qeth_sense",
41 2, 1, 64, 2, &debug_hex_ascii_view, NULL},
42 [QETH_DBF_MISC] = {"qeth_misc",
43 2, 1, 256, 2, &debug_hex_ascii_view, NULL},
44 [QETH_DBF_CTRL] = {"qeth_control",
45 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
47 EXPORT_SYMBOL_GPL(qeth_dbf);
49 struct qeth_card_list_struct qeth_core_card_list;
50 EXPORT_SYMBOL_GPL(qeth_core_card_list);
51 struct kmem_cache *qeth_core_header_cache;
52 EXPORT_SYMBOL_GPL(qeth_core_header_cache);
54 static struct device *qeth_core_root_dev;
55 static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
56 static struct lock_class_key qdio_out_skb_queue_key;
58 static void qeth_send_control_data_cb(struct qeth_channel *,
59 struct qeth_cmd_buffer *);
60 static int qeth_issue_next_read(struct qeth_card *);
61 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
62 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
63 static void qeth_free_buffer_pool(struct qeth_card *);
64 static int qeth_qdio_establish(struct qeth_card *);
67 static inline void __qeth_fill_buffer_frag(struct sk_buff *skb,
68 struct qdio_buffer *buffer, int is_tso,
69 int *next_element_to_fill)
71 struct skb_frag_struct *frag;
74 int element, cnt, dlen;
76 fragno = skb_shinfo(skb)->nr_frags;
77 element = *next_element_to_fill;
81 buffer->element[element].flags =
82 SBAL_FLAGS_MIDDLE_FRAG;
84 buffer->element[element].flags =
85 SBAL_FLAGS_FIRST_FRAG;
86 dlen = skb->len - skb->data_len;
88 buffer->element[element].addr = skb->data;
89 buffer->element[element].length = dlen;
92 for (cnt = 0; cnt < fragno; cnt++) {
93 frag = &skb_shinfo(skb)->frags[cnt];
94 addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
96 buffer->element[element].addr = (char *)addr;
97 buffer->element[element].length = frag->size;
98 if (cnt < (fragno - 1))
99 buffer->element[element].flags =
100 SBAL_FLAGS_MIDDLE_FRAG;
102 buffer->element[element].flags =
103 SBAL_FLAGS_LAST_FRAG;
106 *next_element_to_fill = element;
109 static inline const char *qeth_get_cardname(struct qeth_card *card)
111 if (card->info.guestlan) {
112 switch (card->info.type) {
113 case QETH_CARD_TYPE_OSAE:
114 return " Guest LAN QDIO";
115 case QETH_CARD_TYPE_IQD:
116 return " Guest LAN Hiper";
121 switch (card->info.type) {
122 case QETH_CARD_TYPE_OSAE:
123 return " OSD Express";
124 case QETH_CARD_TYPE_IQD:
125 return " HiperSockets";
126 case QETH_CARD_TYPE_OSN:
135 /* max length to be returned: 14 */
136 const char *qeth_get_cardname_short(struct qeth_card *card)
138 if (card->info.guestlan) {
139 switch (card->info.type) {
140 case QETH_CARD_TYPE_OSAE:
141 return "GuestLAN QDIO";
142 case QETH_CARD_TYPE_IQD:
143 return "GuestLAN Hiper";
148 switch (card->info.type) {
149 case QETH_CARD_TYPE_OSAE:
150 switch (card->info.link_type) {
151 case QETH_LINK_TYPE_FAST_ETH:
153 case QETH_LINK_TYPE_HSTR:
155 case QETH_LINK_TYPE_GBIT_ETH:
157 case QETH_LINK_TYPE_10GBIT_ETH:
159 case QETH_LINK_TYPE_LANE_ETH100:
160 return "OSD_FE_LANE";
161 case QETH_LINK_TYPE_LANE_TR:
162 return "OSD_TR_LANE";
163 case QETH_LINK_TYPE_LANE_ETH1000:
164 return "OSD_GbE_LANE";
165 case QETH_LINK_TYPE_LANE:
166 return "OSD_ATM_LANE";
168 return "OSD_Express";
170 case QETH_CARD_TYPE_IQD:
171 return "HiperSockets";
172 case QETH_CARD_TYPE_OSN:
181 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
182 int clear_start_mask)
186 spin_lock_irqsave(&card->thread_mask_lock, flags);
187 card->thread_allowed_mask = threads;
188 if (clear_start_mask)
189 card->thread_start_mask &= threads;
190 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
191 wake_up(&card->wait_q);
193 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
195 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
200 spin_lock_irqsave(&card->thread_mask_lock, flags);
201 rc = (card->thread_running_mask & threads);
202 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
205 EXPORT_SYMBOL_GPL(qeth_threads_running);
207 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
209 return wait_event_interruptible(card->wait_q,
210 qeth_threads_running(card, threads) == 0);
212 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
214 void qeth_clear_working_pool_list(struct qeth_card *card)
216 struct qeth_buffer_pool_entry *pool_entry, *tmp;
218 QETH_DBF_TEXT(TRACE, 5, "clwrklst");
219 list_for_each_entry_safe(pool_entry, tmp,
220 &card->qdio.in_buf_pool.entry_list, list){
221 list_del(&pool_entry->list);
224 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
226 static int qeth_alloc_buffer_pool(struct qeth_card *card)
228 struct qeth_buffer_pool_entry *pool_entry;
232 QETH_DBF_TEXT(TRACE, 5, "alocpool");
233 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
234 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
236 qeth_free_buffer_pool(card);
239 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
240 ptr = (void *) __get_free_page(GFP_KERNEL);
243 free_page((unsigned long)
244 pool_entry->elements[--j]);
246 qeth_free_buffer_pool(card);
249 pool_entry->elements[j] = ptr;
251 list_add(&pool_entry->init_list,
252 &card->qdio.init_pool.entry_list);
257 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
259 QETH_DBF_TEXT(TRACE, 2, "realcbp");
261 if ((card->state != CARD_STATE_DOWN) &&
262 (card->state != CARD_STATE_RECOVER))
265 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
266 qeth_clear_working_pool_list(card);
267 qeth_free_buffer_pool(card);
268 card->qdio.in_buf_pool.buf_count = bufcnt;
269 card->qdio.init_pool.buf_count = bufcnt;
270 return qeth_alloc_buffer_pool(card);
273 int qeth_set_large_send(struct qeth_card *card,
274 enum qeth_large_send_types type)
278 if (card->dev == NULL) {
279 card->options.large_send = type;
282 if (card->state == CARD_STATE_UP)
283 netif_tx_disable(card->dev);
284 card->options.large_send = type;
285 switch (card->options.large_send) {
286 case QETH_LARGE_SEND_EDDP:
287 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
290 case QETH_LARGE_SEND_TSO:
291 if (qeth_is_supported(card, IPA_OUTBOUND_TSO)) {
292 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
295 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
297 card->options.large_send = QETH_LARGE_SEND_NO;
301 default: /* includes QETH_LARGE_SEND_NO */
302 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
306 if (card->state == CARD_STATE_UP)
307 netif_wake_queue(card->dev);
310 EXPORT_SYMBOL_GPL(qeth_set_large_send);
312 static int qeth_issue_next_read(struct qeth_card *card)
315 struct qeth_cmd_buffer *iob;
317 QETH_DBF_TEXT(TRACE, 5, "issnxrd");
318 if (card->read.state != CH_STATE_UP)
320 iob = qeth_get_buffer(&card->read);
322 PRINT_WARN("issue_next_read failed: no iob available!\n");
325 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
326 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
327 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
330 PRINT_ERR("Error in starting next read ccw! rc=%i\n", rc);
331 atomic_set(&card->read.irq_pending, 0);
332 qeth_schedule_recovery(card);
333 wake_up(&card->wait_q);
338 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
340 struct qeth_reply *reply;
342 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
344 atomic_set(&reply->refcnt, 1);
345 atomic_set(&reply->received, 0);
351 static void qeth_get_reply(struct qeth_reply *reply)
353 WARN_ON(atomic_read(&reply->refcnt) <= 0);
354 atomic_inc(&reply->refcnt);
357 static void qeth_put_reply(struct qeth_reply *reply)
359 WARN_ON(atomic_read(&reply->refcnt) <= 0);
360 if (atomic_dec_and_test(&reply->refcnt))
364 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
365 struct qeth_card *card)
368 int com = cmd->hdr.command;
369 ipa_name = qeth_get_ipa_cmd_name(com);
371 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
372 ipa_name, com, QETH_CARD_IFNAME(card),
373 rc, qeth_get_ipa_msg(rc));
375 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
376 ipa_name, com, QETH_CARD_IFNAME(card));
379 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
380 struct qeth_cmd_buffer *iob)
382 struct qeth_ipa_cmd *cmd = NULL;
384 QETH_DBF_TEXT(TRACE, 5, "chkipad");
385 if (IS_IPA(iob->data)) {
386 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
387 if (IS_IPA_REPLY(cmd)) {
388 if (cmd->hdr.command < IPA_CMD_SETCCID ||
389 cmd->hdr.command > IPA_CMD_MODCCID)
390 qeth_issue_ipa_msg(cmd,
391 cmd->hdr.return_code, card);
394 switch (cmd->hdr.command) {
395 case IPA_CMD_STOPLAN:
396 PRINT_WARN("Link failure on %s (CHPID 0x%X) - "
397 "there is a network problem or "
398 "someone pulled the cable or "
399 "disabled the port.\n",
400 QETH_CARD_IFNAME(card),
402 card->lan_online = 0;
403 if (card->dev && netif_carrier_ok(card->dev))
404 netif_carrier_off(card->dev);
406 case IPA_CMD_STARTLAN:
407 PRINT_INFO("Link reestablished on %s "
408 "(CHPID 0x%X). Scheduling "
409 "IP address reset.\n",
410 QETH_CARD_IFNAME(card),
412 netif_carrier_on(card->dev);
413 card->lan_online = 1;
414 qeth_schedule_recovery(card);
416 case IPA_CMD_MODCCID:
418 case IPA_CMD_REGISTER_LOCAL_ADDR:
419 QETH_DBF_TEXT(TRACE, 3, "irla");
421 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
422 QETH_DBF_TEXT(TRACE, 3, "urla");
425 QETH_DBF_MESSAGE(2, "Received data is IPA "
426 "but not a reply!\n");
434 void qeth_clear_ipacmd_list(struct qeth_card *card)
436 struct qeth_reply *reply, *r;
439 QETH_DBF_TEXT(TRACE, 4, "clipalst");
441 spin_lock_irqsave(&card->lock, flags);
442 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
443 qeth_get_reply(reply);
445 atomic_inc(&reply->received);
446 list_del_init(&reply->list);
447 wake_up(&reply->wait_q);
448 qeth_put_reply(reply);
450 spin_unlock_irqrestore(&card->lock, flags);
452 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
454 static int qeth_check_idx_response(unsigned char *buffer)
459 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
460 if ((buffer[2] & 0xc0) == 0xc0) {
461 PRINT_WARN("received an IDX TERMINATE "
462 "with cause code 0x%02x%s\n",
464 ((buffer[4] == 0x22) ?
465 " -- try another portname" : ""));
466 QETH_DBF_TEXT(TRACE, 2, "ckidxres");
467 QETH_DBF_TEXT(TRACE, 2, " idxterm");
468 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
474 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
477 struct qeth_card *card;
479 QETH_DBF_TEXT(TRACE, 4, "setupccw");
480 card = CARD_FROM_CDEV(channel->ccwdev);
481 if (channel == &card->read)
482 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
484 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
485 channel->ccw.count = len;
486 channel->ccw.cda = (__u32) __pa(iob);
489 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
493 QETH_DBF_TEXT(TRACE, 6, "getbuff");
494 index = channel->io_buf_no;
496 if (channel->iob[index].state == BUF_STATE_FREE) {
497 channel->iob[index].state = BUF_STATE_LOCKED;
498 channel->io_buf_no = (channel->io_buf_no + 1) %
500 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
501 return channel->iob + index;
503 index = (index + 1) % QETH_CMD_BUFFER_NO;
504 } while (index != channel->io_buf_no);
509 void qeth_release_buffer(struct qeth_channel *channel,
510 struct qeth_cmd_buffer *iob)
514 QETH_DBF_TEXT(TRACE, 6, "relbuff");
515 spin_lock_irqsave(&channel->iob_lock, flags);
516 memset(iob->data, 0, QETH_BUFSIZE);
517 iob->state = BUF_STATE_FREE;
518 iob->callback = qeth_send_control_data_cb;
520 spin_unlock_irqrestore(&channel->iob_lock, flags);
522 EXPORT_SYMBOL_GPL(qeth_release_buffer);
524 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
526 struct qeth_cmd_buffer *buffer = NULL;
529 spin_lock_irqsave(&channel->iob_lock, flags);
530 buffer = __qeth_get_buffer(channel);
531 spin_unlock_irqrestore(&channel->iob_lock, flags);
535 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
537 struct qeth_cmd_buffer *buffer;
538 wait_event(channel->wait_q,
539 ((buffer = qeth_get_buffer(channel)) != NULL));
542 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
544 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
548 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
549 qeth_release_buffer(channel, &channel->iob[cnt]);
551 channel->io_buf_no = 0;
553 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
555 static void qeth_send_control_data_cb(struct qeth_channel *channel,
556 struct qeth_cmd_buffer *iob)
558 struct qeth_card *card;
559 struct qeth_reply *reply, *r;
560 struct qeth_ipa_cmd *cmd;
564 QETH_DBF_TEXT(TRACE, 4, "sndctlcb");
566 card = CARD_FROM_CDEV(channel->ccwdev);
567 if (qeth_check_idx_response(iob->data)) {
568 qeth_clear_ipacmd_list(card);
569 qeth_schedule_recovery(card);
573 cmd = qeth_check_ipa_data(card, iob);
574 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
576 /*in case of OSN : check if cmd is set */
577 if (card->info.type == QETH_CARD_TYPE_OSN &&
579 cmd->hdr.command != IPA_CMD_STARTLAN &&
580 card->osn_info.assist_cb != NULL) {
581 card->osn_info.assist_cb(card->dev, cmd);
585 spin_lock_irqsave(&card->lock, flags);
586 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
587 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
588 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
589 qeth_get_reply(reply);
590 list_del_init(&reply->list);
591 spin_unlock_irqrestore(&card->lock, flags);
593 if (reply->callback != NULL) {
595 reply->offset = (__u16)((char *)cmd -
597 keep_reply = reply->callback(card,
601 keep_reply = reply->callback(card,
606 reply->rc = (u16) cmd->hdr.return_code;
610 spin_lock_irqsave(&card->lock, flags);
611 list_add_tail(&reply->list,
612 &card->cmd_waiter_list);
613 spin_unlock_irqrestore(&card->lock, flags);
615 atomic_inc(&reply->received);
616 wake_up(&reply->wait_q);
618 qeth_put_reply(reply);
622 spin_unlock_irqrestore(&card->lock, flags);
624 memcpy(&card->seqno.pdu_hdr_ack,
625 QETH_PDU_HEADER_SEQ_NO(iob->data),
627 qeth_release_buffer(channel, iob);
630 static int qeth_setup_channel(struct qeth_channel *channel)
634 QETH_DBF_TEXT(SETUP, 2, "setupch");
635 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
636 channel->iob[cnt].data = (char *)
637 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
638 if (channel->iob[cnt].data == NULL)
640 channel->iob[cnt].state = BUF_STATE_FREE;
641 channel->iob[cnt].channel = channel;
642 channel->iob[cnt].callback = qeth_send_control_data_cb;
643 channel->iob[cnt].rc = 0;
645 if (cnt < QETH_CMD_BUFFER_NO) {
647 kfree(channel->iob[cnt].data);
651 channel->io_buf_no = 0;
652 atomic_set(&channel->irq_pending, 0);
653 spin_lock_init(&channel->iob_lock);
655 init_waitqueue_head(&channel->wait_q);
659 static int qeth_set_thread_start_bit(struct qeth_card *card,
660 unsigned long thread)
664 spin_lock_irqsave(&card->thread_mask_lock, flags);
665 if (!(card->thread_allowed_mask & thread) ||
666 (card->thread_start_mask & thread)) {
667 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
670 card->thread_start_mask |= thread;
671 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
675 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
679 spin_lock_irqsave(&card->thread_mask_lock, flags);
680 card->thread_start_mask &= ~thread;
681 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
682 wake_up(&card->wait_q);
684 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
686 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
690 spin_lock_irqsave(&card->thread_mask_lock, flags);
691 card->thread_running_mask &= ~thread;
692 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
693 wake_up(&card->wait_q);
695 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
697 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
702 spin_lock_irqsave(&card->thread_mask_lock, flags);
703 if (card->thread_start_mask & thread) {
704 if ((card->thread_allowed_mask & thread) &&
705 !(card->thread_running_mask & thread)) {
707 card->thread_start_mask &= ~thread;
708 card->thread_running_mask |= thread;
712 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
716 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
720 wait_event(card->wait_q,
721 (rc = __qeth_do_run_thread(card, thread)) >= 0);
724 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
726 void qeth_schedule_recovery(struct qeth_card *card)
728 QETH_DBF_TEXT(TRACE, 2, "startrec");
729 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
730 schedule_work(&card->kernel_thread_starter);
732 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
734 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
739 sense = (char *) irb->ecw;
740 cstat = irb->scsw.cmd.cstat;
741 dstat = irb->scsw.cmd.dstat;
743 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
744 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
745 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
746 QETH_DBF_TEXT(TRACE, 2, "CGENCHK");
747 PRINT_WARN("check on device %s, dstat=x%x, cstat=x%x ",
748 dev_name(&cdev->dev), dstat, cstat);
749 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
754 if (dstat & DEV_STAT_UNIT_CHECK) {
755 if (sense[SENSE_RESETTING_EVENT_BYTE] &
756 SENSE_RESETTING_EVENT_FLAG) {
757 QETH_DBF_TEXT(TRACE, 2, "REVIND");
760 if (sense[SENSE_COMMAND_REJECT_BYTE] &
761 SENSE_COMMAND_REJECT_FLAG) {
762 QETH_DBF_TEXT(TRACE, 2, "CMDREJi");
765 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
766 QETH_DBF_TEXT(TRACE, 2, "AFFE");
769 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
770 QETH_DBF_TEXT(TRACE, 2, "ZEROSEN");
773 QETH_DBF_TEXT(TRACE, 2, "DGENCHK");
779 static long __qeth_check_irb_error(struct ccw_device *cdev,
780 unsigned long intparm, struct irb *irb)
785 switch (PTR_ERR(irb)) {
787 PRINT_WARN("i/o-error on device %s\n", dev_name(&cdev->dev));
788 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
789 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
792 PRINT_WARN("timeout on device %s\n", dev_name(&cdev->dev));
793 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
794 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT);
795 if (intparm == QETH_RCD_PARM) {
796 struct qeth_card *card = CARD_FROM_CDEV(cdev);
798 if (card && (card->data.ccwdev == cdev)) {
799 card->data.state = CH_STATE_DOWN;
800 wake_up(&card->wait_q);
805 PRINT_WARN("unknown error %ld on device %s\n", PTR_ERR(irb),
806 dev_name(&cdev->dev));
807 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
808 QETH_DBF_TEXT(TRACE, 2, " rc???");
813 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
818 struct qeth_cmd_buffer *buffer;
819 struct qeth_channel *channel;
820 struct qeth_card *card;
821 struct qeth_cmd_buffer *iob;
824 QETH_DBF_TEXT(TRACE, 5, "irq");
826 if (__qeth_check_irb_error(cdev, intparm, irb))
828 cstat = irb->scsw.cmd.cstat;
829 dstat = irb->scsw.cmd.dstat;
831 card = CARD_FROM_CDEV(cdev);
835 if (card->read.ccwdev == cdev) {
836 channel = &card->read;
837 QETH_DBF_TEXT(TRACE, 5, "read");
838 } else if (card->write.ccwdev == cdev) {
839 channel = &card->write;
840 QETH_DBF_TEXT(TRACE, 5, "write");
842 channel = &card->data;
843 QETH_DBF_TEXT(TRACE, 5, "data");
845 atomic_set(&channel->irq_pending, 0);
847 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
848 channel->state = CH_STATE_STOPPED;
850 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
851 channel->state = CH_STATE_HALTED;
853 /*let's wake up immediately on data channel*/
854 if ((channel == &card->data) && (intparm != 0) &&
855 (intparm != QETH_RCD_PARM))
858 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
859 QETH_DBF_TEXT(TRACE, 6, "clrchpar");
860 /* we don't have to handle this further */
863 if (intparm == QETH_HALT_CHANNEL_PARM) {
864 QETH_DBF_TEXT(TRACE, 6, "hltchpar");
865 /* we don't have to handle this further */
868 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
869 (dstat & DEV_STAT_UNIT_CHECK) ||
871 if (irb->esw.esw0.erw.cons) {
872 /* TODO: we should make this s390dbf */
873 PRINT_WARN("sense data available on channel %s.\n",
874 CHANNEL_ID(channel));
875 PRINT_WARN(" cstat 0x%X\n dstat 0x%X\n", cstat, dstat);
876 print_hex_dump(KERN_WARNING, "qeth: irb ",
877 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
878 print_hex_dump(KERN_WARNING, "qeth: sense data ",
879 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
881 if (intparm == QETH_RCD_PARM) {
882 channel->state = CH_STATE_DOWN;
885 rc = qeth_get_problem(cdev, irb);
887 qeth_clear_ipacmd_list(card);
888 qeth_schedule_recovery(card);
893 if (intparm == QETH_RCD_PARM) {
894 channel->state = CH_STATE_RCD_DONE;
898 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
899 buffer->state = BUF_STATE_PROCESSED;
901 if (channel == &card->data)
903 if (channel == &card->read &&
904 channel->state == CH_STATE_UP)
905 qeth_issue_next_read(card);
908 index = channel->buf_no;
909 while (iob[index].state == BUF_STATE_PROCESSED) {
910 if (iob[index].callback != NULL)
911 iob[index].callback(channel, iob + index);
913 index = (index + 1) % QETH_CMD_BUFFER_NO;
915 channel->buf_no = index;
917 wake_up(&card->wait_q);
921 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
922 struct qeth_qdio_out_buffer *buf)
927 /* is PCI flag set on buffer? */
928 if (buf->buffer->element[0].flags & 0x40)
929 atomic_dec(&queue->set_pci_flags_count);
931 skb = skb_dequeue(&buf->skb_list);
933 atomic_dec(&skb->users);
934 dev_kfree_skb_any(skb);
935 skb = skb_dequeue(&buf->skb_list);
937 qeth_eddp_buf_release_contexts(buf);
938 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
939 if (buf->buffer->element[i].addr && buf->is_header[i])
940 kmem_cache_free(qeth_core_header_cache,
941 buf->buffer->element[i].addr);
942 buf->is_header[i] = 0;
943 buf->buffer->element[i].length = 0;
944 buf->buffer->element[i].addr = NULL;
945 buf->buffer->element[i].flags = 0;
947 buf->next_element_to_fill = 0;
948 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
951 void qeth_clear_qdio_buffers(struct qeth_card *card)
955 QETH_DBF_TEXT(TRACE, 2, "clearqdbf");
956 /* clear outbound buffers to free skbs */
957 for (i = 0; i < card->qdio.no_out_queues; ++i)
958 if (card->qdio.out_qs[i]) {
959 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
960 qeth_clear_output_buffer(card->qdio.out_qs[i],
961 &card->qdio.out_qs[i]->bufs[j]);
964 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
966 static void qeth_free_buffer_pool(struct qeth_card *card)
968 struct qeth_buffer_pool_entry *pool_entry, *tmp;
970 QETH_DBF_TEXT(TRACE, 5, "freepool");
971 list_for_each_entry_safe(pool_entry, tmp,
972 &card->qdio.init_pool.entry_list, init_list){
973 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
974 free_page((unsigned long)pool_entry->elements[i]);
975 list_del(&pool_entry->init_list);
980 static void qeth_free_qdio_buffers(struct qeth_card *card)
984 QETH_DBF_TEXT(TRACE, 2, "freeqdbf");
985 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
986 QETH_QDIO_UNINITIALIZED)
988 kfree(card->qdio.in_q);
989 card->qdio.in_q = NULL;
990 /* inbound buffer pool */
991 qeth_free_buffer_pool(card);
992 /* free outbound qdio_qs */
993 if (card->qdio.out_qs) {
994 for (i = 0; i < card->qdio.no_out_queues; ++i) {
995 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
996 qeth_clear_output_buffer(card->qdio.out_qs[i],
997 &card->qdio.out_qs[i]->bufs[j]);
998 kfree(card->qdio.out_qs[i]);
1000 kfree(card->qdio.out_qs);
1001 card->qdio.out_qs = NULL;
1005 static void qeth_clean_channel(struct qeth_channel *channel)
1009 QETH_DBF_TEXT(SETUP, 2, "freech");
1010 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1011 kfree(channel->iob[cnt].data);
1014 static int qeth_is_1920_device(struct qeth_card *card)
1016 int single_queue = 0;
1017 struct ccw_device *ccwdev;
1018 struct channelPath_dsc {
1029 QETH_DBF_TEXT(SETUP, 2, "chk_1920");
1031 ccwdev = card->data.ccwdev;
1032 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1033 if (chp_dsc != NULL) {
1034 /* CHPP field bit 6 == 1 -> single queue */
1035 single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
1038 QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue);
1039 return single_queue;
1042 static void qeth_init_qdio_info(struct qeth_card *card)
1044 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1045 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1047 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1048 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1049 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1050 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1051 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1054 static void qeth_set_intial_options(struct qeth_card *card)
1056 card->options.route4.type = NO_ROUTER;
1057 card->options.route6.type = NO_ROUTER;
1058 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1059 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1060 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1061 card->options.fake_broadcast = 0;
1062 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1063 card->options.fake_ll = 0;
1064 card->options.performance_stats = 0;
1065 card->options.rx_sg_cb = QETH_RX_SG_CB;
1068 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1070 unsigned long flags;
1073 spin_lock_irqsave(&card->thread_mask_lock, flags);
1074 QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x",
1075 (u8) card->thread_start_mask,
1076 (u8) card->thread_allowed_mask,
1077 (u8) card->thread_running_mask);
1078 rc = (card->thread_start_mask & thread);
1079 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1083 static void qeth_start_kernel_thread(struct work_struct *work)
1085 struct qeth_card *card = container_of(work, struct qeth_card,
1086 kernel_thread_starter);
1087 QETH_DBF_TEXT(TRACE , 2, "strthrd");
1089 if (card->read.state != CH_STATE_UP &&
1090 card->write.state != CH_STATE_UP)
1092 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1093 kthread_run(card->discipline.recover, (void *) card,
1097 static int qeth_setup_card(struct qeth_card *card)
1100 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1101 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1103 card->read.state = CH_STATE_DOWN;
1104 card->write.state = CH_STATE_DOWN;
1105 card->data.state = CH_STATE_DOWN;
1106 card->state = CARD_STATE_DOWN;
1107 card->lan_online = 0;
1108 card->use_hard_stop = 0;
1110 spin_lock_init(&card->vlanlock);
1111 spin_lock_init(&card->mclock);
1112 card->vlangrp = NULL;
1113 spin_lock_init(&card->lock);
1114 spin_lock_init(&card->ip_lock);
1115 spin_lock_init(&card->thread_mask_lock);
1116 card->thread_start_mask = 0;
1117 card->thread_allowed_mask = 0;
1118 card->thread_running_mask = 0;
1119 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1120 INIT_LIST_HEAD(&card->ip_list);
1121 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1122 if (!card->ip_tbd_list) {
1123 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1126 INIT_LIST_HEAD(card->ip_tbd_list);
1127 INIT_LIST_HEAD(&card->cmd_waiter_list);
1128 init_waitqueue_head(&card->wait_q);
1129 /* intial options */
1130 qeth_set_intial_options(card);
1131 /* IP address takeover */
1132 INIT_LIST_HEAD(&card->ipato.entries);
1133 card->ipato.enabled = 0;
1134 card->ipato.invert4 = 0;
1135 card->ipato.invert6 = 0;
1136 /* init QDIO stuff */
1137 qeth_init_qdio_info(card);
1141 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1143 struct qeth_card *card = container_of(slr, struct qeth_card,
1144 qeth_service_level);
1145 seq_printf(m, "qeth: %s firmware level %s\n", CARD_BUS_ID(card),
1146 card->info.mcl_level);
1149 static struct qeth_card *qeth_alloc_card(void)
1151 struct qeth_card *card;
1153 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1154 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1157 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1158 if (qeth_setup_channel(&card->read)) {
1162 if (qeth_setup_channel(&card->write)) {
1163 qeth_clean_channel(&card->read);
1167 card->options.layer2 = -1;
1168 card->qeth_service_level.seq_print = qeth_core_sl_print;
1169 register_service_level(&card->qeth_service_level);
1173 static int qeth_determine_card_type(struct qeth_card *card)
1177 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1179 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1180 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1181 while (known_devices[i][4]) {
1182 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) &&
1183 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) {
1184 card->info.type = known_devices[i][4];
1185 card->qdio.no_out_queues = known_devices[i][8];
1186 card->info.is_multicast_different = known_devices[i][9];
1187 if (qeth_is_1920_device(card)) {
1188 PRINT_INFO("Priority Queueing not able "
1189 "due to hardware limitations!\n");
1190 card->qdio.no_out_queues = 1;
1191 card->qdio.default_out_queue = 0;
1197 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1198 PRINT_ERR("unknown card type on device %s\n", CARD_BUS_ID(card));
1202 static int qeth_clear_channel(struct qeth_channel *channel)
1204 unsigned long flags;
1205 struct qeth_card *card;
1208 QETH_DBF_TEXT(TRACE, 3, "clearch");
1209 card = CARD_FROM_CDEV(channel->ccwdev);
1210 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1211 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1212 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1216 rc = wait_event_interruptible_timeout(card->wait_q,
1217 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1218 if (rc == -ERESTARTSYS)
1220 if (channel->state != CH_STATE_STOPPED)
1222 channel->state = CH_STATE_DOWN;
1226 static int qeth_halt_channel(struct qeth_channel *channel)
1228 unsigned long flags;
1229 struct qeth_card *card;
1232 QETH_DBF_TEXT(TRACE, 3, "haltch");
1233 card = CARD_FROM_CDEV(channel->ccwdev);
1234 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1235 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1236 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1240 rc = wait_event_interruptible_timeout(card->wait_q,
1241 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1242 if (rc == -ERESTARTSYS)
1244 if (channel->state != CH_STATE_HALTED)
1249 static int qeth_halt_channels(struct qeth_card *card)
1251 int rc1 = 0, rc2 = 0, rc3 = 0;
1253 QETH_DBF_TEXT(TRACE, 3, "haltchs");
1254 rc1 = qeth_halt_channel(&card->read);
1255 rc2 = qeth_halt_channel(&card->write);
1256 rc3 = qeth_halt_channel(&card->data);
1264 static int qeth_clear_channels(struct qeth_card *card)
1266 int rc1 = 0, rc2 = 0, rc3 = 0;
1268 QETH_DBF_TEXT(TRACE, 3, "clearchs");
1269 rc1 = qeth_clear_channel(&card->read);
1270 rc2 = qeth_clear_channel(&card->write);
1271 rc3 = qeth_clear_channel(&card->data);
1279 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1283 QETH_DBF_TEXT(TRACE, 3, "clhacrd");
1284 QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *));
1287 rc = qeth_halt_channels(card);
1290 return qeth_clear_channels(card);
1293 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1297 QETH_DBF_TEXT(TRACE, 3, "qdioclr");
1298 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1299 QETH_QDIO_CLEANING)) {
1300 case QETH_QDIO_ESTABLISHED:
1301 if (card->info.type == QETH_CARD_TYPE_IQD)
1302 rc = qdio_cleanup(CARD_DDEV(card),
1303 QDIO_FLAG_CLEANUP_USING_HALT);
1305 rc = qdio_cleanup(CARD_DDEV(card),
1306 QDIO_FLAG_CLEANUP_USING_CLEAR);
1308 QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc);
1309 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1311 case QETH_QDIO_CLEANING:
1316 rc = qeth_clear_halt_card(card, use_halt);
1318 QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc);
1319 card->state = CARD_STATE_DOWN;
1322 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1324 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1330 struct qeth_channel *channel = &card->data;
1331 unsigned long flags;
1334 * scan for RCD command in extended SenseID data
1336 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1337 if (!ciw || ciw->cmd == 0)
1339 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1343 channel->ccw.cmd_code = ciw->cmd;
1344 channel->ccw.cda = (__u32) __pa(rcd_buf);
1345 channel->ccw.count = ciw->count;
1346 channel->ccw.flags = CCW_FLAG_SLI;
1347 channel->state = CH_STATE_RCD;
1348 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1349 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1350 QETH_RCD_PARM, LPM_ANYPATH, 0,
1352 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1354 wait_event(card->wait_q,
1355 (channel->state == CH_STATE_RCD_DONE ||
1356 channel->state == CH_STATE_DOWN));
1357 if (channel->state == CH_STATE_DOWN)
1360 channel->state = CH_STATE_DOWN;
1366 *length = ciw->count;
1372 static int qeth_get_unitaddr(struct qeth_card *card)
1378 QETH_DBF_TEXT(SETUP, 2, "getunit");
1379 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
1381 PRINT_ERR("qeth_read_conf_data for device %s returned %i\n",
1382 CARD_DDEV_ID(card), rc);
1385 card->info.chpid = prcd[30];
1386 card->info.unit_addr2 = prcd[31];
1387 card->info.cula = prcd[63];
1388 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1389 (prcd[0x11] == _ascebc['M']));
1394 static void qeth_init_tokens(struct qeth_card *card)
1396 card->token.issuer_rm_w = 0x00010103UL;
1397 card->token.cm_filter_w = 0x00010108UL;
1398 card->token.cm_connection_w = 0x0001010aUL;
1399 card->token.ulp_filter_w = 0x0001010bUL;
1400 card->token.ulp_connection_w = 0x0001010dUL;
1403 static void qeth_init_func_level(struct qeth_card *card)
1405 if (card->ipato.enabled) {
1406 if (card->info.type == QETH_CARD_TYPE_IQD)
1407 card->info.func_level =
1408 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT;
1410 card->info.func_level =
1411 QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT;
1413 if (card->info.type == QETH_CARD_TYPE_IQD)
1414 /*FIXME:why do we have same values for dis and ena for
1416 card->info.func_level =
1417 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT;
1419 card->info.func_level =
1420 QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT;
1424 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1425 void (*idx_reply_cb)(struct qeth_channel *,
1426 struct qeth_cmd_buffer *))
1428 struct qeth_cmd_buffer *iob;
1429 unsigned long flags;
1431 struct qeth_card *card;
1433 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1434 card = CARD_FROM_CDEV(channel->ccwdev);
1435 iob = qeth_get_buffer(channel);
1436 iob->callback = idx_reply_cb;
1437 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1438 channel->ccw.count = QETH_BUFSIZE;
1439 channel->ccw.cda = (__u32) __pa(iob->data);
1441 wait_event(card->wait_q,
1442 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1443 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1444 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1445 rc = ccw_device_start(channel->ccwdev,
1446 &channel->ccw, (addr_t) iob, 0, 0);
1447 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1450 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1451 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1452 atomic_set(&channel->irq_pending, 0);
1453 wake_up(&card->wait_q);
1456 rc = wait_event_interruptible_timeout(card->wait_q,
1457 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1458 if (rc == -ERESTARTSYS)
1460 if (channel->state != CH_STATE_UP) {
1462 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1463 qeth_clear_cmd_buffers(channel);
1469 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1470 void (*idx_reply_cb)(struct qeth_channel *,
1471 struct qeth_cmd_buffer *))
1473 struct qeth_card *card;
1474 struct qeth_cmd_buffer *iob;
1475 unsigned long flags;
1479 struct ccw_dev_id temp_devid;
1481 card = CARD_FROM_CDEV(channel->ccwdev);
1483 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1485 iob = qeth_get_buffer(channel);
1486 iob->callback = idx_reply_cb;
1487 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1488 channel->ccw.count = IDX_ACTIVATE_SIZE;
1489 channel->ccw.cda = (__u32) __pa(iob->data);
1490 if (channel == &card->write) {
1491 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1492 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1493 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1494 card->seqno.trans_hdr++;
1496 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1497 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1498 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1500 tmp = ((__u8)card->info.portno) | 0x80;
1501 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1502 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1503 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1504 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1505 &card->info.func_level, sizeof(__u16));
1506 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1507 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1508 temp = (card->info.cula << 8) + card->info.unit_addr2;
1509 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1511 wait_event(card->wait_q,
1512 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1513 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1514 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1515 rc = ccw_device_start(channel->ccwdev,
1516 &channel->ccw, (addr_t) iob, 0, 0);
1517 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1520 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1522 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1523 atomic_set(&channel->irq_pending, 0);
1524 wake_up(&card->wait_q);
1527 rc = wait_event_interruptible_timeout(card->wait_q,
1528 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1529 if (rc == -ERESTARTSYS)
1531 if (channel->state != CH_STATE_ACTIVATING) {
1532 PRINT_WARN("IDX activate timed out!\n");
1533 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1534 qeth_clear_cmd_buffers(channel);
1537 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1540 static int qeth_peer_func_level(int level)
1542 if ((level & 0xff) == 8)
1543 return (level & 0xff) + 0x400;
1544 if (((level >> 8) & 3) == 1)
1545 return (level & 0xff) + 0x200;
1549 static void qeth_idx_write_cb(struct qeth_channel *channel,
1550 struct qeth_cmd_buffer *iob)
1552 struct qeth_card *card;
1555 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1557 if (channel->state == CH_STATE_DOWN) {
1558 channel->state = CH_STATE_ACTIVATING;
1561 card = CARD_FROM_CDEV(channel->ccwdev);
1563 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1564 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1565 PRINT_ERR("IDX_ACTIVATE on write channel device %s: "
1566 "adapter exclusively used by another host\n",
1567 CARD_WDEV_ID(card));
1569 PRINT_ERR("IDX_ACTIVATE on write channel device %s: "
1570 "negative reply\n", CARD_WDEV_ID(card));
1573 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1574 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1575 PRINT_WARN("IDX_ACTIVATE on write channel device %s: "
1576 "function level mismatch "
1577 "(sent: 0x%x, received: 0x%x)\n",
1578 CARD_WDEV_ID(card), card->info.func_level, temp);
1581 channel->state = CH_STATE_UP;
1583 qeth_release_buffer(channel, iob);
1586 static void qeth_idx_read_cb(struct qeth_channel *channel,
1587 struct qeth_cmd_buffer *iob)
1589 struct qeth_card *card;
1592 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1593 if (channel->state == CH_STATE_DOWN) {
1594 channel->state = CH_STATE_ACTIVATING;
1598 card = CARD_FROM_CDEV(channel->ccwdev);
1599 if (qeth_check_idx_response(iob->data))
1602 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1603 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1604 PRINT_ERR("IDX_ACTIVATE on read channel device %s: "
1605 "adapter exclusively used by another host\n",
1606 CARD_RDEV_ID(card));
1608 PRINT_ERR("IDX_ACTIVATE on read channel device %s: "
1609 "negative reply\n", CARD_RDEV_ID(card));
1614 * temporary fix for microcode bug
1615 * to revert it,replace OR by AND
1617 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1618 (card->info.type == QETH_CARD_TYPE_OSAE))
1619 card->info.portname_required = 1;
1621 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1622 if (temp != qeth_peer_func_level(card->info.func_level)) {
1623 PRINT_WARN("IDX_ACTIVATE on read channel device %s: function "
1624 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1625 CARD_RDEV_ID(card), card->info.func_level, temp);
1628 memcpy(&card->token.issuer_rm_r,
1629 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1630 QETH_MPC_TOKEN_LENGTH);
1631 memcpy(&card->info.mcl_level[0],
1632 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1633 channel->state = CH_STATE_UP;
1635 qeth_release_buffer(channel, iob);
1638 void qeth_prepare_control_data(struct qeth_card *card, int len,
1639 struct qeth_cmd_buffer *iob)
1641 qeth_setup_ccw(&card->write, iob->data, len);
1642 iob->callback = qeth_release_buffer;
1644 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1645 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1646 card->seqno.trans_hdr++;
1647 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1648 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1649 card->seqno.pdu_hdr++;
1650 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1651 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1652 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1654 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1656 int qeth_send_control_data(struct qeth_card *card, int len,
1657 struct qeth_cmd_buffer *iob,
1658 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1663 unsigned long flags;
1664 struct qeth_reply *reply = NULL;
1665 unsigned long timeout;
1667 QETH_DBF_TEXT(TRACE, 2, "sendctl");
1669 reply = qeth_alloc_reply(card);
1673 reply->callback = reply_cb;
1674 reply->param = reply_param;
1675 if (card->state == CARD_STATE_DOWN)
1676 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1678 reply->seqno = card->seqno.ipa++;
1679 init_waitqueue_head(&reply->wait_q);
1680 spin_lock_irqsave(&card->lock, flags);
1681 list_add_tail(&reply->list, &card->cmd_waiter_list);
1682 spin_unlock_irqrestore(&card->lock, flags);
1683 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1685 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1686 qeth_prepare_control_data(card, len, iob);
1688 if (IS_IPA(iob->data))
1689 timeout = jiffies + QETH_IPA_TIMEOUT;
1691 timeout = jiffies + QETH_TIMEOUT;
1693 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
1694 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1695 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1696 (addr_t) iob, 0, 0);
1697 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1699 PRINT_WARN("qeth_send_control_data: "
1700 "ccw_device_start rc = %i\n", rc);
1701 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
1702 spin_lock_irqsave(&card->lock, flags);
1703 list_del_init(&reply->list);
1704 qeth_put_reply(reply);
1705 spin_unlock_irqrestore(&card->lock, flags);
1706 qeth_release_buffer(iob->channel, iob);
1707 atomic_set(&card->write.irq_pending, 0);
1708 wake_up(&card->wait_q);
1711 while (!atomic_read(&reply->received)) {
1712 if (time_after(jiffies, timeout)) {
1713 spin_lock_irqsave(&reply->card->lock, flags);
1714 list_del_init(&reply->list);
1715 spin_unlock_irqrestore(&reply->card->lock, flags);
1717 atomic_inc(&reply->received);
1718 wake_up(&reply->wait_q);
1723 qeth_put_reply(reply);
1726 EXPORT_SYMBOL_GPL(qeth_send_control_data);
1728 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1731 struct qeth_cmd_buffer *iob;
1733 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
1735 iob = (struct qeth_cmd_buffer *) data;
1736 memcpy(&card->token.cm_filter_r,
1737 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1738 QETH_MPC_TOKEN_LENGTH);
1739 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1743 static int qeth_cm_enable(struct qeth_card *card)
1746 struct qeth_cmd_buffer *iob;
1748 QETH_DBF_TEXT(SETUP, 2, "cmenable");
1750 iob = qeth_wait_for_buffer(&card->write);
1751 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1752 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1753 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1754 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1755 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1757 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1758 qeth_cm_enable_cb, NULL);
1762 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1766 struct qeth_cmd_buffer *iob;
1768 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
1770 iob = (struct qeth_cmd_buffer *) data;
1771 memcpy(&card->token.cm_connection_r,
1772 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1773 QETH_MPC_TOKEN_LENGTH);
1774 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1778 static int qeth_cm_setup(struct qeth_card *card)
1781 struct qeth_cmd_buffer *iob;
1783 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
1785 iob = qeth_wait_for_buffer(&card->write);
1786 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1787 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1788 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1789 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1790 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1791 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1792 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1793 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1794 qeth_cm_setup_cb, NULL);
1799 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1801 switch (card->info.type) {
1802 case QETH_CARD_TYPE_UNKNOWN:
1804 case QETH_CARD_TYPE_IQD:
1805 return card->info.max_mtu;
1806 case QETH_CARD_TYPE_OSAE:
1807 switch (card->info.link_type) {
1808 case QETH_LINK_TYPE_HSTR:
1809 case QETH_LINK_TYPE_LANE_TR:
1819 static inline int qeth_get_max_mtu_for_card(int cardtype)
1823 case QETH_CARD_TYPE_UNKNOWN:
1824 case QETH_CARD_TYPE_OSAE:
1825 case QETH_CARD_TYPE_OSN:
1827 case QETH_CARD_TYPE_IQD:
1834 static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1837 case QETH_CARD_TYPE_IQD:
1844 static inline int qeth_get_mtu_outof_framesize(int framesize)
1846 switch (framesize) {
1860 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1862 switch (card->info.type) {
1863 case QETH_CARD_TYPE_OSAE:
1864 return ((mtu >= 576) && (mtu <= 61440));
1865 case QETH_CARD_TYPE_IQD:
1866 return ((mtu >= 576) &&
1867 (mtu <= card->info.max_mtu + 4096 - 32));
1868 case QETH_CARD_TYPE_OSN:
1869 case QETH_CARD_TYPE_UNKNOWN:
1875 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1879 __u16 mtu, framesize;
1882 struct qeth_cmd_buffer *iob;
1884 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
1886 iob = (struct qeth_cmd_buffer *) data;
1887 memcpy(&card->token.ulp_filter_r,
1888 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1889 QETH_MPC_TOKEN_LENGTH);
1890 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1891 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1892 mtu = qeth_get_mtu_outof_framesize(framesize);
1895 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1898 card->info.max_mtu = mtu;
1899 card->info.initial_mtu = mtu;
1900 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1902 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1903 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1904 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1907 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1908 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1910 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1911 card->info.link_type = link_type;
1913 card->info.link_type = 0;
1914 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1918 static int qeth_ulp_enable(struct qeth_card *card)
1922 struct qeth_cmd_buffer *iob;
1924 /*FIXME: trace view callbacks*/
1925 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
1927 iob = qeth_wait_for_buffer(&card->write);
1928 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1930 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1931 (__u8) card->info.portno;
1932 if (card->options.layer2)
1933 if (card->info.type == QETH_CARD_TYPE_OSN)
1934 prot_type = QETH_PROT_OSN2;
1936 prot_type = QETH_PROT_LAYER2;
1938 prot_type = QETH_PROT_TCPIP;
1940 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1941 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1942 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1943 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1944 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1945 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1946 card->info.portname, 9);
1947 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1948 qeth_ulp_enable_cb, NULL);
1953 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1956 struct qeth_cmd_buffer *iob;
1958 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
1960 iob = (struct qeth_cmd_buffer *) data;
1961 memcpy(&card->token.ulp_connection_r,
1962 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1963 QETH_MPC_TOKEN_LENGTH);
1964 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1968 static int qeth_ulp_setup(struct qeth_card *card)
1972 struct qeth_cmd_buffer *iob;
1973 struct ccw_dev_id dev_id;
1975 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
1977 iob = qeth_wait_for_buffer(&card->write);
1978 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
1980 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
1981 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1982 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
1983 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
1984 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
1985 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
1987 ccw_device_get_id(CARD_DDEV(card), &dev_id);
1988 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
1989 temp = (card->info.cula << 8) + card->info.unit_addr2;
1990 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
1991 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
1992 qeth_ulp_setup_cb, NULL);
1996 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2000 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2002 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2003 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2006 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
2008 if (!card->qdio.in_q)
2010 QETH_DBF_TEXT(SETUP, 2, "inq");
2011 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
2012 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2013 /* give inbound qeth_qdio_buffers their qdio_buffers */
2014 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2015 card->qdio.in_q->bufs[i].buffer =
2016 &card->qdio.in_q->qdio_bufs[i];
2017 /* inbound buffer pool */
2018 if (qeth_alloc_buffer_pool(card))
2022 kmalloc(card->qdio.no_out_queues *
2023 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2024 if (!card->qdio.out_qs)
2026 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2027 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
2029 if (!card->qdio.out_qs[i])
2031 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2032 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2033 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2034 card->qdio.out_qs[i]->queue_no = i;
2035 /* give outbound qeth_qdio_buffers their qdio_buffers */
2036 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2037 card->qdio.out_qs[i]->bufs[j].buffer =
2038 &card->qdio.out_qs[i]->qdio_bufs[j];
2039 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2042 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2043 &qdio_out_skb_queue_key);
2044 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2051 kfree(card->qdio.out_qs[--i]);
2052 kfree(card->qdio.out_qs);
2053 card->qdio.out_qs = NULL;
2055 qeth_free_buffer_pool(card);
2057 kfree(card->qdio.in_q);
2058 card->qdio.in_q = NULL;
2060 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2064 static void qeth_create_qib_param_field(struct qeth_card *card,
2068 param_field[0] = _ascebc['P'];
2069 param_field[1] = _ascebc['C'];
2070 param_field[2] = _ascebc['I'];
2071 param_field[3] = _ascebc['T'];
2072 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card);
2073 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card);
2074 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card);
2077 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2080 param_field[16] = _ascebc['B'];
2081 param_field[17] = _ascebc['L'];
2082 param_field[18] = _ascebc['K'];
2083 param_field[19] = _ascebc['T'];
2084 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total;
2085 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet;
2086 *((unsigned int *) (¶m_field[28])) =
2087 card->info.blkt.inter_packet_jumbo;
2090 static int qeth_qdio_activate(struct qeth_card *card)
2092 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2093 return qdio_activate(CARD_DDEV(card));
2096 static int qeth_dm_act(struct qeth_card *card)
2099 struct qeth_cmd_buffer *iob;
2101 QETH_DBF_TEXT(SETUP, 2, "dmact");
2103 iob = qeth_wait_for_buffer(&card->write);
2104 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2106 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2107 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2108 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2109 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2110 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2114 static int qeth_mpc_initialize(struct qeth_card *card)
2118 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2120 rc = qeth_issue_next_read(card);
2122 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2125 rc = qeth_cm_enable(card);
2127 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2130 rc = qeth_cm_setup(card);
2132 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2135 rc = qeth_ulp_enable(card);
2137 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2140 rc = qeth_ulp_setup(card);
2142 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2145 rc = qeth_alloc_qdio_buffers(card);
2147 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2150 rc = qeth_qdio_establish(card);
2152 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2153 qeth_free_qdio_buffers(card);
2156 rc = qeth_qdio_activate(card);
2158 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2161 rc = qeth_dm_act(card);
2163 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2169 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2173 static void qeth_print_status_with_portname(struct qeth_card *card)
2178 sprintf(dbf_text, "%s", card->info.portname + 1);
2179 for (i = 0; i < 8; i++)
2181 (char) _ebcasc[(__u8) dbf_text[i]];
2183 PRINT_INFO("Device %s/%s/%s is a%s card%s%s%s\n"
2184 "with link type %s (portname: %s)\n",
2188 qeth_get_cardname(card),
2189 (card->info.mcl_level[0]) ? " (level: " : "",
2190 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2191 (card->info.mcl_level[0]) ? ")" : "",
2192 qeth_get_cardname_short(card),
2197 static void qeth_print_status_no_portname(struct qeth_card *card)
2199 if (card->info.portname[0])
2200 PRINT_INFO("Device %s/%s/%s is a%s "
2201 "card%s%s%s\nwith link type %s "
2202 "(no portname needed by interface).\n",
2206 qeth_get_cardname(card),
2207 (card->info.mcl_level[0]) ? " (level: " : "",
2208 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2209 (card->info.mcl_level[0]) ? ")" : "",
2210 qeth_get_cardname_short(card));
2212 PRINT_INFO("Device %s/%s/%s is a%s "
2213 "card%s%s%s\nwith link type %s.\n",
2217 qeth_get_cardname(card),
2218 (card->info.mcl_level[0]) ? " (level: " : "",
2219 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2220 (card->info.mcl_level[0]) ? ")" : "",
2221 qeth_get_cardname_short(card));
2224 void qeth_print_status_message(struct qeth_card *card)
2226 switch (card->info.type) {
2227 case QETH_CARD_TYPE_OSAE:
2228 /* VM will use a non-zero first character
2229 * to indicate a HiperSockets like reporting
2230 * of the level OSA sets the first character to zero
2232 if (!card->info.mcl_level[0]) {
2233 sprintf(card->info.mcl_level, "%02x%02x",
2234 card->info.mcl_level[2],
2235 card->info.mcl_level[3]);
2237 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2241 case QETH_CARD_TYPE_IQD:
2242 if (card->info.guestlan) {
2243 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2244 card->info.mcl_level[0]];
2245 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2246 card->info.mcl_level[1]];
2247 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2248 card->info.mcl_level[2]];
2249 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2250 card->info.mcl_level[3]];
2251 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2255 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2257 if (card->info.portname_required)
2258 qeth_print_status_with_portname(card);
2260 qeth_print_status_no_portname(card);
2262 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2264 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2266 struct qeth_buffer_pool_entry *entry;
2268 QETH_DBF_TEXT(TRACE, 5, "inwrklst");
2270 list_for_each_entry(entry,
2271 &card->qdio.init_pool.entry_list, init_list) {
2272 qeth_put_buffer_pool_entry(card, entry);
2276 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2277 struct qeth_card *card)
2279 struct list_head *plh;
2280 struct qeth_buffer_pool_entry *entry;
2284 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2287 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2288 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2290 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2291 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2297 list_del_init(&entry->list);
2302 /* no free buffer in pool so take first one and swap pages */
2303 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2304 struct qeth_buffer_pool_entry, list);
2305 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2306 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2307 page = alloc_page(GFP_ATOMIC);
2311 free_page((unsigned long)entry->elements[i]);
2312 entry->elements[i] = page_address(page);
2313 if (card->options.performance_stats)
2314 card->perf_stats.sg_alloc_page_rx++;
2318 list_del_init(&entry->list);
2322 static int qeth_init_input_buffer(struct qeth_card *card,
2323 struct qeth_qdio_buffer *buf)
2325 struct qeth_buffer_pool_entry *pool_entry;
2328 pool_entry = qeth_find_free_buffer_pool_entry(card);
2333 * since the buffer is accessed only from the input_tasklet
2334 * there shouldn't be a need to synchronize; also, since we use
2335 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2338 BUG_ON(!pool_entry);
2340 buf->pool_entry = pool_entry;
2341 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2342 buf->buffer->element[i].length = PAGE_SIZE;
2343 buf->buffer->element[i].addr = pool_entry->elements[i];
2344 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2345 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2347 buf->buffer->element[i].flags = 0;
2352 int qeth_init_qdio_queues(struct qeth_card *card)
2357 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2360 memset(card->qdio.in_q->qdio_bufs, 0,
2361 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2362 qeth_initialize_working_pool_list(card);
2363 /*give only as many buffers to hardware as we have buffer pool entries*/
2364 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2365 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2366 card->qdio.in_q->next_buf_to_init =
2367 card->qdio.in_buf_pool.buf_count - 1;
2368 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2369 card->qdio.in_buf_pool.buf_count - 1);
2371 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2374 /* outbound queue */
2375 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2376 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2377 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2378 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2379 qeth_clear_output_buffer(card->qdio.out_qs[i],
2380 &card->qdio.out_qs[i]->bufs[j]);
2382 card->qdio.out_qs[i]->card = card;
2383 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2384 card->qdio.out_qs[i]->do_pack = 0;
2385 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2386 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2387 atomic_set(&card->qdio.out_qs[i]->state,
2388 QETH_OUT_Q_UNLOCKED);
2392 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2394 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2396 switch (link_type) {
2397 case QETH_LINK_TYPE_HSTR:
2404 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2405 struct qeth_ipa_cmd *cmd, __u8 command,
2406 enum qeth_prot_versions prot)
2408 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2409 cmd->hdr.command = command;
2410 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2411 cmd->hdr.seqno = card->seqno.ipa;
2412 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2413 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2414 if (card->options.layer2)
2415 cmd->hdr.prim_version_no = 2;
2417 cmd->hdr.prim_version_no = 1;
2418 cmd->hdr.param_count = 1;
2419 cmd->hdr.prot_version = prot;
2420 cmd->hdr.ipa_supported = 0;
2421 cmd->hdr.ipa_enabled = 0;
2424 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2425 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2427 struct qeth_cmd_buffer *iob;
2428 struct qeth_ipa_cmd *cmd;
2430 iob = qeth_wait_for_buffer(&card->write);
2431 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2432 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2436 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2438 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2441 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2442 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2443 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2444 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2446 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2448 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2449 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2456 QETH_DBF_TEXT(TRACE, 4, "sendipa");
2458 if (card->options.layer2)
2459 if (card->info.type == QETH_CARD_TYPE_OSN)
2460 prot_type = QETH_PROT_OSN2;
2462 prot_type = QETH_PROT_LAYER2;
2464 prot_type = QETH_PROT_TCPIP;
2465 qeth_prepare_ipa_cmd(card, iob, prot_type);
2466 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2467 iob, reply_cb, reply_param);
2470 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2472 static int qeth_send_startstoplan(struct qeth_card *card,
2473 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2476 struct qeth_cmd_buffer *iob;
2478 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2479 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2484 int qeth_send_startlan(struct qeth_card *card)
2488 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2490 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2493 EXPORT_SYMBOL_GPL(qeth_send_startlan);
2495 int qeth_send_stoplan(struct qeth_card *card)
2500 * TODO: according to the IPA format document page 14,
2501 * TCP/IP (we!) never issue a STOPLAN
2504 QETH_DBF_TEXT(SETUP, 2, "stoplan");
2506 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2509 EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2511 int qeth_default_setadapterparms_cb(struct qeth_card *card,
2512 struct qeth_reply *reply, unsigned long data)
2514 struct qeth_ipa_cmd *cmd;
2516 QETH_DBF_TEXT(TRACE, 4, "defadpcb");
2518 cmd = (struct qeth_ipa_cmd *) data;
2519 if (cmd->hdr.return_code == 0)
2520 cmd->hdr.return_code =
2521 cmd->data.setadapterparms.hdr.return_code;
2524 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2526 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2527 struct qeth_reply *reply, unsigned long data)
2529 struct qeth_ipa_cmd *cmd;
2531 QETH_DBF_TEXT(TRACE, 3, "quyadpcb");
2533 cmd = (struct qeth_ipa_cmd *) data;
2534 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f)
2535 card->info.link_type =
2536 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2537 card->options.adp.supported_funcs =
2538 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2539 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2542 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2543 __u32 command, __u32 cmdlen)
2545 struct qeth_cmd_buffer *iob;
2546 struct qeth_ipa_cmd *cmd;
2548 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2550 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2551 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2552 cmd->data.setadapterparms.hdr.command_code = command;
2553 cmd->data.setadapterparms.hdr.used_total = 1;
2554 cmd->data.setadapterparms.hdr.seq_no = 1;
2558 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2560 int qeth_query_setadapterparms(struct qeth_card *card)
2563 struct qeth_cmd_buffer *iob;
2565 QETH_DBF_TEXT(TRACE, 3, "queryadp");
2566 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2567 sizeof(struct qeth_ipacmd_setadpparms));
2568 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2571 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2573 int qeth_check_qdio_errors(struct qdio_buffer *buf, unsigned int qdio_error,
2574 const char *dbftext)
2577 QETH_DBF_TEXT(TRACE, 2, dbftext);
2578 QETH_DBF_TEXT(QERR, 2, dbftext);
2579 QETH_DBF_TEXT_(QERR, 2, " F15=%02X",
2580 buf->element[15].flags & 0xff);
2581 QETH_DBF_TEXT_(QERR, 2, " F14=%02X",
2582 buf->element[14].flags & 0xff);
2583 QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error);
2588 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2590 void qeth_queue_input_buffer(struct qeth_card *card, int index)
2592 struct qeth_qdio_q *queue = card->qdio.in_q;
2598 count = (index < queue->next_buf_to_init)?
2599 card->qdio.in_buf_pool.buf_count -
2600 (queue->next_buf_to_init - index) :
2601 card->qdio.in_buf_pool.buf_count -
2602 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2603 /* only requeue at a certain threshold to avoid SIGAs */
2604 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2605 for (i = queue->next_buf_to_init;
2606 i < queue->next_buf_to_init + count; ++i) {
2607 if (qeth_init_input_buffer(card,
2608 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2615 if (newcount < count) {
2616 /* we are in memory shortage so we switch back to
2617 traditional skb allocation and drop packages */
2618 atomic_set(&card->force_alloc_skb, 3);
2621 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2625 * according to old code it should be avoided to requeue all
2626 * 128 buffers in order to benefit from PCI avoidance.
2627 * this function keeps at least one buffer (the buffer at
2628 * 'index') un-requeued -> this buffer is the first buffer that
2629 * will be requeued the next time
2631 if (card->options.performance_stats) {
2632 card->perf_stats.inbound_do_qdio_cnt++;
2633 card->perf_stats.inbound_do_qdio_start_time =
2636 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
2637 queue->next_buf_to_init, count);
2638 if (card->options.performance_stats)
2639 card->perf_stats.inbound_do_qdio_time +=
2641 card->perf_stats.inbound_do_qdio_start_time;
2643 PRINT_WARN("qeth_queue_input_buffer's do_QDIO "
2644 "return %i (device %s).\n",
2645 rc, CARD_DDEV_ID(card));
2646 QETH_DBF_TEXT(TRACE, 2, "qinberr");
2647 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2649 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2650 QDIO_MAX_BUFFERS_PER_Q;
2653 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2655 static int qeth_handle_send_error(struct qeth_card *card,
2656 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
2658 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
2659 int cc = qdio_err & 3;
2661 QETH_DBF_TEXT(TRACE, 6, "hdsnderr");
2662 qeth_check_qdio_errors(buffer->buffer, qdio_err, "qouterr");
2666 QETH_DBF_TEXT(TRACE, 1, "lnkfail");
2667 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2668 QETH_DBF_TEXT_(TRACE, 1, "%04x %02x",
2669 (u16)qdio_err, (u8)sbalf15);
2670 return QETH_SEND_ERROR_LINK_FAILURE;
2672 return QETH_SEND_ERROR_NONE;
2674 if (qdio_err & QDIO_ERROR_SIGA_BUSY) {
2675 QETH_DBF_TEXT(TRACE, 1, "SIGAcc2B");
2676 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2677 return QETH_SEND_ERROR_KICK_IT;
2679 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2680 return QETH_SEND_ERROR_RETRY;
2681 return QETH_SEND_ERROR_LINK_FAILURE;
2682 /* look at qdio_error and sbalf 15 */
2684 QETH_DBF_TEXT(TRACE, 1, "SIGAcc1");
2685 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2686 return QETH_SEND_ERROR_LINK_FAILURE;
2689 QETH_DBF_TEXT(TRACE, 1, "SIGAcc3");
2690 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2691 return QETH_SEND_ERROR_KICK_IT;
2696 * Switched to packing state if the number of used buffers on a queue
2697 * reaches a certain limit.
2699 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2701 if (!queue->do_pack) {
2702 if (atomic_read(&queue->used_buffers)
2703 >= QETH_HIGH_WATERMARK_PACK){
2704 /* switch non-PACKING -> PACKING */
2705 QETH_DBF_TEXT(TRACE, 6, "np->pack");
2706 if (queue->card->options.performance_stats)
2707 queue->card->perf_stats.sc_dp_p++;
2714 * Switches from packing to non-packing mode. If there is a packing
2715 * buffer on the queue this buffer will be prepared to be flushed.
2716 * In that case 1 is returned to inform the caller. If no buffer
2717 * has to be flushed, zero is returned.
2719 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2721 struct qeth_qdio_out_buffer *buffer;
2722 int flush_count = 0;
2724 if (queue->do_pack) {
2725 if (atomic_read(&queue->used_buffers)
2726 <= QETH_LOW_WATERMARK_PACK) {
2727 /* switch PACKING -> non-PACKING */
2728 QETH_DBF_TEXT(TRACE, 6, "pack->np");
2729 if (queue->card->options.performance_stats)
2730 queue->card->perf_stats.sc_p_dp++;
2732 /* flush packing buffers */
2733 buffer = &queue->bufs[queue->next_buf_to_fill];
2734 if ((atomic_read(&buffer->state) ==
2735 QETH_QDIO_BUF_EMPTY) &&
2736 (buffer->next_element_to_fill > 0)) {
2737 atomic_set(&buffer->state,
2738 QETH_QDIO_BUF_PRIMED);
2740 queue->next_buf_to_fill =
2741 (queue->next_buf_to_fill + 1) %
2742 QDIO_MAX_BUFFERS_PER_Q;
2750 * Called to flush a packing buffer if no more pci flags are on the queue.
2751 * Checks if there is a packing buffer and prepares it to be flushed.
2752 * In that case returns 1, otherwise zero.
2754 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2756 struct qeth_qdio_out_buffer *buffer;
2758 buffer = &queue->bufs[queue->next_buf_to_fill];
2759 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2760 (buffer->next_element_to_fill > 0)) {
2761 /* it's a packing buffer */
2762 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2763 queue->next_buf_to_fill =
2764 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2770 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
2773 struct qeth_qdio_out_buffer *buf;
2776 unsigned int qdio_flags;
2778 for (i = index; i < index + count; ++i) {
2779 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2780 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2781 SBAL_FLAGS_LAST_ENTRY;
2783 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2786 if (!queue->do_pack) {
2787 if ((atomic_read(&queue->used_buffers) >=
2788 (QETH_HIGH_WATERMARK_PACK -
2789 QETH_WATERMARK_PACK_FUZZ)) &&
2790 !atomic_read(&queue->set_pci_flags_count)) {
2791 /* it's likely that we'll go to packing
2793 atomic_inc(&queue->set_pci_flags_count);
2794 buf->buffer->element[0].flags |= 0x40;
2797 if (!atomic_read(&queue->set_pci_flags_count)) {
2799 * there's no outstanding PCI any more, so we
2800 * have to request a PCI to be sure the the PCI
2801 * will wake at some time in the future then we
2802 * can flush packed buffers that might still be
2803 * hanging around, which can happen if no
2804 * further send was requested by the stack
2806 atomic_inc(&queue->set_pci_flags_count);
2807 buf->buffer->element[0].flags |= 0x40;
2812 queue->card->dev->trans_start = jiffies;
2813 if (queue->card->options.performance_stats) {
2814 queue->card->perf_stats.outbound_do_qdio_cnt++;
2815 queue->card->perf_stats.outbound_do_qdio_start_time =
2818 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
2819 if (atomic_read(&queue->set_pci_flags_count))
2820 qdio_flags |= QDIO_FLAG_PCI_OUT;
2821 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
2822 queue->queue_no, index, count);
2823 if (queue->card->options.performance_stats)
2824 queue->card->perf_stats.outbound_do_qdio_time +=
2826 queue->card->perf_stats.outbound_do_qdio_start_time;
2828 QETH_DBF_TEXT(TRACE, 2, "flushbuf");
2829 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
2830 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card));
2831 queue->card->stats.tx_errors += count;
2832 /* this must not happen under normal circumstances. if it
2833 * happens something is really wrong -> recover */
2834 qeth_schedule_recovery(queue->card);
2837 atomic_add(count, &queue->used_buffers);
2838 if (queue->card->options.performance_stats)
2839 queue->card->perf_stats.bufs_sent += count;
2842 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2846 int q_was_packing = 0;
2849 * check if weed have to switch to non-packing mode or if
2850 * we have to get a pci flag out on the queue
2852 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2853 !atomic_read(&queue->set_pci_flags_count)) {
2854 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2855 QETH_OUT_Q_UNLOCKED) {
2857 * If we get in here, there was no action in
2858 * do_send_packet. So, we check if there is a
2859 * packing buffer to be flushed here.
2861 netif_stop_queue(queue->card->dev);
2862 index = queue->next_buf_to_fill;
2863 q_was_packing = queue->do_pack;
2864 /* queue->do_pack may change */
2866 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2868 !atomic_read(&queue->set_pci_flags_count))
2870 qeth_flush_buffers_on_no_pci(queue);
2871 if (queue->card->options.performance_stats &&
2873 queue->card->perf_stats.bufs_sent_pack +=
2876 qeth_flush_buffers(queue, index, flush_cnt);
2877 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2882 void qeth_qdio_output_handler(struct ccw_device *ccwdev,
2883 unsigned int qdio_error, int __queue, int first_element,
2884 int count, unsigned long card_ptr)
2886 struct qeth_card *card = (struct qeth_card *) card_ptr;
2887 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2888 struct qeth_qdio_out_buffer *buffer;
2891 QETH_DBF_TEXT(TRACE, 6, "qdouhdl");
2892 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
2893 QETH_DBF_TEXT(TRACE, 2, "achkcond");
2894 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2895 netif_stop_queue(card->dev);
2896 qeth_schedule_recovery(card);
2899 if (card->options.performance_stats) {
2900 card->perf_stats.outbound_handler_cnt++;
2901 card->perf_stats.outbound_handler_start_time =
2904 for (i = first_element; i < (first_element + count); ++i) {
2905 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2906 /*we only handle the KICK_IT error by doing a recovery */
2907 if (qeth_handle_send_error(card, buffer, qdio_error)
2908 == QETH_SEND_ERROR_KICK_IT){
2909 netif_stop_queue(card->dev);
2910 qeth_schedule_recovery(card);
2913 qeth_clear_output_buffer(queue, buffer);
2915 atomic_sub(count, &queue->used_buffers);
2916 /* check if we need to do something on this outbound queue */
2917 if (card->info.type != QETH_CARD_TYPE_IQD)
2918 qeth_check_outbound_queue(queue);
2920 netif_wake_queue(queue->card->dev);
2921 if (card->options.performance_stats)
2922 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2923 card->perf_stats.outbound_handler_start_time;
2925 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2927 int qeth_get_cast_type(struct qeth_card *card, struct sk_buff *skb)
2929 int cast_type = RTN_UNSPEC;
2931 if (card->info.type == QETH_CARD_TYPE_OSN)
2934 if (skb->dst && skb->dst->neighbour) {
2935 cast_type = skb->dst->neighbour->type;
2936 if ((cast_type == RTN_BROADCAST) ||
2937 (cast_type == RTN_MULTICAST) ||
2938 (cast_type == RTN_ANYCAST))
2943 /* try something else */
2944 if (skb->protocol == ETH_P_IPV6)
2945 return (skb_network_header(skb)[24] == 0xff) ?
2947 else if (skb->protocol == ETH_P_IP)
2948 return ((skb_network_header(skb)[16] & 0xf0) == 0xe0) ?
2951 if (!memcmp(skb->data, skb->dev->broadcast, 6))
2952 return RTN_BROADCAST;
2956 hdr_mac = *((u16 *)skb->data);
2958 switch (card->info.link_type) {
2959 case QETH_LINK_TYPE_HSTR:
2960 case QETH_LINK_TYPE_LANE_TR:
2961 if ((hdr_mac == QETH_TR_MAC_NC) ||
2962 (hdr_mac == QETH_TR_MAC_C))
2963 return RTN_MULTICAST;
2965 /* eth or so multicast? */
2967 if ((hdr_mac == QETH_ETH_MAC_V4) ||
2968 (hdr_mac == QETH_ETH_MAC_V6))
2969 return RTN_MULTICAST;
2974 EXPORT_SYMBOL_GPL(qeth_get_cast_type);
2976 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
2977 int ipv, int cast_type)
2979 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE))
2980 return card->qdio.default_out_queue;
2981 switch (card->qdio.no_out_queues) {
2983 if (cast_type && card->info.is_multicast_different)
2984 return card->info.is_multicast_different &
2985 (card->qdio.no_out_queues - 1);
2986 if (card->qdio.do_prio_queueing && (ipv == 4)) {
2987 const u8 tos = ip_hdr(skb)->tos;
2989 if (card->qdio.do_prio_queueing ==
2990 QETH_PRIO_Q_ING_TOS) {
2991 if (tos & IP_TOS_NOTIMPORTANT)
2993 if (tos & IP_TOS_HIGHRELIABILITY)
2995 if (tos & IP_TOS_HIGHTHROUGHPUT)
2997 if (tos & IP_TOS_LOWDELAY)
3000 if (card->qdio.do_prio_queueing ==
3001 QETH_PRIO_Q_ING_PREC)
3002 return 3 - (tos >> 6);
3003 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3006 return card->qdio.default_out_queue;
3007 case 1: /* fallthrough for single-out-queue 1920-device */
3009 return card->qdio.default_out_queue;
3012 EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3014 int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3015 struct sk_buff *skb, int elems)
3017 int elements_needed = 0;
3019 if (skb_shinfo(skb)->nr_frags > 0)
3020 elements_needed = (skb_shinfo(skb)->nr_frags + 1);
3021 if (elements_needed == 0)
3022 elements_needed = 1 + (((((unsigned long) skb->data) %
3023 PAGE_SIZE) + skb->len) >> PAGE_SHIFT);
3024 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
3025 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
3026 "(Number=%d / Length=%d). Discarded.\n",
3027 (elements_needed+elems), skb->len);
3030 return elements_needed;
3032 EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3034 static inline void __qeth_fill_buffer(struct sk_buff *skb,
3035 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3038 int length = skb->len;
3044 element = *next_element_to_fill;
3046 first_lap = (is_tso == 0 ? 1 : 0);
3049 data = skb->data + offset;
3054 while (length > 0) {
3055 /* length_here is the remaining amount of data in this page */
3056 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3057 if (length < length_here)
3058 length_here = length;
3060 buffer->element[element].addr = data;
3061 buffer->element[element].length = length_here;
3062 length -= length_here;
3065 buffer->element[element].flags = 0;
3067 buffer->element[element].flags =
3068 SBAL_FLAGS_LAST_FRAG;
3071 buffer->element[element].flags =
3072 SBAL_FLAGS_FIRST_FRAG;
3074 buffer->element[element].flags =
3075 SBAL_FLAGS_MIDDLE_FRAG;
3077 data += length_here;
3081 *next_element_to_fill = element;
3084 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3085 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3086 struct qeth_hdr *hdr, int offset, int hd_len)
3088 struct qdio_buffer *buffer;
3089 int flush_cnt = 0, hdr_len, large_send = 0;
3091 buffer = buf->buffer;
3092 atomic_inc(&skb->users);
3093 skb_queue_tail(&buf->skb_list, skb);
3095 /*check first on TSO ....*/
3096 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3097 int element = buf->next_element_to_fill;
3099 hdr_len = sizeof(struct qeth_hdr_tso) +
3100 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
3101 /*fill first buffer entry only with header information */
3102 buffer->element[element].addr = skb->data;
3103 buffer->element[element].length = hdr_len;
3104 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3105 buf->next_element_to_fill++;
3106 skb->data += hdr_len;
3107 skb->len -= hdr_len;
3112 int element = buf->next_element_to_fill;
3113 buffer->element[element].addr = hdr;
3114 buffer->element[element].length = sizeof(struct qeth_hdr) +
3116 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3117 buf->is_header[element] = 1;
3118 buf->next_element_to_fill++;
3121 if (skb_shinfo(skb)->nr_frags == 0)
3122 __qeth_fill_buffer(skb, buffer, large_send,
3123 (int *)&buf->next_element_to_fill, offset);
3125 __qeth_fill_buffer_frag(skb, buffer, large_send,
3126 (int *)&buf->next_element_to_fill);
3128 if (!queue->do_pack) {
3129 QETH_DBF_TEXT(TRACE, 6, "fillbfnp");
3130 /* set state to PRIMED -> will be flushed */
3131 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3134 QETH_DBF_TEXT(TRACE, 6, "fillbfpa");
3135 if (queue->card->options.performance_stats)
3136 queue->card->perf_stats.skbs_sent_pack++;
3137 if (buf->next_element_to_fill >=
3138 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3140 * packed buffer if full -> set state PRIMED
3141 * -> will be flushed
3143 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3150 int qeth_do_send_packet_fast(struct qeth_card *card,
3151 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3152 struct qeth_hdr *hdr, int elements_needed,
3153 struct qeth_eddp_context *ctx, int offset, int hd_len)
3155 struct qeth_qdio_out_buffer *buffer;
3156 int buffers_needed = 0;
3160 /* spin until we get the queue ... */
3161 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3162 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3163 /* ... now we've got the queue */
3164 index = queue->next_buf_to_fill;
3165 buffer = &queue->bufs[queue->next_buf_to_fill];
3167 * check if buffer is empty to make sure that we do not 'overtake'
3168 * ourselves and try to fill a buffer that is already primed
3170 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3173 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3174 QDIO_MAX_BUFFERS_PER_Q;
3176 buffers_needed = qeth_eddp_check_buffers_for_context(queue,
3178 if (buffers_needed < 0)
3180 queue->next_buf_to_fill =
3181 (queue->next_buf_to_fill + buffers_needed) %
3182 QDIO_MAX_BUFFERS_PER_Q;
3184 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3186 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3187 qeth_flush_buffers(queue, index, 1);
3189 flush_cnt = qeth_eddp_fill_buffer(queue, ctx, index);
3190 WARN_ON(buffers_needed != flush_cnt);
3191 qeth_flush_buffers(queue, index, flush_cnt);
3195 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3198 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3200 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3201 struct sk_buff *skb, struct qeth_hdr *hdr,
3202 int elements_needed, struct qeth_eddp_context *ctx)
3204 struct qeth_qdio_out_buffer *buffer;
3206 int flush_count = 0;
3211 /* spin until we get the queue ... */
3212 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3213 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3214 start_index = queue->next_buf_to_fill;
3215 buffer = &queue->bufs[queue->next_buf_to_fill];
3217 * check if buffer is empty to make sure that we do not 'overtake'
3218 * ourselves and try to fill a buffer that is already primed
3220 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3221 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3224 /* check if we need to switch packing state of this queue */
3225 qeth_switch_to_packing_if_needed(queue);
3226 if (queue->do_pack) {
3229 /* does packet fit in current buffer? */
3230 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3231 buffer->next_element_to_fill) < elements_needed) {
3232 /* ... no -> set state PRIMED */
3233 atomic_set(&buffer->state,
3234 QETH_QDIO_BUF_PRIMED);
3236 queue->next_buf_to_fill =
3237 (queue->next_buf_to_fill + 1) %
3238 QDIO_MAX_BUFFERS_PER_Q;
3239 buffer = &queue->bufs[queue->next_buf_to_fill];
3240 /* we did a step forward, so check buffer state
3242 if (atomic_read(&buffer->state) !=
3243 QETH_QDIO_BUF_EMPTY){
3244 qeth_flush_buffers(queue, start_index,
3246 atomic_set(&queue->state,
3247 QETH_OUT_Q_UNLOCKED);
3252 /* check if we have enough elements (including following
3253 * free buffers) to handle eddp context */
3254 if (qeth_eddp_check_buffers_for_context(queue, ctx)
3262 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
3264 tmp = qeth_eddp_fill_buffer(queue, ctx,
3265 queue->next_buf_to_fill);
3271 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3272 QDIO_MAX_BUFFERS_PER_Q;
3276 qeth_flush_buffers(queue, start_index, flush_count);
3277 else if (!atomic_read(&queue->set_pci_flags_count))
3278 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3280 * queue->state will go from LOCKED -> UNLOCKED or from
3281 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3282 * (switch packing state or flush buffer to get another pci flag out).
3283 * In that case we will enter this loop
3285 while (atomic_dec_return(&queue->state)) {
3287 start_index = queue->next_buf_to_fill;
3288 /* check if we can go back to non-packing state */
3289 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3291 * check if we need to flush a packing buffer to get a pci
3292 * flag out on the queue
3294 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3295 flush_count += qeth_flush_buffers_on_no_pci(queue);
3297 qeth_flush_buffers(queue, start_index, flush_count);
3299 /* at this point the queue is UNLOCKED again */
3300 if (queue->card->options.performance_stats && do_pack)
3301 queue->card->perf_stats.bufs_sent_pack += flush_count;
3305 EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3307 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3308 struct qeth_reply *reply, unsigned long data)
3310 struct qeth_ipa_cmd *cmd;
3311 struct qeth_ipacmd_setadpparms *setparms;
3313 QETH_DBF_TEXT(TRACE, 4, "prmadpcb");
3315 cmd = (struct qeth_ipa_cmd *) data;
3316 setparms = &(cmd->data.setadapterparms);
3318 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3319 if (cmd->hdr.return_code) {
3320 QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code);
3321 setparms->data.mode = SET_PROMISC_MODE_OFF;
3323 card->info.promisc_mode = setparms->data.mode;
3327 void qeth_setadp_promisc_mode(struct qeth_card *card)
3329 enum qeth_ipa_promisc_modes mode;
3330 struct net_device *dev = card->dev;
3331 struct qeth_cmd_buffer *iob;
3332 struct qeth_ipa_cmd *cmd;
3334 QETH_DBF_TEXT(TRACE, 4, "setprom");
3336 if (((dev->flags & IFF_PROMISC) &&
3337 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3338 (!(dev->flags & IFF_PROMISC) &&
3339 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3341 mode = SET_PROMISC_MODE_OFF;
3342 if (dev->flags & IFF_PROMISC)
3343 mode = SET_PROMISC_MODE_ON;
3344 QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode);
3346 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3347 sizeof(struct qeth_ipacmd_setadpparms));
3348 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3349 cmd->data.setadapterparms.data.mode = mode;
3350 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3352 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3354 int qeth_change_mtu(struct net_device *dev, int new_mtu)
3356 struct qeth_card *card;
3359 card = dev->ml_priv;
3361 QETH_DBF_TEXT(TRACE, 4, "chgmtu");
3362 sprintf(dbf_text, "%8x", new_mtu);
3363 QETH_DBF_TEXT(TRACE, 4, dbf_text);
3367 if (new_mtu > 65535)
3369 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3370 (!qeth_mtu_is_valid(card, new_mtu)))
3375 EXPORT_SYMBOL_GPL(qeth_change_mtu);
3377 struct net_device_stats *qeth_get_stats(struct net_device *dev)
3379 struct qeth_card *card;
3381 card = dev->ml_priv;
3383 QETH_DBF_TEXT(TRACE, 5, "getstat");
3385 return &card->stats;
3387 EXPORT_SYMBOL_GPL(qeth_get_stats);
3389 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3390 struct qeth_reply *reply, unsigned long data)
3392 struct qeth_ipa_cmd *cmd;
3394 QETH_DBF_TEXT(TRACE, 4, "chgmaccb");
3396 cmd = (struct qeth_ipa_cmd *) data;
3397 if (!card->options.layer2 ||
3398 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3399 memcpy(card->dev->dev_addr,
3400 &cmd->data.setadapterparms.data.change_addr.addr,
3402 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3404 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3408 int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3411 struct qeth_cmd_buffer *iob;
3412 struct qeth_ipa_cmd *cmd;
3414 QETH_DBF_TEXT(TRACE, 4, "chgmac");
3416 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3417 sizeof(struct qeth_ipacmd_setadpparms));
3418 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3419 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3420 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3421 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3422 card->dev->dev_addr, OSA_ADDR_LEN);
3423 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3427 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3429 void qeth_tx_timeout(struct net_device *dev)
3431 struct qeth_card *card;
3433 card = dev->ml_priv;
3434 card->stats.tx_errors++;
3435 qeth_schedule_recovery(card);
3437 EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3439 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3441 struct qeth_card *card = dev->ml_priv;
3445 case MII_BMCR: /* Basic mode control register */
3447 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3448 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3449 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3450 rc |= BMCR_SPEED100;
3452 case MII_BMSR: /* Basic mode status register */
3453 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3454 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3457 case MII_PHYSID1: /* PHYS ID 1 */
3458 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3460 rc = (rc >> 5) & 0xFFFF;
3462 case MII_PHYSID2: /* PHYS ID 2 */
3463 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3465 case MII_ADVERTISE: /* Advertisement control reg */
3468 case MII_LPA: /* Link partner ability reg */
3469 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3470 LPA_100BASE4 | LPA_LPACK;
3472 case MII_EXPANSION: /* Expansion register */
3474 case MII_DCOUNTER: /* disconnect counter */
3476 case MII_FCSCOUNTER: /* false carrier counter */
3478 case MII_NWAYTEST: /* N-way auto-neg test register */
3480 case MII_RERRCOUNTER: /* rx error counter */
3481 rc = card->stats.rx_errors;
3483 case MII_SREVISION: /* silicon revision */
3485 case MII_RESV1: /* reserved 1 */
3487 case MII_LBRERROR: /* loopback, rx, bypass error */
3489 case MII_PHYADDR: /* physical address */
3491 case MII_RESV2: /* reserved 2 */
3493 case MII_TPISTATUS: /* TPI status for 10mbps */
3495 case MII_NCONFIG: /* network interface config */
3502 EXPORT_SYMBOL_GPL(qeth_mdio_read);
3504 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3505 struct qeth_cmd_buffer *iob, int len,
3506 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3512 QETH_DBF_TEXT(TRACE, 4, "sendsnmp");
3514 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3515 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3516 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3517 /* adjust PDU length fields in IPA_PDU_HEADER */
3518 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3520 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3521 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3522 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3523 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3524 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3525 reply_cb, reply_param);
3528 static int qeth_snmp_command_cb(struct qeth_card *card,
3529 struct qeth_reply *reply, unsigned long sdata)
3531 struct qeth_ipa_cmd *cmd;
3532 struct qeth_arp_query_info *qinfo;
3533 struct qeth_snmp_cmd *snmp;
3534 unsigned char *data;
3537 QETH_DBF_TEXT(TRACE, 3, "snpcmdcb");
3539 cmd = (struct qeth_ipa_cmd *) sdata;
3540 data = (unsigned char *)((char *)cmd - reply->offset);
3541 qinfo = (struct qeth_arp_query_info *) reply->param;
3542 snmp = &cmd->data.setadapterparms.data.snmp;
3544 if (cmd->hdr.return_code) {
3545 QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code);
3548 if (cmd->data.setadapterparms.hdr.return_code) {
3549 cmd->hdr.return_code =
3550 cmd->data.setadapterparms.hdr.return_code;
3551 QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code);
3554 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3555 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3556 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3558 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3560 /* check if there is enough room in userspace */
3561 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
3562 QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM);
3563 cmd->hdr.return_code = -ENOMEM;
3566 QETH_DBF_TEXT_(TRACE, 4, "snore%i",
3567 cmd->data.setadapterparms.hdr.used_total);
3568 QETH_DBF_TEXT_(TRACE, 4, "sseqn%i",
3569 cmd->data.setadapterparms.hdr.seq_no);
3570 /*copy entries to user buffer*/
3571 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3572 memcpy(qinfo->udata + qinfo->udata_offset,
3574 data_len + offsetof(struct qeth_snmp_cmd, data));
3575 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3577 memcpy(qinfo->udata + qinfo->udata_offset,
3578 (char *)&snmp->request, data_len);
3580 qinfo->udata_offset += data_len;
3581 /* check if all replies received ... */
3582 QETH_DBF_TEXT_(TRACE, 4, "srtot%i",
3583 cmd->data.setadapterparms.hdr.used_total);
3584 QETH_DBF_TEXT_(TRACE, 4, "srseq%i",
3585 cmd->data.setadapterparms.hdr.seq_no);
3586 if (cmd->data.setadapterparms.hdr.seq_no <
3587 cmd->data.setadapterparms.hdr.used_total)
3592 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3594 struct qeth_cmd_buffer *iob;
3595 struct qeth_ipa_cmd *cmd;
3596 struct qeth_snmp_ureq *ureq;
3598 struct qeth_arp_query_info qinfo = {0, };
3601 QETH_DBF_TEXT(TRACE, 3, "snmpcmd");
3603 if (card->info.guestlan)
3606 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3607 (!card->options.layer2)) {
3610 /* skip 4 bytes (data_len struct member) to get req_len */
3611 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3613 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
3615 QETH_DBF_TEXT(TRACE, 2, "snmpnome");
3618 if (copy_from_user(ureq, udata,
3619 req_len + sizeof(struct qeth_snmp_ureq_hdr))) {
3623 qinfo.udata_len = ureq->hdr.data_len;
3624 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3629 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3631 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3632 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3633 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3634 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3635 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3636 qeth_snmp_command_cb, (void *)&qinfo);
3638 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
3639 QETH_CARD_IFNAME(card), rc);
3641 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3649 EXPORT_SYMBOL_GPL(qeth_snmp_command);
3651 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3653 switch (card->info.type) {
3654 case QETH_CARD_TYPE_IQD:
3661 static int qeth_qdio_establish(struct qeth_card *card)
3663 struct qdio_initialize init_data;
3664 char *qib_param_field;
3665 struct qdio_buffer **in_sbal_ptrs;
3666 struct qdio_buffer **out_sbal_ptrs;
3670 QETH_DBF_TEXT(SETUP, 2, "qdioest");
3672 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3674 if (!qib_param_field)
3677 qeth_create_qib_param_field(card, qib_param_field);
3678 qeth_create_qib_param_field_blkt(card, qib_param_field);
3680 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3682 if (!in_sbal_ptrs) {
3683 kfree(qib_param_field);
3686 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3687 in_sbal_ptrs[i] = (struct qdio_buffer *)
3688 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3691 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3692 sizeof(void *), GFP_KERNEL);
3693 if (!out_sbal_ptrs) {
3694 kfree(in_sbal_ptrs);
3695 kfree(qib_param_field);
3698 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3699 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3700 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3701 card->qdio.out_qs[i]->bufs[j].buffer);
3704 memset(&init_data, 0, sizeof(struct qdio_initialize));
3705 init_data.cdev = CARD_DDEV(card);
3706 init_data.q_format = qeth_get_qdio_q_format(card);
3707 init_data.qib_param_field_format = 0;
3708 init_data.qib_param_field = qib_param_field;
3709 init_data.no_input_qs = 1;
3710 init_data.no_output_qs = card->qdio.no_out_queues;
3711 init_data.input_handler = card->discipline.input_handler;
3712 init_data.output_handler = card->discipline.output_handler;
3713 init_data.int_parm = (unsigned long) card;
3714 init_data.flags = QDIO_INBOUND_0COPY_SBALS |
3715 QDIO_OUTBOUND_0COPY_SBALS |
3716 QDIO_USE_OUTBOUND_PCIS;
3717 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3718 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3720 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3721 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3722 rc = qdio_initialize(&init_data);
3724 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3726 kfree(out_sbal_ptrs);
3727 kfree(in_sbal_ptrs);
3728 kfree(qib_param_field);
3732 static void qeth_core_free_card(struct qeth_card *card)
3735 QETH_DBF_TEXT(SETUP, 2, "freecrd");
3736 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
3737 qeth_clean_channel(&card->read);
3738 qeth_clean_channel(&card->write);
3740 free_netdev(card->dev);
3741 kfree(card->ip_tbd_list);
3742 qeth_free_qdio_buffers(card);
3743 unregister_service_level(&card->qeth_service_level);
3747 static struct ccw_device_id qeth_ids[] = {
3748 {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE},
3749 {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD},
3750 {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN},
3753 MODULE_DEVICE_TABLE(ccw, qeth_ids);
3755 static struct ccw_driver qeth_ccw_driver = {
3758 .probe = ccwgroup_probe_ccwdev,
3759 .remove = ccwgroup_remove_ccwdev,
3762 static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3763 unsigned long driver_id)
3765 return ccwgroup_create_from_string(root_dev, driver_id,
3766 &qeth_ccw_driver, 3, buf);
3769 int qeth_core_hardsetup_card(struct qeth_card *card)
3771 struct qdio_ssqd_desc *ssqd;
3776 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
3777 atomic_set(&card->force_alloc_skb, 0);
3780 PRINT_WARN("Retrying to do IDX activates.\n");
3781 ccw_device_set_offline(CARD_DDEV(card));
3782 ccw_device_set_offline(CARD_WDEV(card));
3783 ccw_device_set_offline(CARD_RDEV(card));
3784 ccw_device_set_online(CARD_RDEV(card));
3785 ccw_device_set_online(CARD_WDEV(card));
3786 ccw_device_set_online(CARD_DDEV(card));
3788 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
3789 if (rc == -ERESTARTSYS) {
3790 QETH_DBF_TEXT(SETUP, 2, "break1");
3793 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
3800 rc = qeth_get_unitaddr(card);
3802 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
3806 ssqd = kmalloc(sizeof(struct qdio_ssqd_desc), GFP_KERNEL);
3811 rc = qdio_get_ssqd_desc(CARD_DDEV(card), ssqd);
3817 mpno = min(mpno - 1, QETH_MAX_PORTNO);
3818 if (card->info.portno > mpno) {
3819 QETH_DBF_MESSAGE(2, "Device %s does not offer port number %d"
3820 "\n.", CARD_BUS_ID(card), card->info.portno);
3824 qeth_init_tokens(card);
3825 qeth_init_func_level(card);
3826 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3827 if (rc == -ERESTARTSYS) {
3828 QETH_DBF_TEXT(SETUP, 2, "break2");
3831 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
3837 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3838 if (rc == -ERESTARTSYS) {
3839 QETH_DBF_TEXT(SETUP, 2, "break3");
3842 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
3848 rc = qeth_mpc_initialize(card);
3850 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
3855 PRINT_ERR("Initialization in hardsetup failed! rc=%d\n", rc);
3858 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3860 static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3861 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3863 struct page *page = virt_to_page(element->addr);
3864 if (*pskb == NULL) {
3865 /* the upper protocol layers assume that there is data in the
3866 * skb itself. Copy a small amount (64 bytes) to make them
3868 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3871 skb_reserve(*pskb, ETH_HLEN);
3872 if (data_len <= 64) {
3873 memcpy(skb_put(*pskb, data_len), element->addr + offset,
3877 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
3878 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
3880 (*pskb)->data_len += data_len - 64;
3881 (*pskb)->len += data_len - 64;
3882 (*pskb)->truesize += data_len - 64;
3887 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
3888 (*pskb)->data_len += data_len;
3889 (*pskb)->len += data_len;
3890 (*pskb)->truesize += data_len;
3896 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
3897 struct qdio_buffer *buffer,
3898 struct qdio_buffer_element **__element, int *__offset,
3899 struct qeth_hdr **hdr)
3901 struct qdio_buffer_element *element = *__element;
3902 int offset = *__offset;
3903 struct sk_buff *skb = NULL;
3911 /* qeth_hdr must not cross element boundaries */
3912 if (element->length < offset + sizeof(struct qeth_hdr)) {
3913 if (qeth_is_last_sbale(element))
3917 if (element->length < sizeof(struct qeth_hdr))
3920 *hdr = element->addr + offset;
3922 offset += sizeof(struct qeth_hdr);
3923 if (card->options.layer2) {
3924 if (card->info.type == QETH_CARD_TYPE_OSN) {
3925 skb_len = (*hdr)->hdr.osn.pdu_length;
3926 headroom = sizeof(struct qeth_hdr);
3928 skb_len = (*hdr)->hdr.l2.pkt_length;
3931 skb_len = (*hdr)->hdr.l3.length;
3932 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
3933 (card->info.link_type == QETH_LINK_TYPE_HSTR))
3936 headroom = ETH_HLEN;
3942 if ((skb_len >= card->options.rx_sg_cb) &&
3943 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
3944 (!atomic_read(&card->force_alloc_skb))) {
3947 skb = dev_alloc_skb(skb_len + headroom);
3951 skb_reserve(skb, headroom);
3954 data_ptr = element->addr + offset;
3956 data_len = min(skb_len, (int)(element->length - offset));
3959 if (qeth_create_skb_frag(element, &skb, offset,
3963 memcpy(skb_put(skb, data_len), data_ptr,
3967 skb_len -= data_len;
3969 if (qeth_is_last_sbale(element)) {
3970 QETH_DBF_TEXT(TRACE, 4, "unexeob");
3971 QETH_DBF_TEXT_(TRACE, 4, "%s",
3973 QETH_DBF_TEXT(QERR, 2, "unexeob");
3974 QETH_DBF_TEXT_(QERR, 2, "%s",
3976 QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer));
3977 dev_kfree_skb_any(skb);
3978 card->stats.rx_errors++;
3983 data_ptr = element->addr;
3988 *__element = element;
3990 if (use_rx_sg && card->options.performance_stats) {
3991 card->perf_stats.sg_skbs_rx++;
3992 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
3996 if (net_ratelimit()) {
3997 QETH_DBF_TEXT(TRACE, 2, "noskbmem");
3998 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
4000 card->stats.rx_dropped++;
4003 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4005 static void qeth_unregister_dbf_views(void)
4008 for (x = 0; x < QETH_DBF_INFOS; x++) {
4009 debug_unregister(qeth_dbf[x].id);
4010 qeth_dbf[x].id = NULL;
4014 void qeth_dbf_longtext(enum qeth_dbf_names dbf_nix, int level, char *fmt, ...)
4016 char dbf_txt_buf[32];
4019 if (level > (qeth_dbf[dbf_nix].id)->level)
4021 va_start(args, fmt);
4022 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4024 debug_text_event(qeth_dbf[dbf_nix].id, level, dbf_txt_buf);
4026 EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4028 static int qeth_register_dbf_views(void)
4033 for (x = 0; x < QETH_DBF_INFOS; x++) {
4034 /* register the areas */
4035 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4039 if (qeth_dbf[x].id == NULL) {
4040 qeth_unregister_dbf_views();
4044 /* register a view */
4045 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4047 qeth_unregister_dbf_views();
4051 /* set a passing level */
4052 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4058 int qeth_core_load_discipline(struct qeth_card *card,
4059 enum qeth_discipline_id discipline)
4062 switch (discipline) {
4063 case QETH_DISCIPLINE_LAYER3:
4064 card->discipline.ccwgdriver = try_then_request_module(
4065 symbol_get(qeth_l3_ccwgroup_driver),
4068 case QETH_DISCIPLINE_LAYER2:
4069 card->discipline.ccwgdriver = try_then_request_module(
4070 symbol_get(qeth_l2_ccwgroup_driver),
4074 if (!card->discipline.ccwgdriver) {
4075 PRINT_ERR("Support for discipline %d not present\n",
4082 void qeth_core_free_discipline(struct qeth_card *card)
4084 if (card->options.layer2)
4085 symbol_put(qeth_l2_ccwgroup_driver);
4087 symbol_put(qeth_l3_ccwgroup_driver);
4088 card->discipline.ccwgdriver = NULL;
4091 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4093 struct qeth_card *card;
4096 unsigned long flags;
4098 QETH_DBF_TEXT(SETUP, 2, "probedev");
4101 if (!get_device(dev))
4104 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4106 card = qeth_alloc_card();
4108 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4112 card->read.ccwdev = gdev->cdev[0];
4113 card->write.ccwdev = gdev->cdev[1];
4114 card->data.ccwdev = gdev->cdev[2];
4115 dev_set_drvdata(&gdev->dev, card);
4117 gdev->cdev[0]->handler = qeth_irq;
4118 gdev->cdev[1]->handler = qeth_irq;
4119 gdev->cdev[2]->handler = qeth_irq;
4121 rc = qeth_determine_card_type(card);
4123 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4126 rc = qeth_setup_card(card);
4128 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4132 if (card->info.type == QETH_CARD_TYPE_OSN) {
4133 rc = qeth_core_create_osn_attributes(dev);
4136 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4138 qeth_core_remove_osn_attributes(dev);
4141 rc = card->discipline.ccwgdriver->probe(card->gdev);
4143 qeth_core_free_discipline(card);
4144 qeth_core_remove_osn_attributes(dev);
4148 rc = qeth_core_create_device_attributes(dev);
4153 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4154 list_add_tail(&card->list, &qeth_core_card_list.list);
4155 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4159 qeth_core_free_card(card);
4165 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4167 unsigned long flags;
4168 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4170 QETH_DBF_TEXT(SETUP, 2, "removedv");
4171 if (card->discipline.ccwgdriver) {
4172 card->discipline.ccwgdriver->remove(gdev);
4173 qeth_core_free_discipline(card);
4176 if (card->info.type == QETH_CARD_TYPE_OSN) {
4177 qeth_core_remove_osn_attributes(&gdev->dev);
4179 qeth_core_remove_device_attributes(&gdev->dev);
4181 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4182 list_del(&card->list);
4183 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4184 qeth_core_free_card(card);
4185 dev_set_drvdata(&gdev->dev, NULL);
4186 put_device(&gdev->dev);
4190 static int qeth_core_set_online(struct ccwgroup_device *gdev)
4192 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4196 if (!card->discipline.ccwgdriver) {
4197 if (card->info.type == QETH_CARD_TYPE_IQD)
4198 def_discipline = QETH_DISCIPLINE_LAYER3;
4200 def_discipline = QETH_DISCIPLINE_LAYER2;
4201 rc = qeth_core_load_discipline(card, def_discipline);
4204 rc = card->discipline.ccwgdriver->probe(card->gdev);
4208 rc = card->discipline.ccwgdriver->set_online(gdev);
4213 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4215 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4216 return card->discipline.ccwgdriver->set_offline(gdev);
4219 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4221 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4222 if (card->discipline.ccwgdriver &&
4223 card->discipline.ccwgdriver->shutdown)
4224 card->discipline.ccwgdriver->shutdown(gdev);
4227 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4228 .owner = THIS_MODULE,
4230 .driver_id = 0xD8C5E3C8,
4231 .probe = qeth_core_probe_device,
4232 .remove = qeth_core_remove_device,
4233 .set_online = qeth_core_set_online,
4234 .set_offline = qeth_core_set_offline,
4235 .shutdown = qeth_core_shutdown,
4239 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4243 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4244 qeth_core_ccwgroup_driver.driver_id);
4251 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4254 const char str[ETH_GSTRING_LEN];
4255 } qeth_ethtool_stats_keys[] = {
4260 {"tx skbs no packing"},
4261 {"tx buffers no packing"},
4262 {"tx skbs packing"},
4263 {"tx buffers packing"},
4266 /* 10 */{"rx sg skbs"},
4268 {"rx sg page allocs"},
4269 {"tx large kbytes"},
4271 {"tx pk state ch n->p"},
4272 {"tx pk state ch p->n"},
4273 {"tx pk watermark low"},
4274 {"tx pk watermark high"},
4275 {"queue 0 buffer usage"},
4276 /* 20 */{"queue 1 buffer usage"},
4277 {"queue 2 buffer usage"},
4278 {"queue 3 buffer usage"},
4279 {"rx handler time"},
4280 {"rx handler count"},
4281 {"rx do_QDIO time"},
4282 {"rx do_QDIO count"},
4283 {"tx handler time"},
4284 {"tx handler count"},
4286 /* 30 */{"tx count"},
4287 {"tx do_QDIO time"},
4288 {"tx do_QDIO count"},
4291 int qeth_core_get_stats_count(struct net_device *dev)
4293 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4295 EXPORT_SYMBOL_GPL(qeth_core_get_stats_count);
4297 void qeth_core_get_ethtool_stats(struct net_device *dev,
4298 struct ethtool_stats *stats, u64 *data)
4300 struct qeth_card *card = dev->ml_priv;
4301 data[0] = card->stats.rx_packets -
4302 card->perf_stats.initial_rx_packets;
4303 data[1] = card->perf_stats.bufs_rec;
4304 data[2] = card->stats.tx_packets -
4305 card->perf_stats.initial_tx_packets;
4306 data[3] = card->perf_stats.bufs_sent;
4307 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4308 - card->perf_stats.skbs_sent_pack;
4309 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4310 data[6] = card->perf_stats.skbs_sent_pack;
4311 data[7] = card->perf_stats.bufs_sent_pack;
4312 data[8] = card->perf_stats.sg_skbs_sent;
4313 data[9] = card->perf_stats.sg_frags_sent;
4314 data[10] = card->perf_stats.sg_skbs_rx;
4315 data[11] = card->perf_stats.sg_frags_rx;
4316 data[12] = card->perf_stats.sg_alloc_page_rx;
4317 data[13] = (card->perf_stats.large_send_bytes >> 10);
4318 data[14] = card->perf_stats.large_send_cnt;
4319 data[15] = card->perf_stats.sc_dp_p;
4320 data[16] = card->perf_stats.sc_p_dp;
4321 data[17] = QETH_LOW_WATERMARK_PACK;
4322 data[18] = QETH_HIGH_WATERMARK_PACK;
4323 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4324 data[20] = (card->qdio.no_out_queues > 1) ?
4325 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4326 data[21] = (card->qdio.no_out_queues > 2) ?
4327 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4328 data[22] = (card->qdio.no_out_queues > 3) ?
4329 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4330 data[23] = card->perf_stats.inbound_time;
4331 data[24] = card->perf_stats.inbound_cnt;
4332 data[25] = card->perf_stats.inbound_do_qdio_time;
4333 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4334 data[27] = card->perf_stats.outbound_handler_time;
4335 data[28] = card->perf_stats.outbound_handler_cnt;
4336 data[29] = card->perf_stats.outbound_time;
4337 data[30] = card->perf_stats.outbound_cnt;
4338 data[31] = card->perf_stats.outbound_do_qdio_time;
4339 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4341 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4343 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4345 switch (stringset) {
4347 memcpy(data, &qeth_ethtool_stats_keys,
4348 sizeof(qeth_ethtool_stats_keys));
4355 EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4357 void qeth_core_get_drvinfo(struct net_device *dev,
4358 struct ethtool_drvinfo *info)
4360 struct qeth_card *card = dev->ml_priv;
4361 if (card->options.layer2)
4362 strcpy(info->driver, "qeth_l2");
4364 strcpy(info->driver, "qeth_l3");
4366 strcpy(info->version, "1.0");
4367 strcpy(info->fw_version, card->info.mcl_level);
4368 sprintf(info->bus_info, "%s/%s/%s",
4371 CARD_DDEV_ID(card));
4373 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4375 int qeth_core_ethtool_get_settings(struct net_device *netdev,
4376 struct ethtool_cmd *ecmd)
4378 struct qeth_card *card = netdev->ml_priv;
4379 enum qeth_link_types link_type;
4381 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
4382 link_type = QETH_LINK_TYPE_10GBIT_ETH;
4384 link_type = card->info.link_type;
4386 ecmd->transceiver = XCVR_INTERNAL;
4387 ecmd->supported = SUPPORTED_Autoneg;
4388 ecmd->advertising = ADVERTISED_Autoneg;
4389 ecmd->duplex = DUPLEX_FULL;
4390 ecmd->autoneg = AUTONEG_ENABLE;
4392 switch (link_type) {
4393 case QETH_LINK_TYPE_FAST_ETH:
4394 case QETH_LINK_TYPE_LANE_ETH100:
4395 ecmd->supported |= SUPPORTED_10baseT_Half |
4396 SUPPORTED_10baseT_Full |
4397 SUPPORTED_100baseT_Half |
4398 SUPPORTED_100baseT_Full |
4400 ecmd->advertising |= ADVERTISED_10baseT_Half |
4401 ADVERTISED_10baseT_Full |
4402 ADVERTISED_100baseT_Half |
4403 ADVERTISED_100baseT_Full |
4405 ecmd->speed = SPEED_100;
4406 ecmd->port = PORT_TP;
4409 case QETH_LINK_TYPE_GBIT_ETH:
4410 case QETH_LINK_TYPE_LANE_ETH1000:
4411 ecmd->supported |= SUPPORTED_10baseT_Half |
4412 SUPPORTED_10baseT_Full |
4413 SUPPORTED_100baseT_Half |
4414 SUPPORTED_100baseT_Full |
4415 SUPPORTED_1000baseT_Half |
4416 SUPPORTED_1000baseT_Full |
4418 ecmd->advertising |= ADVERTISED_10baseT_Half |
4419 ADVERTISED_10baseT_Full |
4420 ADVERTISED_100baseT_Half |
4421 ADVERTISED_100baseT_Full |
4422 ADVERTISED_1000baseT_Half |
4423 ADVERTISED_1000baseT_Full |
4425 ecmd->speed = SPEED_1000;
4426 ecmd->port = PORT_FIBRE;
4429 case QETH_LINK_TYPE_10GBIT_ETH:
4430 ecmd->supported |= SUPPORTED_10baseT_Half |
4431 SUPPORTED_10baseT_Full |
4432 SUPPORTED_100baseT_Half |
4433 SUPPORTED_100baseT_Full |
4434 SUPPORTED_1000baseT_Half |
4435 SUPPORTED_1000baseT_Full |
4436 SUPPORTED_10000baseT_Full |
4438 ecmd->advertising |= ADVERTISED_10baseT_Half |
4439 ADVERTISED_10baseT_Full |
4440 ADVERTISED_100baseT_Half |
4441 ADVERTISED_100baseT_Full |
4442 ADVERTISED_1000baseT_Half |
4443 ADVERTISED_1000baseT_Full |
4444 ADVERTISED_10000baseT_Full |
4446 ecmd->speed = SPEED_10000;
4447 ecmd->port = PORT_FIBRE;
4451 ecmd->supported |= SUPPORTED_10baseT_Half |
4452 SUPPORTED_10baseT_Full |
4454 ecmd->advertising |= ADVERTISED_10baseT_Half |
4455 ADVERTISED_10baseT_Full |
4457 ecmd->speed = SPEED_10;
4458 ecmd->port = PORT_TP;
4463 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
4465 static int __init qeth_core_init(void)
4469 PRINT_INFO("loading core functions\n");
4470 INIT_LIST_HEAD(&qeth_core_card_list.list);
4471 rwlock_init(&qeth_core_card_list.rwlock);
4473 rc = qeth_register_dbf_views();
4476 rc = ccw_driver_register(&qeth_ccw_driver);
4479 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4482 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4483 &driver_attr_group);
4486 qeth_core_root_dev = s390_root_dev_register("qeth");
4487 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4491 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
4492 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
4493 if (!qeth_core_header_cache) {
4500 s390_root_dev_unregister(qeth_core_root_dev);
4502 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4503 &driver_attr_group);
4505 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4507 ccw_driver_unregister(&qeth_ccw_driver);
4509 qeth_unregister_dbf_views();
4511 PRINT_ERR("Initialization failed with code %d\n", rc);
4515 static void __exit qeth_core_exit(void)
4517 s390_root_dev_unregister(qeth_core_root_dev);
4518 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4519 &driver_attr_group);
4520 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4521 ccw_driver_unregister(&qeth_ccw_driver);
4522 kmem_cache_destroy(qeth_core_header_cache);
4523 qeth_unregister_dbf_views();
4524 PRINT_INFO("core functions removed\n");
4527 module_init(qeth_core_init);
4528 module_exit(qeth_core_exit);
4529 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4530 MODULE_DESCRIPTION("qeth core functions");
4531 MODULE_LICENSE("GPL");