drivers/net/wireless/rtl818x/rtl8187_dev.c

   1 /*
   2  * Linux device driver for RTL8187
   3  *
   4  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
   5  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
   6  *
   7  * Based on the r8187 driver, which is:
   8  * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
   9  *
  10  * The driver was extended to the RTL8187B in 2008 by:
  11  *      Herton Ronaldo Krzesinski <herton@mandriva.com.br>
  12  *      Hin-Tak Leung <htl10@users.sourceforge.net>
  13  *      Larry Finger <Larry.Finger@lwfinger.net>
  14  *
  15  * Magic delays and register offsets below are taken from the original
  16  * r8187 driver sources.  Thanks to Realtek for their support!
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License version 2 as
  20  * published by the Free Software Foundation.
  21  */
  22
  23 #include <linux/init.h>
  24 #include <linux/usb.h>
  25 #include <linux/delay.h>
  26 #include <linux/etherdevice.h>
  27 #include <linux/eeprom_93cx6.h>
  28 #include <net/mac80211.h>
  29
  30 #include "rtl8187.h"
  31 #include "rtl8187_rtl8225.h"
  32
  33 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  34 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  35 MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>");
  36 MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>");
  37 MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
  38 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
  39 MODULE_LICENSE("GPL");
  40
  41 static struct usb_device_id rtl8187_table[] __devinitdata = {
  42         /* Asus */
  43         {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
  44         /* Belkin */
  45         {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
  46         /* Realtek */
  47         {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
  48         {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
  49         {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
  50         {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
  51         /* Netgear */
  52         {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
  53         {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
  54         {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
  55         /* HP */
  56         {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
  57         /* Sitecom */
  58         {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
  59         {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
  60         /* Abocom */
  61         {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187},
  62         {}
  63 };
  64
  65 MODULE_DEVICE_TABLE(usb, rtl8187_table);
  66
  67 static const struct ieee80211_rate rtl818x_rates[] = {
  68         { .bitrate = 10, .hw_value = 0, },
  69         { .bitrate = 20, .hw_value = 1, },
  70         { .bitrate = 55, .hw_value = 2, },
  71         { .bitrate = 110, .hw_value = 3, },
  72         { .bitrate = 60, .hw_value = 4, },
  73         { .bitrate = 90, .hw_value = 5, },
  74         { .bitrate = 120, .hw_value = 6, },
  75         { .bitrate = 180, .hw_value = 7, },
  76         { .bitrate = 240, .hw_value = 8, },
  77         { .bitrate = 360, .hw_value = 9, },
  78         { .bitrate = 480, .hw_value = 10, },
  79         { .bitrate = 540, .hw_value = 11, },
  80 };
  81
  82 static const struct ieee80211_channel rtl818x_channels[] = {
  83         { .center_freq = 2412 },
  84         { .center_freq = 2417 },
  85         { .center_freq = 2422 },
  86         { .center_freq = 2427 },
  87         { .center_freq = 2432 },
  88         { .center_freq = 2437 },
  89         { .center_freq = 2442 },
  90         { .center_freq = 2447 },
  91         { .center_freq = 2452 },
  92         { .center_freq = 2457 },
  93         { .center_freq = 2462 },
  94         { .center_freq = 2467 },
  95         { .center_freq = 2472 },
  96         { .center_freq = 2484 },
  97 };
  98
  99 static void rtl8187_iowrite_async_cb(struct urb *urb)
 100 {
 101         kfree(urb->context);
 102         usb_free_urb(urb);
 103 }
 104
 105 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
 106                                   void *data, u16 len)
 107 {
 108         struct usb_ctrlrequest *dr;
 109         struct urb *urb;
 110         struct rtl8187_async_write_data {
 111                 u8 data[4];
 112                 struct usb_ctrlrequest dr;
 113         } *buf;
 114         int rc;
 115
 116         buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
 117         if (!buf)
 118                 return;
 119
 120         urb = usb_alloc_urb(0, GFP_ATOMIC);
 121         if (!urb) {
 122                 kfree(buf);
 123                 return;
 124         }
 125
 126         dr = &buf->dr;
 127
 128         dr->bRequestType = RTL8187_REQT_WRITE;
 129         dr->bRequest = RTL8187_REQ_SET_REG;
 130         dr->wValue = addr;
 131         dr->wIndex = 0;
 132         dr->wLength = cpu_to_le16(len);
 133
 134         memcpy(buf, data, len);
 135
 136         usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
 137                              (unsigned char *)dr, buf, len,
 138                              rtl8187_iowrite_async_cb, buf);
 139         rc = usb_submit_urb(urb, GFP_ATOMIC);
 140         if (rc < 0) {
 141                 kfree(buf);
 142                 usb_free_urb(urb);
 143         }
 144 }
 145
 146 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
 147                                            __le32 *addr, u32 val)
 148 {
 149         __le32 buf = cpu_to_le32(val);
 150
 151         rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
 152                               &buf, sizeof(buf));
 153 }
 154
 155 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
 156 {
 157         struct rtl8187_priv *priv = dev->priv;
 158
 159         data <<= 8;
 160         data |= addr | 0x80;
 161
 162         rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
 163         rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
 164         rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
 165         rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
 166 }
 167
 168 static void rtl8187_tx_cb(struct urb *urb)
 169 {
 170         struct sk_buff *skb = (struct sk_buff *)urb->context;
 171         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 172         struct ieee80211_hw *hw = info->rate_driver_data[0];
 173         struct rtl8187_priv *priv = hw->priv;
 174
 175         usb_free_urb(info->rate_driver_data[1]);
 176         skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
 177                                           sizeof(struct rtl8187_tx_hdr));
 178         ieee80211_tx_info_clear_status(info);
 179
 180         if (!urb->status &&
 181             !(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
 182             priv->is_rtl8187b) {
 183                 skb_queue_tail(&priv->b_tx_status.queue, skb);
 184
 185                 /* queue is "full", discard last items */
 186                 while (skb_queue_len(&priv->b_tx_status.queue) > 5) {
 187                         struct sk_buff *old_skb;
 188
 189                         dev_dbg(&priv->udev->dev,
 190                                 "transmit status queue full\n");
 191
 192                         old_skb = skb_dequeue(&priv->b_tx_status.queue);
 193                         ieee80211_tx_status_irqsafe(hw, old_skb);
 194                 }
 195         } else {
 196                 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) && !urb->status)
 197                         info->flags |= IEEE80211_TX_STAT_ACK;
 198                 ieee80211_tx_status_irqsafe(hw, skb);
 199         }
 200 }
 201
 202 static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
 203 {
 204         struct rtl8187_priv *priv = dev->priv;
 205         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 206         unsigned int ep;
 207         void *buf;
 208         struct urb *urb;
 209         __le16 rts_dur = 0;
 210         u32 flags;
 211         int rc;
 212
 213         urb = usb_alloc_urb(0, GFP_ATOMIC);
 214         if (!urb) {
 215                 kfree_skb(skb);
 216                 return 0;
 217         }
 218
 219         flags = skb->len;
 220         flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
 221
 222         flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
 223         if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
 224                 flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
 225         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
 226                 flags |= RTL818X_TX_DESC_FLAG_RTS;
 227                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 228                 rts_dur = ieee80211_rts_duration(dev, priv->vif,
 229                                                  skb->len, info);
 230         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
 231                 flags |= RTL818X_TX_DESC_FLAG_CTS;
 232                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 233         }
 234
 235         if (!priv->is_rtl8187b) {
 236                 struct rtl8187_tx_hdr *hdr =
 237                         (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
 238                 hdr->flags = cpu_to_le32(flags);
 239                 hdr->len = 0;
 240                 hdr->rts_duration = rts_dur;
 241                 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
 242                 buf = hdr;
 243
 244                 ep = 2;
 245         } else {
 246                 /* fc needs to be calculated before skb_push() */
 247                 unsigned int epmap[4] = { 6, 7, 5, 4 };
 248                 struct ieee80211_hdr *tx_hdr =
 249                         (struct ieee80211_hdr *)(skb->data);
 250                 u16 fc = le16_to_cpu(tx_hdr->frame_control);
 251
 252                 struct rtl8187b_tx_hdr *hdr =
 253                         (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
 254                 struct ieee80211_rate *txrate =
 255                         ieee80211_get_tx_rate(dev, info);
 256                 memset(hdr, 0, sizeof(*hdr));
 257                 hdr->flags = cpu_to_le32(flags);
 258                 hdr->rts_duration = rts_dur;
 259                 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
 260                 hdr->tx_duration =
 261                         ieee80211_generic_frame_duration(dev, priv->vif,
 262                                                          skb->len, txrate);
 263                 buf = hdr;
 264
 265                 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
 266                         ep = 12;
 267                 else
 268                         ep = epmap[skb_get_queue_mapping(skb)];
 269         }
 270
 271         info->rate_driver_data[0] = dev;
 272         info->rate_driver_data[1] = urb;
 273
 274         usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
 275                           buf, skb->len, rtl8187_tx_cb, skb);
 276         rc = usb_submit_urb(urb, GFP_ATOMIC);
 277         if (rc < 0) {
 278                 usb_free_urb(urb);
 279                 kfree_skb(skb);
 280         }
 281
 282         return 0;
 283 }
 284
 285 static void rtl8187_rx_cb(struct urb *urb)
 286 {
 287         struct sk_buff *skb = (struct sk_buff *)urb->context;
 288         struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
 289         struct ieee80211_hw *dev = info->dev;
 290         struct rtl8187_priv *priv = dev->priv;
 291         struct ieee80211_rx_status rx_status = { 0 };
 292         int rate, signal;
 293         u32 flags;
 294         u32 quality;
 295
 296         spin_lock(&priv->rx_queue.lock);
 297         if (skb->next)
 298                 __skb_unlink(skb, &priv->rx_queue);
 299         else {
 300                 spin_unlock(&priv->rx_queue.lock);
 301                 return;
 302         }
 303         spin_unlock(&priv->rx_queue.lock);
 304
 305         if (unlikely(urb->status)) {
 306                 usb_free_urb(urb);
 307                 dev_kfree_skb_irq(skb);
 308                 return;
 309         }
 310
 311         skb_put(skb, urb->actual_length);
 312         if (!priv->is_rtl8187b) {
 313                 struct rtl8187_rx_hdr *hdr =
 314                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 315                 flags = le32_to_cpu(hdr->flags);
 316                 /* As with the RTL8187B below, the AGC is used to calculate
 317                  * signal strength and quality. In this case, the scaling
 318                  * constants are derived from the output of p54usb.
 319                  */
 320                 quality = 130 - ((41 * hdr->agc) >> 6);
 321                 signal = -4 - ((27 * hdr->agc) >> 6);
 322                 rx_status.antenna = (hdr->signal >> 7) & 1;
 323                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
 324         } else {
 325                 struct rtl8187b_rx_hdr *hdr =
 326                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 327                 /* The Realtek datasheet for the RTL8187B shows that the RX
 328                  * header contains the following quantities: signal quality,
 329                  * RSSI, AGC, the received power in dB, and the measured SNR.
 330                  * In testing, none of these quantities show qualitative
 331                  * agreement with AP signal strength, except for the AGC,
 332                  * which is inversely proportional to the strength of the
 333                  * signal. In the following, the quality and signal strength
 334                  * are derived from the AGC. The arbitrary scaling constants
 335                  * are chosen to make the results close to the values obtained
 336                  * for a BCM4312 using b43 as the driver. The noise is ignored
 337                  * for now.
 338                  */
 339                 flags = le32_to_cpu(hdr->flags);
 340                 quality = 170 - hdr->agc;
 341                 signal = 14 - hdr->agc / 2;
 342                 rx_status.antenna = (hdr->rssi >> 7) & 1;
 343                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
 344         }
 345
 346         if (quality > 100)
 347                 quality = 100;
 348         rx_status.qual = quality;
 349         priv->quality = quality;
 350         rx_status.signal = signal;
 351         priv->signal = signal;
 352         rate = (flags >> 20) & 0xF;
 353         skb_trim(skb, flags & 0x0FFF);
 354         rx_status.rate_idx = rate;
 355         rx_status.freq = dev->conf.channel->center_freq;
 356         rx_status.band = dev->conf.channel->band;
 357         rx_status.flag |= RX_FLAG_TSFT;
 358         if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
 359                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 360         ieee80211_rx_irqsafe(dev, skb, &rx_status);
 361
 362         skb = dev_alloc_skb(RTL8187_MAX_RX);
 363         if (unlikely(!skb)) {
 364                 usb_free_urb(urb);
 365                 /* TODO check rx queue length and refill *somewhere* */
 366                 return;
 367         }
 368
 369         info = (struct rtl8187_rx_info *)skb->cb;
 370         info->urb = urb;
 371         info->dev = dev;
 372         urb->transfer_buffer = skb_tail_pointer(skb);
 373         urb->context = skb;
 374         skb_queue_tail(&priv->rx_queue, skb);
 375
 376         usb_submit_urb(urb, GFP_ATOMIC);
 377 }
 378
 379 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
 380 {
 381         struct rtl8187_priv *priv = dev->priv;
 382         struct urb *entry;
 383         struct sk_buff *skb;
 384         struct rtl8187_rx_info *info;
 385
 386         while (skb_queue_len(&priv->rx_queue) < 8) {
 387                 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
 388                 if (!skb)
 389                         break;
 390                 entry = usb_alloc_urb(0, GFP_KERNEL);
 391                 if (!entry) {
 392                         kfree_skb(skb);
 393                         break;
 394                 }
 395                 usb_fill_bulk_urb(entry, priv->udev,
 396                                   usb_rcvbulkpipe(priv->udev,
 397                                   priv->is_rtl8187b ? 3 : 1),
 398                                   skb_tail_pointer(skb),
 399                                   RTL8187_MAX_RX, rtl8187_rx_cb, skb);
 400                 info = (struct rtl8187_rx_info *)skb->cb;
 401                 info->urb = entry;
 402                 info->dev = dev;
 403                 skb_queue_tail(&priv->rx_queue, skb);
 404                 usb_submit_urb(entry, GFP_KERNEL);
 405         }
 406
 407         return 0;
 408 }
 409
 410 static void rtl8187b_status_cb(struct urb *urb)
 411 {
 412         struct ieee80211_hw *hw = (struct ieee80211_hw *)urb->context;
 413         struct rtl8187_priv *priv = hw->priv;
 414         u64 val;
 415         unsigned int cmd_type;
 416
 417         if (unlikely(urb->status)) {
 418                 usb_free_urb(urb);
 419                 return;
 420         }
 421
 422         /*
 423          * Read from status buffer:
 424          *
 425          * bits [30:31] = cmd type:
 426          * - 0 indicates tx beacon interrupt
 427          * - 1 indicates tx close descriptor
 428          *
 429          * In the case of tx beacon interrupt:
 430          * [0:9] = Last Beacon CW
 431          * [10:29] = reserved
 432          * [30:31] = 00b
 433          * [32:63] = Last Beacon TSF
 434          *
 435          * If it's tx close descriptor:
 436          * [0:7] = Packet Retry Count
 437          * [8:14] = RTS Retry Count
 438          * [15] = TOK
 439          * [16:27] = Sequence No
 440          * [28] = LS
 441          * [29] = FS
 442          * [30:31] = 01b
 443          * [32:47] = unused (reserved?)
 444          * [48:63] = MAC Used Time
 445          */
 446         val = le64_to_cpu(priv->b_tx_status.buf);
 447
 448         cmd_type = (val >> 30) & 0x3;
 449         if (cmd_type == 1) {
 450                 unsigned int pkt_rc, seq_no;
 451                 bool tok;
 452                 struct sk_buff *skb;
 453                 struct ieee80211_hdr *ieee80211hdr;
 454                 unsigned long flags;
 455
 456                 pkt_rc = val & 0xFF;
 457                 tok = val & (1 << 15);
 458                 seq_no = (val >> 16) & 0xFFF;
 459
 460                 spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags);
 461                 skb_queue_reverse_walk(&priv->b_tx_status.queue, skb) {
 462                         ieee80211hdr = (struct ieee80211_hdr *)skb->data;
 463
 464                         /*
 465                          * While testing, it was discovered that the seq_no
 466                          * doesn't actually contains the sequence number.
 467                          * Instead of returning just the 12 bits of sequence
 468                          * number, hardware is returning entire sequence control
 469                          * (fragment number plus sequence number) in a 12 bit
 470                          * only field overflowing after some time. As a
 471                          * workaround, just consider the lower bits, and expect
 472                          * it's unlikely we wrongly ack some sent data
 473                          */
 474                         if ((le16_to_cpu(ieee80211hdr->seq_ctrl)
 475                             & 0xFFF) == seq_no)
 476                                 break;
 477                 }
 478                 if (skb != (struct sk_buff *) &priv->b_tx_status.queue) {
 479                         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 480
 481                         __skb_unlink(skb, &priv->b_tx_status.queue);
 482                         if (tok)
 483                                 info->flags |= IEEE80211_TX_STAT_ACK;
 484                         info->status.rates[0].count = pkt_rc + 1;
 485
 486                         ieee80211_tx_status_irqsafe(hw, skb);
 487                 }
 488                 spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags);
 489         }
 490
 491         usb_submit_urb(urb, GFP_ATOMIC);
 492 }
 493
 494 static int rtl8187b_init_status_urb(struct ieee80211_hw *dev)
 495 {
 496         struct rtl8187_priv *priv = dev->priv;
 497         struct urb *entry;
 498
 499         entry = usb_alloc_urb(0, GFP_KERNEL);
 500         if (!entry)
 501                 return -ENOMEM;
 502         priv->b_tx_status.urb = entry;
 503
 504         usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9),
 505                           &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf),
 506                           rtl8187b_status_cb, dev);
 507
 508         usb_submit_urb(entry, GFP_KERNEL);
 509
 510         return 0;
 511 }
 512
 513 static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
 514 {
 515         struct rtl8187_priv *priv = dev->priv;
 516         u8 reg;
 517         int i;
 518
 519         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 520         reg &= (1 << 1);
 521         reg |= RTL818X_CMD_RESET;
 522         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 523
 524         i = 10;
 525         do {
 526                 msleep(2);
 527                 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
 528                       RTL818X_CMD_RESET))
 529                         break;
 530         } while (--i);
 531
 532         if (!i) {
 533                 printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
 534                 return -ETIMEDOUT;
 535         }
 536
 537         /* reload registers from eeprom */
 538         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
 539
 540         i = 10;
 541         do {
 542                 msleep(4);
 543                 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
 544                       RTL818X_EEPROM_CMD_CONFIG))
 545                         break;
 546         } while (--i);
 547
 548         if (!i) {
 549                 printk(KERN_ERR "%s: eeprom reset timeout!\n",
 550                        wiphy_name(dev->wiphy));
 551                 return -ETIMEDOUT;
 552         }
 553
 554         return 0;
 555 }
 556
 557 static int rtl8187_init_hw(struct ieee80211_hw *dev)
 558 {
 559         struct rtl8187_priv *priv = dev->priv;
 560         u8 reg;
 561         int res;
 562
 563         /* reset */
 564         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 565                          RTL818X_EEPROM_CMD_CONFIG);
 566         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 567         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg |
 568                          RTL818X_CONFIG3_ANAPARAM_WRITE);
 569         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 570                           RTL8187_RTL8225_ANAPARAM_ON);
 571         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 572                           RTL8187_RTL8225_ANAPARAM2_ON);
 573         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg &
 574                          ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 575         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 576                          RTL818X_EEPROM_CMD_NORMAL);
 577
 578         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 579
 580         msleep(200);
 581         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
 582         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
 583         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
 584         msleep(200);
 585
 586         res = rtl8187_cmd_reset(dev);
 587         if (res)
 588                 return res;
 589
 590         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 591         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 592         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 593                         reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
 594         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 595                           RTL8187_RTL8225_ANAPARAM_ON);
 596         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 597                           RTL8187_RTL8225_ANAPARAM2_ON);
 598         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 599                         reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 600         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 601
 602         /* setup card */
 603         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 604         rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
 605
 606         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 607         rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
 608         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 609
 610         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 611
 612         rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
 613         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 614         reg &= 0x3F;
 615         reg |= 0x80;
 616         rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
 617
 618         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 619
 620         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
 621         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 622         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
 623
 624         // TODO: set RESP_RATE and BRSR properly
 625         rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
 626         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 627
 628         /* host_usb_init */
 629         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 630         rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
 631         reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
 632         rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
 633         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 634         rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
 635         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 636         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
 637         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
 638         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
 639         msleep(100);
 640
 641         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
 642         rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
 643         rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
 644         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 645                          RTL818X_EEPROM_CMD_CONFIG);
 646         rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
 647         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 648                          RTL818X_EEPROM_CMD_NORMAL);
 649         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
 650         msleep(100);
 651
 652         priv->rf->init(dev);
 653
 654         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 655         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
 656         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
 657         rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
 658         rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
 659         rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
 660         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
 661
 662         return 0;
 663 }
 664
 665 static const u8 rtl8187b_reg_table[][3] = {
 666         {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
 667         {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
 668         {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
 669         {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
 670
 671         {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
 672         {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
 673         {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1},
 674         {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1},
 675         {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1},
 676         {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
 677
 678         {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
 679         {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
 680         {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
 681         {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
 682         {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
 683         {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
 684         {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
 685         {0x73, 0x9A, 2},
 686
 687         {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0},
 688         {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
 689         {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
 690         {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
 691         {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x91, 0x03, 0},
 692
 693         {0x4C, 0x00, 2}, {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0},
 694         {0x8E, 0x08, 0}, {0x8F, 0x00, 0}
 695 };
 696
 697 static int rtl8187b_init_hw(struct ieee80211_hw *dev)
 698 {
 699         struct rtl8187_priv *priv = dev->priv;
 700         int res, i;
 701         u8 reg;
 702
 703         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 704                          RTL818X_EEPROM_CMD_CONFIG);
 705
 706         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 707         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT;
 708         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 709         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 710                           RTL8187B_RTL8225_ANAPARAM2_ON);
 711         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 712                           RTL8187B_RTL8225_ANAPARAM_ON);
 713         rtl818x_iowrite8(priv, &priv->map->ANAPARAM3,
 714                          RTL8187B_RTL8225_ANAPARAM3_ON);
 715
 716         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
 717         reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
 718         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
 719         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
 720
 721         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 722         reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
 723         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 724
 725         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 726                          RTL818X_EEPROM_CMD_NORMAL);
 727
 728         res = rtl8187_cmd_reset(dev);
 729         if (res)
 730                 return res;
 731
 732         rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF);
 733         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 734         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 735         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 736         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 737         reg |= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT |
 738                RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 739         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 740
 741         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
 742         reg = rtl818x_ioread8(priv, &priv->map->RATE_FALLBACK);
 743         reg |= RTL818X_RATE_FALLBACK_ENABLE;
 744         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, reg);
 745
 746         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
 747         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
 748         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
 749
 750         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 751                          RTL818X_EEPROM_CMD_CONFIG);
 752         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 753         rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
 754         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 755                          RTL818X_EEPROM_CMD_NORMAL);
 756
 757         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 758         for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
 759                 rtl818x_iowrite8_idx(priv,
 760                                      (u8 *)(uintptr_t)
 761                                      (rtl8187b_reg_table[i][0] | 0xFF00),
 762                                      rtl8187b_reg_table[i][1],
 763                                      rtl8187b_reg_table[i][2]);
 764         }
 765
 766         rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
 767         rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
 768
 769         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
 770         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
 771         rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
 772
 773         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
 774
 775         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
 776
 777         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 778                          RTL818X_EEPROM_CMD_CONFIG);
 779         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 780         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
 781         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 782         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 783                          RTL818X_EEPROM_CMD_NORMAL);
 784
 785         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
 786         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
 787         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
 788         msleep(100);
 789
 790         priv->rf->init(dev);
 791
 792         reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
 793         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 794         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 795
 796         rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
 797         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
 798         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 799         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 800         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
 801         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 802         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 803
 804         reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
 805         rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
 806         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
 807         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
 808         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
 809         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
 810         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
 811         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
 812         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
 813         rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
 814         rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
 815         rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
 816         rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
 817
 818         rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
 819
 820         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
 821
 822         priv->slot_time = 0x9;
 823         priv->aifsn[0] = 2; /* AIFSN[AC_VO] */
 824         priv->aifsn[1] = 2; /* AIFSN[AC_VI] */
 825         priv->aifsn[2] = 7; /* AIFSN[AC_BK] */
 826         priv->aifsn[3] = 3; /* AIFSN[AC_BE] */
 827         rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0);
 828
 829         return 0;
 830 }
 831
 832 static int rtl8187_start(struct ieee80211_hw *dev)
 833 {
 834         struct rtl8187_priv *priv = dev->priv;
 835         u32 reg;
 836         int ret;
 837
 838         ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
 839                                      rtl8187b_init_hw(dev);
 840         if (ret)
 841                 return ret;
 842
 843         mutex_lock(&priv->conf_mutex);
 844         if (priv->is_rtl8187b) {
 845                 reg = RTL818X_RX_CONF_MGMT |
 846                       RTL818X_RX_CONF_DATA |
 847                       RTL818X_RX_CONF_BROADCAST |
 848                       RTL818X_RX_CONF_NICMAC |
 849                       RTL818X_RX_CONF_BSSID |
 850                       (7 << 13 /* RX FIFO threshold NONE */) |
 851                       (7 << 10 /* MAX RX DMA */) |
 852                       RTL818X_RX_CONF_RX_AUTORESETPHY |
 853                       RTL818X_RX_CONF_ONLYERLPKT |
 854                       RTL818X_RX_CONF_MULTICAST;
 855                 priv->rx_conf = reg;
 856                 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 857
 858                 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
 859                                   RTL818X_TX_CONF_HW_SEQNUM |
 860                                   RTL818X_TX_CONF_DISREQQSIZE |
 861                                   (7 << 8  /* short retry limit */) |
 862                                   (7 << 0  /* long retry limit */) |
 863                                   (7 << 21 /* MAX TX DMA */));
 864                 rtl8187_init_urbs(dev);
 865                 rtl8187b_init_status_urb(dev);
 866                 mutex_unlock(&priv->conf_mutex);
 867                 return 0;
 868         }
 869
 870         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 871
 872         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
 873         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
 874
 875         rtl8187_init_urbs(dev);
 876
 877         reg = RTL818X_RX_CONF_ONLYERLPKT |
 878               RTL818X_RX_CONF_RX_AUTORESETPHY |
 879               RTL818X_RX_CONF_BSSID |
 880               RTL818X_RX_CONF_MGMT |
 881               RTL818X_RX_CONF_DATA |
 882               (7 << 13 /* RX FIFO threshold NONE */) |
 883               (7 << 10 /* MAX RX DMA */) |
 884               RTL818X_RX_CONF_BROADCAST |
 885               RTL818X_RX_CONF_NICMAC;
 886
 887         priv->rx_conf = reg;
 888         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 889
 890         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 891         reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
 892         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 893         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 894
 895         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 896         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 897         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 898         reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 899         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 900
 901         reg  = RTL818X_TX_CONF_CW_MIN |
 902                (7 << 21 /* MAX TX DMA */) |
 903                RTL818X_TX_CONF_NO_ICV;
 904         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 905
 906         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 907         reg |= RTL818X_CMD_TX_ENABLE;
 908         reg |= RTL818X_CMD_RX_ENABLE;
 909         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 910         mutex_unlock(&priv->conf_mutex);
 911
 912         return 0;
 913 }
 914
 915 static void rtl8187_stop(struct ieee80211_hw *dev)
 916 {
 917         struct rtl8187_priv *priv = dev->priv;
 918         struct rtl8187_rx_info *info;
 919         struct sk_buff *skb;
 920         u32 reg;
 921
 922         mutex_lock(&priv->conf_mutex);
 923         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 924
 925         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 926         reg &= ~RTL818X_CMD_TX_ENABLE;
 927         reg &= ~RTL818X_CMD_RX_ENABLE;
 928         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 929
 930         priv->rf->stop(dev);
 931
 932         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 933         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
 934         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
 935         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 936
 937         while ((skb = skb_dequeue(&priv->rx_queue))) {
 938                 info = (struct rtl8187_rx_info *)skb->cb;
 939                 usb_kill_urb(info->urb);
 940                 kfree_skb(skb);
 941         }
 942         while ((skb = skb_dequeue(&priv->b_tx_status.queue)))
 943                 dev_kfree_skb_any(skb);
 944         usb_kill_urb(priv->b_tx_status.urb);
 945         mutex_unlock(&priv->conf_mutex);
 946 }
 947
 948 static int rtl8187_add_interface(struct ieee80211_hw *dev,
 949                                  struct ieee80211_if_init_conf *conf)
 950 {
 951         struct rtl8187_priv *priv = dev->priv;
 952         int i;
 953
 954         if (priv->mode != NL80211_IFTYPE_MONITOR)
 955                 return -EOPNOTSUPP;
 956
 957         switch (conf->type) {
 958         case NL80211_IFTYPE_STATION:
 959                 priv->mode = conf->type;
 960                 break;
 961         default:
 962                 return -EOPNOTSUPP;
 963         }
 964
 965         mutex_lock(&priv->conf_mutex);
 966         priv->vif = conf->vif;
 967
 968         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 969         for (i = 0; i < ETH_ALEN; i++)
 970                 rtl818x_iowrite8(priv, &priv->map->MAC[i],
 971                                  ((u8 *)conf->mac_addr)[i]);
 972         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 973
 974         mutex_unlock(&priv->conf_mutex);
 975         return 0;
 976 }
 977
 978 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
 979                                      struct ieee80211_if_init_conf *conf)
 980 {
 981         struct rtl8187_priv *priv = dev->priv;
 982         mutex_lock(&priv->conf_mutex);
 983         priv->mode = NL80211_IFTYPE_MONITOR;
 984         priv->vif = NULL;
 985         mutex_unlock(&priv->conf_mutex);
 986 }
 987
 988 static int rtl8187_config(struct ieee80211_hw *dev, u32 changed)
 989 {
 990         struct rtl8187_priv *priv = dev->priv;
 991         struct ieee80211_conf *conf = &dev->conf;
 992         u32 reg;
 993
 994         mutex_lock(&priv->conf_mutex);
 995         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 996         /* Enable TX loopback on MAC level to avoid TX during channel
 997          * changes, as this has be seen to causes problems and the
 998          * card will stop work until next reset
 999          */
1000         rtl818x_iowrite32(priv, &priv->map->TX_CONF,
1001                           reg | RTL818X_TX_CONF_LOOPBACK_MAC);
1002         priv->rf->set_chan(dev, conf);
1003         msleep(10);
1004         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
1005
1006         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
1007         rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
1008         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
1009         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
1010         mutex_unlock(&priv->conf_mutex);
1011         return 0;
1012 }
1013
1014 static int rtl8187_config_interface(struct ieee80211_hw *dev,
1015                                     struct ieee80211_vif *vif,
1016                                     struct ieee80211_if_conf *conf)
1017 {
1018         struct rtl8187_priv *priv = dev->priv;
1019         int i;
1020         u8 reg;
1021
1022         mutex_lock(&priv->conf_mutex);
1023         for (i = 0; i < ETH_ALEN; i++)
1024                 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
1025
1026         if (is_valid_ether_addr(conf->bssid)) {
1027                 reg = RTL818X_MSR_INFRA;
1028                 if (priv->is_rtl8187b)
1029                         reg |= RTL818X_MSR_ENEDCA;
1030                 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1031         } else {
1032                 reg = RTL818X_MSR_NO_LINK;
1033                 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1034         }
1035
1036         mutex_unlock(&priv->conf_mutex);
1037         return 0;
1038 }
1039
1040 /*
1041  * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for
1042  * example. Thus we have to use raw values for AC_*_PARAM register addresses.
1043  */
1044 static __le32 *rtl8187b_ac_addr[4] = {
1045         (__le32 *) 0xFFF0, /* AC_VO */
1046         (__le32 *) 0xFFF4, /* AC_VI */
1047         (__le32 *) 0xFFFC, /* AC_BK */
1048         (__le32 *) 0xFFF8, /* AC_BE */
1049 };
1050
1051 #define SIFS_TIME 0xa
1052
1053 static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot,
1054                              bool use_short_preamble)
1055 {
1056         if (priv->is_rtl8187b) {
1057                 u8 difs, eifs;
1058                 u16 ack_timeout;
1059                 int queue;
1060
1061                 if (use_short_slot) {
1062                         priv->slot_time = 0x9;
1063                         difs = 0x1c;
1064                         eifs = 0x53;
1065                 } else {
1066                         priv->slot_time = 0x14;
1067                         difs = 0x32;
1068                         eifs = 0x5b;
1069                 }
1070                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1071                 rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time);
1072                 rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
1073
1074                 /*
1075                  * BRSR+1 on 8187B is in fact EIFS register
1076                  * Value in units of 4 us
1077                  */
1078                 rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);
1079
1080                 /*
1081                  * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout
1082                  * register. In units of 4 us like eifs register
1083                  * ack_timeout = ack duration + plcp + difs + preamble
1084                  */
1085                 ack_timeout = 112 + 48 + difs;
1086                 if (use_short_preamble)
1087                         ack_timeout += 72;
1088                 else
1089                         ack_timeout += 144;
1090                 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
1091                                  DIV_ROUND_UP(ack_timeout, 4));
1092
1093                 for (queue = 0; queue < 4; queue++)
1094                         rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue],
1095                                          priv->aifsn[queue] * priv->slot_time +
1096                                          SIFS_TIME);
1097         } else {
1098                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1099                 if (use_short_slot) {
1100                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
1101                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
1102                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
1103                 } else {
1104                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
1105                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
1106                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
1107                 }
1108         }
1109 }
1110
1111 static void rtl8187_bss_info_changed(struct ieee80211_hw *dev,
1112                                      struct ieee80211_vif *vif,
1113                                      struct ieee80211_bss_conf *info,
1114                                      u32 changed)
1115 {
1116         struct rtl8187_priv *priv = dev->priv;
1117
1118         if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE))
1119                 rtl8187_conf_erp(priv, info->use_short_slot,
1120                                  info->use_short_preamble);
1121 }
1122
1123 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
1124                                      unsigned int changed_flags,
1125                                      unsigned int *total_flags,
1126                                      int mc_count, struct dev_addr_list *mclist)
1127 {
1128         struct rtl8187_priv *priv = dev->priv;
1129
1130         if (changed_flags & FIF_FCSFAIL)
1131                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
1132         if (changed_flags & FIF_CONTROL)
1133                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
1134         if (changed_flags & FIF_OTHER_BSS)
1135                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
1136         if (*total_flags & FIF_ALLMULTI || mc_count > 0)
1137                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
1138         else
1139                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
1140
1141         *total_flags = 0;
1142
1143         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
1144                 *total_flags |= FIF_FCSFAIL;
1145         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
1146                 *total_flags |= FIF_CONTROL;
1147         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
1148                 *total_flags |= FIF_OTHER_BSS;
1149         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
1150                 *total_flags |= FIF_ALLMULTI;
1151
1152         rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
1153 }
1154
1155 static int rtl8187_conf_tx(struct ieee80211_hw *dev, u16 queue,
1156                            const struct ieee80211_tx_queue_params *params)
1157 {
1158         struct rtl8187_priv *priv = dev->priv;
1159         u8 cw_min, cw_max;
1160
1161         if (queue > 3)
1162                 return -EINVAL;
1163
1164         cw_min = fls(params->cw_min);
1165         cw_max = fls(params->cw_max);
1166
1167         if (priv->is_rtl8187b) {
1168                 priv->aifsn[queue] = params->aifs;
1169
1170                 /*
1171                  * This is the structure of AC_*_PARAM registers in 8187B:
1172                  * - TXOP limit field, bit offset = 16
1173                  * - ECWmax, bit offset = 12
1174                  * - ECWmin, bit offset = 8
1175                  * - AIFS, bit offset = 0
1176                  */
1177                 rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue],
1178                                   (params->txop << 16) | (cw_max << 12) |
1179                                   (cw_min << 8) | (params->aifs *
1180                                   priv->slot_time + SIFS_TIME));
1181         } else {
1182                 if (queue != 0)
1183                         return -EINVAL;
1184
1185                 rtl818x_iowrite8(priv, &priv->map->CW_VAL,
1186                                  cw_min | (cw_max << 4));
1187         }
1188         return 0;
1189 }
1190
1191 static const struct ieee80211_ops rtl8187_ops = {
1192         .tx                     = rtl8187_tx,
1193         .start                  = rtl8187_start,
1194         .stop                   = rtl8187_stop,
1195         .add_interface          = rtl8187_add_interface,
1196         .remove_interface       = rtl8187_remove_interface,
1197         .config                 = rtl8187_config,
1198         .config_interface       = rtl8187_config_interface,
1199         .bss_info_changed       = rtl8187_bss_info_changed,
1200         .configure_filter       = rtl8187_configure_filter,
1201         .conf_tx                = rtl8187_conf_tx
1202 };
1203
1204 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
1205 {
1206         struct ieee80211_hw *dev = eeprom->data;
1207         struct rtl8187_priv *priv = dev->priv;
1208         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1209
1210         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
1211         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
1212         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
1213         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
1214 }
1215
1216 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
1217 {
1218         struct ieee80211_hw *dev = eeprom->data;
1219         struct rtl8187_priv *priv = dev->priv;
1220         u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
1221
1222         if (eeprom->reg_data_in)
1223                 reg |= RTL818X_EEPROM_CMD_WRITE;
1224         if (eeprom->reg_data_out)
1225                 reg |= RTL818X_EEPROM_CMD_READ;
1226         if (eeprom->reg_data_clock)
1227                 reg |= RTL818X_EEPROM_CMD_CK;
1228         if (eeprom->reg_chip_select)
1229                 reg |= RTL818X_EEPROM_CMD_CS;
1230
1231         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1232         udelay(10);
1233 }
1234
1235 static int __devinit rtl8187_probe(struct usb_interface *intf,
1236                                    const struct usb_device_id *id)
1237 {
1238         struct usb_device *udev = interface_to_usbdev(intf);
1239         struct ieee80211_hw *dev;
1240         struct rtl8187_priv *priv;
1241         struct eeprom_93cx6 eeprom;
1242         struct ieee80211_channel *channel;
1243         const char *chip_name;
1244         u16 txpwr, reg;
1245         int err, i;
1246
1247         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1248         if (!dev) {
1249                 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
1250                 return -ENOMEM;
1251         }
1252
1253         priv = dev->priv;
1254         priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1255
1256         SET_IEEE80211_DEV(dev, &intf->dev);
1257         usb_set_intfdata(intf, dev);
1258         priv->udev = udev;
1259
1260         usb_get_dev(udev);
1261
1262         skb_queue_head_init(&priv->rx_queue);
1263
1264         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1265         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1266
1267         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1268         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1269         priv->map = (struct rtl818x_csr *)0xFF00;
1270
1271         priv->band.band = IEEE80211_BAND_2GHZ;
1272         priv->band.channels = priv->channels;
1273         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1274         priv->band.bitrates = priv->rates;
1275         priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1276         dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1277
1278
1279         priv->mode = NL80211_IFTYPE_MONITOR;
1280         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1281                      IEEE80211_HW_SIGNAL_DBM |
1282                      IEEE80211_HW_RX_INCLUDES_FCS;
1283
1284         eeprom.data = dev;
1285         eeprom.register_read = rtl8187_eeprom_register_read;
1286         eeprom.register_write = rtl8187_eeprom_register_write;
1287         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1288                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1289         else
1290                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1291
1292         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1293         udelay(10);
1294
1295         eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1296                                (__le16 __force *)dev->wiphy->perm_addr, 3);
1297         if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
1298                 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1299                        "generated MAC address\n");
1300                 random_ether_addr(dev->wiphy->perm_addr);
1301         }
1302
1303         channel = priv->channels;
1304         for (i = 0; i < 3; i++) {
1305                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1306                                   &txpwr);
1307                 (*channel++).hw_value = txpwr & 0xFF;
1308                 (*channel++).hw_value = txpwr >> 8;
1309         }
1310         for (i = 0; i < 2; i++) {
1311                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1312                                   &txpwr);
1313                 (*channel++).hw_value = txpwr & 0xFF;
1314                 (*channel++).hw_value = txpwr >> 8;
1315         }
1316
1317         eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1318                           &priv->txpwr_base);
1319
1320         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1321         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1322         /* 0 means asic B-cut, we should use SW 3 wire
1323          * bit-by-bit banging for radio. 1 means we can use
1324          * USB specific request to write radio registers */
1325         priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1326         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1327         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1328
1329         if (!priv->is_rtl8187b) {
1330                 u32 reg32;
1331                 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1332                 reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1333                 switch (reg32) {
1334                 case RTL818X_TX_CONF_R8187vD_B:
1335                         /* Some RTL8187B devices have a USB ID of 0x8187
1336                          * detect them here */
1337                         chip_name = "RTL8187BvB(early)";
1338                         priv->is_rtl8187b = 1;
1339                         priv->hw_rev = RTL8187BvB;
1340                         break;
1341                 case RTL818X_TX_CONF_R8187vD:
1342                         chip_name = "RTL8187vD";
1343                         break;
1344                 default:
1345                         chip_name = "RTL8187vB (default)";
1346                 }
1347        } else {
1348                 /*
1349                  * Force USB request to write radio registers for 8187B, Realtek
1350                  * only uses it in their sources
1351                  */
1352                 /*if (priv->asic_rev == 0) {
1353                         printk(KERN_WARNING "rtl8187: Forcing use of USB "
1354                                "requests to write to radio registers\n");
1355                         priv->asic_rev = 1;
1356                 }*/
1357                 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1358                 case RTL818X_R8187B_B:
1359                         chip_name = "RTL8187BvB";
1360                         priv->hw_rev = RTL8187BvB;
1361                         break;
1362                 case RTL818X_R8187B_D:
1363                         chip_name = "RTL8187BvD";
1364                         priv->hw_rev = RTL8187BvD;
1365                         break;
1366                 case RTL818X_R8187B_E:
1367                         chip_name = "RTL8187BvE";
1368                         priv->hw_rev = RTL8187BvE;
1369                         break;
1370                 default:
1371                         chip_name = "RTL8187BvB (default)";
1372                         priv->hw_rev = RTL8187BvB;
1373                 }
1374         }
1375
1376         if (!priv->is_rtl8187b) {
1377                 for (i = 0; i < 2; i++) {
1378                         eeprom_93cx6_read(&eeprom,
1379                                           RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1380                                           &txpwr);
1381                         (*channel++).hw_value = txpwr & 0xFF;
1382                         (*channel++).hw_value = txpwr >> 8;
1383                 }
1384         } else {
1385                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1386                                   &txpwr);
1387                 (*channel++).hw_value = txpwr & 0xFF;
1388
1389                 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1390                 (*channel++).hw_value = txpwr & 0xFF;
1391
1392                 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1393                 (*channel++).hw_value = txpwr & 0xFF;
1394                 (*channel++).hw_value = txpwr >> 8;
1395         }
1396
1397         if (priv->is_rtl8187b)
1398                 printk(KERN_WARNING "rtl8187: 8187B chip detected.\n");
1399
1400         /*
1401          * XXX: Once this driver supports anything that requires
1402          *      beacons it must implement IEEE80211_TX_CTL_ASSIGN_SEQ.
1403          */
1404         dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1405
1406         if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1407                 printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1408                        " info!\n");
1409
1410         priv->rf = rtl8187_detect_rf(dev);
1411         dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1412                                   sizeof(struct rtl8187_tx_hdr) :
1413                                   sizeof(struct rtl8187b_tx_hdr);
1414         if (!priv->is_rtl8187b)
1415                 dev->queues = 1;
1416         else
1417                 dev->queues = 4;
1418
1419         err = ieee80211_register_hw(dev);
1420         if (err) {
1421                 printk(KERN_ERR "rtl8187: Cannot register device\n");
1422                 goto err_free_dev;
1423         }
1424         mutex_init(&priv->conf_mutex);
1425         skb_queue_head_init(&priv->b_tx_status.queue);
1426
1427         printk(KERN_INFO "%s: hwaddr %pM, %s V%d + %s\n",
1428                wiphy_name(dev->wiphy), dev->wiphy->perm_addr,
1429                chip_name, priv->asic_rev, priv->rf->name);
1430
1431         return 0;
1432
1433  err_free_dev:
1434         ieee80211_free_hw(dev);
1435         usb_set_intfdata(intf, NULL);
1436         usb_put_dev(udev);
1437         return err;
1438 }
1439
1440 static void __devexit rtl8187_disconnect(struct usb_interface *intf)
1441 {
1442         struct ieee80211_hw *dev = usb_get_intfdata(intf);
1443         struct rtl8187_priv *priv;
1444
1445         if (!dev)
1446                 return;
1447
1448         ieee80211_unregister_hw(dev);
1449
1450         priv = dev->priv;
1451         usb_put_dev(interface_to_usbdev(intf));
1452         ieee80211_free_hw(dev);
1453 }
1454
1455 static struct usb_driver rtl8187_driver = {
1456         .name           = KBUILD_MODNAME,
1457         .id_table       = rtl8187_table,
1458         .probe          = rtl8187_probe,
1459         .disconnect     = __devexit_p(rtl8187_disconnect),
1460 };
1461
1462 static int __init rtl8187_init(void)
1463 {
1464         return usb_register(&rtl8187_driver);
1465 }
1466
1467 static void __exit rtl8187_exit(void)
1468 {
1469         usb_deregister(&rtl8187_driver);
1470 }
1471
1472 module_init(rtl8187_init);
1473 module_exit(rtl8187_exit);