1 /******************************************************************************
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/version.h>
33 #include <linux/init.h>
34 #include <linux/pci.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/delay.h>
37 #include <linux/skbuff.h>
38 #include <linux/netdevice.h>
39 #include <linux/wireless.h>
40 #include <linux/firmware.h>
41 #include <linux/etherdevice.h>
42 #include <linux/if_arp.h>
44 #include <net/ieee80211_radiotap.h>
45 #include <net/mac80211.h>
47 #include <asm/div64.h>
50 #include "iwl-helpers.h"
52 #ifdef CONFIG_IWL3945_DEBUG
53 u32 iwl3945_debug_level;
56 static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
57 struct iwl3945_tx_queue *txq);
59 /******************************************************************************
63 ******************************************************************************/
65 /* module parameters */
66 static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
67 static int iwl3945_param_debug; /* def: 0 = minimal debug log messages */
68 static int iwl3945_param_disable; /* def: 0 = enable radio */
69 static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
70 int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
71 static int iwl3945_param_qos_enable = 1; /* def: 1 = use quality of service */
72 int iwl3945_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 8 Tx queues */
75 * module name, copyright, version, etc.
76 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
79 #define DRV_DESCRIPTION \
80 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
82 #ifdef CONFIG_IWL3945_DEBUG
88 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
94 #define IWLWIFI_VERSION "1.2.23k" VD VS
95 #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
96 #define DRV_VERSION IWLWIFI_VERSION
98 /* Change firmware file name, using "-" and incrementing number,
99 * *only* when uCode interface or architecture changes so that it
100 * is not compatible with earlier drivers.
101 * This number will also appear in << 8 position of 1st dword of uCode file */
102 #define IWL3945_UCODE_API "-1"
104 MODULE_DESCRIPTION(DRV_DESCRIPTION);
105 MODULE_VERSION(DRV_VERSION);
106 MODULE_AUTHOR(DRV_COPYRIGHT);
107 MODULE_LICENSE("GPL");
109 static __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
111 u16 fc = le16_to_cpu(hdr->frame_control);
112 int hdr_len = ieee80211_get_hdrlen(fc);
114 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
115 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
119 static const struct ieee80211_supported_band *iwl3945_get_band(
120 struct iwl3945_priv *priv, enum ieee80211_band band)
122 return priv->hw->wiphy->bands[band];
125 static int iwl3945_is_empty_essid(const char *essid, int essid_len)
127 /* Single white space is for Linksys APs */
128 if (essid_len == 1 && essid[0] == ' ')
131 /* Otherwise, if the entire essid is 0, we assume it is hidden */
134 if (essid[essid_len] != '\0')
141 static const char *iwl3945_escape_essid(const char *essid, u8 essid_len)
143 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
144 const char *s = essid;
147 if (iwl3945_is_empty_essid(essid, essid_len)) {
148 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
152 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
153 while (essid_len--) {
165 static void iwl3945_print_hex_dump(int level, void *p, u32 len)
167 #ifdef CONFIG_IWL3945_DEBUG
168 if (!(iwl3945_debug_level & level))
171 print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
176 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
179 * Theory of operation
181 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
182 * of buffer descriptors, each of which points to one or more data buffers for
183 * the device to read from or fill. Driver and device exchange status of each
184 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
185 * entries in each circular buffer, to protect against confusing empty and full
188 * The device reads or writes the data in the queues via the device's several
189 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
191 * For Tx queue, there are low mark and high mark limits. If, after queuing
192 * the packet for Tx, free space become < low mark, Tx queue stopped. When
193 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
196 * The 3945 operates with six queues: One receive queue, one transmit queue
197 * (#4) for sending commands to the device firmware, and four transmit queues
198 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
199 ***************************************************/
201 static int iwl3945_queue_space(const struct iwl3945_queue *q)
203 int s = q->read_ptr - q->write_ptr;
205 if (q->read_ptr > q->write_ptr)
210 /* keep some reserve to not confuse empty and full situations */
218 * iwl3945_queue_inc_wrap - increment queue index, wrap back to beginning
219 * @index -- current index
220 * @n_bd -- total number of entries in queue (must be power of 2)
222 static inline int iwl3945_queue_inc_wrap(int index, int n_bd)
224 return ++index & (n_bd - 1);
228 * iwl3945_queue_dec_wrap - increment queue index, wrap back to end
229 * @index -- current index
230 * @n_bd -- total number of entries in queue (must be power of 2)
232 static inline int iwl3945_queue_dec_wrap(int index, int n_bd)
234 return --index & (n_bd - 1);
237 static inline int x2_queue_used(const struct iwl3945_queue *q, int i)
239 return q->write_ptr > q->read_ptr ?
240 (i >= q->read_ptr && i < q->write_ptr) :
241 !(i < q->read_ptr && i >= q->write_ptr);
244 static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
246 /* This is for scan command, the big buffer at end of command array */
248 return q->n_window; /* must be power of 2 */
250 /* Otherwise, use normal size buffers */
251 return index & (q->n_window - 1);
255 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
257 static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q,
258 int count, int slots_num, u32 id)
261 q->n_window = slots_num;
264 /* count must be power-of-two size, otherwise iwl3945_queue_inc_wrap
265 * and iwl3945_queue_dec_wrap are broken. */
266 BUG_ON(!is_power_of_2(count));
268 /* slots_num must be power-of-two size, otherwise
269 * get_cmd_index is broken. */
270 BUG_ON(!is_power_of_2(slots_num));
272 q->low_mark = q->n_window / 4;
276 q->high_mark = q->n_window / 8;
277 if (q->high_mark < 2)
280 q->write_ptr = q->read_ptr = 0;
286 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
288 static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv,
289 struct iwl3945_tx_queue *txq, u32 id)
291 struct pci_dev *dev = priv->pci_dev;
293 /* Driver private data, only for Tx (not command) queues,
294 * not shared with device. */
295 if (id != IWL_CMD_QUEUE_NUM) {
296 txq->txb = kmalloc(sizeof(txq->txb[0]) *
297 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
299 IWL_ERROR("kmalloc for auxiliary BD "
300 "structures failed\n");
306 /* Circular buffer of transmit frame descriptors (TFDs),
307 * shared with device */
308 txq->bd = pci_alloc_consistent(dev,
309 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
313 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
314 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
331 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
333 int iwl3945_tx_queue_init(struct iwl3945_priv *priv,
334 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
336 struct pci_dev *dev = priv->pci_dev;
341 * Alloc buffer array for commands (Tx or other types of commands).
342 * For the command queue (#4), allocate command space + one big
343 * command for scan, since scan command is very huge; the system will
344 * not have two scans at the same time, so only one is needed.
345 * For data Tx queues (all other queues), no super-size command
348 len = sizeof(struct iwl3945_cmd) * slots_num;
349 if (txq_id == IWL_CMD_QUEUE_NUM)
350 len += IWL_MAX_SCAN_SIZE;
351 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
355 /* Alloc driver data array and TFD circular buffer */
356 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
358 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
362 txq->need_update = 0;
364 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
365 * iwl3945_queue_inc_wrap and iwl3945_queue_dec_wrap are broken. */
366 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
368 /* Initialize queue high/low-water, head/tail indexes */
369 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
371 /* Tell device where to find queue, enable DMA channel. */
372 iwl3945_hw_tx_queue_init(priv, txq);
378 * iwl3945_tx_queue_free - Deallocate DMA queue.
379 * @txq: Transmit queue to deallocate.
381 * Empty queue by removing and destroying all BD's.
383 * 0-fill, but do not free "txq" descriptor structure.
385 void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
387 struct iwl3945_queue *q = &txq->q;
388 struct pci_dev *dev = priv->pci_dev;
394 /* first, empty all BD's */
395 for (; q->write_ptr != q->read_ptr;
396 q->read_ptr = iwl3945_queue_inc_wrap(q->read_ptr, q->n_bd))
397 iwl3945_hw_txq_free_tfd(priv, txq);
399 len = sizeof(struct iwl3945_cmd) * q->n_window;
400 if (q->id == IWL_CMD_QUEUE_NUM)
401 len += IWL_MAX_SCAN_SIZE;
403 /* De-alloc array of command/tx buffers */
404 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
406 /* De-alloc circular buffer of TFDs */
408 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
409 txq->q.n_bd, txq->bd, txq->q.dma_addr);
411 /* De-alloc array of per-TFD driver data */
417 /* 0-fill queue descriptor structure */
418 memset(txq, 0, sizeof(*txq));
421 const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
423 /*************** STATION TABLE MANAGEMENT ****
424 * mac80211 should be examined to determine if sta_info is duplicating
425 * the functionality provided here
428 /**************************************************************/
429 #if 0 /* temporary disable till we add real remove station */
431 * iwl3945_remove_station - Remove driver's knowledge of station.
433 * NOTE: This does not remove station from device's station table.
435 static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap)
437 int index = IWL_INVALID_STATION;
441 spin_lock_irqsave(&priv->sta_lock, flags);
445 else if (is_broadcast_ether_addr(addr))
446 index = priv->hw_setting.bcast_sta_id;
448 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
449 if (priv->stations[i].used &&
450 !compare_ether_addr(priv->stations[i].sta.sta.addr,
456 if (unlikely(index == IWL_INVALID_STATION))
459 if (priv->stations[index].used) {
460 priv->stations[index].used = 0;
461 priv->num_stations--;
464 BUG_ON(priv->num_stations < 0);
467 spin_unlock_irqrestore(&priv->sta_lock, flags);
473 * iwl3945_clear_stations_table - Clear the driver's station table
475 * NOTE: This does not clear or otherwise alter the device's station table.
477 static void iwl3945_clear_stations_table(struct iwl3945_priv *priv)
481 spin_lock_irqsave(&priv->sta_lock, flags);
483 priv->num_stations = 0;
484 memset(priv->stations, 0, sizeof(priv->stations));
486 spin_unlock_irqrestore(&priv->sta_lock, flags);
490 * iwl3945_add_station - Add station to station tables in driver and device
492 u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 flags)
495 int index = IWL_INVALID_STATION;
496 struct iwl3945_station_entry *station;
497 unsigned long flags_spin;
498 DECLARE_MAC_BUF(mac);
501 spin_lock_irqsave(&priv->sta_lock, flags_spin);
504 else if (is_broadcast_ether_addr(addr))
505 index = priv->hw_setting.bcast_sta_id;
507 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
508 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
514 if (!priv->stations[i].used &&
515 index == IWL_INVALID_STATION)
519 /* These two conditions has the same outcome but keep them separate
520 since they have different meaning */
521 if (unlikely(index == IWL_INVALID_STATION)) {
522 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
526 if (priv->stations[index].used &&
527 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
528 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
532 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
533 station = &priv->stations[index];
535 priv->num_stations++;
537 /* Set up the REPLY_ADD_STA command to send to device */
538 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
539 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
540 station->sta.mode = 0;
541 station->sta.sta.sta_id = index;
542 station->sta.station_flags = 0;
544 if (priv->band == IEEE80211_BAND_5GHZ)
545 rate = IWL_RATE_6M_PLCP;
547 rate = IWL_RATE_1M_PLCP;
549 /* Turn on both antennas for the station... */
550 station->sta.rate_n_flags =
551 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
552 station->current_rate.rate_n_flags =
553 le16_to_cpu(station->sta.rate_n_flags);
555 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
557 /* Add station to device's station table */
558 iwl3945_send_add_station(priv, &station->sta, flags);
563 /*************** DRIVER STATUS FUNCTIONS *****/
565 static inline int iwl3945_is_ready(struct iwl3945_priv *priv)
567 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
568 * set but EXIT_PENDING is not */
569 return test_bit(STATUS_READY, &priv->status) &&
570 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
571 !test_bit(STATUS_EXIT_PENDING, &priv->status);
574 static inline int iwl3945_is_alive(struct iwl3945_priv *priv)
576 return test_bit(STATUS_ALIVE, &priv->status);
579 static inline int iwl3945_is_init(struct iwl3945_priv *priv)
581 return test_bit(STATUS_INIT, &priv->status);
584 static inline int iwl3945_is_rfkill(struct iwl3945_priv *priv)
586 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
587 test_bit(STATUS_RF_KILL_SW, &priv->status);
590 static inline int iwl3945_is_ready_rf(struct iwl3945_priv *priv)
593 if (iwl3945_is_rfkill(priv))
596 return iwl3945_is_ready(priv);
599 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
601 #define IWL_CMD(x) case x : return #x
603 static const char *get_cmd_string(u8 cmd)
606 IWL_CMD(REPLY_ALIVE);
607 IWL_CMD(REPLY_ERROR);
609 IWL_CMD(REPLY_RXON_ASSOC);
610 IWL_CMD(REPLY_QOS_PARAM);
611 IWL_CMD(REPLY_RXON_TIMING);
612 IWL_CMD(REPLY_ADD_STA);
613 IWL_CMD(REPLY_REMOVE_STA);
614 IWL_CMD(REPLY_REMOVE_ALL_STA);
615 IWL_CMD(REPLY_3945_RX);
617 IWL_CMD(REPLY_RATE_SCALE);
618 IWL_CMD(REPLY_LEDS_CMD);
619 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
620 IWL_CMD(RADAR_NOTIFICATION);
621 IWL_CMD(REPLY_QUIET_CMD);
622 IWL_CMD(REPLY_CHANNEL_SWITCH);
623 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
624 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
625 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
626 IWL_CMD(POWER_TABLE_CMD);
627 IWL_CMD(PM_SLEEP_NOTIFICATION);
628 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
629 IWL_CMD(REPLY_SCAN_CMD);
630 IWL_CMD(REPLY_SCAN_ABORT_CMD);
631 IWL_CMD(SCAN_START_NOTIFICATION);
632 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
633 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
634 IWL_CMD(BEACON_NOTIFICATION);
635 IWL_CMD(REPLY_TX_BEACON);
636 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
637 IWL_CMD(QUIET_NOTIFICATION);
638 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
639 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
640 IWL_CMD(REPLY_BT_CONFIG);
641 IWL_CMD(REPLY_STATISTICS_CMD);
642 IWL_CMD(STATISTICS_NOTIFICATION);
643 IWL_CMD(REPLY_CARD_STATE_CMD);
644 IWL_CMD(CARD_STATE_NOTIFICATION);
645 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
652 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
655 * iwl3945_enqueue_hcmd - enqueue a uCode command
656 * @priv: device private data point
657 * @cmd: a point to the ucode command structure
659 * The function returns < 0 values to indicate the operation is
660 * failed. On success, it turns the index (> 0) of command in the
663 static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
665 struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
666 struct iwl3945_queue *q = &txq->q;
667 struct iwl3945_tfd_frame *tfd;
669 struct iwl3945_cmd *out_cmd;
671 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
672 dma_addr_t phys_addr;
678 /* If any of the command structures end up being larger than
679 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
680 * we will need to increase the size of the TFD entries */
681 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
682 !(cmd->meta.flags & CMD_SIZE_HUGE));
685 if (iwl3945_is_rfkill(priv)) {
686 IWL_DEBUG_INFO("Not sending command - RF KILL");
690 if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
691 IWL_ERROR("No space for Tx\n");
695 spin_lock_irqsave(&priv->hcmd_lock, flags);
697 tfd = &txq->bd[q->write_ptr];
698 memset(tfd, 0, sizeof(*tfd));
700 control_flags = (u32 *) tfd;
702 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
703 out_cmd = &txq->cmd[idx];
705 out_cmd->hdr.cmd = cmd->id;
706 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
707 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
709 /* At this point, the out_cmd now has all of the incoming cmd
712 out_cmd->hdr.flags = 0;
713 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
714 INDEX_TO_SEQ(q->write_ptr));
715 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
716 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
718 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
719 offsetof(struct iwl3945_cmd, hdr);
720 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
722 pad = U32_PAD(cmd->len);
723 count = TFD_CTL_COUNT_GET(*control_flags);
724 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
726 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
727 "%d bytes at %d[%d]:%d\n",
728 get_cmd_string(out_cmd->hdr.cmd),
729 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
730 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
732 txq->need_update = 1;
734 /* Increment and update queue's write index */
735 q->write_ptr = iwl3945_queue_inc_wrap(q->write_ptr, q->n_bd);
736 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
738 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
739 return ret ? ret : idx;
742 static int iwl3945_send_cmd_async(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
746 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
748 /* An asynchronous command can not expect an SKB to be set. */
749 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
751 /* An asynchronous command MUST have a callback. */
752 BUG_ON(!cmd->meta.u.callback);
754 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
757 ret = iwl3945_enqueue_hcmd(priv, cmd);
759 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
760 get_cmd_string(cmd->id), ret);
766 static int iwl3945_send_cmd_sync(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
770 static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
772 BUG_ON(cmd->meta.flags & CMD_ASYNC);
774 /* A synchronous command can not have a callback set. */
775 BUG_ON(cmd->meta.u.callback != NULL);
777 if (atomic_xchg(&entry, 1)) {
778 IWL_ERROR("Error sending %s: Already sending a host command\n",
779 get_cmd_string(cmd->id));
783 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
785 if (cmd->meta.flags & CMD_WANT_SKB)
786 cmd->meta.source = &cmd->meta;
788 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
791 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
792 get_cmd_string(cmd->id), ret);
796 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
797 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
798 HOST_COMPLETE_TIMEOUT);
800 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
801 IWL_ERROR("Error sending %s: time out after %dms.\n",
802 get_cmd_string(cmd->id),
803 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
805 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
811 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
812 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
813 get_cmd_string(cmd->id));
817 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
818 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
819 get_cmd_string(cmd->id));
823 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
824 IWL_ERROR("Error: Response NULL in '%s'\n",
825 get_cmd_string(cmd->id));
834 if (cmd->meta.flags & CMD_WANT_SKB) {
835 struct iwl3945_cmd *qcmd;
837 /* Cancel the CMD_WANT_SKB flag for the cmd in the
838 * TX cmd queue. Otherwise in case the cmd comes
839 * in later, it will possibly set an invalid
840 * address (cmd->meta.source). */
841 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
842 qcmd->meta.flags &= ~CMD_WANT_SKB;
845 if (cmd->meta.u.skb) {
846 dev_kfree_skb_any(cmd->meta.u.skb);
847 cmd->meta.u.skb = NULL;
850 atomic_set(&entry, 0);
854 int iwl3945_send_cmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
856 if (cmd->meta.flags & CMD_ASYNC)
857 return iwl3945_send_cmd_async(priv, cmd);
859 return iwl3945_send_cmd_sync(priv, cmd);
862 int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, const void *data)
864 struct iwl3945_host_cmd cmd = {
870 return iwl3945_send_cmd_sync(priv, &cmd);
873 static int __must_check iwl3945_send_cmd_u32(struct iwl3945_priv *priv, u8 id, u32 val)
875 struct iwl3945_host_cmd cmd = {
881 return iwl3945_send_cmd_sync(priv, &cmd);
884 int iwl3945_send_statistics_request(struct iwl3945_priv *priv)
886 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
890 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
891 * @band: 2.4 or 5 GHz band
892 * @channel: Any channel valid for the requested band
894 * In addition to setting the staging RXON, priv->band is also set.
896 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
897 * in the staging RXON flag structure based on the band
899 static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv,
900 enum ieee80211_band band,
903 if (!iwl3945_get_channel_info(priv, band, channel)) {
904 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
909 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
910 (priv->band == band))
913 priv->staging_rxon.channel = cpu_to_le16(channel);
914 if (band == IEEE80211_BAND_5GHZ)
915 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
917 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
921 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
927 * iwl3945_check_rxon_cmd - validate RXON structure is valid
929 * NOTE: This is really only useful during development and can eventually
930 * be #ifdef'd out once the driver is stable and folks aren't actively
933 static int iwl3945_check_rxon_cmd(struct iwl3945_rxon_cmd *rxon)
938 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
939 error |= le32_to_cpu(rxon->flags &
940 (RXON_FLG_TGJ_NARROW_BAND_MSK |
941 RXON_FLG_RADAR_DETECT_MSK));
943 IWL_WARNING("check 24G fields %d | %d\n",
946 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
947 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
949 IWL_WARNING("check 52 fields %d | %d\n",
951 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
953 IWL_WARNING("check 52 CCK %d | %d\n",
956 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
958 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
960 /* make sure basic rates 6Mbps and 1Mbps are supported */
961 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
962 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
964 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
966 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
968 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
970 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
971 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
973 IWL_WARNING("check CCK and short slot %d | %d\n",
976 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
977 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
979 IWL_WARNING("check CCK & auto detect %d | %d\n",
982 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
983 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
985 IWL_WARNING("check TGG and auto detect %d | %d\n",
988 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
989 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
990 RXON_FLG_ANT_A_MSK)) == 0);
992 IWL_WARNING("check antenna %d %d\n", counter++, error);
995 IWL_WARNING("Tuning to channel %d\n",
996 le16_to_cpu(rxon->channel));
999 IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
1006 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
1007 * @priv: staging_rxon is compared to active_rxon
1009 * If the RXON structure is changing enough to require a new tune,
1010 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
1011 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
1013 static int iwl3945_full_rxon_required(struct iwl3945_priv *priv)
1016 /* These items are only settable from the full RXON command */
1017 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
1018 compare_ether_addr(priv->staging_rxon.bssid_addr,
1019 priv->active_rxon.bssid_addr) ||
1020 compare_ether_addr(priv->staging_rxon.node_addr,
1021 priv->active_rxon.node_addr) ||
1022 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
1023 priv->active_rxon.wlap_bssid_addr) ||
1024 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
1025 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
1026 (priv->staging_rxon.air_propagation !=
1027 priv->active_rxon.air_propagation) ||
1028 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
1031 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
1032 * be updated with the RXON_ASSOC command -- however only some
1033 * flag transitions are allowed using RXON_ASSOC */
1035 /* Check if we are not switching bands */
1036 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1037 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1040 /* Check if we are switching association toggle */
1041 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1042 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1048 static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv)
1051 struct iwl3945_rx_packet *res = NULL;
1052 struct iwl3945_rxon_assoc_cmd rxon_assoc;
1053 struct iwl3945_host_cmd cmd = {
1054 .id = REPLY_RXON_ASSOC,
1055 .len = sizeof(rxon_assoc),
1056 .meta.flags = CMD_WANT_SKB,
1057 .data = &rxon_assoc,
1059 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging_rxon;
1060 const struct iwl3945_rxon_cmd *rxon2 = &priv->active_rxon;
1062 if ((rxon1->flags == rxon2->flags) &&
1063 (rxon1->filter_flags == rxon2->filter_flags) &&
1064 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1065 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1066 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1070 rxon_assoc.flags = priv->staging_rxon.flags;
1071 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1072 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1073 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1074 rxon_assoc.reserved = 0;
1076 rc = iwl3945_send_cmd_sync(priv, &cmd);
1080 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1081 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1082 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1086 priv->alloc_rxb_skb--;
1087 dev_kfree_skb_any(cmd.meta.u.skb);
1093 * iwl3945_commit_rxon - commit staging_rxon to hardware
1095 * The RXON command in staging_rxon is committed to the hardware and
1096 * the active_rxon structure is updated with the new data. This
1097 * function correctly transitions out of the RXON_ASSOC_MSK state if
1098 * a HW tune is required based on the RXON structure changes.
1100 static int iwl3945_commit_rxon(struct iwl3945_priv *priv)
1102 /* cast away the const for active_rxon in this function */
1103 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
1105 DECLARE_MAC_BUF(mac);
1107 if (!iwl3945_is_alive(priv))
1110 /* always get timestamp with Rx frame */
1111 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1113 /* select antenna */
1114 priv->staging_rxon.flags &=
1115 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1116 priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
1118 rc = iwl3945_check_rxon_cmd(&priv->staging_rxon);
1120 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1124 /* If we don't need to send a full RXON, we can use
1125 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
1126 * and other flags for the current radio configuration. */
1127 if (!iwl3945_full_rxon_required(priv)) {
1128 rc = iwl3945_send_rxon_assoc(priv);
1130 IWL_ERROR("Error setting RXON_ASSOC "
1131 "configuration (%d).\n", rc);
1135 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1140 /* If we are currently associated and the new config requires
1141 * an RXON_ASSOC and the new config wants the associated mask enabled,
1142 * we must clear the associated from the active configuration
1143 * before we apply the new config */
1144 if (iwl3945_is_associated(priv) &&
1145 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1146 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1147 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1149 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1150 sizeof(struct iwl3945_rxon_cmd),
1151 &priv->active_rxon);
1153 /* If the mask clearing failed then we set
1154 * active_rxon back to what it was previously */
1156 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1157 IWL_ERROR("Error clearing ASSOC_MSK on current "
1158 "configuration (%d).\n", rc);
1163 IWL_DEBUG_INFO("Sending RXON\n"
1164 "* with%s RXON_FILTER_ASSOC_MSK\n"
1167 ((priv->staging_rxon.filter_flags &
1168 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1169 le16_to_cpu(priv->staging_rxon.channel),
1170 print_mac(mac, priv->staging_rxon.bssid_addr));
1172 /* Apply the new configuration */
1173 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1174 sizeof(struct iwl3945_rxon_cmd), &priv->staging_rxon);
1176 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1180 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1182 iwl3945_clear_stations_table(priv);
1184 /* If we issue a new RXON command which required a tune then we must
1185 * send a new TXPOWER command or we won't be able to Tx any frames */
1186 rc = iwl3945_hw_reg_send_txpower(priv);
1188 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1192 /* Add the broadcast address so we can send broadcast frames */
1193 if (iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0) ==
1194 IWL_INVALID_STATION) {
1195 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1199 /* If we have set the ASSOC_MSK and we are in BSS mode then
1200 * add the IWL_AP_ID to the station rate table */
1201 if (iwl3945_is_associated(priv) &&
1202 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
1203 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
1204 == IWL_INVALID_STATION) {
1205 IWL_ERROR("Error adding AP address for transmit.\n");
1209 /* Init the hardware's rate fallback order based on the band */
1210 rc = iwl3945_init_hw_rate_table(priv);
1212 IWL_ERROR("Error setting HW rate table: %02X\n", rc);
1219 static int iwl3945_send_bt_config(struct iwl3945_priv *priv)
1221 struct iwl3945_bt_cmd bt_cmd = {
1229 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1230 sizeof(struct iwl3945_bt_cmd), &bt_cmd);
1233 static int iwl3945_send_scan_abort(struct iwl3945_priv *priv)
1236 struct iwl3945_rx_packet *res;
1237 struct iwl3945_host_cmd cmd = {
1238 .id = REPLY_SCAN_ABORT_CMD,
1239 .meta.flags = CMD_WANT_SKB,
1242 /* If there isn't a scan actively going on in the hardware
1243 * then we are in between scan bands and not actually
1244 * actively scanning, so don't send the abort command */
1245 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1246 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1250 rc = iwl3945_send_cmd_sync(priv, &cmd);
1252 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1256 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1257 if (res->u.status != CAN_ABORT_STATUS) {
1258 /* The scan abort will return 1 for success or
1259 * 2 for "failure". A failure condition can be
1260 * due to simply not being in an active scan which
1261 * can occur if we send the scan abort before we
1262 * the microcode has notified us that a scan is
1264 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1265 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1266 clear_bit(STATUS_SCAN_HW, &priv->status);
1269 dev_kfree_skb_any(cmd.meta.u.skb);
1274 static int iwl3945_card_state_sync_callback(struct iwl3945_priv *priv,
1275 struct iwl3945_cmd *cmd,
1276 struct sk_buff *skb)
1284 * Use: Sets the device's internal card state to enable, disable, or halt
1286 * When in the 'enable' state the card operates as normal.
1287 * When in the 'disable' state, the card enters into a low power mode.
1288 * When in the 'halt' state, the card is shut down and must be fully
1289 * restarted to come back on.
1291 static int iwl3945_send_card_state(struct iwl3945_priv *priv, u32 flags, u8 meta_flag)
1293 struct iwl3945_host_cmd cmd = {
1294 .id = REPLY_CARD_STATE_CMD,
1297 .meta.flags = meta_flag,
1300 if (meta_flag & CMD_ASYNC)
1301 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
1303 return iwl3945_send_cmd(priv, &cmd);
1306 static int iwl3945_add_sta_sync_callback(struct iwl3945_priv *priv,
1307 struct iwl3945_cmd *cmd, struct sk_buff *skb)
1309 struct iwl3945_rx_packet *res = NULL;
1312 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1316 res = (struct iwl3945_rx_packet *)skb->data;
1317 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1318 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1323 switch (res->u.add_sta.status) {
1324 case ADD_STA_SUCCESS_MSK:
1330 /* We didn't cache the SKB; let the caller free it */
1334 int iwl3945_send_add_station(struct iwl3945_priv *priv,
1335 struct iwl3945_addsta_cmd *sta, u8 flags)
1337 struct iwl3945_rx_packet *res = NULL;
1339 struct iwl3945_host_cmd cmd = {
1340 .id = REPLY_ADD_STA,
1341 .len = sizeof(struct iwl3945_addsta_cmd),
1342 .meta.flags = flags,
1346 if (flags & CMD_ASYNC)
1347 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
1349 cmd.meta.flags |= CMD_WANT_SKB;
1351 rc = iwl3945_send_cmd(priv, &cmd);
1353 if (rc || (flags & CMD_ASYNC))
1356 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1357 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1358 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1364 switch (res->u.add_sta.status) {
1365 case ADD_STA_SUCCESS_MSK:
1366 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1370 IWL_WARNING("REPLY_ADD_STA failed\n");
1375 priv->alloc_rxb_skb--;
1376 dev_kfree_skb_any(cmd.meta.u.skb);
1381 static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv,
1382 struct ieee80211_key_conf *keyconf,
1385 unsigned long flags;
1386 __le16 key_flags = 0;
1388 switch (keyconf->alg) {
1390 key_flags |= STA_KEY_FLG_CCMP;
1391 key_flags |= cpu_to_le16(
1392 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1393 key_flags &= ~STA_KEY_FLG_INVALID;
1400 spin_lock_irqsave(&priv->sta_lock, flags);
1401 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1402 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1403 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1406 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1408 priv->stations[sta_id].sta.key.key_flags = key_flags;
1409 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1410 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1412 spin_unlock_irqrestore(&priv->sta_lock, flags);
1414 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1415 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1419 static int iwl3945_clear_sta_key_info(struct iwl3945_priv *priv, u8 sta_id)
1421 unsigned long flags;
1423 spin_lock_irqsave(&priv->sta_lock, flags);
1424 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1425 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl3945_keyinfo));
1426 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1427 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1428 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1429 spin_unlock_irqrestore(&priv->sta_lock, flags);
1431 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1432 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1436 static void iwl3945_clear_free_frames(struct iwl3945_priv *priv)
1438 struct list_head *element;
1440 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1441 priv->frames_count);
1443 while (!list_empty(&priv->free_frames)) {
1444 element = priv->free_frames.next;
1446 kfree(list_entry(element, struct iwl3945_frame, list));
1447 priv->frames_count--;
1450 if (priv->frames_count) {
1451 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1452 priv->frames_count);
1453 priv->frames_count = 0;
1457 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv)
1459 struct iwl3945_frame *frame;
1460 struct list_head *element;
1461 if (list_empty(&priv->free_frames)) {
1462 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1464 IWL_ERROR("Could not allocate frame!\n");
1468 priv->frames_count++;
1472 element = priv->free_frames.next;
1474 return list_entry(element, struct iwl3945_frame, list);
1477 static void iwl3945_free_frame(struct iwl3945_priv *priv, struct iwl3945_frame *frame)
1479 memset(frame, 0, sizeof(*frame));
1480 list_add(&frame->list, &priv->free_frames);
1483 unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv,
1484 struct ieee80211_hdr *hdr,
1485 const u8 *dest, int left)
1488 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
1489 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1490 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1493 if (priv->ibss_beacon->len > left)
1496 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1498 return priv->ibss_beacon->len;
1501 static u8 iwl3945_rate_get_lowest_plcp(int rate_mask)
1505 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1506 i = iwl3945_rates[i].next_ieee) {
1507 if (rate_mask & (1 << i))
1508 return iwl3945_rates[i].plcp;
1511 return IWL_RATE_INVALID;
1514 static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv)
1516 struct iwl3945_frame *frame;
1517 unsigned int frame_size;
1521 frame = iwl3945_get_free_frame(priv);
1524 IWL_ERROR("Could not obtain free frame buffer for beacon "
1529 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
1530 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic &
1532 if (rate == IWL_INVALID_RATE)
1533 rate = IWL_RATE_6M_PLCP;
1535 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
1536 if (rate == IWL_INVALID_RATE)
1537 rate = IWL_RATE_1M_PLCP;
1540 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
1542 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1545 iwl3945_free_frame(priv, frame);
1550 /******************************************************************************
1552 * EEPROM related functions
1554 ******************************************************************************/
1556 static void get_eeprom_mac(struct iwl3945_priv *priv, u8 *mac)
1558 memcpy(mac, priv->eeprom.mac_address, 6);
1562 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1563 * embedded controller) as EEPROM reader; each read is a series of pulses
1564 * to/from the EEPROM chip, not a single event, so even reads could conflict
1565 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1566 * simply claims ownership, which should be safe when this function is called
1567 * (i.e. before loading uCode!).
1569 static inline int iwl3945_eeprom_acquire_semaphore(struct iwl3945_priv *priv)
1571 _iwl3945_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1576 * iwl3945_eeprom_init - read EEPROM contents
1578 * Load the EEPROM contents from adapter into priv->eeprom
1580 * NOTE: This routine uses the non-debug IO access functions.
1582 int iwl3945_eeprom_init(struct iwl3945_priv *priv)
1584 u16 *e = (u16 *)&priv->eeprom;
1585 u32 gp = iwl3945_read32(priv, CSR_EEPROM_GP);
1587 int sz = sizeof(priv->eeprom);
1592 /* The EEPROM structure has several padding buffers within it
1593 * and when adding new EEPROM maps is subject to programmer errors
1594 * which may be very difficult to identify without explicitly
1595 * checking the resulting size of the eeprom map. */
1596 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1598 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1599 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1603 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1604 rc = iwl3945_eeprom_acquire_semaphore(priv);
1606 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
1610 /* eeprom is an array of 16bit values */
1611 for (addr = 0; addr < sz; addr += sizeof(u16)) {
1612 _iwl3945_write32(priv, CSR_EEPROM_REG, addr << 1);
1613 _iwl3945_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1615 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1616 i += IWL_EEPROM_ACCESS_DELAY) {
1617 r = _iwl3945_read_direct32(priv, CSR_EEPROM_REG);
1618 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1620 udelay(IWL_EEPROM_ACCESS_DELAY);
1623 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1624 IWL_ERROR("Time out reading EEPROM[%d]", addr);
1627 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
1633 /******************************************************************************
1635 * Misc. internal state and helper functions
1637 ******************************************************************************/
1638 #ifdef CONFIG_IWL3945_DEBUG
1641 * iwl3945_report_frame - dump frame to syslog during debug sessions
1643 * You may hack this function to show different aspects of received frames,
1644 * including selective frame dumps.
1645 * group100 parameter selects whether to show 1 out of 100 good frames.
1647 void iwl3945_report_frame(struct iwl3945_priv *priv,
1648 struct iwl3945_rx_packet *pkt,
1649 struct ieee80211_hdr *header, int group100)
1652 u32 print_summary = 0;
1653 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
1670 struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
1671 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
1672 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
1673 u8 *data = IWL_RX_DATA(pkt);
1676 fc = le16_to_cpu(header->frame_control);
1677 seq_ctl = le16_to_cpu(header->seq_ctrl);
1680 channel = le16_to_cpu(rx_hdr->channel);
1681 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
1682 rate_sym = rx_hdr->rate;
1683 length = le16_to_cpu(rx_hdr->len);
1685 /* end-of-frame status and timestamp */
1686 status = le32_to_cpu(rx_end->status);
1687 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
1688 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
1689 tsf = le64_to_cpu(rx_end->timestamp);
1691 /* signal statistics */
1692 rssi = rx_stats->rssi;
1693 agc = rx_stats->agc;
1694 sig_avg = le16_to_cpu(rx_stats->sig_avg);
1695 noise_diff = le16_to_cpu(rx_stats->noise_diff);
1697 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
1699 /* if data frame is to us and all is good,
1700 * (optionally) print summary for only 1 out of every 100 */
1701 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
1702 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
1705 print_summary = 1; /* print each frame */
1706 else if (priv->framecnt_to_us < 100) {
1707 priv->framecnt_to_us++;
1710 priv->framecnt_to_us = 0;
1715 /* print summary for all other frames */
1719 if (print_summary) {
1724 title = "100Frames";
1725 else if (fc & IEEE80211_FCTL_RETRY)
1727 else if (ieee80211_is_assoc_response(fc))
1729 else if (ieee80211_is_reassoc_response(fc))
1731 else if (ieee80211_is_probe_response(fc)) {
1733 print_dump = 1; /* dump frame contents */
1734 } else if (ieee80211_is_beacon(fc)) {
1736 print_dump = 1; /* dump frame contents */
1737 } else if (ieee80211_is_atim(fc))
1739 else if (ieee80211_is_auth(fc))
1741 else if (ieee80211_is_deauth(fc))
1743 else if (ieee80211_is_disassoc(fc))
1748 rate = iwl3945_rate_index_from_plcp(rate_sym);
1752 rate = iwl3945_rates[rate].ieee / 2;
1754 /* print frame summary.
1755 * MAC addresses show just the last byte (for brevity),
1756 * but you can hack it to show more, if you'd like to. */
1758 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
1759 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
1760 title, fc, header->addr1[5],
1761 length, rssi, channel, rate);
1763 /* src/dst addresses assume managed mode */
1764 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
1765 "src=0x%02x, rssi=%u, tim=%lu usec, "
1766 "phy=0x%02x, chnl=%d\n",
1767 title, fc, header->addr1[5],
1768 header->addr3[5], rssi,
1769 tsf_low - priv->scan_start_tsf,
1770 phy_flags, channel);
1774 iwl3945_print_hex_dump(IWL_DL_RX, data, length);
1778 static void iwl3945_unset_hw_setting(struct iwl3945_priv *priv)
1780 if (priv->hw_setting.shared_virt)
1781 pci_free_consistent(priv->pci_dev,
1782 sizeof(struct iwl3945_shared),
1783 priv->hw_setting.shared_virt,
1784 priv->hw_setting.shared_phys);
1788 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
1790 * return : set the bit for each supported rate insert in ie
1792 static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1793 u16 basic_rate, int *left)
1795 u16 ret_rates = 0, bit;
1800 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1801 if (bit & supported_rate) {
1803 rates[*cnt] = iwl3945_rates[i].ieee |
1804 ((bit & basic_rate) ? 0x80 : 0x00);
1808 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1817 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
1819 static u16 iwl3945_fill_probe_req(struct iwl3945_priv *priv,
1820 struct ieee80211_mgmt *frame,
1821 int left, int is_direct)
1825 u16 active_rates, ret_rates, cck_rates;
1827 /* Make sure there is enough space for the probe request,
1828 * two mandatory IEs and the data */
1834 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1835 memcpy(frame->da, iwl3945_broadcast_addr, ETH_ALEN);
1836 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1837 memcpy(frame->bssid, iwl3945_broadcast_addr, ETH_ALEN);
1838 frame->seq_ctrl = 0;
1840 /* fill in our indirect SSID IE */
1847 pos = &(frame->u.probe_req.variable[0]);
1848 *pos++ = WLAN_EID_SSID;
1851 /* fill in our direct SSID IE... */
1854 left -= 2 + priv->essid_len;
1857 /* ... fill it in... */
1858 *pos++ = WLAN_EID_SSID;
1859 *pos++ = priv->essid_len;
1860 memcpy(pos, priv->essid, priv->essid_len);
1861 pos += priv->essid_len;
1862 len += 2 + priv->essid_len;
1865 /* fill in supported rate */
1871 /* ... fill it in... */
1872 *pos++ = WLAN_EID_SUPP_RATES;
1875 priv->active_rate = priv->rates_mask;
1876 active_rates = priv->active_rate;
1877 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1879 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1880 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
1881 priv->active_rate_basic, &left);
1882 active_rates &= ~ret_rates;
1884 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
1885 priv->active_rate_basic, &left);
1886 active_rates &= ~ret_rates;
1890 if (active_rates == 0)
1893 /* fill in supported extended rate */
1898 /* ... fill it in... */
1899 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1901 iwl3945_supported_rate_to_ie(pos, active_rates,
1902 priv->active_rate_basic, &left);
1913 #ifdef CONFIG_IWL3945_QOS
1914 static int iwl3945_send_qos_params_command(struct iwl3945_priv *priv,
1915 struct iwl3945_qosparam_cmd *qos)
1918 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1919 sizeof(struct iwl3945_qosparam_cmd), qos);
1922 static void iwl3945_reset_qos(struct iwl3945_priv *priv)
1928 unsigned long flags;
1931 spin_lock_irqsave(&priv->lock, flags);
1932 priv->qos_data.qos_active = 0;
1934 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
1935 if (priv->qos_data.qos_enable)
1936 priv->qos_data.qos_active = 1;
1937 if (!(priv->active_rate & 0xfff0)) {
1941 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1942 if (priv->qos_data.qos_enable)
1943 priv->qos_data.qos_active = 1;
1944 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
1949 if (priv->qos_data.qos_active)
1952 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1953 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1954 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1955 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1956 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1958 if (priv->qos_data.qos_active) {
1960 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1961 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1962 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1963 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1964 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1967 priv->qos_data.def_qos_parm.ac[i].cw_min =
1968 cpu_to_le16((cw_min + 1) / 2 - 1);
1969 priv->qos_data.def_qos_parm.ac[i].cw_max =
1970 cpu_to_le16(cw_max);
1971 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1973 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1976 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1978 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1981 priv->qos_data.def_qos_parm.ac[i].cw_min =
1982 cpu_to_le16((cw_min + 1) / 4 - 1);
1983 priv->qos_data.def_qos_parm.ac[i].cw_max =
1984 cpu_to_le16((cw_max + 1) / 2 - 1);
1985 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1986 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1988 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1991 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1994 for (i = 1; i < 4; i++) {
1995 priv->qos_data.def_qos_parm.ac[i].cw_min =
1996 cpu_to_le16(cw_min);
1997 priv->qos_data.def_qos_parm.ac[i].cw_max =
1998 cpu_to_le16(cw_max);
1999 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
2000 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
2001 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2004 IWL_DEBUG_QOS("set QoS to default \n");
2006 spin_unlock_irqrestore(&priv->lock, flags);
2009 static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force)
2011 unsigned long flags;
2013 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2016 if (!priv->qos_data.qos_enable)
2019 spin_lock_irqsave(&priv->lock, flags);
2020 priv->qos_data.def_qos_parm.qos_flags = 0;
2022 if (priv->qos_data.qos_cap.q_AP.queue_request &&
2023 !priv->qos_data.qos_cap.q_AP.txop_request)
2024 priv->qos_data.def_qos_parm.qos_flags |=
2025 QOS_PARAM_FLG_TXOP_TYPE_MSK;
2027 if (priv->qos_data.qos_active)
2028 priv->qos_data.def_qos_parm.qos_flags |=
2029 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
2031 spin_unlock_irqrestore(&priv->lock, flags);
2033 if (force || iwl3945_is_associated(priv)) {
2034 IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
2035 priv->qos_data.qos_active);
2037 iwl3945_send_qos_params_command(priv,
2038 &(priv->qos_data.def_qos_parm));
2042 #endif /* CONFIG_IWL3945_QOS */
2044 * Power management (not Tx power!) functions
2046 #define MSEC_TO_USEC 1024
2048 #define NOSLP __constant_cpu_to_le32(0)
2049 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
2050 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
2051 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
2052 __constant_cpu_to_le32(X1), \
2053 __constant_cpu_to_le32(X2), \
2054 __constant_cpu_to_le32(X3), \
2055 __constant_cpu_to_le32(X4)}
2058 /* default power management (not Tx power) table values */
2060 static struct iwl3945_power_vec_entry range_0[IWL_POWER_AC] = {
2061 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2062 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
2063 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
2064 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
2065 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
2066 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
2070 static struct iwl3945_power_vec_entry range_1[IWL_POWER_AC] = {
2071 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2072 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
2073 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
2074 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
2075 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
2076 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
2077 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
2078 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
2079 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
2080 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
2083 int iwl3945_power_init_handle(struct iwl3945_priv *priv)
2086 struct iwl3945_power_mgr *pow_data;
2087 int size = sizeof(struct iwl3945_power_vec_entry) * IWL_POWER_AC;
2090 IWL_DEBUG_POWER("Initialize power \n");
2092 pow_data = &(priv->power_data);
2094 memset(pow_data, 0, sizeof(*pow_data));
2096 pow_data->active_index = IWL_POWER_RANGE_0;
2097 pow_data->dtim_val = 0xffff;
2099 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
2100 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
2102 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
2106 struct iwl3945_powertable_cmd *cmd;
2108 IWL_DEBUG_POWER("adjust power command flags\n");
2110 for (i = 0; i < IWL_POWER_AC; i++) {
2111 cmd = &pow_data->pwr_range_0[i].cmd;
2114 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
2116 cmd->flags |= IWL_POWER_PCI_PM_MSK;
2122 static int iwl3945_update_power_cmd(struct iwl3945_priv *priv,
2123 struct iwl3945_powertable_cmd *cmd, u32 mode)
2128 struct iwl3945_power_vec_entry *range;
2130 struct iwl3945_power_mgr *pow_data;
2132 if (mode > IWL_POWER_INDEX_5) {
2133 IWL_DEBUG_POWER("Error invalid power mode \n");
2136 pow_data = &(priv->power_data);
2138 if (pow_data->active_index == IWL_POWER_RANGE_0)
2139 range = &pow_data->pwr_range_0[0];
2141 range = &pow_data->pwr_range_1[1];
2143 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
2145 #ifdef IWL_MAC80211_DISABLE
2146 if (priv->assoc_network != NULL) {
2147 unsigned long flags;
2149 period = priv->assoc_network->tim.tim_period;
2151 #endif /*IWL_MAC80211_DISABLE */
2152 skip = range[mode].no_dtim;
2161 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
2163 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
2164 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
2165 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
2168 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
2169 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
2170 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
2173 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
2174 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
2175 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
2176 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
2177 le32_to_cpu(cmd->sleep_interval[0]),
2178 le32_to_cpu(cmd->sleep_interval[1]),
2179 le32_to_cpu(cmd->sleep_interval[2]),
2180 le32_to_cpu(cmd->sleep_interval[3]),
2181 le32_to_cpu(cmd->sleep_interval[4]));
2186 static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode)
2188 u32 uninitialized_var(final_mode);
2190 struct iwl3945_powertable_cmd cmd;
2192 /* If on battery, set to 3,
2193 * if plugged into AC power, set to CAM ("continuously aware mode"),
2194 * else user level */
2196 case IWL_POWER_BATTERY:
2197 final_mode = IWL_POWER_INDEX_3;
2200 final_mode = IWL_POWER_MODE_CAM;
2207 iwl3945_update_power_cmd(priv, &cmd, final_mode);
2209 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
2211 if (final_mode == IWL_POWER_MODE_CAM)
2212 clear_bit(STATUS_POWER_PMI, &priv->status);
2214 set_bit(STATUS_POWER_PMI, &priv->status);
2219 int iwl3945_is_network_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
2221 /* Filter incoming packets to determine if they are targeted toward
2222 * this network, discarding packets coming from ourselves */
2223 switch (priv->iw_mode) {
2224 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2225 /* packets from our adapter are dropped (echo) */
2226 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2228 /* {broad,multi}cast packets to our IBSS go through */
2229 if (is_multicast_ether_addr(header->addr1))
2230 return !compare_ether_addr(header->addr3, priv->bssid);
2231 /* packets to our adapter go through */
2232 return !compare_ether_addr(header->addr1, priv->mac_addr);
2233 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2234 /* packets from our adapter are dropped (echo) */
2235 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2237 /* {broad,multi}cast packets to our BSS go through */
2238 if (is_multicast_ether_addr(header->addr1))
2239 return !compare_ether_addr(header->addr2, priv->bssid);
2240 /* packets to our adapter go through */
2241 return !compare_ether_addr(header->addr1, priv->mac_addr);
2247 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2249 static const char *iwl3945_get_tx_fail_reason(u32 status)
2251 switch (status & TX_STATUS_MSK) {
2252 case TX_STATUS_SUCCESS:
2254 TX_STATUS_ENTRY(SHORT_LIMIT);
2255 TX_STATUS_ENTRY(LONG_LIMIT);
2256 TX_STATUS_ENTRY(FIFO_UNDERRUN);
2257 TX_STATUS_ENTRY(MGMNT_ABORT);
2258 TX_STATUS_ENTRY(NEXT_FRAG);
2259 TX_STATUS_ENTRY(LIFE_EXPIRE);
2260 TX_STATUS_ENTRY(DEST_PS);
2261 TX_STATUS_ENTRY(ABORTED);
2262 TX_STATUS_ENTRY(BT_RETRY);
2263 TX_STATUS_ENTRY(STA_INVALID);
2264 TX_STATUS_ENTRY(FRAG_DROPPED);
2265 TX_STATUS_ENTRY(TID_DISABLE);
2266 TX_STATUS_ENTRY(FRAME_FLUSHED);
2267 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
2268 TX_STATUS_ENTRY(TX_LOCKED);
2269 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
2276 * iwl3945_scan_cancel - Cancel any currently executing HW scan
2278 * NOTE: priv->mutex is not required before calling this function
2280 static int iwl3945_scan_cancel(struct iwl3945_priv *priv)
2282 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2283 clear_bit(STATUS_SCANNING, &priv->status);
2287 if (test_bit(STATUS_SCANNING, &priv->status)) {
2288 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2289 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2290 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2291 queue_work(priv->workqueue, &priv->abort_scan);
2294 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2296 return test_bit(STATUS_SCANNING, &priv->status);
2303 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
2304 * @ms: amount of time to wait (in milliseconds) for scan to abort
2306 * NOTE: priv->mutex must be held before calling this function
2308 static int iwl3945_scan_cancel_timeout(struct iwl3945_priv *priv, unsigned long ms)
2310 unsigned long now = jiffies;
2313 ret = iwl3945_scan_cancel(priv);
2315 mutex_unlock(&priv->mutex);
2316 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2317 test_bit(STATUS_SCANNING, &priv->status))
2319 mutex_lock(&priv->mutex);
2321 return test_bit(STATUS_SCANNING, &priv->status);
2327 static void iwl3945_sequence_reset(struct iwl3945_priv *priv)
2329 /* Reset ieee stats */
2331 /* We don't reset the net_device_stats (ieee->stats) on
2334 priv->last_seq_num = -1;
2335 priv->last_frag_num = -1;
2336 priv->last_packet_time = 0;
2338 iwl3945_scan_cancel(priv);
2341 #define MAX_UCODE_BEACON_INTERVAL 1024
2342 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2344 static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
2347 u16 beacon_factor = 0;
2350 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2351 / MAX_UCODE_BEACON_INTERVAL;
2352 new_val = beacon_val / beacon_factor;
2354 return cpu_to_le16(new_val);
2357 static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv)
2359 u64 interval_tm_unit;
2361 unsigned long flags;
2362 struct ieee80211_conf *conf = NULL;
2365 conf = ieee80211_get_hw_conf(priv->hw);
2367 spin_lock_irqsave(&priv->lock, flags);
2368 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2369 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2371 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2373 tsf = priv->timestamp1;
2374 tsf = ((tsf << 32) | priv->timestamp0);
2376 beacon_int = priv->beacon_int;
2377 spin_unlock_irqrestore(&priv->lock, flags);
2379 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2380 if (beacon_int == 0) {
2381 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2382 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2384 priv->rxon_timing.beacon_interval =
2385 cpu_to_le16(beacon_int);
2386 priv->rxon_timing.beacon_interval =
2387 iwl3945_adjust_beacon_interval(
2388 le16_to_cpu(priv->rxon_timing.beacon_interval));
2391 priv->rxon_timing.atim_window = 0;
2393 priv->rxon_timing.beacon_interval =
2394 iwl3945_adjust_beacon_interval(conf->beacon_int);
2395 /* TODO: we need to get atim_window from upper stack
2396 * for now we set to 0 */
2397 priv->rxon_timing.atim_window = 0;
2401 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2402 result = do_div(tsf, interval_tm_unit);
2403 priv->rxon_timing.beacon_init_val =
2404 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2407 ("beacon interval %d beacon timer %d beacon tim %d\n",
2408 le16_to_cpu(priv->rxon_timing.beacon_interval),
2409 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2410 le16_to_cpu(priv->rxon_timing.atim_window));
2413 static int iwl3945_scan_initiate(struct iwl3945_priv *priv)
2415 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2416 IWL_ERROR("APs don't scan.\n");
2420 if (!iwl3945_is_ready_rf(priv)) {
2421 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2425 if (test_bit(STATUS_SCANNING, &priv->status)) {
2426 IWL_DEBUG_SCAN("Scan already in progress.\n");
2430 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2431 IWL_DEBUG_SCAN("Scan request while abort pending. "
2436 IWL_DEBUG_INFO("Starting scan...\n");
2437 priv->scan_bands = 2;
2438 set_bit(STATUS_SCANNING, &priv->status);
2439 priv->scan_start = jiffies;
2440 priv->scan_pass_start = priv->scan_start;
2442 queue_work(priv->workqueue, &priv->request_scan);
2447 static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt)
2449 struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
2452 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2454 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2459 static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv,
2460 enum ieee80211_band band)
2462 if (band == IEEE80211_BAND_5GHZ) {
2463 priv->staging_rxon.flags &=
2464 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2465 | RXON_FLG_CCK_MSK);
2466 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2468 /* Copied from iwl3945_bg_post_associate() */
2469 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2470 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2472 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2474 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2475 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2477 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2478 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2479 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2484 * initialize rxon structure with default values from eeprom
2486 static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv)
2488 const struct iwl3945_channel_info *ch_info;
2490 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2492 switch (priv->iw_mode) {
2493 case IEEE80211_IF_TYPE_AP:
2494 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2497 case IEEE80211_IF_TYPE_STA:
2498 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2499 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2502 case IEEE80211_IF_TYPE_IBSS:
2503 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2504 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2505 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2506 RXON_FILTER_ACCEPT_GRP_MSK;
2509 case IEEE80211_IF_TYPE_MNTR:
2510 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2511 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2512 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2517 /* TODO: Figure out when short_preamble would be set and cache from
2519 if (!hw_to_local(priv->hw)->short_preamble)
2520 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2522 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2525 ch_info = iwl3945_get_channel_info(priv, priv->band,
2526 le16_to_cpu(priv->staging_rxon.channel));
2529 ch_info = &priv->channel_info[0];
2532 * in some case A channels are all non IBSS
2533 * in this case force B/G channel
2535 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2536 !(is_channel_ibss(ch_info)))
2537 ch_info = &priv->channel_info[0];
2539 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2540 if (is_channel_a_band(ch_info))
2541 priv->band = IEEE80211_BAND_5GHZ;
2543 priv->band = IEEE80211_BAND_2GHZ;
2545 iwl3945_set_flags_for_phymode(priv, priv->band);
2547 priv->staging_rxon.ofdm_basic_rates =
2548 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2549 priv->staging_rxon.cck_basic_rates =
2550 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2553 static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode)
2555 if (mode == IEEE80211_IF_TYPE_IBSS) {
2556 const struct iwl3945_channel_info *ch_info;
2558 ch_info = iwl3945_get_channel_info(priv,
2560 le16_to_cpu(priv->staging_rxon.channel));
2562 if (!ch_info || !is_channel_ibss(ch_info)) {
2563 IWL_ERROR("channel %d not IBSS channel\n",
2564 le16_to_cpu(priv->staging_rxon.channel));
2569 priv->iw_mode = mode;
2571 iwl3945_connection_init_rx_config(priv);
2572 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2574 iwl3945_clear_stations_table(priv);
2576 /* dont commit rxon if rf-kill is on*/
2577 if (!iwl3945_is_ready_rf(priv))
2580 cancel_delayed_work(&priv->scan_check);
2581 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2582 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2583 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2587 iwl3945_commit_rxon(priv);
2592 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv,
2593 struct ieee80211_tx_control *ctl,
2594 struct iwl3945_cmd *cmd,
2595 struct sk_buff *skb_frag,
2598 struct iwl3945_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
2600 switch (keyinfo->alg) {
2602 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2603 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2604 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2609 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2612 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2615 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2620 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2621 (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2623 if (keyinfo->keylen == 13)
2624 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2626 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2628 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2629 "with key %d\n", ctl->key_idx);
2633 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2639 * handle build REPLY_TX command notification.
2641 static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
2642 struct iwl3945_cmd *cmd,
2643 struct ieee80211_tx_control *ctrl,
2644 struct ieee80211_hdr *hdr,
2645 int is_unicast, u8 std_id)
2648 u16 fc = le16_to_cpu(hdr->frame_control);
2649 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2651 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2652 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2653 tx_flags |= TX_CMD_FLG_ACK_MSK;
2654 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2655 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2656 if (ieee80211_is_probe_response(fc) &&
2657 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2658 tx_flags |= TX_CMD_FLG_TSF_MSK;
2660 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2661 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2664 cmd->cmd.tx.sta_id = std_id;
2665 if (ieee80211_get_morefrag(hdr))
2666 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2668 qc = ieee80211_get_qos_ctrl(hdr);
2670 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2671 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2673 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2675 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2676 tx_flags |= TX_CMD_FLG_RTS_MSK;
2677 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2678 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2679 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2680 tx_flags |= TX_CMD_FLG_CTS_MSK;
2683 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2684 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2686 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2687 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2688 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2689 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
2690 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2692 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2694 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2696 cmd->cmd.tx.driver_txop = 0;
2697 cmd->cmd.tx.tx_flags = tx_flags;
2698 cmd->cmd.tx.next_frame_len = 0;
2702 * iwl3945_get_sta_id - Find station's index within station table
2704 static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *hdr)
2707 u16 fc = le16_to_cpu(hdr->frame_control);
2709 /* If this frame is broadcast or management, use broadcast station id */
2710 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2711 is_multicast_ether_addr(hdr->addr1))
2712 return priv->hw_setting.bcast_sta_id;
2714 switch (priv->iw_mode) {
2716 /* If we are a client station in a BSS network, use the special
2717 * AP station entry (that's the only station we communicate with) */
2718 case IEEE80211_IF_TYPE_STA:
2721 /* If we are an AP, then find the station, or use BCAST */
2722 case IEEE80211_IF_TYPE_AP:
2723 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2724 if (sta_id != IWL_INVALID_STATION)
2726 return priv->hw_setting.bcast_sta_id;
2728 /* If this frame is going out to an IBSS network, find the station,
2729 * or create a new station table entry */
2730 case IEEE80211_IF_TYPE_IBSS: {
2731 DECLARE_MAC_BUF(mac);
2733 /* Create new station table entry */
2734 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2735 if (sta_id != IWL_INVALID_STATION)
2738 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
2740 if (sta_id != IWL_INVALID_STATION)
2743 IWL_DEBUG_DROP("Station %s not in station map. "
2744 "Defaulting to broadcast...\n",
2745 print_mac(mac, hdr->addr1));
2746 iwl3945_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2747 return priv->hw_setting.bcast_sta_id;
2750 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
2751 return priv->hw_setting.bcast_sta_id;
2756 * start REPLY_TX command process
2758 static int iwl3945_tx_skb(struct iwl3945_priv *priv,
2759 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2761 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2762 struct iwl3945_tfd_frame *tfd;
2764 int txq_id = ctl->queue;
2765 struct iwl3945_tx_queue *txq = NULL;
2766 struct iwl3945_queue *q = NULL;
2767 dma_addr_t phys_addr;
2768 dma_addr_t txcmd_phys;
2769 struct iwl3945_cmd *out_cmd = NULL;
2770 u16 len, idx, len_org;
2771 u8 id, hdr_len, unicast;
2776 u8 wait_write_ptr = 0;
2777 unsigned long flags;
2780 spin_lock_irqsave(&priv->lock, flags);
2781 if (iwl3945_is_rfkill(priv)) {
2782 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2787 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
2791 if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
2792 IWL_ERROR("ERROR: No TX rate available.\n");
2796 unicast = !is_multicast_ether_addr(hdr->addr1);
2799 fc = le16_to_cpu(hdr->frame_control);
2801 #ifdef CONFIG_IWL3945_DEBUG
2802 if (ieee80211_is_auth(fc))
2803 IWL_DEBUG_TX("Sending AUTH frame\n");
2804 else if (ieee80211_is_assoc_request(fc))
2805 IWL_DEBUG_TX("Sending ASSOC frame\n");
2806 else if (ieee80211_is_reassoc_request(fc))
2807 IWL_DEBUG_TX("Sending REASSOC frame\n");
2810 /* drop all data frame if we are not associated */
2811 if ((!iwl3945_is_associated(priv) ||
2812 ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id)) &&
2813 ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
2814 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
2818 spin_unlock_irqrestore(&priv->lock, flags);
2820 hdr_len = ieee80211_get_hdrlen(fc);
2822 /* Find (or create) index into station table for destination station */
2823 sta_id = iwl3945_get_sta_id(priv, hdr);
2824 if (sta_id == IWL_INVALID_STATION) {
2825 DECLARE_MAC_BUF(mac);
2827 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2828 print_mac(mac, hdr->addr1));
2832 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2834 qc = ieee80211_get_qos_ctrl(hdr);
2836 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2837 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2839 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2841 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2845 /* Descriptor for chosen Tx queue */
2846 txq = &priv->txq[txq_id];
2849 spin_lock_irqsave(&priv->lock, flags);
2851 /* Set up first empty TFD within this queue's circular TFD buffer */
2852 tfd = &txq->bd[q->write_ptr];
2853 memset(tfd, 0, sizeof(*tfd));
2854 control_flags = (u32 *) tfd;
2855 idx = get_cmd_index(q, q->write_ptr, 0);
2857 /* Set up driver data for this TFD */
2858 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
2859 txq->txb[q->write_ptr].skb[0] = skb;
2860 memcpy(&(txq->txb[q->write_ptr].status.control),
2861 ctl, sizeof(struct ieee80211_tx_control));
2863 /* Init first empty entry in queue's array of Tx/cmd buffers */
2864 out_cmd = &txq->cmd[idx];
2865 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2866 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
2869 * Set up the Tx-command (not MAC!) header.
2870 * Store the chosen Tx queue and TFD index within the sequence field;
2871 * after Tx, uCode's Tx response will return this value so driver can
2872 * locate the frame within the tx queue and do post-tx processing.
2874 out_cmd->hdr.cmd = REPLY_TX;
2875 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2876 INDEX_TO_SEQ(q->write_ptr)));
2878 /* Copy MAC header from skb into command buffer */
2879 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2882 * Use the first empty entry in this queue's command buffer array
2883 * to contain the Tx command and MAC header concatenated together
2884 * (payload data will be in another buffer).
2885 * Size of this varies, due to varying MAC header length.
2886 * If end is not dword aligned, we'll have 2 extra bytes at the end
2887 * of the MAC header (device reads on dword boundaries).
2888 * We'll tell device about this padding later.
2890 len = priv->hw_setting.tx_cmd_len +
2891 sizeof(struct iwl3945_cmd_header) + hdr_len;
2894 len = (len + 3) & ~3;
2901 /* Physical address of this Tx command's header (not MAC header!),
2902 * within command buffer array. */
2903 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
2904 offsetof(struct iwl3945_cmd, hdr);
2906 /* Add buffer containing Tx command and MAC(!) header to TFD's
2908 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
2910 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
2911 iwl3945_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
2913 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2914 * if any (802.11 null frames have no payload). */
2915 len = skb->len - hdr_len;
2917 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2918 len, PCI_DMA_TODEVICE);
2919 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
2923 /* If there is no payload, then we use only one Tx buffer */
2924 *control_flags = TFD_CTL_COUNT_SET(1);
2926 /* Else use 2 buffers.
2927 * Tell 3945 about any padding after MAC header */
2928 *control_flags = TFD_CTL_COUNT_SET(2) |
2929 TFD_CTL_PAD_SET(U32_PAD(len));
2931 /* Total # bytes to be transmitted */
2932 len = (u16)skb->len;
2933 out_cmd->cmd.tx.len = cpu_to_le16(len);
2935 /* TODO need this for burst mode later on */
2936 iwl3945_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
2938 /* set is_hcca to 0; it probably will never be implemented */
2939 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
2941 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2942 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2944 if (!ieee80211_get_morefrag(hdr)) {
2945 txq->need_update = 1;
2947 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2948 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2952 txq->need_update = 0;
2955 iwl3945_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
2956 sizeof(out_cmd->cmd.tx));
2958 iwl3945_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
2959 ieee80211_get_hdrlen(fc));
2961 /* Tell device the write index *just past* this latest filled TFD */
2962 q->write_ptr = iwl3945_queue_inc_wrap(q->write_ptr, q->n_bd);
2963 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
2964 spin_unlock_irqrestore(&priv->lock, flags);
2969 if ((iwl3945_queue_space(q) < q->high_mark)
2970 && priv->mac80211_registered) {
2971 if (wait_write_ptr) {
2972 spin_lock_irqsave(&priv->lock, flags);
2973 txq->need_update = 1;
2974 iwl3945_tx_queue_update_write_ptr(priv, txq);
2975 spin_unlock_irqrestore(&priv->lock, flags);
2978 ieee80211_stop_queue(priv->hw, ctl->queue);
2984 spin_unlock_irqrestore(&priv->lock, flags);
2989 static void iwl3945_set_rate(struct iwl3945_priv *priv)
2991 const struct ieee80211_supported_band *sband = NULL;
2992 struct ieee80211_rate *rate;
2995 sband = iwl3945_get_band(priv, priv->band);
2997 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
3001 priv->active_rate = 0;
3002 priv->active_rate_basic = 0;
3004 IWL_DEBUG_RATE("Setting rates for %s GHz\n",
3005 sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
3007 for (i = 0; i < sband->n_bitrates; i++) {
3008 rate = &sband->bitrates[i];
3009 if ((rate->hw_value < IWL_RATE_COUNT) &&
3010 !(rate->flags & IEEE80211_CHAN_DISABLED)) {
3011 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
3012 rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
3013 priv->active_rate |= (1 << rate->hw_value);
3017 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
3018 priv->active_rate, priv->active_rate_basic);
3021 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
3022 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
3025 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
3026 priv->staging_rxon.cck_basic_rates =
3027 ((priv->active_rate_basic &
3028 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
3030 priv->staging_rxon.cck_basic_rates =
3031 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
3033 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
3034 priv->staging_rxon.ofdm_basic_rates =
3035 ((priv->active_rate_basic &
3036 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
3037 IWL_FIRST_OFDM_RATE) & 0xFF;
3039 priv->staging_rxon.ofdm_basic_rates =
3040 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
3043 static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio)
3045 unsigned long flags;
3047 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
3050 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
3051 disable_radio ? "OFF" : "ON");
3053 if (disable_radio) {
3054 iwl3945_scan_cancel(priv);
3055 /* FIXME: This is a workaround for AP */
3056 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
3057 spin_lock_irqsave(&priv->lock, flags);
3058 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
3059 CSR_UCODE_SW_BIT_RFKILL);
3060 spin_unlock_irqrestore(&priv->lock, flags);
3061 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
3062 set_bit(STATUS_RF_KILL_SW, &priv->status);
3067 spin_lock_irqsave(&priv->lock, flags);
3068 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3070 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3071 spin_unlock_irqrestore(&priv->lock, flags);
3076 spin_lock_irqsave(&priv->lock, flags);
3077 iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3078 if (!iwl3945_grab_nic_access(priv))
3079 iwl3945_release_nic_access(priv);
3080 spin_unlock_irqrestore(&priv->lock, flags);
3082 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
3083 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
3084 "disabled by HW switch\n");
3088 queue_work(priv->workqueue, &priv->restart);
3092 void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb,
3093 u32 decrypt_res, struct ieee80211_rx_status *stats)
3096 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
3098 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
3101 if (!(fc & IEEE80211_FCTL_PROTECTED))
3104 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
3105 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
3106 case RX_RES_STATUS_SEC_TYPE_TKIP:
3107 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3108 RX_RES_STATUS_BAD_ICV_MIC)
3109 stats->flag |= RX_FLAG_MMIC_ERROR;
3110 case RX_RES_STATUS_SEC_TYPE_WEP:
3111 case RX_RES_STATUS_SEC_TYPE_CCMP:
3112 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3113 RX_RES_STATUS_DECRYPT_OK) {
3114 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
3115 stats->flag |= RX_FLAG_DECRYPTED;
3124 #define IWL_PACKET_RETRY_TIME HZ
3126 int iwl3945_is_duplicate_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
3128 u16 sc = le16_to_cpu(header->seq_ctrl);
3129 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
3130 u16 frag = sc & IEEE80211_SCTL_FRAG;
3131 u16 *last_seq, *last_frag;
3132 unsigned long *last_time;
3134 switch (priv->iw_mode) {
3135 case IEEE80211_IF_TYPE_IBSS:{
3136 struct list_head *p;
3137 struct iwl3945_ibss_seq *entry = NULL;
3138 u8 *mac = header->addr2;
3139 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
3141 __list_for_each(p, &priv->ibss_mac_hash[index]) {
3142 entry = list_entry(p, struct iwl3945_ibss_seq, list);
3143 if (!compare_ether_addr(entry->mac, mac))
3146 if (p == &priv->ibss_mac_hash[index]) {
3147 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
3149 IWL_ERROR("Cannot malloc new mac entry\n");
3152 memcpy(entry->mac, mac, ETH_ALEN);
3153 entry->seq_num = seq;
3154 entry->frag_num = frag;
3155 entry->packet_time = jiffies;
3156 list_add(&entry->list, &priv->ibss_mac_hash[index]);
3159 last_seq = &entry->seq_num;
3160 last_frag = &entry->frag_num;
3161 last_time = &entry->packet_time;
3164 case IEEE80211_IF_TYPE_STA:
3165 last_seq = &priv->last_seq_num;
3166 last_frag = &priv->last_frag_num;
3167 last_time = &priv->last_packet_time;
3172 if ((*last_seq == seq) &&
3173 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
3174 if (*last_frag == frag)
3176 if (*last_frag + 1 != frag)
3177 /* out-of-order fragment */
3183 *last_time = jiffies;
3190 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3192 #include "iwl-spectrum.h"
3194 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
3195 #define BEACON_TIME_MASK_HIGH 0xFF000000
3196 #define TIME_UNIT 1024
3199 * extended beacon time format
3200 * time in usec will be changed into a 32-bit value in 8:24 format
3201 * the high 1 byte is the beacon counts
3202 * the lower 3 bytes is the time in usec within one beacon interval
3205 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
3209 u32 interval = beacon_interval * 1024;
3211 if (!interval || !usec)
3214 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3215 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3217 return (quot << 24) + rem;
3220 /* base is usually what we get from ucode with each received frame,
3221 * the same as HW timer counter counting down
3224 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
3226 u32 base_low = base & BEACON_TIME_MASK_LOW;
3227 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3228 u32 interval = beacon_interval * TIME_UNIT;
3229 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3230 (addon & BEACON_TIME_MASK_HIGH);
3232 if (base_low > addon_low)
3233 res += base_low - addon_low;
3234 else if (base_low < addon_low) {
3235 res += interval + base_low - addon_low;
3240 return cpu_to_le32(res);
3243 static int iwl3945_get_measurement(struct iwl3945_priv *priv,
3244 struct ieee80211_measurement_params *params,
3247 struct iwl3945_spectrum_cmd spectrum;
3248 struct iwl3945_rx_packet *res;
3249 struct iwl3945_host_cmd cmd = {
3250 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3251 .data = (void *)&spectrum,
3252 .meta.flags = CMD_WANT_SKB,
3254 u32 add_time = le64_to_cpu(params->start_time);
3256 int spectrum_resp_status;
3257 int duration = le16_to_cpu(params->duration);
3259 if (iwl3945_is_associated(priv))
3261 iwl3945_usecs_to_beacons(
3262 le64_to_cpu(params->start_time) - priv->last_tsf,
3263 le16_to_cpu(priv->rxon_timing.beacon_interval));
3265 memset(&spectrum, 0, sizeof(spectrum));
3267 spectrum.channel_count = cpu_to_le16(1);
3269 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3270 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3271 cmd.len = sizeof(spectrum);
3272 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3274 if (iwl3945_is_associated(priv))
3275 spectrum.start_time =
3276 iwl3945_add_beacon_time(priv->last_beacon_time,
3278 le16_to_cpu(priv->rxon_timing.beacon_interval));
3280 spectrum.start_time = 0;
3282 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3283 spectrum.channels[0].channel = params->channel;
3284 spectrum.channels[0].type = type;
3285 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3286 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3287 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3289 rc = iwl3945_send_cmd_sync(priv, &cmd);
3293 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
3294 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3295 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3299 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3300 switch (spectrum_resp_status) {
3301 case 0: /* Command will be handled */
3302 if (res->u.spectrum.id != 0xff) {
3303 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
3304 res->u.spectrum.id);
3305 priv->measurement_status &= ~MEASUREMENT_READY;
3307 priv->measurement_status |= MEASUREMENT_ACTIVE;
3311 case 1: /* Command will not be handled */
3316 dev_kfree_skb_any(cmd.meta.u.skb);
3322 static void iwl3945_txstatus_to_ieee(struct iwl3945_priv *priv,
3323 struct iwl3945_tx_info *tx_sta)
3326 tx_sta->status.ack_signal = 0;
3327 tx_sta->status.excessive_retries = 0;
3328 tx_sta->status.queue_length = 0;
3329 tx_sta->status.queue_number = 0;
3332 ieee80211_tx_status_irqsafe(priv->hw,
3333 tx_sta->skb[0], &(tx_sta->status));
3335 ieee80211_tx_status(priv->hw,
3336 tx_sta->skb[0], &(tx_sta->status));
3338 tx_sta->skb[0] = NULL;
3342 * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
3344 * When FW advances 'R' index, all entries between old and new 'R' index
3345 * need to be reclaimed. As result, some free space forms. If there is
3346 * enough free space (> low mark), wake the stack that feeds us.
3348 static int iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv, int txq_id, int index)
3350 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3351 struct iwl3945_queue *q = &txq->q;
3354 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
3355 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3356 "is out of range [0-%d] %d %d.\n", txq_id,
3357 index, q->n_bd, q->write_ptr, q->read_ptr);
3361 for (index = iwl3945_queue_inc_wrap(index, q->n_bd);
3362 q->read_ptr != index;
3363 q->read_ptr = iwl3945_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3364 if (txq_id != IWL_CMD_QUEUE_NUM) {
3365 iwl3945_txstatus_to_ieee(priv,
3366 &(txq->txb[txq->q.read_ptr]));
3367 iwl3945_hw_txq_free_tfd(priv, txq);
3368 } else if (nfreed > 1) {
3369 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3370 q->write_ptr, q->read_ptr);
3371 queue_work(priv->workqueue, &priv->restart);
3376 if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) &&
3377 (txq_id != IWL_CMD_QUEUE_NUM) &&
3378 priv->mac80211_registered)
3379 ieee80211_wake_queue(priv->hw, txq_id);
3385 static int iwl3945_is_tx_success(u32 status)
3387 return (status & 0xFF) == 0x1;
3390 /******************************************************************************
3392 * Generic RX handler implementations
3394 ******************************************************************************/
3396 * iwl3945_rx_reply_tx - Handle Tx response
3398 static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
3399 struct iwl3945_rx_mem_buffer *rxb)
3401 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3402 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3403 int txq_id = SEQ_TO_QUEUE(sequence);
3404 int index = SEQ_TO_INDEX(sequence);
3405 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3406 struct ieee80211_tx_status *tx_status;
3407 struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
3408 u32 status = le32_to_cpu(tx_resp->status);
3410 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
3411 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3412 "is out of range [0-%d] %d %d\n", txq_id,
3413 index, txq->q.n_bd, txq->q.write_ptr,
3418 tx_status = &(txq->txb[txq->q.read_ptr].status);
3420 tx_status->retry_count = tx_resp->failure_frame;
3421 tx_status->queue_number = status;
3422 tx_status->queue_length = tx_resp->bt_kill_count;
3423 tx_status->queue_length |= tx_resp->failure_rts;
3426 iwl3945_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
3428 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
3429 txq_id, iwl3945_get_tx_fail_reason(status), status,
3430 tx_resp->rate, tx_resp->failure_frame);
3432 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
3434 iwl3945_tx_queue_reclaim(priv, txq_id, index);
3436 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3437 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3441 static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv,
3442 struct iwl3945_rx_mem_buffer *rxb)
3444 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3445 struct iwl3945_alive_resp *palive;
3446 struct delayed_work *pwork;
3448 palive = &pkt->u.alive_frame;
3450 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3452 palive->is_valid, palive->ver_type,
3453 palive->ver_subtype);
3455 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3456 IWL_DEBUG_INFO("Initialization Alive received.\n");
3457 memcpy(&priv->card_alive_init,
3458 &pkt->u.alive_frame,
3459 sizeof(struct iwl3945_init_alive_resp));
3460 pwork = &priv->init_alive_start;
3462 IWL_DEBUG_INFO("Runtime Alive received.\n");
3463 memcpy(&priv->card_alive, &pkt->u.alive_frame,
3464 sizeof(struct iwl3945_alive_resp));
3465 pwork = &priv->alive_start;
3466 iwl3945_disable_events(priv);
3469 /* We delay the ALIVE response by 5ms to
3470 * give the HW RF Kill time to activate... */
3471 if (palive->is_valid == UCODE_VALID_OK)
3472 queue_delayed_work(priv->workqueue, pwork,
3473 msecs_to_jiffies(5));
3475 IWL_WARNING("uCode did not respond OK.\n");
3478 static void iwl3945_rx_reply_add_sta(struct iwl3945_priv *priv,
3479 struct iwl3945_rx_mem_buffer *rxb)
3481 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3483 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3487 static void iwl3945_rx_reply_error(struct iwl3945_priv *priv,
3488 struct iwl3945_rx_mem_buffer *rxb)
3490 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3492 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3493 "seq 0x%04X ser 0x%08X\n",
3494 le32_to_cpu(pkt->u.err_resp.error_type),
3495 get_cmd_string(pkt->u.err_resp.cmd_id),
3496 pkt->u.err_resp.cmd_id,
3497 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3498 le32_to_cpu(pkt->u.err_resp.error_info));
3501 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3503 static void iwl3945_rx_csa(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
3505 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3506 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active_rxon;
3507 struct iwl3945_csa_notification *csa = &(pkt->u.csa_notif);
3508 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3509 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3510 rxon->channel = csa->channel;
3511 priv->staging_rxon.channel = csa->channel;
3514 static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv,
3515 struct iwl3945_rx_mem_buffer *rxb)
3517 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3518 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3519 struct iwl3945_spectrum_notification *report = &(pkt->u.spectrum_notif);
3521 if (!report->state) {
3522 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3523 "Spectrum Measure Notification: Start\n");
3527 memcpy(&priv->measure_report, report, sizeof(*report));
3528 priv->measurement_status |= MEASUREMENT_READY;
3532 static void iwl3945_rx_pm_sleep_notif(struct iwl3945_priv *priv,
3533 struct iwl3945_rx_mem_buffer *rxb)
3535 #ifdef CONFIG_IWL3945_DEBUG
3536 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3537 struct iwl3945_sleep_notification *sleep = &(pkt->u.sleep_notif);
3538 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3539 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3543 static void iwl3945_rx_pm_debug_statistics_notif(struct iwl3945_priv *priv,
3544 struct iwl3945_rx_mem_buffer *rxb)
3546 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3547 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3548 "notification for %s:\n",
3549 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
3550 iwl3945_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
3553 static void iwl3945_bg_beacon_update(struct work_struct *work)
3555 struct iwl3945_priv *priv =
3556 container_of(work, struct iwl3945_priv, beacon_update);
3557 struct sk_buff *beacon;
3559 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
3560 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
3563 IWL_ERROR("update beacon failed\n");
3567 mutex_lock(&priv->mutex);
3568 /* new beacon skb is allocated every time; dispose previous.*/
3569 if (priv->ibss_beacon)
3570 dev_kfree_skb(priv->ibss_beacon);
3572 priv->ibss_beacon = beacon;
3573 mutex_unlock(&priv->mutex);
3575 iwl3945_send_beacon_cmd(priv);
3578 static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv,
3579 struct iwl3945_rx_mem_buffer *rxb)
3581 #ifdef CONFIG_IWL3945_DEBUG
3582 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3583 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
3584 u8 rate = beacon->beacon_notify_hdr.rate;
3586 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3587 "tsf %d %d rate %d\n",
3588 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3589 beacon->beacon_notify_hdr.failure_frame,
3590 le32_to_cpu(beacon->ibss_mgr_status),
3591 le32_to_cpu(beacon->high_tsf),
3592 le32_to_cpu(beacon->low_tsf), rate);
3595 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3596 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3597 queue_work(priv->workqueue, &priv->beacon_update);
3600 /* Service response to REPLY_SCAN_CMD (0x80) */
3601 static void iwl3945_rx_reply_scan(struct iwl3945_priv *priv,
3602 struct iwl3945_rx_mem_buffer *rxb)
3604 #ifdef CONFIG_IWL3945_DEBUG
3605 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3606 struct iwl3945_scanreq_notification *notif =
3607 (struct iwl3945_scanreq_notification *)pkt->u.raw;
3609 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3613 /* Service SCAN_START_NOTIFICATION (0x82) */
3614 static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv,
3615 struct iwl3945_rx_mem_buffer *rxb)
3617 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3618 struct iwl3945_scanstart_notification *notif =
3619 (struct iwl3945_scanstart_notification *)pkt->u.raw;
3620 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3621 IWL_DEBUG_SCAN("Scan start: "
3623 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3625 notif->band ? "bg" : "a",
3627 notif->tsf_low, notif->status, notif->beacon_timer);
3630 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
3631 static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv,
3632 struct iwl3945_rx_mem_buffer *rxb)
3634 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3635 struct iwl3945_scanresults_notification *notif =
3636 (struct iwl3945_scanresults_notification *)pkt->u.raw;
3638 IWL_DEBUG_SCAN("Scan ch.res: "
3640 "(TSF: 0x%08X:%08X) - %d "
3641 "elapsed=%lu usec (%dms since last)\n",
3643 notif->band ? "bg" : "a",
3644 le32_to_cpu(notif->tsf_high),
3645 le32_to_cpu(notif->tsf_low),
3646 le32_to_cpu(notif->statistics[0]),
3647 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3648 jiffies_to_msecs(elapsed_jiffies
3649 (priv->last_scan_jiffies, jiffies)));
3651 priv->last_scan_jiffies = jiffies;
3652 priv->next_scan_jiffies = 0;
3655 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
3656 static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv,
3657 struct iwl3945_rx_mem_buffer *rxb)
3659 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3660 struct iwl3945_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
3662 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3663 scan_notif->scanned_channels,
3664 scan_notif->tsf_low,
3665 scan_notif->tsf_high, scan_notif->status);
3667 /* The HW is no longer scanning */
3668 clear_bit(STATUS_SCAN_HW, &priv->status);
3670 /* The scan completion notification came in, so kill that timer... */
3671 cancel_delayed_work(&priv->scan_check);
3673 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3674 (priv->scan_bands == 2) ? "2.4" : "5.2",
3675 jiffies_to_msecs(elapsed_jiffies
3676 (priv->scan_pass_start, jiffies)));
3678 /* Remove this scanned band from the list
3679 * of pending bands to scan */
3682 /* If a request to abort was given, or the scan did not succeed
3683 * then we reset the scan state machine and terminate,
3684 * re-queuing another scan if one has been requested */
3685 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3686 IWL_DEBUG_INFO("Aborted scan completed.\n");
3687 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3689 /* If there are more bands on this scan pass reschedule */
3690 if (priv->scan_bands > 0)
3694 priv->last_scan_jiffies = jiffies;
3695 priv->next_scan_jiffies = 0;
3696 IWL_DEBUG_INFO("Setting scan to off\n");
3698 clear_bit(STATUS_SCANNING, &priv->status);
3700 IWL_DEBUG_INFO("Scan took %dms\n",
3701 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3703 queue_work(priv->workqueue, &priv->scan_completed);
3708 priv->scan_pass_start = jiffies;
3709 queue_work(priv->workqueue, &priv->request_scan);
3712 /* Handle notification from uCode that card's power state is changing
3713 * due to software, hardware, or critical temperature RFKILL */
3714 static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv,
3715 struct iwl3945_rx_mem_buffer *rxb)
3717 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3718 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3719 unsigned long status = priv->status;
3721 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3722 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3723 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3725 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
3726 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3728 if (flags & HW_CARD_DISABLED)
3729 set_bit(STATUS_RF_KILL_HW, &priv->status);
3731 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3734 if (flags & SW_CARD_DISABLED)
3735 set_bit(STATUS_RF_KILL_SW, &priv->status);
3737 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3739 iwl3945_scan_cancel(priv);
3741 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3742 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3743 (test_bit(STATUS_RF_KILL_SW, &status) !=
3744 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3745 queue_work(priv->workqueue, &priv->rf_kill);
3747 wake_up_interruptible(&priv->wait_command_queue);
3751 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
3753 * Setup the RX handlers for each of the reply types sent from the uCode
3756 * This function chains into the hardware specific files for them to setup
3757 * any hardware specific handlers as well.
3759 static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv)
3761 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3762 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3763 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3764 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
3765 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
3766 iwl3945_rx_spectrum_measure_notif;
3767 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
3768 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
3769 iwl3945_rx_pm_debug_statistics_notif;
3770 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
3773 * The same handler is used for both the REPLY to a discrete
3774 * statistics request from the host as well as for the periodic
3775 * statistics notifications (after received beacons) from the uCode.
3777 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3778 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
3780 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3781 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
3782 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
3783 iwl3945_rx_scan_results_notif;
3784 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
3785 iwl3945_rx_scan_complete_notif;
3786 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3787 priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
3789 /* Set up hardware specific Rx handlers */
3790 iwl3945_hw_rx_handler_setup(priv);
3794 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3795 * @rxb: Rx buffer to reclaim
3797 * If an Rx buffer has an async callback associated with it the callback
3798 * will be executed. The attached skb (if present) will only be freed
3799 * if the callback returns 1
3801 static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv,
3802 struct iwl3945_rx_mem_buffer *rxb)
3804 struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
3805 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3806 int txq_id = SEQ_TO_QUEUE(sequence);
3807 int index = SEQ_TO_INDEX(sequence);
3808 int huge = sequence & SEQ_HUGE_FRAME;
3810 struct iwl3945_cmd *cmd;
3812 /* If a Tx command is being handled and it isn't in the actual
3813 * command queue then there a command routing bug has been introduced
3814 * in the queue management code. */
3815 if (txq_id != IWL_CMD_QUEUE_NUM)
3816 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
3817 txq_id, pkt->hdr.cmd);
3818 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3820 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3821 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3823 /* Input error checking is done when commands are added to queue. */
3824 if (cmd->meta.flags & CMD_WANT_SKB) {
3825 cmd->meta.source->u.skb = rxb->skb;
3827 } else if (cmd->meta.u.callback &&
3828 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3831 iwl3945_tx_queue_reclaim(priv, txq_id, index);
3833 if (!(cmd->meta.flags & CMD_ASYNC)) {
3834 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3835 wake_up_interruptible(&priv->wait_command_queue);
3839 /************************** RX-FUNCTIONS ****************************/
3841 * Rx theory of operation
3843 * The host allocates 32 DMA target addresses and passes the host address
3844 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3848 * The host/firmware share two index registers for managing the Rx buffers.
3850 * The READ index maps to the first position that the firmware may be writing
3851 * to -- the driver can read up to (but not including) this position and get
3853 * The READ index is managed by the firmware once the card is enabled.
3855 * The WRITE index maps to the last position the driver has read from -- the
3856 * position preceding WRITE is the last slot the firmware can place a packet.
3858 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3861 * During initialization, the host sets up the READ queue position to the first
3862 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3864 * When the firmware places a packet in a buffer, it will advance the READ index
3865 * and fire the RX interrupt. The driver can then query the READ index and
3866 * process as many packets as possible, moving the WRITE index forward as it
3867 * resets the Rx queue buffers with new memory.
3869 * The management in the driver is as follows:
3870 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3871 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
3872 * to replenish the iwl->rxq->rx_free.
3873 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
3874 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3875 * 'processed' and 'read' driver indexes as well)
3876 * + A received packet is processed and handed to the kernel network stack,
3877 * detached from the iwl->rxq. The driver 'processed' index is updated.
3878 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3879 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3880 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3881 * were enough free buffers and RX_STALLED is set it is cleared.
3886 * iwl3945_rx_queue_alloc() Allocates rx_free
3887 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
3888 * iwl3945_rx_queue_restock
3889 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
3890 * queue, updates firmware pointers, and updates
3891 * the WRITE index. If insufficient rx_free buffers
3892 * are available, schedules iwl3945_rx_replenish
3894 * -- enable interrupts --
3895 * ISR - iwl3945_rx() Detach iwl3945_rx_mem_buffers from pool up to the
3896 * READ INDEX, detaching the SKB from the pool.
3897 * Moves the packet buffer from queue to rx_used.
3898 * Calls iwl3945_rx_queue_restock to refill any empty
3905 * iwl3945_rx_queue_space - Return number of free slots available in queue.
3907 static int iwl3945_rx_queue_space(const struct iwl3945_rx_queue *q)
3909 int s = q->read - q->write;
3912 /* keep some buffer to not confuse full and empty queue */
3920 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
3922 int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, struct iwl3945_rx_queue *q)
3926 unsigned long flags;
3928 spin_lock_irqsave(&q->lock, flags);
3930 if (q->need_update == 0)
3933 /* If power-saving is in use, make sure device is awake */
3934 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3935 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3937 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3938 iwl3945_set_bit(priv, CSR_GP_CNTRL,
3939 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3943 rc = iwl3945_grab_nic_access(priv);
3947 /* Device expects a multiple of 8 */
3948 iwl3945_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
3950 iwl3945_release_nic_access(priv);
3952 /* Else device is assumed to be awake */
3954 /* Device expects a multiple of 8 */
3955 iwl3945_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
3961 spin_unlock_irqrestore(&q->lock, flags);
3966 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
3968 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv,
3969 dma_addr_t dma_addr)
3971 return cpu_to_le32((u32)dma_addr);
3975 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
3977 * If there are slots in the RX queue that need to be restocked,
3978 * and we have free pre-allocated buffers, fill the ranks as much
3979 * as we can, pulling from rx_free.
3981 * This moves the 'write' index forward to catch up with 'processed', and
3982 * also updates the memory address in the firmware to reference the new
3985 static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv)
3987 struct iwl3945_rx_queue *rxq = &priv->rxq;
3988 struct list_head *element;
3989 struct iwl3945_rx_mem_buffer *rxb;
3990 unsigned long flags;
3993 spin_lock_irqsave(&rxq->lock, flags);
3994 write = rxq->write & ~0x7;
3995 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
3996 /* Get next free Rx buffer, remove from free list */
3997 element = rxq->rx_free.next;
3998 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
4001 /* Point to Rx buffer via next RBD in circular buffer */
4002 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->dma_addr);
4003 rxq->queue[rxq->write] = rxb;
4004 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
4007 spin_unlock_irqrestore(&rxq->lock, flags);
4008 /* If the pre-allocated buffer pool is dropping low, schedule to
4010 if (rxq->free_count <= RX_LOW_WATERMARK)
4011 queue_work(priv->workqueue, &priv->rx_replenish);
4014 /* If we've added more space for the firmware to place data, tell it.
4015 * Increment device's write pointer in multiples of 8. */
4016 if ((write != (rxq->write & ~0x7))
4017 || (abs(rxq->write - rxq->read) > 7)) {
4018 spin_lock_irqsave(&rxq->lock, flags);
4019 rxq->need_update = 1;
4020 spin_unlock_irqrestore(&rxq->lock, flags);
4021 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
4030 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
4032 * When moving to rx_free an SKB is allocated for the slot.
4034 * Also restock the Rx queue via iwl3945_rx_queue_restock.
4035 * This is called as a scheduled work item (except for during initialization)
4037 static void iwl3945_rx_allocate(struct iwl3945_priv *priv)
4039 struct iwl3945_rx_queue *rxq = &priv->rxq;
4040 struct list_head *element;
4041 struct iwl3945_rx_mem_buffer *rxb;
4042 unsigned long flags;
4043 spin_lock_irqsave(&rxq->lock, flags);
4044 while (!list_empty(&rxq->rx_used)) {
4045 element = rxq->rx_used.next;
4046 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
4048 /* Alloc a new receive buffer */
4050 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
4052 if (net_ratelimit())
4053 printk(KERN_CRIT DRV_NAME
4054 ": Can not allocate SKB buffers\n");
4055 /* We don't reschedule replenish work here -- we will
4056 * call the restock method and if it still needs
4057 * more buffers it will schedule replenish */
4061 /* If radiotap head is required, reserve some headroom here.
4062 * The physical head count is a variable rx_stats->phy_count.
4063 * We reserve 4 bytes here. Plus these extra bytes, the
4064 * headroom of the physical head should be enough for the
4065 * radiotap head that iwl3945 supported. See iwl3945_rt.
4067 skb_reserve(rxb->skb, 4);
4069 priv->alloc_rxb_skb++;
4072 /* Get physical address of RB/SKB */
4074 pci_map_single(priv->pci_dev, rxb->skb->data,
4075 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4076 list_add_tail(&rxb->list, &rxq->rx_free);
4079 spin_unlock_irqrestore(&rxq->lock, flags);
4083 * this should be called while priv->lock is locked
4085 static void __iwl3945_rx_replenish(void *data)
4087 struct iwl3945_priv *priv = data;
4089 iwl3945_rx_allocate(priv);
4090 iwl3945_rx_queue_restock(priv);
4094 void iwl3945_rx_replenish(void *data)
4096 struct iwl3945_priv *priv = data;
4097 unsigned long flags;
4099 iwl3945_rx_allocate(priv);
4101 spin_lock_irqsave(&priv->lock, flags);
4102 iwl3945_rx_queue_restock(priv);
4103 spin_unlock_irqrestore(&priv->lock, flags);
4106 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
4107 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
4108 * This free routine walks the list of POOL entries and if SKB is set to
4109 * non NULL it is unmapped and freed
4111 static void iwl3945_rx_queue_free(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
4114 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
4115 if (rxq->pool[i].skb != NULL) {
4116 pci_unmap_single(priv->pci_dev,
4117 rxq->pool[i].dma_addr,
4118 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4119 dev_kfree_skb(rxq->pool[i].skb);
4123 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
4128 int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv)
4130 struct iwl3945_rx_queue *rxq = &priv->rxq;
4131 struct pci_dev *dev = priv->pci_dev;
4134 spin_lock_init(&rxq->lock);
4135 INIT_LIST_HEAD(&rxq->rx_free);
4136 INIT_LIST_HEAD(&rxq->rx_used);
4138 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
4139 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
4143 /* Fill the rx_used queue with _all_ of the Rx buffers */
4144 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
4145 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4147 /* Set us so that we have processed and used all buffers, but have
4148 * not restocked the Rx queue with fresh buffers */
4149 rxq->read = rxq->write = 0;
4150 rxq->free_count = 0;
4151 rxq->need_update = 0;
4155 void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
4157 unsigned long flags;
4159 spin_lock_irqsave(&rxq->lock, flags);
4160 INIT_LIST_HEAD(&rxq->rx_free);
4161 INIT_LIST_HEAD(&rxq->rx_used);
4162 /* Fill the rx_used queue with _all_ of the Rx buffers */
4163 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
4164 /* In the reset function, these buffers may have been allocated
4165 * to an SKB, so we need to unmap and free potential storage */
4166 if (rxq->pool[i].skb != NULL) {
4167 pci_unmap_single(priv->pci_dev,
4168 rxq->pool[i].dma_addr,
4169 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4170 priv->alloc_rxb_skb--;
4171 dev_kfree_skb(rxq->pool[i].skb);
4172 rxq->pool[i].skb = NULL;
4174 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4177 /* Set us so that we have processed and used all buffers, but have
4178 * not restocked the Rx queue with fresh buffers */
4179 rxq->read = rxq->write = 0;
4180 rxq->free_count = 0;
4181 spin_unlock_irqrestore(&rxq->lock, flags);
4184 /* Convert linear signal-to-noise ratio into dB */
4185 static u8 ratio2dB[100] = {
4186 /* 0 1 2 3 4 5 6 7 8 9 */
4187 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
4188 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
4189 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
4190 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
4191 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
4192 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
4193 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
4194 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
4195 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
4196 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
4199 /* Calculates a relative dB value from a ratio of linear
4200 * (i.e. not dB) signal levels.
4201 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
4202 int iwl3945_calc_db_from_ratio(int sig_ratio)
4204 /* 1000:1 or higher just report as 60 dB */
4205 if (sig_ratio >= 1000)
4208 /* 100:1 or higher, divide by 10 and use table,
4209 * add 20 dB to make up for divide by 10 */
4210 if (sig_ratio >= 100)
4211 return (20 + (int)ratio2dB[sig_ratio/10]);
4213 /* We shouldn't see this */
4217 /* Use table for ratios 1:1 - 99:1 */
4218 return (int)ratio2dB[sig_ratio];
4221 #define PERFECT_RSSI (-20) /* dBm */
4222 #define WORST_RSSI (-95) /* dBm */
4223 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
4225 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
4226 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
4227 * about formulas used below. */
4228 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
4231 int degradation = PERFECT_RSSI - rssi_dbm;
4233 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
4234 * as indicator; formula is (signal dbm - noise dbm).
4235 * SNR at or above 40 is a great signal (100%).
4236 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
4237 * Weakest usable signal is usually 10 - 15 dB SNR. */
4239 if (rssi_dbm - noise_dbm >= 40)
4241 else if (rssi_dbm < noise_dbm)
4243 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
4245 /* Else use just the signal level.
4246 * This formula is a least squares fit of data points collected and
4247 * compared with a reference system that had a percentage (%) display
4248 * for signal quality. */
4250 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
4251 (15 * RSSI_RANGE + 62 * degradation)) /
4252 (RSSI_RANGE * RSSI_RANGE);
4256 else if (sig_qual < 1)
4263 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
4265 * Uses the priv->rx_handlers callback function array to invoke
4266 * the appropriate handlers, including command responses,
4267 * frame-received notifications, and other notifications.
4269 static void iwl3945_rx_handle(struct iwl3945_priv *priv)
4271 struct iwl3945_rx_mem_buffer *rxb;
4272 struct iwl3945_rx_packet *pkt;
4273 struct iwl3945_rx_queue *rxq = &priv->rxq;
4276 unsigned long flags;
4280 /* uCode's read index (stored in shared DRAM) indicates the last Rx
4281 * buffer that the driver may process (last buffer filled by ucode). */
4282 r = iwl3945_hw_get_rx_read(priv);
4285 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
4287 /* Rx interrupt, but nothing sent from uCode */
4289 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
4292 rxb = rxq->queue[i];
4294 /* If an RXB doesn't have a Rx queue slot associated with it,
4295 * then a bug has been introduced in the queue refilling
4296 * routines -- catch it here */
4297 BUG_ON(rxb == NULL);
4299 rxq->queue[i] = NULL;
4301 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
4303 PCI_DMA_FROMDEVICE);
4304 pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
4306 /* Reclaim a command buffer only if this packet is a response
4307 * to a (driver-originated) command.
4308 * If the packet (e.g. Rx frame) originated from uCode,
4309 * there is no command buffer to reclaim.
4310 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4311 * but apparently a few don't get set; catch them here. */
4312 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4313 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4314 (pkt->hdr.cmd != REPLY_TX);
4316 /* Based on type of command response or notification,
4317 * handle those that need handling via function in
4318 * rx_handlers table. See iwl3945_setup_rx_handlers() */
4319 if (priv->rx_handlers[pkt->hdr.cmd]) {
4320 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4321 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4322 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4323 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4325 /* No handling needed */
4326 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4327 "r %d i %d No handler needed for %s, 0x%02x\n",
4328 r, i, get_cmd_string(pkt->hdr.cmd),
4333 /* Invoke any callbacks, transfer the skb to caller, and
4334 * fire off the (possibly) blocking iwl3945_send_cmd()
4335 * as we reclaim the driver command queue */
4336 if (rxb && rxb->skb)
4337 iwl3945_tx_cmd_complete(priv, rxb);
4339 IWL_WARNING("Claim null rxb?\n");
4342 /* For now we just don't re-use anything. We can tweak this
4343 * later to try and re-use notification packets and SKBs that
4344 * fail to Rx correctly */
4345 if (rxb->skb != NULL) {
4346 priv->alloc_rxb_skb--;
4347 dev_kfree_skb_any(rxb->skb);
4351 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
4352 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4353 spin_lock_irqsave(&rxq->lock, flags);
4354 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4355 spin_unlock_irqrestore(&rxq->lock, flags);
4356 i = (i + 1) & RX_QUEUE_MASK;
4357 /* If there are a lot of unused frames,
4358 * restock the Rx queue so ucode won't assert. */
4363 __iwl3945_rx_replenish(priv);
4369 /* Backtrack one entry */
4371 iwl3945_rx_queue_restock(priv);
4375 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
4377 static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
4378 struct iwl3945_tx_queue *txq)
4382 int txq_id = txq->q.id;
4384 if (txq->need_update == 0)
4387 /* if we're trying to save power */
4388 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4389 /* wake up nic if it's powered down ...
4390 * uCode will wake up, and interrupt us again, so next
4391 * time we'll skip this part. */
4392 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
4394 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4395 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
4396 iwl3945_set_bit(priv, CSR_GP_CNTRL,
4397 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4401 /* restore this queue's parameters in nic hardware. */
4402 rc = iwl3945_grab_nic_access(priv);
4405 iwl3945_write_direct32(priv, HBUS_TARG_WRPTR,
4406 txq->q.write_ptr | (txq_id << 8));
4407 iwl3945_release_nic_access(priv);
4409 /* else not in power-save mode, uCode will never sleep when we're
4410 * trying to tx (during RFKILL, we're not trying to tx). */
4412 iwl3945_write32(priv, HBUS_TARG_WRPTR,
4413 txq->q.write_ptr | (txq_id << 8));
4415 txq->need_update = 0;
4420 #ifdef CONFIG_IWL3945_DEBUG
4421 static void iwl3945_print_rx_config_cmd(struct iwl3945_rxon_cmd *rxon)
4423 DECLARE_MAC_BUF(mac);
4425 IWL_DEBUG_RADIO("RX CONFIG:\n");
4426 iwl3945_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
4427 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4428 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4429 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4430 le32_to_cpu(rxon->filter_flags));
4431 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4432 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4433 rxon->ofdm_basic_rates);
4434 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
4435 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4436 print_mac(mac, rxon->node_addr));
4437 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4438 print_mac(mac, rxon->bssid_addr));
4439 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4443 static void iwl3945_enable_interrupts(struct iwl3945_priv *priv)
4445 IWL_DEBUG_ISR("Enabling interrupts\n");
4446 set_bit(STATUS_INT_ENABLED, &priv->status);
4447 iwl3945_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
4450 static inline void iwl3945_disable_interrupts(struct iwl3945_priv *priv)
4452 clear_bit(STATUS_INT_ENABLED, &priv->status);
4454 /* disable interrupts from uCode/NIC to host */
4455 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
4457 /* acknowledge/clear/reset any interrupts still pending
4458 * from uCode or flow handler (Rx/Tx DMA) */
4459 iwl3945_write32(priv, CSR_INT, 0xffffffff);
4460 iwl3945_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
4461 IWL_DEBUG_ISR("Disabled interrupts\n");
4464 static const char *desc_lookup(int i)
4472 return "BAD_CHECKSUM";
4474 return "NMI_INTERRUPT";
4478 return "FATAL_ERROR";
4484 #define ERROR_START_OFFSET (1 * sizeof(u32))
4485 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
4487 static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv)
4490 u32 desc, time, count, base, data1;
4491 u32 blink1, blink2, ilink1, ilink2;
4494 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4496 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4497 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4501 rc = iwl3945_grab_nic_access(priv);
4503 IWL_WARNING("Can not read from adapter at this time.\n");
4507 count = iwl3945_read_targ_mem(priv, base);
4509 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4510 IWL_ERROR("Start IWL Error Log Dump:\n");
4511 IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
4512 priv->status, priv->config, count);
4515 IWL_ERROR("Desc Time asrtPC blink2 "
4516 "ilink1 nmiPC Line\n");
4517 for (i = ERROR_START_OFFSET;
4518 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
4519 i += ERROR_ELEM_SIZE) {
4520 desc = iwl3945_read_targ_mem(priv, base + i);
4522 iwl3945_read_targ_mem(priv, base + i + 1 * sizeof(u32));
4524 iwl3945_read_targ_mem(priv, base + i + 2 * sizeof(u32));
4526 iwl3945_read_targ_mem(priv, base + i + 3 * sizeof(u32));
4528 iwl3945_read_targ_mem(priv, base + i + 4 * sizeof(u32));
4530 iwl3945_read_targ_mem(priv, base + i + 5 * sizeof(u32));
4532 iwl3945_read_targ_mem(priv, base + i + 6 * sizeof(u32));
4535 ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
4536 desc_lookup(desc), desc, time, blink1, blink2,
4537 ilink1, ilink2, data1);
4540 iwl3945_release_nic_access(priv);
4544 #define EVENT_START_OFFSET (6 * sizeof(u32))
4547 * iwl3945_print_event_log - Dump error event log to syslog
4549 * NOTE: Must be called with iwl3945_grab_nic_access() already obtained!
4551 static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx,
4552 u32 num_events, u32 mode)
4555 u32 base; /* SRAM byte address of event log header */
4556 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4557 u32 ptr; /* SRAM byte address of log data */
4558 u32 ev, time, data; /* event log data */
4560 if (num_events == 0)
4563 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4566 event_size = 2 * sizeof(u32);
4568 event_size = 3 * sizeof(u32);
4570 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4572 /* "time" is actually "data" for mode 0 (no timestamp).
4573 * place event id # at far right for easier visual parsing. */
4574 for (i = 0; i < num_events; i++) {
4575 ev = iwl3945_read_targ_mem(priv, ptr);
4577 time = iwl3945_read_targ_mem(priv, ptr);
4580 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4582 data = iwl3945_read_targ_mem(priv, ptr);
4584 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4589 static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv)
4592 u32 base; /* SRAM byte address of event log header */
4593 u32 capacity; /* event log capacity in # entries */
4594 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4595 u32 num_wraps; /* # times uCode wrapped to top of log */
4596 u32 next_entry; /* index of next entry to be written by uCode */
4597 u32 size; /* # entries that we'll print */
4599 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4600 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4601 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4605 rc = iwl3945_grab_nic_access(priv);
4607 IWL_WARNING("Can not read from adapter at this time.\n");
4611 /* event log header */
4612 capacity = iwl3945_read_targ_mem(priv, base);
4613 mode = iwl3945_read_targ_mem(priv, base + (1 * sizeof(u32)));
4614 num_wraps = iwl3945_read_targ_mem(priv, base + (2 * sizeof(u32)));
4615 next_entry = iwl3945_read_targ_mem(priv, base + (3 * sizeof(u32)));
4617 size = num_wraps ? capacity : next_entry;
4619 /* bail out if nothing in log */
4621 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
4622 iwl3945_release_nic_access(priv);
4626 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
4629 /* if uCode has wrapped back to top of log, start at the oldest entry,
4630 * i.e the next one that uCode would fill. */
4632 iwl3945_print_event_log(priv, next_entry,
4633 capacity - next_entry, mode);
4635 /* (then/else) start at top of log */
4636 iwl3945_print_event_log(priv, 0, next_entry, mode);
4638 iwl3945_release_nic_access(priv);
4642 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
4644 static void iwl3945_irq_handle_error(struct iwl3945_priv *priv)
4646 /* Set the FW error flag -- cleared on iwl3945_down */
4647 set_bit(STATUS_FW_ERROR, &priv->status);
4649 /* Cancel currently queued command. */
4650 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4652 #ifdef CONFIG_IWL3945_DEBUG
4653 if (iwl3945_debug_level & IWL_DL_FW_ERRORS) {
4654 iwl3945_dump_nic_error_log(priv);
4655 iwl3945_dump_nic_event_log(priv);
4656 iwl3945_print_rx_config_cmd(&priv->staging_rxon);
4660 wake_up_interruptible(&priv->wait_command_queue);
4662 /* Keep the restart process from trying to send host
4663 * commands by clearing the INIT status bit */
4664 clear_bit(STATUS_READY, &priv->status);
4666 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4667 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4668 "Restarting adapter due to uCode error.\n");
4670 if (iwl3945_is_associated(priv)) {
4671 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4672 sizeof(priv->recovery_rxon));
4673 priv->error_recovering = 1;
4675 queue_work(priv->workqueue, &priv->restart);
4679 static void iwl3945_error_recovery(struct iwl3945_priv *priv)
4681 unsigned long flags;
4683 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4684 sizeof(priv->staging_rxon));
4685 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4686 iwl3945_commit_rxon(priv);
4688 iwl3945_add_station(priv, priv->bssid, 1, 0);
4690 spin_lock_irqsave(&priv->lock, flags);
4691 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4692 priv->error_recovering = 0;
4693 spin_unlock_irqrestore(&priv->lock, flags);
4696 static void iwl3945_irq_tasklet(struct iwl3945_priv *priv)
4698 u32 inta, handled = 0;
4700 unsigned long flags;
4701 #ifdef CONFIG_IWL3945_DEBUG
4705 spin_lock_irqsave(&priv->lock, flags);
4707 /* Ack/clear/reset pending uCode interrupts.
4708 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4709 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4710 inta = iwl3945_read32(priv, CSR_INT);
4711 iwl3945_write32(priv, CSR_INT, inta);
4713 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4714 * Any new interrupts that happen after this, either while we're
4715 * in this tasklet, or later, will show up in next ISR/tasklet. */
4716 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4717 iwl3945_write32(priv, CSR_FH_INT_STATUS, inta_fh);
4719 #ifdef CONFIG_IWL3945_DEBUG
4720 if (iwl3945_debug_level & IWL_DL_ISR) {
4721 /* just for debug */
4722 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4723 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4724 inta, inta_mask, inta_fh);
4728 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4729 * atomic, make sure that inta covers all the interrupts that
4730 * we've discovered, even if FH interrupt came in just after
4731 * reading CSR_INT. */
4732 if (inta_fh & CSR_FH_INT_RX_MASK)
4733 inta |= CSR_INT_BIT_FH_RX;
4734 if (inta_fh & CSR_FH_INT_TX_MASK)
4735 inta |= CSR_INT_BIT_FH_TX;
4737 /* Now service all interrupt bits discovered above. */
4738 if (inta & CSR_INT_BIT_HW_ERR) {
4739 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4741 /* Tell the device to stop sending interrupts */
4742 iwl3945_disable_interrupts(priv);
4744 iwl3945_irq_handle_error(priv);
4746 handled |= CSR_INT_BIT_HW_ERR;
4748 spin_unlock_irqrestore(&priv->lock, flags);
4753 #ifdef CONFIG_IWL3945_DEBUG
4754 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4755 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4756 if (inta & CSR_INT_BIT_SCD)
4757 IWL_DEBUG_ISR("Scheduler finished to transmit "
4758 "the frame/frames.\n");
4760 /* Alive notification via Rx interrupt will do the real work */
4761 if (inta & CSR_INT_BIT_ALIVE)
4762 IWL_DEBUG_ISR("Alive interrupt\n");
4765 /* Safely ignore these bits for debug checks below */
4766 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
4768 /* HW RF KILL switch toggled (4965 only) */
4769 if (inta & CSR_INT_BIT_RF_KILL) {
4771 if (!(iwl3945_read32(priv, CSR_GP_CNTRL) &
4772 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4775 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4776 "RF_KILL bit toggled to %s.\n",
4777 hw_rf_kill ? "disable radio":"enable radio");
4779 /* Queue restart only if RF_KILL switch was set to "kill"
4780 * when we loaded driver, and is now set to "enable".
4781 * After we're Alive, RF_KILL gets handled by
4782 * iwl_rx_card_state_notif() */
4783 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4784 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4785 queue_work(priv->workqueue, &priv->restart);
4788 handled |= CSR_INT_BIT_RF_KILL;
4791 /* Chip got too hot and stopped itself (4965 only) */
4792 if (inta & CSR_INT_BIT_CT_KILL) {
4793 IWL_ERROR("Microcode CT kill error detected.\n");
4794 handled |= CSR_INT_BIT_CT_KILL;
4797 /* Error detected by uCode */
4798 if (inta & CSR_INT_BIT_SW_ERR) {
4799 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4801 iwl3945_irq_handle_error(priv);
4802 handled |= CSR_INT_BIT_SW_ERR;
4805 /* uCode wakes up after power-down sleep */
4806 if (inta & CSR_INT_BIT_WAKEUP) {
4807 IWL_DEBUG_ISR("Wakeup interrupt\n");
4808 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4809 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4810 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4811 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4812 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4813 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4814 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
4816 handled |= CSR_INT_BIT_WAKEUP;
4819 /* All uCode command responses, including Tx command responses,
4820 * Rx "responses" (frame-received notification), and other
4821 * notifications from uCode come through here*/
4822 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4823 iwl3945_rx_handle(priv);
4824 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4827 if (inta & CSR_INT_BIT_FH_TX) {
4828 IWL_DEBUG_ISR("Tx interrupt\n");
4830 iwl3945_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4831 if (!iwl3945_grab_nic_access(priv)) {
4832 iwl3945_write_direct32(priv,
4834 (ALM_FH_SRVC_CHNL), 0x0);
4835 iwl3945_release_nic_access(priv);
4837 handled |= CSR_INT_BIT_FH_TX;
4840 if (inta & ~handled)
4841 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4843 if (inta & ~CSR_INI_SET_MASK) {
4844 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4845 inta & ~CSR_INI_SET_MASK);
4846 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4849 /* Re-enable all interrupts */
4850 iwl3945_enable_interrupts(priv);
4852 #ifdef CONFIG_IWL3945_DEBUG
4853 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4854 inta = iwl3945_read32(priv, CSR_INT);
4855 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4856 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4857 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4858 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4861 spin_unlock_irqrestore(&priv->lock, flags);
4864 static irqreturn_t iwl3945_isr(int irq, void *data)
4866 struct iwl3945_priv *priv = data;
4867 u32 inta, inta_mask;
4872 spin_lock(&priv->lock);
4874 /* Disable (but don't clear!) interrupts here to avoid
4875 * back-to-back ISRs and sporadic interrupts from our NIC.
4876 * If we have something to service, the tasklet will re-enable ints.
4877 * If we *don't* have something, we'll re-enable before leaving here. */
4878 inta_mask = iwl3945_read32(priv, CSR_INT_MASK); /* just for debug */
4879 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
4881 /* Discover which interrupts are active/pending */
4882 inta = iwl3945_read32(priv, CSR_INT);
4883 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4885 /* Ignore interrupt if there's nothing in NIC to service.
4886 * This may be due to IRQ shared with another device,
4887 * or due to sporadic interrupts thrown from our NIC. */
4888 if (!inta && !inta_fh) {
4889 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4893 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4894 /* Hardware disappeared */
4895 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
4899 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4900 inta, inta_mask, inta_fh);
4902 inta &= ~CSR_INT_BIT_SCD;
4904 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
4905 if (likely(inta || inta_fh))
4906 tasklet_schedule(&priv->irq_tasklet);
4908 spin_unlock(&priv->lock);
4913 /* re-enable interrupts here since we don't have anything to service. */
4914 iwl3945_enable_interrupts(priv);
4915 spin_unlock(&priv->lock);
4919 /************************** EEPROM BANDS ****************************
4921 * The iwl3945_eeprom_band definitions below provide the mapping from the
4922 * EEPROM contents to the specific channel number supported for each
4925 * For example, iwl3945_priv->eeprom.band_3_channels[4] from the band_3
4926 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4927 * The specific geography and calibration information for that channel
4928 * is contained in the eeprom map itself.
4930 * During init, we copy the eeprom information and channel map
4931 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4933 * channel_map_24/52 provides the index in the channel_info array for a
4934 * given channel. We have to have two separate maps as there is channel
4935 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4938 * A value of 0xff stored in the channel_map indicates that the channel
4939 * is not supported by the hardware at all.
4941 * A value of 0xfe in the channel_map indicates that the channel is not
4942 * valid for Tx with the current hardware. This means that
4943 * while the system can tune and receive on a given channel, it may not
4944 * be able to associate or transmit any frames on that
4945 * channel. There is no corresponding channel information for that
4948 *********************************************************************/
4951 static const u8 iwl3945_eeprom_band_1[14] = {
4952 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4956 static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
4957 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4960 static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
4961 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4964 static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
4965 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4968 static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
4969 145, 149, 153, 157, 161, 165
4972 static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
4973 int *eeprom_ch_count,
4974 const struct iwl3945_eeprom_channel
4976 const u8 **eeprom_ch_index)
4979 case 1: /* 2.4GHz band */
4980 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
4981 *eeprom_ch_info = priv->eeprom.band_1_channels;
4982 *eeprom_ch_index = iwl3945_eeprom_band_1;
4984 case 2: /* 4.9GHz band */
4985 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
4986 *eeprom_ch_info = priv->eeprom.band_2_channels;
4987 *eeprom_ch_index = iwl3945_eeprom_band_2;
4989 case 3: /* 5.2GHz band */
4990 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
4991 *eeprom_ch_info = priv->eeprom.band_3_channels;
4992 *eeprom_ch_index = iwl3945_eeprom_band_3;
4994 case 4: /* 5.5GHz band */
4995 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
4996 *eeprom_ch_info = priv->eeprom.band_4_channels;
4997 *eeprom_ch_index = iwl3945_eeprom_band_4;
4999 case 5: /* 5.7GHz band */
5000 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
5001 *eeprom_ch_info = priv->eeprom.band_5_channels;
5002 *eeprom_ch_index = iwl3945_eeprom_band_5;
5011 * iwl3945_get_channel_info - Find driver's private channel info
5013 * Based on band and channel number.
5015 const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv,
5016 enum ieee80211_band band, u16 channel)
5021 case IEEE80211_BAND_5GHZ:
5022 for (i = 14; i < priv->channel_count; i++) {
5023 if (priv->channel_info[i].channel == channel)
5024 return &priv->channel_info[i];
5028 case IEEE80211_BAND_2GHZ:
5029 if (channel >= 1 && channel <= 14)
5030 return &priv->channel_info[channel - 1];
5032 case IEEE80211_NUM_BANDS:
5039 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
5043 * iwl3945_init_channel_map - Set up driver's info for all possible channels
5045 static int iwl3945_init_channel_map(struct iwl3945_priv *priv)
5047 int eeprom_ch_count = 0;
5048 const u8 *eeprom_ch_index = NULL;
5049 const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL;
5051 struct iwl3945_channel_info *ch_info;
5053 if (priv->channel_count) {
5054 IWL_DEBUG_INFO("Channel map already initialized.\n");
5058 if (priv->eeprom.version < 0x2f) {
5059 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
5060 priv->eeprom.version);
5064 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
5066 priv->channel_count =
5067 ARRAY_SIZE(iwl3945_eeprom_band_1) +
5068 ARRAY_SIZE(iwl3945_eeprom_band_2) +
5069 ARRAY_SIZE(iwl3945_eeprom_band_3) +
5070 ARRAY_SIZE(iwl3945_eeprom_band_4) +
5071 ARRAY_SIZE(iwl3945_eeprom_band_5);
5073 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
5075 priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) *
5076 priv->channel_count, GFP_KERNEL);
5077 if (!priv->channel_info) {
5078 IWL_ERROR("Could not allocate channel_info\n");
5079 priv->channel_count = 0;
5083 ch_info = priv->channel_info;
5085 /* Loop through the 5 EEPROM bands adding them in order to the
5086 * channel map we maintain (that contains additional information than
5087 * what just in the EEPROM) */
5088 for (band = 1; band <= 5; band++) {
5090 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
5091 &eeprom_ch_info, &eeprom_ch_index);
5093 /* Loop through each band adding each of the channels */
5094 for (ch = 0; ch < eeprom_ch_count; ch++) {
5095 ch_info->channel = eeprom_ch_index[ch];
5096 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
5097 IEEE80211_BAND_5GHZ;
5099 /* permanently store EEPROM's channel regulatory flags
5100 * and max power in channel info database. */
5101 ch_info->eeprom = eeprom_ch_info[ch];
5103 /* Copy the run-time flags so they are there even on
5104 * invalid channels */
5105 ch_info->flags = eeprom_ch_info[ch].flags;
5107 if (!(is_channel_valid(ch_info))) {
5108 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
5112 is_channel_a_band(ch_info) ?
5118 /* Initialize regulatory-based run-time data */
5119 ch_info->max_power_avg = ch_info->curr_txpow =
5120 eeprom_ch_info[ch].max_power_avg;
5121 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
5122 ch_info->min_power = 0;
5124 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
5125 " %ddBm): Ad-Hoc %ssupported\n",
5127 is_channel_a_band(ch_info) ?
5129 CHECK_AND_PRINT(IBSS),
5130 CHECK_AND_PRINT(ACTIVE),
5131 CHECK_AND_PRINT(RADAR),
5132 CHECK_AND_PRINT(WIDE),
5133 CHECK_AND_PRINT(NARROW),
5134 CHECK_AND_PRINT(DFS),
5135 eeprom_ch_info[ch].flags,
5136 eeprom_ch_info[ch].max_power_avg,
5137 ((eeprom_ch_info[ch].
5138 flags & EEPROM_CHANNEL_IBSS)
5139 && !(eeprom_ch_info[ch].
5140 flags & EEPROM_CHANNEL_RADAR))
5143 /* Set the user_txpower_limit to the highest power
5144 * supported by any channel */
5145 if (eeprom_ch_info[ch].max_power_avg >
5146 priv->user_txpower_limit)
5147 priv->user_txpower_limit =
5148 eeprom_ch_info[ch].max_power_avg;
5154 /* Set up txpower settings in driver for all channels */
5155 if (iwl3945_txpower_set_from_eeprom(priv))
5162 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
5164 static void iwl3945_free_channel_map(struct iwl3945_priv *priv)
5166 kfree(priv->channel_info);
5167 priv->channel_count = 0;
5170 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
5171 * sending probe req. This should be set long enough to hear probe responses
5172 * from more than one AP. */
5173 #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
5174 #define IWL_ACTIVE_DWELL_TIME_52 (10)
5176 /* For faster active scanning, scan will move to the next channel if fewer than
5177 * PLCP_QUIET_THRESH packets are heard on this channel within
5178 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
5179 * time if it's a quiet channel (nothing responded to our probe, and there's
5180 * no other traffic).
5181 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
5182 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
5183 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
5185 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
5186 * Must be set longer than active dwell time.
5187 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
5188 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
5189 #define IWL_PASSIVE_DWELL_TIME_52 (10)
5190 #define IWL_PASSIVE_DWELL_BASE (100)
5191 #define IWL_CHANNEL_TUNE_TIME 5
5193 static inline u16 iwl3945_get_active_dwell_time(struct iwl3945_priv *priv,
5194 enum ieee80211_band band)
5196 if (band == IEEE80211_BAND_5GHZ)
5197 return IWL_ACTIVE_DWELL_TIME_52;
5199 return IWL_ACTIVE_DWELL_TIME_24;
5202 static u16 iwl3945_get_passive_dwell_time(struct iwl3945_priv *priv,
5203 enum ieee80211_band band)
5205 u16 active = iwl3945_get_active_dwell_time(priv, band);
5206 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
5207 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
5208 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
5210 if (iwl3945_is_associated(priv)) {
5211 /* If we're associated, we clamp the maximum passive
5212 * dwell time to be 98% of the beacon interval (minus
5213 * 2 * channel tune time) */
5214 passive = priv->beacon_int;
5215 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
5216 passive = IWL_PASSIVE_DWELL_BASE;
5217 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
5220 if (passive <= active)
5221 passive = active + 1;
5226 static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv,
5227 enum ieee80211_band band,
5228 u8 is_active, u8 direct_mask,
5229 struct iwl3945_scan_channel *scan_ch)
5231 const struct ieee80211_channel *channels = NULL;
5232 const struct ieee80211_supported_band *sband;
5233 const struct iwl3945_channel_info *ch_info;
5234 u16 passive_dwell = 0;
5235 u16 active_dwell = 0;
5238 sband = iwl3945_get_band(priv, band);
5242 channels = sband->channels;
5244 active_dwell = iwl3945_get_active_dwell_time(priv, band);
5245 passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
5247 for (i = 0, added = 0; i < sband->n_channels; i++) {
5248 if (channels[i].hw_value ==
5249 le16_to_cpu(priv->active_rxon.channel)) {
5250 if (iwl3945_is_associated(priv)) {
5252 ("Skipping current channel %d\n",
5253 le16_to_cpu(priv->active_rxon.channel));
5256 } else if (priv->only_active_channel)
5259 scan_ch->channel = channels[i].hw_value;
5261 ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
5262 if (!is_channel_valid(ch_info)) {
5263 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
5268 if (!is_active || is_channel_passive(ch_info) ||
5269 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
5270 scan_ch->type = 0; /* passive */
5272 scan_ch->type = 1; /* active */
5274 if (scan_ch->type & 1)
5275 scan_ch->type |= (direct_mask << 1);
5277 if (is_channel_narrow(ch_info))
5278 scan_ch->type |= (1 << 7);
5280 scan_ch->active_dwell = cpu_to_le16(active_dwell);
5281 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
5283 /* Set txpower levels to defaults */
5284 scan_ch->tpc.dsp_atten = 110;
5285 /* scan_pwr_info->tpc.dsp_atten; */
5287 /*scan_pwr_info->tpc.tx_gain; */
5288 if (band == IEEE80211_BAND_5GHZ)
5289 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
5291 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
5292 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
5294 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
5298 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5300 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5301 (scan_ch->type & 1) ?
5302 active_dwell : passive_dwell);
5308 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5312 static void iwl3945_init_hw_rates(struct iwl3945_priv *priv,
5313 struct ieee80211_rate *rates)
5317 for (i = 0; i < IWL_RATE_COUNT; i++) {
5318 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
5319 rates[i].hw_value = i; /* Rate scaling will work on indexes */
5320 rates[i].hw_value_short = i;
5322 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
5324 * If CCK != 1M then set short preamble rate flag.
5326 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
5327 0 : IEEE80211_RATE_SHORT_PREAMBLE;
5333 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
5335 static int iwl3945_init_geos(struct iwl3945_priv *priv)
5337 struct iwl3945_channel_info *ch;
5338 struct ieee80211_supported_band *band;
5339 struct ieee80211_channel *channels;
5340 struct ieee80211_channel *geo_ch;
5341 struct ieee80211_rate *rates;
5344 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
5345 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
5346 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5347 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5351 channels = kzalloc(sizeof(struct ieee80211_channel) *
5352 priv->channel_count, GFP_KERNEL);
5356 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
5363 /* 5.2GHz channels start after the 2.4GHz channels */
5364 band = &priv->bands[IEEE80211_BAND_5GHZ];
5365 band->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
5366 band->bitrates = &rates[4];
5367 band->n_bitrates = 8; /* just OFDM */
5369 band = &priv->bands[IEEE80211_BAND_2GHZ];
5370 band->channels = channels;
5371 band->bitrates = rates;
5372 band->n_bitrates = 12; /* OFDM & CCK */
5374 priv->ieee_channels = channels;
5375 priv->ieee_rates = rates;
5377 iwl3945_init_hw_rates(priv, rates);
5379 for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
5380 ch = &priv->channel_info[i];
5382 if (!is_channel_valid(ch)) {
5383 IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
5385 ch->channel, is_channel_a_band(ch) ?
5390 if (is_channel_a_band(ch))
5391 geo_ch = &priv->bands[IEEE80211_BAND_5GHZ].channels[priv->bands[IEEE80211_BAND_5GHZ].n_channels++];
5393 geo_ch = &priv->bands[IEEE80211_BAND_2GHZ].channels[priv->bands[IEEE80211_BAND_2GHZ].n_channels++];
5395 geo_ch->center_freq = ieee80211chan2mhz(ch->channel);
5396 geo_ch->max_power = ch->max_power_avg;
5397 geo_ch->max_antenna_gain = 0xff;
5399 if (is_channel_valid(ch)) {
5400 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
5401 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
5403 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
5404 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
5406 if (ch->flags & EEPROM_CHANNEL_RADAR)
5407 geo_ch->flags |= IEEE80211_CHAN_RADAR;
5409 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5410 priv->max_channel_txpower_limit =
5413 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
5416 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) && priv->is_abg) {
5417 printk(KERN_INFO DRV_NAME
5418 ": Incorrectly detected BG card as ABG. Please send "
5419 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5420 priv->pci_dev->device, priv->pci_dev->subsystem_device);
5424 printk(KERN_INFO DRV_NAME
5425 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
5426 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
5427 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
5429 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ];
5430 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ];
5432 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5438 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
5440 static void iwl3945_free_geos(struct iwl3945_priv *priv)
5442 kfree(priv->ieee_channels);
5443 kfree(priv->ieee_rates);
5444 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
5447 /******************************************************************************
5449 * uCode download functions
5451 ******************************************************************************/
5453 static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv)
5455 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5456 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5457 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5458 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5459 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5460 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
5464 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
5465 * looking at all data.
5467 static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 * image, u32 len)
5474 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5476 rc = iwl3945_grab_nic_access(priv);
5480 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
5483 for (; len > 0; len -= sizeof(u32), image++) {
5484 /* read data comes through single port, auto-incr addr */
5485 /* NOTE: Use the debugless read so we don't flood kernel log
5486 * if IWL_DL_IO is set */
5487 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5488 if (val != le32_to_cpu(*image)) {
5489 IWL_ERROR("uCode INST section is invalid at "
5490 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5491 save_len - len, val, le32_to_cpu(*image));
5499 iwl3945_release_nic_access(priv);
5502 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
5509 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
5510 * using sample data 100 bytes apart. If these sample points are good,
5511 * it's a pretty good bet that everything between them is good, too.
5513 static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, u32 len)
5520 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5522 rc = iwl3945_grab_nic_access(priv);
5526 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5527 /* read data comes through single port, auto-incr addr */
5528 /* NOTE: Use the debugless read so we don't flood kernel log
5529 * if IWL_DL_IO is set */
5530 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
5531 i + RTC_INST_LOWER_BOUND);
5532 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5533 if (val != le32_to_cpu(*image)) {
5534 #if 0 /* Enable this if you want to see details */
5535 IWL_ERROR("uCode INST section is invalid at "
5536 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5546 iwl3945_release_nic_access(priv);
5553 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
5554 * and verify its contents
5556 static int iwl3945_verify_ucode(struct iwl3945_priv *priv)
5563 image = (__le32 *)priv->ucode_boot.v_addr;
5564 len = priv->ucode_boot.len;
5565 rc = iwl3945_verify_inst_sparse(priv, image, len);
5567 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5571 /* Try initialize */
5572 image = (__le32 *)priv->ucode_init.v_addr;
5573 len = priv->ucode_init.len;
5574 rc = iwl3945_verify_inst_sparse(priv, image, len);
5576 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5580 /* Try runtime/protocol */
5581 image = (__le32 *)priv->ucode_code.v_addr;
5582 len = priv->ucode_code.len;
5583 rc = iwl3945_verify_inst_sparse(priv, image, len);
5585 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5589 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5591 /* Since nothing seems to match, show first several data entries in
5592 * instruction SRAM, so maybe visual inspection will give a clue.
5593 * Selection of bootstrap image (vs. other images) is arbitrary. */
5594 image = (__le32 *)priv->ucode_boot.v_addr;
5595 len = priv->ucode_boot.len;
5596 rc = iwl3945_verify_inst_full(priv, image, len);
5602 /* check contents of special bootstrap uCode SRAM */
5603 static int iwl3945_verify_bsm(struct iwl3945_priv *priv)
5605 __le32 *image = priv->ucode_boot.v_addr;
5606 u32 len = priv->ucode_boot.len;
5610 IWL_DEBUG_INFO("Begin verify bsm\n");
5612 /* verify BSM SRAM contents */
5613 val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG);
5614 for (reg = BSM_SRAM_LOWER_BOUND;
5615 reg < BSM_SRAM_LOWER_BOUND + len;
5616 reg += sizeof(u32), image ++) {
5617 val = iwl3945_read_prph(priv, reg);
5618 if (val != le32_to_cpu(*image)) {
5619 IWL_ERROR("BSM uCode verification failed at "
5620 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5621 BSM_SRAM_LOWER_BOUND,
5622 reg - BSM_SRAM_LOWER_BOUND, len,
5623 val, le32_to_cpu(*image));
5628 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5634 * iwl3945_load_bsm - Load bootstrap instructions
5638 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5639 * in special SRAM that does not power down during RFKILL. When powering back
5640 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5641 * the bootstrap program into the on-board processor, and starts it.
5643 * The bootstrap program loads (via DMA) instructions and data for a new
5644 * program from host DRAM locations indicated by the host driver in the
5645 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5648 * When initializing the NIC, the host driver points the BSM to the
5649 * "initialize" uCode image. This uCode sets up some internal data, then
5650 * notifies host via "initialize alive" that it is complete.
5652 * The host then replaces the BSM_DRAM_* pointer values to point to the
5653 * normal runtime uCode instructions and a backup uCode data cache buffer
5654 * (filled initially with starting data values for the on-board processor),
5655 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5656 * which begins normal operation.
5658 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5659 * the backup data cache in DRAM before SRAM is powered down.
5661 * When powering back up, the BSM loads the bootstrap program. This reloads
5662 * the runtime uCode instructions and the backup data cache into SRAM,
5663 * and re-launches the runtime uCode from where it left off.
5665 static int iwl3945_load_bsm(struct iwl3945_priv *priv)
5667 __le32 *image = priv->ucode_boot.v_addr;
5668 u32 len = priv->ucode_boot.len;
5678 IWL_DEBUG_INFO("Begin load bsm\n");
5680 /* make sure bootstrap program is no larger than BSM's SRAM size */
5681 if (len > IWL_MAX_BSM_SIZE)
5684 /* Tell bootstrap uCode where to find the "Initialize" uCode
5685 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
5686 * NOTE: iwl3945_initialize_alive_start() will replace these values,
5687 * after the "initialize" uCode has run, to point to
5688 * runtime/protocol instructions and backup data cache. */
5689 pinst = priv->ucode_init.p_addr;
5690 pdata = priv->ucode_init_data.p_addr;
5691 inst_len = priv->ucode_init.len;
5692 data_len = priv->ucode_init_data.len;
5694 rc = iwl3945_grab_nic_access(priv);
5698 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5699 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5700 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5701 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
5703 /* Fill BSM memory with bootstrap instructions */
5704 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5705 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5706 reg_offset += sizeof(u32), image++)
5707 _iwl3945_write_prph(priv, reg_offset,
5708 le32_to_cpu(*image));
5710 rc = iwl3945_verify_bsm(priv);
5712 iwl3945_release_nic_access(priv);
5716 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
5717 iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5718 iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
5719 RTC_INST_LOWER_BOUND);
5720 iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
5722 /* Load bootstrap code into instruction SRAM now,
5723 * to prepare to load "initialize" uCode */
5724 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5725 BSM_WR_CTRL_REG_BIT_START);
5727 /* Wait for load of bootstrap uCode to finish */
5728 for (i = 0; i < 100; i++) {
5729 done = iwl3945_read_prph(priv, BSM_WR_CTRL_REG);
5730 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5735 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5737 IWL_ERROR("BSM write did not complete!\n");
5741 /* Enable future boot loads whenever power management unit triggers it
5742 * (e.g. when powering back up after power-save shutdown) */
5743 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5744 BSM_WR_CTRL_REG_BIT_START_EN);
5746 iwl3945_release_nic_access(priv);
5751 static void iwl3945_nic_start(struct iwl3945_priv *priv)
5753 /* Remove all resets to allow NIC to operate */
5754 iwl3945_write32(priv, CSR_RESET, 0);
5758 * iwl3945_read_ucode - Read uCode images from disk file.
5760 * Copy into buffers for card to fetch via bus-mastering
5762 static int iwl3945_read_ucode(struct iwl3945_priv *priv)
5764 struct iwl3945_ucode *ucode;
5766 const struct firmware *ucode_raw;
5767 /* firmware file name contains uCode/driver compatibility version */
5768 const char *name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode";
5771 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5773 /* Ask kernel firmware_class module to get the boot firmware off disk.
5774 * request_firmware() is synchronous, file is in memory on return. */
5775 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5777 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5782 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5783 name, ucode_raw->size);
5785 /* Make sure that we got at least our header! */
5786 if (ucode_raw->size < sizeof(*ucode)) {
5787 IWL_ERROR("File size way too small!\n");
5792 /* Data from ucode file: header followed by uCode images */
5793 ucode = (void *)ucode_raw->data;
5795 ver = le32_to_cpu(ucode->ver);
5796 inst_size = le32_to_cpu(ucode->inst_size);
5797 data_size = le32_to_cpu(ucode->data_size);
5798 init_size = le32_to_cpu(ucode->init_size);
5799 init_data_size = le32_to_cpu(ucode->init_data_size);
5800 boot_size = le32_to_cpu(ucode->boot_size);
5802 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
5803 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5804 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5805 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5806 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5807 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
5809 /* Verify size of file vs. image size info in file's header */
5810 if (ucode_raw->size < sizeof(*ucode) +
5811 inst_size + data_size + init_size +
5812 init_data_size + boot_size) {
5814 IWL_DEBUG_INFO("uCode file size %d too small\n",
5815 (int)ucode_raw->size);
5820 /* Verify that uCode images will fit in card's SRAM */
5821 if (inst_size > IWL_MAX_INST_SIZE) {
5822 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5828 if (data_size > IWL_MAX_DATA_SIZE) {
5829 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5834 if (init_size > IWL_MAX_INST_SIZE) {
5835 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5840 if (init_data_size > IWL_MAX_DATA_SIZE) {
5841 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5846 if (boot_size > IWL_MAX_BSM_SIZE) {
5847 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5853 /* Allocate ucode buffers for card's bus-master loading ... */
5855 /* Runtime instructions and 2 copies of data:
5856 * 1) unmodified from disk
5857 * 2) backup cache for save/restore during power-downs */
5858 priv->ucode_code.len = inst_size;
5859 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
5861 priv->ucode_data.len = data_size;
5862 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
5864 priv->ucode_data_backup.len = data_size;
5865 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5867 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
5868 !priv->ucode_data_backup.v_addr)
5871 /* Initialization instructions and data */
5872 if (init_size && init_data_size) {
5873 priv->ucode_init.len = init_size;
5874 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
5876 priv->ucode_init_data.len = init_data_size;
5877 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5879 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5883 /* Bootstrap (instructions only, no data) */
5885 priv->ucode_boot.len = boot_size;
5886 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
5888 if (!priv->ucode_boot.v_addr)
5892 /* Copy images into buffers for card's bus-master reads ... */
5894 /* Runtime instructions (first block of data in file) */
5895 src = &ucode->data[0];
5896 len = priv->ucode_code.len;
5897 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
5898 memcpy(priv->ucode_code.v_addr, src, len);
5899 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5900 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5902 /* Runtime data (2nd block)
5903 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
5904 src = &ucode->data[inst_size];
5905 len = priv->ucode_data.len;
5906 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
5907 memcpy(priv->ucode_data.v_addr, src, len);
5908 memcpy(priv->ucode_data_backup.v_addr, src, len);
5910 /* Initialization instructions (3rd block) */
5912 src = &ucode->data[inst_size + data_size];
5913 len = priv->ucode_init.len;
5914 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5916 memcpy(priv->ucode_init.v_addr, src, len);
5919 /* Initialization data (4th block) */
5920 if (init_data_size) {
5921 src = &ucode->data[inst_size + data_size + init_size];
5922 len = priv->ucode_init_data.len;
5923 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5925 memcpy(priv->ucode_init_data.v_addr, src, len);
5928 /* Bootstrap instructions (5th block) */
5929 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5930 len = priv->ucode_boot.len;
5931 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5933 memcpy(priv->ucode_boot.v_addr, src, len);
5935 /* We have our copies now, allow OS release its copies */
5936 release_firmware(ucode_raw);
5940 IWL_ERROR("failed to allocate pci memory\n");
5942 iwl3945_dealloc_ucode_pci(priv);
5945 release_firmware(ucode_raw);
5953 * iwl3945_set_ucode_ptrs - Set uCode address location
5955 * Tell initialization uCode where to find runtime uCode.
5957 * BSM registers initially contain pointers to initialization uCode.
5958 * We need to replace them to load runtime uCode inst and data,
5959 * and to save runtime data when powering down.
5961 static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv)
5966 unsigned long flags;
5968 /* bits 31:0 for 3945 */
5969 pinst = priv->ucode_code.p_addr;
5970 pdata = priv->ucode_data_backup.p_addr;
5972 spin_lock_irqsave(&priv->lock, flags);
5973 rc = iwl3945_grab_nic_access(priv);
5975 spin_unlock_irqrestore(&priv->lock, flags);
5979 /* Tell bootstrap uCode where to find image to load */
5980 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5981 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5982 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
5983 priv->ucode_data.len);
5985 /* Inst bytecount must be last to set up, bit 31 signals uCode
5986 * that all new ptr/size info is in place */
5987 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
5988 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5990 iwl3945_release_nic_access(priv);
5992 spin_unlock_irqrestore(&priv->lock, flags);
5994 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
6000 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
6002 * Called after REPLY_ALIVE notification received from "initialize" uCode.
6004 * Tell "initialize" uCode to go ahead and load the runtime uCode.
6006 static void iwl3945_init_alive_start(struct iwl3945_priv *priv)
6008 /* Check alive response for "valid" sign from uCode */
6009 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
6010 /* We had an error bringing up the hardware, so take it
6011 * all the way back down so we can try again */
6012 IWL_DEBUG_INFO("Initialize Alive failed.\n");
6016 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
6017 * This is a paranoid check, because we would not have gotten the
6018 * "initialize" alive if code weren't properly loaded. */
6019 if (iwl3945_verify_ucode(priv)) {
6020 /* Runtime instruction load was bad;
6021 * take it all the way back down so we can try again */
6022 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
6026 /* Send pointers to protocol/runtime uCode image ... init code will
6027 * load and launch runtime uCode, which will send us another "Alive"
6029 IWL_DEBUG_INFO("Initialization Alive received.\n");
6030 if (iwl3945_set_ucode_ptrs(priv)) {
6031 /* Runtime instruction load won't happen;
6032 * take it all the way back down so we can try again */
6033 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
6039 queue_work(priv->workqueue, &priv->restart);
6044 * iwl3945_alive_start - called after REPLY_ALIVE notification received
6045 * from protocol/runtime uCode (initialization uCode's
6046 * Alive gets handled by iwl3945_init_alive_start()).
6048 static void iwl3945_alive_start(struct iwl3945_priv *priv)
6051 int thermal_spin = 0;
6054 IWL_DEBUG_INFO("Runtime Alive received.\n");
6056 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
6057 /* We had an error bringing up the hardware, so take it
6058 * all the way back down so we can try again */
6059 IWL_DEBUG_INFO("Alive failed.\n");
6063 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
6064 * This is a paranoid check, because we would not have gotten the
6065 * "runtime" alive if code weren't properly loaded. */
6066 if (iwl3945_verify_ucode(priv)) {
6067 /* Runtime instruction load was bad;
6068 * take it all the way back down so we can try again */
6069 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
6073 iwl3945_clear_stations_table(priv);
6075 rc = iwl3945_grab_nic_access(priv);
6077 IWL_WARNING("Can not read rfkill status from adapter\n");
6081 rfkill = iwl3945_read_prph(priv, APMG_RFKILL_REG);
6082 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
6083 iwl3945_release_nic_access(priv);
6086 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6087 /* if rfkill is not on, then wait for thermal
6088 * sensor in adapter to kick in */
6089 while (iwl3945_hw_get_temperature(priv) == 0) {
6095 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
6098 set_bit(STATUS_RF_KILL_HW, &priv->status);
6100 /* After the ALIVE response, we can send commands to 3945 uCode */
6101 set_bit(STATUS_ALIVE, &priv->status);
6103 /* Clear out the uCode error bit if it is set */
6104 clear_bit(STATUS_FW_ERROR, &priv->status);
6106 if (iwl3945_is_rfkill(priv))
6109 ieee80211_start_queues(priv->hw);
6111 priv->active_rate = priv->rates_mask;
6112 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
6114 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
6116 if (iwl3945_is_associated(priv)) {
6117 struct iwl3945_rxon_cmd *active_rxon =
6118 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
6120 memcpy(&priv->staging_rxon, &priv->active_rxon,
6121 sizeof(priv->staging_rxon));
6122 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6124 /* Initialize our rx_config data */
6125 iwl3945_connection_init_rx_config(priv);
6126 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
6129 /* Configure Bluetooth device coexistence support */
6130 iwl3945_send_bt_config(priv);
6132 /* Configure the adapter for unassociated operation */
6133 iwl3945_commit_rxon(priv);
6135 /* At this point, the NIC is initialized and operational */
6136 priv->notif_missed_beacons = 0;
6137 set_bit(STATUS_READY, &priv->status);
6139 iwl3945_reg_txpower_periodic(priv);
6141 IWL_DEBUG_INFO("ALIVE processing complete.\n");
6142 wake_up_interruptible(&priv->wait_command_queue);
6144 if (priv->error_recovering)
6145 iwl3945_error_recovery(priv);
6150 queue_work(priv->workqueue, &priv->restart);
6153 static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv);
6155 static void __iwl3945_down(struct iwl3945_priv *priv)
6157 unsigned long flags;
6158 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
6159 struct ieee80211_conf *conf = NULL;
6161 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
6163 conf = ieee80211_get_hw_conf(priv->hw);
6166 set_bit(STATUS_EXIT_PENDING, &priv->status);
6168 iwl3945_clear_stations_table(priv);
6170 /* Unblock any waiting calls */
6171 wake_up_interruptible_all(&priv->wait_command_queue);
6173 /* Wipe out the EXIT_PENDING status bit if we are not actually
6174 * exiting the module */
6176 clear_bit(STATUS_EXIT_PENDING, &priv->status);
6178 /* stop and reset the on-board processor */
6179 iwl3945_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
6181 /* tell the device to stop sending interrupts */
6182 iwl3945_disable_interrupts(priv);
6184 if (priv->mac80211_registered)
6185 ieee80211_stop_queues(priv->hw);
6187 /* If we have not previously called iwl3945_init() then
6188 * clear all bits but the RF Kill and SUSPEND bits and return */
6189 if (!iwl3945_is_init(priv)) {
6190 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6192 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6194 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
6195 STATUS_GEO_CONFIGURED |
6196 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6201 /* ...otherwise clear out all the status bits but the RF Kill and
6202 * SUSPEND bits and continue taking the NIC down. */
6203 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6205 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6207 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
6208 STATUS_GEO_CONFIGURED |
6209 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6211 test_bit(STATUS_FW_ERROR, &priv->status) <<
6214 spin_lock_irqsave(&priv->lock, flags);
6215 iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
6216 spin_unlock_irqrestore(&priv->lock, flags);
6218 iwl3945_hw_txq_ctx_stop(priv);
6219 iwl3945_hw_rxq_stop(priv);
6221 spin_lock_irqsave(&priv->lock, flags);
6222 if (!iwl3945_grab_nic_access(priv)) {
6223 iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
6224 APMG_CLK_VAL_DMA_CLK_RQT);
6225 iwl3945_release_nic_access(priv);
6227 spin_unlock_irqrestore(&priv->lock, flags);
6231 iwl3945_hw_nic_stop_master(priv);
6232 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
6233 iwl3945_hw_nic_reset(priv);
6236 memset(&priv->card_alive, 0, sizeof(struct iwl3945_alive_resp));
6238 if (priv->ibss_beacon)
6239 dev_kfree_skb(priv->ibss_beacon);
6240 priv->ibss_beacon = NULL;
6242 /* clear out any free frames */
6243 iwl3945_clear_free_frames(priv);
6246 static void iwl3945_down(struct iwl3945_priv *priv)
6248 mutex_lock(&priv->mutex);
6249 __iwl3945_down(priv);
6250 mutex_unlock(&priv->mutex);
6252 iwl3945_cancel_deferred_work(priv);
6255 #define MAX_HW_RESTARTS 5
6257 static int __iwl3945_up(struct iwl3945_priv *priv)
6261 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6262 IWL_WARNING("Exit pending; will not bring the NIC up\n");
6266 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
6267 IWL_WARNING("Radio disabled by SW RF kill (module "
6272 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
6273 IWL_ERROR("ucode not available for device bringup\n");
6277 /* If platform's RF_KILL switch is NOT set to KILL */
6278 if (iwl3945_read32(priv, CSR_GP_CNTRL) &
6279 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6280 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6282 set_bit(STATUS_RF_KILL_HW, &priv->status);
6283 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
6284 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
6289 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
6291 rc = iwl3945_hw_nic_init(priv);
6293 IWL_ERROR("Unable to int nic\n");
6297 /* make sure rfkill handshake bits are cleared */
6298 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6299 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
6300 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6302 /* clear (again), then enable host interrupts */
6303 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
6304 iwl3945_enable_interrupts(priv);
6306 /* really make sure rfkill handshake bits are cleared */
6307 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6308 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6310 /* Copy original ucode data image from disk into backup cache.
6311 * This will be used to initialize the on-board processor's
6312 * data SRAM for a clean start when the runtime program first loads. */
6313 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
6314 priv->ucode_data.len);
6316 /* We return success when we resume from suspend and rf_kill is on. */
6317 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
6320 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6322 iwl3945_clear_stations_table(priv);
6324 /* load bootstrap state machine,
6325 * load bootstrap program into processor's memory,
6326 * prepare to load the "initialize" uCode */
6327 rc = iwl3945_load_bsm(priv);
6330 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6334 /* start card; "initialize" will load runtime ucode */
6335 iwl3945_nic_start(priv);
6337 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6342 set_bit(STATUS_EXIT_PENDING, &priv->status);
6343 __iwl3945_down(priv);
6345 /* tried to restart and config the device for as long as our
6346 * patience could withstand */
6347 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6352 /*****************************************************************************
6354 * Workqueue callbacks
6356 *****************************************************************************/
6358 static void iwl3945_bg_init_alive_start(struct work_struct *data)
6360 struct iwl3945_priv *priv =
6361 container_of(data, struct iwl3945_priv, init_alive_start.work);
6363 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6366 mutex_lock(&priv->mutex);
6367 iwl3945_init_alive_start(priv);
6368 mutex_unlock(&priv->mutex);
6371 static void iwl3945_bg_alive_start(struct work_struct *data)
6373 struct iwl3945_priv *priv =
6374 container_of(data, struct iwl3945_priv, alive_start.work);
6376 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6379 mutex_lock(&priv->mutex);
6380 iwl3945_alive_start(priv);
6381 mutex_unlock(&priv->mutex);
6384 static void iwl3945_bg_rf_kill(struct work_struct *work)
6386 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, rf_kill);
6388 wake_up_interruptible(&priv->wait_command_queue);
6390 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6393 mutex_lock(&priv->mutex);
6395 if (!iwl3945_is_rfkill(priv)) {
6396 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6397 "HW and/or SW RF Kill no longer active, restarting "
6399 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6400 queue_work(priv->workqueue, &priv->restart);
6403 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6404 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6405 "disabled by SW switch\n");
6407 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6408 "Kill switch must be turned off for "
6409 "wireless networking to work.\n");
6411 mutex_unlock(&priv->mutex);
6414 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6416 static void iwl3945_bg_scan_check(struct work_struct *data)
6418 struct iwl3945_priv *priv =
6419 container_of(data, struct iwl3945_priv, scan_check.work);
6421 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6424 mutex_lock(&priv->mutex);
6425 if (test_bit(STATUS_SCANNING, &priv->status) ||
6426 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6427 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6428 "Scan completion watchdog resetting adapter (%dms)\n",
6429 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
6431 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6432 iwl3945_send_scan_abort(priv);
6434 mutex_unlock(&priv->mutex);
6437 static void iwl3945_bg_request_scan(struct work_struct *data)
6439 struct iwl3945_priv *priv =
6440 container_of(data, struct iwl3945_priv, request_scan);
6441 struct iwl3945_host_cmd cmd = {
6442 .id = REPLY_SCAN_CMD,
6443 .len = sizeof(struct iwl3945_scan_cmd),
6444 .meta.flags = CMD_SIZE_HUGE,
6447 struct iwl3945_scan_cmd *scan;
6448 struct ieee80211_conf *conf = NULL;
6450 enum ieee80211_band band;
6452 conf = ieee80211_get_hw_conf(priv->hw);
6454 mutex_lock(&priv->mutex);
6456 if (!iwl3945_is_ready(priv)) {
6457 IWL_WARNING("request scan called when driver not ready.\n");
6461 /* Make sure the scan wasn't cancelled before this queued work
6462 * was given the chance to run... */
6463 if (!test_bit(STATUS_SCANNING, &priv->status))
6466 /* This should never be called or scheduled if there is currently
6467 * a scan active in the hardware. */
6468 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6469 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6470 "Ignoring second request.\n");
6475 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6476 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6480 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6481 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6485 if (iwl3945_is_rfkill(priv)) {
6486 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6490 if (!test_bit(STATUS_READY, &priv->status)) {
6491 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6495 if (!priv->scan_bands) {
6496 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6501 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
6502 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6509 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
6511 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6512 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6514 if (iwl3945_is_associated(priv)) {
6517 u32 suspend_time = 100;
6518 u32 scan_suspend_time = 100;
6519 unsigned long flags;
6521 IWL_DEBUG_INFO("Scanning while associated...\n");
6523 spin_lock_irqsave(&priv->lock, flags);
6524 interval = priv->beacon_int;
6525 spin_unlock_irqrestore(&priv->lock, flags);
6527 scan->suspend_time = 0;
6528 scan->max_out_time = cpu_to_le32(200 * 1024);
6530 interval = suspend_time;
6532 * suspend time format:
6533 * 0-19: beacon interval in usec (time before exec.)
6535 * 24-31: number of beacons (suspend between channels)
6538 extra = (suspend_time / interval) << 24;
6539 scan_suspend_time = 0xFF0FFFFF &
6540 (extra | ((suspend_time % interval) * 1024));
6542 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6543 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6544 scan_suspend_time, interval);
6547 /* We should add the ability for user to lock to PASSIVE ONLY */
6548 if (priv->one_direct_scan) {
6550 ("Kicking off one direct scan for '%s'\n",
6551 iwl3945_escape_essid(priv->direct_ssid,
6552 priv->direct_ssid_len));
6553 scan->direct_scan[0].id = WLAN_EID_SSID;
6554 scan->direct_scan[0].len = priv->direct_ssid_len;
6555 memcpy(scan->direct_scan[0].ssid,
6556 priv->direct_ssid, priv->direct_ssid_len);
6558 } else if (!iwl3945_is_associated(priv) && priv->essid_len) {
6559 scan->direct_scan[0].id = WLAN_EID_SSID;
6560 scan->direct_scan[0].len = priv->essid_len;
6561 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
6566 /* We don't build a direct scan probe request; the uCode will do
6567 * that based on the direct_mask added to each channel entry */
6568 scan->tx_cmd.len = cpu_to_le16(
6569 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
6570 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0));
6571 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6572 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6573 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6575 /* flags + rate selection */
6577 switch (priv->scan_bands) {
6579 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6580 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6581 scan->good_CRC_th = 0;
6582 band = IEEE80211_BAND_2GHZ;
6586 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6587 scan->good_CRC_th = IWL_GOOD_CRC_TH;
6588 band = IEEE80211_BAND_5GHZ;
6592 IWL_WARNING("Invalid scan band count\n");
6596 /* select Rx antennas */
6597 scan->flags |= iwl3945_get_antenna_flags(priv);
6599 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
6600 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6604 ("Initiating direct scan for %s.\n",
6605 iwl3945_escape_essid(priv->essid, priv->essid_len));
6607 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
6609 scan->channel_count =
6610 iwl3945_get_channels_for_scan(
6611 priv, band, 1, /* active */
6613 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6615 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
6616 scan->channel_count * sizeof(struct iwl3945_scan_channel);
6618 scan->len = cpu_to_le16(cmd.len);
6620 set_bit(STATUS_SCAN_HW, &priv->status);
6621 rc = iwl3945_send_cmd_sync(priv, &cmd);
6625 queue_delayed_work(priv->workqueue, &priv->scan_check,
6626 IWL_SCAN_CHECK_WATCHDOG);
6628 mutex_unlock(&priv->mutex);
6632 /* inform mac80211 scan aborted */
6633 queue_work(priv->workqueue, &priv->scan_completed);
6634 mutex_unlock(&priv->mutex);
6637 static void iwl3945_bg_up(struct work_struct *data)
6639 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, up);
6641 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6644 mutex_lock(&priv->mutex);
6646 mutex_unlock(&priv->mutex);
6649 static void iwl3945_bg_restart(struct work_struct *data)
6651 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, restart);
6653 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6657 queue_work(priv->workqueue, &priv->up);
6660 static void iwl3945_bg_rx_replenish(struct work_struct *data)
6662 struct iwl3945_priv *priv =
6663 container_of(data, struct iwl3945_priv, rx_replenish);
6665 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6668 mutex_lock(&priv->mutex);
6669 iwl3945_rx_replenish(priv);
6670 mutex_unlock(&priv->mutex);
6673 #define IWL_DELAY_NEXT_SCAN (HZ*2)
6675 static void iwl3945_bg_post_associate(struct work_struct *data)
6677 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv,
6678 post_associate.work);
6681 struct ieee80211_conf *conf = NULL;
6682 DECLARE_MAC_BUF(mac);
6684 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6685 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
6690 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
6692 print_mac(mac, priv->active_rxon.bssid_addr));
6694 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6697 mutex_lock(&priv->mutex);
6699 if (!priv->vif || !priv->is_open) {
6700 mutex_unlock(&priv->mutex);
6703 iwl3945_scan_cancel_timeout(priv, 200);
6705 conf = ieee80211_get_hw_conf(priv->hw);
6707 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6708 iwl3945_commit_rxon(priv);
6710 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6711 iwl3945_setup_rxon_timing(priv);
6712 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6713 sizeof(priv->rxon_timing), &priv->rxon_timing);
6715 IWL_WARNING("REPLY_RXON_TIMING failed - "
6716 "Attempting to continue.\n");
6718 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6720 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6722 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6723 priv->assoc_id, priv->beacon_int);
6725 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6726 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6728 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6730 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6731 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6732 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6734 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6736 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6737 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6741 iwl3945_commit_rxon(priv);
6743 switch (priv->iw_mode) {
6744 case IEEE80211_IF_TYPE_STA:
6745 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
6748 case IEEE80211_IF_TYPE_IBSS:
6750 /* clear out the station table */
6751 iwl3945_clear_stations_table(priv);
6753 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6754 iwl3945_add_station(priv, priv->bssid, 0, 0);
6755 iwl3945_sync_sta(priv, IWL_STA_ID,
6756 (priv->band == IEEE80211_BAND_5GHZ) ?
6757 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6759 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6760 iwl3945_send_beacon_cmd(priv);
6765 IWL_ERROR("%s Should not be called in %d mode\n",
6766 __FUNCTION__, priv->iw_mode);
6770 iwl3945_sequence_reset(priv);
6772 #ifdef CONFIG_IWL3945_QOS
6773 iwl3945_activate_qos(priv, 0);
6774 #endif /* CONFIG_IWL3945_QOS */
6775 /* we have just associated, don't start scan too early */
6776 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
6777 mutex_unlock(&priv->mutex);
6780 static void iwl3945_bg_abort_scan(struct work_struct *work)
6782 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, abort_scan);
6784 if (!iwl3945_is_ready(priv))
6787 mutex_lock(&priv->mutex);
6789 set_bit(STATUS_SCAN_ABORTING, &priv->status);
6790 iwl3945_send_scan_abort(priv);
6792 mutex_unlock(&priv->mutex);
6795 static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
6797 static void iwl3945_bg_scan_completed(struct work_struct *work)
6799 struct iwl3945_priv *priv =
6800 container_of(work, struct iwl3945_priv, scan_completed);
6802 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6804 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6807 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6808 iwl3945_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
6810 ieee80211_scan_completed(priv->hw);
6812 /* Since setting the TXPOWER may have been deferred while
6813 * performing the scan, fire one off */
6814 mutex_lock(&priv->mutex);
6815 iwl3945_hw_reg_send_txpower(priv);
6816 mutex_unlock(&priv->mutex);
6819 /*****************************************************************************
6821 * mac80211 entry point functions
6823 *****************************************************************************/
6825 #define UCODE_READY_TIMEOUT (2 * HZ)
6827 static int iwl3945_mac_start(struct ieee80211_hw *hw)
6829 struct iwl3945_priv *priv = hw->priv;
6832 IWL_DEBUG_MAC80211("enter\n");
6834 if (pci_enable_device(priv->pci_dev)) {
6835 IWL_ERROR("Fail to pci_enable_device\n");
6838 pci_restore_state(priv->pci_dev);
6839 pci_enable_msi(priv->pci_dev);
6841 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6844 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
6845 goto out_disable_msi;
6848 /* we should be verifying the device is ready to be opened */
6849 mutex_lock(&priv->mutex);
6851 memset(&priv->staging_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6852 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6853 * ucode filename and max sizes are card-specific. */
6855 if (!priv->ucode_code.len) {
6856 ret = iwl3945_read_ucode(priv);
6858 IWL_ERROR("Could not read microcode: %d\n", ret);
6859 mutex_unlock(&priv->mutex);
6860 goto out_release_irq;
6864 ret = __iwl3945_up(priv);
6866 mutex_unlock(&priv->mutex);
6869 goto out_release_irq;
6871 IWL_DEBUG_INFO("Start UP work.\n");
6873 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6876 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6877 * mac80211 will not be run successfully. */
6878 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6879 test_bit(STATUS_READY, &priv->status),
6880 UCODE_READY_TIMEOUT);
6882 if (!test_bit(STATUS_READY, &priv->status)) {
6883 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
6884 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6886 goto out_release_irq;
6891 IWL_DEBUG_MAC80211("leave\n");
6895 free_irq(priv->pci_dev->irq, priv);
6897 pci_disable_msi(priv->pci_dev);
6898 pci_disable_device(priv->pci_dev);
6900 IWL_DEBUG_MAC80211("leave - failed\n");
6904 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
6906 struct iwl3945_priv *priv = hw->priv;
6908 IWL_DEBUG_MAC80211("enter\n");
6910 if (!priv->is_open) {
6911 IWL_DEBUG_MAC80211("leave - skip\n");
6917 if (iwl3945_is_ready_rf(priv)) {
6918 /* stop mac, cancel any scan request and clear
6919 * RXON_FILTER_ASSOC_MSK BIT
6921 mutex_lock(&priv->mutex);
6922 iwl3945_scan_cancel_timeout(priv, 100);
6923 cancel_delayed_work(&priv->post_associate);
6924 mutex_unlock(&priv->mutex);
6929 flush_workqueue(priv->workqueue);
6930 free_irq(priv->pci_dev->irq, priv);
6931 pci_disable_msi(priv->pci_dev);
6932 pci_save_state(priv->pci_dev);
6933 pci_disable_device(priv->pci_dev);
6935 IWL_DEBUG_MAC80211("leave\n");
6938 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
6939 struct ieee80211_tx_control *ctl)
6941 struct iwl3945_priv *priv = hw->priv;
6943 IWL_DEBUG_MAC80211("enter\n");
6945 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
6946 IWL_DEBUG_MAC80211("leave - monitor\n");
6950 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
6951 ctl->tx_rate->bitrate);
6953 if (iwl3945_tx_skb(priv, skb, ctl))
6954 dev_kfree_skb_any(skb);
6956 IWL_DEBUG_MAC80211("leave\n");
6960 static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
6961 struct ieee80211_if_init_conf *conf)
6963 struct iwl3945_priv *priv = hw->priv;
6964 unsigned long flags;
6965 DECLARE_MAC_BUF(mac);
6967 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
6970 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
6974 spin_lock_irqsave(&priv->lock, flags);
6975 priv->vif = conf->vif;
6977 spin_unlock_irqrestore(&priv->lock, flags);
6979 mutex_lock(&priv->mutex);
6981 if (conf->mac_addr) {
6982 IWL_DEBUG_MAC80211("Set: %s\n", print_mac(mac, conf->mac_addr));
6983 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6986 if (iwl3945_is_ready(priv))
6987 iwl3945_set_mode(priv, conf->type);
6989 mutex_unlock(&priv->mutex);
6991 IWL_DEBUG_MAC80211("leave\n");
6996 * iwl3945_mac_config - mac80211 config callback
6998 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6999 * be set inappropriately and the driver currently sets the hardware up to
7000 * use it whenever needed.
7002 static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
7004 struct iwl3945_priv *priv = hw->priv;
7005 const struct iwl3945_channel_info *ch_info;
7006 unsigned long flags;
7009 mutex_lock(&priv->mutex);
7010 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
7012 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
7014 if (!iwl3945_is_ready(priv)) {
7015 IWL_DEBUG_MAC80211("leave - not ready\n");
7020 if (unlikely(!iwl3945_param_disable_hw_scan &&
7021 test_bit(STATUS_SCANNING, &priv->status))) {
7022 IWL_DEBUG_MAC80211("leave - scanning\n");
7023 set_bit(STATUS_CONF_PENDING, &priv->status);
7024 mutex_unlock(&priv->mutex);
7028 spin_lock_irqsave(&priv->lock, flags);
7030 ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
7031 conf->channel->hw_value);
7032 if (!is_channel_valid(ch_info)) {
7033 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
7034 conf->channel->hw_value, conf->channel->band);
7035 IWL_DEBUG_MAC80211("leave - invalid channel\n");
7036 spin_unlock_irqrestore(&priv->lock, flags);
7041 iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
7043 iwl3945_set_flags_for_phymode(priv, conf->channel->band);
7045 /* The list of supported rates and rate mask can be different
7046 * for each phymode; since the phymode may have changed, reset
7047 * the rate mask to what mac80211 lists */
7048 iwl3945_set_rate(priv);
7050 spin_unlock_irqrestore(&priv->lock, flags);
7052 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
7053 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
7054 iwl3945_hw_channel_switch(priv, conf->channel);
7059 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
7061 if (!conf->radio_enabled) {
7062 IWL_DEBUG_MAC80211("leave - radio disabled\n");
7066 if (iwl3945_is_rfkill(priv)) {
7067 IWL_DEBUG_MAC80211("leave - RF kill\n");
7072 iwl3945_set_rate(priv);
7074 if (memcmp(&priv->active_rxon,
7075 &priv->staging_rxon, sizeof(priv->staging_rxon)))
7076 iwl3945_commit_rxon(priv);
7078 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
7080 IWL_DEBUG_MAC80211("leave\n");
7083 clear_bit(STATUS_CONF_PENDING, &priv->status);
7084 mutex_unlock(&priv->mutex);
7088 static void iwl3945_config_ap(struct iwl3945_priv *priv)
7092 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7095 /* The following should be done only at AP bring up */
7096 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
7098 /* RXON - unassoc (to set timing command) */
7099 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7100 iwl3945_commit_rxon(priv);
7103 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
7104 iwl3945_setup_rxon_timing(priv);
7105 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
7106 sizeof(priv->rxon_timing), &priv->rxon_timing);
7108 IWL_WARNING("REPLY_RXON_TIMING failed - "
7109 "Attempting to continue.\n");
7111 /* FIXME: what should be the assoc_id for AP? */
7112 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7113 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7114 priv->staging_rxon.flags |=
7115 RXON_FLG_SHORT_PREAMBLE_MSK;
7117 priv->staging_rxon.flags &=
7118 ~RXON_FLG_SHORT_PREAMBLE_MSK;
7120 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7121 if (priv->assoc_capability &
7122 WLAN_CAPABILITY_SHORT_SLOT_TIME)
7123 priv->staging_rxon.flags |=
7124 RXON_FLG_SHORT_SLOT_MSK;
7126 priv->staging_rxon.flags &=
7127 ~RXON_FLG_SHORT_SLOT_MSK;
7129 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7130 priv->staging_rxon.flags &=
7131 ~RXON_FLG_SHORT_SLOT_MSK;
7133 /* restore RXON assoc */
7134 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
7135 iwl3945_commit_rxon(priv);
7136 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
7138 iwl3945_send_beacon_cmd(priv);
7140 /* FIXME - we need to add code here to detect a totally new
7141 * configuration, reset the AP, unassoc, rxon timing, assoc,
7142 * clear sta table, add BCAST sta... */
7145 static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
7146 struct ieee80211_vif *vif,
7147 struct ieee80211_if_conf *conf)
7149 struct iwl3945_priv *priv = hw->priv;
7150 DECLARE_MAC_BUF(mac);
7151 unsigned long flags;
7157 /* XXX: this MUST use conf->mac_addr */
7159 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
7160 (!conf->beacon || !conf->ssid_len)) {
7162 ("Leaving in AP mode because HostAPD is not ready.\n");
7166 if (!iwl3945_is_alive(priv))
7169 mutex_lock(&priv->mutex);
7172 IWL_DEBUG_MAC80211("bssid: %s\n",
7173 print_mac(mac, conf->bssid));
7176 * very dubious code was here; the probe filtering flag is never set:
7178 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
7179 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
7181 if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
7182 IWL_DEBUG_MAC80211("leave - scanning\n");
7183 mutex_unlock(&priv->mutex);
7187 if (priv->vif != vif) {
7188 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
7189 mutex_unlock(&priv->mutex);
7193 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7195 conf->bssid = priv->mac_addr;
7196 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
7197 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
7198 print_mac(mac, conf->bssid));
7200 if (priv->ibss_beacon)
7201 dev_kfree_skb(priv->ibss_beacon);
7203 priv->ibss_beacon = conf->beacon;
7206 if (iwl3945_is_rfkill(priv))
7209 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
7210 !is_multicast_ether_addr(conf->bssid)) {
7211 /* If there is currently a HW scan going on in the background
7212 * then we need to cancel it else the RXON below will fail. */
7213 if (iwl3945_scan_cancel_timeout(priv, 100)) {
7214 IWL_WARNING("Aborted scan still in progress "
7216 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
7217 mutex_unlock(&priv->mutex);
7220 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
7222 /* TODO: Audit driver for usage of these members and see
7223 * if mac80211 deprecates them (priv->bssid looks like it
7224 * shouldn't be there, but I haven't scanned the IBSS code
7225 * to verify) - jpk */
7226 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
7228 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
7229 iwl3945_config_ap(priv);
7231 rc = iwl3945_commit_rxon(priv);
7232 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
7233 iwl3945_add_station(priv,
7234 priv->active_rxon.bssid_addr, 1, 0);
7238 iwl3945_scan_cancel_timeout(priv, 100);
7239 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7240 iwl3945_commit_rxon(priv);
7244 spin_lock_irqsave(&priv->lock, flags);
7245 if (!conf->ssid_len)
7246 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7248 memcpy(priv->essid, conf->ssid, conf->ssid_len);
7250 priv->essid_len = conf->ssid_len;
7251 spin_unlock_irqrestore(&priv->lock, flags);
7253 IWL_DEBUG_MAC80211("leave\n");
7254 mutex_unlock(&priv->mutex);
7259 static void iwl3945_configure_filter(struct ieee80211_hw *hw,
7260 unsigned int changed_flags,
7261 unsigned int *total_flags,
7262 int mc_count, struct dev_addr_list *mc_list)
7266 * see also iwl3945_connection_init_rx_config
7271 static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
7272 struct ieee80211_if_init_conf *conf)
7274 struct iwl3945_priv *priv = hw->priv;
7276 IWL_DEBUG_MAC80211("enter\n");
7278 mutex_lock(&priv->mutex);
7280 if (iwl3945_is_ready_rf(priv)) {
7281 iwl3945_scan_cancel_timeout(priv, 100);
7282 cancel_delayed_work(&priv->post_associate);
7283 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7284 iwl3945_commit_rxon(priv);
7286 if (priv->vif == conf->vif) {
7288 memset(priv->bssid, 0, ETH_ALEN);
7289 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7290 priv->essid_len = 0;
7292 mutex_unlock(&priv->mutex);
7294 IWL_DEBUG_MAC80211("leave\n");
7297 static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
7300 unsigned long flags;
7301 struct iwl3945_priv *priv = hw->priv;
7303 IWL_DEBUG_MAC80211("enter\n");
7305 mutex_lock(&priv->mutex);
7306 spin_lock_irqsave(&priv->lock, flags);
7308 if (!iwl3945_is_ready_rf(priv)) {
7310 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7314 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7316 IWL_ERROR("ERROR: APs don't scan\n");
7320 /* we don't schedule scan within next_scan_jiffies period */
7321 if (priv->next_scan_jiffies &&
7322 time_after(priv->next_scan_jiffies, jiffies)) {
7326 /* if we just finished scan ask for delay */
7327 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
7328 IWL_DELAY_NEXT_SCAN, jiffies)) {
7333 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
7334 iwl3945_escape_essid(ssid, len), (int)len);
7336 priv->one_direct_scan = 1;
7337 priv->direct_ssid_len = (u8)
7338 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7339 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
7341 priv->one_direct_scan = 0;
7343 rc = iwl3945_scan_initiate(priv);
7345 IWL_DEBUG_MAC80211("leave\n");
7348 spin_unlock_irqrestore(&priv->lock, flags);
7349 mutex_unlock(&priv->mutex);
7354 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
7355 const u8 *local_addr, const u8 *addr,
7356 struct ieee80211_key_conf *key)
7358 struct iwl3945_priv *priv = hw->priv;
7362 IWL_DEBUG_MAC80211("enter\n");
7364 if (!iwl3945_param_hwcrypto) {
7365 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7369 if (is_zero_ether_addr(addr))
7370 /* only support pairwise keys */
7373 sta_id = iwl3945_hw_find_station(priv, addr);
7374 if (sta_id == IWL_INVALID_STATION) {
7375 DECLARE_MAC_BUF(mac);
7377 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7378 print_mac(mac, addr));
7382 mutex_lock(&priv->mutex);
7384 iwl3945_scan_cancel_timeout(priv, 100);
7388 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
7390 iwl3945_set_rxon_hwcrypto(priv, 1);
7391 iwl3945_commit_rxon(priv);
7392 key->hw_key_idx = sta_id;
7393 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7394 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7398 rc = iwl3945_clear_sta_key_info(priv, sta_id);
7400 iwl3945_set_rxon_hwcrypto(priv, 0);
7401 iwl3945_commit_rxon(priv);
7402 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7409 IWL_DEBUG_MAC80211("leave\n");
7410 mutex_unlock(&priv->mutex);
7415 static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, int queue,
7416 const struct ieee80211_tx_queue_params *params)
7418 struct iwl3945_priv *priv = hw->priv;
7419 #ifdef CONFIG_IWL3945_QOS
7420 unsigned long flags;
7422 #endif /* CONFIG_IWL3945_QOS */
7424 IWL_DEBUG_MAC80211("enter\n");
7426 if (!iwl3945_is_ready_rf(priv)) {
7427 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7431 if (queue >= AC_NUM) {
7432 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7436 #ifdef CONFIG_IWL3945_QOS
7437 if (!priv->qos_data.qos_enable) {
7438 priv->qos_data.qos_active = 0;
7439 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7442 q = AC_NUM - 1 - queue;
7444 spin_lock_irqsave(&priv->lock, flags);
7446 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7447 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7448 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7449 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7450 cpu_to_le16((params->burst_time * 100));
7452 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7453 priv->qos_data.qos_active = 1;
7455 spin_unlock_irqrestore(&priv->lock, flags);
7457 mutex_lock(&priv->mutex);
7458 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
7459 iwl3945_activate_qos(priv, 1);
7460 else if (priv->assoc_id && iwl3945_is_associated(priv))
7461 iwl3945_activate_qos(priv, 0);
7463 mutex_unlock(&priv->mutex);
7465 #endif /*CONFIG_IWL3945_QOS */
7467 IWL_DEBUG_MAC80211("leave\n");
7471 static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
7472 struct ieee80211_tx_queue_stats *stats)
7474 struct iwl3945_priv *priv = hw->priv;
7476 struct iwl3945_tx_queue *txq;
7477 struct iwl3945_queue *q;
7478 unsigned long flags;
7480 IWL_DEBUG_MAC80211("enter\n");
7482 if (!iwl3945_is_ready_rf(priv)) {
7483 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7487 spin_lock_irqsave(&priv->lock, flags);
7489 for (i = 0; i < AC_NUM; i++) {
7490 txq = &priv->txq[i];
7492 avail = iwl3945_queue_space(q);
7494 stats->data[i].len = q->n_window - avail;
7495 stats->data[i].limit = q->n_window - q->high_mark;
7496 stats->data[i].count = q->n_window;
7499 spin_unlock_irqrestore(&priv->lock, flags);
7501 IWL_DEBUG_MAC80211("leave\n");
7506 static int iwl3945_mac_get_stats(struct ieee80211_hw *hw,
7507 struct ieee80211_low_level_stats *stats)
7509 IWL_DEBUG_MAC80211("enter\n");
7510 IWL_DEBUG_MAC80211("leave\n");
7515 static u64 iwl3945_mac_get_tsf(struct ieee80211_hw *hw)
7517 IWL_DEBUG_MAC80211("enter\n");
7518 IWL_DEBUG_MAC80211("leave\n");
7523 static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
7525 struct iwl3945_priv *priv = hw->priv;
7526 unsigned long flags;
7528 mutex_lock(&priv->mutex);
7529 IWL_DEBUG_MAC80211("enter\n");
7531 #ifdef CONFIG_IWL3945_QOS
7532 iwl3945_reset_qos(priv);
7534 cancel_delayed_work(&priv->post_associate);
7536 spin_lock_irqsave(&priv->lock, flags);
7538 priv->assoc_capability = 0;
7539 priv->call_post_assoc_from_beacon = 0;
7541 /* new association get rid of ibss beacon skb */
7542 if (priv->ibss_beacon)
7543 dev_kfree_skb(priv->ibss_beacon);
7545 priv->ibss_beacon = NULL;
7547 priv->beacon_int = priv->hw->conf.beacon_int;
7548 priv->timestamp1 = 0;
7549 priv->timestamp0 = 0;
7550 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
7551 priv->beacon_int = 0;
7553 spin_unlock_irqrestore(&priv->lock, flags);
7555 if (!iwl3945_is_ready_rf(priv)) {
7556 IWL_DEBUG_MAC80211("leave - not ready\n");
7557 mutex_unlock(&priv->mutex);
7561 /* we are restarting association process
7562 * clear RXON_FILTER_ASSOC_MSK bit
7564 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
7565 iwl3945_scan_cancel_timeout(priv, 100);
7566 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7567 iwl3945_commit_rxon(priv);
7570 /* Per mac80211.h: This is only used in IBSS mode... */
7571 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7573 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7574 mutex_unlock(&priv->mutex);
7578 priv->only_active_channel = 0;
7580 iwl3945_set_rate(priv);
7582 mutex_unlock(&priv->mutex);
7584 IWL_DEBUG_MAC80211("leave\n");
7588 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
7589 struct ieee80211_tx_control *control)
7591 struct iwl3945_priv *priv = hw->priv;
7592 unsigned long flags;
7594 mutex_lock(&priv->mutex);
7595 IWL_DEBUG_MAC80211("enter\n");
7597 if (!iwl3945_is_ready_rf(priv)) {
7598 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7599 mutex_unlock(&priv->mutex);
7603 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7604 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7605 mutex_unlock(&priv->mutex);
7609 spin_lock_irqsave(&priv->lock, flags);
7611 if (priv->ibss_beacon)
7612 dev_kfree_skb(priv->ibss_beacon);
7614 priv->ibss_beacon = skb;
7618 IWL_DEBUG_MAC80211("leave\n");
7619 spin_unlock_irqrestore(&priv->lock, flags);
7621 #ifdef CONFIG_IWL3945_QOS
7622 iwl3945_reset_qos(priv);
7625 queue_work(priv->workqueue, &priv->post_associate.work);
7627 mutex_unlock(&priv->mutex);
7632 /*****************************************************************************
7636 *****************************************************************************/
7638 #ifdef CONFIG_IWL3945_DEBUG
7641 * The following adds a new attribute to the sysfs representation
7642 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7643 * used for controlling the debug level.
7645 * See the level definitions in iwl for details.
7648 static ssize_t show_debug_level(struct device_driver *d, char *buf)
7650 return sprintf(buf, "0x%08X\n", iwl3945_debug_level);
7652 static ssize_t store_debug_level(struct device_driver *d,
7653 const char *buf, size_t count)
7655 char *p = (char *)buf;
7658 val = simple_strtoul(p, &p, 0);
7660 printk(KERN_INFO DRV_NAME
7661 ": %s is not in hex or decimal form.\n", buf);
7663 iwl3945_debug_level = val;
7665 return strnlen(buf, count);
7668 static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7669 show_debug_level, store_debug_level);
7671 #endif /* CONFIG_IWL3945_DEBUG */
7673 static ssize_t show_rf_kill(struct device *d,
7674 struct device_attribute *attr, char *buf)
7677 * 0 - RF kill not enabled
7678 * 1 - SW based RF kill active (sysfs)
7679 * 2 - HW based RF kill active
7680 * 3 - Both HW and SW based RF kill active
7682 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7683 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
7684 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
7686 return sprintf(buf, "%i\n", val);
7689 static ssize_t store_rf_kill(struct device *d,
7690 struct device_attribute *attr,
7691 const char *buf, size_t count)
7693 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7695 mutex_lock(&priv->mutex);
7696 iwl3945_radio_kill_sw(priv, buf[0] == '1');
7697 mutex_unlock(&priv->mutex);
7702 static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
7704 static ssize_t show_temperature(struct device *d,
7705 struct device_attribute *attr, char *buf)
7707 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7709 if (!iwl3945_is_alive(priv))
7712 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
7715 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7717 static ssize_t show_rs_window(struct device *d,
7718 struct device_attribute *attr,
7721 struct iwl3945_priv *priv = d->driver_data;
7722 return iwl3945_fill_rs_info(priv->hw, buf, IWL_AP_ID);
7724 static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
7726 static ssize_t show_tx_power(struct device *d,
7727 struct device_attribute *attr, char *buf)
7729 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7730 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7733 static ssize_t store_tx_power(struct device *d,
7734 struct device_attribute *attr,
7735 const char *buf, size_t count)
7737 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7738 char *p = (char *)buf;
7741 val = simple_strtoul(p, &p, 10);
7743 printk(KERN_INFO DRV_NAME
7744 ": %s is not in decimal form.\n", buf);
7746 iwl3945_hw_reg_set_txpower(priv, val);
7751 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7753 static ssize_t show_flags(struct device *d,
7754 struct device_attribute *attr, char *buf)
7756 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7758 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7761 static ssize_t store_flags(struct device *d,
7762 struct device_attribute *attr,
7763 const char *buf, size_t count)
7765 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7766 u32 flags = simple_strtoul(buf, NULL, 0);
7768 mutex_lock(&priv->mutex);
7769 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7770 /* Cancel any currently running scans... */
7771 if (iwl3945_scan_cancel_timeout(priv, 100))
7772 IWL_WARNING("Could not cancel scan.\n");
7774 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7776 priv->staging_rxon.flags = cpu_to_le32(flags);
7777 iwl3945_commit_rxon(priv);
7780 mutex_unlock(&priv->mutex);
7785 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7787 static ssize_t show_filter_flags(struct device *d,
7788 struct device_attribute *attr, char *buf)
7790 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7792 return sprintf(buf, "0x%04X\n",
7793 le32_to_cpu(priv->active_rxon.filter_flags));
7796 static ssize_t store_filter_flags(struct device *d,
7797 struct device_attribute *attr,
7798 const char *buf, size_t count)
7800 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7801 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7803 mutex_lock(&priv->mutex);
7804 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7805 /* Cancel any currently running scans... */
7806 if (iwl3945_scan_cancel_timeout(priv, 100))
7807 IWL_WARNING("Could not cancel scan.\n");
7809 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7810 "0x%04X\n", filter_flags);
7811 priv->staging_rxon.filter_flags =
7812 cpu_to_le32(filter_flags);
7813 iwl3945_commit_rxon(priv);
7816 mutex_unlock(&priv->mutex);
7821 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7822 store_filter_flags);
7824 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7826 static ssize_t show_measurement(struct device *d,
7827 struct device_attribute *attr, char *buf)
7829 struct iwl3945_priv *priv = dev_get_drvdata(d);
7830 struct iwl3945_spectrum_notification measure_report;
7831 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7832 u8 *data = (u8 *) & measure_report;
7833 unsigned long flags;
7835 spin_lock_irqsave(&priv->lock, flags);
7836 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7837 spin_unlock_irqrestore(&priv->lock, flags);
7840 memcpy(&measure_report, &priv->measure_report, size);
7841 priv->measurement_status = 0;
7842 spin_unlock_irqrestore(&priv->lock, flags);
7844 while (size && (PAGE_SIZE - len)) {
7845 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7846 PAGE_SIZE - len, 1);
7848 if (PAGE_SIZE - len)
7852 size -= min(size, 16U);
7858 static ssize_t store_measurement(struct device *d,
7859 struct device_attribute *attr,
7860 const char *buf, size_t count)
7862 struct iwl3945_priv *priv = dev_get_drvdata(d);
7863 struct ieee80211_measurement_params params = {
7864 .channel = le16_to_cpu(priv->active_rxon.channel),
7865 .start_time = cpu_to_le64(priv->last_tsf),
7866 .duration = cpu_to_le16(1),
7868 u8 type = IWL_MEASURE_BASIC;
7874 strncpy(buffer, buf, min(sizeof(buffer), count));
7875 channel = simple_strtoul(p, NULL, 0);
7877 params.channel = channel;
7880 while (*p && *p != ' ')
7883 type = simple_strtoul(p + 1, NULL, 0);
7886 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7887 "channel %d (for '%s')\n", type, params.channel, buf);
7888 iwl3945_get_measurement(priv, ¶ms, type);
7893 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7894 show_measurement, store_measurement);
7895 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
7897 static ssize_t show_rate(struct device *d,
7898 struct device_attribute *attr, char *buf)
7900 struct iwl3945_priv *priv = dev_get_drvdata(d);
7901 unsigned long flags;
7904 spin_lock_irqsave(&priv->sta_lock, flags);
7905 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
7906 i = priv->stations[IWL_AP_ID].current_rate.s.rate;
7908 i = priv->stations[IWL_STA_ID].current_rate.s.rate;
7909 spin_unlock_irqrestore(&priv->sta_lock, flags);
7911 i = iwl3945_rate_index_from_plcp(i);
7913 return sprintf(buf, "0\n");
7915 return sprintf(buf, "%d%s\n",
7916 (iwl3945_rates[i].ieee >> 1),
7917 (iwl3945_rates[i].ieee & 0x1) ? ".5" : "");
7920 static DEVICE_ATTR(rate, S_IRUSR, show_rate, NULL);
7922 static ssize_t store_retry_rate(struct device *d,
7923 struct device_attribute *attr,
7924 const char *buf, size_t count)
7926 struct iwl3945_priv *priv = dev_get_drvdata(d);
7928 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7929 if (priv->retry_rate <= 0)
7930 priv->retry_rate = 1;
7935 static ssize_t show_retry_rate(struct device *d,
7936 struct device_attribute *attr, char *buf)
7938 struct iwl3945_priv *priv = dev_get_drvdata(d);
7939 return sprintf(buf, "%d", priv->retry_rate);
7942 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7945 static ssize_t store_power_level(struct device *d,
7946 struct device_attribute *attr,
7947 const char *buf, size_t count)
7949 struct iwl3945_priv *priv = dev_get_drvdata(d);
7953 mode = simple_strtoul(buf, NULL, 0);
7954 mutex_lock(&priv->mutex);
7956 if (!iwl3945_is_ready(priv)) {
7961 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
7962 mode = IWL_POWER_AC;
7964 mode |= IWL_POWER_ENABLED;
7966 if (mode != priv->power_mode) {
7967 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
7969 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7972 priv->power_mode = mode;
7978 mutex_unlock(&priv->mutex);
7982 #define MAX_WX_STRING 80
7984 /* Values are in microsecond */
7985 static const s32 timeout_duration[] = {
7992 static const s32 period_duration[] = {
8000 static ssize_t show_power_level(struct device *d,
8001 struct device_attribute *attr, char *buf)
8003 struct iwl3945_priv *priv = dev_get_drvdata(d);
8004 int level = IWL_POWER_LEVEL(priv->power_mode);
8007 p += sprintf(p, "%d ", level);
8009 case IWL_POWER_MODE_CAM:
8011 p += sprintf(p, "(AC)");
8013 case IWL_POWER_BATTERY:
8014 p += sprintf(p, "(BATTERY)");
8018 "(Timeout %dms, Period %dms)",
8019 timeout_duration[level - 1] / 1000,
8020 period_duration[level - 1] / 1000);
8023 if (!(priv->power_mode & IWL_POWER_ENABLED))
8024 p += sprintf(p, " OFF\n");
8026 p += sprintf(p, " \n");
8028 return (p - buf + 1);
8032 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
8035 static ssize_t show_channels(struct device *d,
8036 struct device_attribute *attr, char *buf)
8038 /* all this shit doesn't belong into sysfs anyway */
8042 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
8044 static ssize_t show_statistics(struct device *d,
8045 struct device_attribute *attr, char *buf)
8047 struct iwl3945_priv *priv = dev_get_drvdata(d);
8048 u32 size = sizeof(struct iwl3945_notif_statistics);
8049 u32 len = 0, ofs = 0;
8050 u8 *data = (u8 *) & priv->statistics;
8053 if (!iwl3945_is_alive(priv))
8056 mutex_lock(&priv->mutex);
8057 rc = iwl3945_send_statistics_request(priv);
8058 mutex_unlock(&priv->mutex);
8062 "Error sending statistics request: 0x%08X\n", rc);
8066 while (size && (PAGE_SIZE - len)) {
8067 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8068 PAGE_SIZE - len, 1);
8070 if (PAGE_SIZE - len)
8074 size -= min(size, 16U);
8080 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
8082 static ssize_t show_antenna(struct device *d,
8083 struct device_attribute *attr, char *buf)
8085 struct iwl3945_priv *priv = dev_get_drvdata(d);
8087 if (!iwl3945_is_alive(priv))
8090 return sprintf(buf, "%d\n", priv->antenna);
8093 static ssize_t store_antenna(struct device *d,
8094 struct device_attribute *attr,
8095 const char *buf, size_t count)
8098 struct iwl3945_priv *priv = dev_get_drvdata(d);
8103 if (sscanf(buf, "%1i", &ant) != 1) {
8104 IWL_DEBUG_INFO("not in hex or decimal form.\n");
8108 if ((ant >= 0) && (ant <= 2)) {
8109 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
8110 priv->antenna = (enum iwl3945_antenna)ant;
8112 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
8118 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
8120 static ssize_t show_status(struct device *d,
8121 struct device_attribute *attr, char *buf)
8123 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
8124 if (!iwl3945_is_alive(priv))
8126 return sprintf(buf, "0x%08x\n", (int)priv->status);
8129 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
8131 static ssize_t dump_error_log(struct device *d,
8132 struct device_attribute *attr,
8133 const char *buf, size_t count)
8135 char *p = (char *)buf;
8138 iwl3945_dump_nic_error_log((struct iwl3945_priv *)d->driver_data);
8140 return strnlen(buf, count);
8143 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
8145 static ssize_t dump_event_log(struct device *d,
8146 struct device_attribute *attr,
8147 const char *buf, size_t count)
8149 char *p = (char *)buf;
8152 iwl3945_dump_nic_event_log((struct iwl3945_priv *)d->driver_data);
8154 return strnlen(buf, count);
8157 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
8159 /*****************************************************************************
8161 * driver setup and teardown
8163 *****************************************************************************/
8165 static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv)
8167 priv->workqueue = create_workqueue(DRV_NAME);
8169 init_waitqueue_head(&priv->wait_command_queue);
8171 INIT_WORK(&priv->up, iwl3945_bg_up);
8172 INIT_WORK(&priv->restart, iwl3945_bg_restart);
8173 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
8174 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
8175 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
8176 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
8177 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
8178 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
8179 INIT_DELAYED_WORK(&priv->post_associate, iwl3945_bg_post_associate);
8180 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
8181 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
8182 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
8184 iwl3945_hw_setup_deferred_work(priv);
8186 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
8187 iwl3945_irq_tasklet, (unsigned long)priv);
8190 static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv)
8192 iwl3945_hw_cancel_deferred_work(priv);
8194 cancel_delayed_work_sync(&priv->init_alive_start);
8195 cancel_delayed_work(&priv->scan_check);
8196 cancel_delayed_work(&priv->alive_start);
8197 cancel_delayed_work(&priv->post_associate);
8198 cancel_work_sync(&priv->beacon_update);
8201 static struct attribute *iwl3945_sysfs_entries[] = {
8202 &dev_attr_antenna.attr,
8203 &dev_attr_channels.attr,
8204 &dev_attr_dump_errors.attr,
8205 &dev_attr_dump_events.attr,
8206 &dev_attr_flags.attr,
8207 &dev_attr_filter_flags.attr,
8208 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
8209 &dev_attr_measurement.attr,
8211 &dev_attr_power_level.attr,
8212 &dev_attr_rate.attr,
8213 &dev_attr_retry_rate.attr,
8214 &dev_attr_rf_kill.attr,
8215 &dev_attr_rs_window.attr,
8216 &dev_attr_statistics.attr,
8217 &dev_attr_status.attr,
8218 &dev_attr_temperature.attr,
8219 &dev_attr_tx_power.attr,
8224 static struct attribute_group iwl3945_attribute_group = {
8225 .name = NULL, /* put in device directory */
8226 .attrs = iwl3945_sysfs_entries,
8229 static struct ieee80211_ops iwl3945_hw_ops = {
8230 .tx = iwl3945_mac_tx,
8231 .start = iwl3945_mac_start,
8232 .stop = iwl3945_mac_stop,
8233 .add_interface = iwl3945_mac_add_interface,
8234 .remove_interface = iwl3945_mac_remove_interface,
8235 .config = iwl3945_mac_config,
8236 .config_interface = iwl3945_mac_config_interface,
8237 .configure_filter = iwl3945_configure_filter,
8238 .set_key = iwl3945_mac_set_key,
8239 .get_stats = iwl3945_mac_get_stats,
8240 .get_tx_stats = iwl3945_mac_get_tx_stats,
8241 .conf_tx = iwl3945_mac_conf_tx,
8242 .get_tsf = iwl3945_mac_get_tsf,
8243 .reset_tsf = iwl3945_mac_reset_tsf,
8244 .beacon_update = iwl3945_mac_beacon_update,
8245 .hw_scan = iwl3945_mac_hw_scan
8248 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8252 struct iwl3945_priv *priv;
8253 struct ieee80211_hw *hw;
8255 DECLARE_MAC_BUF(mac);
8257 /* Disabling hardware scan means that mac80211 will perform scans
8258 * "the hard way", rather than using device's scan. */
8259 if (iwl3945_param_disable_hw_scan) {
8260 IWL_DEBUG_INFO("Disabling hw_scan\n");
8261 iwl3945_hw_ops.hw_scan = NULL;
8264 if ((iwl3945_param_queues_num > IWL_MAX_NUM_QUEUES) ||
8265 (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
8266 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
8267 IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
8272 /* mac80211 allocates memory for this device instance, including
8273 * space for this driver's private structure */
8274 hw = ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops);
8276 IWL_ERROR("Can not allocate network device\n");
8280 SET_IEEE80211_DEV(hw, &pdev->dev);
8282 hw->rate_control_algorithm = "iwl-3945-rs";
8284 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
8288 priv->pci_dev = pdev;
8290 /* Select antenna (may be helpful if only one antenna is connected) */
8291 priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
8292 #ifdef CONFIG_IWL3945_DEBUG
8293 iwl3945_debug_level = iwl3945_param_debug;
8294 atomic_set(&priv->restrict_refcnt, 0);
8296 priv->retry_rate = 1;
8298 priv->ibss_beacon = NULL;
8300 /* Tell mac80211 and its clients (e.g. Wireless Extensions)
8301 * the range of signal quality values that we'll provide.
8302 * Negative values for level/noise indicate that we'll provide dBm.
8303 * For WE, at least, non-0 values here *enable* display of values
8304 * in app (iwconfig). */
8305 hw->max_rssi = -20; /* signal level, negative indicates dBm */
8306 hw->max_noise = -20; /* noise level, negative indicates dBm */
8307 hw->max_signal = 100; /* link quality indication (%) */
8309 /* Tell mac80211 our Tx characteristics */
8310 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
8312 /* 4 EDCA QOS priorities */
8315 spin_lock_init(&priv->lock);
8316 spin_lock_init(&priv->power_data.lock);
8317 spin_lock_init(&priv->sta_lock);
8318 spin_lock_init(&priv->hcmd_lock);
8320 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
8321 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
8323 INIT_LIST_HEAD(&priv->free_frames);
8325 mutex_init(&priv->mutex);
8326 if (pci_enable_device(pdev)) {
8328 goto out_ieee80211_free_hw;
8331 pci_set_master(pdev);
8333 /* Clear the driver's (not device's) station table */
8334 iwl3945_clear_stations_table(priv);
8336 priv->data_retry_limit = -1;
8337 priv->ieee_channels = NULL;
8338 priv->ieee_rates = NULL;
8339 priv->band = IEEE80211_BAND_2GHZ;
8341 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
8343 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
8345 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
8346 goto out_pci_disable_device;
8349 pci_set_drvdata(pdev, priv);
8350 err = pci_request_regions(pdev, DRV_NAME);
8352 goto out_pci_disable_device;
8354 /* We disable the RETRY_TIMEOUT register (0x41) to keep
8355 * PCI Tx retries from interfering with C3 CPU state */
8356 pci_write_config_byte(pdev, 0x41, 0x00);
8358 priv->hw_base = pci_iomap(pdev, 0, 0);
8359 if (!priv->hw_base) {
8361 goto out_pci_release_regions;
8364 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
8365 (unsigned long long) pci_resource_len(pdev, 0));
8366 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
8368 /* Initialize module parameter values here */
8370 /* Disable radio (SW RF KILL) via parameter when loading driver */
8371 if (iwl3945_param_disable) {
8372 set_bit(STATUS_RF_KILL_SW, &priv->status);
8373 IWL_DEBUG_INFO("Radio disabled.\n");
8376 priv->iw_mode = IEEE80211_IF_TYPE_STA;
8379 (priv->pci_dev->device << 16) | priv->pci_dev->subsystem_device;
8382 case 0x42221005: /* 0x4222 0x8086 0x1005 is BG SKU */
8383 case 0x42221034: /* 0x4222 0x8086 0x1034 is BG SKU */
8384 case 0x42271014: /* 0x4227 0x8086 0x1014 is BG SKU */
8385 case 0x42221044: /* 0x4222 0x8086 0x1044 is BG SKU */
8390 * Rest are assumed ABG SKU -- if this is not the
8391 * case then the card will get the wrong 'Detected'
8392 * line in the kernel log however the code that
8393 * initializes the GEO table will detect no A-band
8394 * channels and remove the is_abg mask.
8401 printk(KERN_INFO DRV_NAME
8402 ": Detected Intel PRO/Wireless 3945%sBG Network Connection\n",
8403 priv->is_abg ? "A" : "");
8405 /* Device-specific setup */
8406 if (iwl3945_hw_set_hw_setting(priv)) {
8407 IWL_ERROR("failed to set hw settings\n");
8411 #ifdef CONFIG_IWL3945_QOS
8412 if (iwl3945_param_qos_enable)
8413 priv->qos_data.qos_enable = 1;
8415 iwl3945_reset_qos(priv);
8417 priv->qos_data.qos_active = 0;
8418 priv->qos_data.qos_cap.val = 0;
8419 #endif /* CONFIG_IWL3945_QOS */
8421 iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
8422 iwl3945_setup_deferred_work(priv);
8423 iwl3945_setup_rx_handlers(priv);
8425 priv->rates_mask = IWL_RATES_MASK;
8426 /* If power management is turned on, default to AC mode */
8427 priv->power_mode = IWL_POWER_AC;
8428 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
8430 iwl3945_disable_interrupts(priv);
8432 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8434 IWL_ERROR("failed to create sysfs device attributes\n");
8435 goto out_release_irq;
8439 iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
8440 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
8442 iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
8443 err = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
8444 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
8445 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
8447 IWL_DEBUG_INFO("Failed to init the card\n");
8448 goto out_remove_sysfs;
8450 /* Read the EEPROM */
8451 err = iwl3945_eeprom_init(priv);
8453 IWL_ERROR("Unable to init EEPROM\n");
8454 goto out_remove_sysfs;
8456 /* MAC Address location in EEPROM same for 3945/4965 */
8457 get_eeprom_mac(priv, priv->mac_addr);
8458 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
8459 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
8461 err = iwl3945_init_channel_map(priv);
8463 IWL_ERROR("initializing regulatory failed: %d\n", err);
8464 goto out_remove_sysfs;
8467 err = iwl3945_init_geos(priv);
8469 IWL_ERROR("initializing geos failed: %d\n", err);
8470 goto out_free_channel_map;
8473 iwl3945_rate_control_register(priv->hw);
8474 err = ieee80211_register_hw(priv->hw);
8476 IWL_ERROR("Failed to register network device (error %d)\n", err);
8480 priv->hw->conf.beacon_int = 100;
8481 priv->mac80211_registered = 1;
8482 pci_save_state(pdev);
8483 pci_disable_device(pdev);
8488 iwl3945_free_geos(priv);
8489 out_free_channel_map:
8490 iwl3945_free_channel_map(priv);
8492 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8495 destroy_workqueue(priv->workqueue);
8496 priv->workqueue = NULL;
8497 iwl3945_unset_hw_setting(priv);
8500 pci_iounmap(pdev, priv->hw_base);
8501 out_pci_release_regions:
8502 pci_release_regions(pdev);
8503 out_pci_disable_device:
8504 pci_disable_device(pdev);
8505 pci_set_drvdata(pdev, NULL);
8506 out_ieee80211_free_hw:
8507 ieee80211_free_hw(priv->hw);
8512 static void iwl3945_pci_remove(struct pci_dev *pdev)
8514 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8515 struct list_head *p, *q;
8521 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8523 set_bit(STATUS_EXIT_PENDING, &priv->status);
8527 /* Free MAC hash list for ADHOC */
8528 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
8529 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
8531 kfree(list_entry(p, struct iwl3945_ibss_seq, list));
8535 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8537 iwl3945_dealloc_ucode_pci(priv);
8540 iwl3945_rx_queue_free(priv, &priv->rxq);
8541 iwl3945_hw_txq_ctx_free(priv);
8543 iwl3945_unset_hw_setting(priv);
8544 iwl3945_clear_stations_table(priv);
8546 if (priv->mac80211_registered) {
8547 ieee80211_unregister_hw(priv->hw);
8548 iwl3945_rate_control_unregister(priv->hw);
8551 /*netif_stop_queue(dev); */
8552 flush_workqueue(priv->workqueue);
8554 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
8555 * priv->workqueue... so we can't take down the workqueue
8557 destroy_workqueue(priv->workqueue);
8558 priv->workqueue = NULL;
8560 pci_iounmap(pdev, priv->hw_base);
8561 pci_release_regions(pdev);
8562 pci_disable_device(pdev);
8563 pci_set_drvdata(pdev, NULL);
8565 iwl3945_free_channel_map(priv);
8566 iwl3945_free_geos(priv);
8568 if (priv->ibss_beacon)
8569 dev_kfree_skb(priv->ibss_beacon);
8571 ieee80211_free_hw(priv->hw);
8576 static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
8578 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8580 if (priv->is_open) {
8581 set_bit(STATUS_IN_SUSPEND, &priv->status);
8582 iwl3945_mac_stop(priv->hw);
8586 pci_set_power_state(pdev, PCI_D3hot);
8591 static int iwl3945_pci_resume(struct pci_dev *pdev)
8593 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8595 pci_set_power_state(pdev, PCI_D0);
8598 iwl3945_mac_start(priv->hw);
8600 clear_bit(STATUS_IN_SUSPEND, &priv->status);
8604 #endif /* CONFIG_PM */
8606 /*****************************************************************************
8608 * driver and module entry point
8610 *****************************************************************************/
8612 static struct pci_driver iwl3945_driver = {
8614 .id_table = iwl3945_hw_card_ids,
8615 .probe = iwl3945_pci_probe,
8616 .remove = __devexit_p(iwl3945_pci_remove),
8618 .suspend = iwl3945_pci_suspend,
8619 .resume = iwl3945_pci_resume,
8623 static int __init iwl3945_init(void)
8627 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8628 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
8629 ret = pci_register_driver(&iwl3945_driver);
8631 IWL_ERROR("Unable to initialize PCI module\n");
8634 #ifdef CONFIG_IWL3945_DEBUG
8635 ret = driver_create_file(&iwl3945_driver.driver, &driver_attr_debug_level);
8637 IWL_ERROR("Unable to create driver sysfs file\n");
8638 pci_unregister_driver(&iwl3945_driver);
8646 static void __exit iwl3945_exit(void)
8648 #ifdef CONFIG_IWL3945_DEBUG
8649 driver_remove_file(&iwl3945_driver.driver, &driver_attr_debug_level);
8651 pci_unregister_driver(&iwl3945_driver);
8654 module_param_named(antenna, iwl3945_param_antenna, int, 0444);
8655 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
8656 module_param_named(disable, iwl3945_param_disable, int, 0444);
8657 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
8658 module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
8659 MODULE_PARM_DESC(hwcrypto,
8660 "using hardware crypto engine (default 0 [software])\n");
8661 module_param_named(debug, iwl3945_param_debug, int, 0444);
8662 MODULE_PARM_DESC(debug, "debug output mask");
8663 module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
8664 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8666 module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
8667 MODULE_PARM_DESC(queues_num, "number of hw queues.");
8670 module_param_named(qos_enable, iwl3945_param_qos_enable, int, 0444);
8671 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
8673 module_exit(iwl3945_exit);
8674 module_init(iwl3945_init);