drivers/net/wireless/iwlwifi/iwl-3945.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/version.h>
  30 #include <linux/init.h>
  31 #include <linux/pci.h>
  32 #include <linux/dma-mapping.h>
  33 #include <linux/delay.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/wireless.h>
  37 #include <linux/firmware.h>
  38 #include <net/mac80211.h>
  39
  40 #include <linux/etherdevice.h>
  41 #include <linux/delay.h>
  42
  43 #include "iwlwifi.h"
  44 #include "iwl-helpers.h"
  45 #include "iwl-3945.h"
  46 #include "iwl-3945-rs.h"
  47
  48 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np)    \
  49         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,   \
  50                                     IWL_RATE_##r##M_IEEE,   \
  51                                     IWL_RATE_##ip##M_INDEX, \
  52                                     IWL_RATE_##in##M_INDEX, \
  53                                     IWL_RATE_##rp##M_INDEX, \
  54                                     IWL_RATE_##rn##M_INDEX, \
  55                                     IWL_RATE_##pp##M_INDEX, \
  56                                     IWL_RATE_##np##M_INDEX }
  57
  58 /*
  59  * Parameter order:
  60  *   rate, prev rate, next rate, prev tgg rate, next tgg rate
  61  *
  62  * If there isn't a valid next or previous rate then INV is used which
  63  * maps to IWL_RATE_INVALID
  64  *
  65  */
  66 const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
  67         IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
  68         IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11),       /*  9mbps */
  69         IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
  70         IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
  71         IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
  72         IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
  73         IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
  74         IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  75         IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2),    /*  1mbps */
  76         IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5),          /*  2mbps */
  77         IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
  78         IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18),      /* 11mbps */
  79 };
  80
  81 /* 1 = enable the iwl_disable_events() function */
  82 #define IWL_EVT_DISABLE (0)
  83 #define IWL_EVT_DISABLE_SIZE (1532/32)
  84
  85 /**
  86  * iwl_disable_events - Disable selected events in uCode event log
  87  *
  88  * Disable an event by writing "1"s into "disable"
  89  *   bitmap in SRAM.  Bit position corresponds to Event # (id/type).
  90  *   Default values of 0 enable uCode events to be logged.
  91  * Use for only special debugging.  This function is just a placeholder as-is,
  92  *   you'll need to provide the special bits! ...
  93  *   ... and set IWL_EVT_DISABLE to 1. */
  94 void iwl_disable_events(struct iwl_priv *priv)
  95 {
  96         int rc;
  97         int i;
  98         u32 base;               /* SRAM address of event log header */
  99         u32 disable_ptr;        /* SRAM address of event-disable bitmap array */
 100         u32 array_size;         /* # of u32 entries in array */
 101         u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
 102                 0x00000000,     /*   31 -    0  Event id numbers */
 103                 0x00000000,     /*   63 -   32 */
 104                 0x00000000,     /*   95 -   64 */
 105                 0x00000000,     /*  127 -   96 */
 106                 0x00000000,     /*  159 -  128 */
 107                 0x00000000,     /*  191 -  160 */
 108                 0x00000000,     /*  223 -  192 */
 109                 0x00000000,     /*  255 -  224 */
 110                 0x00000000,     /*  287 -  256 */
 111                 0x00000000,     /*  319 -  288 */
 112                 0x00000000,     /*  351 -  320 */
 113                 0x00000000,     /*  383 -  352 */
 114                 0x00000000,     /*  415 -  384 */
 115                 0x00000000,     /*  447 -  416 */
 116                 0x00000000,     /*  479 -  448 */
 117                 0x00000000,     /*  511 -  480 */
 118                 0x00000000,     /*  543 -  512 */
 119                 0x00000000,     /*  575 -  544 */
 120                 0x00000000,     /*  607 -  576 */
 121                 0x00000000,     /*  639 -  608 */
 122                 0x00000000,     /*  671 -  640 */
 123                 0x00000000,     /*  703 -  672 */
 124                 0x00000000,     /*  735 -  704 */
 125                 0x00000000,     /*  767 -  736 */
 126                 0x00000000,     /*  799 -  768 */
 127                 0x00000000,     /*  831 -  800 */
 128                 0x00000000,     /*  863 -  832 */
 129                 0x00000000,     /*  895 -  864 */
 130                 0x00000000,     /*  927 -  896 */
 131                 0x00000000,     /*  959 -  928 */
 132                 0x00000000,     /*  991 -  960 */
 133                 0x00000000,     /* 1023 -  992 */
 134                 0x00000000,     /* 1055 - 1024 */
 135                 0x00000000,     /* 1087 - 1056 */
 136                 0x00000000,     /* 1119 - 1088 */
 137                 0x00000000,     /* 1151 - 1120 */
 138                 0x00000000,     /* 1183 - 1152 */
 139                 0x00000000,     /* 1215 - 1184 */
 140                 0x00000000,     /* 1247 - 1216 */
 141                 0x00000000,     /* 1279 - 1248 */
 142                 0x00000000,     /* 1311 - 1280 */
 143                 0x00000000,     /* 1343 - 1312 */
 144                 0x00000000,     /* 1375 - 1344 */
 145                 0x00000000,     /* 1407 - 1376 */
 146                 0x00000000,     /* 1439 - 1408 */
 147                 0x00000000,     /* 1471 - 1440 */
 148                 0x00000000,     /* 1503 - 1472 */
 149         };
 150
 151         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 152         if (!iwl_hw_valid_rtc_data_addr(base)) {
 153                 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
 154                 return;
 155         }
 156
 157         rc = iwl_grab_restricted_access(priv);
 158         if (rc) {
 159                 IWL_WARNING("Can not read from adapter at this time.\n");
 160                 return;
 161         }
 162
 163         disable_ptr = iwl_read_restricted_mem(priv, base + (4 * sizeof(u32)));
 164         array_size = iwl_read_restricted_mem(priv, base + (5 * sizeof(u32)));
 165         iwl_release_restricted_access(priv);
 166
 167         if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
 168                 IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
 169                                disable_ptr);
 170                 rc = iwl_grab_restricted_access(priv);
 171                 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
 172                         iwl_write_restricted_mem(priv,
 173                                                  disable_ptr +
 174                                                  (i * sizeof(u32)),
 175                                                  evt_disable[i]);
 176
 177                 iwl_release_restricted_access(priv);
 178         } else {
 179                 IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
 180                 IWL_DEBUG_INFO("  by writing \"1\"s into disable bitmap\n");
 181                 IWL_DEBUG_INFO("  in SRAM at 0x%x, size %d u32s\n",
 182                                disable_ptr, array_size);
 183         }
 184
 185 }
 186
 187 /**
 188  * iwl3945_get_antenna_flags - Get antenna flags for RXON command
 189  * @priv: eeprom and antenna fields are used to determine antenna flags
 190  *
 191  * priv->eeprom  is used to determine if antenna AUX/MAIN are reversed
 192  * priv->antenna specifies the antenna diversity mode:
 193  *
 194  * IWL_ANTENNA_DIVERISTY - NIC selects best antenna by itself
 195  * IWL_ANTENNA_MAIN      - Force MAIN antenna
 196  * IWL_ANTENNA_AUX       - Force AUX antenna
 197  */
 198 __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
 199 {
 200         switch (priv->antenna) {
 201         case IWL_ANTENNA_DIVERSITY:
 202                 return 0;
 203
 204         case IWL_ANTENNA_MAIN:
 205                 if (priv->eeprom.antenna_switch_type)
 206                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 207                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 208
 209         case IWL_ANTENNA_AUX:
 210                 if (priv->eeprom.antenna_switch_type)
 211                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 212                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 213         }
 214
 215         /* bad antenna selector value */
 216         IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna);
 217         return 0;               /* "diversity" is default if error */
 218 }
 219
 220 /*****************************************************************************
 221  *
 222  * Intel PRO/Wireless 3945ABG/BG Network Connection
 223  *
 224  *  RX handler implementations
 225  *
 226  *  Used by iwl-base.c
 227  *
 228  *****************************************************************************/
 229
 230 void iwl_hw_rx_statistics(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
 231 {
 232         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
 233         IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
 234                      (int)sizeof(struct iwl_notif_statistics),
 235                      le32_to_cpu(pkt->len));
 236
 237         memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
 238
 239         priv->last_statistics_time = jiffies;
 240 }
 241
 242 static void iwl3945_handle_data_packet(struct iwl_priv *priv, int is_data,
 243                                    struct iwl_rx_mem_buffer *rxb,
 244                                    struct ieee80211_rx_status *stats,
 245                                    u16 phy_flags)
 246 {
 247         struct ieee80211_hdr *hdr;
 248         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
 249         struct iwl_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 250         struct iwl_rx_frame_end *rx_end = IWL_RX_END(pkt);
 251         short len = le16_to_cpu(rx_hdr->len);
 252
 253         /* We received data from the HW, so stop the watchdog */
 254         if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) {
 255                 IWL_DEBUG_DROP("Corruption detected!\n");
 256                 return;
 257         }
 258
 259         /* We only process data packets if the interface is open */
 260         if (unlikely(!priv->is_open)) {
 261                 IWL_DEBUG_DROP_LIMIT
 262                     ("Dropping packet while interface is not open.\n");
 263                 return;
 264         }
 265         if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
 266                 if (iwl_param_hwcrypto)
 267                         iwl_set_decrypted_flag(priv, rxb->skb,
 268                                                le32_to_cpu(rx_end->status),
 269                                                stats);
 270                 iwl_handle_data_packet_monitor(priv, rxb, IWL_RX_DATA(pkt),
 271                                                len, stats, phy_flags);
 272                 return;
 273         }
 274
 275         skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt);
 276         /* Set the size of the skb to the size of the frame */
 277         skb_put(rxb->skb, le16_to_cpu(rx_hdr->len));
 278
 279         hdr = (void *)rxb->skb->data;
 280
 281         if (iwl_param_hwcrypto)
 282                 iwl_set_decrypted_flag(priv, rxb->skb,
 283                                        le32_to_cpu(rx_end->status), stats);
 284
 285         ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
 286         rxb->skb = NULL;
 287 }
 288
 289 static void iwl3945_rx_reply_rx(struct iwl_priv *priv,
 290                                 struct iwl_rx_mem_buffer *rxb)
 291 {
 292         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
 293         struct iwl_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 294         struct iwl_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 295         struct iwl_rx_frame_end *rx_end = IWL_RX_END(pkt);
 296         struct ieee80211_hdr *header;
 297         u16 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
 298         u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
 299         u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
 300         struct ieee80211_rx_status stats = {
 301                 .mactime = le64_to_cpu(rx_end->timestamp),
 302                 .freq = ieee80211chan2mhz(le16_to_cpu(rx_hdr->channel)),
 303                 .channel = le16_to_cpu(rx_hdr->channel),
 304                 .phymode = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
 305                 MODE_IEEE80211G : MODE_IEEE80211A,
 306                 .antenna = 0,
 307                 .rate = rx_hdr->rate,
 308                 .flag = 0,
 309         };
 310         u8 network_packet;
 311         int snr;
 312
 313         if ((unlikely(rx_stats->phy_count > 20))) {
 314                 IWL_DEBUG_DROP
 315                     ("dsp size out of range [0,20]: "
 316                      "%d/n", rx_stats->phy_count);
 317                 return;
 318         }
 319
 320         if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
 321             || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
 322                 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
 323                 return;
 324         }
 325
 326         if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
 327                 iwl3945_handle_data_packet(priv, 1, rxb, &stats, phy_flags);
 328                 return;
 329         }
 330
 331         /* Convert 3945's rssi indicator to dBm */
 332         stats.ssi = rx_stats->rssi - IWL_RSSI_OFFSET;
 333
 334         /* Set default noise value to -127 */
 335         if (priv->last_rx_noise == 0)
 336                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
 337
 338         /* 3945 provides noise info for OFDM frames only.
 339          * sig_avg and noise_diff are measured by the 3945's digital signal
 340          *   processor (DSP), and indicate linear levels of signal level and
 341          *   distortion/noise within the packet preamble after
 342          *   automatic gain control (AGC).  sig_avg should stay fairly
 343          *   constant if the radio's AGC is working well.
 344          * Since these values are linear (not dB or dBm), linear
 345          *   signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
 346          * Convert linear SNR to dB SNR, then subtract that from rssi dBm
 347          *   to obtain noise level in dBm.
 348          * Calculate stats.signal (quality indicator in %) based on SNR. */
 349         if (rx_stats_noise_diff) {
 350                 snr = rx_stats_sig_avg / rx_stats_noise_diff;
 351                 stats.noise = stats.ssi - iwl_calc_db_from_ratio(snr);
 352                 stats.signal = iwl_calc_sig_qual(stats.ssi, stats.noise);
 353
 354         /* If noise info not available, calculate signal quality indicator (%)
 355          *   using just the dBm signal level. */
 356         } else {
 357                 stats.noise = priv->last_rx_noise;
 358                 stats.signal = iwl_calc_sig_qual(stats.ssi, 0);
 359         }
 360
 361
 362         IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
 363                         stats.ssi, stats.noise, stats.signal,
 364                         rx_stats_sig_avg, rx_stats_noise_diff);
 365
 366         stats.freq = ieee80211chan2mhz(stats.channel);
 367
 368         /* can be covered by iwl_report_frame() in most cases */
 369 /*      IWL_DEBUG_RX("RX status: 0x%08X\n", rx_end->status); */
 370
 371         header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 372
 373         network_packet = iwl_is_network_packet(priv, header);
 374
 375 #ifdef CONFIG_IWLWIFI_DEBUG
 376         if (iwl_debug_level & IWL_DL_STATS && net_ratelimit())
 377                 IWL_DEBUG_STATS
 378                     ("[%c] %d RSSI: %d Signal: %u, Noise: %u, Rate: %u\n",
 379                      network_packet ? '*' : ' ',
 380                      stats.channel, stats.ssi, stats.ssi,
 381                      stats.ssi, stats.rate);
 382
 383         if (iwl_debug_level & (IWL_DL_RX))
 384                 /* Set "1" to report good data frames in groups of 100 */
 385                 iwl_report_frame(priv, pkt, header, 1);
 386 #endif
 387
 388         if (network_packet) {
 389                 priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
 390                 priv->last_tsf = le64_to_cpu(rx_end->timestamp);
 391                 priv->last_rx_rssi = stats.ssi;
 392                 priv->last_rx_noise = stats.noise;
 393         }
 394
 395         switch (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FTYPE) {
 396         case IEEE80211_FTYPE_MGMT:
 397                 switch (le16_to_cpu(header->frame_control) &
 398                         IEEE80211_FCTL_STYPE) {
 399                 case IEEE80211_STYPE_PROBE_RESP:
 400                 case IEEE80211_STYPE_BEACON:{
 401                                 /* If this is a beacon or probe response for
 402                                  * our network then cache the beacon
 403                                  * timestamp */
 404                                 if ((((priv->iw_mode == IEEE80211_IF_TYPE_STA)
 405                                       && !compare_ether_addr(header->addr2,
 406                                                              priv->bssid)) ||
 407                                      ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
 408                                       && !compare_ether_addr(header->addr3,
 409                                                              priv->bssid)))) {
 410                                         struct ieee80211_mgmt *mgmt =
 411                                             (struct ieee80211_mgmt *)header;
 412                                         __le32 *pos;
 413                                         pos =
 414                                             (__le32 *) & mgmt->u.beacon.
 415                                             timestamp;
 416                                         priv->timestamp0 = le32_to_cpu(pos[0]);
 417                                         priv->timestamp1 = le32_to_cpu(pos[1]);
 418                                         priv->beacon_int = le16_to_cpu(
 419                                             mgmt->u.beacon.beacon_int);
 420                                         if (priv->call_post_assoc_from_beacon &&
 421                                             (priv->iw_mode ==
 422                                                 IEEE80211_IF_TYPE_STA))
 423                                                 queue_work(priv->workqueue,
 424                                                     &priv->post_associate.work);
 425
 426                                         priv->call_post_assoc_from_beacon = 0;
 427                                 }
 428
 429                                 break;
 430                         }
 431
 432                 case IEEE80211_STYPE_ACTION:
 433                         /* TODO: Parse 802.11h frames for CSA... */
 434                         break;
 435
 436                         /*
 437                          * TODO: There is no callback function from upper
 438                          * stack to inform us when associated status. this
 439                          * work around to sniff assoc_resp management frame
 440                          * and finish the association process.
 441                          */
 442                 case IEEE80211_STYPE_ASSOC_RESP:
 443                 case IEEE80211_STYPE_REASSOC_RESP:{
 444                                 struct ieee80211_mgmt *mgnt =
 445                                     (struct ieee80211_mgmt *)header;
 446                                 priv->assoc_id = (~((1 << 15) | (1 << 14)) &
 447                                                   le16_to_cpu(mgnt->u.
 448                                                               assoc_resp.aid));
 449                                 priv->assoc_capability =
 450                                     le16_to_cpu(mgnt->u.assoc_resp.capab_info);
 451                                 if (priv->beacon_int)
 452                                         queue_work(priv->workqueue,
 453                                             &priv->post_associate.work);
 454                                 else
 455                                         priv->call_post_assoc_from_beacon = 1;
 456                                 break;
 457                         }
 458
 459                 case IEEE80211_STYPE_PROBE_REQ:{
 460                                 DECLARE_MAC_BUF(mac1);
 461                                 DECLARE_MAC_BUF(mac2);
 462                                 DECLARE_MAC_BUF(mac3);
 463                                 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
 464                                         IWL_DEBUG_DROP
 465                                             ("Dropping (non network): %s"
 466                                              ", %s, %s\n",
 467                                              print_mac(mac1, header->addr1),
 468                                              print_mac(mac2, header->addr2),
 469                                              print_mac(mac3, header->addr3));
 470                                 return;
 471                         }
 472                 }
 473
 474                 iwl3945_handle_data_packet(priv, 0, rxb, &stats, phy_flags);
 475                 break;
 476
 477         case IEEE80211_FTYPE_CTL:
 478                 break;
 479
 480         case IEEE80211_FTYPE_DATA: {
 481                 DECLARE_MAC_BUF(mac1);
 482                 DECLARE_MAC_BUF(mac2);
 483                 DECLARE_MAC_BUF(mac3);
 484
 485                 if (unlikely(is_duplicate_packet(priv, header)))
 486                         IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
 487                                        print_mac(mac1, header->addr1),
 488                                        print_mac(mac2, header->addr2),
 489                                        print_mac(mac3, header->addr3));
 490                 else
 491                         iwl3945_handle_data_packet(priv, 1, rxb, &stats,
 492                                                    phy_flags);
 493                 break;
 494         }
 495         }
 496 }
 497
 498 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, void *ptr,
 499                                  dma_addr_t addr, u16 len)
 500 {
 501         int count;
 502         u32 pad;
 503         struct iwl_tfd_frame *tfd = (struct iwl_tfd_frame *)ptr;
 504
 505         count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 506         pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags));
 507
 508         if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
 509                 IWL_ERROR("Error can not send more than %d chunks\n",
 510                           NUM_TFD_CHUNKS);
 511                 return -EINVAL;
 512         }
 513
 514         tfd->pa[count].addr = cpu_to_le32(addr);
 515         tfd->pa[count].len = cpu_to_le32(len);
 516
 517         count++;
 518
 519         tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
 520                                          TFD_CTL_PAD_SET(pad));
 521
 522         return 0;
 523 }
 524
 525 /**
 526  * iwl_hw_txq_free_tfd - Free one TFD, those at index [txq->q.last_used]
 527  *
 528  * Does NOT advance any indexes
 529  */
 530 int iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 531 {
 532         struct iwl_tfd_frame *bd_tmp = (struct iwl_tfd_frame *)&txq->bd[0];
 533         struct iwl_tfd_frame *bd = &bd_tmp[txq->q.last_used];
 534         struct pci_dev *dev = priv->pci_dev;
 535         int i;
 536         int counter;
 537
 538         /* classify bd */
 539         if (txq->q.id == IWL_CMD_QUEUE_NUM)
 540                 /* nothing to cleanup after for host commands */
 541                 return 0;
 542
 543         /* sanity check */
 544         counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags));
 545         if (counter > NUM_TFD_CHUNKS) {
 546                 IWL_ERROR("Too many chunks: %i\n", counter);
 547                 /* @todo issue fatal error, it is quite serious situation */
 548                 return 0;
 549         }
 550
 551         /* unmap chunks if any */
 552
 553         for (i = 1; i < counter; i++) {
 554                 pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
 555                                  le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
 556                 if (txq->txb[txq->q.last_used].skb[0]) {
 557                         struct sk_buff *skb = txq->txb[txq->q.last_used].skb[0];
 558                         if (txq->txb[txq->q.last_used].skb[0]) {
 559                                 /* Can be called from interrupt context */
 560                                 dev_kfree_skb_any(skb);
 561                                 txq->txb[txq->q.last_used].skb[0] = NULL;
 562                         }
 563                 }
 564         }
 565         return 0;
 566 }
 567
 568 u8 iwl_hw_find_station(struct iwl_priv *priv, const u8 *addr)
 569 {
 570         int i;
 571         int ret = IWL_INVALID_STATION;
 572         unsigned long flags;
 573         DECLARE_MAC_BUF(mac);
 574
 575         spin_lock_irqsave(&priv->sta_lock, flags);
 576         for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
 577                 if ((priv->stations[i].used) &&
 578                     (!compare_ether_addr
 579                      (priv->stations[i].sta.sta.addr, addr))) {
 580                         ret = i;
 581                         goto out;
 582                 }
 583
 584         IWL_DEBUG_INFO("can not find STA %s (total %d)\n",
 585                        print_mac(mac, addr), priv->num_stations);
 586  out:
 587         spin_unlock_irqrestore(&priv->sta_lock, flags);
 588         return ret;
 589 }
 590
 591 /**
 592  * iwl_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
 593  *
 594 */
 595 void iwl_hw_build_tx_cmd_rate(struct iwl_priv *priv,
 596                               struct iwl_cmd *cmd,
 597                               struct ieee80211_tx_control *ctrl,
 598                               struct ieee80211_hdr *hdr, int sta_id, int tx_id)
 599 {
 600         unsigned long flags;
 601         u16 rate_index = min(ctrl->tx_rate & 0xffff, IWL_RATE_COUNT - 1);
 602         u16 rate_mask;
 603         int rate;
 604         u8 rts_retry_limit;
 605         u8 data_retry_limit;
 606         __le32 tx_flags;
 607         u16 fc = le16_to_cpu(hdr->frame_control);
 608
 609         rate = iwl_rates[rate_index].plcp;
 610         tx_flags = cmd->cmd.tx.tx_flags;
 611
 612         /* We need to figure out how to get the sta->supp_rates while
 613          * in this running context; perhaps encoding into ctrl->tx_rate? */
 614         rate_mask = IWL_RATES_MASK;
 615
 616         spin_lock_irqsave(&priv->sta_lock, flags);
 617
 618         priv->stations[sta_id].current_rate.rate_n_flags = rate;
 619
 620         if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
 621             (sta_id != IWL3945_BROADCAST_ID) &&
 622                 (sta_id != IWL_MULTICAST_ID))
 623                 priv->stations[IWL_STA_ID].current_rate.rate_n_flags = rate;
 624
 625         spin_unlock_irqrestore(&priv->sta_lock, flags);
 626
 627         if (tx_id >= IWL_CMD_QUEUE_NUM)
 628                 rts_retry_limit = 3;
 629         else
 630                 rts_retry_limit = 7;
 631
 632         if (ieee80211_is_probe_response(fc)) {
 633                 data_retry_limit = 3;
 634                 if (data_retry_limit < rts_retry_limit)
 635                         rts_retry_limit = data_retry_limit;
 636         } else
 637                 data_retry_limit = IWL_DEFAULT_TX_RETRY;
 638
 639         if (priv->data_retry_limit != -1)
 640                 data_retry_limit = priv->data_retry_limit;
 641
 642         if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
 643                 switch (fc & IEEE80211_FCTL_STYPE) {
 644                 case IEEE80211_STYPE_AUTH:
 645                 case IEEE80211_STYPE_DEAUTH:
 646                 case IEEE80211_STYPE_ASSOC_REQ:
 647                 case IEEE80211_STYPE_REASSOC_REQ:
 648                         if (tx_flags & TX_CMD_FLG_RTS_MSK) {
 649                                 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
 650                                 tx_flags |= TX_CMD_FLG_CTS_MSK;
 651                         }
 652                         break;
 653                 default:
 654                         break;
 655                 }
 656         }
 657
 658         cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
 659         cmd->cmd.tx.data_retry_limit = data_retry_limit;
 660         cmd->cmd.tx.rate = rate;
 661         cmd->cmd.tx.tx_flags = tx_flags;
 662
 663         /* OFDM */
 664         cmd->cmd.tx.supp_rates[0] = rate_mask & IWL_OFDM_RATES_MASK;
 665
 666         /* CCK */
 667         cmd->cmd.tx.supp_rates[1] = (rate_mask >> 8) & 0xF;
 668
 669         IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
 670                        "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
 671                        cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags),
 672                        cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]);
 673 }
 674
 675 u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id, u16 tx_rate, u8 flags)
 676 {
 677         unsigned long flags_spin;
 678         struct iwl_station_entry *station;
 679
 680         if (sta_id == IWL_INVALID_STATION)
 681                 return IWL_INVALID_STATION;
 682
 683         spin_lock_irqsave(&priv->sta_lock, flags_spin);
 684         station = &priv->stations[sta_id];
 685
 686         station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
 687         station->sta.rate_n_flags = cpu_to_le16(tx_rate);
 688         station->current_rate.rate_n_flags = tx_rate;
 689         station->sta.mode = STA_CONTROL_MODIFY_MSK;
 690
 691         spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
 692
 693         iwl_send_add_station(priv, &station->sta, flags);
 694         IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
 695                         sta_id, tx_rate);
 696         return sta_id;
 697 }
 698
 699 void iwl_hw_card_show_info(struct iwl_priv *priv)
 700 {
 701         IWL_DEBUG_INFO("3945ABG HW Version %u.%u.%u\n",
 702                        ((priv->eeprom.board_revision >> 8) & 0x0F),
 703                        ((priv->eeprom.board_revision >> 8) >> 4),
 704                        (priv->eeprom.board_revision & 0x00FF));
 705
 706         IWL_DEBUG_INFO("3945ABG PBA Number %.*s\n",
 707                        (int)sizeof(priv->eeprom.board_pba_number),
 708                        priv->eeprom.board_pba_number);
 709
 710         IWL_DEBUG_INFO("EEPROM_ANTENNA_SWITCH_TYPE is 0x%02X\n",
 711                        priv->eeprom.antenna_switch_type);
 712 }
 713
 714 static int iwl3945_nic_set_pwr_src(struct iwl_priv *priv, int pwr_max)
 715 {
 716         int rc;
 717         unsigned long flags;
 718
 719         spin_lock_irqsave(&priv->lock, flags);
 720         rc = iwl_grab_restricted_access(priv);
 721         if (rc) {
 722                 spin_unlock_irqrestore(&priv->lock, flags);
 723                 return rc;
 724         }
 725
 726         if (!pwr_max) {
 727                 u32 val;
 728
 729                 rc = pci_read_config_dword(priv->pci_dev,
 730                                 PCI_POWER_SOURCE, &val);
 731                 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
 732                         iwl_set_bits_mask_restricted_reg(priv, APMG_PS_CTRL_REG,
 733                                         APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 734                                         ~APMG_PS_CTRL_MSK_PWR_SRC);
 735                         iwl_release_restricted_access(priv);
 736
 737                         iwl_poll_bit(priv, CSR_GPIO_IN,
 738                                      CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
 739                                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
 740                 } else
 741                         iwl_release_restricted_access(priv);
 742         } else {
 743                 iwl_set_bits_mask_restricted_reg(priv, APMG_PS_CTRL_REG,
 744                                 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 745                                 ~APMG_PS_CTRL_MSK_PWR_SRC);
 746
 747                 iwl_release_restricted_access(priv);
 748                 iwl_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
 749                              CSR_GPIO_IN_BIT_AUX_POWER, 5000);  /* uS */
 750         }
 751         spin_unlock_irqrestore(&priv->lock, flags);
 752
 753         return rc;
 754 }
 755
 756 static int iwl3945_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 757 {
 758         int rc;
 759         unsigned long flags;
 760
 761         spin_lock_irqsave(&priv->lock, flags);
 762         rc = iwl_grab_restricted_access(priv);
 763         if (rc) {
 764                 spin_unlock_irqrestore(&priv->lock, flags);
 765                 return rc;
 766         }
 767
 768         iwl_write_restricted(priv, FH_RCSR_RBD_BASE(0), rxq->dma_addr);
 769         iwl_write_restricted(priv, FH_RCSR_RPTR_ADDR(0),
 770                              priv->hw_setting.shared_phys +
 771                              offsetof(struct iwl_shared, rx_read_ptr[0]));
 772         iwl_write_restricted(priv, FH_RCSR_WPTR(0), 0);
 773         iwl_write_restricted(priv, FH_RCSR_CONFIG(0),
 774                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
 775                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
 776                 ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
 777                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
 778                 (RX_QUEUE_SIZE_LOG << ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
 779                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
 780                 (1 << ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
 781                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
 782
 783         /* fake read to flush all prev I/O */
 784         iwl_read_restricted(priv, FH_RSSR_CTRL);
 785
 786         iwl_release_restricted_access(priv);
 787         spin_unlock_irqrestore(&priv->lock, flags);
 788
 789         return 0;
 790 }
 791
 792 static int iwl3945_tx_reset(struct iwl_priv *priv)
 793 {
 794         int rc;
 795         unsigned long flags;
 796
 797         spin_lock_irqsave(&priv->lock, flags);
 798         rc = iwl_grab_restricted_access(priv);
 799         if (rc) {
 800                 spin_unlock_irqrestore(&priv->lock, flags);
 801                 return rc;
 802         }
 803
 804         /* bypass mode */
 805         iwl_write_restricted_reg(priv, SCD_MODE_REG, 0x2);
 806
 807         /* RA 0 is active */
 808         iwl_write_restricted_reg(priv, SCD_ARASTAT_REG, 0x01);
 809
 810         /* all 6 fifo are active */
 811         iwl_write_restricted_reg(priv, SCD_TXFACT_REG, 0x3f);
 812
 813         iwl_write_restricted_reg(priv, SCD_SBYP_MODE_1_REG, 0x010000);
 814         iwl_write_restricted_reg(priv, SCD_SBYP_MODE_2_REG, 0x030002);
 815         iwl_write_restricted_reg(priv, SCD_TXF4MF_REG, 0x000004);
 816         iwl_write_restricted_reg(priv, SCD_TXF5MF_REG, 0x000005);
 817
 818         iwl_write_restricted(priv, FH_TSSR_CBB_BASE,
 819                              priv->hw_setting.shared_phys);
 820
 821         iwl_write_restricted(priv, FH_TSSR_MSG_CONFIG,
 822                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
 823                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
 824                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
 825                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
 826                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
 827                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
 828                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
 829
 830         iwl_release_restricted_access(priv);
 831         spin_unlock_irqrestore(&priv->lock, flags);
 832
 833         return 0;
 834 }
 835
 836 /**
 837  * iwl3945_txq_ctx_reset - Reset TX queue context
 838  *
 839  * Destroys all DMA structures and initialize them again
 840  */
 841 static int iwl3945_txq_ctx_reset(struct iwl_priv *priv)
 842 {
 843         int rc;
 844         int txq_id, slots_num;
 845
 846         iwl_hw_txq_ctx_free(priv);
 847
 848         /* Tx CMD queue */
 849         rc = iwl3945_tx_reset(priv);
 850         if (rc)
 851                 goto error;
 852
 853         /* Tx queue(s) */
 854         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
 855                 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
 856                                 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
 857                 rc = iwl_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
 858                                 txq_id);
 859                 if (rc) {
 860                         IWL_ERROR("Tx %d queue init failed\n", txq_id);
 861                         goto error;
 862                 }
 863         }
 864
 865         return rc;
 866
 867  error:
 868         iwl_hw_txq_ctx_free(priv);
 869         return rc;
 870 }
 871
 872 int iwl_hw_nic_init(struct iwl_priv *priv)
 873 {
 874         u8 rev_id;
 875         int rc;
 876         unsigned long flags;
 877         struct iwl_rx_queue *rxq = &priv->rxq;
 878
 879         iwl_power_init_handle(priv);
 880
 881         spin_lock_irqsave(&priv->lock, flags);
 882         iwl_set_bit(priv, CSR_ANA_PLL_CFG, (1 << 24));
 883         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 884                     CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
 885
 886         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 887         rc = iwl_poll_bit(priv, CSR_GP_CNTRL,
 888                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 889                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 890         if (rc < 0) {
 891                 spin_unlock_irqrestore(&priv->lock, flags);
 892                 IWL_DEBUG_INFO("Failed to init the card\n");
 893                 return rc;
 894         }
 895
 896         rc = iwl_grab_restricted_access(priv);
 897         if (rc) {
 898                 spin_unlock_irqrestore(&priv->lock, flags);
 899                 return rc;
 900         }
 901         iwl_write_restricted_reg(priv, APMG_CLK_EN_REG,
 902                                  APMG_CLK_VAL_DMA_CLK_RQT |
 903                                  APMG_CLK_VAL_BSM_CLK_RQT);
 904         udelay(20);
 905         iwl_set_bits_restricted_reg(priv, APMG_PCIDEV_STT_REG,
 906                                     APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 907         iwl_release_restricted_access(priv);
 908         spin_unlock_irqrestore(&priv->lock, flags);
 909
 910         /* Determine HW type */
 911         rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
 912         if (rc)
 913                 return rc;
 914         IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
 915
 916         iwl3945_nic_set_pwr_src(priv, 1);
 917         spin_lock_irqsave(&priv->lock, flags);
 918
 919         if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
 920                 IWL_DEBUG_INFO("RTP type \n");
 921         else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
 922                 IWL_DEBUG_INFO("ALM-MB type\n");
 923                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 924                             CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MB);
 925         } else {
 926                 IWL_DEBUG_INFO("ALM-MM type\n");
 927                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 928                             CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MM);
 929         }
 930
 931         spin_unlock_irqrestore(&priv->lock, flags);
 932
 933         /* Initialize the EEPROM */
 934         rc = iwl_eeprom_init(priv);
 935         if (rc)
 936                 return rc;
 937
 938         spin_lock_irqsave(&priv->lock, flags);
 939         if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) {
 940                 IWL_DEBUG_INFO("SKU OP mode is mrc\n");
 941                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 942                             CSR_HW_IF_CONFIG_REG_BIT_SKU_MRC);
 943         } else
 944                 IWL_DEBUG_INFO("SKU OP mode is basic\n");
 945
 946         if ((priv->eeprom.board_revision & 0xF0) == 0xD0) {
 947                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
 948                                priv->eeprom.board_revision);
 949                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 950                             CSR_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
 951         } else {
 952                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
 953                                priv->eeprom.board_revision);
 954                 iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
 955                               CSR_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
 956         }
 957
 958         if (priv->eeprom.almgor_m_version <= 1) {
 959                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 960                             CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
 961                 IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
 962                                priv->eeprom.almgor_m_version);
 963         } else {
 964                 IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
 965                                priv->eeprom.almgor_m_version);
 966                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 967                             CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
 968         }
 969         spin_unlock_irqrestore(&priv->lock, flags);
 970
 971         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
 972                 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
 973
 974         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
 975                 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
 976
 977         /* Allocate the RX queue, or reset if it is already allocated */
 978         if (!rxq->bd) {
 979                 rc = iwl_rx_queue_alloc(priv);
 980                 if (rc) {
 981                         IWL_ERROR("Unable to initialize Rx queue\n");
 982                         return -ENOMEM;
 983                 }
 984         } else
 985                 iwl_rx_queue_reset(priv, rxq);
 986
 987         iwl_rx_replenish(priv);
 988
 989         iwl3945_rx_init(priv, rxq);
 990
 991         spin_lock_irqsave(&priv->lock, flags);
 992
 993         /* Look at using this instead:
 994         rxq->need_update = 1;
 995         iwl_rx_queue_update_write_ptr(priv, rxq);
 996         */
 997
 998         rc = iwl_grab_restricted_access(priv);
 999         if (rc) {
1000                 spin_unlock_irqrestore(&priv->lock, flags);
1001                 return rc;
1002         }
1003         iwl_write_restricted(priv, FH_RCSR_WPTR(0), rxq->write & ~7);
1004         iwl_release_restricted_access(priv);
1005
1006         spin_unlock_irqrestore(&priv->lock, flags);
1007
1008         rc = iwl3945_txq_ctx_reset(priv);
1009         if (rc)
1010                 return rc;
1011
1012         set_bit(STATUS_INIT, &priv->status);
1013
1014         return 0;
1015 }
1016
1017 /**
1018  * iwl_hw_txq_ctx_free - Free TXQ Context
1019  *
1020  * Destroy all TX DMA queues and structures
1021  */
1022 void iwl_hw_txq_ctx_free(struct iwl_priv *priv)
1023 {
1024         int txq_id;
1025
1026         /* Tx queues */
1027         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
1028                 iwl_tx_queue_free(priv, &priv->txq[txq_id]);
1029 }
1030
1031 void iwl_hw_txq_ctx_stop(struct iwl_priv *priv)
1032 {
1033         int queue;
1034         unsigned long flags;
1035
1036         spin_lock_irqsave(&priv->lock, flags);
1037         if (iwl_grab_restricted_access(priv)) {
1038                 spin_unlock_irqrestore(&priv->lock, flags);
1039                 iwl_hw_txq_ctx_free(priv);
1040                 return;
1041         }
1042
1043         /* stop SCD */
1044         iwl_write_restricted_reg(priv, SCD_MODE_REG, 0);
1045
1046         /* reset TFD queues */
1047         for (queue = TFD_QUEUE_MIN; queue < TFD_QUEUE_MAX; queue++) {
1048                 iwl_write_restricted(priv, FH_TCSR_CONFIG(queue), 0x0);
1049                 iwl_poll_restricted_bit(priv, FH_TSSR_TX_STATUS,
1050                                 ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(queue),
1051                                 1000);
1052         }
1053
1054         iwl_release_restricted_access(priv);
1055         spin_unlock_irqrestore(&priv->lock, flags);
1056
1057         iwl_hw_txq_ctx_free(priv);
1058 }
1059
1060 int iwl_hw_nic_stop_master(struct iwl_priv *priv)
1061 {
1062         int rc = 0;
1063         u32 reg_val;
1064         unsigned long flags;
1065
1066         spin_lock_irqsave(&priv->lock, flags);
1067
1068         /* set stop master bit */
1069         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1070
1071         reg_val = iwl_read32(priv, CSR_GP_CNTRL);
1072
1073         if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
1074             (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
1075                 IWL_DEBUG_INFO("Card in power save, master is already "
1076                                "stopped\n");
1077         else {
1078                 rc = iwl_poll_bit(priv, CSR_RESET,
1079                                   CSR_RESET_REG_FLAG_MASTER_DISABLED,
1080                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1081                 if (rc < 0) {
1082                         spin_unlock_irqrestore(&priv->lock, flags);
1083                         return rc;
1084                 }
1085         }
1086
1087         spin_unlock_irqrestore(&priv->lock, flags);
1088         IWL_DEBUG_INFO("stop master\n");
1089
1090         return rc;
1091 }
1092
1093 int iwl_hw_nic_reset(struct iwl_priv *priv)
1094 {
1095         int rc;
1096         unsigned long flags;
1097
1098         iwl_hw_nic_stop_master(priv);
1099
1100         spin_lock_irqsave(&priv->lock, flags);
1101
1102         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1103
1104         rc = iwl_poll_bit(priv, CSR_GP_CNTRL,
1105                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1106                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1107
1108         rc = iwl_grab_restricted_access(priv);
1109         if (!rc) {
1110                 iwl_write_restricted_reg(priv, APMG_CLK_CTRL_REG,
1111                                          APMG_CLK_VAL_BSM_CLK_RQT);
1112
1113                 udelay(10);
1114
1115                 iwl_set_bit(priv, CSR_GP_CNTRL,
1116                             CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1117
1118                 iwl_write_restricted_reg(priv, APMG_RTC_INT_MSK_REG, 0x0);
1119                 iwl_write_restricted_reg(priv, APMG_RTC_INT_STT_REG,
1120                                         0xFFFFFFFF);
1121
1122                 /* enable DMA */
1123                 iwl_write_restricted_reg(priv, APMG_CLK_EN_REG,
1124                                          APMG_CLK_VAL_DMA_CLK_RQT |
1125                                          APMG_CLK_VAL_BSM_CLK_RQT);
1126                 udelay(10);
1127
1128                 iwl_set_bits_restricted_reg(priv, APMG_PS_CTRL_REG,
1129                                 APMG_PS_CTRL_VAL_RESET_REQ);
1130                 udelay(5);
1131                 iwl_clear_bits_restricted_reg(priv, APMG_PS_CTRL_REG,
1132                                 APMG_PS_CTRL_VAL_RESET_REQ);
1133                 iwl_release_restricted_access(priv);
1134         }
1135
1136         /* Clear the 'host command active' bit... */
1137         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1138
1139         wake_up_interruptible(&priv->wait_command_queue);
1140         spin_unlock_irqrestore(&priv->lock, flags);
1141
1142         return rc;
1143 }
1144
1145 /**
1146  * iwl_hw_reg_adjust_power_by_temp - return index delta into power gain settings table
1147  */
1148 static int iwl_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1149 {
1150         return (new_reading - old_reading) * (-11) / 100;
1151 }
1152
1153 /**
1154  * iwl_hw_reg_temp_out_of_range - Keep temperature in sane range
1155  */
1156 static inline int iwl_hw_reg_temp_out_of_range(int temperature)
1157 {
1158         return (((temperature < -260) || (temperature > 25)) ? 1 : 0);
1159 }
1160
1161 int iwl_hw_get_temperature(struct iwl_priv *priv)
1162 {
1163         return iwl_read32(priv, CSR_UCODE_DRV_GP2);
1164 }
1165
1166 /**
1167  * iwl_hw_reg_txpower_get_temperature - get current temperature by reading from NIC
1168  */
1169 static int iwl_hw_reg_txpower_get_temperature(struct iwl_priv *priv)
1170 {
1171         int temperature;
1172
1173         temperature = iwl_hw_get_temperature(priv);
1174
1175         /* driver's okay range is -260 to +25.
1176          *   human readable okay range is 0 to +285 */
1177         IWL_DEBUG_INFO("Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1178
1179         /* handle insane temp reading */
1180         if (iwl_hw_reg_temp_out_of_range(temperature)) {
1181                 IWL_ERROR("Error bad temperature value  %d\n", temperature);
1182
1183                 /* if really really hot(?),
1184                  *   substitute the 3rd band/group's temp measured at factory */
1185                 if (priv->last_temperature > 100)
1186                         temperature = priv->eeprom.groups[2].temperature;
1187                 else /* else use most recent "sane" value from driver */
1188                         temperature = priv->last_temperature;
1189         }
1190
1191         return temperature;     /* raw, not "human readable" */
1192 }
1193
1194 /* Adjust Txpower only if temperature variance is greater than threshold.
1195  *
1196  * Both are lower than older versions' 9 degrees */
1197 #define IWL_TEMPERATURE_LIMIT_TIMER   6
1198
1199 /**
1200  * is_temp_calib_needed - determines if new calibration is needed
1201  *
1202  * records new temperature in tx_mgr->temperature.
1203  * replaces tx_mgr->last_temperature *only* if calib needed
1204  *    (assumes caller will actually do the calibration!). */
1205 static int is_temp_calib_needed(struct iwl_priv *priv)
1206 {
1207         int temp_diff;
1208
1209         priv->temperature = iwl_hw_reg_txpower_get_temperature(priv);
1210         temp_diff = priv->temperature - priv->last_temperature;
1211
1212         /* get absolute value */
1213         if (temp_diff < 0) {
1214                 IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff);
1215                 temp_diff = -temp_diff;
1216         } else if (temp_diff == 0)
1217                 IWL_DEBUG_POWER("Same temp,\n");
1218         else
1219                 IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff);
1220
1221         /* if we don't need calibration, *don't* update last_temperature */
1222         if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1223                 IWL_DEBUG_POWER("Timed thermal calib not needed\n");
1224                 return 0;
1225         }
1226
1227         IWL_DEBUG_POWER("Timed thermal calib needed\n");
1228
1229         /* assume that caller will actually do calib ...
1230          *   update the "last temperature" value */
1231         priv->last_temperature = priv->temperature;
1232         return 1;
1233 }
1234
1235 #define IWL_MAX_GAIN_ENTRIES 78
1236 #define IWL_CCK_FROM_OFDM_POWER_DIFF  -5
1237 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1238
1239 /* radio and DSP power table, each step is 1/2 dB.
1240  * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1241 static struct iwl_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1242         {
1243          {251, 127},            /* 2.4 GHz, highest power */
1244          {251, 127},
1245          {251, 127},
1246          {251, 127},
1247          {251, 125},
1248          {251, 110},
1249          {251, 105},
1250          {251, 98},
1251          {187, 125},
1252          {187, 115},
1253          {187, 108},
1254          {187, 99},
1255          {243, 119},
1256          {243, 111},
1257          {243, 105},
1258          {243, 97},
1259          {243, 92},
1260          {211, 106},
1261          {211, 100},
1262          {179, 120},
1263          {179, 113},
1264          {179, 107},
1265          {147, 125},
1266          {147, 119},
1267          {147, 112},
1268          {147, 106},
1269          {147, 101},
1270          {147, 97},
1271          {147, 91},
1272          {115, 107},
1273          {235, 121},
1274          {235, 115},
1275          {235, 109},
1276          {203, 127},
1277          {203, 121},
1278          {203, 115},
1279          {203, 108},
1280          {203, 102},
1281          {203, 96},
1282          {203, 92},
1283          {171, 110},
1284          {171, 104},
1285          {171, 98},
1286          {139, 116},
1287          {227, 125},
1288          {227, 119},
1289          {227, 113},
1290          {227, 107},
1291          {227, 101},
1292          {227, 96},
1293          {195, 113},
1294          {195, 106},
1295          {195, 102},
1296          {195, 95},
1297          {163, 113},
1298          {163, 106},
1299          {163, 102},
1300          {163, 95},
1301          {131, 113},
1302          {131, 106},
1303          {131, 102},
1304          {131, 95},
1305          {99, 113},
1306          {99, 106},
1307          {99, 102},
1308          {99, 95},
1309          {67, 113},
1310          {67, 106},
1311          {67, 102},
1312          {67, 95},
1313          {35, 113},
1314          {35, 106},
1315          {35, 102},
1316          {35, 95},
1317          {3, 113},
1318          {3, 106},
1319          {3, 102},
1320          {3, 95} },             /* 2.4 GHz, lowest power */
1321         {
1322          {251, 127},            /* 5.x GHz, highest power */
1323          {251, 120},
1324          {251, 114},
1325          {219, 119},
1326          {219, 101},
1327          {187, 113},
1328          {187, 102},
1329          {155, 114},
1330          {155, 103},
1331          {123, 117},
1332          {123, 107},
1333          {123, 99},
1334          {123, 92},
1335          {91, 108},
1336          {59, 125},
1337          {59, 118},
1338          {59, 109},
1339          {59, 102},
1340          {59, 96},
1341          {59, 90},
1342          {27, 104},
1343          {27, 98},
1344          {27, 92},
1345          {115, 118},
1346          {115, 111},
1347          {115, 104},
1348          {83, 126},
1349          {83, 121},
1350          {83, 113},
1351          {83, 105},
1352          {83, 99},
1353          {51, 118},
1354          {51, 111},
1355          {51, 104},
1356          {51, 98},
1357          {19, 116},
1358          {19, 109},
1359          {19, 102},
1360          {19, 98},
1361          {19, 93},
1362          {171, 113},
1363          {171, 107},
1364          {171, 99},
1365          {139, 120},
1366          {139, 113},
1367          {139, 107},
1368          {139, 99},
1369          {107, 120},
1370          {107, 113},
1371          {107, 107},
1372          {107, 99},
1373          {75, 120},
1374          {75, 113},
1375          {75, 107},
1376          {75, 99},
1377          {43, 120},
1378          {43, 113},
1379          {43, 107},
1380          {43, 99},
1381          {11, 120},
1382          {11, 113},
1383          {11, 107},
1384          {11, 99},
1385          {131, 107},
1386          {131, 99},
1387          {99, 120},
1388          {99, 113},
1389          {99, 107},
1390          {99, 99},
1391          {67, 120},
1392          {67, 113},
1393          {67, 107},
1394          {67, 99},
1395          {35, 120},
1396          {35, 113},
1397          {35, 107},
1398          {35, 99},
1399          {3, 120} }             /* 5.x GHz, lowest power */
1400 };
1401
1402 static inline u8 iwl_hw_reg_fix_power_index(int index)
1403 {
1404         if (index < 0)
1405                 return 0;
1406         if (index >= IWL_MAX_GAIN_ENTRIES)
1407                 return IWL_MAX_GAIN_ENTRIES - 1;
1408         return (u8) index;
1409 }
1410
1411 /* Kick off thermal recalibration check every 60 seconds */
1412 #define REG_RECALIB_PERIOD (60)
1413
1414 /**
1415  * iwl_hw_reg_set_scan_power - Set Tx power for scan probe requests
1416  *
1417  * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1418  * or 6 Mbit (OFDM) rates.
1419  */
1420 static void iwl_hw_reg_set_scan_power(struct iwl_priv *priv, u32 scan_tbl_index,
1421                                s32 rate_index, const s8 *clip_pwrs,
1422                                struct iwl_channel_info *ch_info,
1423                                int band_index)
1424 {
1425         struct iwl_scan_power_info *scan_power_info;
1426         s8 power;
1427         u8 power_index;
1428
1429         scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1430
1431         /* use this channel group's 6Mbit clipping/saturation pwr,
1432          *   but cap at regulatory scan power restriction (set during init
1433          *   based on eeprom channel data) for this channel.  */
1434         power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX]);
1435
1436         /* further limit to user's max power preference.
1437          * FIXME:  Other spectrum management power limitations do not
1438          *   seem to apply?? */
1439         power = min(power, priv->user_txpower_limit);
1440         scan_power_info->requested_power = power;
1441
1442         /* find difference between new scan *power* and current "normal"
1443          *   Tx *power* for 6Mb.  Use this difference (x2) to adjust the
1444          *   current "normal" temperature-compensated Tx power *index* for
1445          *   this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1446          *   *index*. */
1447         power_index = ch_info->power_info[rate_index].power_table_index
1448             - (power - ch_info->power_info
1449                [IWL_RATE_6M_INDEX].requested_power) * 2;
1450
1451         /* store reference index that we use when adjusting *all* scan
1452          *   powers.  So we can accommodate user (all channel) or spectrum
1453          *   management (single channel) power changes "between" temperature
1454          *   feedback compensation procedures.
1455          * don't force fit this reference index into gain table; it may be a
1456          *   negative number.  This will help avoid errors when we're at
1457          *   the lower bounds (highest gains, for warmest temperatures)
1458          *   of the table. */
1459
1460         /* don't exceed table bounds for "real" setting */
1461         power_index = iwl_hw_reg_fix_power_index(power_index);
1462
1463         scan_power_info->power_table_index = power_index;
1464         scan_power_info->tpc.tx_gain =
1465             power_gain_table[band_index][power_index].tx_gain;
1466         scan_power_info->tpc.dsp_atten =
1467             power_gain_table[band_index][power_index].dsp_atten;
1468 }
1469
1470 /**
1471  * iwl_hw_reg_send_txpower - fill in Tx Power command with gain settings
1472  *
1473  * Configures power settings for all rates for the current channel,
1474  * using values from channel info struct, and send to NIC
1475  */
1476 int iwl_hw_reg_send_txpower(struct iwl_priv *priv)
1477 {
1478         int rate_idx;
1479         const struct iwl_channel_info *ch_info = NULL;
1480         struct iwl_txpowertable_cmd txpower = {
1481                 .channel = priv->active_rxon.channel,
1482         };
1483
1484         txpower.band = (priv->phymode == MODE_IEEE80211A) ? 0 : 1;
1485         ch_info = iwl_get_channel_info(priv,
1486                                        priv->phymode,
1487                                        le16_to_cpu(priv->active_rxon.channel));
1488         if (!ch_info) {
1489                 IWL_ERROR
1490                     ("Failed to get channel info for channel %d [%d]\n",
1491                      le16_to_cpu(priv->active_rxon.channel), priv->phymode);
1492                 return -EINVAL;
1493         }
1494
1495         if (!is_channel_valid(ch_info)) {
1496                 IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
1497                                 "non-Tx channel.\n");
1498                 return 0;
1499         }
1500
1501         /* fill cmd with power settings for all rates for current channel */
1502         for (rate_idx = 0; rate_idx < IWL_RATE_COUNT; rate_idx++) {
1503                 txpower.power[rate_idx].tpc = ch_info->power_info[rate_idx].tpc;
1504                 txpower.power[rate_idx].rate = iwl_rates[rate_idx].plcp;
1505
1506                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1507                                 le16_to_cpu(txpower.channel),
1508                                 txpower.band,
1509                                 txpower.power[rate_idx].tpc.tx_gain,
1510                                 txpower.power[rate_idx].tpc.dsp_atten,
1511                                 txpower.power[rate_idx].rate);
1512         }
1513
1514         return iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1515                                 sizeof(struct iwl_txpowertable_cmd), &txpower);
1516
1517 }
1518
1519 /**
1520  * iwl_hw_reg_set_new_power - Configures power tables at new levels
1521  * @ch_info: Channel to update.  Uses power_info.requested_power.
1522  *
1523  * Replace requested_power and base_power_index ch_info fields for
1524  * one channel.
1525  *
1526  * Called if user or spectrum management changes power preferences.
1527  * Takes into account h/w and modulation limitations (clip power).
1528  *
1529  * This does *not* send anything to NIC, just sets up ch_info for one channel.
1530  *
1531  * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1532  *       properly fill out the scan powers, and actual h/w gain settings,
1533  *       and send changes to NIC
1534  */
1535 static int iwl_hw_reg_set_new_power(struct iwl_priv *priv,
1536                              struct iwl_channel_info *ch_info)
1537 {
1538         struct iwl_channel_power_info *power_info;
1539         int power_changed = 0;
1540         int i;
1541         const s8 *clip_pwrs;
1542         int power;
1543
1544         /* Get this chnlgrp's rate-to-max/clip-powers table */
1545         clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1546
1547         /* Get this channel's rate-to-current-power settings table */
1548         power_info = ch_info->power_info;
1549
1550         /* update OFDM Txpower settings */
1551         for (i = IWL_FIRST_OFDM_RATE; i <= IWL_LAST_OFDM_RATE;
1552              i++, ++power_info) {
1553                 int delta_idx;
1554
1555                 /* limit new power to be no more than h/w capability */
1556                 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1557                 if (power == power_info->requested_power)
1558                         continue;
1559
1560                 /* find difference between old and new requested powers,
1561                  *    update base (non-temp-compensated) power index */
1562                 delta_idx = (power - power_info->requested_power) * 2;
1563                 power_info->base_power_index -= delta_idx;
1564
1565                 /* save new requested power value */
1566                 power_info->requested_power = power;
1567
1568                 power_changed = 1;
1569         }
1570
1571         /* update CCK Txpower settings, based on OFDM 12M setting ...
1572          *    ... all CCK power settings for a given channel are the *same*. */
1573         if (power_changed) {
1574                 power =
1575                     ch_info->power_info[IWL_RATE_12M_INDEX].
1576                     requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1577
1578                 /* do all CCK rates' iwl_channel_power_info structures */
1579                 for (i = IWL_FIRST_CCK_RATE; i <= IWL_LAST_CCK_RATE; i++) {
1580                         power_info->requested_power = power;
1581                         power_info->base_power_index =
1582                             ch_info->power_info[IWL_RATE_12M_INDEX].
1583                             base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1584                         ++power_info;
1585                 }
1586         }
1587
1588         return 0;
1589 }
1590
1591 /**
1592  * iwl_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1593  *
1594  * NOTE: Returned power limit may be less (but not more) than requested,
1595  *       based strictly on regulatory (eeprom and spectrum mgt) limitations
1596  *       (no consideration for h/w clipping limitations).
1597  */
1598 static int iwl_hw_reg_get_ch_txpower_limit(struct iwl_channel_info *ch_info)
1599 {
1600         s8 max_power;
1601
1602 #if 0
1603         /* if we're using TGd limits, use lower of TGd or EEPROM */
1604         if (ch_info->tgd_data.max_power != 0)
1605                 max_power = min(ch_info->tgd_data.max_power,
1606                                 ch_info->eeprom.max_power_avg);
1607
1608         /* else just use EEPROM limits */
1609         else
1610 #endif
1611                 max_power = ch_info->eeprom.max_power_avg;
1612
1613         return min(max_power, ch_info->max_power_avg);
1614 }
1615
1616 /**
1617  * iwl_hw_reg_comp_txpower_temp - Compensate for temperature
1618  *
1619  * Compensate txpower settings of *all* channels for temperature.
1620  * This only accounts for the difference between current temperature
1621  *   and the factory calibration temperatures, and bases the new settings
1622  *   on the channel's base_power_index.
1623  *
1624  * If RxOn is "associated", this sends the new Txpower to NIC!
1625  */
1626 static int iwl_hw_reg_comp_txpower_temp(struct iwl_priv *priv)
1627 {
1628         struct iwl_channel_info *ch_info = NULL;
1629         int delta_index;
1630         const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1631         u8 a_band;
1632         u8 rate_index;
1633         u8 scan_tbl_index;
1634         u8 i;
1635         int ref_temp;
1636         int temperature = priv->temperature;
1637
1638         /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1639         for (i = 0; i < priv->channel_count; i++) {
1640                 ch_info = &priv->channel_info[i];
1641                 a_band = is_channel_a_band(ch_info);
1642
1643                 /* Get this chnlgrp's factory calibration temperature */
1644                 ref_temp = (s16)priv->eeprom.groups[ch_info->group_index].
1645                     temperature;
1646
1647                 /* get power index adjustment based on curr and factory
1648                  * temps */
1649                 delta_index = iwl_hw_reg_adjust_power_by_temp(temperature,
1650                                                               ref_temp);
1651
1652                 /* set tx power value for all rates, OFDM and CCK */
1653                 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
1654                      rate_index++) {
1655                         int power_idx =
1656                             ch_info->power_info[rate_index].base_power_index;
1657
1658                         /* temperature compensate */
1659                         power_idx += delta_index;
1660
1661                         /* stay within table range */
1662                         power_idx = iwl_hw_reg_fix_power_index(power_idx);
1663                         ch_info->power_info[rate_index].
1664                             power_table_index = (u8) power_idx;
1665                         ch_info->power_info[rate_index].tpc =
1666                             power_gain_table[a_band][power_idx];
1667                 }
1668
1669                 /* Get this chnlgrp's rate-to-max/clip-powers table */
1670                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1671
1672                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1673                 for (scan_tbl_index = 0;
1674                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
1675                         s32 actual_index = (scan_tbl_index == 0) ?
1676                             IWL_RATE_1M_INDEX : IWL_RATE_6M_INDEX;
1677                         iwl_hw_reg_set_scan_power(priv, scan_tbl_index,
1678                                            actual_index, clip_pwrs,
1679                                            ch_info, a_band);
1680                 }
1681         }
1682
1683         /* send Txpower command for current channel to ucode */
1684         return iwl_hw_reg_send_txpower(priv);
1685 }
1686
1687 int iwl_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
1688 {
1689         struct iwl_channel_info *ch_info;
1690         s8 max_power;
1691         u8 a_band;
1692         u8 i;
1693
1694         if (priv->user_txpower_limit == power) {
1695                 IWL_DEBUG_POWER("Requested Tx power same as current "
1696                                 "limit: %ddBm.\n", power);
1697                 return 0;
1698         }
1699
1700         IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power);
1701         priv->user_txpower_limit = power;
1702
1703         /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1704
1705         for (i = 0; i < priv->channel_count; i++) {
1706                 ch_info = &priv->channel_info[i];
1707                 a_band = is_channel_a_band(ch_info);
1708
1709                 /* find minimum power of all user and regulatory constraints
1710                  *    (does not consider h/w clipping limitations) */
1711                 max_power = iwl_hw_reg_get_ch_txpower_limit(ch_info);
1712                 max_power = min(power, max_power);
1713                 if (max_power != ch_info->curr_txpow) {
1714                         ch_info->curr_txpow = max_power;
1715
1716                         /* this considers the h/w clipping limitations */
1717                         iwl_hw_reg_set_new_power(priv, ch_info);
1718                 }
1719         }
1720
1721         /* update txpower settings for all channels,
1722          *   send to NIC if associated. */
1723         is_temp_calib_needed(priv);
1724         iwl_hw_reg_comp_txpower_temp(priv);
1725
1726         return 0;
1727 }
1728
1729 /* will add 3945 channel switch cmd handling later */
1730 int iwl_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1731 {
1732         return 0;
1733 }
1734
1735 /**
1736  * iwl3945_reg_txpower_periodic -  called when time to check our temperature.
1737  *
1738  * -- reset periodic timer
1739  * -- see if temp has changed enough to warrant re-calibration ... if so:
1740  *     -- correct coeffs for temp (can reset temp timer)
1741  *     -- save this temp as "last",
1742  *     -- send new set of gain settings to NIC
1743  * NOTE:  This should continue working, even when we're not associated,
1744  *   so we can keep our internal table of scan powers current. */
1745 void iwl3945_reg_txpower_periodic(struct iwl_priv *priv)
1746 {
1747         /* This will kick in the "brute force"
1748          * iwl_hw_reg_comp_txpower_temp() below */
1749         if (!is_temp_calib_needed(priv))
1750                 goto reschedule;
1751
1752         /* Set up a new set of temp-adjusted TxPowers, send to NIC.
1753          * This is based *only* on current temperature,
1754          * ignoring any previous power measurements */
1755         iwl_hw_reg_comp_txpower_temp(priv);
1756
1757  reschedule:
1758         queue_delayed_work(priv->workqueue,
1759                            &priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
1760 }
1761
1762 void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
1763 {
1764         struct iwl_priv *priv = container_of(work, struct iwl_priv,
1765                                              thermal_periodic.work);
1766
1767         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1768                 return;
1769
1770         mutex_lock(&priv->mutex);
1771         iwl3945_reg_txpower_periodic(priv);
1772         mutex_unlock(&priv->mutex);
1773 }
1774
1775 /**
1776  * iwl_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
1777  *                                 for the channel.
1778  *
1779  * This function is used when initializing channel-info structs.
1780  *
1781  * NOTE: These channel groups do *NOT* match the bands above!
1782  *       These channel groups are based on factory-tested channels;
1783  *       on A-band, EEPROM's "group frequency" entries represent the top
1784  *       channel in each group 1-4.  Group 5 All B/G channels are in group 0.
1785  */
1786 static u16 iwl_hw_reg_get_ch_grp_index(struct iwl_priv *priv,
1787                                        const struct iwl_channel_info *ch_info)
1788 {
1789         struct iwl_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0];
1790         u8 group;
1791         u16 group_index = 0;    /* based on factory calib frequencies */
1792         u8 grp_channel;
1793
1794         /* Find the group index for the channel ... don't use index 1(?) */
1795         if (is_channel_a_band(ch_info)) {
1796                 for (group = 1; group < 5; group++) {
1797                         grp_channel = ch_grp[group].group_channel;
1798                         if (ch_info->channel <= grp_channel) {
1799                                 group_index = group;
1800                                 break;
1801                         }
1802                 }
1803                 /* group 4 has a few channels *above* its factory cal freq */
1804                 if (group == 5)
1805                         group_index = 4;
1806         } else
1807                 group_index = 0;        /* 2.4 GHz, group 0 */
1808
1809         IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
1810                         group_index);
1811         return group_index;
1812 }
1813
1814 /**
1815  * iwl_hw_reg_get_matched_power_index - Interpolate to get nominal index
1816  *
1817  * Interpolate to get nominal (i.e. at factory calibration temperature) index
1818  *   into radio/DSP gain settings table for requested power.
1819  */
1820 static int iwl_hw_reg_get_matched_power_index(struct iwl_priv *priv,
1821                                        s8 requested_power,
1822                                        s32 setting_index, s32 *new_index)
1823 {
1824         const struct iwl_eeprom_txpower_group *chnl_grp = NULL;
1825         s32 index0, index1;
1826         s32 power = 2 * requested_power;
1827         s32 i;
1828         const struct iwl_eeprom_txpower_sample *samples;
1829         s32 gains0, gains1;
1830         s32 res;
1831         s32 denominator;
1832
1833         chnl_grp = &priv->eeprom.groups[setting_index];
1834         samples = chnl_grp->samples;
1835         for (i = 0; i < 5; i++) {
1836                 if (power == samples[i].power) {
1837                         *new_index = samples[i].gain_index;
1838                         return 0;
1839                 }
1840         }
1841
1842         if (power > samples[1].power) {
1843                 index0 = 0;
1844                 index1 = 1;
1845         } else if (power > samples[2].power) {
1846                 index0 = 1;
1847                 index1 = 2;
1848         } else if (power > samples[3].power) {
1849                 index0 = 2;
1850                 index1 = 3;
1851         } else {
1852                 index0 = 3;
1853                 index1 = 4;
1854         }
1855
1856         denominator = (s32) samples[index1].power - (s32) samples[index0].power;
1857         if (denominator == 0)
1858                 return -EINVAL;
1859         gains0 = (s32) samples[index0].gain_index * (1 << 19);
1860         gains1 = (s32) samples[index1].gain_index * (1 << 19);
1861         res = gains0 + (gains1 - gains0) *
1862             ((s32) power - (s32) samples[index0].power) / denominator +
1863             (1 << 18);
1864         *new_index = res >> 19;
1865         return 0;
1866 }
1867
1868 static void iwl_hw_reg_init_channel_groups(struct iwl_priv *priv)
1869 {
1870         u32 i;
1871         s32 rate_index;
1872         const struct iwl_eeprom_txpower_group *group;
1873
1874         IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
1875
1876         for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
1877                 s8 *clip_pwrs;  /* table of power levels for each rate */
1878                 s8 satur_pwr;   /* saturation power for each chnl group */
1879                 group = &priv->eeprom.groups[i];
1880
1881                 /* sanity check on factory saturation power value */
1882                 if (group->saturation_power < 40) {
1883                         IWL_WARNING("Error: saturation power is %d, "
1884                                     "less than minimum expected 40\n",
1885                                     group->saturation_power);
1886                         return;
1887                 }
1888
1889                 /*
1890                  * Derive requested power levels for each rate, based on
1891                  *   hardware capabilities (saturation power for band).
1892                  * Basic value is 3dB down from saturation, with further
1893                  *   power reductions for highest 3 data rates.  These
1894                  *   backoffs provide headroom for high rate modulation
1895                  *   power peaks, without too much distortion (clipping).
1896                  */
1897                 /* we'll fill in this array with h/w max power levels */
1898                 clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers;
1899
1900                 /* divide factory saturation power by 2 to find -3dB level */
1901                 satur_pwr = (s8) (group->saturation_power >> 1);
1902
1903                 /* fill in channel group's nominal powers for each rate */
1904                 for (rate_index = 0;
1905                      rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
1906                         switch (rate_index) {
1907                         case IWL_RATE_36M_INDEX:
1908                                 if (i == 0)     /* B/G */
1909                                         *clip_pwrs = satur_pwr;
1910                                 else    /* A */
1911                                         *clip_pwrs = satur_pwr - 5;
1912                                 break;
1913                         case IWL_RATE_48M_INDEX:
1914                                 if (i == 0)
1915                                         *clip_pwrs = satur_pwr - 7;
1916                                 else
1917                                         *clip_pwrs = satur_pwr - 10;
1918                                 break;
1919                         case IWL_RATE_54M_INDEX:
1920                                 if (i == 0)
1921                                         *clip_pwrs = satur_pwr - 9;
1922                                 else
1923                                         *clip_pwrs = satur_pwr - 12;
1924                                 break;
1925                         default:
1926                                 *clip_pwrs = satur_pwr;
1927                                 break;
1928                         }
1929                 }
1930         }
1931 }
1932
1933 /**
1934  * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
1935  *
1936  * Second pass (during init) to set up priv->channel_info
1937  *
1938  * Set up Tx-power settings in our channel info database for each VALID
1939  * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
1940  * and current temperature.
1941  *
1942  * Since this is based on current temperature (at init time), these values may
1943  * not be valid for very long, but it gives us a starting/default point,
1944  * and allows us to active (i.e. using Tx) scan.
1945  *
1946  * This does *not* write values to NIC, just sets up our internal table.
1947  */
1948 int iwl3945_txpower_set_from_eeprom(struct iwl_priv *priv)
1949 {
1950         struct iwl_channel_info *ch_info = NULL;
1951         struct iwl_channel_power_info *pwr_info;
1952         int delta_index;
1953         u8 rate_index;
1954         u8 scan_tbl_index;
1955         const s8 *clip_pwrs;    /* array of power levels for each rate */
1956         u8 gain, dsp_atten;
1957         s8 power;
1958         u8 pwr_index, base_pwr_index, a_band;
1959         u8 i;
1960         int temperature;
1961
1962         /* save temperature reference,
1963          *   so we can determine next time to calibrate */
1964         temperature = iwl_hw_reg_txpower_get_temperature(priv);
1965         priv->last_temperature = temperature;
1966
1967         iwl_hw_reg_init_channel_groups(priv);
1968
1969         /* initialize Tx power info for each and every channel, 2.4 and 5.x */
1970         for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
1971              i++, ch_info++) {
1972                 a_band = is_channel_a_band(ch_info);
1973                 if (!is_channel_valid(ch_info))
1974                         continue;
1975
1976                 /* find this channel's channel group (*not* "band") index */
1977                 ch_info->group_index =
1978                         iwl_hw_reg_get_ch_grp_index(priv, ch_info);
1979
1980                 /* Get this chnlgrp's rate->max/clip-powers table */
1981                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1982
1983                 /* calculate power index *adjustment* value according to
1984                  *  diff between current temperature and factory temperature */
1985                 delta_index = iwl_hw_reg_adjust_power_by_temp(temperature,
1986                                 priv->eeprom.groups[ch_info->group_index].
1987                                 temperature);
1988
1989                 IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
1990                                 ch_info->channel, delta_index, temperature +
1991                                 IWL_TEMP_CONVERT);
1992
1993                 /* set tx power value for all OFDM rates */
1994                 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
1995                      rate_index++) {
1996                         s32 power_idx;
1997                         int rc;
1998
1999                         /* use channel group's clip-power table,
2000                          *   but don't exceed channel's max power */
2001                         s8 pwr = min(ch_info->max_power_avg,
2002                                      clip_pwrs[rate_index]);
2003
2004                         pwr_info = &ch_info->power_info[rate_index];
2005
2006                         /* get base (i.e. at factory-measured temperature)
2007                          *    power table index for this rate's power */
2008                         rc = iwl_hw_reg_get_matched_power_index(priv, pwr,
2009                                                          ch_info->group_index,
2010                                                          &power_idx);
2011                         if (rc) {
2012                                 IWL_ERROR("Invalid power index\n");
2013                                 return rc;
2014                         }
2015                         pwr_info->base_power_index = (u8) power_idx;
2016
2017                         /* temperature compensate */
2018                         power_idx += delta_index;
2019
2020                         /* stay within range of gain table */
2021                         power_idx = iwl_hw_reg_fix_power_index(power_idx);
2022
2023                         /* fill 1 OFDM rate's iwl_channel_power_info struct */
2024                         pwr_info->requested_power = pwr;
2025                         pwr_info->power_table_index = (u8) power_idx;
2026                         pwr_info->tpc.tx_gain =
2027                             power_gain_table[a_band][power_idx].tx_gain;
2028                         pwr_info->tpc.dsp_atten =
2029                             power_gain_table[a_band][power_idx].dsp_atten;
2030                 }
2031
2032                 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2033                 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX];
2034                 power = pwr_info->requested_power +
2035                         IWL_CCK_FROM_OFDM_POWER_DIFF;
2036                 pwr_index = pwr_info->power_table_index +
2037                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2038                 base_pwr_index = pwr_info->base_power_index +
2039                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2040
2041                 /* stay within table range */
2042                 pwr_index = iwl_hw_reg_fix_power_index(pwr_index);
2043                 gain = power_gain_table[a_band][pwr_index].tx_gain;
2044                 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2045
2046                 /* fill each CCK rate's iwl_channel_power_info structure
2047                  * NOTE:  All CCK-rate Txpwrs are the same for a given chnl!
2048                  * NOTE:  CCK rates start at end of OFDM rates! */
2049                 for (rate_index = IWL_OFDM_RATES;
2050                      rate_index < IWL_RATE_COUNT; rate_index++) {
2051                         pwr_info = &ch_info->power_info[rate_index];
2052                         pwr_info->requested_power = power;
2053                         pwr_info->power_table_index = pwr_index;
2054                         pwr_info->base_power_index = base_pwr_index;
2055                         pwr_info->tpc.tx_gain = gain;
2056                         pwr_info->tpc.dsp_atten = dsp_atten;
2057                 }
2058
2059                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2060                 for (scan_tbl_index = 0;
2061                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2062                         s32 actual_index = (scan_tbl_index == 0) ?
2063                                 IWL_RATE_1M_INDEX : IWL_RATE_6M_INDEX;
2064                         iwl_hw_reg_set_scan_power(priv, scan_tbl_index,
2065                                 actual_index, clip_pwrs, ch_info, a_band);
2066                 }
2067         }
2068
2069         return 0;
2070 }
2071
2072 int iwl_hw_rxq_stop(struct iwl_priv *priv)
2073 {
2074         int rc;
2075         unsigned long flags;
2076
2077         spin_lock_irqsave(&priv->lock, flags);
2078         rc = iwl_grab_restricted_access(priv);
2079         if (rc) {
2080                 spin_unlock_irqrestore(&priv->lock, flags);
2081                 return rc;
2082         }
2083
2084         iwl_write_restricted(priv, FH_RCSR_CONFIG(0), 0);
2085         rc = iwl_poll_restricted_bit(priv, FH_RSSR_STATUS, (1 << 24), 1000);
2086         if (rc < 0)
2087                 IWL_ERROR("Can't stop Rx DMA.\n");
2088
2089         iwl_release_restricted_access(priv);
2090         spin_unlock_irqrestore(&priv->lock, flags);
2091
2092         return 0;
2093 }
2094
2095 int iwl_hw_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq)
2096 {
2097         int rc;
2098         unsigned long flags;
2099         int txq_id = txq->q.id;
2100
2101         struct iwl_shared *shared_data = priv->hw_setting.shared_virt;
2102
2103         shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2104
2105         spin_lock_irqsave(&priv->lock, flags);
2106         rc = iwl_grab_restricted_access(priv);
2107         if (rc) {
2108                 spin_unlock_irqrestore(&priv->lock, flags);
2109                 return rc;
2110         }
2111         iwl_write_restricted(priv, FH_CBCC_CTRL(txq_id), 0);
2112         iwl_write_restricted(priv, FH_CBCC_BASE(txq_id), 0);
2113
2114         iwl_write_restricted(priv, FH_TCSR_CONFIG(txq_id),
2115                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2116                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2117                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2118                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2119                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2120         iwl_release_restricted_access(priv);
2121
2122         /* fake read to flush all prev. writes */
2123         iwl_read32(priv, FH_TSSR_CBB_BASE);
2124         spin_unlock_irqrestore(&priv->lock, flags);
2125
2126         return 0;
2127 }
2128
2129 int iwl_hw_get_rx_read(struct iwl_priv *priv)
2130 {
2131         struct iwl_shared *shared_data = priv->hw_setting.shared_virt;
2132
2133         return le32_to_cpu(shared_data->rx_read_ptr[0]);
2134 }
2135
2136 /**
2137  * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2138  */
2139 int iwl3945_init_hw_rate_table(struct iwl_priv *priv)
2140 {
2141         int rc, i;
2142         struct iwl_rate_scaling_cmd rate_cmd = {
2143                 .reserved = {0, 0, 0},
2144         };
2145         struct iwl_rate_scaling_info *table = rate_cmd.table;
2146
2147         for (i = 0; i < ARRAY_SIZE(iwl_rates); i++) {
2148                 table[i].rate_n_flags =
2149                         iwl_hw_set_rate_n_flags(iwl_rates[i].plcp, 0);
2150                 table[i].try_cnt = priv->retry_rate;
2151                 table[i].next_rate_index = iwl_get_prev_ieee_rate(i);
2152         }
2153
2154         switch (priv->phymode) {
2155         case MODE_IEEE80211A:
2156                 IWL_DEBUG_RATE("Select A mode rate scale\n");
2157                 /* If one of the following CCK rates is used,
2158                  * have it fall back to the 6M OFDM rate */
2159                 for (i = IWL_FIRST_CCK_RATE; i <= IWL_LAST_CCK_RATE; i++)
2160                         table[i].next_rate_index = IWL_FIRST_OFDM_RATE;
2161
2162                 /* Don't fall back to CCK rates */
2163                 table[IWL_RATE_12M_INDEX].next_rate_index = IWL_RATE_9M_INDEX;
2164
2165                 /* Don't drop out of OFDM rates */
2166                 table[IWL_FIRST_OFDM_RATE].next_rate_index =
2167                     IWL_FIRST_OFDM_RATE;
2168                 break;
2169
2170         case MODE_IEEE80211B:
2171                 IWL_DEBUG_RATE("Select B mode rate scale\n");
2172                 /* If an OFDM rate is used, have it fall back to the
2173                  * 1M CCK rates */
2174                 for (i = IWL_FIRST_OFDM_RATE; i <= IWL_LAST_OFDM_RATE; i++)
2175                         table[i].next_rate_index = IWL_FIRST_CCK_RATE;
2176
2177                 /* CCK shouldn't fall back to OFDM... */
2178                 table[IWL_RATE_11M_INDEX].next_rate_index = IWL_RATE_5M_INDEX;
2179                 break;
2180
2181         default:
2182                 IWL_DEBUG_RATE("Select G mode rate scale\n");
2183                 break;
2184         }
2185
2186         /* Update the rate scaling for control frame Tx */
2187         rate_cmd.table_id = 0;
2188         rc = iwl_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2189                               &rate_cmd);
2190         if (rc)
2191                 return rc;
2192
2193         /* Update the rate scaling for data frame Tx */
2194         rate_cmd.table_id = 1;
2195         return iwl_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2196                                 &rate_cmd);
2197 }
2198
2199 int iwl_hw_set_hw_setting(struct iwl_priv *priv)
2200 {
2201         memset((void *)&priv->hw_setting, 0,
2202                sizeof(struct iwl_driver_hw_info));
2203
2204         priv->hw_setting.shared_virt =
2205             pci_alloc_consistent(priv->pci_dev,
2206                                  sizeof(struct iwl_shared),
2207                                  &priv->hw_setting.shared_phys);
2208
2209         if (!priv->hw_setting.shared_virt) {
2210                 IWL_ERROR("failed to allocate pci memory\n");
2211                 mutex_unlock(&priv->mutex);
2212                 return -ENOMEM;
2213         }
2214
2215         priv->hw_setting.ac_queue_count = AC_NUM;
2216         priv->hw_setting.rx_buffer_size = IWL_RX_BUF_SIZE;
2217         priv->hw_setting.tx_cmd_len = sizeof(struct iwl_tx_cmd);
2218         priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
2219         priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
2220         priv->hw_setting.cck_flag = 0;
2221         priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
2222         priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
2223         return 0;
2224 }
2225
2226 unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
2227                           struct iwl_frame *frame, u8 rate)
2228 {
2229         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
2230         unsigned int frame_size;
2231
2232         tx_beacon_cmd = (struct iwl_tx_beacon_cmd *)&frame->u;
2233         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2234
2235         tx_beacon_cmd->tx.sta_id = IWL3945_BROADCAST_ID;
2236         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2237
2238         frame_size = iwl_fill_beacon_frame(priv,
2239                                 tx_beacon_cmd->frame,
2240                                 BROADCAST_ADDR,
2241                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2242
2243         BUG_ON(frame_size > MAX_MPDU_SIZE);
2244         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2245
2246         tx_beacon_cmd->tx.rate = rate;
2247         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2248                                       TX_CMD_FLG_TSF_MSK);
2249
2250         /* supp_rates[0] == OFDM  */
2251         tx_beacon_cmd->tx.supp_rates[0] = IWL_OFDM_BASIC_RATES_MASK;
2252
2253         /* supp_rates[1] == CCK
2254          *
2255          * NOTE:  IWL_*_RATES_MASK are not in the order that supp_rates
2256          * expects so we have to shift them around.
2257          *
2258          * supp_rates expects:
2259          * CCK rates are bit0..3
2260          *
2261          * However IWL_*_RATES_MASK has:
2262          * CCK rates are bit8..11
2263          */
2264         tx_beacon_cmd->tx.supp_rates[1] =
2265                 (IWL_CCK_BASIC_RATES_MASK >> 8) & 0xF;
2266
2267         return (sizeof(struct iwl_tx_beacon_cmd) + frame_size);
2268 }
2269
2270 void iwl_hw_rx_handler_setup(struct iwl_priv *priv)
2271 {
2272         priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2273 }
2274
2275 void iwl_hw_setup_deferred_work(struct iwl_priv *priv)
2276 {
2277         INIT_DELAYED_WORK(&priv->thermal_periodic,
2278                           iwl3945_bg_reg_txpower_periodic);
2279 }
2280
2281 void iwl_hw_cancel_deferred_work(struct iwl_priv *priv)
2282 {
2283         cancel_delayed_work(&priv->thermal_periodic);
2284 }
2285
2286 struct pci_device_id iwl_hw_card_ids[] = {
2287         {0x8086, 0x4222, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2288         {0x8086, 0x4227, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2289         {0}
2290 };
2291
2292 inline int iwl_eeprom_aqcuire_semaphore(struct iwl_priv *priv)
2293 {
2294         _iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
2295         return 0;
2296 }
2297
2298 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);