drivers/net/wireless/iwlwifi/iwl-3945.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/version.h>
  30 #include <linux/init.h>
  31 #include <linux/pci.h>
  32 #include <linux/dma-mapping.h>
  33 #include <linux/delay.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/wireless.h>
  37 #include <linux/firmware.h>
  38 #include <net/mac80211.h>
  39
  40 #include <linux/etherdevice.h>
  41 #include <linux/delay.h>
  42
  43 #include "iwlwifi.h"
  44 #include "iwl-helpers.h"
  45 #include "iwl-3945.h"
  46 #include "iwl-3945-rs.h"
  47
  48 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np)    \
  49         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,   \
  50                                     IWL_RATE_##r##M_IEEE,   \
  51                                     IWL_RATE_##ip##M_INDEX, \
  52                                     IWL_RATE_##in##M_INDEX, \
  53                                     IWL_RATE_##rp##M_INDEX, \
  54                                     IWL_RATE_##rn##M_INDEX, \
  55                                     IWL_RATE_##pp##M_INDEX, \
  56                                     IWL_RATE_##np##M_INDEX }
  57
  58 /*
  59  * Parameter order:
  60  *   rate, prev rate, next rate, prev tgg rate, next tgg rate
  61  *
  62  * If there isn't a valid next or previous rate then INV is used which
  63  * maps to IWL_RATE_INVALID
  64  *
  65  */
  66 const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
  67         IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
  68         IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11),       /*  9mbps */
  69         IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
  70         IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
  71         IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
  72         IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
  73         IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
  74         IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  75         IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2),    /*  1mbps */
  76         IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5),          /*  2mbps */
  77         IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
  78         IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18),      /* 11mbps */
  79 };
  80
  81 /* 1 = enable the iwl_disable_events() function */
  82 #define IWL_EVT_DISABLE (0)
  83 #define IWL_EVT_DISABLE_SIZE (1532/32)
  84
  85 /**
  86  * iwl_disable_events - Disable selected events in uCode event log
  87  *
  88  * Disable an event by writing "1"s into "disable"
  89  *   bitmap in SRAM.  Bit position corresponds to Event # (id/type).
  90  *   Default values of 0 enable uCode events to be logged.
  91  * Use for only special debugging.  This function is just a placeholder as-is,
  92  *   you'll need to provide the special bits! ...
  93  *   ... and set IWL_EVT_DISABLE to 1. */
  94 void iwl_disable_events(struct iwl_priv *priv)
  95 {
  96         int rc;
  97         int i;
  98         u32 base;               /* SRAM address of event log header */
  99         u32 disable_ptr;        /* SRAM address of event-disable bitmap array */
 100         u32 array_size;         /* # of u32 entries in array */
 101         u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
 102                 0x00000000,     /*   31 -    0  Event id numbers */
 103                 0x00000000,     /*   63 -   32 */
 104                 0x00000000,     /*   95 -   64 */
 105                 0x00000000,     /*  127 -   96 */
 106                 0x00000000,     /*  159 -  128 */
 107                 0x00000000,     /*  191 -  160 */
 108                 0x00000000,     /*  223 -  192 */
 109                 0x00000000,     /*  255 -  224 */
 110                 0x00000000,     /*  287 -  256 */
 111                 0x00000000,     /*  319 -  288 */
 112                 0x00000000,     /*  351 -  320 */
 113                 0x00000000,     /*  383 -  352 */
 114                 0x00000000,     /*  415 -  384 */
 115                 0x00000000,     /*  447 -  416 */
 116                 0x00000000,     /*  479 -  448 */
 117                 0x00000000,     /*  511 -  480 */
 118                 0x00000000,     /*  543 -  512 */
 119                 0x00000000,     /*  575 -  544 */
 120                 0x00000000,     /*  607 -  576 */
 121                 0x00000000,     /*  639 -  608 */
 122                 0x00000000,     /*  671 -  640 */
 123                 0x00000000,     /*  703 -  672 */
 124                 0x00000000,     /*  735 -  704 */
 125                 0x00000000,     /*  767 -  736 */
 126                 0x00000000,     /*  799 -  768 */
 127                 0x00000000,     /*  831 -  800 */
 128                 0x00000000,     /*  863 -  832 */
 129                 0x00000000,     /*  895 -  864 */
 130                 0x00000000,     /*  927 -  896 */
 131                 0x00000000,     /*  959 -  928 */
 132                 0x00000000,     /*  991 -  960 */
 133                 0x00000000,     /* 1023 -  992 */
 134                 0x00000000,     /* 1055 - 1024 */
 135                 0x00000000,     /* 1087 - 1056 */
 136                 0x00000000,     /* 1119 - 1088 */
 137                 0x00000000,     /* 1151 - 1120 */
 138                 0x00000000,     /* 1183 - 1152 */
 139                 0x00000000,     /* 1215 - 1184 */
 140                 0x00000000,     /* 1247 - 1216 */
 141                 0x00000000,     /* 1279 - 1248 */
 142                 0x00000000,     /* 1311 - 1280 */
 143                 0x00000000,     /* 1343 - 1312 */
 144                 0x00000000,     /* 1375 - 1344 */
 145                 0x00000000,     /* 1407 - 1376 */
 146                 0x00000000,     /* 1439 - 1408 */
 147                 0x00000000,     /* 1471 - 1440 */
 148                 0x00000000,     /* 1503 - 1472 */
 149         };
 150
 151         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 152         if (!iwl_hw_valid_rtc_data_addr(base)) {
 153                 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
 154                 return;
 155         }
 156
 157         rc = iwl_grab_restricted_access(priv);
 158         if (rc) {
 159                 IWL_WARNING("Can not read from adapter at this time.\n");
 160                 return;
 161         }
 162
 163         disable_ptr = iwl_read_restricted_mem(priv, base + (4 * sizeof(u32)));
 164         array_size = iwl_read_restricted_mem(priv, base + (5 * sizeof(u32)));
 165         iwl_release_restricted_access(priv);
 166
 167         if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
 168                 IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
 169                                disable_ptr);
 170                 rc = iwl_grab_restricted_access(priv);
 171                 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
 172                         iwl_write_restricted_mem(priv,
 173                                                  disable_ptr +
 174                                                  (i * sizeof(u32)),
 175                                                  evt_disable[i]);
 176
 177                 iwl_release_restricted_access(priv);
 178         } else {
 179                 IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
 180                 IWL_DEBUG_INFO("  by writing \"1\"s into disable bitmap\n");
 181                 IWL_DEBUG_INFO("  in SRAM at 0x%x, size %d u32s\n",
 182                                disable_ptr, array_size);
 183         }
 184
 185 }
 186
 187 /**
 188  * iwl3945_get_antenna_flags - Get antenna flags for RXON command
 189  * @priv: eeprom and antenna fields are used to determine antenna flags
 190  *
 191  * priv->eeprom  is used to determine if antenna AUX/MAIN are reversed
 192  * priv->antenna specifies the antenna diversity mode:
 193  *
 194  * IWL_ANTENNA_DIVERISTY - NIC selects best antenna by itself
 195  * IWL_ANTENNA_MAIN      - Force MAIN antenna
 196  * IWL_ANTENNA_AUX       - Force AUX antenna
 197  */
 198 __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
 199 {
 200         switch (priv->antenna) {
 201         case IWL_ANTENNA_DIVERSITY:
 202                 return 0;
 203
 204         case IWL_ANTENNA_MAIN:
 205                 if (priv->eeprom.antenna_switch_type)
 206                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 207                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 208
 209         case IWL_ANTENNA_AUX:
 210                 if (priv->eeprom.antenna_switch_type)
 211                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 212                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 213         }
 214
 215         /* bad antenna selector value */
 216         IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna);
 217         return 0;               /* "diversity" is default if error */
 218 }
 219
 220 /*****************************************************************************
 221  *
 222  * Intel PRO/Wireless 3945ABG/BG Network Connection
 223  *
 224  *  RX handler implementations
 225  *
 226  *  Used by iwl-base.c
 227  *
 228  *****************************************************************************/
 229
 230 void iwl_hw_rx_statistics(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
 231 {
 232         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
 233         IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
 234                      (int)sizeof(struct iwl_notif_statistics),
 235                      le32_to_cpu(pkt->len));
 236
 237         memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
 238
 239         priv->last_statistics_time = jiffies;
 240 }
 241
 242 static void iwl3945_handle_data_packet(struct iwl_priv *priv, int is_data,
 243                                    struct iwl_rx_mem_buffer *rxb,
 244                                    struct ieee80211_rx_status *stats,
 245                                    u16 phy_flags)
 246 {
 247         struct ieee80211_hdr *hdr;
 248         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
 249         struct iwl_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 250         struct iwl_rx_frame_end *rx_end = IWL_RX_END(pkt);
 251         short len = le16_to_cpu(rx_hdr->len);
 252
 253         /* We received data from the HW, so stop the watchdog */
 254         if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) {
 255                 IWL_DEBUG_DROP("Corruption detected!\n");
 256                 return;
 257         }
 258
 259         /* We only process data packets if the interface is open */
 260         if (unlikely(!priv->is_open)) {
 261                 IWL_DEBUG_DROP_LIMIT
 262                     ("Dropping packet while interface is not open.\n");
 263                 return;
 264         }
 265         if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
 266                 if (iwl_param_hwcrypto)
 267                         iwl_set_decrypted_flag(priv, rxb->skb,
 268                                                le32_to_cpu(rx_end->status),
 269                                                stats);
 270                 iwl_handle_data_packet_monitor(priv, rxb, IWL_RX_DATA(pkt),
 271                                                len, stats, phy_flags);
 272                 return;
 273         }
 274
 275         skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt);
 276         /* Set the size of the skb to the size of the frame */
 277         skb_put(rxb->skb, le16_to_cpu(rx_hdr->len));
 278
 279         hdr = (void *)rxb->skb->data;
 280
 281         if (iwl_param_hwcrypto)
 282                 iwl_set_decrypted_flag(priv, rxb->skb,
 283                                        le32_to_cpu(rx_end->status), stats);
 284
 285         ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
 286         rxb->skb = NULL;
 287 }
 288
 289 static void iwl3945_rx_reply_rx(struct iwl_priv *priv,
 290                                 struct iwl_rx_mem_buffer *rxb)
 291 {
 292         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
 293         struct iwl_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 294         struct iwl_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 295         struct iwl_rx_frame_end *rx_end = IWL_RX_END(pkt);
 296         struct ieee80211_hdr *header;
 297         u16 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
 298         u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
 299         u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
 300         struct ieee80211_rx_status stats = {
 301                 .mactime = le64_to_cpu(rx_end->timestamp),
 302                 .freq = ieee80211chan2mhz(le16_to_cpu(rx_hdr->channel)),
 303                 .channel = le16_to_cpu(rx_hdr->channel),
 304                 .phymode = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
 305                 MODE_IEEE80211G : MODE_IEEE80211A,
 306                 .antenna = 0,
 307                 .rate = rx_hdr->rate,
 308                 .flag = 0,
 309         };
 310         u8 network_packet;
 311         int snr;
 312
 313         if ((unlikely(rx_stats->phy_count > 20))) {
 314                 IWL_DEBUG_DROP
 315                     ("dsp size out of range [0,20]: "
 316                      "%d/n", rx_stats->phy_count);
 317                 return;
 318         }
 319
 320         if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
 321             || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
 322                 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
 323                 return;
 324         }
 325
 326         if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
 327                 iwl3945_handle_data_packet(priv, 1, rxb, &stats, phy_flags);
 328                 return;
 329         }
 330
 331         /* Convert 3945's rssi indicator to dBm */
 332         stats.ssi = rx_stats->rssi - IWL_RSSI_OFFSET;
 333
 334         /* Set default noise value to -127 */
 335         if (priv->last_rx_noise == 0)
 336                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
 337
 338         /* 3945 provides noise info for OFDM frames only.
 339          * sig_avg and noise_diff are measured by the 3945's digital signal
 340          *   processor (DSP), and indicate linear levels of signal level and
 341          *   distortion/noise within the packet preamble after
 342          *   automatic gain control (AGC).  sig_avg should stay fairly
 343          *   constant if the radio's AGC is working well.
 344          * Since these values are linear (not dB or dBm), linear
 345          *   signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
 346          * Convert linear SNR to dB SNR, then subtract that from rssi dBm
 347          *   to obtain noise level in dBm.
 348          * Calculate stats.signal (quality indicator in %) based on SNR. */
 349         if (rx_stats_noise_diff) {
 350                 snr = rx_stats_sig_avg / rx_stats_noise_diff;
 351                 stats.noise = stats.ssi - iwl_calc_db_from_ratio(snr);
 352                 stats.signal = iwl_calc_sig_qual(stats.ssi, stats.noise);
 353
 354         /* If noise info not available, calculate signal quality indicator (%)
 355          *   using just the dBm signal level. */
 356         } else {
 357                 stats.noise = priv->last_rx_noise;
 358                 stats.signal = iwl_calc_sig_qual(stats.ssi, 0);
 359         }
 360
 361
 362         IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
 363                         stats.ssi, stats.noise, stats.signal,
 364                         rx_stats_sig_avg, rx_stats_noise_diff);
 365
 366         stats.freq = ieee80211chan2mhz(stats.channel);
 367
 368         /* can be covered by iwl_report_frame() in most cases */
 369 /*      IWL_DEBUG_RX("RX status: 0x%08X\n", rx_end->status); */
 370
 371         header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 372
 373         network_packet = iwl_is_network_packet(priv, header);
 374
 375 #ifdef CONFIG_IWLWIFI_DEBUG
 376         if (iwl_debug_level & IWL_DL_STATS && net_ratelimit())
 377                 IWL_DEBUG_STATS
 378                     ("[%c] %d RSSI: %d Signal: %u, Noise: %u, Rate: %u\n",
 379                      network_packet ? '*' : ' ',
 380                      stats.channel, stats.ssi, stats.ssi,
 381                      stats.ssi, stats.rate);
 382
 383         if (iwl_debug_level & (IWL_DL_RX))
 384                 /* Set "1" to report good data frames in groups of 100 */
 385                 iwl_report_frame(priv, pkt, header, 1);
 386 #endif
 387
 388         if (network_packet) {
 389                 priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
 390                 priv->last_tsf = le64_to_cpu(rx_end->timestamp);
 391                 priv->last_rx_rssi = stats.ssi;
 392                 priv->last_rx_noise = stats.noise;
 393         }
 394
 395         switch (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FTYPE) {
 396         case IEEE80211_FTYPE_MGMT:
 397                 switch (le16_to_cpu(header->frame_control) &
 398                         IEEE80211_FCTL_STYPE) {
 399                 case IEEE80211_STYPE_PROBE_RESP:
 400                 case IEEE80211_STYPE_BEACON:{
 401                                 /* If this is a beacon or probe response for
 402                                  * our network then cache the beacon
 403                                  * timestamp */
 404                                 if ((((priv->iw_mode == IEEE80211_IF_TYPE_STA)
 405                                       && !compare_ether_addr(header->addr2,
 406                                                              priv->bssid)) ||
 407                                      ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
 408                                       && !compare_ether_addr(header->addr3,
 409                                                              priv->bssid)))) {
 410                                         struct ieee80211_mgmt *mgmt =
 411                                             (struct ieee80211_mgmt *)header;
 412                                         __le32 *pos;
 413                                         pos =
 414                                             (__le32 *) & mgmt->u.beacon.
 415                                             timestamp;
 416                                         priv->timestamp0 = le32_to_cpu(pos[0]);
 417                                         priv->timestamp1 = le32_to_cpu(pos[1]);
 418                                         priv->beacon_int = le16_to_cpu(
 419                                             mgmt->u.beacon.beacon_int);
 420                                         if (priv->call_post_assoc_from_beacon &&
 421                                             (priv->iw_mode ==
 422                                                 IEEE80211_IF_TYPE_STA))
 423                                                 queue_work(priv->workqueue,
 424                                                     &priv->post_associate.work);
 425
 426                                         priv->call_post_assoc_from_beacon = 0;
 427                                 }
 428
 429                                 break;
 430                         }
 431
 432                 case IEEE80211_STYPE_ACTION:
 433                         /* TODO: Parse 802.11h frames for CSA... */
 434                         break;
 435
 436                         /*
 437                          * TODO: There is no callback function from upper
 438                          * stack to inform us when associated status. this
 439                          * work around to sniff assoc_resp management frame
 440                          * and finish the association process.
 441                          */
 442                 case IEEE80211_STYPE_ASSOC_RESP:
 443                 case IEEE80211_STYPE_REASSOC_RESP:{
 444                                 struct ieee80211_mgmt *mgnt =
 445                                     (struct ieee80211_mgmt *)header;
 446                                 priv->assoc_id = (~((1 << 15) | (1 << 14)) &
 447                                                   le16_to_cpu(mgnt->u.
 448                                                               assoc_resp.aid));
 449                                 priv->assoc_capability =
 450                                     le16_to_cpu(mgnt->u.assoc_resp.capab_info);
 451                                 if (priv->beacon_int)
 452                                         queue_work(priv->workqueue,
 453                                             &priv->post_associate.work);
 454                                 else
 455                                         priv->call_post_assoc_from_beacon = 1;
 456                                 break;
 457                         }
 458
 459                 case IEEE80211_STYPE_PROBE_REQ:{
 460                                 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
 461                                         IWL_DEBUG_DROP
 462                                             ("Dropping (non network): " MAC_FMT
 463                                              ", " MAC_FMT ", " MAC_FMT "\n",
 464                                              MAC_ARG(header->addr1),
 465                                              MAC_ARG(header->addr2),
 466                                              MAC_ARG(header->addr3));
 467                                 return;
 468                         }
 469                 }
 470
 471                 iwl3945_handle_data_packet(priv, 0, rxb, &stats, phy_flags);
 472                 break;
 473
 474         case IEEE80211_FTYPE_CTL:
 475                 break;
 476
 477         case IEEE80211_FTYPE_DATA:
 478                 if (unlikely(is_duplicate_packet(priv, header)))
 479                         IWL_DEBUG_DROP("Dropping (dup): " MAC_FMT ", "
 480                                        MAC_FMT ", " MAC_FMT "\n",
 481                                        MAC_ARG(header->addr1),
 482                                        MAC_ARG(header->addr2),
 483                                        MAC_ARG(header->addr3));
 484                 else
 485                         iwl3945_handle_data_packet(priv, 1, rxb, &stats,
 486                                                    phy_flags);
 487                 break;
 488         }
 489 }
 490
 491 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, void *ptr,
 492                                  dma_addr_t addr, u16 len)
 493 {
 494         int count;
 495         u32 pad;
 496         struct iwl_tfd_frame *tfd = (struct iwl_tfd_frame *)ptr;
 497
 498         count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 499         pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags));
 500
 501         if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
 502                 IWL_ERROR("Error can not send more than %d chunks\n",
 503                           NUM_TFD_CHUNKS);
 504                 return -EINVAL;
 505         }
 506
 507         tfd->pa[count].addr = cpu_to_le32(addr);
 508         tfd->pa[count].len = cpu_to_le32(len);
 509
 510         count++;
 511
 512         tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
 513                                          TFD_CTL_PAD_SET(pad));
 514
 515         return 0;
 516 }
 517
 518 /**
 519  * iwl_hw_txq_free_tfd - Free one TFD, those at index [txq->q.last_used]
 520  *
 521  * Does NOT advance any indexes
 522  */
 523 int iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 524 {
 525         struct iwl_tfd_frame *bd_tmp = (struct iwl_tfd_frame *)&txq->bd[0];
 526         struct iwl_tfd_frame *bd = &bd_tmp[txq->q.last_used];
 527         struct pci_dev *dev = priv->pci_dev;
 528         int i;
 529         int counter;
 530
 531         /* classify bd */
 532         if (txq->q.id == IWL_CMD_QUEUE_NUM)
 533                 /* nothing to cleanup after for host commands */
 534                 return 0;
 535
 536         /* sanity check */
 537         counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags));
 538         if (counter > NUM_TFD_CHUNKS) {
 539                 IWL_ERROR("Too many chunks: %i\n", counter);
 540                 /* @todo issue fatal error, it is quite serious situation */
 541                 return 0;
 542         }
 543
 544         /* unmap chunks if any */
 545
 546         for (i = 1; i < counter; i++) {
 547                 pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
 548                                  le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
 549                 if (txq->txb[txq->q.last_used].skb[0]) {
 550                         struct sk_buff *skb = txq->txb[txq->q.last_used].skb[0];
 551                         if (txq->txb[txq->q.last_used].skb[0]) {
 552                                 /* Can be called from interrupt context */
 553                                 dev_kfree_skb_any(skb);
 554                                 txq->txb[txq->q.last_used].skb[0] = NULL;
 555                         }
 556                 }
 557         }
 558         return 0;
 559 }
 560
 561 u8 iwl_hw_find_station(struct iwl_priv *priv, const u8 *addr)
 562 {
 563         int i;
 564         int ret = IWL_INVALID_STATION;
 565         unsigned long flags;
 566
 567         spin_lock_irqsave(&priv->sta_lock, flags);
 568         for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
 569                 if ((priv->stations[i].used) &&
 570                     (!compare_ether_addr
 571                      (priv->stations[i].sta.sta.addr, addr))) {
 572                         ret = i;
 573                         goto out;
 574                 }
 575
 576         IWL_DEBUG_INFO("can not find STA " MAC_FMT " (total %d)\n",
 577                        MAC_ARG(addr), priv->num_stations);
 578  out:
 579         spin_unlock_irqrestore(&priv->sta_lock, flags);
 580         return ret;
 581 }
 582
 583 /**
 584  * iwl_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
 585  *
 586 */
 587 void iwl_hw_build_tx_cmd_rate(struct iwl_priv *priv,
 588                               struct iwl_cmd *cmd,
 589                               struct ieee80211_tx_control *ctrl,
 590                               struct ieee80211_hdr *hdr, int sta_id, int tx_id)
 591 {
 592         unsigned long flags;
 593         u16 rate_index = min(ctrl->tx_rate & 0xffff, IWL_RATE_COUNT - 1);
 594         u16 rate_mask;
 595         int rate;
 596         u8 rts_retry_limit;
 597         u8 data_retry_limit;
 598         __le32 tx_flags;
 599         u16 fc = le16_to_cpu(hdr->frame_control);
 600
 601         rate = iwl_rates[rate_index].plcp;
 602         tx_flags = cmd->cmd.tx.tx_flags;
 603
 604         /* We need to figure out how to get the sta->supp_rates while
 605          * in this running context; perhaps encoding into ctrl->tx_rate? */
 606         rate_mask = IWL_RATES_MASK;
 607
 608         spin_lock_irqsave(&priv->sta_lock, flags);
 609
 610         priv->stations[sta_id].current_rate.rate_n_flags = rate;
 611
 612         if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
 613             (sta_id != IWL3945_BROADCAST_ID) &&
 614                 (sta_id != IWL_MULTICAST_ID))
 615                 priv->stations[IWL_STA_ID].current_rate.rate_n_flags = rate;
 616
 617         spin_unlock_irqrestore(&priv->sta_lock, flags);
 618
 619         if (tx_id >= IWL_CMD_QUEUE_NUM)
 620                 rts_retry_limit = 3;
 621         else
 622                 rts_retry_limit = 7;
 623
 624         if (ieee80211_is_probe_response(fc)) {
 625                 data_retry_limit = 3;
 626                 if (data_retry_limit < rts_retry_limit)
 627                         rts_retry_limit = data_retry_limit;
 628         } else
 629                 data_retry_limit = IWL_DEFAULT_TX_RETRY;
 630
 631         if (priv->data_retry_limit != -1)
 632                 data_retry_limit = priv->data_retry_limit;
 633
 634         if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
 635                 switch (fc & IEEE80211_FCTL_STYPE) {
 636                 case IEEE80211_STYPE_AUTH:
 637                 case IEEE80211_STYPE_DEAUTH:
 638                 case IEEE80211_STYPE_ASSOC_REQ:
 639                 case IEEE80211_STYPE_REASSOC_REQ:
 640                         if (tx_flags & TX_CMD_FLG_RTS_MSK) {
 641                                 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
 642                                 tx_flags |= TX_CMD_FLG_CTS_MSK;
 643                         }
 644                         break;
 645                 default:
 646                         break;
 647                 }
 648         }
 649
 650         cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
 651         cmd->cmd.tx.data_retry_limit = data_retry_limit;
 652         cmd->cmd.tx.rate = rate;
 653         cmd->cmd.tx.tx_flags = tx_flags;
 654
 655         /* OFDM */
 656         cmd->cmd.tx.supp_rates[0] = rate_mask & IWL_OFDM_RATES_MASK;
 657
 658         /* CCK */
 659         cmd->cmd.tx.supp_rates[1] = (rate_mask >> 8) & 0xF;
 660
 661         IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
 662                        "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
 663                        cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags),
 664                        cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]);
 665 }
 666
 667 u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id, u16 tx_rate, u8 flags)
 668 {
 669         unsigned long flags_spin;
 670         struct iwl_station_entry *station;
 671
 672         if (sta_id == IWL_INVALID_STATION)
 673                 return IWL_INVALID_STATION;
 674
 675         spin_lock_irqsave(&priv->sta_lock, flags_spin);
 676         station = &priv->stations[sta_id];
 677
 678         station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
 679         station->sta.rate_n_flags = cpu_to_le16(tx_rate);
 680         station->current_rate.rate_n_flags = tx_rate;
 681         station->sta.mode = STA_CONTROL_MODIFY_MSK;
 682
 683         spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
 684
 685         iwl_send_add_station(priv, &station->sta, flags);
 686         IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
 687                         sta_id, tx_rate);
 688         return sta_id;
 689 }
 690
 691 void iwl_hw_card_show_info(struct iwl_priv *priv)
 692 {
 693         IWL_DEBUG_INFO("3945ABG HW Version %u.%u.%u\n",
 694                        ((priv->eeprom.board_revision >> 8) & 0x0F),
 695                        ((priv->eeprom.board_revision >> 8) >> 4),
 696                        (priv->eeprom.board_revision & 0x00FF));
 697
 698         IWL_DEBUG_INFO("3945ABG PBA Number %.*s\n",
 699                        (int)sizeof(priv->eeprom.board_pba_number),
 700                        priv->eeprom.board_pba_number);
 701
 702         IWL_DEBUG_INFO("EEPROM_ANTENNA_SWITCH_TYPE is 0x%02X\n",
 703                        priv->eeprom.antenna_switch_type);
 704 }
 705
 706 static int iwl3945_nic_set_pwr_src(struct iwl_priv *priv, int pwr_max)
 707 {
 708         int rc;
 709         unsigned long flags;
 710
 711         spin_lock_irqsave(&priv->lock, flags);
 712         rc = iwl_grab_restricted_access(priv);
 713         if (rc) {
 714                 spin_unlock_irqrestore(&priv->lock, flags);
 715                 return rc;
 716         }
 717
 718         if (!pwr_max) {
 719                 u32 val;
 720
 721                 rc = pci_read_config_dword(priv->pci_dev,
 722                                 PCI_POWER_SOURCE, &val);
 723                 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
 724                         iwl_set_bits_mask_restricted_reg(priv, APMG_PS_CTRL_REG,
 725                                         APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 726                                         ~APMG_PS_CTRL_MSK_PWR_SRC);
 727                         iwl_release_restricted_access(priv);
 728
 729                         iwl_poll_bit(priv, CSR_GPIO_IN,
 730                                      CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
 731                                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
 732                 } else
 733                         iwl_release_restricted_access(priv);
 734         } else {
 735                 iwl_set_bits_mask_restricted_reg(priv, APMG_PS_CTRL_REG,
 736                                 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 737                                 ~APMG_PS_CTRL_MSK_PWR_SRC);
 738
 739                 iwl_release_restricted_access(priv);
 740                 iwl_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
 741                              CSR_GPIO_IN_BIT_AUX_POWER, 5000);  /* uS */
 742         }
 743         spin_unlock_irqrestore(&priv->lock, flags);
 744
 745         return rc;
 746 }
 747
 748 static int iwl3945_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 749 {
 750         int rc;
 751         unsigned long flags;
 752
 753         spin_lock_irqsave(&priv->lock, flags);
 754         rc = iwl_grab_restricted_access(priv);
 755         if (rc) {
 756                 spin_unlock_irqrestore(&priv->lock, flags);
 757                 return rc;
 758         }
 759
 760         iwl_write_restricted(priv, FH_RCSR_RBD_BASE(0), rxq->dma_addr);
 761         iwl_write_restricted(priv, FH_RCSR_RPTR_ADDR(0),
 762                              priv->hw_setting.shared_phys +
 763                              offsetof(struct iwl_shared, rx_read_ptr[0]));
 764         iwl_write_restricted(priv, FH_RCSR_WPTR(0), 0);
 765         iwl_write_restricted(priv, FH_RCSR_CONFIG(0),
 766                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
 767                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
 768                 ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
 769                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
 770                 (RX_QUEUE_SIZE_LOG << ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
 771                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
 772                 (1 << ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
 773                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
 774
 775         /* fake read to flush all prev I/O */
 776         iwl_read_restricted(priv, FH_RSSR_CTRL);
 777
 778         iwl_release_restricted_access(priv);
 779         spin_unlock_irqrestore(&priv->lock, flags);
 780
 781         return 0;
 782 }
 783
 784 static int iwl3945_tx_reset(struct iwl_priv *priv)
 785 {
 786         int rc;
 787         unsigned long flags;
 788
 789         spin_lock_irqsave(&priv->lock, flags);
 790         rc = iwl_grab_restricted_access(priv);
 791         if (rc) {
 792                 spin_unlock_irqrestore(&priv->lock, flags);
 793                 return rc;
 794         }
 795
 796         /* bypass mode */
 797         iwl_write_restricted_reg(priv, SCD_MODE_REG, 0x2);
 798
 799         /* RA 0 is active */
 800         iwl_write_restricted_reg(priv, SCD_ARASTAT_REG, 0x01);
 801
 802         /* all 6 fifo are active */
 803         iwl_write_restricted_reg(priv, SCD_TXFACT_REG, 0x3f);
 804
 805         iwl_write_restricted_reg(priv, SCD_SBYP_MODE_1_REG, 0x010000);
 806         iwl_write_restricted_reg(priv, SCD_SBYP_MODE_2_REG, 0x030002);
 807         iwl_write_restricted_reg(priv, SCD_TXF4MF_REG, 0x000004);
 808         iwl_write_restricted_reg(priv, SCD_TXF5MF_REG, 0x000005);
 809
 810         iwl_write_restricted(priv, FH_TSSR_CBB_BASE,
 811                              priv->hw_setting.shared_phys);
 812
 813         iwl_write_restricted(priv, FH_TSSR_MSG_CONFIG,
 814                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
 815                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
 816                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
 817                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
 818                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
 819                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
 820                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
 821
 822         iwl_release_restricted_access(priv);
 823         spin_unlock_irqrestore(&priv->lock, flags);
 824
 825         return 0;
 826 }
 827
 828 /**
 829  * iwl3945_txq_ctx_reset - Reset TX queue context
 830  *
 831  * Destroys all DMA structures and initialize them again
 832  */
 833 static int iwl3945_txq_ctx_reset(struct iwl_priv *priv)
 834 {
 835         int rc;
 836         int txq_id, slots_num;
 837
 838         iwl_hw_txq_ctx_free(priv);
 839
 840         /* Tx CMD queue */
 841         rc = iwl3945_tx_reset(priv);
 842         if (rc)
 843                 goto error;
 844
 845         /* Tx queue(s) */
 846         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
 847                 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
 848                                 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
 849                 rc = iwl_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
 850                                 txq_id);
 851                 if (rc) {
 852                         IWL_ERROR("Tx %d queue init failed\n", txq_id);
 853                         goto error;
 854                 }
 855         }
 856
 857         return rc;
 858
 859  error:
 860         iwl_hw_txq_ctx_free(priv);
 861         return rc;
 862 }
 863
 864 int iwl_hw_nic_init(struct iwl_priv *priv)
 865 {
 866         u8 rev_id;
 867         int rc;
 868         unsigned long flags;
 869         struct iwl_rx_queue *rxq = &priv->rxq;
 870
 871         iwl_power_init_handle(priv);
 872
 873         spin_lock_irqsave(&priv->lock, flags);
 874         iwl_set_bit(priv, CSR_ANA_PLL_CFG, (1 << 24));
 875         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 876                     CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
 877
 878         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 879         rc = iwl_poll_bit(priv, CSR_GP_CNTRL,
 880                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 881                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 882         if (rc < 0) {
 883                 spin_unlock_irqrestore(&priv->lock, flags);
 884                 IWL_DEBUG_INFO("Failed to init the card\n");
 885                 return rc;
 886         }
 887
 888         rc = iwl_grab_restricted_access(priv);
 889         if (rc) {
 890                 spin_unlock_irqrestore(&priv->lock, flags);
 891                 return rc;
 892         }
 893         iwl_write_restricted_reg(priv, APMG_CLK_EN_REG,
 894                                  APMG_CLK_VAL_DMA_CLK_RQT |
 895                                  APMG_CLK_VAL_BSM_CLK_RQT);
 896         udelay(20);
 897         iwl_set_bits_restricted_reg(priv, APMG_PCIDEV_STT_REG,
 898                                     APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 899         iwl_release_restricted_access(priv);
 900         spin_unlock_irqrestore(&priv->lock, flags);
 901
 902         /* Determine HW type */
 903         rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
 904         if (rc)
 905                 return rc;
 906         IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
 907
 908         iwl3945_nic_set_pwr_src(priv, 1);
 909         spin_lock_irqsave(&priv->lock, flags);
 910
 911         if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
 912                 IWL_DEBUG_INFO("RTP type \n");
 913         else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
 914                 IWL_DEBUG_INFO("ALM-MB type\n");
 915                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 916                             CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MB);
 917         } else {
 918                 IWL_DEBUG_INFO("ALM-MM type\n");
 919                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 920                             CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MM);
 921         }
 922
 923         spin_unlock_irqrestore(&priv->lock, flags);
 924
 925         /* Initialize the EEPROM */
 926         rc = iwl_eeprom_init(priv);
 927         if (rc)
 928                 return rc;
 929
 930         spin_lock_irqsave(&priv->lock, flags);
 931         if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) {
 932                 IWL_DEBUG_INFO("SKU OP mode is mrc\n");
 933                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 934                             CSR_HW_IF_CONFIG_REG_BIT_SKU_MRC);
 935         } else
 936                 IWL_DEBUG_INFO("SKU OP mode is basic\n");
 937
 938         if ((priv->eeprom.board_revision & 0xF0) == 0xD0) {
 939                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
 940                                priv->eeprom.board_revision);
 941                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 942                             CSR_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
 943         } else {
 944                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
 945                                priv->eeprom.board_revision);
 946                 iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
 947                               CSR_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
 948         }
 949
 950         if (priv->eeprom.almgor_m_version <= 1) {
 951                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 952                             CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
 953                 IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
 954                                priv->eeprom.almgor_m_version);
 955         } else {
 956                 IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
 957                                priv->eeprom.almgor_m_version);
 958                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 959                             CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
 960         }
 961         spin_unlock_irqrestore(&priv->lock, flags);
 962
 963         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
 964                 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
 965
 966         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
 967                 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
 968
 969         /* Allocate the RX queue, or reset if it is already allocated */
 970         if (!rxq->bd) {
 971                 rc = iwl_rx_queue_alloc(priv);
 972                 if (rc) {
 973                         IWL_ERROR("Unable to initialize Rx queue\n");
 974                         return -ENOMEM;
 975                 }
 976         } else
 977                 iwl_rx_queue_reset(priv, rxq);
 978
 979         iwl_rx_replenish(priv);
 980
 981         iwl3945_rx_init(priv, rxq);
 982
 983         spin_lock_irqsave(&priv->lock, flags);
 984
 985         /* Look at using this instead:
 986         rxq->need_update = 1;
 987         iwl_rx_queue_update_write_ptr(priv, rxq);
 988         */
 989
 990         rc = iwl_grab_restricted_access(priv);
 991         if (rc) {
 992                 spin_unlock_irqrestore(&priv->lock, flags);
 993                 return rc;
 994         }
 995         iwl_write_restricted(priv, FH_RCSR_WPTR(0), rxq->write & ~7);
 996         iwl_release_restricted_access(priv);
 997
 998         spin_unlock_irqrestore(&priv->lock, flags);
 999
1000         rc = iwl3945_txq_ctx_reset(priv);
1001         if (rc)
1002                 return rc;
1003
1004         set_bit(STATUS_INIT, &priv->status);
1005
1006         return 0;
1007 }
1008
1009 /**
1010  * iwl_hw_txq_ctx_free - Free TXQ Context
1011  *
1012  * Destroy all TX DMA queues and structures
1013  */
1014 void iwl_hw_txq_ctx_free(struct iwl_priv *priv)
1015 {
1016         int txq_id;
1017
1018         /* Tx queues */
1019         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
1020                 iwl_tx_queue_free(priv, &priv->txq[txq_id]);
1021 }
1022
1023 void iwl_hw_txq_ctx_stop(struct iwl_priv *priv)
1024 {
1025         int queue;
1026         unsigned long flags;
1027
1028         spin_lock_irqsave(&priv->lock, flags);
1029         if (iwl_grab_restricted_access(priv)) {
1030                 spin_unlock_irqrestore(&priv->lock, flags);
1031                 iwl_hw_txq_ctx_free(priv);
1032                 return;
1033         }
1034
1035         /* stop SCD */
1036         iwl_write_restricted_reg(priv, SCD_MODE_REG, 0);
1037
1038         /* reset TFD queues */
1039         for (queue = TFD_QUEUE_MIN; queue < TFD_QUEUE_MAX; queue++) {
1040                 iwl_write_restricted(priv, FH_TCSR_CONFIG(queue), 0x0);
1041                 iwl_poll_restricted_bit(priv, FH_TSSR_TX_STATUS,
1042                                 ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(queue),
1043                                 1000);
1044         }
1045
1046         iwl_release_restricted_access(priv);
1047         spin_unlock_irqrestore(&priv->lock, flags);
1048
1049         iwl_hw_txq_ctx_free(priv);
1050 }
1051
1052 int iwl_hw_nic_stop_master(struct iwl_priv *priv)
1053 {
1054         int rc = 0;
1055         u32 reg_val;
1056         unsigned long flags;
1057
1058         spin_lock_irqsave(&priv->lock, flags);
1059
1060         /* set stop master bit */
1061         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1062
1063         reg_val = iwl_read32(priv, CSR_GP_CNTRL);
1064
1065         if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
1066             (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
1067                 IWL_DEBUG_INFO("Card in power save, master is already "
1068                                "stopped\n");
1069         else {
1070                 rc = iwl_poll_bit(priv, CSR_RESET,
1071                                   CSR_RESET_REG_FLAG_MASTER_DISABLED,
1072                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1073                 if (rc < 0) {
1074                         spin_unlock_irqrestore(&priv->lock, flags);
1075                         return rc;
1076                 }
1077         }
1078
1079         spin_unlock_irqrestore(&priv->lock, flags);
1080         IWL_DEBUG_INFO("stop master\n");
1081
1082         return rc;
1083 }
1084
1085 int iwl_hw_nic_reset(struct iwl_priv *priv)
1086 {
1087         int rc;
1088         unsigned long flags;
1089
1090         iwl_hw_nic_stop_master(priv);
1091
1092         spin_lock_irqsave(&priv->lock, flags);
1093
1094         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1095
1096         rc = iwl_poll_bit(priv, CSR_GP_CNTRL,
1097                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1098                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1099
1100         rc = iwl_grab_restricted_access(priv);
1101         if (!rc) {
1102                 iwl_write_restricted_reg(priv, APMG_CLK_CTRL_REG,
1103                                          APMG_CLK_VAL_BSM_CLK_RQT);
1104
1105                 udelay(10);
1106
1107                 iwl_set_bit(priv, CSR_GP_CNTRL,
1108                             CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1109
1110                 iwl_write_restricted_reg(priv, APMG_RTC_INT_MSK_REG, 0x0);
1111                 iwl_write_restricted_reg(priv, APMG_RTC_INT_STT_REG,
1112                                         0xFFFFFFFF);
1113
1114                 /* enable DMA */
1115                 iwl_write_restricted_reg(priv, APMG_CLK_EN_REG,
1116                                          APMG_CLK_VAL_DMA_CLK_RQT |
1117                                          APMG_CLK_VAL_BSM_CLK_RQT);
1118                 udelay(10);
1119
1120                 iwl_set_bits_restricted_reg(priv, APMG_PS_CTRL_REG,
1121                                 APMG_PS_CTRL_VAL_RESET_REQ);
1122                 udelay(5);
1123                 iwl_clear_bits_restricted_reg(priv, APMG_PS_CTRL_REG,
1124                                 APMG_PS_CTRL_VAL_RESET_REQ);
1125                 iwl_release_restricted_access(priv);
1126         }
1127
1128         /* Clear the 'host command active' bit... */
1129         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1130
1131         wake_up_interruptible(&priv->wait_command_queue);
1132         spin_unlock_irqrestore(&priv->lock, flags);
1133
1134         return rc;
1135 }
1136
1137 /**
1138  * iwl_hw_reg_adjust_power_by_temp - return index delta into power gain settings table
1139  */
1140 static int iwl_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1141 {
1142         return (new_reading - old_reading) * (-11) / 100;
1143 }
1144
1145 /**
1146  * iwl_hw_reg_temp_out_of_range - Keep temperature in sane range
1147  */
1148 static inline int iwl_hw_reg_temp_out_of_range(int temperature)
1149 {
1150         return (((temperature < -260) || (temperature > 25)) ? 1 : 0);
1151 }
1152
1153 int iwl_hw_get_temperature(struct iwl_priv *priv)
1154 {
1155         return iwl_read32(priv, CSR_UCODE_DRV_GP2);
1156 }
1157
1158 /**
1159  * iwl_hw_reg_txpower_get_temperature - get current temperature by reading from NIC
1160  */
1161 static int iwl_hw_reg_txpower_get_temperature(struct iwl_priv *priv)
1162 {
1163         int temperature;
1164
1165         temperature = iwl_hw_get_temperature(priv);
1166
1167         /* driver's okay range is -260 to +25.
1168          *   human readable okay range is 0 to +285 */
1169         IWL_DEBUG_INFO("Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1170
1171         /* handle insane temp reading */
1172         if (iwl_hw_reg_temp_out_of_range(temperature)) {
1173                 IWL_ERROR("Error bad temperature value  %d\n", temperature);
1174
1175                 /* if really really hot(?),
1176                  *   substitute the 3rd band/group's temp measured at factory */
1177                 if (priv->last_temperature > 100)
1178                         temperature = priv->eeprom.groups[2].temperature;
1179                 else /* else use most recent "sane" value from driver */
1180                         temperature = priv->last_temperature;
1181         }
1182
1183         return temperature;     /* raw, not "human readable" */
1184 }
1185
1186 /* Adjust Txpower only if temperature variance is greater than threshold.
1187  *
1188  * Both are lower than older versions' 9 degrees */
1189 #define IWL_TEMPERATURE_LIMIT_TIMER   6
1190
1191 /**
1192  * is_temp_calib_needed - determines if new calibration is needed
1193  *
1194  * records new temperature in tx_mgr->temperature.
1195  * replaces tx_mgr->last_temperature *only* if calib needed
1196  *    (assumes caller will actually do the calibration!). */
1197 static int is_temp_calib_needed(struct iwl_priv *priv)
1198 {
1199         int temp_diff;
1200
1201         priv->temperature = iwl_hw_reg_txpower_get_temperature(priv);
1202         temp_diff = priv->temperature - priv->last_temperature;
1203
1204         /* get absolute value */
1205         if (temp_diff < 0) {
1206                 IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff);
1207                 temp_diff = -temp_diff;
1208         } else if (temp_diff == 0)
1209                 IWL_DEBUG_POWER("Same temp,\n");
1210         else
1211                 IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff);
1212
1213         /* if we don't need calibration, *don't* update last_temperature */
1214         if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1215                 IWL_DEBUG_POWER("Timed thermal calib not needed\n");
1216                 return 0;
1217         }
1218
1219         IWL_DEBUG_POWER("Timed thermal calib needed\n");
1220
1221         /* assume that caller will actually do calib ...
1222          *   update the "last temperature" value */
1223         priv->last_temperature = priv->temperature;
1224         return 1;
1225 }
1226
1227 #define IWL_MAX_GAIN_ENTRIES 78
1228 #define IWL_CCK_FROM_OFDM_POWER_DIFF  -5
1229 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1230
1231 /* radio and DSP power table, each step is 1/2 dB.
1232  * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1233 static struct iwl_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1234         {
1235          {251, 127},            /* 2.4 GHz, highest power */
1236          {251, 127},
1237          {251, 127},
1238          {251, 127},
1239          {251, 125},
1240          {251, 110},
1241          {251, 105},
1242          {251, 98},
1243          {187, 125},
1244          {187, 115},
1245          {187, 108},
1246          {187, 99},
1247          {243, 119},
1248          {243, 111},
1249          {243, 105},
1250          {243, 97},
1251          {243, 92},
1252          {211, 106},
1253          {211, 100},
1254          {179, 120},
1255          {179, 113},
1256          {179, 107},
1257          {147, 125},
1258          {147, 119},
1259          {147, 112},
1260          {147, 106},
1261          {147, 101},
1262          {147, 97},
1263          {147, 91},
1264          {115, 107},
1265          {235, 121},
1266          {235, 115},
1267          {235, 109},
1268          {203, 127},
1269          {203, 121},
1270          {203, 115},
1271          {203, 108},
1272          {203, 102},
1273          {203, 96},
1274          {203, 92},
1275          {171, 110},
1276          {171, 104},
1277          {171, 98},
1278          {139, 116},
1279          {227, 125},
1280          {227, 119},
1281          {227, 113},
1282          {227, 107},
1283          {227, 101},
1284          {227, 96},
1285          {195, 113},
1286          {195, 106},
1287          {195, 102},
1288          {195, 95},
1289          {163, 113},
1290          {163, 106},
1291          {163, 102},
1292          {163, 95},
1293          {131, 113},
1294          {131, 106},
1295          {131, 102},
1296          {131, 95},
1297          {99, 113},
1298          {99, 106},
1299          {99, 102},
1300          {99, 95},
1301          {67, 113},
1302          {67, 106},
1303          {67, 102},
1304          {67, 95},
1305          {35, 113},
1306          {35, 106},
1307          {35, 102},
1308          {35, 95},
1309          {3, 113},
1310          {3, 106},
1311          {3, 102},
1312          {3, 95} },             /* 2.4 GHz, lowest power */
1313         {
1314          {251, 127},            /* 5.x GHz, highest power */
1315          {251, 120},
1316          {251, 114},
1317          {219, 119},
1318          {219, 101},
1319          {187, 113},
1320          {187, 102},
1321          {155, 114},
1322          {155, 103},
1323          {123, 117},
1324          {123, 107},
1325          {123, 99},
1326          {123, 92},
1327          {91, 108},
1328          {59, 125},
1329          {59, 118},
1330          {59, 109},
1331          {59, 102},
1332          {59, 96},
1333          {59, 90},
1334          {27, 104},
1335          {27, 98},
1336          {27, 92},
1337          {115, 118},
1338          {115, 111},
1339          {115, 104},
1340          {83, 126},
1341          {83, 121},
1342          {83, 113},
1343          {83, 105},
1344          {83, 99},
1345          {51, 118},
1346          {51, 111},
1347          {51, 104},
1348          {51, 98},
1349          {19, 116},
1350          {19, 109},
1351          {19, 102},
1352          {19, 98},
1353          {19, 93},
1354          {171, 113},
1355          {171, 107},
1356          {171, 99},
1357          {139, 120},
1358          {139, 113},
1359          {139, 107},
1360          {139, 99},
1361          {107, 120},
1362          {107, 113},
1363          {107, 107},
1364          {107, 99},
1365          {75, 120},
1366          {75, 113},
1367          {75, 107},
1368          {75, 99},
1369          {43, 120},
1370          {43, 113},
1371          {43, 107},
1372          {43, 99},
1373          {11, 120},
1374          {11, 113},
1375          {11, 107},
1376          {11, 99},
1377          {131, 107},
1378          {131, 99},
1379          {99, 120},
1380          {99, 113},
1381          {99, 107},
1382          {99, 99},
1383          {67, 120},
1384          {67, 113},
1385          {67, 107},
1386          {67, 99},
1387          {35, 120},
1388          {35, 113},
1389          {35, 107},
1390          {35, 99},
1391          {3, 120} }             /* 5.x GHz, lowest power */
1392 };
1393
1394 static inline u8 iwl_hw_reg_fix_power_index(int index)
1395 {
1396         if (index < 0)
1397                 return 0;
1398         if (index >= IWL_MAX_GAIN_ENTRIES)
1399                 return IWL_MAX_GAIN_ENTRIES - 1;
1400         return (u8) index;
1401 }
1402
1403 /* Kick off thermal recalibration check every 60 seconds */
1404 #define REG_RECALIB_PERIOD (60)
1405
1406 /**
1407  * iwl_hw_reg_set_scan_power - Set Tx power for scan probe requests
1408  *
1409  * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1410  * or 6 Mbit (OFDM) rates.
1411  */
1412 static void iwl_hw_reg_set_scan_power(struct iwl_priv *priv, u32 scan_tbl_index,
1413                                s32 rate_index, const s8 *clip_pwrs,
1414                                struct iwl_channel_info *ch_info,
1415                                int band_index)
1416 {
1417         struct iwl_scan_power_info *scan_power_info;
1418         s8 power;
1419         u8 power_index;
1420
1421         scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1422
1423         /* use this channel group's 6Mbit clipping/saturation pwr,
1424          *   but cap at regulatory scan power restriction (set during init
1425          *   based on eeprom channel data) for this channel.  */
1426         power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX]);
1427
1428         /* further limit to user's max power preference.
1429          * FIXME:  Other spectrum management power limitations do not
1430          *   seem to apply?? */
1431         power = min(power, priv->user_txpower_limit);
1432         scan_power_info->requested_power = power;
1433
1434         /* find difference between new scan *power* and current "normal"
1435          *   Tx *power* for 6Mb.  Use this difference (x2) to adjust the
1436          *   current "normal" temperature-compensated Tx power *index* for
1437          *   this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1438          *   *index*. */
1439         power_index = ch_info->power_info[rate_index].power_table_index
1440             - (power - ch_info->power_info
1441                [IWL_RATE_6M_INDEX].requested_power) * 2;
1442
1443         /* store reference index that we use when adjusting *all* scan
1444          *   powers.  So we can accommodate user (all channel) or spectrum
1445          *   management (single channel) power changes "between" temperature
1446          *   feedback compensation procedures.
1447          * don't force fit this reference index into gain table; it may be a
1448          *   negative number.  This will help avoid errors when we're at
1449          *   the lower bounds (highest gains, for warmest temperatures)
1450          *   of the table. */
1451
1452         /* don't exceed table bounds for "real" setting */
1453         power_index = iwl_hw_reg_fix_power_index(power_index);
1454
1455         scan_power_info->power_table_index = power_index;
1456         scan_power_info->tpc.tx_gain =
1457             power_gain_table[band_index][power_index].tx_gain;
1458         scan_power_info->tpc.dsp_atten =
1459             power_gain_table[band_index][power_index].dsp_atten;
1460 }
1461
1462 /**
1463  * iwl_hw_reg_send_txpower - fill in Tx Power command with gain settings
1464  *
1465  * Configures power settings for all rates for the current channel,
1466  * using values from channel info struct, and send to NIC
1467  */
1468 int iwl_hw_reg_send_txpower(struct iwl_priv *priv)
1469 {
1470         int rate_idx;
1471         const struct iwl_channel_info *ch_info = NULL;
1472         struct iwl_txpowertable_cmd txpower = {
1473                 .channel = priv->active_rxon.channel,
1474         };
1475
1476         txpower.band = (priv->phymode == MODE_IEEE80211A) ? 0 : 1;
1477         ch_info = iwl_get_channel_info(priv,
1478                                        priv->phymode,
1479                                        le16_to_cpu(priv->active_rxon.channel));
1480         if (!ch_info) {
1481                 IWL_ERROR
1482                     ("Failed to get channel info for channel %d [%d]\n",
1483                      le16_to_cpu(priv->active_rxon.channel), priv->phymode);
1484                 return -EINVAL;
1485         }
1486
1487         if (!is_channel_valid(ch_info)) {
1488                 IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
1489                                 "non-Tx channel.\n");
1490                 return 0;
1491         }
1492
1493         /* fill cmd with power settings for all rates for current channel */
1494         for (rate_idx = 0; rate_idx < IWL_RATE_COUNT; rate_idx++) {
1495                 txpower.power[rate_idx].tpc = ch_info->power_info[rate_idx].tpc;
1496                 txpower.power[rate_idx].rate = iwl_rates[rate_idx].plcp;
1497
1498                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1499                                 le16_to_cpu(txpower.channel),
1500                                 txpower.band,
1501                                 txpower.power[rate_idx].tpc.tx_gain,
1502                                 txpower.power[rate_idx].tpc.dsp_atten,
1503                                 txpower.power[rate_idx].rate);
1504         }
1505
1506         return iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1507                                 sizeof(struct iwl_txpowertable_cmd), &txpower);
1508
1509 }
1510
1511 /**
1512  * iwl_hw_reg_set_new_power - Configures power tables at new levels
1513  * @ch_info: Channel to update.  Uses power_info.requested_power.
1514  *
1515  * Replace requested_power and base_power_index ch_info fields for
1516  * one channel.
1517  *
1518  * Called if user or spectrum management changes power preferences.
1519  * Takes into account h/w and modulation limitations (clip power).
1520  *
1521  * This does *not* send anything to NIC, just sets up ch_info for one channel.
1522  *
1523  * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1524  *       properly fill out the scan powers, and actual h/w gain settings,
1525  *       and send changes to NIC
1526  */
1527 static int iwl_hw_reg_set_new_power(struct iwl_priv *priv,
1528                              struct iwl_channel_info *ch_info)
1529 {
1530         struct iwl_channel_power_info *power_info;
1531         int power_changed = 0;
1532         int i;
1533         const s8 *clip_pwrs;
1534         int power;
1535
1536         /* Get this chnlgrp's rate-to-max/clip-powers table */
1537         clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1538
1539         /* Get this channel's rate-to-current-power settings table */
1540         power_info = ch_info->power_info;
1541
1542         /* update OFDM Txpower settings */
1543         for (i = IWL_FIRST_OFDM_RATE; i <= IWL_LAST_OFDM_RATE;
1544              i++, ++power_info) {
1545                 int delta_idx;
1546
1547                 /* limit new power to be no more than h/w capability */
1548                 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1549                 if (power == power_info->requested_power)
1550                         continue;
1551
1552                 /* find difference between old and new requested powers,
1553                  *    update base (non-temp-compensated) power index */
1554                 delta_idx = (power - power_info->requested_power) * 2;
1555                 power_info->base_power_index -= delta_idx;
1556
1557                 /* save new requested power value */
1558                 power_info->requested_power = power;
1559
1560                 power_changed = 1;
1561         }
1562
1563         /* update CCK Txpower settings, based on OFDM 12M setting ...
1564          *    ... all CCK power settings for a given channel are the *same*. */
1565         if (power_changed) {
1566                 power =
1567                     ch_info->power_info[IWL_RATE_12M_INDEX].
1568                     requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1569
1570                 /* do all CCK rates' iwl_channel_power_info structures */
1571                 for (i = IWL_FIRST_CCK_RATE; i <= IWL_LAST_CCK_RATE; i++) {
1572                         power_info->requested_power = power;
1573                         power_info->base_power_index =
1574                             ch_info->power_info[IWL_RATE_12M_INDEX].
1575                             base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1576                         ++power_info;
1577                 }
1578         }
1579
1580         return 0;
1581 }
1582
1583 /**
1584  * iwl_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1585  *
1586  * NOTE: Returned power limit may be less (but not more) than requested,
1587  *       based strictly on regulatory (eeprom and spectrum mgt) limitations
1588  *       (no consideration for h/w clipping limitations).
1589  */
1590 static int iwl_hw_reg_get_ch_txpower_limit(struct iwl_channel_info *ch_info)
1591 {
1592         s8 max_power;
1593
1594 #if 0
1595         /* if we're using TGd limits, use lower of TGd or EEPROM */
1596         if (ch_info->tgd_data.max_power != 0)
1597                 max_power = min(ch_info->tgd_data.max_power,
1598                                 ch_info->eeprom.max_power_avg);
1599
1600         /* else just use EEPROM limits */
1601         else
1602 #endif
1603                 max_power = ch_info->eeprom.max_power_avg;
1604
1605         return min(max_power, ch_info->max_power_avg);
1606 }
1607
1608 /**
1609  * iwl_hw_reg_comp_txpower_temp - Compensate for temperature
1610  *
1611  * Compensate txpower settings of *all* channels for temperature.
1612  * This only accounts for the difference between current temperature
1613  *   and the factory calibration temperatures, and bases the new settings
1614  *   on the channel's base_power_index.
1615  *
1616  * If RxOn is "associated", this sends the new Txpower to NIC!
1617  */
1618 static int iwl_hw_reg_comp_txpower_temp(struct iwl_priv *priv)
1619 {
1620         struct iwl_channel_info *ch_info = NULL;
1621         int delta_index;
1622         const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1623         u8 a_band;
1624         u8 rate_index;
1625         u8 scan_tbl_index;
1626         u8 i;
1627         int ref_temp;
1628         int temperature = priv->temperature;
1629
1630         /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1631         for (i = 0; i < priv->channel_count; i++) {
1632                 ch_info = &priv->channel_info[i];
1633                 a_band = is_channel_a_band(ch_info);
1634
1635                 /* Get this chnlgrp's factory calibration temperature */
1636                 ref_temp = (s16)priv->eeprom.groups[ch_info->group_index].
1637                     temperature;
1638
1639                 /* get power index adjustment based on curr and factory
1640                  * temps */
1641                 delta_index = iwl_hw_reg_adjust_power_by_temp(temperature,
1642                                                               ref_temp);
1643
1644                 /* set tx power value for all rates, OFDM and CCK */
1645                 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
1646                      rate_index++) {
1647                         int power_idx =
1648                             ch_info->power_info[rate_index].base_power_index;
1649
1650                         /* temperature compensate */
1651                         power_idx += delta_index;
1652
1653                         /* stay within table range */
1654                         power_idx = iwl_hw_reg_fix_power_index(power_idx);
1655                         ch_info->power_info[rate_index].
1656                             power_table_index = (u8) power_idx;
1657                         ch_info->power_info[rate_index].tpc =
1658                             power_gain_table[a_band][power_idx];
1659                 }
1660
1661                 /* Get this chnlgrp's rate-to-max/clip-powers table */
1662                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1663
1664                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1665                 for (scan_tbl_index = 0;
1666                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
1667                         s32 actual_index = (scan_tbl_index == 0) ?
1668                             IWL_RATE_1M_INDEX : IWL_RATE_6M_INDEX;
1669                         iwl_hw_reg_set_scan_power(priv, scan_tbl_index,
1670                                            actual_index, clip_pwrs,
1671                                            ch_info, a_band);
1672                 }
1673         }
1674
1675         /* send Txpower command for current channel to ucode */
1676         return iwl_hw_reg_send_txpower(priv);
1677 }
1678
1679 int iwl_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
1680 {
1681         struct iwl_channel_info *ch_info;
1682         s8 max_power;
1683         u8 a_band;
1684         u8 i;
1685
1686         if (priv->user_txpower_limit == power) {
1687                 IWL_DEBUG_POWER("Requested Tx power same as current "
1688                                 "limit: %ddBm.\n", power);
1689                 return 0;
1690         }
1691
1692         IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power);
1693         priv->user_txpower_limit = power;
1694
1695         /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1696
1697         for (i = 0; i < priv->channel_count; i++) {
1698                 ch_info = &priv->channel_info[i];
1699                 a_band = is_channel_a_band(ch_info);
1700
1701                 /* find minimum power of all user and regulatory constraints
1702                  *    (does not consider h/w clipping limitations) */
1703                 max_power = iwl_hw_reg_get_ch_txpower_limit(ch_info);
1704                 max_power = min(power, max_power);
1705                 if (max_power != ch_info->curr_txpow) {
1706                         ch_info->curr_txpow = max_power;
1707
1708                         /* this considers the h/w clipping limitations */
1709                         iwl_hw_reg_set_new_power(priv, ch_info);
1710                 }
1711         }
1712
1713         /* update txpower settings for all channels,
1714          *   send to NIC if associated. */
1715         is_temp_calib_needed(priv);
1716         iwl_hw_reg_comp_txpower_temp(priv);
1717
1718         return 0;
1719 }
1720
1721 /* will add 3945 channel switch cmd handling later */
1722 int iwl_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1723 {
1724         return 0;
1725 }
1726
1727 /**
1728  * iwl3945_reg_txpower_periodic -  called when time to check our temperature.
1729  *
1730  * -- reset periodic timer
1731  * -- see if temp has changed enough to warrant re-calibration ... if so:
1732  *     -- correct coeffs for temp (can reset temp timer)
1733  *     -- save this temp as "last",
1734  *     -- send new set of gain settings to NIC
1735  * NOTE:  This should continue working, even when we're not associated,
1736  *   so we can keep our internal table of scan powers current. */
1737 void iwl3945_reg_txpower_periodic(struct iwl_priv *priv)
1738 {
1739         /* This will kick in the "brute force"
1740          * iwl_hw_reg_comp_txpower_temp() below */
1741         if (!is_temp_calib_needed(priv))
1742                 goto reschedule;
1743
1744         /* Set up a new set of temp-adjusted TxPowers, send to NIC.
1745          * This is based *only* on current temperature,
1746          * ignoring any previous power measurements */
1747         iwl_hw_reg_comp_txpower_temp(priv);
1748
1749  reschedule:
1750         queue_delayed_work(priv->workqueue,
1751                            &priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
1752 }
1753
1754 void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
1755 {
1756         struct iwl_priv *priv = container_of(work, struct iwl_priv,
1757                                              thermal_periodic.work);
1758
1759         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1760                 return;
1761
1762         mutex_lock(&priv->mutex);
1763         iwl3945_reg_txpower_periodic(priv);
1764         mutex_unlock(&priv->mutex);
1765 }
1766
1767 /**
1768  * iwl_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
1769  *                                 for the channel.
1770  *
1771  * This function is used when initializing channel-info structs.
1772  *
1773  * NOTE: These channel groups do *NOT* match the bands above!
1774  *       These channel groups are based on factory-tested channels;
1775  *       on A-band, EEPROM's "group frequency" entries represent the top
1776  *       channel in each group 1-4.  Group 5 All B/G channels are in group 0.
1777  */
1778 static u16 iwl_hw_reg_get_ch_grp_index(struct iwl_priv *priv,
1779                                        const struct iwl_channel_info *ch_info)
1780 {
1781         struct iwl_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0];
1782         u8 group;
1783         u16 group_index = 0;    /* based on factory calib frequencies */
1784         u8 grp_channel;
1785
1786         /* Find the group index for the channel ... don't use index 1(?) */
1787         if (is_channel_a_band(ch_info)) {
1788                 for (group = 1; group < 5; group++) {
1789                         grp_channel = ch_grp[group].group_channel;
1790                         if (ch_info->channel <= grp_channel) {
1791                                 group_index = group;
1792                                 break;
1793                         }
1794                 }
1795                 /* group 4 has a few channels *above* its factory cal freq */
1796                 if (group == 5)
1797                         group_index = 4;
1798         } else
1799                 group_index = 0;        /* 2.4 GHz, group 0 */
1800
1801         IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
1802                         group_index);
1803         return group_index;
1804 }
1805
1806 /**
1807  * iwl_hw_reg_get_matched_power_index - Interpolate to get nominal index
1808  *
1809  * Interpolate to get nominal (i.e. at factory calibration temperature) index
1810  *   into radio/DSP gain settings table for requested power.
1811  */
1812 static int iwl_hw_reg_get_matched_power_index(struct iwl_priv *priv,
1813                                        s8 requested_power,
1814                                        s32 setting_index, s32 *new_index)
1815 {
1816         const struct iwl_eeprom_txpower_group *chnl_grp = NULL;
1817         s32 index0, index1;
1818         s32 power = 2 * requested_power;
1819         s32 i;
1820         const struct iwl_eeprom_txpower_sample *samples;
1821         s32 gains0, gains1;
1822         s32 res;
1823         s32 denominator;
1824
1825         chnl_grp = &priv->eeprom.groups[setting_index];
1826         samples = chnl_grp->samples;
1827         for (i = 0; i < 5; i++) {
1828                 if (power == samples[i].power) {
1829                         *new_index = samples[i].gain_index;
1830                         return 0;
1831                 }
1832         }
1833
1834         if (power > samples[1].power) {
1835                 index0 = 0;
1836                 index1 = 1;
1837         } else if (power > samples[2].power) {
1838                 index0 = 1;
1839                 index1 = 2;
1840         } else if (power > samples[3].power) {
1841                 index0 = 2;
1842                 index1 = 3;
1843         } else {
1844                 index0 = 3;
1845                 index1 = 4;
1846         }
1847
1848         denominator = (s32) samples[index1].power - (s32) samples[index0].power;
1849         if (denominator == 0)
1850                 return -EINVAL;
1851         gains0 = (s32) samples[index0].gain_index * (1 << 19);
1852         gains1 = (s32) samples[index1].gain_index * (1 << 19);
1853         res = gains0 + (gains1 - gains0) *
1854             ((s32) power - (s32) samples[index0].power) / denominator +
1855             (1 << 18);
1856         *new_index = res >> 19;
1857         return 0;
1858 }
1859
1860 static void iwl_hw_reg_init_channel_groups(struct iwl_priv *priv)
1861 {
1862         u32 i;
1863         s32 rate_index;
1864         const struct iwl_eeprom_txpower_group *group;
1865
1866         IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
1867
1868         for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
1869                 s8 *clip_pwrs;  /* table of power levels for each rate */
1870                 s8 satur_pwr;   /* saturation power for each chnl group */
1871                 group = &priv->eeprom.groups[i];
1872
1873                 /* sanity check on factory saturation power value */
1874                 if (group->saturation_power < 40) {
1875                         IWL_WARNING("Error: saturation power is %d, "
1876                                     "less than minimum expected 40\n",
1877                                     group->saturation_power);
1878                         return;
1879                 }
1880
1881                 /*
1882                  * Derive requested power levels for each rate, based on
1883                  *   hardware capabilities (saturation power for band).
1884                  * Basic value is 3dB down from saturation, with further
1885                  *   power reductions for highest 3 data rates.  These
1886                  *   backoffs provide headroom for high rate modulation
1887                  *   power peaks, without too much distortion (clipping).
1888                  */
1889                 /* we'll fill in this array with h/w max power levels */
1890                 clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers;
1891
1892                 /* divide factory saturation power by 2 to find -3dB level */
1893                 satur_pwr = (s8) (group->saturation_power >> 1);
1894
1895                 /* fill in channel group's nominal powers for each rate */
1896                 for (rate_index = 0;
1897                      rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
1898                         switch (rate_index) {
1899                         case IWL_RATE_36M_INDEX:
1900                                 if (i == 0)     /* B/G */
1901                                         *clip_pwrs = satur_pwr;
1902                                 else    /* A */
1903                                         *clip_pwrs = satur_pwr - 5;
1904                                 break;
1905                         case IWL_RATE_48M_INDEX:
1906                                 if (i == 0)
1907                                         *clip_pwrs = satur_pwr - 7;
1908                                 else
1909                                         *clip_pwrs = satur_pwr - 10;
1910                                 break;
1911                         case IWL_RATE_54M_INDEX:
1912                                 if (i == 0)
1913                                         *clip_pwrs = satur_pwr - 9;
1914                                 else
1915                                         *clip_pwrs = satur_pwr - 12;
1916                                 break;
1917                         default:
1918                                 *clip_pwrs = satur_pwr;
1919                                 break;
1920                         }
1921                 }
1922         }
1923 }
1924
1925 /**
1926  * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
1927  *
1928  * Second pass (during init) to set up priv->channel_info
1929  *
1930  * Set up Tx-power settings in our channel info database for each VALID
1931  * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
1932  * and current temperature.
1933  *
1934  * Since this is based on current temperature (at init time), these values may
1935  * not be valid for very long, but it gives us a starting/default point,
1936  * and allows us to active (i.e. using Tx) scan.
1937  *
1938  * This does *not* write values to NIC, just sets up our internal table.
1939  */
1940 int iwl3945_txpower_set_from_eeprom(struct iwl_priv *priv)
1941 {
1942         struct iwl_channel_info *ch_info = NULL;
1943         struct iwl_channel_power_info *pwr_info;
1944         int delta_index;
1945         u8 rate_index;
1946         u8 scan_tbl_index;
1947         const s8 *clip_pwrs;    /* array of power levels for each rate */
1948         u8 gain, dsp_atten;
1949         s8 power;
1950         u8 pwr_index, base_pwr_index, a_band;
1951         u8 i;
1952         int temperature;
1953
1954         /* save temperature reference,
1955          *   so we can determine next time to calibrate */
1956         temperature = iwl_hw_reg_txpower_get_temperature(priv);
1957         priv->last_temperature = temperature;
1958
1959         iwl_hw_reg_init_channel_groups(priv);
1960
1961         /* initialize Tx power info for each and every channel, 2.4 and 5.x */
1962         for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
1963              i++, ch_info++) {
1964                 a_band = is_channel_a_band(ch_info);
1965                 if (!is_channel_valid(ch_info))
1966                         continue;
1967
1968                 /* find this channel's channel group (*not* "band") index */
1969                 ch_info->group_index =
1970                         iwl_hw_reg_get_ch_grp_index(priv, ch_info);
1971
1972                 /* Get this chnlgrp's rate->max/clip-powers table */
1973                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1974
1975                 /* calculate power index *adjustment* value according to
1976                  *  diff between current temperature and factory temperature */
1977                 delta_index = iwl_hw_reg_adjust_power_by_temp(temperature,
1978                                 priv->eeprom.groups[ch_info->group_index].
1979                                 temperature);
1980
1981                 IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
1982                                 ch_info->channel, delta_index, temperature +
1983                                 IWL_TEMP_CONVERT);
1984
1985                 /* set tx power value for all OFDM rates */
1986                 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
1987                      rate_index++) {
1988                         s32 power_idx;
1989                         int rc;
1990
1991                         /* use channel group's clip-power table,
1992                          *   but don't exceed channel's max power */
1993                         s8 pwr = min(ch_info->max_power_avg,
1994                                      clip_pwrs[rate_index]);
1995
1996                         pwr_info = &ch_info->power_info[rate_index];
1997
1998                         /* get base (i.e. at factory-measured temperature)
1999                          *    power table index for this rate's power */
2000                         rc = iwl_hw_reg_get_matched_power_index(priv, pwr,
2001                                                          ch_info->group_index,
2002                                                          &power_idx);
2003                         if (rc) {
2004                                 IWL_ERROR("Invalid power index\n");
2005                                 return rc;
2006                         }
2007                         pwr_info->base_power_index = (u8) power_idx;
2008
2009                         /* temperature compensate */
2010                         power_idx += delta_index;
2011
2012                         /* stay within range of gain table */
2013                         power_idx = iwl_hw_reg_fix_power_index(power_idx);
2014
2015                         /* fill 1 OFDM rate's iwl_channel_power_info struct */
2016                         pwr_info->requested_power = pwr;
2017                         pwr_info->power_table_index = (u8) power_idx;
2018                         pwr_info->tpc.tx_gain =
2019                             power_gain_table[a_band][power_idx].tx_gain;
2020                         pwr_info->tpc.dsp_atten =
2021                             power_gain_table[a_band][power_idx].dsp_atten;
2022                 }
2023
2024                 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2025                 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX];
2026                 power = pwr_info->requested_power +
2027                         IWL_CCK_FROM_OFDM_POWER_DIFF;
2028                 pwr_index = pwr_info->power_table_index +
2029                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2030                 base_pwr_index = pwr_info->base_power_index +
2031                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2032
2033                 /* stay within table range */
2034                 pwr_index = iwl_hw_reg_fix_power_index(pwr_index);
2035                 gain = power_gain_table[a_band][pwr_index].tx_gain;
2036                 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2037
2038                 /* fill each CCK rate's iwl_channel_power_info structure
2039                  * NOTE:  All CCK-rate Txpwrs are the same for a given chnl!
2040                  * NOTE:  CCK rates start at end of OFDM rates! */
2041                 for (rate_index = IWL_OFDM_RATES;
2042                      rate_index < IWL_RATE_COUNT; rate_index++) {
2043                         pwr_info = &ch_info->power_info[rate_index];
2044                         pwr_info->requested_power = power;
2045                         pwr_info->power_table_index = pwr_index;
2046                         pwr_info->base_power_index = base_pwr_index;
2047                         pwr_info->tpc.tx_gain = gain;
2048                         pwr_info->tpc.dsp_atten = dsp_atten;
2049                 }
2050
2051                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2052                 for (scan_tbl_index = 0;
2053                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2054                         s32 actual_index = (scan_tbl_index == 0) ?
2055                                 IWL_RATE_1M_INDEX : IWL_RATE_6M_INDEX;
2056                         iwl_hw_reg_set_scan_power(priv, scan_tbl_index,
2057                                 actual_index, clip_pwrs, ch_info, a_band);
2058                 }
2059         }
2060
2061         return 0;
2062 }
2063
2064 int iwl_hw_rxq_stop(struct iwl_priv *priv)
2065 {
2066         int rc;
2067         unsigned long flags;
2068
2069         spin_lock_irqsave(&priv->lock, flags);
2070         rc = iwl_grab_restricted_access(priv);
2071         if (rc) {
2072                 spin_unlock_irqrestore(&priv->lock, flags);
2073                 return rc;
2074         }
2075
2076         iwl_write_restricted(priv, FH_RCSR_CONFIG(0), 0);
2077         rc = iwl_poll_restricted_bit(priv, FH_RSSR_STATUS, (1 << 24), 1000);
2078         if (rc < 0)
2079                 IWL_ERROR("Can't stop Rx DMA.\n");
2080
2081         iwl_release_restricted_access(priv);
2082         spin_unlock_irqrestore(&priv->lock, flags);
2083
2084         return 0;
2085 }
2086
2087 int iwl_hw_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq)
2088 {
2089         int rc;
2090         unsigned long flags;
2091         int txq_id = txq->q.id;
2092
2093         struct iwl_shared *shared_data = priv->hw_setting.shared_virt;
2094
2095         shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2096
2097         spin_lock_irqsave(&priv->lock, flags);
2098         rc = iwl_grab_restricted_access(priv);
2099         if (rc) {
2100                 spin_unlock_irqrestore(&priv->lock, flags);
2101                 return rc;
2102         }
2103         iwl_write_restricted(priv, FH_CBCC_CTRL(txq_id), 0);
2104         iwl_write_restricted(priv, FH_CBCC_BASE(txq_id), 0);
2105
2106         iwl_write_restricted(priv, FH_TCSR_CONFIG(txq_id),
2107                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2108                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2109                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2110                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2111                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2112         iwl_release_restricted_access(priv);
2113
2114         /* fake read to flush all prev. writes */
2115         iwl_read32(priv, FH_TSSR_CBB_BASE);
2116         spin_unlock_irqrestore(&priv->lock, flags);
2117
2118         return 0;
2119 }
2120
2121 int iwl_hw_get_rx_read(struct iwl_priv *priv)
2122 {
2123         struct iwl_shared *shared_data = priv->hw_setting.shared_virt;
2124
2125         return le32_to_cpu(shared_data->rx_read_ptr[0]);
2126 }
2127
2128 /**
2129  * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2130  */
2131 int iwl3945_init_hw_rate_table(struct iwl_priv *priv)
2132 {
2133         int rc, i;
2134         struct iwl_rate_scaling_cmd rate_cmd = {
2135                 .reserved = {0, 0, 0},
2136         };
2137         struct iwl_rate_scaling_info *table = rate_cmd.table;
2138
2139         for (i = 0; i < ARRAY_SIZE(iwl_rates); i++) {
2140                 table[i].rate_n_flags =
2141                         iwl_hw_set_rate_n_flags(iwl_rates[i].plcp, 0);
2142                 table[i].try_cnt = priv->retry_rate;
2143                 table[i].next_rate_index = iwl_get_prev_ieee_rate(i);
2144         }
2145
2146         switch (priv->phymode) {
2147         case MODE_IEEE80211A:
2148                 IWL_DEBUG_RATE("Select A mode rate scale\n");
2149                 /* If one of the following CCK rates is used,
2150                  * have it fall back to the 6M OFDM rate */
2151                 for (i = IWL_FIRST_CCK_RATE; i <= IWL_LAST_CCK_RATE; i++)
2152                         table[i].next_rate_index = IWL_FIRST_OFDM_RATE;
2153
2154                 /* Don't fall back to CCK rates */
2155                 table[IWL_RATE_12M_INDEX].next_rate_index = IWL_RATE_9M_INDEX;
2156
2157                 /* Don't drop out of OFDM rates */
2158                 table[IWL_FIRST_OFDM_RATE].next_rate_index =
2159                     IWL_FIRST_OFDM_RATE;
2160                 break;
2161
2162         case MODE_IEEE80211B:
2163                 IWL_DEBUG_RATE("Select B mode rate scale\n");
2164                 /* If an OFDM rate is used, have it fall back to the
2165                  * 1M CCK rates */
2166                 for (i = IWL_FIRST_OFDM_RATE; i <= IWL_LAST_OFDM_RATE; i++)
2167                         table[i].next_rate_index = IWL_FIRST_CCK_RATE;
2168
2169                 /* CCK shouldn't fall back to OFDM... */
2170                 table[IWL_RATE_11M_INDEX].next_rate_index = IWL_RATE_5M_INDEX;
2171                 break;
2172
2173         default:
2174                 IWL_DEBUG_RATE("Select G mode rate scale\n");
2175                 break;
2176         }
2177
2178         /* Update the rate scaling for control frame Tx */
2179         rate_cmd.table_id = 0;
2180         rc = iwl_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2181                               &rate_cmd);
2182         if (rc)
2183                 return rc;
2184
2185         /* Update the rate scaling for data frame Tx */
2186         rate_cmd.table_id = 1;
2187         return iwl_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2188                                 &rate_cmd);
2189 }
2190
2191 int iwl_hw_set_hw_setting(struct iwl_priv *priv)
2192 {
2193         memset((void *)&priv->hw_setting, 0,
2194                sizeof(struct iwl_driver_hw_info));
2195
2196         priv->hw_setting.shared_virt =
2197             pci_alloc_consistent(priv->pci_dev,
2198                                  sizeof(struct iwl_shared),
2199                                  &priv->hw_setting.shared_phys);
2200
2201         if (!priv->hw_setting.shared_virt) {
2202                 IWL_ERROR("failed to allocate pci memory\n");
2203                 mutex_unlock(&priv->mutex);
2204                 return -ENOMEM;
2205         }
2206
2207         priv->hw_setting.ac_queue_count = AC_NUM;
2208         priv->hw_setting.rx_buffer_size = IWL_RX_BUF_SIZE;
2209         priv->hw_setting.tx_cmd_len = sizeof(struct iwl_tx_cmd);
2210         priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
2211         priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
2212         priv->hw_setting.cck_flag = 0;
2213         priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
2214         priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
2215         return 0;
2216 }
2217
2218 unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
2219                           struct iwl_frame *frame, u8 rate)
2220 {
2221         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
2222         unsigned int frame_size;
2223
2224         tx_beacon_cmd = (struct iwl_tx_beacon_cmd *)&frame->u;
2225         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2226
2227         tx_beacon_cmd->tx.sta_id = IWL3945_BROADCAST_ID;
2228         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2229
2230         frame_size = iwl_fill_beacon_frame(priv,
2231                                 tx_beacon_cmd->frame,
2232                                 BROADCAST_ADDR,
2233                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2234
2235         BUG_ON(frame_size > MAX_MPDU_SIZE);
2236         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2237
2238         tx_beacon_cmd->tx.rate = rate;
2239         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2240                                       TX_CMD_FLG_TSF_MSK);
2241
2242         /* supp_rates[0] == OFDM  */
2243         tx_beacon_cmd->tx.supp_rates[0] = IWL_OFDM_BASIC_RATES_MASK;
2244
2245         /* supp_rates[1] == CCK
2246          *
2247          * NOTE:  IWL_*_RATES_MASK are not in the order that supp_rates
2248          * expects so we have to shift them around.
2249          *
2250          * supp_rates expects:
2251          * CCK rates are bit0..3
2252          *
2253          * However IWL_*_RATES_MASK has:
2254          * CCK rates are bit8..11
2255          */
2256         tx_beacon_cmd->tx.supp_rates[1] =
2257                 (IWL_CCK_BASIC_RATES_MASK >> 8) & 0xF;
2258
2259         return (sizeof(struct iwl_tx_beacon_cmd) + frame_size);
2260 }
2261
2262 void iwl_hw_rx_handler_setup(struct iwl_priv *priv)
2263 {
2264         priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2265 }
2266
2267 void iwl_hw_setup_deferred_work(struct iwl_priv *priv)
2268 {
2269         INIT_DELAYED_WORK(&priv->thermal_periodic,
2270                           iwl3945_bg_reg_txpower_periodic);
2271 }
2272
2273 void iwl_hw_cancel_deferred_work(struct iwl_priv *priv)
2274 {
2275         cancel_delayed_work(&priv->thermal_periodic);
2276 }
2277
2278 struct pci_device_id iwl_hw_card_ids[] = {
2279         {0x8086, 0x4222, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2280         {0x8086, 0x4227, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2281         {0}
2282 };
2283
2284 inline int iwl_eeprom_aqcuire_semaphore(struct iwl_priv *priv)
2285 {
2286         _iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
2287         return 0;
2288 }
2289
2290 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);