drivers/net/usb/smsc95xx.c

   1  /***************************************************************************
   2  *
   3  * Copyright (C) 2007-2008 SMSC
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License
   7  * as published by the Free Software Foundation; either version 2
   8  * of the License, or (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  18  *
  19  *****************************************************************************/
  20
  21 #include <linux/module.h>
  22 #include <linux/kmod.h>
  23 #include <linux/init.h>
  24 #include <linux/netdevice.h>
  25 #include <linux/etherdevice.h>
  26 #include <linux/ethtool.h>
  27 #include <linux/mii.h>
  28 #include <linux/usb.h>
  29 #include <linux/crc32.h>
  30 #include <linux/usb/usbnet.h>
  31 #include "smsc95xx.h"
  32
  33 #define SMSC_CHIPNAME                   "smsc95xx"
  34 #define SMSC_DRIVER_VERSION             "1.0.4"
  35 #define HS_USB_PKT_SIZE                 (512)
  36 #define FS_USB_PKT_SIZE                 (64)
  37 #define DEFAULT_HS_BURST_CAP_SIZE       (16 * 1024 + 5 * HS_USB_PKT_SIZE)
  38 #define DEFAULT_FS_BURST_CAP_SIZE       (6 * 1024 + 33 * FS_USB_PKT_SIZE)
  39 #define DEFAULT_BULK_IN_DELAY           (0x00002000)
  40 #define MAX_SINGLE_PACKET_SIZE          (2048)
  41 #define LAN95XX_EEPROM_MAGIC            (0x9500)
  42 #define EEPROM_MAC_OFFSET               (0x01)
  43 #define DEFAULT_TX_CSUM_ENABLE          (true)
  44 #define DEFAULT_RX_CSUM_ENABLE          (true)
  45 #define SMSC95XX_INTERNAL_PHY_ID        (1)
  46 #define SMSC95XX_TX_OVERHEAD            (8)
  47 #define SMSC95XX_TX_OVERHEAD_CSUM       (12)
  48
  49 struct smsc95xx_priv {
  50         u32 mac_cr;
  51         spinlock_t mac_cr_lock;
  52         bool use_tx_csum;
  53         bool use_rx_csum;
  54 };
  55
  56 struct usb_context {
  57         struct usb_ctrlrequest req;
  58         struct completion notify;
  59         struct usbnet *dev;
  60 };
  61
  62 int turbo_mode = true;
  63 module_param(turbo_mode, bool, 0644);
  64 MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
  65
  66 static int smsc95xx_read_reg(struct usbnet *dev, u32 index, u32 *data)
  67 {
  68         u32 *buf = kmalloc(4, GFP_KERNEL);
  69         int ret;
  70
  71         BUG_ON(!dev);
  72
  73         if (!buf)
  74                 return -ENOMEM;
  75
  76         ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
  77                 USB_VENDOR_REQUEST_READ_REGISTER,
  78                 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  79                 00, index, buf, 4, USB_CTRL_GET_TIMEOUT);
  80
  81         if (unlikely(ret < 0))
  82                 devwarn(dev, "Failed to read register index 0x%08x", index);
  83
  84         le32_to_cpus(buf);
  85         *data = *buf;
  86         kfree(buf);
  87
  88         return ret;
  89 }
  90
  91 static int smsc95xx_write_reg(struct usbnet *dev, u32 index, u32 data)
  92 {
  93         u32 *buf = kmalloc(4, GFP_KERNEL);
  94         int ret;
  95
  96         BUG_ON(!dev);
  97
  98         if (!buf)
  99                 return -ENOMEM;
 100
 101         *buf = data;
 102         cpu_to_le32s(buf);
 103
 104         ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
 105                 USB_VENDOR_REQUEST_WRITE_REGISTER,
 106                 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 107                 00, index, buf, 4, USB_CTRL_SET_TIMEOUT);
 108
 109         if (unlikely(ret < 0))
 110                 devwarn(dev, "Failed to write register index 0x%08x", index);
 111
 112         kfree(buf);
 113
 114         return ret;
 115 }
 116
 117 /* Loop until the read is completed with timeout
 118  * called with phy_mutex held */
 119 static int smsc95xx_phy_wait_not_busy(struct usbnet *dev)
 120 {
 121         unsigned long start_time = jiffies;
 122         u32 val;
 123
 124         do {
 125                 smsc95xx_read_reg(dev, MII_ADDR, &val);
 126                 if (!(val & MII_BUSY_))
 127                         return 0;
 128         } while (!time_after(jiffies, start_time + HZ));
 129
 130         return -EIO;
 131 }
 132
 133 static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
 134 {
 135         struct usbnet *dev = netdev_priv(netdev);
 136         u32 val, addr;
 137
 138         mutex_lock(&dev->phy_mutex);
 139
 140         /* confirm MII not busy */
 141         if (smsc95xx_phy_wait_not_busy(dev)) {
 142                 devwarn(dev, "MII is busy in smsc95xx_mdio_read");
 143                 mutex_unlock(&dev->phy_mutex);
 144                 return -EIO;
 145         }
 146
 147         /* set the address, index & direction (read from PHY) */
 148         phy_id &= dev->mii.phy_id_mask;
 149         idx &= dev->mii.reg_num_mask;
 150         addr = (phy_id << 11) | (idx << 6) | MII_READ_;
 151         smsc95xx_write_reg(dev, MII_ADDR, addr);
 152
 153         if (smsc95xx_phy_wait_not_busy(dev)) {
 154                 devwarn(dev, "Timed out reading MII reg %02X", idx);
 155                 mutex_unlock(&dev->phy_mutex);
 156                 return -EIO;
 157         }
 158
 159         smsc95xx_read_reg(dev, MII_DATA, &val);
 160
 161         mutex_unlock(&dev->phy_mutex);
 162
 163         return (u16)(val & 0xFFFF);
 164 }
 165
 166 static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
 167                                 int regval)
 168 {
 169         struct usbnet *dev = netdev_priv(netdev);
 170         u32 val, addr;
 171
 172         mutex_lock(&dev->phy_mutex);
 173
 174         /* confirm MII not busy */
 175         if (smsc95xx_phy_wait_not_busy(dev)) {
 176                 devwarn(dev, "MII is busy in smsc95xx_mdio_write");
 177                 mutex_unlock(&dev->phy_mutex);
 178                 return;
 179         }
 180
 181         val = regval;
 182         smsc95xx_write_reg(dev, MII_DATA, val);
 183
 184         /* set the address, index & direction (write to PHY) */
 185         phy_id &= dev->mii.phy_id_mask;
 186         idx &= dev->mii.reg_num_mask;
 187         addr = (phy_id << 11) | (idx << 6) | MII_WRITE_;
 188         smsc95xx_write_reg(dev, MII_ADDR, addr);
 189
 190         if (smsc95xx_phy_wait_not_busy(dev))
 191                 devwarn(dev, "Timed out writing MII reg %02X", idx);
 192
 193         mutex_unlock(&dev->phy_mutex);
 194 }
 195
 196 static int smsc95xx_wait_eeprom(struct usbnet *dev)
 197 {
 198         unsigned long start_time = jiffies;
 199         u32 val;
 200
 201         do {
 202                 smsc95xx_read_reg(dev, E2P_CMD, &val);
 203                 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
 204                         break;
 205                 udelay(40);
 206         } while (!time_after(jiffies, start_time + HZ));
 207
 208         if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
 209                 devwarn(dev, "EEPROM read operation timeout");
 210                 return -EIO;
 211         }
 212
 213         return 0;
 214 }
 215
 216 static int smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
 217 {
 218         unsigned long start_time = jiffies;
 219         u32 val;
 220
 221         do {
 222                 smsc95xx_read_reg(dev, E2P_CMD, &val);
 223
 224                 if (!(val & E2P_CMD_LOADED_)) {
 225                         devwarn(dev, "No EEPROM present");
 226                         return -EIO;
 227                 }
 228
 229                 if (!(val & E2P_CMD_BUSY_))
 230                         return 0;
 231
 232                 udelay(40);
 233         } while (!time_after(jiffies, start_time + HZ));
 234
 235         devwarn(dev, "EEPROM is busy");
 236         return -EIO;
 237 }
 238
 239 static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
 240                                 u8 *data)
 241 {
 242         u32 val;
 243         int i, ret;
 244
 245         BUG_ON(!dev);
 246         BUG_ON(!data);
 247
 248         ret = smsc95xx_eeprom_confirm_not_busy(dev);
 249         if (ret)
 250                 return ret;
 251
 252         for (i = 0; i < length; i++) {
 253                 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
 254                 smsc95xx_write_reg(dev, E2P_CMD, val);
 255
 256                 ret = smsc95xx_wait_eeprom(dev);
 257                 if (ret < 0)
 258                         return ret;
 259
 260                 smsc95xx_read_reg(dev, E2P_DATA, &val);
 261
 262                 data[i] = val & 0xFF;
 263                 offset++;
 264         }
 265
 266         return 0;
 267 }
 268
 269 static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
 270                                  u8 *data)
 271 {
 272         u32 val;
 273         int i, ret;
 274
 275         BUG_ON(!dev);
 276         BUG_ON(!data);
 277
 278         ret = smsc95xx_eeprom_confirm_not_busy(dev);
 279         if (ret)
 280                 return ret;
 281
 282         /* Issue write/erase enable command */
 283         val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
 284         smsc95xx_write_reg(dev, E2P_CMD, val);
 285
 286         ret = smsc95xx_wait_eeprom(dev);
 287         if (ret < 0)
 288                 return ret;
 289
 290         for (i = 0; i < length; i++) {
 291
 292                 /* Fill data register */
 293                 val = data[i];
 294                 smsc95xx_write_reg(dev, E2P_DATA, val);
 295
 296                 /* Send "write" command */
 297                 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
 298                 smsc95xx_write_reg(dev, E2P_CMD, val);
 299
 300                 ret = smsc95xx_wait_eeprom(dev);
 301                 if (ret < 0)
 302                         return ret;
 303
 304                 offset++;
 305         }
 306
 307         return 0;
 308 }
 309
 310 static void smsc95xx_async_cmd_callback(struct urb *urb, struct pt_regs *regs)
 311 {
 312         struct usb_context *usb_context = urb->context;
 313         struct usbnet *dev = usb_context->dev;
 314
 315         if (urb->status < 0)
 316                 devwarn(dev, "async callback failed with %d", urb->status);
 317
 318         complete(&usb_context->notify);
 319
 320         kfree(usb_context);
 321         usb_free_urb(urb);
 322 }
 323
 324 static int smsc95xx_write_reg_async(struct usbnet *dev, u16 index, u32 *data)
 325 {
 326         struct usb_context *usb_context;
 327         int status;
 328         struct urb *urb;
 329         const u16 size = 4;
 330
 331         urb = usb_alloc_urb(0, GFP_ATOMIC);
 332         if (!urb) {
 333                 devwarn(dev, "Error allocating URB");
 334                 return -ENOMEM;
 335         }
 336
 337         usb_context = kmalloc(sizeof(struct usb_context), GFP_ATOMIC);
 338         if (usb_context == NULL) {
 339                 devwarn(dev, "Error allocating control msg");
 340                 usb_free_urb(urb);
 341                 return -ENOMEM;
 342         }
 343
 344         usb_context->req.bRequestType =
 345                 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
 346         usb_context->req.bRequest = USB_VENDOR_REQUEST_WRITE_REGISTER;
 347         usb_context->req.wValue = 00;
 348         usb_context->req.wIndex = cpu_to_le16(index);
 349         usb_context->req.wLength = cpu_to_le16(size);
 350         init_completion(&usb_context->notify);
 351
 352         usb_fill_control_urb(urb, dev->udev, usb_sndctrlpipe(dev->udev, 0),
 353                 (void *)&usb_context->req, data, size,
 354                 (usb_complete_t)smsc95xx_async_cmd_callback,
 355                 (void *)usb_context);
 356
 357         status = usb_submit_urb(urb, GFP_ATOMIC);
 358         if (status < 0) {
 359                 devwarn(dev, "Error submitting control msg, sts=%d", status);
 360                 kfree(usb_context);
 361                 usb_free_urb(urb);
 362         }
 363
 364         return status;
 365 }
 366
 367 /* returns hash bit number for given MAC address
 368  * example:
 369  * 01 00 5E 00 00 01 -> returns bit number 31 */
 370 static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
 371 {
 372         return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
 373 }
 374
 375 static void smsc95xx_set_multicast(struct net_device *netdev)
 376 {
 377         struct usbnet *dev = netdev_priv(netdev);
 378         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 379         u32 hash_hi = 0;
 380         u32 hash_lo = 0;
 381         unsigned long flags;
 382
 383         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 384
 385         if (dev->net->flags & IFF_PROMISC) {
 386                 if (netif_msg_drv(dev))
 387                         devdbg(dev, "promiscuous mode enabled");
 388                 pdata->mac_cr |= MAC_CR_PRMS_;
 389                 pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
 390         } else if (dev->net->flags & IFF_ALLMULTI) {
 391                 if (netif_msg_drv(dev))
 392                         devdbg(dev, "receive all multicast enabled");
 393                 pdata->mac_cr |= MAC_CR_MCPAS_;
 394                 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_);
 395         } else if (dev->net->mc_count > 0) {
 396                 struct dev_mc_list *mc_list = dev->net->mc_list;
 397                 int count = 0;
 398
 399                 pdata->mac_cr |= MAC_CR_HPFILT_;
 400                 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
 401
 402                 while (mc_list) {
 403                         count++;
 404                         if (mc_list->dmi_addrlen == ETH_ALEN) {
 405                                 u32 bitnum = smsc95xx_hash(mc_list->dmi_addr);
 406                                 u32 mask = 0x01 << (bitnum & 0x1F);
 407                                 if (bitnum & 0x20)
 408                                         hash_hi |= mask;
 409                                 else
 410                                         hash_lo |= mask;
 411                         } else {
 412                                 devwarn(dev, "dmi_addrlen != 6");
 413                         }
 414                         mc_list = mc_list->next;
 415                 }
 416
 417                 if (count != ((u32)dev->net->mc_count))
 418                         devwarn(dev, "mc_count != dev->mc_count");
 419
 420                 if (netif_msg_drv(dev))
 421                         devdbg(dev, "HASHH=0x%08X, HASHL=0x%08X", hash_hi,
 422                                 hash_lo);
 423         } else {
 424                 if (netif_msg_drv(dev))
 425                         devdbg(dev, "receive own packets only");
 426                 pdata->mac_cr &=
 427                         ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
 428         }
 429
 430         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 431
 432         /* Initiate async writes, as we can't wait for completion here */
 433         smsc95xx_write_reg_async(dev, HASHH, &hash_hi);
 434         smsc95xx_write_reg_async(dev, HASHL, &hash_lo);
 435         smsc95xx_write_reg_async(dev, MAC_CR, &pdata->mac_cr);
 436 }
 437
 438 static u8 smsc95xx_resolve_flowctrl_fulldplx(u16 lcladv, u16 rmtadv)
 439 {
 440         u8 cap = 0;
 441
 442         if (lcladv & ADVERTISE_PAUSE_CAP) {
 443                 if (lcladv & ADVERTISE_PAUSE_ASYM) {
 444                         if (rmtadv & LPA_PAUSE_CAP)
 445                                 cap = FLOW_CTRL_TX | FLOW_CTRL_RX;
 446                         else if (rmtadv & LPA_PAUSE_ASYM)
 447                                 cap = FLOW_CTRL_RX;
 448                 } else {
 449                         if (rmtadv & LPA_PAUSE_CAP)
 450                                 cap = FLOW_CTRL_TX | FLOW_CTRL_RX;
 451                 }
 452         } else if (lcladv & ADVERTISE_PAUSE_ASYM) {
 453                 if ((rmtadv & LPA_PAUSE_CAP) && (rmtadv & LPA_PAUSE_ASYM))
 454                         cap = FLOW_CTRL_TX;
 455         }
 456
 457         return cap;
 458 }
 459
 460 static void smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
 461                                             u16 lcladv, u16 rmtadv)
 462 {
 463         u32 flow, afc_cfg = 0;
 464
 465         int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
 466         if (ret < 0) {
 467                 devwarn(dev, "error reading AFC_CFG");
 468                 return;
 469         }
 470
 471         if (duplex == DUPLEX_FULL) {
 472                 u8 cap = smsc95xx_resolve_flowctrl_fulldplx(lcladv, rmtadv);
 473
 474                 if (cap & FLOW_CTRL_RX)
 475                         flow = 0xFFFF0002;
 476                 else
 477                         flow = 0;
 478
 479                 if (cap & FLOW_CTRL_TX)
 480                         afc_cfg |= 0xF;
 481                 else
 482                         afc_cfg &= ~0xF;
 483
 484                 if (netif_msg_link(dev))
 485                         devdbg(dev, "rx pause %s, tx pause %s",
 486                                 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
 487                                 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
 488         } else {
 489                 if (netif_msg_link(dev))
 490                         devdbg(dev, "half duplex");
 491                 flow = 0;
 492                 afc_cfg |= 0xF;
 493         }
 494
 495         smsc95xx_write_reg(dev, FLOW, flow);
 496         smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
 497 }
 498
 499 static int smsc95xx_link_reset(struct usbnet *dev)
 500 {
 501         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 502         struct mii_if_info *mii = &dev->mii;
 503         struct ethtool_cmd ecmd;
 504         unsigned long flags;
 505         u16 lcladv, rmtadv;
 506         u32 intdata;
 507
 508         /* clear interrupt status */
 509         smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
 510         intdata = 0xFFFFFFFF;
 511         smsc95xx_write_reg(dev, INT_STS, intdata);
 512
 513         mii_check_media(mii, 1, 1);
 514         mii_ethtool_gset(&dev->mii, &ecmd);
 515         lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
 516         rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
 517
 518         if (netif_msg_link(dev))
 519                 devdbg(dev, "speed: %d duplex: %d lcladv: %04x rmtadv: %04x",
 520                         ecmd.speed, ecmd.duplex, lcladv, rmtadv);
 521
 522         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 523         if (ecmd.duplex != DUPLEX_FULL) {
 524                 pdata->mac_cr &= ~MAC_CR_FDPX_;
 525                 pdata->mac_cr |= MAC_CR_RCVOWN_;
 526         } else {
 527                 pdata->mac_cr &= ~MAC_CR_RCVOWN_;
 528                 pdata->mac_cr |= MAC_CR_FDPX_;
 529         }
 530         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 531
 532         smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
 533
 534         smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
 535
 536         return 0;
 537 }
 538
 539 static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
 540 {
 541         u32 intdata;
 542
 543         if (urb->actual_length != 4) {
 544                 devwarn(dev, "unexpected urb length %d", urb->actual_length);
 545                 return;
 546         }
 547
 548         memcpy(&intdata, urb->transfer_buffer, 4);
 549         le32_to_cpus(&intdata);
 550
 551         if (netif_msg_link(dev))
 552                 devdbg(dev, "intdata: 0x%08X", intdata);
 553
 554         if (intdata & INT_ENP_PHY_INT_)
 555                 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
 556         else
 557                 devwarn(dev, "unexpected interrupt, intdata=0x%08X", intdata);
 558 }
 559
 560 /* Enable or disable Tx & Rx checksum offload engines */
 561 static int smsc95xx_set_csums(struct usbnet *dev)
 562 {
 563         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 564         u32 read_buf;
 565         int ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
 566         if (ret < 0) {
 567                 devwarn(dev, "Failed to read COE_CR: %d", ret);
 568                 return ret;
 569         }
 570
 571         if (pdata->use_tx_csum)
 572                 read_buf |= Tx_COE_EN_;
 573         else
 574                 read_buf &= ~Tx_COE_EN_;
 575
 576         if (pdata->use_rx_csum)
 577                 read_buf |= Rx_COE_EN_;
 578         else
 579                 read_buf &= ~Rx_COE_EN_;
 580
 581         ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
 582         if (ret < 0) {
 583                 devwarn(dev, "Failed to write COE_CR: %d", ret);
 584                 return ret;
 585         }
 586
 587         if (netif_msg_hw(dev))
 588                 devdbg(dev, "COE_CR = 0x%08x", read_buf);
 589         return 0;
 590 }
 591
 592 static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
 593 {
 594         return MAX_EEPROM_SIZE;
 595 }
 596
 597 static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev,
 598                                        struct ethtool_eeprom *ee, u8 *data)
 599 {
 600         struct usbnet *dev = netdev_priv(netdev);
 601
 602         ee->magic = LAN95XX_EEPROM_MAGIC;
 603
 604         return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data);
 605 }
 606
 607 static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev,
 608                                        struct ethtool_eeprom *ee, u8 *data)
 609 {
 610         struct usbnet *dev = netdev_priv(netdev);
 611
 612         if (ee->magic != LAN95XX_EEPROM_MAGIC) {
 613                 devwarn(dev, "EEPROM: magic value mismatch, magic = 0x%x",
 614                         ee->magic);
 615                 return -EINVAL;
 616         }
 617
 618         return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
 619 }
 620
 621 static u32 smsc95xx_ethtool_get_rx_csum(struct net_device *netdev)
 622 {
 623         struct usbnet *dev = netdev_priv(netdev);
 624         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 625
 626         return pdata->use_rx_csum;
 627 }
 628
 629 static int smsc95xx_ethtool_set_rx_csum(struct net_device *netdev, u32 val)
 630 {
 631         struct usbnet *dev = netdev_priv(netdev);
 632         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 633
 634         pdata->use_rx_csum = !!val;
 635
 636         return smsc95xx_set_csums(dev);
 637 }
 638
 639 static u32 smsc95xx_ethtool_get_tx_csum(struct net_device *netdev)
 640 {
 641         struct usbnet *dev = netdev_priv(netdev);
 642         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 643
 644         return pdata->use_tx_csum;
 645 }
 646
 647 static int smsc95xx_ethtool_set_tx_csum(struct net_device *netdev, u32 val)
 648 {
 649         struct usbnet *dev = netdev_priv(netdev);
 650         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 651
 652         pdata->use_tx_csum = !!val;
 653
 654         ethtool_op_set_tx_hw_csum(netdev, pdata->use_tx_csum);
 655         return smsc95xx_set_csums(dev);
 656 }
 657
 658 static struct ethtool_ops smsc95xx_ethtool_ops = {
 659         .get_link       = usbnet_get_link,
 660         .nway_reset     = usbnet_nway_reset,
 661         .get_drvinfo    = usbnet_get_drvinfo,
 662         .get_msglevel   = usbnet_get_msglevel,
 663         .set_msglevel   = usbnet_set_msglevel,
 664         .get_settings   = usbnet_get_settings,
 665         .set_settings   = usbnet_set_settings,
 666         .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len,
 667         .get_eeprom     = smsc95xx_ethtool_get_eeprom,
 668         .set_eeprom     = smsc95xx_ethtool_set_eeprom,
 669         .get_tx_csum    = smsc95xx_ethtool_get_tx_csum,
 670         .set_tx_csum    = smsc95xx_ethtool_set_tx_csum,
 671         .get_rx_csum    = smsc95xx_ethtool_get_rx_csum,
 672         .set_rx_csum    = smsc95xx_ethtool_set_rx_csum,
 673 };
 674
 675 static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
 676 {
 677         struct usbnet *dev = netdev_priv(netdev);
 678
 679         if (!netif_running(netdev))
 680                 return -EINVAL;
 681
 682         return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
 683 }
 684
 685 static void smsc95xx_init_mac_address(struct usbnet *dev)
 686 {
 687         /* try reading mac address from EEPROM */
 688         if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
 689                         dev->net->dev_addr) == 0) {
 690                 if (is_valid_ether_addr(dev->net->dev_addr)) {
 691                         /* eeprom values are valid so use them */
 692                         if (netif_msg_ifup(dev))
 693                                 devdbg(dev, "MAC address read from EEPROM");
 694                         return;
 695                 }
 696         }
 697
 698         /* no eeprom, or eeprom values are invalid. generate random MAC */
 699         random_ether_addr(dev->net->dev_addr);
 700         if (netif_msg_ifup(dev))
 701                 devdbg(dev, "MAC address set to random_ether_addr");
 702 }
 703
 704 static int smsc95xx_set_mac_address(struct usbnet *dev)
 705 {
 706         u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
 707                 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
 708         u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
 709         int ret;
 710
 711         ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
 712         if (ret < 0) {
 713                 devwarn(dev, "Failed to write ADDRL: %d", ret);
 714                 return ret;
 715         }
 716
 717         ret = smsc95xx_write_reg(dev, ADDRH, addr_hi);
 718         if (ret < 0) {
 719                 devwarn(dev, "Failed to write ADDRH: %d", ret);
 720                 return ret;
 721         }
 722
 723         return 0;
 724 }
 725
 726 /* starts the TX path */
 727 static void smsc95xx_start_tx_path(struct usbnet *dev)
 728 {
 729         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 730         unsigned long flags;
 731         u32 reg_val;
 732
 733         /* Enable Tx at MAC */
 734         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 735         pdata->mac_cr |= MAC_CR_TXEN_;
 736         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 737
 738         smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
 739
 740         /* Enable Tx at SCSRs */
 741         reg_val = TX_CFG_ON_;
 742         smsc95xx_write_reg(dev, TX_CFG, reg_val);
 743 }
 744
 745 /* Starts the Receive path */
 746 static void smsc95xx_start_rx_path(struct usbnet *dev)
 747 {
 748         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 749         unsigned long flags;
 750
 751         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 752         pdata->mac_cr |= MAC_CR_RXEN_;
 753         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 754
 755         smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
 756 }
 757
 758 static int smsc95xx_phy_initialize(struct usbnet *dev)
 759 {
 760         /* Initialize MII structure */
 761         dev->mii.dev = dev->net;
 762         dev->mii.mdio_read = smsc95xx_mdio_read;
 763         dev->mii.mdio_write = smsc95xx_mdio_write;
 764         dev->mii.phy_id_mask = 0x1f;
 765         dev->mii.reg_num_mask = 0x1f;
 766         dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID;
 767
 768         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
 769         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
 770                 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
 771                 ADVERTISE_PAUSE_ASYM);
 772
 773         /* read to clear */
 774         smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
 775
 776         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
 777                 PHY_INT_MASK_DEFAULT_);
 778         mii_nway_restart(&dev->mii);
 779
 780         if (netif_msg_ifup(dev))
 781                 devdbg(dev, "phy initialised succesfully");
 782         return 0;
 783 }
 784
 785 static int smsc95xx_reset(struct usbnet *dev)
 786 {
 787         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 788         struct net_device *netdev = dev->net;
 789         u32 read_buf, write_buf, burst_cap;
 790         int ret = 0, timeout;
 791
 792         if (netif_msg_ifup(dev))
 793                 devdbg(dev, "entering smsc95xx_reset");
 794
 795         write_buf = HW_CFG_LRST_;
 796         ret = smsc95xx_write_reg(dev, HW_CFG, write_buf);
 797         if (ret < 0) {
 798                 devwarn(dev, "Failed to write HW_CFG_LRST_ bit in HW_CFG "
 799                         "register, ret = %d", ret);
 800                 return ret;
 801         }
 802
 803         timeout = 0;
 804         do {
 805                 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 806                 if (ret < 0) {
 807                         devwarn(dev, "Failed to read HW_CFG: %d", ret);
 808                         return ret;
 809                 }
 810                 msleep(10);
 811                 timeout++;
 812         } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
 813
 814         if (timeout >= 100) {
 815                 devwarn(dev, "timeout waiting for completion of Lite Reset");
 816                 return ret;
 817         }
 818
 819         write_buf = PM_CTL_PHY_RST_;
 820         ret = smsc95xx_write_reg(dev, PM_CTRL, write_buf);
 821         if (ret < 0) {
 822                 devwarn(dev, "Failed to write PM_CTRL: %d", ret);
 823                 return ret;
 824         }
 825
 826         timeout = 0;
 827         do {
 828                 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
 829                 if (ret < 0) {
 830                         devwarn(dev, "Failed to read PM_CTRL: %d", ret);
 831                         return ret;
 832                 }
 833                 msleep(10);
 834                 timeout++;
 835         } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
 836
 837         if (timeout >= 100) {
 838                 devwarn(dev, "timeout waiting for PHY Reset");
 839                 return ret;
 840         }
 841
 842         smsc95xx_init_mac_address(dev);
 843
 844         ret = smsc95xx_set_mac_address(dev);
 845         if (ret < 0)
 846                 return ret;
 847
 848         if (netif_msg_ifup(dev))
 849                 devdbg(dev, "MAC Address: %pM", dev->net->dev_addr);
 850
 851         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 852         if (ret < 0) {
 853                 devwarn(dev, "Failed to read HW_CFG: %d", ret);
 854                 return ret;
 855         }
 856
 857         if (netif_msg_ifup(dev))
 858                 devdbg(dev, "Read Value from HW_CFG : 0x%08x", read_buf);
 859
 860         read_buf |= HW_CFG_BIR_;
 861
 862         ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
 863         if (ret < 0) {
 864                 devwarn(dev, "Failed to write HW_CFG_BIR_ bit in HW_CFG "
 865                         "register, ret = %d", ret);
 866                 return ret;
 867         }
 868
 869         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 870         if (ret < 0) {
 871                 devwarn(dev, "Failed to read HW_CFG: %d", ret);
 872                 return ret;
 873         }
 874         if (netif_msg_ifup(dev))
 875                 devdbg(dev, "Read Value from HW_CFG after writing "
 876                         "HW_CFG_BIR_: 0x%08x", read_buf);
 877
 878         if (!turbo_mode) {
 879                 burst_cap = 0;
 880                 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
 881         } else if (dev->udev->speed == USB_SPEED_HIGH) {
 882                 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
 883                 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
 884         } else {
 885                 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
 886                 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
 887         }
 888
 889         if (netif_msg_ifup(dev))
 890                 devdbg(dev, "rx_urb_size=%ld", (ulong)dev->rx_urb_size);
 891
 892         ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
 893         if (ret < 0) {
 894                 devwarn(dev, "Failed to write BURST_CAP: %d", ret);
 895                 return ret;
 896         }
 897
 898         ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
 899         if (ret < 0) {
 900                 devwarn(dev, "Failed to read BURST_CAP: %d", ret);
 901                 return ret;
 902         }
 903         if (netif_msg_ifup(dev))
 904                 devdbg(dev, "Read Value from BURST_CAP after writing: 0x%08x",
 905                         read_buf);
 906
 907         read_buf = DEFAULT_BULK_IN_DELAY;
 908         ret = smsc95xx_write_reg(dev, BULK_IN_DLY, read_buf);
 909         if (ret < 0) {
 910                 devwarn(dev, "ret = %d", ret);
 911                 return ret;
 912         }
 913
 914         ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
 915         if (ret < 0) {
 916                 devwarn(dev, "Failed to read BULK_IN_DLY: %d", ret);
 917                 return ret;
 918         }
 919         if (netif_msg_ifup(dev))
 920                 devdbg(dev, "Read Value from BULK_IN_DLY after writing: "
 921                         "0x%08x", read_buf);
 922
 923         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 924         if (ret < 0) {
 925                 devwarn(dev, "Failed to read HW_CFG: %d", ret);
 926                 return ret;
 927         }
 928         if (netif_msg_ifup(dev))
 929                 devdbg(dev, "Read Value from HW_CFG: 0x%08x", read_buf);
 930
 931         if (turbo_mode)
 932                 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
 933
 934         read_buf &= ~HW_CFG_RXDOFF_;
 935
 936         /* set Rx data offset=2, Make IP header aligns on word boundary. */
 937         read_buf |= NET_IP_ALIGN << 9;
 938
 939         ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
 940         if (ret < 0) {
 941                 devwarn(dev, "Failed to write HW_CFG register, ret=%d", ret);
 942                 return ret;
 943         }
 944
 945         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 946         if (ret < 0) {
 947                 devwarn(dev, "Failed to read HW_CFG: %d", ret);
 948                 return ret;
 949         }
 950         if (netif_msg_ifup(dev))
 951                 devdbg(dev, "Read Value from HW_CFG after writing: 0x%08x",
 952                         read_buf);
 953
 954         write_buf = 0xFFFFFFFF;
 955         ret = smsc95xx_write_reg(dev, INT_STS, write_buf);
 956         if (ret < 0) {
 957                 devwarn(dev, "Failed to write INT_STS register, ret=%d", ret);
 958                 return ret;
 959         }
 960
 961         ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
 962         if (ret < 0) {
 963                 devwarn(dev, "Failed to read ID_REV: %d", ret);
 964                 return ret;
 965         }
 966         if (netif_msg_ifup(dev))
 967                 devdbg(dev, "ID_REV = 0x%08x", read_buf);
 968
 969         /* Init Tx */
 970         write_buf = 0;
 971         ret = smsc95xx_write_reg(dev, FLOW, write_buf);
 972         if (ret < 0) {
 973                 devwarn(dev, "Failed to write FLOW: %d", ret);
 974                 return ret;
 975         }
 976
 977         read_buf = AFC_CFG_DEFAULT;
 978         ret = smsc95xx_write_reg(dev, AFC_CFG, read_buf);
 979         if (ret < 0) {
 980                 devwarn(dev, "Failed to write AFC_CFG: %d", ret);
 981                 return ret;
 982         }
 983
 984         /* Don't need mac_cr_lock during initialisation */
 985         ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
 986         if (ret < 0) {
 987                 devwarn(dev, "Failed to read MAC_CR: %d", ret);
 988                 return ret;
 989         }
 990
 991         /* Init Rx */
 992         /* Set Vlan */
 993         write_buf = (u32)ETH_P_8021Q;
 994         ret = smsc95xx_write_reg(dev, VLAN1, write_buf);
 995         if (ret < 0) {
 996                 devwarn(dev, "Failed to write VAN1: %d", ret);
 997                 return ret;
 998         }
 999
1000         /* Enable or disable checksum offload engines */
1001         ethtool_op_set_tx_hw_csum(netdev, pdata->use_tx_csum);
1002         ret = smsc95xx_set_csums(dev);
1003         if (ret < 0) {
1004                 devwarn(dev, "Failed to set csum offload: %d", ret);
1005                 return ret;
1006         }
1007
1008         smsc95xx_set_multicast(dev->net);
1009
1010         if (smsc95xx_phy_initialize(dev) < 0)
1011                 return -EIO;
1012
1013         ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
1014         if (ret < 0) {
1015                 devwarn(dev, "Failed to read INT_EP_CTL: %d", ret);
1016                 return ret;
1017         }
1018
1019         /* enable PHY interrupts */
1020         read_buf |= INT_EP_CTL_PHY_INT_;
1021
1022         ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
1023         if (ret < 0) {
1024                 devwarn(dev, "Failed to write INT_EP_CTL: %d", ret);
1025                 return ret;
1026         }
1027
1028         smsc95xx_start_tx_path(dev);
1029         smsc95xx_start_rx_path(dev);
1030
1031         if (netif_msg_ifup(dev))
1032                 devdbg(dev, "smsc95xx_reset, return 0");
1033         return 0;
1034 }
1035
1036 static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
1037 {
1038         struct smsc95xx_priv *pdata = NULL;
1039         int ret;
1040
1041         printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1042
1043         ret = usbnet_get_endpoints(dev, intf);
1044         if (ret < 0) {
1045                 devwarn(dev, "usbnet_get_endpoints failed: %d", ret);
1046                 return ret;
1047         }
1048
1049         dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv),
1050                 GFP_KERNEL);
1051
1052         pdata = (struct smsc95xx_priv *)(dev->data[0]);
1053         if (!pdata) {
1054                 devwarn(dev, "Unable to allocate struct smsc95xx_priv");
1055                 return -ENOMEM;
1056         }
1057
1058         spin_lock_init(&pdata->mac_cr_lock);
1059
1060         pdata->use_tx_csum = DEFAULT_TX_CSUM_ENABLE;
1061         pdata->use_rx_csum = DEFAULT_RX_CSUM_ENABLE;
1062
1063         /* Init all registers */
1064         ret = smsc95xx_reset(dev);
1065
1066         dev->net->do_ioctl = smsc95xx_ioctl;
1067         dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
1068         dev->net->set_multicast_list = smsc95xx_set_multicast;
1069         dev->net->flags |= IFF_MULTICAST;
1070         dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD;
1071         return 0;
1072 }
1073
1074 static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1075 {
1076         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1077         if (pdata) {
1078                 if (netif_msg_ifdown(dev))
1079                         devdbg(dev, "free pdata");
1080                 kfree(pdata);
1081                 pdata = NULL;
1082                 dev->data[0] = 0;
1083         }
1084 }
1085
1086 static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
1087 {
1088         skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
1089         skb->ip_summed = CHECKSUM_COMPLETE;
1090         skb_trim(skb, skb->len - 2);
1091 }
1092
1093 static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1094 {
1095         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1096
1097         while (skb->len > 0) {
1098                 u32 header, align_count;
1099                 struct sk_buff *ax_skb;
1100                 unsigned char *packet;
1101                 u16 size;
1102
1103                 memcpy(&header, skb->data, sizeof(header));
1104                 le32_to_cpus(&header);
1105                 skb_pull(skb, 4 + NET_IP_ALIGN);
1106                 packet = skb->data;
1107
1108                 /* get the packet length */
1109                 size = (u16)((header & RX_STS_FL_) >> 16);
1110                 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
1111
1112                 if (unlikely(header & RX_STS_ES_)) {
1113                         if (netif_msg_rx_err(dev))
1114                                 devdbg(dev, "Error header=0x%08x", header);
1115                         dev->stats.rx_errors++;
1116                         dev->stats.rx_dropped++;
1117
1118                         if (header & RX_STS_CRC_) {
1119                                 dev->stats.rx_crc_errors++;
1120                         } else {
1121                                 if (header & (RX_STS_TL_ | RX_STS_RF_))
1122                                         dev->stats.rx_frame_errors++;
1123
1124                                 if ((header & RX_STS_LE_) &&
1125                                         (!(header & RX_STS_FT_)))
1126                                         dev->stats.rx_length_errors++;
1127                         }
1128                 } else {
1129                         /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1130                         if (unlikely(size > (ETH_FRAME_LEN + 12))) {
1131                                 if (netif_msg_rx_err(dev))
1132                                         devdbg(dev, "size err header=0x%08x",
1133                                                 header);
1134                                 return 0;
1135                         }
1136
1137                         /* last frame in this batch */
1138                         if (skb->len == size) {
1139                                 if (pdata->use_rx_csum)
1140                                         smsc95xx_rx_csum_offload(skb);
1141
1142                                 skb->truesize = size + sizeof(struct sk_buff);
1143
1144                                 return 1;
1145                         }
1146
1147                         ax_skb = skb_clone(skb, GFP_ATOMIC);
1148                         if (unlikely(!ax_skb)) {
1149                                 devwarn(dev, "Error allocating skb");
1150                                 return 0;
1151                         }
1152
1153                         ax_skb->len = size;
1154                         ax_skb->data = packet;
1155                         skb_set_tail_pointer(ax_skb, size);
1156
1157                         if (pdata->use_rx_csum)
1158                                 smsc95xx_rx_csum_offload(ax_skb);
1159
1160                         ax_skb->truesize = size + sizeof(struct sk_buff);
1161
1162                         usbnet_skb_return(dev, ax_skb);
1163                 }
1164
1165                 skb_pull(skb, size);
1166
1167                 /* padding bytes before the next frame starts */
1168                 if (skb->len)
1169                         skb_pull(skb, align_count);
1170         }
1171
1172         if (unlikely(skb->len < 0)) {
1173                 devwarn(dev, "invalid rx length<0 %d", skb->len);
1174                 return 0;
1175         }
1176
1177         return 1;
1178 }
1179
1180 static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb)
1181 {
1182         int len = skb->data - skb->head;
1183         u16 high_16 = (u16)(skb->csum_offset + skb->csum_start - len);
1184         u16 low_16 = (u16)(skb->csum_start - len);
1185         return (high_16 << 16) | low_16;
1186 }
1187
1188 static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev,
1189                                          struct sk_buff *skb, gfp_t flags)
1190 {
1191         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1192         bool csum = pdata->use_tx_csum && (skb->ip_summed == CHECKSUM_PARTIAL);
1193         int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD;
1194         u32 tx_cmd_a, tx_cmd_b;
1195
1196         /* We do not advertise SG, so skbs should be already linearized */
1197         BUG_ON(skb_shinfo(skb)->nr_frags);
1198
1199         if (skb_headroom(skb) < overhead) {
1200                 struct sk_buff *skb2 = skb_copy_expand(skb,
1201                         overhead, 0, flags);
1202                 dev_kfree_skb_any(skb);
1203                 skb = skb2;
1204                 if (!skb)
1205                         return NULL;
1206         }
1207
1208         if (csum) {
1209                 u32 csum_preamble = smsc95xx_calc_csum_preamble(skb);
1210                 skb_push(skb, 4);
1211                 memcpy(skb->data, &csum_preamble, 4);
1212         }
1213
1214         skb_push(skb, 4);
1215         tx_cmd_b = (u32)(skb->len - 4);
1216         if (csum)
1217                 tx_cmd_b |= TX_CMD_B_CSUM_ENABLE;
1218         cpu_to_le32s(&tx_cmd_b);
1219         memcpy(skb->data, &tx_cmd_b, 4);
1220
1221         skb_push(skb, 4);
1222         tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ |
1223                 TX_CMD_A_LAST_SEG_;
1224         cpu_to_le32s(&tx_cmd_a);
1225         memcpy(skb->data, &tx_cmd_a, 4);
1226
1227         return skb;
1228 }
1229
1230 static const struct driver_info smsc95xx_info = {
1231         .description    = "smsc95xx USB 2.0 Ethernet",
1232         .bind           = smsc95xx_bind,
1233         .unbind         = smsc95xx_unbind,
1234         .link_reset     = smsc95xx_link_reset,
1235         .reset          = smsc95xx_reset,
1236         .rx_fixup       = smsc95xx_rx_fixup,
1237         .tx_fixup       = smsc95xx_tx_fixup,
1238         .status         = smsc95xx_status,
1239         .flags          = FLAG_ETHER,
1240 };
1241
1242 static const struct usb_device_id products[] = {
1243         {
1244                 /* SMSC9500 USB Ethernet Device */
1245                 USB_DEVICE(0x0424, 0x9500),
1246                 .driver_info = (unsigned long) &smsc95xx_info,
1247         },
1248         { },            /* END */
1249 };
1250 MODULE_DEVICE_TABLE(usb, products);
1251
1252 static struct usb_driver smsc95xx_driver = {
1253         .name           = "smsc95xx",
1254         .id_table       = products,
1255         .probe          = usbnet_probe,
1256         .suspend        = usbnet_suspend,
1257         .resume         = usbnet_resume,
1258         .disconnect     = usbnet_disconnect,
1259 };
1260
1261 static int __init smsc95xx_init(void)
1262 {
1263         return usb_register(&smsc95xx_driver);
1264 }
1265 module_init(smsc95xx_init);
1266
1267 static void __exit smsc95xx_exit(void)
1268 {
1269         usb_deregister(&smsc95xx_driver);
1270 }
1271 module_exit(smsc95xx_exit);
1272
1273 MODULE_AUTHOR("Nancy Lin");
1274 MODULE_AUTHOR("Steve Glendinning <steve.glendinning@smsc.com>");
1275 MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices");
1276 MODULE_LICENSE("GPL");