drivers/net/usb/smsc95xx.c

   1  /***************************************************************************
   2  *
   3  * Copyright (C) 2007-2008 SMSC
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License
   7  * as published by the Free Software Foundation; either version 2
   8  * of the License, or (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  18  *
  19  *****************************************************************************/
  20
  21 #include <linux/module.h>
  22 #include <linux/kmod.h>
  23 #include <linux/init.h>
  24 #include <linux/netdevice.h>
  25 #include <linux/etherdevice.h>
  26 #include <linux/ethtool.h>
  27 #include <linux/mii.h>
  28 #include <linux/usb.h>
  29 #include <linux/crc32.h>
  30 #include <linux/usb/usbnet.h>
  31 #include "smsc95xx.h"
  32
  33 #define SMSC_CHIPNAME                   "smsc95xx"
  34 #define SMSC_DRIVER_VERSION             "1.0.4"
  35 #define HS_USB_PKT_SIZE                 (512)
  36 #define FS_USB_PKT_SIZE                 (64)
  37 #define DEFAULT_HS_BURST_CAP_SIZE       (16 * 1024 + 5 * HS_USB_PKT_SIZE)
  38 #define DEFAULT_FS_BURST_CAP_SIZE       (6 * 1024 + 33 * FS_USB_PKT_SIZE)
  39 #define DEFAULT_BULK_IN_DELAY           (0x00002000)
  40 #define MAX_SINGLE_PACKET_SIZE          (2048)
  41 #define LAN95XX_EEPROM_MAGIC            (0x9500)
  42 #define EEPROM_MAC_OFFSET               (0x01)
  43 #define DEFAULT_TX_CSUM_ENABLE          (true)
  44 #define DEFAULT_RX_CSUM_ENABLE          (true)
  45 #define SMSC95XX_INTERNAL_PHY_ID        (1)
  46 #define SMSC95XX_TX_OVERHEAD            (8)
  47 #define SMSC95XX_TX_OVERHEAD_CSUM       (12)
  48 #define FLOW_CTRL_TX                    (1)
  49 #define FLOW_CTRL_RX                    (2)
  50
  51 struct smsc95xx_priv {
  52         u32 mac_cr;
  53         spinlock_t mac_cr_lock;
  54         bool use_tx_csum;
  55         bool use_rx_csum;
  56 };
  57
  58 struct usb_context {
  59         struct usb_ctrlrequest req;
  60         struct completion notify;
  61         struct usbnet *dev;
  62 };
  63
  64 int turbo_mode = true;
  65 module_param(turbo_mode, bool, 0644);
  66 MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
  67
  68 static int smsc95xx_read_reg(struct usbnet *dev, u32 index, u32 *data)
  69 {
  70         u32 *buf = kmalloc(4, GFP_KERNEL);
  71         int ret;
  72
  73         BUG_ON(!dev);
  74
  75         if (!buf)
  76                 return -ENOMEM;
  77
  78         ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
  79                 USB_VENDOR_REQUEST_READ_REGISTER,
  80                 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  81                 00, index, buf, 4, USB_CTRL_GET_TIMEOUT);
  82
  83         if (unlikely(ret < 0))
  84                 devwarn(dev, "Failed to read register index 0x%08x", index);
  85
  86         le32_to_cpus(buf);
  87         *data = *buf;
  88         kfree(buf);
  89
  90         return ret;
  91 }
  92
  93 static int smsc95xx_write_reg(struct usbnet *dev, u32 index, u32 data)
  94 {
  95         u32 *buf = kmalloc(4, GFP_KERNEL);
  96         int ret;
  97
  98         BUG_ON(!dev);
  99
 100         if (!buf)
 101                 return -ENOMEM;
 102
 103         *buf = data;
 104         cpu_to_le32s(buf);
 105
 106         ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
 107                 USB_VENDOR_REQUEST_WRITE_REGISTER,
 108                 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 109                 00, index, buf, 4, USB_CTRL_SET_TIMEOUT);
 110
 111         if (unlikely(ret < 0))
 112                 devwarn(dev, "Failed to write register index 0x%08x", index);
 113
 114         kfree(buf);
 115
 116         return ret;
 117 }
 118
 119 /* Loop until the read is completed with timeout
 120  * called with phy_mutex held */
 121 static int smsc95xx_phy_wait_not_busy(struct usbnet *dev)
 122 {
 123         unsigned long start_time = jiffies;
 124         u32 val;
 125
 126         do {
 127                 smsc95xx_read_reg(dev, MII_ADDR, &val);
 128                 if (!(val & MII_BUSY_))
 129                         return 0;
 130         } while (!time_after(jiffies, start_time + HZ));
 131
 132         return -EIO;
 133 }
 134
 135 static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
 136 {
 137         struct usbnet *dev = netdev_priv(netdev);
 138         u32 val, addr;
 139
 140         mutex_lock(&dev->phy_mutex);
 141
 142         /* confirm MII not busy */
 143         if (smsc95xx_phy_wait_not_busy(dev)) {
 144                 devwarn(dev, "MII is busy in smsc95xx_mdio_read");
 145                 mutex_unlock(&dev->phy_mutex);
 146                 return -EIO;
 147         }
 148
 149         /* set the address, index & direction (read from PHY) */
 150         phy_id &= dev->mii.phy_id_mask;
 151         idx &= dev->mii.reg_num_mask;
 152         addr = (phy_id << 11) | (idx << 6) | MII_READ_;
 153         smsc95xx_write_reg(dev, MII_ADDR, addr);
 154
 155         if (smsc95xx_phy_wait_not_busy(dev)) {
 156                 devwarn(dev, "Timed out reading MII reg %02X", idx);
 157                 mutex_unlock(&dev->phy_mutex);
 158                 return -EIO;
 159         }
 160
 161         smsc95xx_read_reg(dev, MII_DATA, &val);
 162
 163         mutex_unlock(&dev->phy_mutex);
 164
 165         return (u16)(val & 0xFFFF);
 166 }
 167
 168 static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
 169                                 int regval)
 170 {
 171         struct usbnet *dev = netdev_priv(netdev);
 172         u32 val, addr;
 173
 174         mutex_lock(&dev->phy_mutex);
 175
 176         /* confirm MII not busy */
 177         if (smsc95xx_phy_wait_not_busy(dev)) {
 178                 devwarn(dev, "MII is busy in smsc95xx_mdio_write");
 179                 mutex_unlock(&dev->phy_mutex);
 180                 return;
 181         }
 182
 183         val = regval;
 184         smsc95xx_write_reg(dev, MII_DATA, val);
 185
 186         /* set the address, index & direction (write to PHY) */
 187         phy_id &= dev->mii.phy_id_mask;
 188         idx &= dev->mii.reg_num_mask;
 189         addr = (phy_id << 11) | (idx << 6) | MII_WRITE_;
 190         smsc95xx_write_reg(dev, MII_ADDR, addr);
 191
 192         if (smsc95xx_phy_wait_not_busy(dev))
 193                 devwarn(dev, "Timed out writing MII reg %02X", idx);
 194
 195         mutex_unlock(&dev->phy_mutex);
 196 }
 197
 198 static int smsc95xx_wait_eeprom(struct usbnet *dev)
 199 {
 200         unsigned long start_time = jiffies;
 201         u32 val;
 202
 203         do {
 204                 smsc95xx_read_reg(dev, E2P_CMD, &val);
 205                 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
 206                         break;
 207                 udelay(40);
 208         } while (!time_after(jiffies, start_time + HZ));
 209
 210         if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
 211                 devwarn(dev, "EEPROM read operation timeout");
 212                 return -EIO;
 213         }
 214
 215         return 0;
 216 }
 217
 218 static int smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
 219 {
 220         unsigned long start_time = jiffies;
 221         u32 val;
 222
 223         do {
 224                 smsc95xx_read_reg(dev, E2P_CMD, &val);
 225
 226                 if (!(val & E2P_CMD_LOADED_)) {
 227                         devwarn(dev, "No EEPROM present");
 228                         return -EIO;
 229                 }
 230
 231                 if (!(val & E2P_CMD_BUSY_))
 232                         return 0;
 233
 234                 udelay(40);
 235         } while (!time_after(jiffies, start_time + HZ));
 236
 237         devwarn(dev, "EEPROM is busy");
 238         return -EIO;
 239 }
 240
 241 static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
 242                                 u8 *data)
 243 {
 244         u32 val;
 245         int i, ret;
 246
 247         BUG_ON(!dev);
 248         BUG_ON(!data);
 249
 250         ret = smsc95xx_eeprom_confirm_not_busy(dev);
 251         if (ret)
 252                 return ret;
 253
 254         for (i = 0; i < length; i++) {
 255                 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
 256                 smsc95xx_write_reg(dev, E2P_CMD, val);
 257
 258                 ret = smsc95xx_wait_eeprom(dev);
 259                 if (ret < 0)
 260                         return ret;
 261
 262                 smsc95xx_read_reg(dev, E2P_DATA, &val);
 263
 264                 data[i] = val & 0xFF;
 265                 offset++;
 266         }
 267
 268         return 0;
 269 }
 270
 271 static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
 272                                  u8 *data)
 273 {
 274         u32 val;
 275         int i, ret;
 276
 277         BUG_ON(!dev);
 278         BUG_ON(!data);
 279
 280         ret = smsc95xx_eeprom_confirm_not_busy(dev);
 281         if (ret)
 282                 return ret;
 283
 284         /* Issue write/erase enable command */
 285         val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
 286         smsc95xx_write_reg(dev, E2P_CMD, val);
 287
 288         ret = smsc95xx_wait_eeprom(dev);
 289         if (ret < 0)
 290                 return ret;
 291
 292         for (i = 0; i < length; i++) {
 293
 294                 /* Fill data register */
 295                 val = data[i];
 296                 smsc95xx_write_reg(dev, E2P_DATA, val);
 297
 298                 /* Send "write" command */
 299                 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
 300                 smsc95xx_write_reg(dev, E2P_CMD, val);
 301
 302                 ret = smsc95xx_wait_eeprom(dev);
 303                 if (ret < 0)
 304                         return ret;
 305
 306                 offset++;
 307         }
 308
 309         return 0;
 310 }
 311
 312 static void smsc95xx_async_cmd_callback(struct urb *urb, struct pt_regs *regs)
 313 {
 314         struct usb_context *usb_context = urb->context;
 315         struct usbnet *dev = usb_context->dev;
 316
 317         if (urb->status < 0)
 318                 devwarn(dev, "async callback failed with %d", urb->status);
 319
 320         complete(&usb_context->notify);
 321
 322         kfree(usb_context);
 323         usb_free_urb(urb);
 324 }
 325
 326 static int smsc95xx_write_reg_async(struct usbnet *dev, u16 index, u32 *data)
 327 {
 328         struct usb_context *usb_context;
 329         int status;
 330         struct urb *urb;
 331         const u16 size = 4;
 332
 333         urb = usb_alloc_urb(0, GFP_ATOMIC);
 334         if (!urb) {
 335                 devwarn(dev, "Error allocating URB");
 336                 return -ENOMEM;
 337         }
 338
 339         usb_context = kmalloc(sizeof(struct usb_context), GFP_ATOMIC);
 340         if (usb_context == NULL) {
 341                 devwarn(dev, "Error allocating control msg");
 342                 usb_free_urb(urb);
 343                 return -ENOMEM;
 344         }
 345
 346         usb_context->req.bRequestType =
 347                 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
 348         usb_context->req.bRequest = USB_VENDOR_REQUEST_WRITE_REGISTER;
 349         usb_context->req.wValue = 00;
 350         usb_context->req.wIndex = cpu_to_le16(index);
 351         usb_context->req.wLength = cpu_to_le16(size);
 352         init_completion(&usb_context->notify);
 353
 354         usb_fill_control_urb(urb, dev->udev, usb_sndctrlpipe(dev->udev, 0),
 355                 (void *)&usb_context->req, data, size,
 356                 (usb_complete_t)smsc95xx_async_cmd_callback,
 357                 (void *)usb_context);
 358
 359         status = usb_submit_urb(urb, GFP_ATOMIC);
 360         if (status < 0) {
 361                 devwarn(dev, "Error submitting control msg, sts=%d", status);
 362                 kfree(usb_context);
 363                 usb_free_urb(urb);
 364         }
 365
 366         return status;
 367 }
 368
 369 /* returns hash bit number for given MAC address
 370  * example:
 371  * 01 00 5E 00 00 01 -> returns bit number 31 */
 372 static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
 373 {
 374         return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
 375 }
 376
 377 static void smsc95xx_set_multicast(struct net_device *netdev)
 378 {
 379         struct usbnet *dev = netdev_priv(netdev);
 380         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 381         u32 hash_hi = 0;
 382         u32 hash_lo = 0;
 383         unsigned long flags;
 384
 385         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 386
 387         if (dev->net->flags & IFF_PROMISC) {
 388                 if (netif_msg_drv(dev))
 389                         devdbg(dev, "promiscuous mode enabled");
 390                 pdata->mac_cr |= MAC_CR_PRMS_;
 391                 pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
 392         } else if (dev->net->flags & IFF_ALLMULTI) {
 393                 if (netif_msg_drv(dev))
 394                         devdbg(dev, "receive all multicast enabled");
 395                 pdata->mac_cr |= MAC_CR_MCPAS_;
 396                 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_);
 397         } else if (dev->net->mc_count > 0) {
 398                 struct dev_mc_list *mc_list = dev->net->mc_list;
 399                 int count = 0;
 400
 401                 pdata->mac_cr |= MAC_CR_HPFILT_;
 402                 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
 403
 404                 while (mc_list) {
 405                         count++;
 406                         if (mc_list->dmi_addrlen == ETH_ALEN) {
 407                                 u32 bitnum = smsc95xx_hash(mc_list->dmi_addr);
 408                                 u32 mask = 0x01 << (bitnum & 0x1F);
 409                                 if (bitnum & 0x20)
 410                                         hash_hi |= mask;
 411                                 else
 412                                         hash_lo |= mask;
 413                         } else {
 414                                 devwarn(dev, "dmi_addrlen != 6");
 415                         }
 416                         mc_list = mc_list->next;
 417                 }
 418
 419                 if (count != ((u32)dev->net->mc_count))
 420                         devwarn(dev, "mc_count != dev->mc_count");
 421
 422                 if (netif_msg_drv(dev))
 423                         devdbg(dev, "HASHH=0x%08X, HASHL=0x%08X", hash_hi,
 424                                 hash_lo);
 425         } else {
 426                 if (netif_msg_drv(dev))
 427                         devdbg(dev, "receive own packets only");
 428                 pdata->mac_cr &=
 429                         ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
 430         }
 431
 432         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 433
 434         /* Initiate async writes, as we can't wait for completion here */
 435         smsc95xx_write_reg_async(dev, HASHH, &hash_hi);
 436         smsc95xx_write_reg_async(dev, HASHL, &hash_lo);
 437         smsc95xx_write_reg_async(dev, MAC_CR, &pdata->mac_cr);
 438 }
 439
 440 static u8 smsc95xx_resolve_flowctrl_fulldplx(u16 lcladv, u16 rmtadv)
 441 {
 442         u8 cap = 0;
 443
 444         if (lcladv & ADVERTISE_PAUSE_CAP) {
 445                 if (lcladv & ADVERTISE_PAUSE_ASYM) {
 446                         if (rmtadv & LPA_PAUSE_CAP)
 447                                 cap = FLOW_CTRL_TX | FLOW_CTRL_RX;
 448                         else if (rmtadv & LPA_PAUSE_ASYM)
 449                                 cap = FLOW_CTRL_RX;
 450                 } else {
 451                         if (rmtadv & LPA_PAUSE_CAP)
 452                                 cap = FLOW_CTRL_TX | FLOW_CTRL_RX;
 453                 }
 454         } else if (lcladv & ADVERTISE_PAUSE_ASYM) {
 455                 if ((rmtadv & LPA_PAUSE_CAP) && (rmtadv & LPA_PAUSE_ASYM))
 456                         cap = FLOW_CTRL_TX;
 457         }
 458
 459         return cap;
 460 }
 461
 462 static void smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
 463                                             u16 lcladv, u16 rmtadv)
 464 {
 465         u32 flow, afc_cfg = 0;
 466
 467         int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
 468         if (ret < 0) {
 469                 devwarn(dev, "error reading AFC_CFG");
 470                 return;
 471         }
 472
 473         if (duplex == DUPLEX_FULL) {
 474                 u8 cap = smsc95xx_resolve_flowctrl_fulldplx(lcladv, rmtadv);
 475
 476                 if (cap & FLOW_CTRL_RX)
 477                         flow = 0xFFFF0002;
 478                 else
 479                         flow = 0;
 480
 481                 if (cap & FLOW_CTRL_TX)
 482                         afc_cfg |= 0xF;
 483                 else
 484                         afc_cfg &= ~0xF;
 485
 486                 if (netif_msg_link(dev))
 487                         devdbg(dev, "rx pause %s, tx pause %s",
 488                                 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
 489                                 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
 490         } else {
 491                 if (netif_msg_link(dev))
 492                         devdbg(dev, "half duplex");
 493                 flow = 0;
 494                 afc_cfg |= 0xF;
 495         }
 496
 497         smsc95xx_write_reg(dev, FLOW, flow);
 498         smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
 499 }
 500
 501 static int smsc95xx_link_reset(struct usbnet *dev)
 502 {
 503         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 504         struct mii_if_info *mii = &dev->mii;
 505         struct ethtool_cmd ecmd;
 506         unsigned long flags;
 507         u16 lcladv, rmtadv;
 508         u32 intdata;
 509
 510         /* clear interrupt status */
 511         smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
 512         intdata = 0xFFFFFFFF;
 513         smsc95xx_write_reg(dev, INT_STS, intdata);
 514
 515         mii_check_media(mii, 1, 1);
 516         mii_ethtool_gset(&dev->mii, &ecmd);
 517         lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
 518         rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
 519
 520         if (netif_msg_link(dev))
 521                 devdbg(dev, "speed: %d duplex: %d lcladv: %04x rmtadv: %04x",
 522                         ecmd.speed, ecmd.duplex, lcladv, rmtadv);
 523
 524         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 525         if (ecmd.duplex != DUPLEX_FULL) {
 526                 pdata->mac_cr &= ~MAC_CR_FDPX_;
 527                 pdata->mac_cr |= MAC_CR_RCVOWN_;
 528         } else {
 529                 pdata->mac_cr &= ~MAC_CR_RCVOWN_;
 530                 pdata->mac_cr |= MAC_CR_FDPX_;
 531         }
 532         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 533
 534         smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
 535
 536         smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
 537
 538         return 0;
 539 }
 540
 541 static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
 542 {
 543         u32 intdata;
 544
 545         if (urb->actual_length != 4) {
 546                 devwarn(dev, "unexpected urb length %d", urb->actual_length);
 547                 return;
 548         }
 549
 550         memcpy(&intdata, urb->transfer_buffer, 4);
 551         le32_to_cpus(&intdata);
 552
 553         if (netif_msg_link(dev))
 554                 devdbg(dev, "intdata: 0x%08X", intdata);
 555
 556         if (intdata & INT_ENP_PHY_INT_)
 557                 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
 558         else
 559                 devwarn(dev, "unexpected interrupt, intdata=0x%08X", intdata);
 560 }
 561
 562 /* Enable or disable Tx & Rx checksum offload engines */
 563 static int smsc95xx_set_csums(struct usbnet *dev)
 564 {
 565         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 566         u32 read_buf;
 567         int ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
 568         if (ret < 0) {
 569                 devwarn(dev, "Failed to read COE_CR: %d", ret);
 570                 return ret;
 571         }
 572
 573         if (pdata->use_tx_csum)
 574                 read_buf |= Tx_COE_EN_;
 575         else
 576                 read_buf &= ~Tx_COE_EN_;
 577
 578         if (pdata->use_rx_csum)
 579                 read_buf |= Rx_COE_EN_;
 580         else
 581                 read_buf &= ~Rx_COE_EN_;
 582
 583         ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
 584         if (ret < 0) {
 585                 devwarn(dev, "Failed to write COE_CR: %d", ret);
 586                 return ret;
 587         }
 588
 589         if (netif_msg_hw(dev))
 590                 devdbg(dev, "COE_CR = 0x%08x", read_buf);
 591         return 0;
 592 }
 593
 594 static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
 595 {
 596         return MAX_EEPROM_SIZE;
 597 }
 598
 599 static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev,
 600                                        struct ethtool_eeprom *ee, u8 *data)
 601 {
 602         struct usbnet *dev = netdev_priv(netdev);
 603
 604         ee->magic = LAN95XX_EEPROM_MAGIC;
 605
 606         return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data);
 607 }
 608
 609 static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev,
 610                                        struct ethtool_eeprom *ee, u8 *data)
 611 {
 612         struct usbnet *dev = netdev_priv(netdev);
 613
 614         if (ee->magic != LAN95XX_EEPROM_MAGIC) {
 615                 devwarn(dev, "EEPROM: magic value mismatch, magic = 0x%x",
 616                         ee->magic);
 617                 return -EINVAL;
 618         }
 619
 620         return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
 621 }
 622
 623 static u32 smsc95xx_ethtool_get_rx_csum(struct net_device *netdev)
 624 {
 625         struct usbnet *dev = netdev_priv(netdev);
 626         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 627
 628         return pdata->use_rx_csum;
 629 }
 630
 631 static int smsc95xx_ethtool_set_rx_csum(struct net_device *netdev, u32 val)
 632 {
 633         struct usbnet *dev = netdev_priv(netdev);
 634         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 635
 636         pdata->use_rx_csum = !!val;
 637
 638         return smsc95xx_set_csums(dev);
 639 }
 640
 641 static u32 smsc95xx_ethtool_get_tx_csum(struct net_device *netdev)
 642 {
 643         struct usbnet *dev = netdev_priv(netdev);
 644         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 645
 646         return pdata->use_tx_csum;
 647 }
 648
 649 static int smsc95xx_ethtool_set_tx_csum(struct net_device *netdev, u32 val)
 650 {
 651         struct usbnet *dev = netdev_priv(netdev);
 652         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 653
 654         pdata->use_tx_csum = !!val;
 655
 656         ethtool_op_set_tx_hw_csum(netdev, pdata->use_tx_csum);
 657         return smsc95xx_set_csums(dev);
 658 }
 659
 660 static struct ethtool_ops smsc95xx_ethtool_ops = {
 661         .get_link       = usbnet_get_link,
 662         .nway_reset     = usbnet_nway_reset,
 663         .get_drvinfo    = usbnet_get_drvinfo,
 664         .get_msglevel   = usbnet_get_msglevel,
 665         .set_msglevel   = usbnet_set_msglevel,
 666         .get_settings   = usbnet_get_settings,
 667         .set_settings   = usbnet_set_settings,
 668         .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len,
 669         .get_eeprom     = smsc95xx_ethtool_get_eeprom,
 670         .set_eeprom     = smsc95xx_ethtool_set_eeprom,
 671         .get_tx_csum    = smsc95xx_ethtool_get_tx_csum,
 672         .set_tx_csum    = smsc95xx_ethtool_set_tx_csum,
 673         .get_rx_csum    = smsc95xx_ethtool_get_rx_csum,
 674         .set_rx_csum    = smsc95xx_ethtool_set_rx_csum,
 675 };
 676
 677 static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
 678 {
 679         struct usbnet *dev = netdev_priv(netdev);
 680
 681         if (!netif_running(netdev))
 682                 return -EINVAL;
 683
 684         return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
 685 }
 686
 687 static void smsc95xx_init_mac_address(struct usbnet *dev)
 688 {
 689         /* try reading mac address from EEPROM */
 690         if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
 691                         dev->net->dev_addr) == 0) {
 692                 if (is_valid_ether_addr(dev->net->dev_addr)) {
 693                         /* eeprom values are valid so use them */
 694                         if (netif_msg_ifup(dev))
 695                                 devdbg(dev, "MAC address read from EEPROM");
 696                         return;
 697                 }
 698         }
 699
 700         /* no eeprom, or eeprom values are invalid. generate random MAC */
 701         random_ether_addr(dev->net->dev_addr);
 702         if (netif_msg_ifup(dev))
 703                 devdbg(dev, "MAC address set to random_ether_addr");
 704 }
 705
 706 static int smsc95xx_set_mac_address(struct usbnet *dev)
 707 {
 708         u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
 709                 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
 710         u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
 711         int ret;
 712
 713         ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
 714         if (ret < 0) {
 715                 devwarn(dev, "Failed to write ADDRL: %d", ret);
 716                 return ret;
 717         }
 718
 719         ret = smsc95xx_write_reg(dev, ADDRH, addr_hi);
 720         if (ret < 0) {
 721                 devwarn(dev, "Failed to write ADDRH: %d", ret);
 722                 return ret;
 723         }
 724
 725         return 0;
 726 }
 727
 728 /* starts the TX path */
 729 static void smsc95xx_start_tx_path(struct usbnet *dev)
 730 {
 731         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 732         unsigned long flags;
 733         u32 reg_val;
 734
 735         /* Enable Tx at MAC */
 736         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 737         pdata->mac_cr |= MAC_CR_TXEN_;
 738         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 739
 740         smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
 741
 742         /* Enable Tx at SCSRs */
 743         reg_val = TX_CFG_ON_;
 744         smsc95xx_write_reg(dev, TX_CFG, reg_val);
 745 }
 746
 747 /* Starts the Receive path */
 748 static void smsc95xx_start_rx_path(struct usbnet *dev)
 749 {
 750         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 751         unsigned long flags;
 752
 753         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 754         pdata->mac_cr |= MAC_CR_RXEN_;
 755         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 756
 757         smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
 758 }
 759
 760 static int smsc95xx_phy_initialize(struct usbnet *dev)
 761 {
 762         /* Initialize MII structure */
 763         dev->mii.dev = dev->net;
 764         dev->mii.mdio_read = smsc95xx_mdio_read;
 765         dev->mii.mdio_write = smsc95xx_mdio_write;
 766         dev->mii.phy_id_mask = 0x1f;
 767         dev->mii.reg_num_mask = 0x1f;
 768         dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID;
 769
 770         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
 771         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
 772                 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
 773                 ADVERTISE_PAUSE_ASYM);
 774
 775         /* read to clear */
 776         smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
 777
 778         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
 779                 PHY_INT_MASK_DEFAULT_);
 780         mii_nway_restart(&dev->mii);
 781
 782         if (netif_msg_ifup(dev))
 783                 devdbg(dev, "phy initialised succesfully");
 784         return 0;
 785 }
 786
 787 static int smsc95xx_reset(struct usbnet *dev)
 788 {
 789         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 790         struct net_device *netdev = dev->net;
 791         u32 read_buf, write_buf, burst_cap;
 792         int ret = 0, timeout;
 793
 794         if (netif_msg_ifup(dev))
 795                 devdbg(dev, "entering smsc95xx_reset");
 796
 797         write_buf = HW_CFG_LRST_;
 798         ret = smsc95xx_write_reg(dev, HW_CFG, write_buf);
 799         if (ret < 0) {
 800                 devwarn(dev, "Failed to write HW_CFG_LRST_ bit in HW_CFG "
 801                         "register, ret = %d", ret);
 802                 return ret;
 803         }
 804
 805         timeout = 0;
 806         do {
 807                 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 808                 if (ret < 0) {
 809                         devwarn(dev, "Failed to read HW_CFG: %d", ret);
 810                         return ret;
 811                 }
 812                 msleep(10);
 813                 timeout++;
 814         } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
 815
 816         if (timeout >= 100) {
 817                 devwarn(dev, "timeout waiting for completion of Lite Reset");
 818                 return ret;
 819         }
 820
 821         write_buf = PM_CTL_PHY_RST_;
 822         ret = smsc95xx_write_reg(dev, PM_CTRL, write_buf);
 823         if (ret < 0) {
 824                 devwarn(dev, "Failed to write PM_CTRL: %d", ret);
 825                 return ret;
 826         }
 827
 828         timeout = 0;
 829         do {
 830                 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
 831                 if (ret < 0) {
 832                         devwarn(dev, "Failed to read PM_CTRL: %d", ret);
 833                         return ret;
 834                 }
 835                 msleep(10);
 836                 timeout++;
 837         } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
 838
 839         if (timeout >= 100) {
 840                 devwarn(dev, "timeout waiting for PHY Reset");
 841                 return ret;
 842         }
 843
 844         smsc95xx_init_mac_address(dev);
 845
 846         ret = smsc95xx_set_mac_address(dev);
 847         if (ret < 0)
 848                 return ret;
 849
 850         if (netif_msg_ifup(dev))
 851                 devdbg(dev, "MAC Address: %pM", dev->net->dev_addr);
 852
 853         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 854         if (ret < 0) {
 855                 devwarn(dev, "Failed to read HW_CFG: %d", ret);
 856                 return ret;
 857         }
 858
 859         if (netif_msg_ifup(dev))
 860                 devdbg(dev, "Read Value from HW_CFG : 0x%08x", read_buf);
 861
 862         read_buf |= HW_CFG_BIR_;
 863
 864         ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
 865         if (ret < 0) {
 866                 devwarn(dev, "Failed to write HW_CFG_BIR_ bit in HW_CFG "
 867                         "register, ret = %d", ret);
 868                 return ret;
 869         }
 870
 871         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 872         if (ret < 0) {
 873                 devwarn(dev, "Failed to read HW_CFG: %d", ret);
 874                 return ret;
 875         }
 876         if (netif_msg_ifup(dev))
 877                 devdbg(dev, "Read Value from HW_CFG after writing "
 878                         "HW_CFG_BIR_: 0x%08x", read_buf);
 879
 880         if (!turbo_mode) {
 881                 burst_cap = 0;
 882                 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
 883         } else if (dev->udev->speed == USB_SPEED_HIGH) {
 884                 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
 885                 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
 886         } else {
 887                 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
 888                 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
 889         }
 890
 891         if (netif_msg_ifup(dev))
 892                 devdbg(dev, "rx_urb_size=%ld", (ulong)dev->rx_urb_size);
 893
 894         ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
 895         if (ret < 0) {
 896                 devwarn(dev, "Failed to write BURST_CAP: %d", ret);
 897                 return ret;
 898         }
 899
 900         ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
 901         if (ret < 0) {
 902                 devwarn(dev, "Failed to read BURST_CAP: %d", ret);
 903                 return ret;
 904         }
 905         if (netif_msg_ifup(dev))
 906                 devdbg(dev, "Read Value from BURST_CAP after writing: 0x%08x",
 907                         read_buf);
 908
 909         read_buf = DEFAULT_BULK_IN_DELAY;
 910         ret = smsc95xx_write_reg(dev, BULK_IN_DLY, read_buf);
 911         if (ret < 0) {
 912                 devwarn(dev, "ret = %d", ret);
 913                 return ret;
 914         }
 915
 916         ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
 917         if (ret < 0) {
 918                 devwarn(dev, "Failed to read BULK_IN_DLY: %d", ret);
 919                 return ret;
 920         }
 921         if (netif_msg_ifup(dev))
 922                 devdbg(dev, "Read Value from BULK_IN_DLY after writing: "
 923                         "0x%08x", read_buf);
 924
 925         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 926         if (ret < 0) {
 927                 devwarn(dev, "Failed to read HW_CFG: %d", ret);
 928                 return ret;
 929         }
 930         if (netif_msg_ifup(dev))
 931                 devdbg(dev, "Read Value from HW_CFG: 0x%08x", read_buf);
 932
 933         if (turbo_mode)
 934                 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
 935
 936         read_buf &= ~HW_CFG_RXDOFF_;
 937
 938         /* set Rx data offset=2, Make IP header aligns on word boundary. */
 939         read_buf |= NET_IP_ALIGN << 9;
 940
 941         ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
 942         if (ret < 0) {
 943                 devwarn(dev, "Failed to write HW_CFG register, ret=%d", ret);
 944                 return ret;
 945         }
 946
 947         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 948         if (ret < 0) {
 949                 devwarn(dev, "Failed to read HW_CFG: %d", ret);
 950                 return ret;
 951         }
 952         if (netif_msg_ifup(dev))
 953                 devdbg(dev, "Read Value from HW_CFG after writing: 0x%08x",
 954                         read_buf);
 955
 956         write_buf = 0xFFFFFFFF;
 957         ret = smsc95xx_write_reg(dev, INT_STS, write_buf);
 958         if (ret < 0) {
 959                 devwarn(dev, "Failed to write INT_STS register, ret=%d", ret);
 960                 return ret;
 961         }
 962
 963         ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
 964         if (ret < 0) {
 965                 devwarn(dev, "Failed to read ID_REV: %d", ret);
 966                 return ret;
 967         }
 968         if (netif_msg_ifup(dev))
 969                 devdbg(dev, "ID_REV = 0x%08x", read_buf);
 970
 971         /* Init Tx */
 972         write_buf = 0;
 973         ret = smsc95xx_write_reg(dev, FLOW, write_buf);
 974         if (ret < 0) {
 975                 devwarn(dev, "Failed to write FLOW: %d", ret);
 976                 return ret;
 977         }
 978
 979         read_buf = AFC_CFG_DEFAULT;
 980         ret = smsc95xx_write_reg(dev, AFC_CFG, read_buf);
 981         if (ret < 0) {
 982                 devwarn(dev, "Failed to write AFC_CFG: %d", ret);
 983                 return ret;
 984         }
 985
 986         /* Don't need mac_cr_lock during initialisation */
 987         ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
 988         if (ret < 0) {
 989                 devwarn(dev, "Failed to read MAC_CR: %d", ret);
 990                 return ret;
 991         }
 992
 993         /* Init Rx */
 994         /* Set Vlan */
 995         write_buf = (u32)ETH_P_8021Q;
 996         ret = smsc95xx_write_reg(dev, VLAN1, write_buf);
 997         if (ret < 0) {
 998                 devwarn(dev, "Failed to write VAN1: %d", ret);
 999                 return ret;
1000         }
1001
1002         /* Enable or disable checksum offload engines */
1003         ethtool_op_set_tx_hw_csum(netdev, pdata->use_tx_csum);
1004         ret = smsc95xx_set_csums(dev);
1005         if (ret < 0) {
1006                 devwarn(dev, "Failed to set csum offload: %d", ret);
1007                 return ret;
1008         }
1009
1010         smsc95xx_set_multicast(dev->net);
1011
1012         if (smsc95xx_phy_initialize(dev) < 0)
1013                 return -EIO;
1014
1015         ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
1016         if (ret < 0) {
1017                 devwarn(dev, "Failed to read INT_EP_CTL: %d", ret);
1018                 return ret;
1019         }
1020
1021         /* enable PHY interrupts */
1022         read_buf |= INT_EP_CTL_PHY_INT_;
1023
1024         ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
1025         if (ret < 0) {
1026                 devwarn(dev, "Failed to write INT_EP_CTL: %d", ret);
1027                 return ret;
1028         }
1029
1030         smsc95xx_start_tx_path(dev);
1031         smsc95xx_start_rx_path(dev);
1032
1033         if (netif_msg_ifup(dev))
1034                 devdbg(dev, "smsc95xx_reset, return 0");
1035         return 0;
1036 }
1037
1038 static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
1039 {
1040         struct smsc95xx_priv *pdata = NULL;
1041         int ret;
1042
1043         printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1044
1045         ret = usbnet_get_endpoints(dev, intf);
1046         if (ret < 0) {
1047                 devwarn(dev, "usbnet_get_endpoints failed: %d", ret);
1048                 return ret;
1049         }
1050
1051         dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv),
1052                 GFP_KERNEL);
1053
1054         pdata = (struct smsc95xx_priv *)(dev->data[0]);
1055         if (!pdata) {
1056                 devwarn(dev, "Unable to allocate struct smsc95xx_priv");
1057                 return -ENOMEM;
1058         }
1059
1060         spin_lock_init(&pdata->mac_cr_lock);
1061
1062         pdata->use_tx_csum = DEFAULT_TX_CSUM_ENABLE;
1063         pdata->use_rx_csum = DEFAULT_RX_CSUM_ENABLE;
1064
1065         /* Init all registers */
1066         ret = smsc95xx_reset(dev);
1067
1068         dev->net->do_ioctl = smsc95xx_ioctl;
1069         dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
1070         dev->net->set_multicast_list = smsc95xx_set_multicast;
1071         dev->net->flags |= IFF_MULTICAST;
1072         dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD;
1073         return 0;
1074 }
1075
1076 static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1077 {
1078         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1079         if (pdata) {
1080                 if (netif_msg_ifdown(dev))
1081                         devdbg(dev, "free pdata");
1082                 kfree(pdata);
1083                 pdata = NULL;
1084                 dev->data[0] = 0;
1085         }
1086 }
1087
1088 static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
1089 {
1090         skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
1091         skb->ip_summed = CHECKSUM_COMPLETE;
1092         skb_trim(skb, skb->len - 2);
1093 }
1094
1095 static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1096 {
1097         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1098
1099         while (skb->len > 0) {
1100                 u32 header, align_count;
1101                 struct sk_buff *ax_skb;
1102                 unsigned char *packet;
1103                 u16 size;
1104
1105                 memcpy(&header, skb->data, sizeof(header));
1106                 le32_to_cpus(&header);
1107                 skb_pull(skb, 4 + NET_IP_ALIGN);
1108                 packet = skb->data;
1109
1110                 /* get the packet length */
1111                 size = (u16)((header & RX_STS_FL_) >> 16);
1112                 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
1113
1114                 if (unlikely(header & RX_STS_ES_)) {
1115                         if (netif_msg_rx_err(dev))
1116                                 devdbg(dev, "Error header=0x%08x", header);
1117                         dev->stats.rx_errors++;
1118                         dev->stats.rx_dropped++;
1119
1120                         if (header & RX_STS_CRC_) {
1121                                 dev->stats.rx_crc_errors++;
1122                         } else {
1123                                 if (header & (RX_STS_TL_ | RX_STS_RF_))
1124                                         dev->stats.rx_frame_errors++;
1125
1126                                 if ((header & RX_STS_LE_) &&
1127                                         (!(header & RX_STS_FT_)))
1128                                         dev->stats.rx_length_errors++;
1129                         }
1130                 } else {
1131                         /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1132                         if (unlikely(size > (ETH_FRAME_LEN + 12))) {
1133                                 if (netif_msg_rx_err(dev))
1134                                         devdbg(dev, "size err header=0x%08x",
1135                                                 header);
1136                                 return 0;
1137                         }
1138
1139                         /* last frame in this batch */
1140                         if (skb->len == size) {
1141                                 if (pdata->use_rx_csum)
1142                                         smsc95xx_rx_csum_offload(skb);
1143
1144                                 skb->truesize = size + sizeof(struct sk_buff);
1145
1146                                 return 1;
1147                         }
1148
1149                         ax_skb = skb_clone(skb, GFP_ATOMIC);
1150                         if (unlikely(!ax_skb)) {
1151                                 devwarn(dev, "Error allocating skb");
1152                                 return 0;
1153                         }
1154
1155                         ax_skb->len = size;
1156                         ax_skb->data = packet;
1157                         skb_set_tail_pointer(ax_skb, size);
1158
1159                         if (pdata->use_rx_csum)
1160                                 smsc95xx_rx_csum_offload(ax_skb);
1161
1162                         ax_skb->truesize = size + sizeof(struct sk_buff);
1163
1164                         usbnet_skb_return(dev, ax_skb);
1165                 }
1166
1167                 skb_pull(skb, size);
1168
1169                 /* padding bytes before the next frame starts */
1170                 if (skb->len)
1171                         skb_pull(skb, align_count);
1172         }
1173
1174         if (unlikely(skb->len < 0)) {
1175                 devwarn(dev, "invalid rx length<0 %d", skb->len);
1176                 return 0;
1177         }
1178
1179         return 1;
1180 }
1181
1182 static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb)
1183 {
1184         int len = skb->data - skb->head;
1185         u16 high_16 = (u16)(skb->csum_offset + skb->csum_start - len);
1186         u16 low_16 = (u16)(skb->csum_start - len);
1187         return (high_16 << 16) | low_16;
1188 }
1189
1190 static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev,
1191                                          struct sk_buff *skb, gfp_t flags)
1192 {
1193         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1194         bool csum = pdata->use_tx_csum && (skb->ip_summed == CHECKSUM_PARTIAL);
1195         int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD;
1196         u32 tx_cmd_a, tx_cmd_b;
1197
1198         /* We do not advertise SG, so skbs should be already linearized */
1199         BUG_ON(skb_shinfo(skb)->nr_frags);
1200
1201         if (skb_headroom(skb) < overhead) {
1202                 struct sk_buff *skb2 = skb_copy_expand(skb,
1203                         overhead, 0, flags);
1204                 dev_kfree_skb_any(skb);
1205                 skb = skb2;
1206                 if (!skb)
1207                         return NULL;
1208         }
1209
1210         if (csum) {
1211                 u32 csum_preamble = smsc95xx_calc_csum_preamble(skb);
1212                 skb_push(skb, 4);
1213                 memcpy(skb->data, &csum_preamble, 4);
1214         }
1215
1216         skb_push(skb, 4);
1217         tx_cmd_b = (u32)(skb->len - 4);
1218         if (csum)
1219                 tx_cmd_b |= TX_CMD_B_CSUM_ENABLE;
1220         cpu_to_le32s(&tx_cmd_b);
1221         memcpy(skb->data, &tx_cmd_b, 4);
1222
1223         skb_push(skb, 4);
1224         tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ |
1225                 TX_CMD_A_LAST_SEG_;
1226         cpu_to_le32s(&tx_cmd_a);
1227         memcpy(skb->data, &tx_cmd_a, 4);
1228
1229         return skb;
1230 }
1231
1232 static const struct driver_info smsc95xx_info = {
1233         .description    = "smsc95xx USB 2.0 Ethernet",
1234         .bind           = smsc95xx_bind,
1235         .unbind         = smsc95xx_unbind,
1236         .link_reset     = smsc95xx_link_reset,
1237         .reset          = smsc95xx_reset,
1238         .rx_fixup       = smsc95xx_rx_fixup,
1239         .tx_fixup       = smsc95xx_tx_fixup,
1240         .status         = smsc95xx_status,
1241         .flags          = FLAG_ETHER,
1242 };
1243
1244 static const struct usb_device_id products[] = {
1245         {
1246                 /* SMSC9500 USB Ethernet Device */
1247                 USB_DEVICE(0x0424, 0x9500),
1248                 .driver_info = (unsigned long) &smsc95xx_info,
1249         },
1250         { },            /* END */
1251 };
1252 MODULE_DEVICE_TABLE(usb, products);
1253
1254 static struct usb_driver smsc95xx_driver = {
1255         .name           = "smsc95xx",
1256         .id_table       = products,
1257         .probe          = usbnet_probe,
1258         .suspend        = usbnet_suspend,
1259         .resume         = usbnet_resume,
1260         .disconnect     = usbnet_disconnect,
1261 };
1262
1263 static int __init smsc95xx_init(void)
1264 {
1265         return usb_register(&smsc95xx_driver);
1266 }
1267 module_init(smsc95xx_init);
1268
1269 static void __exit smsc95xx_exit(void)
1270 {
1271         usb_deregister(&smsc95xx_driver);
1272 }
1273 module_exit(smsc95xx_exit);
1274
1275 MODULE_AUTHOR("Nancy Lin");
1276 MODULE_AUTHOR("Steve Glendinning <steve.glendinning@smsc.com>");
1277 MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices");
1278 MODULE_LICENSE("GPL");