drivers/net/tc35815.c

   1 /*
   2  * tc35815.c: A TOSHIBA TC35815CF PCI 10/100Mbps ethernet driver for linux.
   3  *
   4  * Based on skelton.c by Donald Becker.
   5  *
   6  * This driver is a replacement of older and less maintained version.
   7  * This is a header of the older version:
   8  *      -----<snip>-----
   9  *      Copyright 2001 MontaVista Software Inc.
  10  *      Author: MontaVista Software, Inc.
  11  *              ahennessy@mvista.com
  12  *      Copyright (C) 2000-2001 Toshiba Corporation
  13  *      static const char *version =
  14  *              "tc35815.c:v0.00 26/07/2000 by Toshiba Corporation\n";
  15  *      -----<snip>-----
  16  *
  17  * This file is subject to the terms and conditions of the GNU General Public
  18  * License.  See the file "COPYING" in the main directory of this archive
  19  * for more details.
  20  *
  21  * (C) Copyright TOSHIBA CORPORATION 2004-2005
  22  * All Rights Reserved.
  23  */
  24
  25 #ifdef TC35815_NAPI
  26 #define DRV_VERSION     "1.37-NAPI"
  27 #else
  28 #define DRV_VERSION     "1.37"
  29 #endif
  30 static const char *version = "tc35815.c:v" DRV_VERSION "\n";
  31 #define MODNAME                 "tc35815"
  32
  33 #include <linux/module.h>
  34 #include <linux/kernel.h>
  35 #include <linux/types.h>
  36 #include <linux/fcntl.h>
  37 #include <linux/interrupt.h>
  38 #include <linux/ioport.h>
  39 #include <linux/in.h>
  40 #include <linux/slab.h>
  41 #include <linux/string.h>
  42 #include <linux/spinlock.h>
  43 #include <linux/errno.h>
  44 #include <linux/init.h>
  45 #include <linux/netdevice.h>
  46 #include <linux/etherdevice.h>
  47 #include <linux/skbuff.h>
  48 #include <linux/delay.h>
  49 #include <linux/pci.h>
  50 #include <linux/phy.h>
  51 #include <linux/workqueue.h>
  52 #include <linux/platform_device.h>
  53 #include <asm/io.h>
  54 #include <asm/byteorder.h>
  55
  56 /* First, a few definitions that the brave might change. */
  57
  58 #define GATHER_TXINT    /* On-Demand Tx Interrupt */
  59 #define WORKAROUND_LOSTCAR
  60 #define WORKAROUND_100HALF_PROMISC
  61 /* #define TC35815_USE_PACKEDBUFFER */
  62
  63 enum tc35815_chiptype {
  64         TC35815CF = 0,
  65         TC35815_NWU,
  66         TC35815_TX4939,
  67 };
  68
  69 /* indexed by tc35815_chiptype, above */
  70 static const struct {
  71         const char *name;
  72 } chip_info[] __devinitdata = {
  73         { "TOSHIBA TC35815CF 10/100BaseTX" },
  74         { "TOSHIBA TC35815 with Wake on LAN" },
  75         { "TOSHIBA TC35815/TX4939" },
  76 };
  77
  78 static const struct pci_device_id tc35815_pci_tbl[] = {
  79         {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815CF), .driver_data = TC35815CF },
  80         {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_NWU), .driver_data = TC35815_NWU },
  81         {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939), .driver_data = TC35815_TX4939 },
  82         {0,}
  83 };
  84 MODULE_DEVICE_TABLE (pci, tc35815_pci_tbl);
  85
  86 /* see MODULE_PARM_DESC */
  87 static struct tc35815_options {
  88         int speed;
  89         int duplex;
  90 } options;
  91
  92 /*
  93  * Registers
  94  */
  95 struct tc35815_regs {
  96         __u32 DMA_Ctl;          /* 0x00 */
  97         __u32 TxFrmPtr;
  98         __u32 TxThrsh;
  99         __u32 TxPollCtr;
 100         __u32 BLFrmPtr;
 101         __u32 RxFragSize;
 102         __u32 Int_En;
 103         __u32 FDA_Bas;
 104         __u32 FDA_Lim;          /* 0x20 */
 105         __u32 Int_Src;
 106         __u32 unused0[2];
 107         __u32 PauseCnt;
 108         __u32 RemPauCnt;
 109         __u32 TxCtlFrmStat;
 110         __u32 unused1;
 111         __u32 MAC_Ctl;          /* 0x40 */
 112         __u32 CAM_Ctl;
 113         __u32 Tx_Ctl;
 114         __u32 Tx_Stat;
 115         __u32 Rx_Ctl;
 116         __u32 Rx_Stat;
 117         __u32 MD_Data;
 118         __u32 MD_CA;
 119         __u32 CAM_Adr;          /* 0x60 */
 120         __u32 CAM_Data;
 121         __u32 CAM_Ena;
 122         __u32 PROM_Ctl;
 123         __u32 PROM_Data;
 124         __u32 Algn_Cnt;
 125         __u32 CRC_Cnt;
 126         __u32 Miss_Cnt;
 127 };
 128
 129 /*
 130  * Bit assignments
 131  */
 132 /* DMA_Ctl bit asign ------------------------------------------------------- */
 133 #define DMA_RxAlign            0x00c00000 /* 1:Reception Alignment           */
 134 #define DMA_RxAlign_1          0x00400000
 135 #define DMA_RxAlign_2          0x00800000
 136 #define DMA_RxAlign_3          0x00c00000
 137 #define DMA_M66EnStat          0x00080000 /* 1:66MHz Enable State            */
 138 #define DMA_IntMask            0x00040000 /* 1:Interupt mask                 */
 139 #define DMA_SWIntReq           0x00020000 /* 1:Software Interrupt request    */
 140 #define DMA_TxWakeUp           0x00010000 /* 1:Transmit Wake Up              */
 141 #define DMA_RxBigE             0x00008000 /* 1:Receive Big Endian            */
 142 #define DMA_TxBigE             0x00004000 /* 1:Transmit Big Endian           */
 143 #define DMA_TestMode           0x00002000 /* 1:Test Mode                     */
 144 #define DMA_PowrMgmnt          0x00001000 /* 1:Power Management              */
 145 #define DMA_DmBurst_Mask       0x000001fc /* DMA Burst size                  */
 146
 147 /* RxFragSize bit asign ---------------------------------------------------- */
 148 #define RxFrag_EnPack          0x00008000 /* 1:Enable Packing                */
 149 #define RxFrag_MinFragMask     0x00000ffc /* Minimum Fragment                */
 150
 151 /* MAC_Ctl bit asign ------------------------------------------------------- */
 152 #define MAC_Link10             0x00008000 /* 1:Link Status 10Mbits           */
 153 #define MAC_EnMissRoll         0x00002000 /* 1:Enable Missed Roll            */
 154 #define MAC_MissRoll           0x00000400 /* 1:Missed Roll                   */
 155 #define MAC_Loop10             0x00000080 /* 1:Loop 10 Mbps                  */
 156 #define MAC_Conn_Auto          0x00000000 /*00:Connection mode (Automatic)   */
 157 #define MAC_Conn_10M           0x00000020 /*01:                (10Mbps endec)*/
 158 #define MAC_Conn_Mll           0x00000040 /*10:                (Mll clock)   */
 159 #define MAC_MacLoop            0x00000010 /* 1:MAC Loopback                  */
 160 #define MAC_FullDup            0x00000008 /* 1:Full Duplex 0:Half Duplex     */
 161 #define MAC_Reset              0x00000004 /* 1:Software Reset                */
 162 #define MAC_HaltImm            0x00000002 /* 1:Halt Immediate                */
 163 #define MAC_HaltReq            0x00000001 /* 1:Halt request                  */
 164
 165 /* PROM_Ctl bit asign ------------------------------------------------------ */
 166 #define PROM_Busy              0x00008000 /* 1:Busy (Start Operation)        */
 167 #define PROM_Read              0x00004000 /*10:Read operation                */
 168 #define PROM_Write             0x00002000 /*01:Write operation               */
 169 #define PROM_Erase             0x00006000 /*11:Erase operation               */
 170                                           /*00:Enable or Disable Writting,   */
 171                                           /*      as specified in PROM_Addr. */
 172 #define PROM_Addr_Ena          0x00000030 /*11xxxx:PROM Write enable         */
 173                                           /*00xxxx:           disable        */
 174
 175 /* CAM_Ctl bit asign ------------------------------------------------------- */
 176 #define CAM_CompEn             0x00000010 /* 1:CAM Compare Enable            */
 177 #define CAM_NegCAM             0x00000008 /* 1:Reject packets CAM recognizes,*/
 178                                           /*                    accept other */
 179 #define CAM_BroadAcc           0x00000004 /* 1:Broadcast assept              */
 180 #define CAM_GroupAcc           0x00000002 /* 1:Multicast assept              */
 181 #define CAM_StationAcc         0x00000001 /* 1:unicast accept                */
 182
 183 /* CAM_Ena bit asign ------------------------------------------------------- */
 184 #define CAM_ENTRY_MAX                  21   /* CAM Data entry max count      */
 185 #define CAM_Ena_Mask ((1<<CAM_ENTRY_MAX)-1) /* CAM Enable bits (Max 21bits)  */
 186 #define CAM_Ena_Bit(index)         (1<<(index))
 187 #define CAM_ENTRY_DESTINATION   0
 188 #define CAM_ENTRY_SOURCE        1
 189 #define CAM_ENTRY_MACCTL        20
 190
 191 /* Tx_Ctl bit asign -------------------------------------------------------- */
 192 #define Tx_En                  0x00000001 /* 1:Transmit enable               */
 193 #define Tx_TxHalt              0x00000002 /* 1:Transmit Halt Request         */
 194 #define Tx_NoPad               0x00000004 /* 1:Suppress Padding              */
 195 #define Tx_NoCRC               0x00000008 /* 1:Suppress Padding              */
 196 #define Tx_FBack               0x00000010 /* 1:Fast Back-off                 */
 197 #define Tx_EnUnder             0x00000100 /* 1:Enable Underrun               */
 198 #define Tx_EnExDefer           0x00000200 /* 1:Enable Excessive Deferral     */
 199 #define Tx_EnLCarr             0x00000400 /* 1:Enable Lost Carrier           */
 200 #define Tx_EnExColl            0x00000800 /* 1:Enable Excessive Collision    */
 201 #define Tx_EnLateColl          0x00001000 /* 1:Enable Late Collision         */
 202 #define Tx_EnTxPar             0x00002000 /* 1:Enable Transmit Parity        */
 203 #define Tx_EnComp              0x00004000 /* 1:Enable Completion             */
 204
 205 /* Tx_Stat bit asign ------------------------------------------------------- */
 206 #define Tx_TxColl_MASK         0x0000000F /* Tx Collision Count              */
 207 #define Tx_ExColl              0x00000010 /* Excessive Collision             */
 208 #define Tx_TXDefer             0x00000020 /* Transmit Defered                */
 209 #define Tx_Paused              0x00000040 /* Transmit Paused                 */
 210 #define Tx_IntTx               0x00000080 /* Interrupt on Tx                 */
 211 #define Tx_Under               0x00000100 /* Underrun                        */
 212 #define Tx_Defer               0x00000200 /* Deferral                        */
 213 #define Tx_NCarr               0x00000400 /* No Carrier                      */
 214 #define Tx_10Stat              0x00000800 /* 10Mbps Status                   */
 215 #define Tx_LateColl            0x00001000 /* Late Collision                  */
 216 #define Tx_TxPar               0x00002000 /* Tx Parity Error                 */
 217 #define Tx_Comp                0x00004000 /* Completion                      */
 218 #define Tx_Halted              0x00008000 /* Tx Halted                       */
 219 #define Tx_SQErr               0x00010000 /* Signal Quality Error(SQE)       */
 220
 221 /* Rx_Ctl bit asign -------------------------------------------------------- */
 222 #define Rx_EnGood              0x00004000 /* 1:Enable Good                   */
 223 #define Rx_EnRxPar             0x00002000 /* 1:Enable Receive Parity         */
 224 #define Rx_EnLongErr           0x00000800 /* 1:Enable Long Error             */
 225 #define Rx_EnOver              0x00000400 /* 1:Enable OverFlow               */
 226 #define Rx_EnCRCErr            0x00000200 /* 1:Enable CRC Error              */
 227 #define Rx_EnAlign             0x00000100 /* 1:Enable Alignment              */
 228 #define Rx_IgnoreCRC           0x00000040 /* 1:Ignore CRC Value              */
 229 #define Rx_StripCRC            0x00000010 /* 1:Strip CRC Value               */
 230 #define Rx_ShortEn             0x00000008 /* 1:Short Enable                  */
 231 #define Rx_LongEn              0x00000004 /* 1:Long Enable                   */
 232 #define Rx_RxHalt              0x00000002 /* 1:Receive Halt Request          */
 233 #define Rx_RxEn                0x00000001 /* 1:Receive Intrrupt Enable       */
 234
 235 /* Rx_Stat bit asign ------------------------------------------------------- */
 236 #define Rx_Halted              0x00008000 /* Rx Halted                       */
 237 #define Rx_Good                0x00004000 /* Rx Good                         */
 238 #define Rx_RxPar               0x00002000 /* Rx Parity Error                 */
 239                             /* 0x00001000    not use                         */
 240 #define Rx_LongErr             0x00000800 /* Rx Long Error                   */
 241 #define Rx_Over                0x00000400 /* Rx Overflow                     */
 242 #define Rx_CRCErr              0x00000200 /* Rx CRC Error                    */
 243 #define Rx_Align               0x00000100 /* Rx Alignment Error              */
 244 #define Rx_10Stat              0x00000080 /* Rx 10Mbps Status                */
 245 #define Rx_IntRx               0x00000040 /* Rx Interrupt                    */
 246 #define Rx_CtlRecd             0x00000020 /* Rx Control Receive              */
 247
 248 #define Rx_Stat_Mask           0x0000EFC0 /* Rx All Status Mask              */
 249
 250 /* Int_En bit asign -------------------------------------------------------- */
 251 #define Int_NRAbtEn            0x00000800 /* 1:Non-recoverable Abort Enable  */
 252 #define Int_TxCtlCmpEn         0x00000400 /* 1:Transmit Control Complete Enable */
 253 #define Int_DmParErrEn         0x00000200 /* 1:DMA Parity Error Enable       */
 254 #define Int_DParDEn            0x00000100 /* 1:Data Parity Error Enable      */
 255 #define Int_EarNotEn           0x00000080 /* 1:Early Notify Enable           */
 256 #define Int_DParErrEn          0x00000040 /* 1:Detected Parity Error Enable  */
 257 #define Int_SSysErrEn          0x00000020 /* 1:Signalled System Error Enable */
 258 #define Int_RMasAbtEn          0x00000010 /* 1:Received Master Abort Enable  */
 259 #define Int_RTargAbtEn         0x00000008 /* 1:Received Target Abort Enable  */
 260 #define Int_STargAbtEn         0x00000004 /* 1:Signalled Target Abort Enable */
 261 #define Int_BLExEn             0x00000002 /* 1:Buffer List Exhausted Enable  */
 262 #define Int_FDAExEn            0x00000001 /* 1:Free Descriptor Area          */
 263                                           /*               Exhausted Enable  */
 264
 265 /* Int_Src bit asign ------------------------------------------------------- */
 266 #define Int_NRabt              0x00004000 /* 1:Non Recoverable error         */
 267 #define Int_DmParErrStat       0x00002000 /* 1:DMA Parity Error & Clear      */
 268 #define Int_BLEx               0x00001000 /* 1:Buffer List Empty & Clear     */
 269 #define Int_FDAEx              0x00000800 /* 1:FDA Empty & Clear             */
 270 #define Int_IntNRAbt           0x00000400 /* 1:Non Recoverable Abort         */
 271 #define Int_IntCmp             0x00000200 /* 1:MAC control packet complete   */
 272 #define Int_IntExBD            0x00000100 /* 1:Interrupt Extra BD & Clear    */
 273 #define Int_DmParErr           0x00000080 /* 1:DMA Parity Error & Clear      */
 274 #define Int_IntEarNot          0x00000040 /* 1:Receive Data write & Clear    */
 275 #define Int_SWInt              0x00000020 /* 1:Software request & Clear      */
 276 #define Int_IntBLEx            0x00000010 /* 1:Buffer List Empty & Clear     */
 277 #define Int_IntFDAEx           0x00000008 /* 1:FDA Empty & Clear             */
 278 #define Int_IntPCI             0x00000004 /* 1:PCI controller & Clear        */
 279 #define Int_IntMacRx           0x00000002 /* 1:Rx controller & Clear         */
 280 #define Int_IntMacTx           0x00000001 /* 1:Tx controller & Clear         */
 281
 282 /* MD_CA bit asign --------------------------------------------------------- */
 283 #define MD_CA_PreSup           0x00001000 /* 1:Preamble Supress              */
 284 #define MD_CA_Busy             0x00000800 /* 1:Busy (Start Operation)        */
 285 #define MD_CA_Wr               0x00000400 /* 1:Write 0:Read                  */
 286
 287
 288 /*
 289  * Descriptors
 290  */
 291
 292 /* Frame descripter */
 293 struct FDesc {
 294         volatile __u32 FDNext;
 295         volatile __u32 FDSystem;
 296         volatile __u32 FDStat;
 297         volatile __u32 FDCtl;
 298 };
 299
 300 /* Buffer descripter */
 301 struct BDesc {
 302         volatile __u32 BuffData;
 303         volatile __u32 BDCtl;
 304 };
 305
 306 #define FD_ALIGN        16
 307
 308 /* Frame Descripter bit asign ---------------------------------------------- */
 309 #define FD_FDLength_MASK       0x0000FFFF /* Length MASK                     */
 310 #define FD_BDCnt_MASK          0x001F0000 /* BD count MASK in FD             */
 311 #define FD_FrmOpt_MASK         0x7C000000 /* Frame option MASK               */
 312 #define FD_FrmOpt_BigEndian    0x40000000 /* Tx/Rx */
 313 #define FD_FrmOpt_IntTx        0x20000000 /* Tx only */
 314 #define FD_FrmOpt_NoCRC        0x10000000 /* Tx only */
 315 #define FD_FrmOpt_NoPadding    0x08000000 /* Tx only */
 316 #define FD_FrmOpt_Packing      0x04000000 /* Rx only */
 317 #define FD_CownsFD             0x80000000 /* FD Controller owner bit         */
 318 #define FD_Next_EOL            0x00000001 /* FD EOL indicator                */
 319 #define FD_BDCnt_SHIFT         16
 320
 321 /* Buffer Descripter bit asign --------------------------------------------- */
 322 #define BD_BuffLength_MASK     0x0000FFFF /* Recieve Data Size               */
 323 #define BD_RxBDID_MASK         0x00FF0000 /* BD ID Number MASK               */
 324 #define BD_RxBDSeqN_MASK       0x7F000000 /* Rx BD Sequence Number           */
 325 #define BD_CownsBD             0x80000000 /* BD Controller owner bit         */
 326 #define BD_RxBDID_SHIFT        16
 327 #define BD_RxBDSeqN_SHIFT      24
 328
 329
 330 /* Some useful constants. */
 331 #undef NO_CHECK_CARRIER /* Does not check No-Carrier with TP */
 332
 333 #ifdef NO_CHECK_CARRIER
 334 #define TX_CTL_CMD      (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
 335         Tx_EnExColl | Tx_EnExDefer | Tx_EnUnder | \
 336         Tx_En)  /* maybe  0x7b01 */
 337 #else
 338 #define TX_CTL_CMD      (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
 339         Tx_EnExColl | Tx_EnLCarr | Tx_EnExDefer | Tx_EnUnder | \
 340         Tx_En)  /* maybe  0x7b01 */
 341 #endif
 342 #define RX_CTL_CMD      (Rx_EnGood | Rx_EnRxPar | Rx_EnLongErr | Rx_EnOver \
 343         | Rx_EnCRCErr | Rx_EnAlign | Rx_RxEn)   /* maybe 0x6f01 */
 344 #define INT_EN_CMD  (Int_NRAbtEn | \
 345         Int_DmParErrEn | Int_DParDEn | Int_DParErrEn | \
 346         Int_SSysErrEn  | Int_RMasAbtEn | Int_RTargAbtEn | \
 347         Int_STargAbtEn | \
 348         Int_BLExEn  | Int_FDAExEn) /* maybe 0xb7f*/
 349 #define DMA_CTL_CMD     DMA_BURST_SIZE
 350 #define HAVE_DMA_RXALIGN(lp)    likely((lp)->chiptype != TC35815CF)
 351
 352 /* Tuning parameters */
 353 #define DMA_BURST_SIZE  32
 354 #define TX_THRESHOLD    1024
 355 #define TX_THRESHOLD_MAX 1536       /* used threshold with packet max byte for low pci transfer ability.*/
 356 #define TX_THRESHOLD_KEEP_LIMIT 10  /* setting threshold max value when overrun error occured this count. */
 357
 358 /* 16 + RX_BUF_NUM * 8 + RX_FD_NUM * 16 + TX_FD_NUM * 32 <= PAGE_SIZE*FD_PAGE_NUM */
 359 #ifdef TC35815_USE_PACKEDBUFFER
 360 #define FD_PAGE_NUM 2
 361 #define RX_BUF_NUM      8       /* >= 2 */
 362 #define RX_FD_NUM       250     /* >= 32 */
 363 #define TX_FD_NUM       128
 364 #define RX_BUF_SIZE     PAGE_SIZE
 365 #else /* TC35815_USE_PACKEDBUFFER */
 366 #define FD_PAGE_NUM 4
 367 #define RX_BUF_NUM      128     /* < 256 */
 368 #define RX_FD_NUM       256     /* >= 32 */
 369 #define TX_FD_NUM       128
 370 #if RX_CTL_CMD & Rx_LongEn
 371 #define RX_BUF_SIZE     PAGE_SIZE
 372 #elif RX_CTL_CMD & Rx_StripCRC
 373 #define RX_BUF_SIZE     ALIGN(ETH_FRAME_LEN + 4 + 2, 32) /* +2: reserve */
 374 #else
 375 #define RX_BUF_SIZE     ALIGN(ETH_FRAME_LEN + 2, 32) /* +2: reserve */
 376 #endif
 377 #endif /* TC35815_USE_PACKEDBUFFER */
 378 #define RX_FD_RESERVE   (2 / 2) /* max 2 BD per RxFD */
 379 #define NAPI_WEIGHT     16
 380
 381 struct TxFD {
 382         struct FDesc fd;
 383         struct BDesc bd;
 384         struct BDesc unused;
 385 };
 386
 387 struct RxFD {
 388         struct FDesc fd;
 389         struct BDesc bd[0];     /* variable length */
 390 };
 391
 392 struct FrFD {
 393         struct FDesc fd;
 394         struct BDesc bd[RX_BUF_NUM];
 395 };
 396
 397
 398 #define tc_readl(addr)  ioread32(addr)
 399 #define tc_writel(d, addr)      iowrite32(d, addr)
 400
 401 #define TC35815_TX_TIMEOUT  msecs_to_jiffies(400)
 402
 403 /* Information that need to be kept for each controller. */
 404 struct tc35815_local {
 405         struct pci_dev *pci_dev;
 406
 407         struct net_device *dev;
 408         struct napi_struct napi;
 409
 410         /* statistics */
 411         struct {
 412                 int max_tx_qlen;
 413                 int tx_ints;
 414                 int rx_ints;
 415                 int tx_underrun;
 416         } lstats;
 417
 418         /* Tx control lock.  This protects the transmit buffer ring
 419          * state along with the "tx full" state of the driver.  This
 420          * means all netif_queue flow control actions are protected
 421          * by this lock as well.
 422          */
 423         spinlock_t lock;
 424
 425         struct mii_bus mii_bus;
 426         struct phy_device *phy_dev;
 427         int duplex;
 428         int speed;
 429         int link;
 430         struct work_struct restart_work;
 431
 432         /*
 433          * Transmitting: Batch Mode.
 434          *      1 BD in 1 TxFD.
 435          * Receiving: Packing Mode. (TC35815_USE_PACKEDBUFFER)
 436          *      1 circular FD for Free Buffer List.
 437          *      RX_BUF_NUM BD in Free Buffer FD.
 438          *      One Free Buffer BD has PAGE_SIZE data buffer.
 439          * Or Non-Packing Mode.
 440          *      1 circular FD for Free Buffer List.
 441          *      RX_BUF_NUM BD in Free Buffer FD.
 442          *      One Free Buffer BD has ETH_FRAME_LEN data buffer.
 443          */
 444         void * fd_buf;  /* for TxFD, RxFD, FrFD */
 445         dma_addr_t fd_buf_dma;
 446         struct TxFD *tfd_base;
 447         unsigned int tfd_start;
 448         unsigned int tfd_end;
 449         struct RxFD *rfd_base;
 450         struct RxFD *rfd_limit;
 451         struct RxFD *rfd_cur;
 452         struct FrFD *fbl_ptr;
 453 #ifdef TC35815_USE_PACKEDBUFFER
 454         unsigned char fbl_curid;
 455         void * data_buf[RX_BUF_NUM];            /* packing */
 456         dma_addr_t data_buf_dma[RX_BUF_NUM];
 457         struct {
 458                 struct sk_buff *skb;
 459                 dma_addr_t skb_dma;
 460         } tx_skbs[TX_FD_NUM];
 461 #else
 462         unsigned int fbl_count;
 463         struct {
 464                 struct sk_buff *skb;
 465                 dma_addr_t skb_dma;
 466         } tx_skbs[TX_FD_NUM], rx_skbs[RX_BUF_NUM];
 467 #endif
 468         u32 msg_enable;
 469         enum tc35815_chiptype chiptype;
 470 };
 471
 472 static inline dma_addr_t fd_virt_to_bus(struct tc35815_local *lp, void *virt)
 473 {
 474         return lp->fd_buf_dma + ((u8 *)virt - (u8 *)lp->fd_buf);
 475 }
 476 #ifdef DEBUG
 477 static inline void *fd_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
 478 {
 479         return (void *)((u8 *)lp->fd_buf + (bus - lp->fd_buf_dma));
 480 }
 481 #endif
 482 #ifdef TC35815_USE_PACKEDBUFFER
 483 static inline void *rxbuf_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
 484 {
 485         int i;
 486         for (i = 0; i < RX_BUF_NUM; i++) {
 487                 if (bus >= lp->data_buf_dma[i] &&
 488                     bus < lp->data_buf_dma[i] + PAGE_SIZE)
 489                         return (void *)((u8 *)lp->data_buf[i] +
 490                                         (bus - lp->data_buf_dma[i]));
 491         }
 492         return NULL;
 493 }
 494
 495 #define TC35815_DMA_SYNC_ONDEMAND
 496 static void* alloc_rxbuf_page(struct pci_dev *hwdev, dma_addr_t *dma_handle)
 497 {
 498 #ifdef TC35815_DMA_SYNC_ONDEMAND
 499         void *buf;
 500         /* pci_map + pci_dma_sync will be more effective than
 501          * pci_alloc_consistent on some archs. */
 502         if ((buf = (void *)__get_free_page(GFP_ATOMIC)) == NULL)
 503                 return NULL;
 504         *dma_handle = pci_map_single(hwdev, buf, PAGE_SIZE,
 505                                      PCI_DMA_FROMDEVICE);
 506         if (pci_dma_mapping_error(*dma_handle)) {
 507                 free_page((unsigned long)buf);
 508                 return NULL;
 509         }
 510         return buf;
 511 #else
 512         return pci_alloc_consistent(hwdev, PAGE_SIZE, dma_handle);
 513 #endif
 514 }
 515
 516 static void free_rxbuf_page(struct pci_dev *hwdev, void *buf, dma_addr_t dma_handle)
 517 {
 518 #ifdef TC35815_DMA_SYNC_ONDEMAND
 519         pci_unmap_single(hwdev, dma_handle, PAGE_SIZE, PCI_DMA_FROMDEVICE);
 520         free_page((unsigned long)buf);
 521 #else
 522         pci_free_consistent(hwdev, PAGE_SIZE, buf, dma_handle);
 523 #endif
 524 }
 525 #else /* TC35815_USE_PACKEDBUFFER */
 526 static struct sk_buff *alloc_rxbuf_skb(struct net_device *dev,
 527                                        struct pci_dev *hwdev,
 528                                        dma_addr_t *dma_handle)
 529 {
 530         struct sk_buff *skb;
 531         skb = dev_alloc_skb(RX_BUF_SIZE);
 532         if (!skb)
 533                 return NULL;
 534         *dma_handle = pci_map_single(hwdev, skb->data, RX_BUF_SIZE,
 535                                      PCI_DMA_FROMDEVICE);
 536         if (pci_dma_mapping_error(*dma_handle)) {
 537                 dev_kfree_skb_any(skb);
 538                 return NULL;
 539         }
 540         skb_reserve(skb, 2);    /* make IP header 4byte aligned */
 541         return skb;
 542 }
 543
 544 static void free_rxbuf_skb(struct pci_dev *hwdev, struct sk_buff *skb, dma_addr_t dma_handle)
 545 {
 546         pci_unmap_single(hwdev, dma_handle, RX_BUF_SIZE,
 547                          PCI_DMA_FROMDEVICE);
 548         dev_kfree_skb_any(skb);
 549 }
 550 #endif /* TC35815_USE_PACKEDBUFFER */
 551
 552 /* Index to functions, as function prototypes. */
 553
 554 static int      tc35815_open(struct net_device *dev);
 555 static int      tc35815_send_packet(struct sk_buff *skb, struct net_device *dev);
 556 static irqreturn_t      tc35815_interrupt(int irq, void *dev_id);
 557 #ifdef TC35815_NAPI
 558 static int      tc35815_rx(struct net_device *dev, int limit);
 559 static int      tc35815_poll(struct napi_struct *napi, int budget);
 560 #else
 561 static void     tc35815_rx(struct net_device *dev);
 562 #endif
 563 static void     tc35815_txdone(struct net_device *dev);
 564 static int      tc35815_close(struct net_device *dev);
 565 static struct   net_device_stats *tc35815_get_stats(struct net_device *dev);
 566 static void     tc35815_set_multicast_list(struct net_device *dev);
 567 static void     tc35815_tx_timeout(struct net_device *dev);
 568 static int      tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
 569 #ifdef CONFIG_NET_POLL_CONTROLLER
 570 static void     tc35815_poll_controller(struct net_device *dev);
 571 #endif
 572 static const struct ethtool_ops tc35815_ethtool_ops;
 573
 574 /* Example routines you must write ;->. */
 575 static void     tc35815_chip_reset(struct net_device *dev);
 576 static void     tc35815_chip_init(struct net_device *dev);
 577
 578 #ifdef DEBUG
 579 static void     panic_queues(struct net_device *dev);
 580 #endif
 581
 582 static void tc35815_restart_work(struct work_struct *work);
 583
 584 static int tc_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
 585 {
 586         struct net_device *dev = bus->priv;
 587         struct tc35815_regs __iomem *tr =
 588                 (struct tc35815_regs __iomem *)dev->base_addr;
 589         unsigned long timeout = jiffies + 10;
 590
 591         tc_writel(MD_CA_Busy | (mii_id << 5) | (regnum & 0x1f), &tr->MD_CA);
 592         while (tc_readl(&tr->MD_CA) & MD_CA_Busy) {
 593                 if (time_after(jiffies, timeout))
 594                         return -EIO;
 595                 cpu_relax();
 596         }
 597         return tc_readl(&tr->MD_Data) & 0xffff;
 598 }
 599
 600 static int tc_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 val)
 601 {
 602         struct net_device *dev = bus->priv;
 603         struct tc35815_regs __iomem *tr =
 604                 (struct tc35815_regs __iomem *)dev->base_addr;
 605         unsigned long timeout = jiffies + 10;
 606
 607         tc_writel(val, &tr->MD_Data);
 608         tc_writel(MD_CA_Busy | MD_CA_Wr | (mii_id << 5) | (regnum & 0x1f),
 609                   &tr->MD_CA);
 610         while (tc_readl(&tr->MD_CA) & MD_CA_Busy) {
 611                 if (time_after(jiffies, timeout))
 612                         return -EIO;
 613                 cpu_relax();
 614         }
 615         return 0;
 616 }
 617
 618 static void tc_handle_link_change(struct net_device *dev)
 619 {
 620         struct tc35815_local *lp = netdev_priv(dev);
 621         struct phy_device *phydev = lp->phy_dev;
 622         unsigned long flags;
 623         int status_change = 0;
 624
 625         spin_lock_irqsave(&lp->lock, flags);
 626         if (phydev->link &&
 627             (lp->speed != phydev->speed || lp->duplex != phydev->duplex)) {
 628                 struct tc35815_regs __iomem *tr =
 629                         (struct tc35815_regs __iomem *)dev->base_addr;
 630                 u32 reg;
 631
 632                 reg = tc_readl(&tr->MAC_Ctl);
 633                 reg |= MAC_HaltReq;
 634                 tc_writel(reg, &tr->MAC_Ctl);
 635                 if (phydev->duplex == DUPLEX_FULL)
 636                         reg |= MAC_FullDup;
 637                 else
 638                         reg &= ~MAC_FullDup;
 639                 tc_writel(reg, &tr->MAC_Ctl);
 640                 reg &= ~MAC_HaltReq;
 641                 tc_writel(reg, &tr->MAC_Ctl);
 642
 643                 /*
 644                  * TX4939 PCFG.SPEEDn bit will be changed on
 645                  * NETDEV_CHANGE event.
 646                  */
 647
 648 #if !defined(NO_CHECK_CARRIER) && defined(WORKAROUND_LOSTCAR)
 649                 /*
 650                  * WORKAROUND: enable LostCrS only if half duplex
 651                  * operation.
 652                  * (TX4939 does not have EnLCarr)
 653                  */
 654                 if (phydev->duplex == DUPLEX_HALF &&
 655                     lp->chiptype != TC35815_TX4939)
 656                         tc_writel(tc_readl(&tr->Tx_Ctl) | Tx_EnLCarr,
 657                                   &tr->Tx_Ctl);
 658 #endif
 659
 660                 lp->speed = phydev->speed;
 661                 lp->duplex = phydev->duplex;
 662                 status_change = 1;
 663         }
 664
 665         if (phydev->link != lp->link) {
 666                 if (phydev->link) {
 667 #ifdef WORKAROUND_100HALF_PROMISC
 668                         /* delayed promiscuous enabling */
 669                         if (dev->flags & IFF_PROMISC)
 670                                 tc35815_set_multicast_list(dev);
 671 #endif
 672                         netif_schedule(dev);
 673                 } else {
 674                         lp->speed = 0;
 675                         lp->duplex = -1;
 676                 }
 677                 lp->link = phydev->link;
 678
 679                 status_change = 1;
 680         }
 681         spin_unlock_irqrestore(&lp->lock, flags);
 682
 683         if (status_change && netif_msg_link(lp)) {
 684                 phy_print_status(phydev);
 685 #ifdef DEBUG
 686                 printk(KERN_DEBUG
 687                        "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
 688                        dev->name,
 689                        phy_read(phydev, MII_BMCR),
 690                        phy_read(phydev, MII_BMSR),
 691                        phy_read(phydev, MII_LPA));
 692 #endif
 693         }
 694 }
 695
 696 static int tc_mii_probe(struct net_device *dev)
 697 {
 698         struct tc35815_local *lp = netdev_priv(dev);
 699         struct phy_device *phydev = NULL;
 700         int phy_addr;
 701         u32 dropmask;
 702
 703         /* find the first phy */
 704         for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
 705                 if (lp->mii_bus.phy_map[phy_addr]) {
 706                         if (phydev) {
 707                                 printk(KERN_ERR "%s: multiple PHYs found\n",
 708                                        dev->name);
 709                                 return -EINVAL;
 710                         }
 711                         phydev = lp->mii_bus.phy_map[phy_addr];
 712                         break;
 713                 }
 714         }
 715
 716         if (!phydev) {
 717                 printk(KERN_ERR "%s: no PHY found\n", dev->name);
 718                 return -ENODEV;
 719         }
 720
 721         /* attach the mac to the phy */
 722         phydev = phy_connect(dev, phydev->dev.bus_id,
 723                              &tc_handle_link_change, 0,
 724                              lp->chiptype == TC35815_TX4939 ?
 725                              PHY_INTERFACE_MODE_RMII : PHY_INTERFACE_MODE_MII);
 726         if (IS_ERR(phydev)) {
 727                 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
 728                 return PTR_ERR(phydev);
 729         }
 730         printk(KERN_INFO "%s: attached PHY driver [%s] "
 731                 "(mii_bus:phy_addr=%s, id=%x)\n",
 732                 dev->name, phydev->drv->name, phydev->dev.bus_id,
 733                 phydev->phy_id);
 734
 735         /* mask with MAC supported features */
 736         phydev->supported &= PHY_BASIC_FEATURES;
 737         dropmask = 0;
 738         if (options.speed == 10)
 739                 dropmask |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
 740         else if (options.speed == 100)
 741                 dropmask |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
 742         if (options.duplex == 1)
 743                 dropmask |= SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Full;
 744         else if (options.duplex == 2)
 745                 dropmask |= SUPPORTED_10baseT_Half | SUPPORTED_100baseT_Half;
 746         phydev->supported &= ~dropmask;
 747         phydev->advertising = phydev->supported;
 748
 749         lp->link = 0;
 750         lp->speed = 0;
 751         lp->duplex = -1;
 752         lp->phy_dev = phydev;
 753
 754         return 0;
 755 }
 756
 757 static int tc_mii_init(struct net_device *dev)
 758 {
 759         struct tc35815_local *lp = netdev_priv(dev);
 760         int err;
 761         int i;
 762
 763         lp->mii_bus.name = "tc35815_mii_bus";
 764         lp->mii_bus.read = tc_mdio_read;
 765         lp->mii_bus.write = tc_mdio_write;
 766         lp->mii_bus.id = (lp->pci_dev->bus->number << 8) | lp->pci_dev->devfn;
 767         lp->mii_bus.priv = dev;
 768         lp->mii_bus.dev = &lp->pci_dev->dev;
 769         lp->mii_bus.irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
 770         if (!lp->mii_bus.irq) {
 771                 err = -ENOMEM;
 772                 goto err_out;
 773         }
 774
 775         for (i = 0; i < PHY_MAX_ADDR; i++)
 776                 lp->mii_bus.irq[i] = PHY_POLL;
 777
 778         err = mdiobus_register(&lp->mii_bus);
 779         if (err)
 780                 goto err_out_free_mdio_irq;
 781         err = tc_mii_probe(dev);
 782         if (err)
 783                 goto err_out_unregister_bus;
 784         return 0;
 785
 786 err_out_unregister_bus:
 787         mdiobus_unregister(&lp->mii_bus);
 788 err_out_free_mdio_irq:
 789         kfree(lp->mii_bus.irq);
 790 err_out:
 791         return err;
 792 }
 793
 794 #ifdef CONFIG_CPU_TX49XX
 795 /*
 796  * Find a platform_device providing a MAC address.  The platform code
 797  * should provide a "tc35815-mac" device with a MAC address in its
 798  * platform_data.
 799  */
 800 static int __devinit tc35815_mac_match(struct device *dev, void *data)
 801 {
 802         struct platform_device *plat_dev = to_platform_device(dev);
 803         struct pci_dev *pci_dev = data;
 804         unsigned int id = pci_dev->irq;
 805         return !strcmp(plat_dev->name, "tc35815-mac") && plat_dev->id == id;
 806 }
 807
 808 static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
 809 {
 810         struct tc35815_local *lp = netdev_priv(dev);
 811         struct device *pd = bus_find_device(&platform_bus_type, NULL,
 812                                             lp->pci_dev, tc35815_mac_match);
 813         if (pd) {
 814                 if (pd->platform_data)
 815                         memcpy(dev->dev_addr, pd->platform_data, ETH_ALEN);
 816                 put_device(pd);
 817                 return is_valid_ether_addr(dev->dev_addr) ? 0 : -ENODEV;
 818         }
 819         return -ENODEV;
 820 }
 821 #else
 822 static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
 823 {
 824         return -ENODEV;
 825 }
 826 #endif
 827
 828 static int __devinit tc35815_init_dev_addr (struct net_device *dev)
 829 {
 830         struct tc35815_regs __iomem *tr =
 831                 (struct tc35815_regs __iomem *)dev->base_addr;
 832         int i;
 833
 834         while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
 835                 ;
 836         for (i = 0; i < 6; i += 2) {
 837                 unsigned short data;
 838                 tc_writel(PROM_Busy | PROM_Read | (i / 2 + 2), &tr->PROM_Ctl);
 839                 while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
 840                         ;
 841                 data = tc_readl(&tr->PROM_Data);
 842                 dev->dev_addr[i] = data & 0xff;
 843                 dev->dev_addr[i+1] = data >> 8;
 844         }
 845         if (!is_valid_ether_addr(dev->dev_addr))
 846                 return tc35815_read_plat_dev_addr(dev);
 847         return 0;
 848 }
 849
 850 static int __devinit tc35815_init_one (struct pci_dev *pdev,
 851                                        const struct pci_device_id *ent)
 852 {
 853         void __iomem *ioaddr = NULL;
 854         struct net_device *dev;
 855         struct tc35815_local *lp;
 856         int rc;
 857         DECLARE_MAC_BUF(mac);
 858
 859         static int printed_version;
 860         if (!printed_version++) {
 861                 printk(version);
 862                 dev_printk(KERN_DEBUG, &pdev->dev,
 863                            "speed:%d duplex:%d\n",
 864                            options.speed, options.duplex);
 865         }
 866
 867         if (!pdev->irq) {
 868                 dev_warn(&pdev->dev, "no IRQ assigned.\n");
 869                 return -ENODEV;
 870         }
 871
 872         /* dev zeroed in alloc_etherdev */
 873         dev = alloc_etherdev (sizeof (*lp));
 874         if (dev == NULL) {
 875                 dev_err(&pdev->dev, "unable to alloc new ethernet\n");
 876                 return -ENOMEM;
 877         }
 878         SET_NETDEV_DEV(dev, &pdev->dev);
 879         lp = netdev_priv(dev);
 880         lp->dev = dev;
 881
 882         /* enable device (incl. PCI PM wakeup), and bus-mastering */
 883         rc = pcim_enable_device(pdev);
 884         if (rc)
 885                 goto err_out;
 886         rc = pcim_iomap_regions(pdev, 1 << 1, MODNAME);
 887         if (rc)
 888                 goto err_out;
 889         pci_set_master(pdev);
 890         ioaddr = pcim_iomap_table(pdev)[1];
 891
 892         /* Initialize the device structure. */
 893         dev->open = tc35815_open;
 894         dev->hard_start_xmit = tc35815_send_packet;
 895         dev->stop = tc35815_close;
 896         dev->get_stats = tc35815_get_stats;
 897         dev->set_multicast_list = tc35815_set_multicast_list;
 898         dev->do_ioctl = tc35815_ioctl;
 899         dev->ethtool_ops = &tc35815_ethtool_ops;
 900         dev->tx_timeout = tc35815_tx_timeout;
 901         dev->watchdog_timeo = TC35815_TX_TIMEOUT;
 902 #ifdef TC35815_NAPI
 903         netif_napi_add(dev, &lp->napi, tc35815_poll, NAPI_WEIGHT);
 904 #endif
 905 #ifdef CONFIG_NET_POLL_CONTROLLER
 906         dev->poll_controller = tc35815_poll_controller;
 907 #endif
 908
 909         dev->irq = pdev->irq;
 910         dev->base_addr = (unsigned long) ioaddr;
 911
 912         INIT_WORK(&lp->restart_work, tc35815_restart_work);
 913         spin_lock_init(&lp->lock);
 914         lp->pci_dev = pdev;
 915         lp->chiptype = ent->driver_data;
 916
 917         lp->msg_enable = NETIF_MSG_TX_ERR | NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK;
 918         pci_set_drvdata(pdev, dev);
 919
 920         /* Soft reset the chip. */
 921         tc35815_chip_reset(dev);
 922
 923         /* Retrieve the ethernet address. */
 924         if (tc35815_init_dev_addr(dev)) {
 925                 dev_warn(&pdev->dev, "not valid ether addr\n");
 926                 random_ether_addr(dev->dev_addr);
 927         }
 928
 929         rc = register_netdev (dev);
 930         if (rc)
 931                 goto err_out;
 932
 933         memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
 934         printk(KERN_INFO "%s: %s at 0x%lx, %s, IRQ %d\n",
 935                 dev->name,
 936                 chip_info[ent->driver_data].name,
 937                 dev->base_addr,
 938                 print_mac(mac, dev->dev_addr),
 939                 dev->irq);
 940
 941         rc = tc_mii_init(dev);
 942         if (rc)
 943                 goto err_out_unregister;
 944
 945         return 0;
 946
 947 err_out_unregister:
 948         unregister_netdev(dev);
 949 err_out:
 950         free_netdev (dev);
 951         return rc;
 952 }
 953
 954
 955 static void __devexit tc35815_remove_one (struct pci_dev *pdev)
 956 {
 957         struct net_device *dev = pci_get_drvdata (pdev);
 958         struct tc35815_local *lp = netdev_priv(dev);
 959
 960         phy_disconnect(lp->phy_dev);
 961         mdiobus_unregister(&lp->mii_bus);
 962         kfree(lp->mii_bus.irq);
 963         unregister_netdev (dev);
 964         free_netdev (dev);
 965
 966         pci_set_drvdata (pdev, NULL);
 967 }
 968
 969 static int
 970 tc35815_init_queues(struct net_device *dev)
 971 {
 972         struct tc35815_local *lp = netdev_priv(dev);
 973         int i;
 974         unsigned long fd_addr;
 975
 976         if (!lp->fd_buf) {
 977                 BUG_ON(sizeof(struct FDesc) +
 978                        sizeof(struct BDesc) * RX_BUF_NUM +
 979                        sizeof(struct FDesc) * RX_FD_NUM +
 980                        sizeof(struct TxFD) * TX_FD_NUM >
 981                        PAGE_SIZE * FD_PAGE_NUM);
 982
 983                 if ((lp->fd_buf = pci_alloc_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM, &lp->fd_buf_dma)) == 0)
 984                         return -ENOMEM;
 985                 for (i = 0; i < RX_BUF_NUM; i++) {
 986 #ifdef TC35815_USE_PACKEDBUFFER
 987                         if ((lp->data_buf[i] = alloc_rxbuf_page(lp->pci_dev, &lp->data_buf_dma[i])) == NULL) {
 988                                 while (--i >= 0) {
 989                                         free_rxbuf_page(lp->pci_dev,
 990                                                         lp->data_buf[i],
 991                                                         lp->data_buf_dma[i]);
 992                                         lp->data_buf[i] = NULL;
 993                                 }
 994                                 pci_free_consistent(lp->pci_dev,
 995                                                     PAGE_SIZE * FD_PAGE_NUM,
 996                                                     lp->fd_buf,
 997                                                     lp->fd_buf_dma);
 998                                 lp->fd_buf = NULL;
 999                                 return -ENOMEM;
1000                         }
1001 #else
1002                         lp->rx_skbs[i].skb =
1003                                 alloc_rxbuf_skb(dev, lp->pci_dev,
1004                                                 &lp->rx_skbs[i].skb_dma);
1005                         if (!lp->rx_skbs[i].skb) {
1006                                 while (--i >= 0) {
1007                                         free_rxbuf_skb(lp->pci_dev,
1008                                                        lp->rx_skbs[i].skb,
1009                                                        lp->rx_skbs[i].skb_dma);
1010                                         lp->rx_skbs[i].skb = NULL;
1011                                 }
1012                                 pci_free_consistent(lp->pci_dev,
1013                                                     PAGE_SIZE * FD_PAGE_NUM,
1014                                                     lp->fd_buf,
1015                                                     lp->fd_buf_dma);
1016                                 lp->fd_buf = NULL;
1017                                 return -ENOMEM;
1018                         }
1019 #endif
1020                 }
1021                 printk(KERN_DEBUG "%s: FD buf %p DataBuf",
1022                        dev->name, lp->fd_buf);
1023 #ifdef TC35815_USE_PACKEDBUFFER
1024                 printk(" DataBuf");
1025                 for (i = 0; i < RX_BUF_NUM; i++)
1026                         printk(" %p", lp->data_buf[i]);
1027 #endif
1028                 printk("\n");
1029         } else {
1030                 for (i = 0; i < FD_PAGE_NUM; i++) {
1031                         clear_page((void *)((unsigned long)lp->fd_buf + i * PAGE_SIZE));
1032                 }
1033         }
1034         fd_addr = (unsigned long)lp->fd_buf;
1035
1036         /* Free Descriptors (for Receive) */
1037         lp->rfd_base = (struct RxFD *)fd_addr;
1038         fd_addr += sizeof(struct RxFD) * RX_FD_NUM;
1039         for (i = 0; i < RX_FD_NUM; i++) {
1040                 lp->rfd_base[i].fd.FDCtl = cpu_to_le32(FD_CownsFD);
1041         }
1042         lp->rfd_cur = lp->rfd_base;
1043         lp->rfd_limit = (struct RxFD *)fd_addr - (RX_FD_RESERVE + 1);
1044
1045         /* Transmit Descriptors */
1046         lp->tfd_base = (struct TxFD *)fd_addr;
1047         fd_addr += sizeof(struct TxFD) * TX_FD_NUM;
1048         for (i = 0; i < TX_FD_NUM; i++) {
1049                 lp->tfd_base[i].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[i+1]));
1050                 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
1051                 lp->tfd_base[i].fd.FDCtl = cpu_to_le32(0);
1052         }
1053         lp->tfd_base[TX_FD_NUM-1].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[0]));
1054         lp->tfd_start = 0;
1055         lp->tfd_end = 0;
1056
1057         /* Buffer List (for Receive) */
1058         lp->fbl_ptr = (struct FrFD *)fd_addr;
1059         lp->fbl_ptr->fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, lp->fbl_ptr));
1060         lp->fbl_ptr->fd.FDCtl = cpu_to_le32(RX_BUF_NUM | FD_CownsFD);
1061 #ifndef TC35815_USE_PACKEDBUFFER
1062         /*
1063          * move all allocated skbs to head of rx_skbs[] array.
1064          * fbl_count mighe not be RX_BUF_NUM if alloc_rxbuf_skb() in
1065          * tc35815_rx() had failed.
1066          */
1067         lp->fbl_count = 0;
1068         for (i = 0; i < RX_BUF_NUM; i++) {
1069                 if (lp->rx_skbs[i].skb) {
1070                         if (i != lp->fbl_count) {
1071                                 lp->rx_skbs[lp->fbl_count].skb =
1072                                         lp->rx_skbs[i].skb;
1073                                 lp->rx_skbs[lp->fbl_count].skb_dma =
1074                                         lp->rx_skbs[i].skb_dma;
1075                         }
1076                         lp->fbl_count++;
1077                 }
1078         }
1079 #endif
1080         for (i = 0; i < RX_BUF_NUM; i++) {
1081 #ifdef TC35815_USE_PACKEDBUFFER
1082                 lp->fbl_ptr->bd[i].BuffData = cpu_to_le32(lp->data_buf_dma[i]);
1083 #else
1084                 if (i >= lp->fbl_count) {
1085                         lp->fbl_ptr->bd[i].BuffData = 0;
1086                         lp->fbl_ptr->bd[i].BDCtl = 0;
1087                         continue;
1088                 }
1089                 lp->fbl_ptr->bd[i].BuffData =
1090                         cpu_to_le32(lp->rx_skbs[i].skb_dma);
1091 #endif
1092                 /* BDID is index of FrFD.bd[] */
1093                 lp->fbl_ptr->bd[i].BDCtl =
1094                         cpu_to_le32(BD_CownsBD | (i << BD_RxBDID_SHIFT) |
1095                                     RX_BUF_SIZE);
1096         }
1097 #ifdef TC35815_USE_PACKEDBUFFER
1098         lp->fbl_curid = 0;
1099 #endif
1100
1101         printk(KERN_DEBUG "%s: TxFD %p RxFD %p FrFD %p\n",
1102                dev->name, lp->tfd_base, lp->rfd_base, lp->fbl_ptr);
1103         return 0;
1104 }
1105
1106 static void
1107 tc35815_clear_queues(struct net_device *dev)
1108 {
1109         struct tc35815_local *lp = netdev_priv(dev);
1110         int i;
1111
1112         for (i = 0; i < TX_FD_NUM; i++) {
1113                 u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
1114                 struct sk_buff *skb =
1115                         fdsystem != 0xffffffff ?
1116                         lp->tx_skbs[fdsystem].skb : NULL;
1117 #ifdef DEBUG
1118                 if (lp->tx_skbs[i].skb != skb) {
1119                         printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
1120                         panic_queues(dev);
1121                 }
1122 #else
1123                 BUG_ON(lp->tx_skbs[i].skb != skb);
1124 #endif
1125                 if (skb) {
1126                         pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
1127                         lp->tx_skbs[i].skb = NULL;
1128                         lp->tx_skbs[i].skb_dma = 0;
1129                         dev_kfree_skb_any(skb);
1130                 }
1131                 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
1132         }
1133
1134         tc35815_init_queues(dev);
1135 }
1136
1137 static void
1138 tc35815_free_queues(struct net_device *dev)
1139 {
1140         struct tc35815_local *lp = netdev_priv(dev);
1141         int i;
1142
1143         if (lp->tfd_base) {
1144                 for (i = 0; i < TX_FD_NUM; i++) {
1145                         u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
1146                         struct sk_buff *skb =
1147                                 fdsystem != 0xffffffff ?
1148                                 lp->tx_skbs[fdsystem].skb : NULL;
1149 #ifdef DEBUG
1150                         if (lp->tx_skbs[i].skb != skb) {
1151                                 printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
1152                                 panic_queues(dev);
1153                         }
1154 #else
1155                         BUG_ON(lp->tx_skbs[i].skb != skb);
1156 #endif
1157                         if (skb) {
1158                                 dev_kfree_skb(skb);
1159                                 pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
1160                                 lp->tx_skbs[i].skb = NULL;
1161                                 lp->tx_skbs[i].skb_dma = 0;
1162                         }
1163                         lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
1164                 }
1165         }
1166
1167         lp->rfd_base = NULL;
1168         lp->rfd_limit = NULL;
1169         lp->rfd_cur = NULL;
1170         lp->fbl_ptr = NULL;
1171
1172         for (i = 0; i < RX_BUF_NUM; i++) {
1173 #ifdef TC35815_USE_PACKEDBUFFER
1174                 if (lp->data_buf[i]) {
1175                         free_rxbuf_page(lp->pci_dev,
1176                                         lp->data_buf[i], lp->data_buf_dma[i]);
1177                         lp->data_buf[i] = NULL;
1178                 }
1179 #else
1180                 if (lp->rx_skbs[i].skb) {
1181                         free_rxbuf_skb(lp->pci_dev, lp->rx_skbs[i].skb,
1182                                        lp->rx_skbs[i].skb_dma);
1183                         lp->rx_skbs[i].skb = NULL;
1184                 }
1185 #endif
1186         }
1187         if (lp->fd_buf) {
1188                 pci_free_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM,
1189                                     lp->fd_buf, lp->fd_buf_dma);
1190                 lp->fd_buf = NULL;
1191         }
1192 }
1193
1194 static void
1195 dump_txfd(struct TxFD *fd)
1196 {
1197         printk("TxFD(%p): %08x %08x %08x %08x\n", fd,
1198                le32_to_cpu(fd->fd.FDNext),
1199                le32_to_cpu(fd->fd.FDSystem),
1200                le32_to_cpu(fd->fd.FDStat),
1201                le32_to_cpu(fd->fd.FDCtl));
1202         printk("BD: ");
1203         printk(" %08x %08x",
1204                le32_to_cpu(fd->bd.BuffData),
1205                le32_to_cpu(fd->bd.BDCtl));
1206         printk("\n");
1207 }
1208
1209 static int
1210 dump_rxfd(struct RxFD *fd)
1211 {
1212         int i, bd_count = (le32_to_cpu(fd->fd.FDCtl) & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
1213         if (bd_count > 8)
1214                 bd_count = 8;
1215         printk("RxFD(%p): %08x %08x %08x %08x\n", fd,
1216                le32_to_cpu(fd->fd.FDNext),
1217                le32_to_cpu(fd->fd.FDSystem),
1218                le32_to_cpu(fd->fd.FDStat),
1219                le32_to_cpu(fd->fd.FDCtl));
1220         if (le32_to_cpu(fd->fd.FDCtl) & FD_CownsFD)
1221             return 0;
1222         printk("BD: ");
1223         for (i = 0; i < bd_count; i++)
1224                 printk(" %08x %08x",
1225                        le32_to_cpu(fd->bd[i].BuffData),
1226                        le32_to_cpu(fd->bd[i].BDCtl));
1227         printk("\n");
1228         return bd_count;
1229 }
1230
1231 #if defined(DEBUG) || defined(TC35815_USE_PACKEDBUFFER)
1232 static void
1233 dump_frfd(struct FrFD *fd)
1234 {
1235         int i;
1236         printk("FrFD(%p): %08x %08x %08x %08x\n", fd,
1237                le32_to_cpu(fd->fd.FDNext),
1238                le32_to_cpu(fd->fd.FDSystem),
1239                le32_to_cpu(fd->fd.FDStat),
1240                le32_to_cpu(fd->fd.FDCtl));
1241         printk("BD: ");
1242         for (i = 0; i < RX_BUF_NUM; i++)
1243                 printk(" %08x %08x",
1244                        le32_to_cpu(fd->bd[i].BuffData),
1245                        le32_to_cpu(fd->bd[i].BDCtl));
1246         printk("\n");
1247 }
1248 #endif
1249
1250 #ifdef DEBUG
1251 static void
1252 panic_queues(struct net_device *dev)
1253 {
1254         struct tc35815_local *lp = netdev_priv(dev);
1255         int i;
1256
1257         printk("TxFD base %p, start %u, end %u\n",
1258                lp->tfd_base, lp->tfd_start, lp->tfd_end);
1259         printk("RxFD base %p limit %p cur %p\n",
1260                lp->rfd_base, lp->rfd_limit, lp->rfd_cur);
1261         printk("FrFD %p\n", lp->fbl_ptr);
1262         for (i = 0; i < TX_FD_NUM; i++)
1263                 dump_txfd(&lp->tfd_base[i]);
1264         for (i = 0; i < RX_FD_NUM; i++) {
1265                 int bd_count = dump_rxfd(&lp->rfd_base[i]);
1266                 i += (bd_count + 1) / 2;        /* skip BDs */
1267         }
1268         dump_frfd(lp->fbl_ptr);
1269         panic("%s: Illegal queue state.", dev->name);
1270 }
1271 #endif
1272
1273 static void print_eth(const u8 *add)
1274 {
1275         DECLARE_MAC_BUF(mac);
1276
1277         printk(KERN_DEBUG "print_eth(%p)\n", add);
1278         printk(KERN_DEBUG " %s =>", print_mac(mac, add + 6));
1279         printk(KERN_CONT " %s : %02x%02x\n",
1280                 print_mac(mac, add), add[12], add[13]);
1281 }
1282
1283 static int tc35815_tx_full(struct net_device *dev)
1284 {
1285         struct tc35815_local *lp = netdev_priv(dev);
1286         return ((lp->tfd_start + 1) % TX_FD_NUM == lp->tfd_end);
1287 }
1288
1289 static void tc35815_restart(struct net_device *dev)
1290 {
1291         struct tc35815_local *lp = netdev_priv(dev);
1292
1293         if (lp->phy_dev) {
1294                 int timeout;
1295
1296                 phy_write(lp->phy_dev, MII_BMCR, BMCR_RESET);
1297                 timeout = 100;
1298                 while (--timeout) {
1299                         if (!(phy_read(lp->phy_dev, MII_BMCR) & BMCR_RESET))
1300                                 break;
1301                         udelay(1);
1302                 }
1303                 if (!timeout)
1304                         printk(KERN_ERR "%s: BMCR reset failed.\n", dev->name);
1305         }
1306
1307         spin_lock_irq(&lp->lock);
1308         tc35815_chip_reset(dev);
1309         tc35815_clear_queues(dev);
1310         tc35815_chip_init(dev);
1311         /* Reconfigure CAM again since tc35815_chip_init() initialize it. */
1312         tc35815_set_multicast_list(dev);
1313         spin_unlock_irq(&lp->lock);
1314
1315         netif_wake_queue(dev);
1316 }
1317
1318 static void tc35815_restart_work(struct work_struct *work)
1319 {
1320         struct tc35815_local *lp =
1321                 container_of(work, struct tc35815_local, restart_work);
1322         struct net_device *dev = lp->dev;
1323
1324         tc35815_restart(dev);
1325 }
1326
1327 static void tc35815_schedule_restart(struct net_device *dev)
1328 {
1329         struct tc35815_local *lp = netdev_priv(dev);
1330         struct tc35815_regs __iomem *tr =
1331                 (struct tc35815_regs __iomem *)dev->base_addr;
1332
1333         /* disable interrupts */
1334         tc_writel(0, &tr->Int_En);
1335         tc_writel(tc_readl(&tr->DMA_Ctl) | DMA_IntMask, &tr->DMA_Ctl);
1336         schedule_work(&lp->restart_work);
1337 }
1338
1339 static void tc35815_tx_timeout(struct net_device *dev)
1340 {
1341         struct tc35815_regs __iomem *tr =
1342                 (struct tc35815_regs __iomem *)dev->base_addr;
1343
1344         printk(KERN_WARNING "%s: transmit timed out, status %#x\n",
1345                dev->name, tc_readl(&tr->Tx_Stat));
1346
1347         /* Try to restart the adaptor. */
1348         tc35815_schedule_restart(dev);
1349         dev->stats.tx_errors++;
1350 }
1351
1352 /*
1353  * Open/initialize the controller. This is called (in the current kernel)
1354  * sometime after booting when the 'ifconfig' program is run.
1355  *
1356  * This routine should set everything up anew at each open, even
1357  * registers that "should" only need to be set once at boot, so that
1358  * there is non-reboot way to recover if something goes wrong.
1359  */
1360 static int
1361 tc35815_open(struct net_device *dev)
1362 {
1363         struct tc35815_local *lp = netdev_priv(dev);
1364
1365         /*
1366          * This is used if the interrupt line can turned off (shared).
1367          * See 3c503.c for an example of selecting the IRQ at config-time.
1368          */
1369         if (request_irq(dev->irq, &tc35815_interrupt, IRQF_SHARED, dev->name, dev)) {
1370                 return -EAGAIN;
1371         }
1372
1373         tc35815_chip_reset(dev);
1374
1375         if (tc35815_init_queues(dev) != 0) {
1376                 free_irq(dev->irq, dev);
1377                 return -EAGAIN;
1378         }
1379
1380 #ifdef TC35815_NAPI
1381         napi_enable(&lp->napi);
1382 #endif
1383
1384         /* Reset the hardware here. Don't forget to set the station address. */
1385         spin_lock_irq(&lp->lock);
1386         tc35815_chip_init(dev);
1387         spin_unlock_irq(&lp->lock);
1388
1389         /* schedule a link state check */
1390         phy_start(lp->phy_dev);
1391
1392         /* We are now ready to accept transmit requeusts from
1393          * the queueing layer of the networking.
1394          */
1395         netif_start_queue(dev);
1396
1397         return 0;
1398 }
1399
1400 /* This will only be invoked if your driver is _not_ in XOFF state.
1401  * What this means is that you need not check it, and that this
1402  * invariant will hold if you make sure that the netif_*_queue()
1403  * calls are done at the proper times.
1404  */
1405 static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev)
1406 {
1407         struct tc35815_local *lp = netdev_priv(dev);
1408         struct TxFD *txfd;
1409         unsigned long flags;
1410
1411         /* If some error occurs while trying to transmit this
1412          * packet, you should return '1' from this function.
1413          * In such a case you _may not_ do anything to the
1414          * SKB, it is still owned by the network queueing
1415          * layer when an error is returned.  This means you
1416          * may not modify any SKB fields, you may not free
1417          * the SKB, etc.
1418          */
1419
1420         /* This is the most common case for modern hardware.
1421          * The spinlock protects this code from the TX complete
1422          * hardware interrupt handler.  Queue flow control is
1423          * thus managed under this lock as well.
1424          */
1425         spin_lock_irqsave(&lp->lock, flags);
1426
1427         /* failsafe... (handle txdone now if half of FDs are used) */
1428         if ((lp->tfd_start + TX_FD_NUM - lp->tfd_end) % TX_FD_NUM >
1429             TX_FD_NUM / 2)
1430                 tc35815_txdone(dev);
1431
1432         if (netif_msg_pktdata(lp))
1433                 print_eth(skb->data);
1434 #ifdef DEBUG
1435         if (lp->tx_skbs[lp->tfd_start].skb) {
1436                 printk("%s: tx_skbs conflict.\n", dev->name);
1437                 panic_queues(dev);
1438         }
1439 #else
1440         BUG_ON(lp->tx_skbs[lp->tfd_start].skb);
1441 #endif
1442         lp->tx_skbs[lp->tfd_start].skb = skb;
1443         lp->tx_skbs[lp->tfd_start].skb_dma = pci_map_single(lp->pci_dev, skb->data, skb->len, PCI_DMA_TODEVICE);
1444
1445         /*add to ring */
1446         txfd = &lp->tfd_base[lp->tfd_start];
1447         txfd->bd.BuffData = cpu_to_le32(lp->tx_skbs[lp->tfd_start].skb_dma);
1448         txfd->bd.BDCtl = cpu_to_le32(skb->len);
1449         txfd->fd.FDSystem = cpu_to_le32(lp->tfd_start);
1450         txfd->fd.FDCtl = cpu_to_le32(FD_CownsFD | (1 << FD_BDCnt_SHIFT));
1451
1452         if (lp->tfd_start == lp->tfd_end) {
1453                 struct tc35815_regs __iomem *tr =
1454                         (struct tc35815_regs __iomem *)dev->base_addr;
1455                 /* Start DMA Transmitter. */
1456                 txfd->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
1457 #ifdef GATHER_TXINT
1458                 txfd->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
1459 #endif
1460                 if (netif_msg_tx_queued(lp)) {
1461                         printk("%s: starting TxFD.\n", dev->name);
1462                         dump_txfd(txfd);
1463                 }
1464                 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
1465         } else {
1466                 txfd->fd.FDNext &= cpu_to_le32(~FD_Next_EOL);
1467                 if (netif_msg_tx_queued(lp)) {
1468                         printk("%s: queueing TxFD.\n", dev->name);
1469                         dump_txfd(txfd);
1470                 }
1471         }
1472         lp->tfd_start = (lp->tfd_start + 1) % TX_FD_NUM;
1473
1474         dev->trans_start = jiffies;
1475
1476         /* If we just used up the very last entry in the
1477          * TX ring on this device, tell the queueing
1478          * layer to send no more.
1479          */
1480         if (tc35815_tx_full(dev)) {
1481                 if (netif_msg_tx_queued(lp))
1482                         printk(KERN_WARNING "%s: TxFD Exhausted.\n", dev->name);
1483                 netif_stop_queue(dev);
1484         }
1485
1486         /* When the TX completion hw interrupt arrives, this
1487          * is when the transmit statistics are updated.
1488          */
1489
1490         spin_unlock_irqrestore(&lp->lock, flags);
1491         return 0;
1492 }
1493
1494 #define FATAL_ERROR_INT \
1495         (Int_IntPCI | Int_DmParErr | Int_IntNRAbt)
1496 static void tc35815_fatal_error_interrupt(struct net_device *dev, u32 status)
1497 {
1498         static int count;
1499         printk(KERN_WARNING "%s: Fatal Error Intterrupt (%#x):",
1500                dev->name, status);
1501         if (status & Int_IntPCI)
1502                 printk(" IntPCI");
1503         if (status & Int_DmParErr)
1504                 printk(" DmParErr");
1505         if (status & Int_IntNRAbt)
1506                 printk(" IntNRAbt");
1507         printk("\n");
1508         if (count++ > 100)
1509                 panic("%s: Too many fatal errors.", dev->name);
1510         printk(KERN_WARNING "%s: Resetting ...\n", dev->name);
1511         /* Try to restart the adaptor. */
1512         tc35815_schedule_restart(dev);
1513 }
1514
1515 #ifdef TC35815_NAPI
1516 static int tc35815_do_interrupt(struct net_device *dev, u32 status, int limit)
1517 #else
1518 static int tc35815_do_interrupt(struct net_device *dev, u32 status)
1519 #endif
1520 {
1521         struct tc35815_local *lp = netdev_priv(dev);
1522         struct tc35815_regs __iomem *tr =
1523                 (struct tc35815_regs __iomem *)dev->base_addr;
1524         int ret = -1;
1525
1526         /* Fatal errors... */
1527         if (status & FATAL_ERROR_INT) {
1528                 tc35815_fatal_error_interrupt(dev, status);
1529                 return 0;
1530         }
1531         /* recoverable errors */
1532         if (status & Int_IntFDAEx) {
1533                 /* disable FDAEx int. (until we make rooms...) */
1534                 tc_writel(tc_readl(&tr->Int_En) & ~Int_FDAExEn, &tr->Int_En);
1535                 printk(KERN_WARNING
1536                        "%s: Free Descriptor Area Exhausted (%#x).\n",
1537                        dev->name, status);
1538                 dev->stats.rx_dropped++;
1539                 ret = 0;
1540         }
1541         if (status & Int_IntBLEx) {
1542                 /* disable BLEx int. (until we make rooms...) */
1543                 tc_writel(tc_readl(&tr->Int_En) & ~Int_BLExEn, &tr->Int_En);
1544                 printk(KERN_WARNING
1545                        "%s: Buffer List Exhausted (%#x).\n",
1546                        dev->name, status);
1547                 dev->stats.rx_dropped++;
1548                 ret = 0;
1549         }
1550         if (status & Int_IntExBD) {
1551                 printk(KERN_WARNING
1552                        "%s: Excessive Buffer Descriptiors (%#x).\n",
1553                        dev->name, status);
1554                 dev->stats.rx_length_errors++;
1555                 ret = 0;
1556         }
1557
1558         /* normal notification */
1559         if (status & Int_IntMacRx) {
1560                 /* Got a packet(s). */
1561 #ifdef TC35815_NAPI
1562                 ret = tc35815_rx(dev, limit);
1563 #else
1564                 tc35815_rx(dev);
1565                 ret = 0;
1566 #endif
1567                 lp->lstats.rx_ints++;
1568         }
1569         if (status & Int_IntMacTx) {
1570                 /* Transmit complete. */
1571                 lp->lstats.tx_ints++;
1572                 tc35815_txdone(dev);
1573                 netif_wake_queue(dev);
1574                 ret = 0;
1575         }
1576         return ret;
1577 }
1578
1579 /*
1580  * The typical workload of the driver:
1581  * Handle the network interface interrupts.
1582  */
1583 static irqreturn_t tc35815_interrupt(int irq, void *dev_id)
1584 {
1585         struct net_device *dev = dev_id;
1586         struct tc35815_local *lp = netdev_priv(dev);
1587         struct tc35815_regs __iomem *tr =
1588                 (struct tc35815_regs __iomem *)dev->base_addr;
1589 #ifdef TC35815_NAPI
1590         u32 dmactl = tc_readl(&tr->DMA_Ctl);
1591
1592         if (!(dmactl & DMA_IntMask)) {
1593                 /* disable interrupts */
1594                 tc_writel(dmactl | DMA_IntMask, &tr->DMA_Ctl);
1595                 if (netif_rx_schedule_prep(dev, &lp->napi))
1596                         __netif_rx_schedule(dev, &lp->napi);
1597                 else {
1598                         printk(KERN_ERR "%s: interrupt taken in poll\n",
1599                                dev->name);
1600                         BUG();
1601                 }
1602                 (void)tc_readl(&tr->Int_Src);   /* flush */
1603                 return IRQ_HANDLED;
1604         }
1605         return IRQ_NONE;
1606 #else
1607         int handled;
1608         u32 status;
1609
1610         spin_lock(&lp->lock);
1611         status = tc_readl(&tr->Int_Src);
1612         tc_writel(status, &tr->Int_Src);        /* write to clear */
1613         handled = tc35815_do_interrupt(dev, status);
1614         (void)tc_readl(&tr->Int_Src);   /* flush */
1615         spin_unlock(&lp->lock);
1616         return IRQ_RETVAL(handled >= 0);
1617 #endif /* TC35815_NAPI */
1618 }
1619
1620 #ifdef CONFIG_NET_POLL_CONTROLLER
1621 static void tc35815_poll_controller(struct net_device *dev)
1622 {
1623         disable_irq(dev->irq);
1624         tc35815_interrupt(dev->irq, dev);
1625         enable_irq(dev->irq);
1626 }
1627 #endif
1628
1629 /* We have a good packet(s), get it/them out of the buffers. */
1630 #ifdef TC35815_NAPI
1631 static int
1632 tc35815_rx(struct net_device *dev, int limit)
1633 #else
1634 static void
1635 tc35815_rx(struct net_device *dev)
1636 #endif
1637 {
1638         struct tc35815_local *lp = netdev_priv(dev);
1639         unsigned int fdctl;
1640         int i;
1641         int buf_free_count = 0;
1642         int fd_free_count = 0;
1643 #ifdef TC35815_NAPI
1644         int received = 0;
1645 #endif
1646
1647         while (!((fdctl = le32_to_cpu(lp->rfd_cur->fd.FDCtl)) & FD_CownsFD)) {
1648                 int status = le32_to_cpu(lp->rfd_cur->fd.FDStat);
1649                 int pkt_len = fdctl & FD_FDLength_MASK;
1650                 int bd_count = (fdctl & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
1651 #ifdef DEBUG
1652                 struct RxFD *next_rfd;
1653 #endif
1654 #if (RX_CTL_CMD & Rx_StripCRC) == 0
1655                 pkt_len -= 4;
1656 #endif
1657
1658                 if (netif_msg_rx_status(lp))
1659                         dump_rxfd(lp->rfd_cur);
1660                 if (status & Rx_Good) {
1661                         struct sk_buff *skb;
1662                         unsigned char *data;
1663                         int cur_bd;
1664 #ifdef TC35815_USE_PACKEDBUFFER
1665                         int offset;
1666 #endif
1667
1668 #ifdef TC35815_NAPI
1669                         if (--limit < 0)
1670                                 break;
1671 #endif
1672 #ifdef TC35815_USE_PACKEDBUFFER
1673                         BUG_ON(bd_count > 2);
1674                         skb = dev_alloc_skb(pkt_len + 2); /* +2: for reserve */
1675                         if (skb == NULL) {
1676                                 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n",
1677                                        dev->name);
1678                                 dev->stats.rx_dropped++;
1679                                 break;
1680                         }
1681                         skb_reserve(skb, 2);   /* 16 bit alignment */
1682
1683                         data = skb_put(skb, pkt_len);
1684
1685                         /* copy from receive buffer */
1686                         cur_bd = 0;
1687                         offset = 0;
1688                         while (offset < pkt_len && cur_bd < bd_count) {
1689                                 int len = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BDCtl) &
1690                                         BD_BuffLength_MASK;
1691                                 dma_addr_t dma = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BuffData);
1692                                 void *rxbuf = rxbuf_bus_to_virt(lp, dma);
1693                                 if (offset + len > pkt_len)
1694                                         len = pkt_len - offset;
1695 #ifdef TC35815_DMA_SYNC_ONDEMAND
1696                                 pci_dma_sync_single_for_cpu(lp->pci_dev,
1697                                                             dma, len,
1698                                                             PCI_DMA_FROMDEVICE);
1699 #endif
1700                                 memcpy(data + offset, rxbuf, len);
1701 #ifdef TC35815_DMA_SYNC_ONDEMAND
1702                                 pci_dma_sync_single_for_device(lp->pci_dev,
1703                                                                dma, len,
1704                                                                PCI_DMA_FROMDEVICE);
1705 #endif
1706                                 offset += len;
1707                                 cur_bd++;
1708                         }
1709 #else /* TC35815_USE_PACKEDBUFFER */
1710                         BUG_ON(bd_count > 1);
1711                         cur_bd = (le32_to_cpu(lp->rfd_cur->bd[0].BDCtl)
1712                                   & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
1713 #ifdef DEBUG
1714                         if (cur_bd >= RX_BUF_NUM) {
1715                                 printk("%s: invalid BDID.\n", dev->name);
1716                                 panic_queues(dev);
1717                         }
1718                         BUG_ON(lp->rx_skbs[cur_bd].skb_dma !=
1719                                (le32_to_cpu(lp->rfd_cur->bd[0].BuffData) & ~3));
1720                         if (!lp->rx_skbs[cur_bd].skb) {
1721                                 printk("%s: NULL skb.\n", dev->name);
1722                                 panic_queues(dev);
1723                         }
1724 #else
1725                         BUG_ON(cur_bd >= RX_BUF_NUM);
1726 #endif
1727                         skb = lp->rx_skbs[cur_bd].skb;
1728                         prefetch(skb->data);
1729                         lp->rx_skbs[cur_bd].skb = NULL;
1730                         lp->fbl_count--;
1731                         pci_unmap_single(lp->pci_dev,
1732                                          lp->rx_skbs[cur_bd].skb_dma,
1733                                          RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1734                         if (!HAVE_DMA_RXALIGN(lp))
1735                                 memmove(skb->data, skb->data - 2, pkt_len);
1736                         data = skb_put(skb, pkt_len);
1737 #endif /* TC35815_USE_PACKEDBUFFER */
1738                         if (netif_msg_pktdata(lp))
1739                                 print_eth(data);
1740                         skb->protocol = eth_type_trans(skb, dev);
1741 #ifdef TC35815_NAPI
1742                         netif_receive_skb(skb);
1743                         received++;
1744 #else
1745                         netif_rx(skb);
1746 #endif
1747                         dev->last_rx = jiffies;
1748                         dev->stats.rx_packets++;
1749                         dev->stats.rx_bytes += pkt_len;
1750                 } else {
1751                         dev->stats.rx_errors++;
1752                         printk(KERN_DEBUG "%s: Rx error (status %x)\n",
1753                                dev->name, status & Rx_Stat_Mask);
1754                         /* WORKAROUND: LongErr and CRCErr means Overflow. */
1755                         if ((status & Rx_LongErr) && (status & Rx_CRCErr)) {
1756                                 status &= ~(Rx_LongErr|Rx_CRCErr);
1757                                 status |= Rx_Over;
1758                         }
1759                         if (status & Rx_LongErr)
1760                                 dev->stats.rx_length_errors++;
1761                         if (status & Rx_Over)
1762                                 dev->stats.rx_fifo_errors++;
1763                         if (status & Rx_CRCErr)
1764                                 dev->stats.rx_crc_errors++;
1765                         if (status & Rx_Align)
1766                                 dev->stats.rx_frame_errors++;
1767                 }
1768
1769                 if (bd_count > 0) {
1770                         /* put Free Buffer back to controller */
1771                         int bdctl = le32_to_cpu(lp->rfd_cur->bd[bd_count - 1].BDCtl);
1772                         unsigned char id =
1773                                 (bdctl & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
1774 #ifdef DEBUG
1775                         if (id >= RX_BUF_NUM) {
1776                                 printk("%s: invalid BDID.\n", dev->name);
1777                                 panic_queues(dev);
1778                         }
1779 #else
1780                         BUG_ON(id >= RX_BUF_NUM);
1781 #endif
1782                         /* free old buffers */
1783 #ifdef TC35815_USE_PACKEDBUFFER
1784                         while (lp->fbl_curid != id)
1785 #else
1786                         while (lp->fbl_count < RX_BUF_NUM)
1787 #endif
1788                         {
1789 #ifdef TC35815_USE_PACKEDBUFFER
1790                                 unsigned char curid = lp->fbl_curid;
1791 #else
1792                                 unsigned char curid =
1793                                         (id + 1 + lp->fbl_count) % RX_BUF_NUM;
1794 #endif
1795                                 struct BDesc *bd = &lp->fbl_ptr->bd[curid];
1796 #ifdef DEBUG
1797                                 bdctl = le32_to_cpu(bd->BDCtl);
1798                                 if (bdctl & BD_CownsBD) {
1799                                         printk("%s: Freeing invalid BD.\n",
1800                                                dev->name);
1801                                         panic_queues(dev);
1802                                 }
1803 #endif
1804                                 /* pass BD to controller */
1805 #ifndef TC35815_USE_PACKEDBUFFER
1806                                 if (!lp->rx_skbs[curid].skb) {
1807                                         lp->rx_skbs[curid].skb =
1808                                                 alloc_rxbuf_skb(dev,
1809                                                                 lp->pci_dev,
1810                                                                 &lp->rx_skbs[curid].skb_dma);
1811                                         if (!lp->rx_skbs[curid].skb)
1812                                                 break; /* try on next reception */
1813                                         bd->BuffData = cpu_to_le32(lp->rx_skbs[curid].skb_dma);
1814                                 }
1815 #endif /* TC35815_USE_PACKEDBUFFER */
1816                                 /* Note: BDLength was modified by chip. */
1817                                 bd->BDCtl = cpu_to_le32(BD_CownsBD |
1818                                                         (curid << BD_RxBDID_SHIFT) |
1819                                                         RX_BUF_SIZE);
1820 #ifdef TC35815_USE_PACKEDBUFFER
1821                                 lp->fbl_curid = (curid + 1) % RX_BUF_NUM;
1822                                 if (netif_msg_rx_status(lp)) {
1823                                         printk("%s: Entering new FBD %d\n",
1824                                                dev->name, lp->fbl_curid);
1825                                         dump_frfd(lp->fbl_ptr);
1826                                 }
1827 #else
1828                                 lp->fbl_count++;
1829 #endif
1830                                 buf_free_count++;
1831                         }
1832                 }
1833
1834                 /* put RxFD back to controller */
1835 #ifdef DEBUG
1836                 next_rfd = fd_bus_to_virt(lp,
1837                                           le32_to_cpu(lp->rfd_cur->fd.FDNext));
1838                 if (next_rfd < lp->rfd_base || next_rfd > lp->rfd_limit) {
1839                         printk("%s: RxFD FDNext invalid.\n", dev->name);
1840                         panic_queues(dev);
1841                 }
1842 #endif
1843                 for (i = 0; i < (bd_count + 1) / 2 + 1; i++) {
1844                         /* pass FD to controller */
1845 #ifdef DEBUG
1846                         lp->rfd_cur->fd.FDNext = cpu_to_le32(0xdeaddead);
1847 #else
1848                         lp->rfd_cur->fd.FDNext = cpu_to_le32(FD_Next_EOL);
1849 #endif
1850                         lp->rfd_cur->fd.FDCtl = cpu_to_le32(FD_CownsFD);
1851                         lp->rfd_cur++;
1852                         fd_free_count++;
1853                 }
1854                 if (lp->rfd_cur > lp->rfd_limit)
1855                         lp->rfd_cur = lp->rfd_base;
1856 #ifdef DEBUG
1857                 if (lp->rfd_cur != next_rfd)
1858                         printk("rfd_cur = %p, next_rfd %p\n",
1859                                lp->rfd_cur, next_rfd);
1860 #endif
1861         }
1862
1863         /* re-enable BL/FDA Exhaust interrupts. */
1864         if (fd_free_count) {
1865                 struct tc35815_regs __iomem *tr =
1866                         (struct tc35815_regs __iomem *)dev->base_addr;
1867                 u32 en, en_old = tc_readl(&tr->Int_En);
1868                 en = en_old | Int_FDAExEn;
1869                 if (buf_free_count)
1870                         en |= Int_BLExEn;
1871                 if (en != en_old)
1872                         tc_writel(en, &tr->Int_En);
1873         }
1874 #ifdef TC35815_NAPI
1875         return received;
1876 #endif
1877 }
1878
1879 #ifdef TC35815_NAPI
1880 static int tc35815_poll(struct napi_struct *napi, int budget)
1881 {
1882         struct tc35815_local *lp = container_of(napi, struct tc35815_local, napi);
1883         struct net_device *dev = lp->dev;
1884         struct tc35815_regs __iomem *tr =
1885                 (struct tc35815_regs __iomem *)dev->base_addr;
1886         int received = 0, handled;
1887         u32 status;
1888
1889         spin_lock(&lp->lock);
1890         status = tc_readl(&tr->Int_Src);
1891         do {
1892                 tc_writel(status, &tr->Int_Src);        /* write to clear */
1893
1894                 handled = tc35815_do_interrupt(dev, status, limit);
1895                 if (handled >= 0) {
1896                         received += handled;
1897                         if (received >= budget)
1898                                 break;
1899                 }
1900                 status = tc_readl(&tr->Int_Src);
1901         } while (status);
1902         spin_unlock(&lp->lock);
1903
1904         if (received < budget) {
1905                 netif_rx_complete(dev, napi);
1906                 /* enable interrupts */
1907                 tc_writel(tc_readl(&tr->DMA_Ctl) & ~DMA_IntMask, &tr->DMA_Ctl);
1908         }
1909         return received;
1910 }
1911 #endif
1912
1913 #ifdef NO_CHECK_CARRIER
1914 #define TX_STA_ERR      (Tx_ExColl|Tx_Under|Tx_Defer|Tx_LateColl|Tx_TxPar|Tx_SQErr)
1915 #else
1916 #define TX_STA_ERR      (Tx_ExColl|Tx_Under|Tx_Defer|Tx_NCarr|Tx_LateColl|Tx_TxPar|Tx_SQErr)
1917 #endif
1918
1919 static void
1920 tc35815_check_tx_stat(struct net_device *dev, int status)
1921 {
1922         struct tc35815_local *lp = netdev_priv(dev);
1923         const char *msg = NULL;
1924
1925         /* count collisions */
1926         if (status & Tx_ExColl)
1927                 dev->stats.collisions += 16;
1928         if (status & Tx_TxColl_MASK)
1929                 dev->stats.collisions += status & Tx_TxColl_MASK;
1930
1931 #ifndef NO_CHECK_CARRIER
1932         /* TX4939 does not have NCarr */
1933         if (lp->chiptype == TC35815_TX4939)
1934                 status &= ~Tx_NCarr;
1935 #ifdef WORKAROUND_LOSTCAR
1936         /* WORKAROUND: ignore LostCrS in full duplex operation */
1937         if (!lp->link || lp->duplex == DUPLEX_FULL)
1938                 status &= ~Tx_NCarr;
1939 #endif
1940 #endif
1941
1942         if (!(status & TX_STA_ERR)) {
1943                 /* no error. */
1944                 dev->stats.tx_packets++;
1945                 return;
1946         }
1947
1948         dev->stats.tx_errors++;
1949         if (status & Tx_ExColl) {
1950                 dev->stats.tx_aborted_errors++;
1951                 msg = "Excessive Collision.";
1952         }
1953         if (status & Tx_Under) {
1954                 dev->stats.tx_fifo_errors++;
1955                 msg = "Tx FIFO Underrun.";
1956                 if (lp->lstats.tx_underrun < TX_THRESHOLD_KEEP_LIMIT) {
1957                         lp->lstats.tx_underrun++;
1958                         if (lp->lstats.tx_underrun >= TX_THRESHOLD_KEEP_LIMIT) {
1959                                 struct tc35815_regs __iomem *tr =
1960                                         (struct tc35815_regs __iomem *)dev->base_addr;
1961                                 tc_writel(TX_THRESHOLD_MAX, &tr->TxThrsh);
1962                                 msg = "Tx FIFO Underrun.Change Tx threshold to max.";
1963                         }
1964                 }
1965         }
1966         if (status & Tx_Defer) {
1967                 dev->stats.tx_fifo_errors++;
1968                 msg = "Excessive Deferral.";
1969         }
1970 #ifndef NO_CHECK_CARRIER
1971         if (status & Tx_NCarr) {
1972                 dev->stats.tx_carrier_errors++;
1973                 msg = "Lost Carrier Sense.";
1974         }
1975 #endif
1976         if (status & Tx_LateColl) {
1977                 dev->stats.tx_aborted_errors++;
1978                 msg = "Late Collision.";
1979         }
1980         if (status & Tx_TxPar) {
1981                 dev->stats.tx_fifo_errors++;
1982                 msg = "Transmit Parity Error.";
1983         }
1984         if (status & Tx_SQErr) {
1985                 dev->stats.tx_heartbeat_errors++;
1986                 msg = "Signal Quality Error.";
1987         }
1988         if (msg && netif_msg_tx_err(lp))
1989                 printk(KERN_WARNING "%s: %s (%#x)\n", dev->name, msg, status);
1990 }
1991
1992 /* This handles TX complete events posted by the device
1993  * via interrupts.
1994  */
1995 static void
1996 tc35815_txdone(struct net_device *dev)
1997 {
1998         struct tc35815_local *lp = netdev_priv(dev);
1999         struct TxFD *txfd;
2000         unsigned int fdctl;
2001
2002         txfd = &lp->tfd_base[lp->tfd_end];
2003         while (lp->tfd_start != lp->tfd_end &&
2004                !((fdctl = le32_to_cpu(txfd->fd.FDCtl)) & FD_CownsFD)) {
2005                 int status = le32_to_cpu(txfd->fd.FDStat);
2006                 struct sk_buff *skb;
2007                 unsigned long fdnext = le32_to_cpu(txfd->fd.FDNext);
2008                 u32 fdsystem = le32_to_cpu(txfd->fd.FDSystem);
2009
2010                 if (netif_msg_tx_done(lp)) {
2011                         printk("%s: complete TxFD.\n", dev->name);
2012                         dump_txfd(txfd);
2013                 }
2014                 tc35815_check_tx_stat(dev, status);
2015
2016                 skb = fdsystem != 0xffffffff ?
2017                         lp->tx_skbs[fdsystem].skb : NULL;
2018 #ifdef DEBUG
2019                 if (lp->tx_skbs[lp->tfd_end].skb != skb) {
2020                         printk("%s: tx_skbs mismatch.\n", dev->name);
2021                         panic_queues(dev);
2022                 }
2023 #else
2024                 BUG_ON(lp->tx_skbs[lp->tfd_end].skb != skb);
2025 #endif
2026                 if (skb) {
2027                         dev->stats.tx_bytes += skb->len;
2028                         pci_unmap_single(lp->pci_dev, lp->tx_skbs[lp->tfd_end].skb_dma, skb->len, PCI_DMA_TODEVICE);
2029                         lp->tx_skbs[lp->tfd_end].skb = NULL;
2030                         lp->tx_skbs[lp->tfd_end].skb_dma = 0;
2031 #ifdef TC35815_NAPI
2032                         dev_kfree_skb_any(skb);
2033 #else
2034                         dev_kfree_skb_irq(skb);
2035 #endif
2036                 }
2037                 txfd->fd.FDSystem = cpu_to_le32(0xffffffff);
2038
2039                 lp->tfd_end = (lp->tfd_end + 1) % TX_FD_NUM;
2040                 txfd = &lp->tfd_base[lp->tfd_end];
2041 #ifdef DEBUG
2042                 if ((fdnext & ~FD_Next_EOL) != fd_virt_to_bus(lp, txfd)) {
2043                         printk("%s: TxFD FDNext invalid.\n", dev->name);
2044                         panic_queues(dev);
2045                 }
2046 #endif
2047                 if (fdnext & FD_Next_EOL) {
2048                         /* DMA Transmitter has been stopping... */
2049                         if (lp->tfd_end != lp->tfd_start) {
2050                                 struct tc35815_regs __iomem *tr =
2051                                         (struct tc35815_regs __iomem *)dev->base_addr;
2052                                 int head = (lp->tfd_start + TX_FD_NUM - 1) % TX_FD_NUM;
2053                                 struct TxFD* txhead = &lp->tfd_base[head];
2054                                 int qlen = (lp->tfd_start + TX_FD_NUM
2055                                             - lp->tfd_end) % TX_FD_NUM;
2056
2057 #ifdef DEBUG
2058                                 if (!(le32_to_cpu(txfd->fd.FDCtl) & FD_CownsFD)) {
2059                                         printk("%s: TxFD FDCtl invalid.\n", dev->name);
2060                                         panic_queues(dev);
2061                                 }
2062 #endif
2063                                 /* log max queue length */
2064                                 if (lp->lstats.max_tx_qlen < qlen)
2065                                         lp->lstats.max_tx_qlen = qlen;
2066
2067
2068                                 /* start DMA Transmitter again */
2069                                 txhead->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
2070 #ifdef GATHER_TXINT
2071                                 txhead->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
2072 #endif
2073                                 if (netif_msg_tx_queued(lp)) {
2074                                         printk("%s: start TxFD on queue.\n",
2075                                                dev->name);
2076                                         dump_txfd(txfd);
2077                                 }
2078                                 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
2079                         }
2080                         break;
2081                 }
2082         }
2083
2084         /* If we had stopped the queue due to a "tx full"
2085          * condition, and space has now been made available,
2086          * wake up the queue.
2087          */
2088         if (netif_queue_stopped(dev) && ! tc35815_tx_full(dev))
2089                 netif_wake_queue(dev);
2090 }
2091
2092 /* The inverse routine to tc35815_open(). */
2093 static int
2094 tc35815_close(struct net_device *dev)
2095 {
2096         struct tc35815_local *lp = netdev_priv(dev);
2097
2098         netif_stop_queue(dev);
2099 #ifdef TC35815_NAPI
2100         napi_disable(&lp->napi);
2101 #endif
2102         if (lp->phy_dev)
2103                 phy_stop(lp->phy_dev);
2104         cancel_work_sync(&lp->restart_work);
2105
2106         /* Flush the Tx and disable Rx here. */
2107         tc35815_chip_reset(dev);
2108         free_irq(dev->irq, dev);
2109
2110         tc35815_free_queues(dev);
2111
2112         return 0;
2113
2114 }
2115
2116 /*
2117  * Get the current statistics.
2118  * This may be called with the card open or closed.
2119  */
2120 static struct net_device_stats *tc35815_get_stats(struct net_device *dev)
2121 {
2122         struct tc35815_regs __iomem *tr =
2123                 (struct tc35815_regs __iomem *)dev->base_addr;
2124         if (netif_running(dev))
2125                 /* Update the statistics from the device registers. */
2126                 dev->stats.rx_missed_errors = tc_readl(&tr->Miss_Cnt);
2127
2128         return &dev->stats;
2129 }
2130
2131 static void tc35815_set_cam_entry(struct net_device *dev, int index, unsigned char *addr)
2132 {
2133         struct tc35815_local *lp = netdev_priv(dev);
2134         struct tc35815_regs __iomem *tr =
2135                 (struct tc35815_regs __iomem *)dev->base_addr;
2136         int cam_index = index * 6;
2137         u32 cam_data;
2138         u32 saved_addr;
2139         DECLARE_MAC_BUF(mac);
2140
2141         saved_addr = tc_readl(&tr->CAM_Adr);
2142
2143         if (netif_msg_hw(lp))
2144                 printk(KERN_DEBUG "%s: CAM %d: %s\n",
2145                         dev->name, index, print_mac(mac, addr));
2146         if (index & 1) {
2147                 /* read modify write */
2148                 tc_writel(cam_index - 2, &tr->CAM_Adr);
2149                 cam_data = tc_readl(&tr->CAM_Data) & 0xffff0000;
2150                 cam_data |= addr[0] << 8 | addr[1];
2151                 tc_writel(cam_data, &tr->CAM_Data);
2152                 /* write whole word */
2153                 tc_writel(cam_index + 2, &tr->CAM_Adr);
2154                 cam_data = (addr[2] << 24) | (addr[3] << 16) | (addr[4] << 8) | addr[5];
2155                 tc_writel(cam_data, &tr->CAM_Data);
2156         } else {
2157                 /* write whole word */
2158                 tc_writel(cam_index, &tr->CAM_Adr);
2159                 cam_data = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3];
2160                 tc_writel(cam_data, &tr->CAM_Data);
2161                 /* read modify write */
2162                 tc_writel(cam_index + 4, &tr->CAM_Adr);
2163                 cam_data = tc_readl(&tr->CAM_Data) & 0x0000ffff;
2164                 cam_data |= addr[4] << 24 | (addr[5] << 16);
2165                 tc_writel(cam_data, &tr->CAM_Data);
2166         }
2167
2168         tc_writel(saved_addr, &tr->CAM_Adr);
2169 }
2170
2171
2172 /*
2173  * Set or clear the multicast filter for this adaptor.
2174  * num_addrs == -1      Promiscuous mode, receive all packets
2175  * num_addrs == 0       Normal mode, clear multicast list
2176  * num_addrs > 0        Multicast mode, receive normal and MC packets,
2177  *                      and do best-effort filtering.
2178  */
2179 static void
2180 tc35815_set_multicast_list(struct net_device *dev)
2181 {
2182         struct tc35815_regs __iomem *tr =
2183                 (struct tc35815_regs __iomem *)dev->base_addr;
2184
2185         if (dev->flags&IFF_PROMISC)
2186         {
2187 #ifdef WORKAROUND_100HALF_PROMISC
2188                 /* With some (all?) 100MHalf HUB, controller will hang
2189                  * if we enabled promiscuous mode before linkup... */
2190                 struct tc35815_local *lp = netdev_priv(dev);
2191
2192                 if (!lp->link)
2193                         return;
2194 #endif
2195                 /* Enable promiscuous mode */
2196                 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc | CAM_StationAcc, &tr->CAM_Ctl);
2197         }
2198         else if((dev->flags&IFF_ALLMULTI) || dev->mc_count > CAM_ENTRY_MAX - 3)
2199         {
2200                 /* CAM 0, 1, 20 are reserved. */
2201                 /* Disable promiscuous mode, use normal mode. */
2202                 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc, &tr->CAM_Ctl);
2203         }
2204         else if(dev->mc_count)
2205         {
2206                 struct dev_mc_list* cur_addr = dev->mc_list;
2207                 int i;
2208                 int ena_bits = CAM_Ena_Bit(CAM_ENTRY_SOURCE);
2209
2210                 tc_writel(0, &tr->CAM_Ctl);
2211                 /* Walk the address list, and load the filter */
2212                 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
2213                         if (!cur_addr)
2214                                 break;
2215                         /* entry 0,1 is reserved. */
2216                         tc35815_set_cam_entry(dev, i + 2, cur_addr->dmi_addr);
2217                         ena_bits |= CAM_Ena_Bit(i + 2);
2218                 }
2219                 tc_writel(ena_bits, &tr->CAM_Ena);
2220                 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2221         }
2222         else {
2223                 tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
2224                 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2225         }
2226 }
2227
2228 static void tc35815_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2229 {
2230         struct tc35815_local *lp = netdev_priv(dev);
2231         strcpy(info->driver, MODNAME);
2232         strcpy(info->version, DRV_VERSION);
2233         strcpy(info->bus_info, pci_name(lp->pci_dev));
2234 }
2235
2236 static int tc35815_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2237 {
2238         struct tc35815_local *lp = netdev_priv(dev);
2239
2240         if (!lp->phy_dev)
2241                 return -ENODEV;
2242         return phy_ethtool_gset(lp->phy_dev, cmd);
2243 }
2244
2245 static int tc35815_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2246 {
2247         struct tc35815_local *lp = netdev_priv(dev);
2248
2249         if (!lp->phy_dev)
2250                 return -ENODEV;
2251         return phy_ethtool_sset(lp->phy_dev, cmd);
2252 }
2253
2254 static u32 tc35815_get_msglevel(struct net_device *dev)
2255 {
2256         struct tc35815_local *lp = netdev_priv(dev);
2257         return lp->msg_enable;
2258 }
2259
2260 static void tc35815_set_msglevel(struct net_device *dev, u32 datum)
2261 {
2262         struct tc35815_local *lp = netdev_priv(dev);
2263         lp->msg_enable = datum;
2264 }
2265
2266 static int tc35815_get_sset_count(struct net_device *dev, int sset)
2267 {
2268         struct tc35815_local *lp = netdev_priv(dev);
2269
2270         switch (sset) {
2271         case ETH_SS_STATS:
2272                 return sizeof(lp->lstats) / sizeof(int);
2273         default:
2274                 return -EOPNOTSUPP;
2275         }
2276 }
2277
2278 static void tc35815_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
2279 {
2280         struct tc35815_local *lp = netdev_priv(dev);
2281         data[0] = lp->lstats.max_tx_qlen;
2282         data[1] = lp->lstats.tx_ints;
2283         data[2] = lp->lstats.rx_ints;
2284         data[3] = lp->lstats.tx_underrun;
2285 }
2286
2287 static struct {
2288         const char str[ETH_GSTRING_LEN];
2289 } ethtool_stats_keys[] = {
2290         { "max_tx_qlen" },
2291         { "tx_ints" },
2292         { "rx_ints" },
2293         { "tx_underrun" },
2294 };
2295
2296 static void tc35815_get_strings(struct net_device *dev, u32 stringset, u8 *data)
2297 {
2298         memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
2299 }
2300
2301 static const struct ethtool_ops tc35815_ethtool_ops = {
2302         .get_drvinfo            = tc35815_get_drvinfo,
2303         .get_settings           = tc35815_get_settings,
2304         .set_settings           = tc35815_set_settings,
2305         .get_link               = ethtool_op_get_link,
2306         .get_msglevel           = tc35815_get_msglevel,
2307         .set_msglevel           = tc35815_set_msglevel,
2308         .get_strings            = tc35815_get_strings,
2309         .get_sset_count         = tc35815_get_sset_count,
2310         .get_ethtool_stats      = tc35815_get_ethtool_stats,
2311 };
2312
2313 static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2314 {
2315         struct tc35815_local *lp = netdev_priv(dev);
2316
2317         if (!netif_running(dev))
2318                 return -EINVAL;
2319         if (!lp->phy_dev)
2320                 return -ENODEV;
2321         return phy_mii_ioctl(lp->phy_dev, if_mii(rq), cmd);
2322 }
2323
2324 static void tc35815_chip_reset(struct net_device *dev)
2325 {
2326         struct tc35815_regs __iomem *tr =
2327                 (struct tc35815_regs __iomem *)dev->base_addr;
2328         int i;
2329         /* reset the controller */
2330         tc_writel(MAC_Reset, &tr->MAC_Ctl);
2331         udelay(4); /* 3200ns */
2332         i = 0;
2333         while (tc_readl(&tr->MAC_Ctl) & MAC_Reset) {
2334                 if (i++ > 100) {
2335                         printk(KERN_ERR "%s: MAC reset failed.\n", dev->name);
2336                         break;
2337                 }
2338                 mdelay(1);
2339         }
2340         tc_writel(0, &tr->MAC_Ctl);
2341
2342         /* initialize registers to default value */
2343         tc_writel(0, &tr->DMA_Ctl);
2344         tc_writel(0, &tr->TxThrsh);
2345         tc_writel(0, &tr->TxPollCtr);
2346         tc_writel(0, &tr->RxFragSize);
2347         tc_writel(0, &tr->Int_En);
2348         tc_writel(0, &tr->FDA_Bas);
2349         tc_writel(0, &tr->FDA_Lim);
2350         tc_writel(0xffffffff, &tr->Int_Src);    /* Write 1 to clear */
2351         tc_writel(0, &tr->CAM_Ctl);
2352         tc_writel(0, &tr->Tx_Ctl);
2353         tc_writel(0, &tr->Rx_Ctl);
2354         tc_writel(0, &tr->CAM_Ena);
2355         (void)tc_readl(&tr->Miss_Cnt);  /* Read to clear */
2356
2357         /* initialize internal SRAM */
2358         tc_writel(DMA_TestMode, &tr->DMA_Ctl);
2359         for (i = 0; i < 0x1000; i += 4) {
2360                 tc_writel(i, &tr->CAM_Adr);
2361                 tc_writel(0, &tr->CAM_Data);
2362         }
2363         tc_writel(0, &tr->DMA_Ctl);
2364 }
2365
2366 static void tc35815_chip_init(struct net_device *dev)
2367 {
2368         struct tc35815_local *lp = netdev_priv(dev);
2369         struct tc35815_regs __iomem *tr =
2370                 (struct tc35815_regs __iomem *)dev->base_addr;
2371         unsigned long txctl = TX_CTL_CMD;
2372
2373         /* load station address to CAM */
2374         tc35815_set_cam_entry(dev, CAM_ENTRY_SOURCE, dev->dev_addr);
2375
2376         /* Enable CAM (broadcast and unicast) */
2377         tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
2378         tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2379
2380         /* Use DMA_RxAlign_2 to make IP header 4-byte aligned. */
2381         if (HAVE_DMA_RXALIGN(lp))
2382                 tc_writel(DMA_BURST_SIZE | DMA_RxAlign_2, &tr->DMA_Ctl);
2383         else
2384                 tc_writel(DMA_BURST_SIZE, &tr->DMA_Ctl);
2385 #ifdef TC35815_USE_PACKEDBUFFER
2386         tc_writel(RxFrag_EnPack | ETH_ZLEN, &tr->RxFragSize);   /* Packing */
2387 #else
2388         tc_writel(ETH_ZLEN, &tr->RxFragSize);
2389 #endif
2390         tc_writel(0, &tr->TxPollCtr);   /* Batch mode */
2391         tc_writel(TX_THRESHOLD, &tr->TxThrsh);
2392         tc_writel(INT_EN_CMD, &tr->Int_En);
2393
2394         /* set queues */
2395         tc_writel(fd_virt_to_bus(lp, lp->rfd_base), &tr->FDA_Bas);
2396         tc_writel((unsigned long)lp->rfd_limit - (unsigned long)lp->rfd_base,
2397                   &tr->FDA_Lim);
2398         /*
2399          * Activation method:
2400          * First, enable the MAC Transmitter and the DMA Receive circuits.
2401          * Then enable the DMA Transmitter and the MAC Receive circuits.
2402          */
2403         tc_writel(fd_virt_to_bus(lp, lp->fbl_ptr), &tr->BLFrmPtr);      /* start DMA receiver */
2404         tc_writel(RX_CTL_CMD, &tr->Rx_Ctl);     /* start MAC receiver */
2405
2406         /* start MAC transmitter */
2407 #ifndef NO_CHECK_CARRIER
2408         /* TX4939 does not have EnLCarr */
2409         if (lp->chiptype == TC35815_TX4939)
2410                 txctl &= ~Tx_EnLCarr;
2411 #ifdef WORKAROUND_LOSTCAR
2412         /* WORKAROUND: ignore LostCrS in full duplex operation */
2413         if (!lp->phy_dev || !lp->link || lp->duplex == DUPLEX_FULL)
2414                 txctl &= ~Tx_EnLCarr;
2415 #endif
2416 #endif /* !NO_CHECK_CARRIER */
2417 #ifdef GATHER_TXINT
2418         txctl &= ~Tx_EnComp;    /* disable global tx completion int. */
2419 #endif
2420         tc_writel(txctl, &tr->Tx_Ctl);
2421 }
2422
2423 #ifdef CONFIG_PM
2424 static int tc35815_suspend(struct pci_dev *pdev, pm_message_t state)
2425 {
2426         struct net_device *dev = pci_get_drvdata(pdev);
2427         struct tc35815_local *lp = netdev_priv(dev);
2428         unsigned long flags;
2429
2430         pci_save_state(pdev);
2431         if (!netif_running(dev))
2432                 return 0;
2433         netif_device_detach(dev);
2434         if (lp->phy_dev)
2435                 phy_stop(lp->phy_dev);
2436         spin_lock_irqsave(&lp->lock, flags);
2437         tc35815_chip_reset(dev);
2438         spin_unlock_irqrestore(&lp->lock, flags);
2439         pci_set_power_state(pdev, PCI_D3hot);
2440         return 0;
2441 }
2442
2443 static int tc35815_resume(struct pci_dev *pdev)
2444 {
2445         struct net_device *dev = pci_get_drvdata(pdev);
2446         struct tc35815_local *lp = netdev_priv(dev);
2447
2448         pci_restore_state(pdev);
2449         if (!netif_running(dev))
2450                 return 0;
2451         pci_set_power_state(pdev, PCI_D0);
2452         tc35815_restart(dev);
2453         if (lp->phy_dev)
2454                 phy_start(lp->phy_dev);
2455         netif_device_attach(dev);
2456         return 0;
2457 }
2458 #endif /* CONFIG_PM */
2459
2460 static struct pci_driver tc35815_pci_driver = {
2461         .name           = MODNAME,
2462         .id_table       = tc35815_pci_tbl,
2463         .probe          = tc35815_init_one,
2464         .remove         = __devexit_p(tc35815_remove_one),
2465 #ifdef CONFIG_PM
2466         .suspend        = tc35815_suspend,
2467         .resume         = tc35815_resume,
2468 #endif
2469 };
2470
2471 module_param_named(speed, options.speed, int, 0);
2472 MODULE_PARM_DESC(speed, "0:auto, 10:10Mbps, 100:100Mbps");
2473 module_param_named(duplex, options.duplex, int, 0);
2474 MODULE_PARM_DESC(duplex, "0:auto, 1:half, 2:full");
2475
2476 static int __init tc35815_init_module(void)
2477 {
2478         return pci_register_driver(&tc35815_pci_driver);
2479 }
2480
2481 static void __exit tc35815_cleanup_module(void)
2482 {
2483         pci_unregister_driver(&tc35815_pci_driver);
2484 }
2485
2486 module_init(tc35815_init_module);
2487 module_exit(tc35815_cleanup_module);
2488
2489 MODULE_DESCRIPTION("TOSHIBA TC35815 PCI 10M/100M Ethernet driver");
2490 MODULE_LICENSE("GPL");