3 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
5 * Copyright (C) 1996 by Erik Stahlman
6 * Copyright (C) 2001 Standard Microsystems Corporation
7 * Developed by Simple Network Magic Corporation
8 * Copyright (C) 2003 Monta Vista Software, Inc.
9 * Unified SMC91x driver by Nicolas Pitre
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 * io = for the base address
28 * nowait = 0 for normal wait states, 1 eliminates additional wait states
31 * Erik Stahlman <erik@vt.edu>
33 * hardware multicast code:
34 * Peter Cammaert <pc@denkart.be>
37 * Daris A Nevil <dnevil@snmc.com>
38 * Nicolas Pitre <nico@cam.org>
39 * Russell King <rmk@arm.linux.org.uk>
42 * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
43 * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
44 * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
45 * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
46 * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
47 * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
48 * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
49 * more bus abstraction, big cleanup, etc.
50 * 29/09/03 Russell King - add driver model support
52 * - convert to use generic MII interface
53 * - add link up/down notification
54 * - don't try to handle full negotiation in
56 * - clean up (and fix stack overrun) in PHY
57 * MII read/write functions
58 * 22/09/04 Nicolas Pitre big update (see commit log for details)
60 static const char version[] =
61 "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>\n";
69 #include <linux/init.h>
70 #include <linux/module.h>
71 #include <linux/kernel.h>
72 #include <linux/sched.h>
73 #include <linux/slab.h>
74 #include <linux/delay.h>
75 #include <linux/interrupt.h>
76 #include <linux/errno.h>
77 #include <linux/ioport.h>
78 #include <linux/crc32.h>
79 #include <linux/platform_device.h>
80 #include <linux/spinlock.h>
81 #include <linux/ethtool.h>
82 #include <linux/mii.h>
83 #include <linux/workqueue.h>
85 #include <linux/netdevice.h>
86 #include <linux/etherdevice.h>
87 #include <linux/skbuff.h>
95 * the LAN91C111 can be at any of the following port addresses. To change,
96 * for a slightly different card, you can add it to the array. Keep in
97 * mind that the array must end in zero.
99 static unsigned int smc_portlist[] __initdata = {
100 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0,
101 0x300, 0x320, 0x340, 0x360, 0x380, 0x3A0, 0x3C0, 0x3E0, 0
105 # define SMC_IOADDR -1
107 static unsigned long io = SMC_IOADDR;
108 module_param(io, ulong, 0400);
109 MODULE_PARM_DESC(io, "I/O base address");
114 static int irq = SMC_IRQ;
115 module_param(irq, int, 0400);
116 MODULE_PARM_DESC(irq, "IRQ number");
118 #endif /* CONFIG_ISA */
121 # define SMC_NOWAIT 0
123 static int nowait = SMC_NOWAIT;
124 module_param(nowait, int, 0400);
125 MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
128 * Transmit timeout, default 5 seconds.
130 static int watchdog = 1000;
131 module_param(watchdog, int, 0400);
132 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
134 MODULE_LICENSE("GPL");
135 MODULE_ALIAS("platform:smc91x");
138 * The internal workings of the driver. If you are changing anything
139 * here with the SMC stuff, you should have the datasheet and know
140 * what you are doing.
142 #define CARDNAME "smc91x"
145 * Use power-down feature of the chip
150 * Wait time for memory to be free. This probably shouldn't be
151 * tuned that much, as waiting for this means nothing else happens
154 #define MEMORY_WAIT_TIME 16
157 * The maximum number of processing loops allowed for each call to the
160 #define MAX_IRQ_LOOPS 8
163 * This selects whether TX packets are sent one by one to the SMC91x internal
164 * memory and throttled until transmission completes. This may prevent
165 * RX overruns a litle by keeping much of the memory free for RX packets
166 * but to the expense of reduced TX throughput and increased IRQ overhead.
167 * Note this is not a cure for a too slow data bus or too high IRQ latency.
169 #define THROTTLE_TX_PKTS 0
172 * The MII clock high/low times. 2x this number gives the MII clock period
173 * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
178 #define DBG(n, args...) \
180 if (SMC_DEBUG >= (n)) \
184 #define PRINTK(args...) printk(args)
186 #define DBG(n, args...) do { } while(0)
187 #define PRINTK(args...) printk(KERN_DEBUG args)
191 static void PRINT_PKT(u_char *buf, int length)
198 remainder = length % 16;
200 for (i = 0; i < lines ; i ++) {
202 for (cur = 0; cur < 8; cur++) {
206 printk("%02x%02x ", a, b);
210 for (i = 0; i < remainder/2 ; i++) {
214 printk("%02x%02x ", a, b);
219 #define PRINT_PKT(x...) do { } while(0)
223 /* this enables an interrupt in the interrupt mask register */
224 #define SMC_ENABLE_INT(lp, x) do { \
225 unsigned char mask; \
226 spin_lock_irq(&lp->lock); \
227 mask = SMC_GET_INT_MASK(lp); \
229 SMC_SET_INT_MASK(lp, mask); \
230 spin_unlock_irq(&lp->lock); \
233 /* this disables an interrupt from the interrupt mask register */
234 #define SMC_DISABLE_INT(lp, x) do { \
235 unsigned char mask; \
236 spin_lock_irq(&lp->lock); \
237 mask = SMC_GET_INT_MASK(lp); \
239 SMC_SET_INT_MASK(lp, mask); \
240 spin_unlock_irq(&lp->lock); \
244 * Wait while MMU is busy. This is usually in the order of a few nanosecs
245 * if at all, but let's avoid deadlocking the system if the hardware
246 * decides to go south.
248 #define SMC_WAIT_MMU_BUSY(lp) do { \
249 if (unlikely(SMC_GET_MMU_CMD(lp) & MC_BUSY)) { \
250 unsigned long timeout = jiffies + 2; \
251 while (SMC_GET_MMU_CMD(lp) & MC_BUSY) { \
252 if (time_after(jiffies, timeout)) { \
253 printk("%s: timeout %s line %d\n", \
254 dev->name, __FILE__, __LINE__); \
264 * this does a soft reset on the device
266 static void smc_reset(struct net_device *dev)
268 struct smc_local *lp = netdev_priv(dev);
269 void __iomem *ioaddr = lp->base;
270 unsigned int ctl, cfg;
271 struct sk_buff *pending_skb;
273 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
275 /* Disable all interrupts, block TX tasklet */
276 spin_lock_irq(&lp->lock);
277 SMC_SELECT_BANK(lp, 2);
278 SMC_SET_INT_MASK(lp, 0);
279 pending_skb = lp->pending_tx_skb;
280 lp->pending_tx_skb = NULL;
281 spin_unlock_irq(&lp->lock);
283 /* free any pending tx skb */
285 dev_kfree_skb(pending_skb);
286 dev->stats.tx_errors++;
287 dev->stats.tx_aborted_errors++;
291 * This resets the registers mostly to defaults, but doesn't
292 * affect EEPROM. That seems unnecessary
294 SMC_SELECT_BANK(lp, 0);
295 SMC_SET_RCR(lp, RCR_SOFTRST);
298 * Setup the Configuration Register
299 * This is necessary because the CONFIG_REG is not affected
302 SMC_SELECT_BANK(lp, 1);
304 cfg = CONFIG_DEFAULT;
307 * Setup for fast accesses if requested. If the card/system
308 * can't handle it then there will be no recovery except for
309 * a hard reset or power cycle
312 cfg |= CONFIG_NO_WAIT;
315 * Release from possible power-down state
316 * Configuration register is not affected by Soft Reset
318 cfg |= CONFIG_EPH_POWER_EN;
320 SMC_SET_CONFIG(lp, cfg);
322 /* this should pause enough for the chip to be happy */
324 * elaborate? What does the chip _need_? --jgarzik
326 * This seems to be undocumented, but something the original
327 * driver(s) have always done. Suspect undocumented timing
328 * info/determined empirically. --rmk
332 /* Disable transmit and receive functionality */
333 SMC_SELECT_BANK(lp, 0);
334 SMC_SET_RCR(lp, RCR_CLEAR);
335 SMC_SET_TCR(lp, TCR_CLEAR);
337 SMC_SELECT_BANK(lp, 1);
338 ctl = SMC_GET_CTL(lp) | CTL_LE_ENABLE;
341 * Set the control register to automatically release successfully
342 * transmitted packets, to make the best use out of our limited
345 if(!THROTTLE_TX_PKTS)
346 ctl |= CTL_AUTO_RELEASE;
348 ctl &= ~CTL_AUTO_RELEASE;
349 SMC_SET_CTL(lp, ctl);
352 SMC_SELECT_BANK(lp, 2);
353 SMC_SET_MMU_CMD(lp, MC_RESET);
354 SMC_WAIT_MMU_BUSY(lp);
358 * Enable Interrupts, Receive, and Transmit
360 static void smc_enable(struct net_device *dev)
362 struct smc_local *lp = netdev_priv(dev);
363 void __iomem *ioaddr = lp->base;
366 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
368 /* see the header file for options in TCR/RCR DEFAULT */
369 SMC_SELECT_BANK(lp, 0);
370 SMC_SET_TCR(lp, lp->tcr_cur_mode);
371 SMC_SET_RCR(lp, lp->rcr_cur_mode);
373 SMC_SELECT_BANK(lp, 1);
374 SMC_SET_MAC_ADDR(lp, dev->dev_addr);
376 /* now, enable interrupts */
377 mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
378 if (lp->version >= (CHIP_91100 << 4))
380 SMC_SELECT_BANK(lp, 2);
381 SMC_SET_INT_MASK(lp, mask);
384 * From this point the register bank must _NOT_ be switched away
385 * to something else than bank 2 without proper locking against
386 * races with any tasklet or interrupt handlers until smc_shutdown()
387 * or smc_reset() is called.
392 * this puts the device in an inactive state
394 static void smc_shutdown(struct net_device *dev)
396 struct smc_local *lp = netdev_priv(dev);
397 void __iomem *ioaddr = lp->base;
398 struct sk_buff *pending_skb;
400 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
402 /* no more interrupts for me */
403 spin_lock_irq(&lp->lock);
404 SMC_SELECT_BANK(lp, 2);
405 SMC_SET_INT_MASK(lp, 0);
406 pending_skb = lp->pending_tx_skb;
407 lp->pending_tx_skb = NULL;
408 spin_unlock_irq(&lp->lock);
410 dev_kfree_skb(pending_skb);
412 /* and tell the card to stay away from that nasty outside world */
413 SMC_SELECT_BANK(lp, 0);
414 SMC_SET_RCR(lp, RCR_CLEAR);
415 SMC_SET_TCR(lp, TCR_CLEAR);
418 /* finally, shut the chip down */
419 SMC_SELECT_BANK(lp, 1);
420 SMC_SET_CONFIG(lp, SMC_GET_CONFIG(lp) & ~CONFIG_EPH_POWER_EN);
425 * This is the procedure to handle the receipt of a packet.
427 static inline void smc_rcv(struct net_device *dev)
429 struct smc_local *lp = netdev_priv(dev);
430 void __iomem *ioaddr = lp->base;
431 unsigned int packet_number, status, packet_len;
433 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
435 packet_number = SMC_GET_RXFIFO(lp);
436 if (unlikely(packet_number & RXFIFO_REMPTY)) {
437 PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name);
441 /* read from start of packet */
442 SMC_SET_PTR(lp, PTR_READ | PTR_RCV | PTR_AUTOINC);
444 /* First two words are status and packet length */
445 SMC_GET_PKT_HDR(lp, status, packet_len);
446 packet_len &= 0x07ff; /* mask off top bits */
447 DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
448 dev->name, packet_number, status,
449 packet_len, packet_len);
451 if (unlikely(packet_len == 0 && !(status & RS_ERRORS))) {
452 printk(KERN_ERR "%s: bad memory timings: rxlen %u status %x\n",
453 dev->name, packet_len, status);
454 status |= RS_TOOSHORT;
457 if (unlikely(packet_len < 6 || status & RS_ERRORS)) {
458 if (status & RS_TOOLONG && packet_len <= (1514 + 4 + 6)) {
459 /* accept VLAN packets */
460 status &= ~RS_TOOLONG;
463 if (packet_len < 6) {
464 /* bloody hardware */
465 printk(KERN_ERR "%s: fubar (rxlen %u status %x\n",
466 dev->name, packet_len, status);
467 status |= RS_TOOSHORT;
469 SMC_WAIT_MMU_BUSY(lp);
470 SMC_SET_MMU_CMD(lp, MC_RELEASE);
471 dev->stats.rx_errors++;
472 if (status & RS_ALGNERR)
473 dev->stats.rx_frame_errors++;
474 if (status & (RS_TOOSHORT | RS_TOOLONG))
475 dev->stats.rx_length_errors++;
476 if (status & RS_BADCRC)
477 dev->stats.rx_crc_errors++;
481 unsigned int data_len;
483 /* set multicast stats */
484 if (status & RS_MULTICAST)
485 dev->stats.multicast++;
488 * Actual payload is packet_len - 6 (or 5 if odd byte).
489 * We want skb_reserve(2) and the final ctrl word
490 * (2 bytes, possibly containing the payload odd byte).
491 * Furthermore, we add 2 bytes to allow rounding up to
492 * multiple of 4 bytes on 32 bit buses.
493 * Hence packet_len - 6 + 2 + 2 + 2.
495 skb = dev_alloc_skb(packet_len);
496 if (unlikely(skb == NULL)) {
497 printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
499 SMC_WAIT_MMU_BUSY(lp);
500 SMC_SET_MMU_CMD(lp, MC_RELEASE);
501 dev->stats.rx_dropped++;
505 /* Align IP header to 32 bits */
508 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
509 if (lp->version == 0x90)
510 status |= RS_ODDFRAME;
513 * If odd length: packet_len - 5,
514 * otherwise packet_len - 6.
515 * With the trailing ctrl byte it's packet_len - 4.
517 data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
518 data = skb_put(skb, data_len);
519 SMC_PULL_DATA(lp, data, packet_len - 4);
521 SMC_WAIT_MMU_BUSY(lp);
522 SMC_SET_MMU_CMD(lp, MC_RELEASE);
524 PRINT_PKT(data, packet_len - 4);
526 dev->last_rx = jiffies;
527 skb->protocol = eth_type_trans(skb, dev);
529 dev->stats.rx_packets++;
530 dev->stats.rx_bytes += data_len;
536 * On SMP we have the following problem:
538 * A = smc_hardware_send_pkt()
539 * B = smc_hard_start_xmit()
540 * C = smc_interrupt()
542 * A and B can never be executed simultaneously. However, at least on UP,
543 * it is possible (and even desirable) for C to interrupt execution of
544 * A or B in order to have better RX reliability and avoid overruns.
545 * C, just like A and B, must have exclusive access to the chip and
546 * each of them must lock against any other concurrent access.
547 * Unfortunately this is not possible to have C suspend execution of A or
548 * B taking place on another CPU. On UP this is no an issue since A and B
549 * are run from softirq context and C from hard IRQ context, and there is
550 * no other CPU where concurrent access can happen.
551 * If ever there is a way to force at least B and C to always be executed
552 * on the same CPU then we could use read/write locks to protect against
553 * any other concurrent access and C would always interrupt B. But life
554 * isn't that easy in a SMP world...
556 #define smc_special_trylock(lock) \
559 local_irq_disable(); \
560 __ret = spin_trylock(lock); \
562 local_irq_enable(); \
565 #define smc_special_lock(lock) spin_lock_irq(lock)
566 #define smc_special_unlock(lock) spin_unlock_irq(lock)
568 #define smc_special_trylock(lock) (1)
569 #define smc_special_lock(lock) do { } while (0)
570 #define smc_special_unlock(lock) do { } while (0)
574 * This is called to actually send a packet to the chip.
576 static void smc_hardware_send_pkt(unsigned long data)
578 struct net_device *dev = (struct net_device *)data;
579 struct smc_local *lp = netdev_priv(dev);
580 void __iomem *ioaddr = lp->base;
582 unsigned int packet_no, len;
585 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
587 if (!smc_special_trylock(&lp->lock)) {
588 netif_stop_queue(dev);
589 tasklet_schedule(&lp->tx_task);
593 skb = lp->pending_tx_skb;
594 if (unlikely(!skb)) {
595 smc_special_unlock(&lp->lock);
598 lp->pending_tx_skb = NULL;
600 packet_no = SMC_GET_AR(lp);
601 if (unlikely(packet_no & AR_FAILED)) {
602 printk("%s: Memory allocation failed.\n", dev->name);
603 dev->stats.tx_errors++;
604 dev->stats.tx_fifo_errors++;
605 smc_special_unlock(&lp->lock);
609 /* point to the beginning of the packet */
610 SMC_SET_PN(lp, packet_no);
611 SMC_SET_PTR(lp, PTR_AUTOINC);
615 DBG(2, "%s: TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
616 dev->name, packet_no, len, len, buf);
620 * Send the packet length (+6 for status words, length, and ctl.
621 * The card will pad to 64 bytes with zeroes if packet is too small.
623 SMC_PUT_PKT_HDR(lp, 0, len + 6);
625 /* send the actual data */
626 SMC_PUSH_DATA(lp, buf, len & ~1);
628 /* Send final ctl word with the last byte if there is one */
629 SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG(lp));
632 * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
633 * have the effect of having at most one packet queued for TX
634 * in the chip's memory at all time.
636 * If THROTTLE_TX_PKTS is not set then the queue is stopped only
637 * when memory allocation (MC_ALLOC) does not succeed right away.
639 if (THROTTLE_TX_PKTS)
640 netif_stop_queue(dev);
642 /* queue the packet for TX */
643 SMC_SET_MMU_CMD(lp, MC_ENQUEUE);
644 smc_special_unlock(&lp->lock);
646 dev->trans_start = jiffies;
647 dev->stats.tx_packets++;
648 dev->stats.tx_bytes += len;
650 SMC_ENABLE_INT(lp, IM_TX_INT | IM_TX_EMPTY_INT);
652 done: if (!THROTTLE_TX_PKTS)
653 netif_wake_queue(dev);
659 * Since I am not sure if I will have enough room in the chip's ram
660 * to store the packet, I call this routine which either sends it
661 * now, or set the card to generates an interrupt when ready
664 static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
666 struct smc_local *lp = netdev_priv(dev);
667 void __iomem *ioaddr = lp->base;
668 unsigned int numPages, poll_count, status;
670 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
672 BUG_ON(lp->pending_tx_skb != NULL);
675 * The MMU wants the number of pages to be the number of 256 bytes
676 * 'pages', minus 1 (since a packet can't ever have 0 pages :))
678 * The 91C111 ignores the size bits, but earlier models don't.
680 * Pkt size for allocating is data length +6 (for additional status
681 * words, length and ctl)
683 * If odd size then last byte is included in ctl word.
685 numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
686 if (unlikely(numPages > 7)) {
687 printk("%s: Far too big packet error.\n", dev->name);
688 dev->stats.tx_errors++;
689 dev->stats.tx_dropped++;
694 smc_special_lock(&lp->lock);
696 /* now, try to allocate the memory */
697 SMC_SET_MMU_CMD(lp, MC_ALLOC | numPages);
700 * Poll the chip for a short amount of time in case the
701 * allocation succeeds quickly.
703 poll_count = MEMORY_WAIT_TIME;
705 status = SMC_GET_INT(lp);
706 if (status & IM_ALLOC_INT) {
707 SMC_ACK_INT(lp, IM_ALLOC_INT);
710 } while (--poll_count);
712 smc_special_unlock(&lp->lock);
714 lp->pending_tx_skb = skb;
716 /* oh well, wait until the chip finds memory later */
717 netif_stop_queue(dev);
718 DBG(2, "%s: TX memory allocation deferred.\n", dev->name);
719 SMC_ENABLE_INT(lp, IM_ALLOC_INT);
722 * Allocation succeeded: push packet to the chip's own memory
725 smc_hardware_send_pkt((unsigned long)dev);
732 * This handles a TX interrupt, which is only called when:
733 * - a TX error occurred, or
734 * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
736 static void smc_tx(struct net_device *dev)
738 struct smc_local *lp = netdev_priv(dev);
739 void __iomem *ioaddr = lp->base;
740 unsigned int saved_packet, packet_no, tx_status, pkt_len;
742 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
744 /* If the TX FIFO is empty then nothing to do */
745 packet_no = SMC_GET_TXFIFO(lp);
746 if (unlikely(packet_no & TXFIFO_TEMPTY)) {
747 PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name);
751 /* select packet to read from */
752 saved_packet = SMC_GET_PN(lp);
753 SMC_SET_PN(lp, packet_no);
755 /* read the first word (status word) from this packet */
756 SMC_SET_PTR(lp, PTR_AUTOINC | PTR_READ);
757 SMC_GET_PKT_HDR(lp, tx_status, pkt_len);
758 DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
759 dev->name, tx_status, packet_no);
761 if (!(tx_status & ES_TX_SUC))
762 dev->stats.tx_errors++;
764 if (tx_status & ES_LOSTCARR)
765 dev->stats.tx_carrier_errors++;
767 if (tx_status & (ES_LATCOL | ES_16COL)) {
768 PRINTK("%s: %s occurred on last xmit\n", dev->name,
769 (tx_status & ES_LATCOL) ?
770 "late collision" : "too many collisions");
771 dev->stats.tx_window_errors++;
772 if (!(dev->stats.tx_window_errors & 63) && net_ratelimit()) {
773 printk(KERN_INFO "%s: unexpectedly large number of "
774 "bad collisions. Please check duplex "
775 "setting.\n", dev->name);
779 /* kill the packet */
780 SMC_WAIT_MMU_BUSY(lp);
781 SMC_SET_MMU_CMD(lp, MC_FREEPKT);
783 /* Don't restore Packet Number Reg until busy bit is cleared */
784 SMC_WAIT_MMU_BUSY(lp);
785 SMC_SET_PN(lp, saved_packet);
787 /* re-enable transmit */
788 SMC_SELECT_BANK(lp, 0);
789 SMC_SET_TCR(lp, lp->tcr_cur_mode);
790 SMC_SELECT_BANK(lp, 2);
794 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
796 static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
798 struct smc_local *lp = netdev_priv(dev);
799 void __iomem *ioaddr = lp->base;
800 unsigned int mii_reg, mask;
802 mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
805 for (mask = 1 << (bits - 1); mask; mask >>= 1) {
811 SMC_SET_MII(lp, mii_reg);
813 SMC_SET_MII(lp, mii_reg | MII_MCLK);
818 static unsigned int smc_mii_in(struct net_device *dev, int bits)
820 struct smc_local *lp = netdev_priv(dev);
821 void __iomem *ioaddr = lp->base;
822 unsigned int mii_reg, mask, val;
824 mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
825 SMC_SET_MII(lp, mii_reg);
827 for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
828 if (SMC_GET_MII(lp) & MII_MDI)
831 SMC_SET_MII(lp, mii_reg);
833 SMC_SET_MII(lp, mii_reg | MII_MCLK);
841 * Reads a register from the MII Management serial interface
843 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
845 struct smc_local *lp = netdev_priv(dev);
846 void __iomem *ioaddr = lp->base;
847 unsigned int phydata;
849 SMC_SELECT_BANK(lp, 3);
852 smc_mii_out(dev, 0xffffffff, 32);
854 /* Start code (01) + read (10) + phyaddr + phyreg */
855 smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
857 /* Turnaround (2bits) + phydata */
858 phydata = smc_mii_in(dev, 18);
860 /* Return to idle state */
861 SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
863 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
864 __FUNCTION__, phyaddr, phyreg, phydata);
866 SMC_SELECT_BANK(lp, 2);
871 * Writes a register to the MII Management serial interface
873 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
876 struct smc_local *lp = netdev_priv(dev);
877 void __iomem *ioaddr = lp->base;
879 SMC_SELECT_BANK(lp, 3);
882 smc_mii_out(dev, 0xffffffff, 32);
884 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
885 smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
887 /* Return to idle state */
888 SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
890 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
891 __FUNCTION__, phyaddr, phyreg, phydata);
893 SMC_SELECT_BANK(lp, 2);
897 * Finds and reports the PHY address
899 static void smc_phy_detect(struct net_device *dev)
901 struct smc_local *lp = netdev_priv(dev);
904 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
909 * Scan all 32 PHY addresses if necessary, starting at
910 * PHY#1 to PHY#31, and then PHY#0 last.
912 for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
913 unsigned int id1, id2;
915 /* Read the PHY identifiers */
916 id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
917 id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
919 DBG(3, "%s: phy_id1=0x%x, phy_id2=0x%x\n",
920 dev->name, id1, id2);
922 /* Make sure it is a valid identifier */
923 if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
924 id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
925 /* Save the PHY's address */
926 lp->mii.phy_id = phyaddr & 31;
927 lp->phy_type = id1 << 16 | id2;
934 * Sets the PHY to a configuration as determined by the user
936 static int smc_phy_fixed(struct net_device *dev)
938 struct smc_local *lp = netdev_priv(dev);
939 void __iomem *ioaddr = lp->base;
940 int phyaddr = lp->mii.phy_id;
943 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
945 /* Enter Link Disable state */
946 cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
947 cfg1 |= PHY_CFG1_LNKDIS;
948 smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
951 * Set our fixed capabilities
952 * Disable auto-negotiation
957 bmcr |= BMCR_FULLDPLX;
959 if (lp->ctl_rspeed == 100)
960 bmcr |= BMCR_SPEED100;
962 /* Write our capabilities to the phy control register */
963 smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
965 /* Re-Configure the Receive/Phy Control register */
966 SMC_SELECT_BANK(lp, 0);
967 SMC_SET_RPC(lp, lp->rpc_cur_mode);
968 SMC_SELECT_BANK(lp, 2);
974 * smc_phy_reset - reset the phy
978 * Issue a software reset for the specified PHY and
979 * wait up to 100ms for the reset to complete. We should
980 * not access the PHY for 50ms after issuing the reset.
982 * The time to wait appears to be dependent on the PHY.
984 * Must be called with lp->lock locked.
986 static int smc_phy_reset(struct net_device *dev, int phy)
988 struct smc_local *lp = netdev_priv(dev);
992 smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
994 for (timeout = 2; timeout; timeout--) {
995 spin_unlock_irq(&lp->lock);
997 spin_lock_irq(&lp->lock);
999 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1000 if (!(bmcr & BMCR_RESET))
1004 return bmcr & BMCR_RESET;
1008 * smc_phy_powerdown - powerdown phy
1011 * Power down the specified PHY
1013 static void smc_phy_powerdown(struct net_device *dev)
1015 struct smc_local *lp = netdev_priv(dev);
1017 int phy = lp->mii.phy_id;
1019 if (lp->phy_type == 0)
1022 /* We need to ensure that no calls to smc_phy_configure are
1025 flush_scheduled_work() cannot be called because we are
1026 running with the netlink semaphore held (from
1027 devinet_ioctl()) and the pending work queue contains
1028 linkwatch_event() (scheduled by netif_carrier_off()
1029 above). linkwatch_event() also wants the netlink semaphore.
1031 while(lp->work_pending)
1034 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1035 smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
1039 * smc_phy_check_media - check the media status and adjust TCR
1041 * @init: set true for initialisation
1043 * Select duplex mode depending on negotiation state. This
1044 * also updates our carrier state.
1046 static void smc_phy_check_media(struct net_device *dev, int init)
1048 struct smc_local *lp = netdev_priv(dev);
1049 void __iomem *ioaddr = lp->base;
1051 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
1052 /* duplex state has changed */
1053 if (lp->mii.full_duplex) {
1054 lp->tcr_cur_mode |= TCR_SWFDUP;
1056 lp->tcr_cur_mode &= ~TCR_SWFDUP;
1059 SMC_SELECT_BANK(lp, 0);
1060 SMC_SET_TCR(lp, lp->tcr_cur_mode);
1065 * Configures the specified PHY through the MII management interface
1066 * using Autonegotiation.
1067 * Calls smc_phy_fixed() if the user has requested a certain config.
1068 * If RPC ANEG bit is set, the media selection is dependent purely on
1069 * the selection by the MII (either in the MII BMCR reg or the result
1070 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
1071 * is controlled by the RPC SPEED and RPC DPLX bits.
1073 static void smc_phy_configure(struct work_struct *work)
1075 struct smc_local *lp =
1076 container_of(work, struct smc_local, phy_configure);
1077 struct net_device *dev = lp->dev;
1078 void __iomem *ioaddr = lp->base;
1079 int phyaddr = lp->mii.phy_id;
1080 int my_phy_caps; /* My PHY capabilities */
1081 int my_ad_caps; /* My Advertised capabilities */
1084 DBG(3, "%s:smc_program_phy()\n", dev->name);
1086 spin_lock_irq(&lp->lock);
1089 * We should not be called if phy_type is zero.
1091 if (lp->phy_type == 0)
1092 goto smc_phy_configure_exit;
1094 if (smc_phy_reset(dev, phyaddr)) {
1095 printk("%s: PHY reset timed out\n", dev->name);
1096 goto smc_phy_configure_exit;
1100 * Enable PHY Interrupts (for register 18)
1101 * Interrupts listed here are disabled
1103 smc_phy_write(dev, phyaddr, PHY_MASK_REG,
1104 PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
1105 PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
1106 PHY_INT_SPDDET | PHY_INT_DPLXDET);
1108 /* Configure the Receive/Phy Control register */
1109 SMC_SELECT_BANK(lp, 0);
1110 SMC_SET_RPC(lp, lp->rpc_cur_mode);
1112 /* If the user requested no auto neg, then go set his request */
1113 if (lp->mii.force_media) {
1115 goto smc_phy_configure_exit;
1118 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1119 my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
1121 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
1122 printk(KERN_INFO "Auto negotiation NOT supported\n");
1124 goto smc_phy_configure_exit;
1127 my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
1129 if (my_phy_caps & BMSR_100BASE4)
1130 my_ad_caps |= ADVERTISE_100BASE4;
1131 if (my_phy_caps & BMSR_100FULL)
1132 my_ad_caps |= ADVERTISE_100FULL;
1133 if (my_phy_caps & BMSR_100HALF)
1134 my_ad_caps |= ADVERTISE_100HALF;
1135 if (my_phy_caps & BMSR_10FULL)
1136 my_ad_caps |= ADVERTISE_10FULL;
1137 if (my_phy_caps & BMSR_10HALF)
1138 my_ad_caps |= ADVERTISE_10HALF;
1140 /* Disable capabilities not selected by our user */
1141 if (lp->ctl_rspeed != 100)
1142 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1144 if (!lp->ctl_rfduplx)
1145 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1147 /* Update our Auto-Neg Advertisement Register */
1148 smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
1149 lp->mii.advertising = my_ad_caps;
1152 * Read the register back. Without this, it appears that when
1153 * auto-negotiation is restarted, sometimes it isn't ready and
1154 * the link does not come up.
1156 status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
1158 DBG(2, "%s: phy caps=%x\n", dev->name, my_phy_caps);
1159 DBG(2, "%s: phy advertised caps=%x\n", dev->name, my_ad_caps);
1161 /* Restart auto-negotiation process in order to advertise my caps */
1162 smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
1164 smc_phy_check_media(dev, 1);
1166 smc_phy_configure_exit:
1167 SMC_SELECT_BANK(lp, 2);
1168 spin_unlock_irq(&lp->lock);
1169 lp->work_pending = 0;
1175 * Purpose: Handle interrupts relating to PHY register 18. This is
1176 * called from the "hard" interrupt handler under our private spinlock.
1178 static void smc_phy_interrupt(struct net_device *dev)
1180 struct smc_local *lp = netdev_priv(dev);
1181 int phyaddr = lp->mii.phy_id;
1184 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1186 if (lp->phy_type == 0)
1190 smc_phy_check_media(dev, 0);
1192 /* Read PHY Register 18, Status Output */
1193 phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
1194 if ((phy18 & PHY_INT_INT) == 0)
1199 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1201 static void smc_10bt_check_media(struct net_device *dev, int init)
1203 struct smc_local *lp = netdev_priv(dev);
1204 void __iomem *ioaddr = lp->base;
1205 unsigned int old_carrier, new_carrier;
1207 old_carrier = netif_carrier_ok(dev) ? 1 : 0;
1209 SMC_SELECT_BANK(lp, 0);
1210 new_carrier = (SMC_GET_EPH_STATUS(lp) & ES_LINK_OK) ? 1 : 0;
1211 SMC_SELECT_BANK(lp, 2);
1213 if (init || (old_carrier != new_carrier)) {
1215 netif_carrier_off(dev);
1217 netif_carrier_on(dev);
1219 if (netif_msg_link(lp))
1220 printk(KERN_INFO "%s: link %s\n", dev->name,
1221 new_carrier ? "up" : "down");
1225 static void smc_eph_interrupt(struct net_device *dev)
1227 struct smc_local *lp = netdev_priv(dev);
1228 void __iomem *ioaddr = lp->base;
1231 smc_10bt_check_media(dev, 0);
1233 SMC_SELECT_BANK(lp, 1);
1234 ctl = SMC_GET_CTL(lp);
1235 SMC_SET_CTL(lp, ctl & ~CTL_LE_ENABLE);
1236 SMC_SET_CTL(lp, ctl);
1237 SMC_SELECT_BANK(lp, 2);
1241 * This is the main routine of the driver, to handle the device when
1242 * it needs some attention.
1244 static irqreturn_t smc_interrupt(int irq, void *dev_id)
1246 struct net_device *dev = dev_id;
1247 struct smc_local *lp = netdev_priv(dev);
1248 void __iomem *ioaddr = lp->base;
1249 int status, mask, timeout, card_stats;
1252 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
1254 spin_lock(&lp->lock);
1256 /* A preamble may be used when there is a potential race
1257 * between the interruptible transmit functions and this
1259 SMC_INTERRUPT_PREAMBLE;
1261 saved_pointer = SMC_GET_PTR(lp);
1262 mask = SMC_GET_INT_MASK(lp);
1263 SMC_SET_INT_MASK(lp, 0);
1265 /* set a timeout value, so I don't stay here forever */
1266 timeout = MAX_IRQ_LOOPS;
1269 status = SMC_GET_INT(lp);
1271 DBG(2, "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1272 dev->name, status, mask,
1273 ({ int meminfo; SMC_SELECT_BANK(lp, 0);
1274 meminfo = SMC_GET_MIR(lp);
1275 SMC_SELECT_BANK(lp, 2); meminfo; }),
1282 if (status & IM_TX_INT) {
1283 /* do this before RX as it will free memory quickly */
1284 DBG(3, "%s: TX int\n", dev->name);
1286 SMC_ACK_INT(lp, IM_TX_INT);
1287 if (THROTTLE_TX_PKTS)
1288 netif_wake_queue(dev);
1289 } else if (status & IM_RCV_INT) {
1290 DBG(3, "%s: RX irq\n", dev->name);
1292 } else if (status & IM_ALLOC_INT) {
1293 DBG(3, "%s: Allocation irq\n", dev->name);
1294 tasklet_hi_schedule(&lp->tx_task);
1295 mask &= ~IM_ALLOC_INT;
1296 } else if (status & IM_TX_EMPTY_INT) {
1297 DBG(3, "%s: TX empty\n", dev->name);
1298 mask &= ~IM_TX_EMPTY_INT;
1301 SMC_SELECT_BANK(lp, 0);
1302 card_stats = SMC_GET_COUNTER(lp);
1303 SMC_SELECT_BANK(lp, 2);
1305 /* single collisions */
1306 dev->stats.collisions += card_stats & 0xF;
1309 /* multiple collisions */
1310 dev->stats.collisions += card_stats & 0xF;
1311 } else if (status & IM_RX_OVRN_INT) {
1312 DBG(1, "%s: RX overrun (EPH_ST 0x%04x)\n", dev->name,
1313 ({ int eph_st; SMC_SELECT_BANK(lp, 0);
1314 eph_st = SMC_GET_EPH_STATUS(lp);
1315 SMC_SELECT_BANK(lp, 2); eph_st; }));
1316 SMC_ACK_INT(lp, IM_RX_OVRN_INT);
1317 dev->stats.rx_errors++;
1318 dev->stats.rx_fifo_errors++;
1319 } else if (status & IM_EPH_INT) {
1320 smc_eph_interrupt(dev);
1321 } else if (status & IM_MDINT) {
1322 SMC_ACK_INT(lp, IM_MDINT);
1323 smc_phy_interrupt(dev);
1324 } else if (status & IM_ERCV_INT) {
1325 SMC_ACK_INT(lp, IM_ERCV_INT);
1326 PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name);
1328 } while (--timeout);
1330 /* restore register states */
1331 SMC_SET_PTR(lp, saved_pointer);
1332 SMC_SET_INT_MASK(lp, mask);
1333 spin_unlock(&lp->lock);
1335 #ifndef CONFIG_NET_POLL_CONTROLLER
1336 if (timeout == MAX_IRQ_LOOPS)
1337 PRINTK("%s: spurious interrupt (mask = 0x%02x)\n",
1340 DBG(3, "%s: Interrupt done (%d loops)\n",
1341 dev->name, MAX_IRQ_LOOPS - timeout);
1344 * We return IRQ_HANDLED unconditionally here even if there was
1345 * nothing to do. There is a possibility that a packet might
1346 * get enqueued into the chip right after TX_EMPTY_INT is raised
1347 * but just before the CPU acknowledges the IRQ.
1348 * Better take an unneeded IRQ in some occasions than complexifying
1349 * the code for all cases.
1354 #ifdef CONFIG_NET_POLL_CONTROLLER
1356 * Polling receive - used by netconsole and other diagnostic tools
1357 * to allow network i/o with interrupts disabled.
1359 static void smc_poll_controller(struct net_device *dev)
1361 disable_irq(dev->irq);
1362 smc_interrupt(dev->irq, dev);
1363 enable_irq(dev->irq);
1367 /* Our watchdog timed out. Called by the networking layer */
1368 static void smc_timeout(struct net_device *dev)
1370 struct smc_local *lp = netdev_priv(dev);
1371 void __iomem *ioaddr = lp->base;
1372 int status, mask, eph_st, meminfo, fifo;
1374 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1376 spin_lock_irq(&lp->lock);
1377 status = SMC_GET_INT(lp);
1378 mask = SMC_GET_INT_MASK(lp);
1379 fifo = SMC_GET_FIFO(lp);
1380 SMC_SELECT_BANK(lp, 0);
1381 eph_st = SMC_GET_EPH_STATUS(lp);
1382 meminfo = SMC_GET_MIR(lp);
1383 SMC_SELECT_BANK(lp, 2);
1384 spin_unlock_irq(&lp->lock);
1385 PRINTK( "%s: TX timeout (INT 0x%02x INTMASK 0x%02x "
1386 "MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
1387 dev->name, status, mask, meminfo, fifo, eph_st );
1393 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1394 * smc_phy_configure() calls msleep() which calls schedule_timeout()
1395 * which calls schedule(). Hence we use a work queue.
1397 if (lp->phy_type != 0) {
1398 if (schedule_work(&lp->phy_configure)) {
1399 lp->work_pending = 1;
1403 /* We can accept TX packets again */
1404 dev->trans_start = jiffies;
1405 netif_wake_queue(dev);
1409 * This routine will, depending on the values passed to it,
1410 * either make it accept multicast packets, go into
1411 * promiscuous mode (for TCPDUMP and cousins) or accept
1412 * a select set of multicast packets
1414 static void smc_set_multicast_list(struct net_device *dev)
1416 struct smc_local *lp = netdev_priv(dev);
1417 void __iomem *ioaddr = lp->base;
1418 unsigned char multicast_table[8];
1419 int update_multicast = 0;
1421 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1423 if (dev->flags & IFF_PROMISC) {
1424 DBG(2, "%s: RCR_PRMS\n", dev->name);
1425 lp->rcr_cur_mode |= RCR_PRMS;
1428 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1429 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1430 when promiscuous mode is turned on.
1434 * Here, I am setting this to accept all multicast packets.
1435 * I don't need to zero the multicast table, because the flag is
1436 * checked before the table is
1438 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1439 DBG(2, "%s: RCR_ALMUL\n", dev->name);
1440 lp->rcr_cur_mode |= RCR_ALMUL;
1444 * This sets the internal hardware table to filter out unwanted
1445 * multicast packets before they take up memory.
1447 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1448 * address are the offset into the table. If that bit is 1, then the
1449 * multicast packet is accepted. Otherwise, it's dropped silently.
1451 * To use the 6 bits as an offset into the table, the high 3 bits are
1452 * the number of the 8 bit register, while the low 3 bits are the bit
1453 * within that register.
1455 else if (dev->mc_count) {
1457 struct dev_mc_list *cur_addr;
1459 /* table for flipping the order of 3 bits */
1460 static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};
1462 /* start with a table of all zeros: reject all */
1463 memset(multicast_table, 0, sizeof(multicast_table));
1465 cur_addr = dev->mc_list;
1466 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1469 /* do we have a pointer here? */
1472 /* make sure this is a multicast address -
1473 shouldn't this be a given if we have it here ? */
1474 if (!(*cur_addr->dmi_addr & 1))
1477 /* only use the low order bits */
1478 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1480 /* do some messy swapping to put the bit in the right spot */
1481 multicast_table[invert3[position&7]] |=
1482 (1<<invert3[(position>>3)&7]);
1485 /* be sure I get rid of flags I might have set */
1486 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1488 /* now, the table can be loaded into the chipset */
1489 update_multicast = 1;
1491 DBG(2, "%s: ~(RCR_PRMS|RCR_ALMUL)\n", dev->name);
1492 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1495 * since I'm disabling all multicast entirely, I need to
1496 * clear the multicast list
1498 memset(multicast_table, 0, sizeof(multicast_table));
1499 update_multicast = 1;
1502 spin_lock_irq(&lp->lock);
1503 SMC_SELECT_BANK(lp, 0);
1504 SMC_SET_RCR(lp, lp->rcr_cur_mode);
1505 if (update_multicast) {
1506 SMC_SELECT_BANK(lp, 3);
1507 SMC_SET_MCAST(lp, multicast_table);
1509 SMC_SELECT_BANK(lp, 2);
1510 spin_unlock_irq(&lp->lock);
1515 * Open and Initialize the board
1517 * Set up everything, reset the card, etc..
1520 smc_open(struct net_device *dev)
1522 struct smc_local *lp = netdev_priv(dev);
1524 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1527 * Check that the address is valid. If its not, refuse
1528 * to bring the device up. The user must specify an
1529 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1531 if (!is_valid_ether_addr(dev->dev_addr)) {
1532 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
1536 /* Setup the default Register Modes */
1537 lp->tcr_cur_mode = TCR_DEFAULT;
1538 lp->rcr_cur_mode = RCR_DEFAULT;
1539 lp->rpc_cur_mode = RPC_DEFAULT;
1542 * If we are not using a MII interface, we need to
1543 * monitor our own carrier signal to detect faults.
1545 if (lp->phy_type == 0)
1546 lp->tcr_cur_mode |= TCR_MON_CSN;
1548 /* reset the hardware */
1552 /* Configure the PHY, initialize the link state */
1553 if (lp->phy_type != 0)
1554 smc_phy_configure(&lp->phy_configure);
1556 spin_lock_irq(&lp->lock);
1557 smc_10bt_check_media(dev, 1);
1558 spin_unlock_irq(&lp->lock);
1561 netif_start_queue(dev);
1568 * this makes the board clean up everything that it can
1569 * and not talk to the outside world. Caused by
1570 * an 'ifconfig ethX down'
1572 static int smc_close(struct net_device *dev)
1574 struct smc_local *lp = netdev_priv(dev);
1576 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1578 netif_stop_queue(dev);
1579 netif_carrier_off(dev);
1581 /* clear everything */
1583 tasklet_kill(&lp->tx_task);
1584 smc_phy_powerdown(dev);
1592 smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1594 struct smc_local *lp = netdev_priv(dev);
1600 if (lp->phy_type != 0) {
1601 spin_lock_irq(&lp->lock);
1602 ret = mii_ethtool_gset(&lp->mii, cmd);
1603 spin_unlock_irq(&lp->lock);
1605 cmd->supported = SUPPORTED_10baseT_Half |
1606 SUPPORTED_10baseT_Full |
1607 SUPPORTED_TP | SUPPORTED_AUI;
1609 if (lp->ctl_rspeed == 10)
1610 cmd->speed = SPEED_10;
1611 else if (lp->ctl_rspeed == 100)
1612 cmd->speed = SPEED_100;
1614 cmd->autoneg = AUTONEG_DISABLE;
1615 cmd->transceiver = XCVR_INTERNAL;
1617 cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
1626 smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1628 struct smc_local *lp = netdev_priv(dev);
1631 if (lp->phy_type != 0) {
1632 spin_lock_irq(&lp->lock);
1633 ret = mii_ethtool_sset(&lp->mii, cmd);
1634 spin_unlock_irq(&lp->lock);
1636 if (cmd->autoneg != AUTONEG_DISABLE ||
1637 cmd->speed != SPEED_10 ||
1638 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1639 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1642 // lp->port = cmd->port;
1643 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1645 // if (netif_running(dev))
1646 // smc_set_port(dev);
1655 smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1657 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1658 strncpy(info->version, version, sizeof(info->version));
1659 strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
1662 static int smc_ethtool_nwayreset(struct net_device *dev)
1664 struct smc_local *lp = netdev_priv(dev);
1667 if (lp->phy_type != 0) {
1668 spin_lock_irq(&lp->lock);
1669 ret = mii_nway_restart(&lp->mii);
1670 spin_unlock_irq(&lp->lock);
1676 static u32 smc_ethtool_getmsglevel(struct net_device *dev)
1678 struct smc_local *lp = netdev_priv(dev);
1679 return lp->msg_enable;
1682 static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
1684 struct smc_local *lp = netdev_priv(dev);
1685 lp->msg_enable = level;
1688 static const struct ethtool_ops smc_ethtool_ops = {
1689 .get_settings = smc_ethtool_getsettings,
1690 .set_settings = smc_ethtool_setsettings,
1691 .get_drvinfo = smc_ethtool_getdrvinfo,
1693 .get_msglevel = smc_ethtool_getmsglevel,
1694 .set_msglevel = smc_ethtool_setmsglevel,
1695 .nway_reset = smc_ethtool_nwayreset,
1696 .get_link = ethtool_op_get_link,
1697 // .get_eeprom = smc_ethtool_geteeprom,
1698 // .set_eeprom = smc_ethtool_seteeprom,
1704 * This routine has a simple purpose -- make the SMC chip generate an
1705 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1708 * does this still work?
1710 * I just deleted auto_irq.c, since it was never built...
1713 static int __init smc_findirq(struct smc_local *lp)
1715 void __iomem *ioaddr = lp->base;
1717 unsigned long cookie;
1719 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1721 cookie = probe_irq_on();
1724 * What I try to do here is trigger an ALLOC_INT. This is done
1725 * by allocating a small chunk of memory, which will give an interrupt
1728 /* enable ALLOCation interrupts ONLY */
1729 SMC_SELECT_BANK(lp, 2);
1730 SMC_SET_INT_MASK(lp, IM_ALLOC_INT);
1733 * Allocate 512 bytes of memory. Note that the chip was just
1734 * reset so all the memory is available
1736 SMC_SET_MMU_CMD(lp, MC_ALLOC | 1);
1739 * Wait until positive that the interrupt has been generated
1744 int_status = SMC_GET_INT(lp);
1745 if (int_status & IM_ALLOC_INT)
1746 break; /* got the interrupt */
1747 } while (--timeout);
1750 * there is really nothing that I can do here if timeout fails,
1751 * as autoirq_report will return a 0 anyway, which is what I
1752 * want in this case. Plus, the clean up is needed in both
1756 /* and disable all interrupts again */
1757 SMC_SET_INT_MASK(lp, 0);
1759 /* and return what I found */
1760 return probe_irq_off(cookie);
1764 * Function: smc_probe(unsigned long ioaddr)
1767 * Tests to see if a given ioaddr points to an SMC91x chip.
1768 * Returns a 0 on success
1771 * (1) see if the high byte of BANK_SELECT is 0x33
1772 * (2) compare the ioaddr with the base register's address
1773 * (3) see if I recognize the chip ID in the appropriate register
1775 * Here I do typical initialization tasks.
1777 * o Initialize the structure if needed
1778 * o print out my vanity message if not done so already
1779 * o print out what type of hardware is detected
1780 * o print out the ethernet address
1782 * o set up my private data
1783 * o configure the dev structure with my subroutines
1784 * o actually GRAB the irq.
1787 static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr,
1788 unsigned long irq_flags)
1790 struct smc_local *lp = netdev_priv(dev);
1791 static int version_printed = 0;
1793 unsigned int val, revision_register;
1794 const char *version_string;
1795 DECLARE_MAC_BUF(mac);
1797 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1799 /* First, see if the high byte is 0x33 */
1800 val = SMC_CURRENT_BANK(lp);
1801 DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val);
1802 if ((val & 0xFF00) != 0x3300) {
1803 if ((val & 0xFF) == 0x33) {
1805 "%s: Detected possible byte-swapped interface"
1806 " at IOADDR %p\n", CARDNAME, ioaddr);
1813 * The above MIGHT indicate a device, but I need to write to
1814 * further test this.
1816 SMC_SELECT_BANK(lp, 0);
1817 val = SMC_CURRENT_BANK(lp);
1818 if ((val & 0xFF00) != 0x3300) {
1824 * well, we've already written once, so hopefully another
1825 * time won't hurt. This time, I need to switch the bank
1826 * register to bank 1, so I can access the base address
1829 SMC_SELECT_BANK(lp, 1);
1830 val = SMC_GET_BASE(lp);
1831 val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
1832 if (((unsigned int)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
1833 printk("%s: IOADDR %p doesn't match configuration (%x).\n",
1834 CARDNAME, ioaddr, val);
1838 * check if the revision register is something that I
1839 * recognize. These might need to be added to later,
1840 * as future revisions could be added.
1842 SMC_SELECT_BANK(lp, 3);
1843 revision_register = SMC_GET_REV(lp);
1844 DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
1845 version_string = chip_ids[ (revision_register >> 4) & 0xF];
1846 if (!version_string || (revision_register & 0xff00) != 0x3300) {
1847 /* I don't recognize this chip, so... */
1848 printk("%s: IO %p: Unrecognized revision register 0x%04x"
1849 ", Contact author.\n", CARDNAME,
1850 ioaddr, revision_register);
1856 /* At this point I'll assume that the chip is an SMC91x. */
1857 if (version_printed++ == 0)
1858 printk("%s", version);
1860 /* fill in some of the fields */
1861 dev->base_addr = (unsigned long)ioaddr;
1863 lp->version = revision_register & 0xff;
1864 spin_lock_init(&lp->lock);
1866 /* Get the MAC address */
1867 SMC_SELECT_BANK(lp, 1);
1868 SMC_GET_MAC_ADDR(lp, dev->dev_addr);
1870 /* now, reset the chip, and put it into a known state */
1874 * If dev->irq is 0, then the device has to be banged on to see
1877 * This banging doesn't always detect the IRQ, for unknown reasons.
1878 * a workaround is to reset the chip and try again.
1880 * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1881 * be what is requested on the command line. I don't do that, mostly
1882 * because the card that I have uses a non-standard method of accessing
1883 * the IRQs, and because this _should_ work in most configurations.
1885 * Specifying an IRQ is done with the assumption that the user knows
1886 * what (s)he is doing. No checking is done!!!!
1893 dev->irq = smc_findirq(lp);
1896 /* kick the card and try again */
1900 if (dev->irq == 0) {
1901 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1906 dev->irq = irq_canonicalize(dev->irq);
1908 /* Fill in the fields of the device structure with ethernet values. */
1911 dev->open = smc_open;
1912 dev->stop = smc_close;
1913 dev->hard_start_xmit = smc_hard_start_xmit;
1914 dev->tx_timeout = smc_timeout;
1915 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1916 dev->set_multicast_list = smc_set_multicast_list;
1917 dev->ethtool_ops = &smc_ethtool_ops;
1918 #ifdef CONFIG_NET_POLL_CONTROLLER
1919 dev->poll_controller = smc_poll_controller;
1922 tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev);
1923 INIT_WORK(&lp->phy_configure, smc_phy_configure);
1925 lp->mii.phy_id_mask = 0x1f;
1926 lp->mii.reg_num_mask = 0x1f;
1927 lp->mii.force_media = 0;
1928 lp->mii.full_duplex = 0;
1930 lp->mii.mdio_read = smc_phy_read;
1931 lp->mii.mdio_write = smc_phy_write;
1934 * Locate the phy, if any.
1936 if (lp->version >= (CHIP_91100 << 4))
1937 smc_phy_detect(dev);
1939 /* then shut everything down to save power */
1941 smc_phy_powerdown(dev);
1943 /* Set default parameters */
1944 lp->msg_enable = NETIF_MSG_LINK;
1945 lp->ctl_rfduplx = 0;
1946 lp->ctl_rspeed = 10;
1948 if (lp->version >= (CHIP_91100 << 4)) {
1949 lp->ctl_rfduplx = 1;
1950 lp->ctl_rspeed = 100;
1954 retval = request_irq(dev->irq, &smc_interrupt, irq_flags, dev->name, dev);
1958 #ifdef SMC_USE_PXA_DMA
1960 int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
1961 smc_pxa_dma_irq, NULL);
1967 retval = register_netdev(dev);
1969 /* now, print out the card info, in a short format.. */
1970 printk("%s: %s (rev %d) at %p IRQ %d",
1971 dev->name, version_string, revision_register & 0x0f,
1972 lp->base, dev->irq);
1974 if (dev->dma != (unsigned char)-1)
1975 printk(" DMA %d", dev->dma);
1977 printk("%s%s\n", nowait ? " [nowait]" : "",
1978 THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
1980 if (!is_valid_ether_addr(dev->dev_addr)) {
1981 printk("%s: Invalid ethernet MAC address. Please "
1982 "set using ifconfig\n", dev->name);
1984 /* Print the Ethernet address */
1985 printk("%s: Ethernet addr: %s\n",
1986 dev->name, print_mac(mac, dev->dev_addr));
1989 if (lp->phy_type == 0) {
1990 PRINTK("%s: No PHY found\n", dev->name);
1991 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
1992 PRINTK("%s: PHY LAN83C183 (LAN91C111 Internal)\n", dev->name);
1993 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
1994 PRINTK("%s: PHY LAN83C180\n", dev->name);
1999 #ifdef SMC_USE_PXA_DMA
2000 if (retval && dev->dma != (unsigned char)-1)
2001 pxa_free_dma(dev->dma);
2006 static int smc_enable_device(struct platform_device *pdev)
2008 struct net_device *ndev = platform_get_drvdata(pdev);
2009 struct smc_local *lp = netdev_priv(ndev);
2010 unsigned long flags;
2011 unsigned char ecor, ecsr;
2013 struct resource * res;
2015 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2020 * Map the attribute space. This is overkill, but clean.
2022 addr = ioremap(res->start, ATTRIB_SIZE);
2027 * Reset the device. We must disable IRQs around this
2028 * since a reset causes the IRQ line become active.
2030 local_irq_save(flags);
2031 ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
2032 writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
2033 readb(addr + (ECOR << SMC_IO_SHIFT));
2036 * Wait 100us for the chip to reset.
2041 * The device will ignore all writes to the enable bit while
2042 * reset is asserted, even if the reset bit is cleared in the
2043 * same write. Must clear reset first, then enable the device.
2045 writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
2046 writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
2049 * Set the appropriate byte/word mode.
2051 ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
2054 writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
2055 local_irq_restore(flags);
2060 * Wait for the chip to wake up. We could poll the control
2061 * register in the main register space, but that isn't mapped
2062 * yet. We know this is going to take 750us.
2069 static int smc_request_attrib(struct platform_device *pdev)
2071 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2076 if (!request_mem_region(res->start, ATTRIB_SIZE, CARDNAME))
2082 static void smc_release_attrib(struct platform_device *pdev)
2084 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2087 release_mem_region(res->start, ATTRIB_SIZE);
2090 static inline void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev)
2092 if (SMC_CAN_USE_DATACS) {
2093 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2094 struct smc_local *lp = netdev_priv(ndev);
2099 if(!request_mem_region(res->start, SMC_DATA_EXTENT, CARDNAME)) {
2100 printk(KERN_INFO "%s: failed to request datacs memory region.\n", CARDNAME);
2104 lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
2108 static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev)
2110 if (SMC_CAN_USE_DATACS) {
2111 struct smc_local *lp = netdev_priv(ndev);
2112 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2115 iounmap(lp->datacs);
2120 release_mem_region(res->start, SMC_DATA_EXTENT);
2127 * dev->base_addr == 0, try to find all possible locations
2128 * dev->base_addr > 0x1ff, this is the address to check
2129 * dev->base_addr == <anything else>, return failure code
2132 * 0 --> there is a device
2133 * anything else, error
2135 static int smc_drv_probe(struct platform_device *pdev)
2137 struct smc91x_platdata *pd = pdev->dev.platform_data;
2138 struct smc_local *lp;
2139 struct net_device *ndev;
2140 struct resource *res, *ires;
2141 unsigned int __iomem *addr;
2144 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2146 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2153 if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
2158 ndev = alloc_etherdev(sizeof(struct smc_local));
2160 printk("%s: could not allocate device.\n", CARDNAME);
2162 goto out_release_io;
2164 SET_NETDEV_DEV(ndev, &pdev->dev);
2166 /* get configuration from platform data, only allow use of
2167 * bus width if both SMC_CAN_USE_xxx and SMC91X_USE_xxx are set.
2170 lp = netdev_priv(ndev);
2171 lp->cfg.irq_flags = SMC_IRQ_FLAGS;
2173 #ifdef SMC_DYNAMIC_BUS_CONFIG
2175 memcpy(&lp->cfg, pd, sizeof(lp->cfg));
2177 lp->cfg.flags = SMC91X_USE_8BIT;
2178 lp->cfg.flags |= SMC91X_USE_16BIT;
2179 lp->cfg.flags |= SMC91X_USE_32BIT;
2182 lp->cfg.flags &= ~(SMC_CAN_USE_8BIT ? 0 : SMC91X_USE_8BIT);
2183 lp->cfg.flags &= ~(SMC_CAN_USE_16BIT ? 0 : SMC91X_USE_16BIT);
2184 lp->cfg.flags &= ~(SMC_CAN_USE_32BIT ? 0 : SMC91X_USE_32BIT);
2187 ndev->dma = (unsigned char)-1;
2189 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2192 goto out_free_netdev;
2195 ndev->irq = ires->start;
2196 if (SMC_IRQ_FLAGS == -1)
2197 lp->cfg.irq_flags = ires->flags & IRQF_TRIGGER_MASK;
2199 ret = smc_request_attrib(pdev);
2201 goto out_free_netdev;
2202 #if defined(CONFIG_SA1100_ASSABET)
2203 NCR_0 |= NCR_ENET_OSC_EN;
2205 platform_set_drvdata(pdev, ndev);
2206 ret = smc_enable_device(pdev);
2208 goto out_release_attrib;
2210 addr = ioremap(res->start, SMC_IO_EXTENT);
2213 goto out_release_attrib;
2216 #ifdef SMC_USE_PXA_DMA
2218 struct smc_local *lp = netdev_priv(ndev);
2219 lp->device = &pdev->dev;
2220 lp->physaddr = res->start;
2224 ret = smc_probe(ndev, addr, lp->cfg.irq_flags);
2228 smc_request_datacs(pdev, ndev);
2233 platform_set_drvdata(pdev, NULL);
2236 smc_release_attrib(pdev);
2240 release_mem_region(res->start, SMC_IO_EXTENT);
2242 printk("%s: not found (%d).\n", CARDNAME, ret);
2247 static int smc_drv_remove(struct platform_device *pdev)
2249 struct net_device *ndev = platform_get_drvdata(pdev);
2250 struct smc_local *lp = netdev_priv(ndev);
2251 struct resource *res;
2253 platform_set_drvdata(pdev, NULL);
2255 unregister_netdev(ndev);
2257 free_irq(ndev->irq, ndev);
2259 #ifdef SMC_USE_PXA_DMA
2260 if (ndev->dma != (unsigned char)-1)
2261 pxa_free_dma(ndev->dma);
2265 smc_release_datacs(pdev,ndev);
2266 smc_release_attrib(pdev);
2268 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2270 platform_get_resource(pdev, IORESOURCE_MEM, 0);
2271 release_mem_region(res->start, SMC_IO_EXTENT);
2278 static int smc_drv_suspend(struct platform_device *dev, pm_message_t state)
2280 struct net_device *ndev = platform_get_drvdata(dev);
2283 if (netif_running(ndev)) {
2284 netif_device_detach(ndev);
2286 smc_phy_powerdown(ndev);
2292 static int smc_drv_resume(struct platform_device *dev)
2294 struct net_device *ndev = platform_get_drvdata(dev);
2297 struct smc_local *lp = netdev_priv(ndev);
2298 smc_enable_device(dev);
2299 if (netif_running(ndev)) {
2302 if (lp->phy_type != 0)
2303 smc_phy_configure(&lp->phy_configure);
2304 netif_device_attach(ndev);
2310 static struct platform_driver smc_driver = {
2311 .probe = smc_drv_probe,
2312 .remove = smc_drv_remove,
2313 .suspend = smc_drv_suspend,
2314 .resume = smc_drv_resume,
2317 .owner = THIS_MODULE,
2321 static int __init smc_init(void)
2327 "%s: You shouldn't use auto-probing with insmod!\n",
2332 return platform_driver_register(&smc_driver);
2335 static void __exit smc_cleanup(void)
2337 platform_driver_unregister(&smc_driver);
2340 module_init(smc_init);
2341 module_exit(smc_cleanup);