3 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
5 * Copyright (C) 1996 by Erik Stahlman
6 * Copyright (C) 2001 Standard Microsystems Corporation
7 * Developed by Simple Network Magic Corporation
8 * Copyright (C) 2003 Monta Vista Software, Inc.
9 * Unified SMC91x driver by Nicolas Pitre
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 * io = for the base address
28 * nowait = 0 for normal wait states, 1 eliminates additional wait states
31 * Erik Stahlman <erik@vt.edu>
33 * hardware multicast code:
34 * Peter Cammaert <pc@denkart.be>
37 * Daris A Nevil <dnevil@snmc.com>
38 * Nicolas Pitre <nico@cam.org>
39 * Russell King <rmk@arm.linux.org.uk>
42 * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
43 * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
44 * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
45 * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
46 * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
47 * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
48 * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
49 * more bus abstraction, big cleanup, etc.
50 * 29/09/03 Russell King - add driver model support
52 * - convert to use generic MII interface
53 * - add link up/down notification
54 * - don't try to handle full negotiation in
56 * - clean up (and fix stack overrun) in PHY
57 * MII read/write functions
58 * 22/09/04 Nicolas Pitre big update (see commit log for details)
60 static const char version[] =
61 "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>\n";
69 #include <linux/init.h>
70 #include <linux/module.h>
71 #include <linux/kernel.h>
72 #include <linux/sched.h>
73 #include <linux/slab.h>
74 #include <linux/delay.h>
75 #include <linux/interrupt.h>
76 #include <linux/errno.h>
77 #include <linux/ioport.h>
78 #include <linux/crc32.h>
79 #include <linux/platform_device.h>
80 #include <linux/spinlock.h>
81 #include <linux/ethtool.h>
82 #include <linux/mii.h>
83 #include <linux/workqueue.h>
85 #include <linux/netdevice.h>
86 #include <linux/etherdevice.h>
87 #include <linux/skbuff.h>
95 * the LAN91C111 can be at any of the following port addresses. To change,
96 * for a slightly different card, you can add it to the array. Keep in
97 * mind that the array must end in zero.
99 static unsigned int smc_portlist[] __initdata = {
100 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0,
101 0x300, 0x320, 0x340, 0x360, 0x380, 0x3A0, 0x3C0, 0x3E0, 0
105 # define SMC_IOADDR -1
107 static unsigned long io = SMC_IOADDR;
108 module_param(io, ulong, 0400);
109 MODULE_PARM_DESC(io, "I/O base address");
114 static int irq = SMC_IRQ;
115 module_param(irq, int, 0400);
116 MODULE_PARM_DESC(irq, "IRQ number");
118 #endif /* CONFIG_ISA */
121 # define SMC_NOWAIT 0
123 static int nowait = SMC_NOWAIT;
124 module_param(nowait, int, 0400);
125 MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
128 * Transmit timeout, default 5 seconds.
130 static int watchdog = 1000;
131 module_param(watchdog, int, 0400);
132 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
134 MODULE_LICENSE("GPL");
137 * The internal workings of the driver. If you are changing anything
138 * here with the SMC stuff, you should have the datasheet and know
139 * what you are doing.
141 #define CARDNAME "smc91x"
144 * Use power-down feature of the chip
149 * Wait time for memory to be free. This probably shouldn't be
150 * tuned that much, as waiting for this means nothing else happens
153 #define MEMORY_WAIT_TIME 16
156 * The maximum number of processing loops allowed for each call to the
159 #define MAX_IRQ_LOOPS 8
162 * This selects whether TX packets are sent one by one to the SMC91x internal
163 * memory and throttled until transmission completes. This may prevent
164 * RX overruns a litle by keeping much of the memory free for RX packets
165 * but to the expense of reduced TX throughput and increased IRQ overhead.
166 * Note this is not a cure for a too slow data bus or too high IRQ latency.
168 #define THROTTLE_TX_PKTS 0
171 * The MII clock high/low times. 2x this number gives the MII clock period
172 * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
176 /* store this information for the driver.. */
179 * If I have to wait until memory is available to send a
180 * packet, I will store the skbuff here, until I get the
181 * desired memory. Then, I'll send it out and free it.
183 struct sk_buff *pending_tx_skb;
184 struct tasklet_struct tx_task;
187 * these are things that the kernel wants me to keep, so users
188 * can find out semi-useless statistics of how well the card is
191 struct net_device_stats stats;
193 /* version/revision of the SMC91x chip */
196 /* Contains the current active transmission mode */
199 /* Contains the current active receive mode */
202 /* Contains the current active receive/phy mode */
209 struct mii_if_info mii;
212 struct work_struct phy_configure;
213 struct net_device *dev;
218 #ifdef SMC_USE_PXA_DMA
219 /* DMA needs the physical address of the chip */
223 void __iomem *datacs;
227 #define DBG(n, args...) \
229 if (SMC_DEBUG >= (n)) \
233 #define PRINTK(args...) printk(args)
235 #define DBG(n, args...) do { } while(0)
236 #define PRINTK(args...) printk(KERN_DEBUG args)
240 static void PRINT_PKT(u_char *buf, int length)
247 remainder = length % 16;
249 for (i = 0; i < lines ; i ++) {
251 for (cur = 0; cur < 8; cur++) {
255 printk("%02x%02x ", a, b);
259 for (i = 0; i < remainder/2 ; i++) {
263 printk("%02x%02x ", a, b);
268 #define PRINT_PKT(x...) do { } while(0)
272 /* this enables an interrupt in the interrupt mask register */
273 #define SMC_ENABLE_INT(x) do { \
274 unsigned char mask; \
275 spin_lock_irq(&lp->lock); \
276 mask = SMC_GET_INT_MASK(); \
278 SMC_SET_INT_MASK(mask); \
279 spin_unlock_irq(&lp->lock); \
282 /* this disables an interrupt from the interrupt mask register */
283 #define SMC_DISABLE_INT(x) do { \
284 unsigned char mask; \
285 spin_lock_irq(&lp->lock); \
286 mask = SMC_GET_INT_MASK(); \
288 SMC_SET_INT_MASK(mask); \
289 spin_unlock_irq(&lp->lock); \
293 * Wait while MMU is busy. This is usually in the order of a few nanosecs
294 * if at all, but let's avoid deadlocking the system if the hardware
295 * decides to go south.
297 #define SMC_WAIT_MMU_BUSY() do { \
298 if (unlikely(SMC_GET_MMU_CMD() & MC_BUSY)) { \
299 unsigned long timeout = jiffies + 2; \
300 while (SMC_GET_MMU_CMD() & MC_BUSY) { \
301 if (time_after(jiffies, timeout)) { \
302 printk("%s: timeout %s line %d\n", \
303 dev->name, __FILE__, __LINE__); \
313 * this does a soft reset on the device
315 static void smc_reset(struct net_device *dev)
317 struct smc_local *lp = netdev_priv(dev);
318 void __iomem *ioaddr = lp->base;
319 unsigned int ctl, cfg;
320 struct sk_buff *pending_skb;
322 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
324 /* Disable all interrupts, block TX tasklet */
325 spin_lock_irq(&lp->lock);
328 pending_skb = lp->pending_tx_skb;
329 lp->pending_tx_skb = NULL;
330 spin_unlock_irq(&lp->lock);
332 /* free any pending tx skb */
334 dev_kfree_skb(pending_skb);
335 lp->stats.tx_errors++;
336 lp->stats.tx_aborted_errors++;
340 * This resets the registers mostly to defaults, but doesn't
341 * affect EEPROM. That seems unnecessary
344 SMC_SET_RCR(RCR_SOFTRST);
347 * Setup the Configuration Register
348 * This is necessary because the CONFIG_REG is not affected
353 cfg = CONFIG_DEFAULT;
356 * Setup for fast accesses if requested. If the card/system
357 * can't handle it then there will be no recovery except for
358 * a hard reset or power cycle
361 cfg |= CONFIG_NO_WAIT;
364 * Release from possible power-down state
365 * Configuration register is not affected by Soft Reset
367 cfg |= CONFIG_EPH_POWER_EN;
371 /* this should pause enough for the chip to be happy */
373 * elaborate? What does the chip _need_? --jgarzik
375 * This seems to be undocumented, but something the original
376 * driver(s) have always done. Suspect undocumented timing
377 * info/determined empirically. --rmk
381 /* Disable transmit and receive functionality */
383 SMC_SET_RCR(RCR_CLEAR);
384 SMC_SET_TCR(TCR_CLEAR);
387 ctl = SMC_GET_CTL() | CTL_LE_ENABLE;
390 * Set the control register to automatically release successfully
391 * transmitted packets, to make the best use out of our limited
394 if(!THROTTLE_TX_PKTS)
395 ctl |= CTL_AUTO_RELEASE;
397 ctl &= ~CTL_AUTO_RELEASE;
402 SMC_SET_MMU_CMD(MC_RESET);
407 * Enable Interrupts, Receive, and Transmit
409 static void smc_enable(struct net_device *dev)
411 struct smc_local *lp = netdev_priv(dev);
412 void __iomem *ioaddr = lp->base;
415 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
417 /* see the header file for options in TCR/RCR DEFAULT */
419 SMC_SET_TCR(lp->tcr_cur_mode);
420 SMC_SET_RCR(lp->rcr_cur_mode);
423 SMC_SET_MAC_ADDR(dev->dev_addr);
425 /* now, enable interrupts */
426 mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
427 if (lp->version >= (CHIP_91100 << 4))
430 SMC_SET_INT_MASK(mask);
433 * From this point the register bank must _NOT_ be switched away
434 * to something else than bank 2 without proper locking against
435 * races with any tasklet or interrupt handlers until smc_shutdown()
436 * or smc_reset() is called.
441 * this puts the device in an inactive state
443 static void smc_shutdown(struct net_device *dev)
445 struct smc_local *lp = netdev_priv(dev);
446 void __iomem *ioaddr = lp->base;
447 struct sk_buff *pending_skb;
449 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
451 /* no more interrupts for me */
452 spin_lock_irq(&lp->lock);
455 pending_skb = lp->pending_tx_skb;
456 lp->pending_tx_skb = NULL;
457 spin_unlock_irq(&lp->lock);
459 dev_kfree_skb(pending_skb);
461 /* and tell the card to stay away from that nasty outside world */
463 SMC_SET_RCR(RCR_CLEAR);
464 SMC_SET_TCR(TCR_CLEAR);
467 /* finally, shut the chip down */
469 SMC_SET_CONFIG(SMC_GET_CONFIG() & ~CONFIG_EPH_POWER_EN);
474 * This is the procedure to handle the receipt of a packet.
476 static inline void smc_rcv(struct net_device *dev)
478 struct smc_local *lp = netdev_priv(dev);
479 void __iomem *ioaddr = lp->base;
480 unsigned int packet_number, status, packet_len;
482 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
484 packet_number = SMC_GET_RXFIFO();
485 if (unlikely(packet_number & RXFIFO_REMPTY)) {
486 PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name);
490 /* read from start of packet */
491 SMC_SET_PTR(PTR_READ | PTR_RCV | PTR_AUTOINC);
493 /* First two words are status and packet length */
494 SMC_GET_PKT_HDR(status, packet_len);
495 packet_len &= 0x07ff; /* mask off top bits */
496 DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
497 dev->name, packet_number, status,
498 packet_len, packet_len);
500 if (unlikely(packet_len == 0 && !(status & RS_ERRORS))) {
501 printk(KERN_ERR "%s: bad memory timings: rxlen %u status %x\n",
502 dev->name, packet_len, status);
503 status |= RS_TOOSHORT;
506 if (unlikely(packet_len < 6 || status & RS_ERRORS)) {
507 if (status & RS_TOOLONG && packet_len <= (1514 + 4 + 6)) {
508 /* accept VLAN packets */
509 status &= ~RS_TOOLONG;
512 if (packet_len < 6) {
513 /* bloody hardware */
514 printk(KERN_ERR "%s: fubar (rxlen %u status %x\n",
515 dev->name, packet_len, status);
516 status |= RS_TOOSHORT;
519 SMC_SET_MMU_CMD(MC_RELEASE);
520 lp->stats.rx_errors++;
521 if (status & RS_ALGNERR)
522 lp->stats.rx_frame_errors++;
523 if (status & (RS_TOOSHORT | RS_TOOLONG))
524 lp->stats.rx_length_errors++;
525 if (status & RS_BADCRC)
526 lp->stats.rx_crc_errors++;
530 unsigned int data_len;
532 /* set multicast stats */
533 if (status & RS_MULTICAST)
534 lp->stats.multicast++;
537 * Actual payload is packet_len - 6 (or 5 if odd byte).
538 * We want skb_reserve(2) and the final ctrl word
539 * (2 bytes, possibly containing the payload odd byte).
540 * Furthermore, we add 2 bytes to allow rounding up to
541 * multiple of 4 bytes on 32 bit buses.
542 * Hence packet_len - 6 + 2 + 2 + 2.
544 skb = dev_alloc_skb(packet_len);
545 if (unlikely(skb == NULL)) {
546 printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
549 SMC_SET_MMU_CMD(MC_RELEASE);
550 lp->stats.rx_dropped++;
554 /* Align IP header to 32 bits */
557 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
558 if (lp->version == 0x90)
559 status |= RS_ODDFRAME;
562 * If odd length: packet_len - 5,
563 * otherwise packet_len - 6.
564 * With the trailing ctrl byte it's packet_len - 4.
566 data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
567 data = skb_put(skb, data_len);
568 SMC_PULL_DATA(data, packet_len - 4);
571 SMC_SET_MMU_CMD(MC_RELEASE);
573 PRINT_PKT(data, packet_len - 4);
575 dev->last_rx = jiffies;
577 skb->protocol = eth_type_trans(skb, dev);
579 lp->stats.rx_packets++;
580 lp->stats.rx_bytes += data_len;
586 * On SMP we have the following problem:
588 * A = smc_hardware_send_pkt()
589 * B = smc_hard_start_xmit()
590 * C = smc_interrupt()
592 * A and B can never be executed simultaneously. However, at least on UP,
593 * it is possible (and even desirable) for C to interrupt execution of
594 * A or B in order to have better RX reliability and avoid overruns.
595 * C, just like A and B, must have exclusive access to the chip and
596 * each of them must lock against any other concurrent access.
597 * Unfortunately this is not possible to have C suspend execution of A or
598 * B taking place on another CPU. On UP this is no an issue since A and B
599 * are run from softirq context and C from hard IRQ context, and there is
600 * no other CPU where concurrent access can happen.
601 * If ever there is a way to force at least B and C to always be executed
602 * on the same CPU then we could use read/write locks to protect against
603 * any other concurrent access and C would always interrupt B. But life
604 * isn't that easy in a SMP world...
606 #define smc_special_trylock(lock) \
609 local_irq_disable(); \
610 __ret = spin_trylock(lock); \
612 local_irq_enable(); \
615 #define smc_special_lock(lock) spin_lock_irq(lock)
616 #define smc_special_unlock(lock) spin_unlock_irq(lock)
618 #define smc_special_trylock(lock) (1)
619 #define smc_special_lock(lock) do { } while (0)
620 #define smc_special_unlock(lock) do { } while (0)
624 * This is called to actually send a packet to the chip.
626 static void smc_hardware_send_pkt(unsigned long data)
628 struct net_device *dev = (struct net_device *)data;
629 struct smc_local *lp = netdev_priv(dev);
630 void __iomem *ioaddr = lp->base;
632 unsigned int packet_no, len;
635 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
637 if (!smc_special_trylock(&lp->lock)) {
638 netif_stop_queue(dev);
639 tasklet_schedule(&lp->tx_task);
643 skb = lp->pending_tx_skb;
644 if (unlikely(!skb)) {
645 smc_special_unlock(&lp->lock);
648 lp->pending_tx_skb = NULL;
650 packet_no = SMC_GET_AR();
651 if (unlikely(packet_no & AR_FAILED)) {
652 printk("%s: Memory allocation failed.\n", dev->name);
653 lp->stats.tx_errors++;
654 lp->stats.tx_fifo_errors++;
655 smc_special_unlock(&lp->lock);
659 /* point to the beginning of the packet */
660 SMC_SET_PN(packet_no);
661 SMC_SET_PTR(PTR_AUTOINC);
665 DBG(2, "%s: TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
666 dev->name, packet_no, len, len, buf);
670 * Send the packet length (+6 for status words, length, and ctl.
671 * The card will pad to 64 bytes with zeroes if packet is too small.
673 SMC_PUT_PKT_HDR(0, len + 6);
675 /* send the actual data */
676 SMC_PUSH_DATA(buf, len & ~1);
678 /* Send final ctl word with the last byte if there is one */
679 SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG);
682 * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
683 * have the effect of having at most one packet queued for TX
684 * in the chip's memory at all time.
686 * If THROTTLE_TX_PKTS is not set then the queue is stopped only
687 * when memory allocation (MC_ALLOC) does not succeed right away.
689 if (THROTTLE_TX_PKTS)
690 netif_stop_queue(dev);
692 /* queue the packet for TX */
693 SMC_SET_MMU_CMD(MC_ENQUEUE);
694 smc_special_unlock(&lp->lock);
696 dev->trans_start = jiffies;
697 lp->stats.tx_packets++;
698 lp->stats.tx_bytes += len;
700 SMC_ENABLE_INT(IM_TX_INT | IM_TX_EMPTY_INT);
702 done: if (!THROTTLE_TX_PKTS)
703 netif_wake_queue(dev);
709 * Since I am not sure if I will have enough room in the chip's ram
710 * to store the packet, I call this routine which either sends it
711 * now, or set the card to generates an interrupt when ready
714 static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
716 struct smc_local *lp = netdev_priv(dev);
717 void __iomem *ioaddr = lp->base;
718 unsigned int numPages, poll_count, status;
720 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
722 BUG_ON(lp->pending_tx_skb != NULL);
725 * The MMU wants the number of pages to be the number of 256 bytes
726 * 'pages', minus 1 (since a packet can't ever have 0 pages :))
728 * The 91C111 ignores the size bits, but earlier models don't.
730 * Pkt size for allocating is data length +6 (for additional status
731 * words, length and ctl)
733 * If odd size then last byte is included in ctl word.
735 numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
736 if (unlikely(numPages > 7)) {
737 printk("%s: Far too big packet error.\n", dev->name);
738 lp->stats.tx_errors++;
739 lp->stats.tx_dropped++;
744 smc_special_lock(&lp->lock);
746 /* now, try to allocate the memory */
747 SMC_SET_MMU_CMD(MC_ALLOC | numPages);
750 * Poll the chip for a short amount of time in case the
751 * allocation succeeds quickly.
753 poll_count = MEMORY_WAIT_TIME;
755 status = SMC_GET_INT();
756 if (status & IM_ALLOC_INT) {
757 SMC_ACK_INT(IM_ALLOC_INT);
760 } while (--poll_count);
762 smc_special_unlock(&lp->lock);
764 lp->pending_tx_skb = skb;
766 /* oh well, wait until the chip finds memory later */
767 netif_stop_queue(dev);
768 DBG(2, "%s: TX memory allocation deferred.\n", dev->name);
769 SMC_ENABLE_INT(IM_ALLOC_INT);
772 * Allocation succeeded: push packet to the chip's own memory
775 smc_hardware_send_pkt((unsigned long)dev);
782 * This handles a TX interrupt, which is only called when:
783 * - a TX error occurred, or
784 * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
786 static void smc_tx(struct net_device *dev)
788 struct smc_local *lp = netdev_priv(dev);
789 void __iomem *ioaddr = lp->base;
790 unsigned int saved_packet, packet_no, tx_status, pkt_len;
792 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
794 /* If the TX FIFO is empty then nothing to do */
795 packet_no = SMC_GET_TXFIFO();
796 if (unlikely(packet_no & TXFIFO_TEMPTY)) {
797 PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name);
801 /* select packet to read from */
802 saved_packet = SMC_GET_PN();
803 SMC_SET_PN(packet_no);
805 /* read the first word (status word) from this packet */
806 SMC_SET_PTR(PTR_AUTOINC | PTR_READ);
807 SMC_GET_PKT_HDR(tx_status, pkt_len);
808 DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
809 dev->name, tx_status, packet_no);
811 if (!(tx_status & ES_TX_SUC))
812 lp->stats.tx_errors++;
814 if (tx_status & ES_LOSTCARR)
815 lp->stats.tx_carrier_errors++;
817 if (tx_status & (ES_LATCOL | ES_16COL)) {
818 PRINTK("%s: %s occurred on last xmit\n", dev->name,
819 (tx_status & ES_LATCOL) ?
820 "late collision" : "too many collisions");
821 lp->stats.tx_window_errors++;
822 if (!(lp->stats.tx_window_errors & 63) && net_ratelimit()) {
823 printk(KERN_INFO "%s: unexpectedly large number of "
824 "bad collisions. Please check duplex "
825 "setting.\n", dev->name);
829 /* kill the packet */
831 SMC_SET_MMU_CMD(MC_FREEPKT);
833 /* Don't restore Packet Number Reg until busy bit is cleared */
835 SMC_SET_PN(saved_packet);
837 /* re-enable transmit */
839 SMC_SET_TCR(lp->tcr_cur_mode);
844 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
846 static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
848 struct smc_local *lp = netdev_priv(dev);
849 void __iomem *ioaddr = lp->base;
850 unsigned int mii_reg, mask;
852 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
855 for (mask = 1 << (bits - 1); mask; mask >>= 1) {
861 SMC_SET_MII(mii_reg);
863 SMC_SET_MII(mii_reg | MII_MCLK);
868 static unsigned int smc_mii_in(struct net_device *dev, int bits)
870 struct smc_local *lp = netdev_priv(dev);
871 void __iomem *ioaddr = lp->base;
872 unsigned int mii_reg, mask, val;
874 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
875 SMC_SET_MII(mii_reg);
877 for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
878 if (SMC_GET_MII() & MII_MDI)
881 SMC_SET_MII(mii_reg);
883 SMC_SET_MII(mii_reg | MII_MCLK);
891 * Reads a register from the MII Management serial interface
893 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
895 struct smc_local *lp = netdev_priv(dev);
896 void __iomem *ioaddr = lp->base;
897 unsigned int phydata;
902 smc_mii_out(dev, 0xffffffff, 32);
904 /* Start code (01) + read (10) + phyaddr + phyreg */
905 smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
907 /* Turnaround (2bits) + phydata */
908 phydata = smc_mii_in(dev, 18);
910 /* Return to idle state */
911 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
913 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
914 __FUNCTION__, phyaddr, phyreg, phydata);
921 * Writes a register to the MII Management serial interface
923 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
926 struct smc_local *lp = netdev_priv(dev);
927 void __iomem *ioaddr = lp->base;
932 smc_mii_out(dev, 0xffffffff, 32);
934 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
935 smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
937 /* Return to idle state */
938 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
940 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
941 __FUNCTION__, phyaddr, phyreg, phydata);
947 * Finds and reports the PHY address
949 static void smc_phy_detect(struct net_device *dev)
951 struct smc_local *lp = netdev_priv(dev);
954 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
959 * Scan all 32 PHY addresses if necessary, starting at
960 * PHY#1 to PHY#31, and then PHY#0 last.
962 for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
963 unsigned int id1, id2;
965 /* Read the PHY identifiers */
966 id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
967 id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
969 DBG(3, "%s: phy_id1=0x%x, phy_id2=0x%x\n",
970 dev->name, id1, id2);
972 /* Make sure it is a valid identifier */
973 if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
974 id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
975 /* Save the PHY's address */
976 lp->mii.phy_id = phyaddr & 31;
977 lp->phy_type = id1 << 16 | id2;
984 * Sets the PHY to a configuration as determined by the user
986 static int smc_phy_fixed(struct net_device *dev)
988 struct smc_local *lp = netdev_priv(dev);
989 void __iomem *ioaddr = lp->base;
990 int phyaddr = lp->mii.phy_id;
993 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
995 /* Enter Link Disable state */
996 cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
997 cfg1 |= PHY_CFG1_LNKDIS;
998 smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
1001 * Set our fixed capabilities
1002 * Disable auto-negotiation
1006 if (lp->ctl_rfduplx)
1007 bmcr |= BMCR_FULLDPLX;
1009 if (lp->ctl_rspeed == 100)
1010 bmcr |= BMCR_SPEED100;
1012 /* Write our capabilities to the phy control register */
1013 smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
1015 /* Re-Configure the Receive/Phy Control register */
1017 SMC_SET_RPC(lp->rpc_cur_mode);
1024 * smc_phy_reset - reset the phy
1028 * Issue a software reset for the specified PHY and
1029 * wait up to 100ms for the reset to complete. We should
1030 * not access the PHY for 50ms after issuing the reset.
1032 * The time to wait appears to be dependent on the PHY.
1034 * Must be called with lp->lock locked.
1036 static int smc_phy_reset(struct net_device *dev, int phy)
1038 struct smc_local *lp = netdev_priv(dev);
1042 smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
1044 for (timeout = 2; timeout; timeout--) {
1045 spin_unlock_irq(&lp->lock);
1047 spin_lock_irq(&lp->lock);
1049 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1050 if (!(bmcr & BMCR_RESET))
1054 return bmcr & BMCR_RESET;
1058 * smc_phy_powerdown - powerdown phy
1061 * Power down the specified PHY
1063 static void smc_phy_powerdown(struct net_device *dev)
1065 struct smc_local *lp = netdev_priv(dev);
1067 int phy = lp->mii.phy_id;
1069 if (lp->phy_type == 0)
1072 /* We need to ensure that no calls to smc_phy_configure are
1075 flush_scheduled_work() cannot be called because we are
1076 running with the netlink semaphore held (from
1077 devinet_ioctl()) and the pending work queue contains
1078 linkwatch_event() (scheduled by netif_carrier_off()
1079 above). linkwatch_event() also wants the netlink semaphore.
1081 while(lp->work_pending)
1084 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1085 smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
1089 * smc_phy_check_media - check the media status and adjust TCR
1091 * @init: set true for initialisation
1093 * Select duplex mode depending on negotiation state. This
1094 * also updates our carrier state.
1096 static void smc_phy_check_media(struct net_device *dev, int init)
1098 struct smc_local *lp = netdev_priv(dev);
1099 void __iomem *ioaddr = lp->base;
1101 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
1102 /* duplex state has changed */
1103 if (lp->mii.full_duplex) {
1104 lp->tcr_cur_mode |= TCR_SWFDUP;
1106 lp->tcr_cur_mode &= ~TCR_SWFDUP;
1110 SMC_SET_TCR(lp->tcr_cur_mode);
1115 * Configures the specified PHY through the MII management interface
1116 * using Autonegotiation.
1117 * Calls smc_phy_fixed() if the user has requested a certain config.
1118 * If RPC ANEG bit is set, the media selection is dependent purely on
1119 * the selection by the MII (either in the MII BMCR reg or the result
1120 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
1121 * is controlled by the RPC SPEED and RPC DPLX bits.
1123 static void smc_phy_configure(struct work_struct *work)
1125 struct smc_local *lp =
1126 container_of(work, struct smc_local, phy_configure);
1127 struct net_device *dev = lp->dev;
1128 void __iomem *ioaddr = lp->base;
1129 int phyaddr = lp->mii.phy_id;
1130 int my_phy_caps; /* My PHY capabilities */
1131 int my_ad_caps; /* My Advertised capabilities */
1134 DBG(3, "%s:smc_program_phy()\n", dev->name);
1136 spin_lock_irq(&lp->lock);
1139 * We should not be called if phy_type is zero.
1141 if (lp->phy_type == 0)
1142 goto smc_phy_configure_exit;
1144 if (smc_phy_reset(dev, phyaddr)) {
1145 printk("%s: PHY reset timed out\n", dev->name);
1146 goto smc_phy_configure_exit;
1150 * Enable PHY Interrupts (for register 18)
1151 * Interrupts listed here are disabled
1153 smc_phy_write(dev, phyaddr, PHY_MASK_REG,
1154 PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
1155 PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
1156 PHY_INT_SPDDET | PHY_INT_DPLXDET);
1158 /* Configure the Receive/Phy Control register */
1160 SMC_SET_RPC(lp->rpc_cur_mode);
1162 /* If the user requested no auto neg, then go set his request */
1163 if (lp->mii.force_media) {
1165 goto smc_phy_configure_exit;
1168 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1169 my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
1171 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
1172 printk(KERN_INFO "Auto negotiation NOT supported\n");
1174 goto smc_phy_configure_exit;
1177 my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
1179 if (my_phy_caps & BMSR_100BASE4)
1180 my_ad_caps |= ADVERTISE_100BASE4;
1181 if (my_phy_caps & BMSR_100FULL)
1182 my_ad_caps |= ADVERTISE_100FULL;
1183 if (my_phy_caps & BMSR_100HALF)
1184 my_ad_caps |= ADVERTISE_100HALF;
1185 if (my_phy_caps & BMSR_10FULL)
1186 my_ad_caps |= ADVERTISE_10FULL;
1187 if (my_phy_caps & BMSR_10HALF)
1188 my_ad_caps |= ADVERTISE_10HALF;
1190 /* Disable capabilities not selected by our user */
1191 if (lp->ctl_rspeed != 100)
1192 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1194 if (!lp->ctl_rfduplx)
1195 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1197 /* Update our Auto-Neg Advertisement Register */
1198 smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
1199 lp->mii.advertising = my_ad_caps;
1202 * Read the register back. Without this, it appears that when
1203 * auto-negotiation is restarted, sometimes it isn't ready and
1204 * the link does not come up.
1206 status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
1208 DBG(2, "%s: phy caps=%x\n", dev->name, my_phy_caps);
1209 DBG(2, "%s: phy advertised caps=%x\n", dev->name, my_ad_caps);
1211 /* Restart auto-negotiation process in order to advertise my caps */
1212 smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
1214 smc_phy_check_media(dev, 1);
1216 smc_phy_configure_exit:
1218 spin_unlock_irq(&lp->lock);
1219 lp->work_pending = 0;
1225 * Purpose: Handle interrupts relating to PHY register 18. This is
1226 * called from the "hard" interrupt handler under our private spinlock.
1228 static void smc_phy_interrupt(struct net_device *dev)
1230 struct smc_local *lp = netdev_priv(dev);
1231 int phyaddr = lp->mii.phy_id;
1234 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1236 if (lp->phy_type == 0)
1240 smc_phy_check_media(dev, 0);
1242 /* Read PHY Register 18, Status Output */
1243 phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
1244 if ((phy18 & PHY_INT_INT) == 0)
1249 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1251 static void smc_10bt_check_media(struct net_device *dev, int init)
1253 struct smc_local *lp = netdev_priv(dev);
1254 void __iomem *ioaddr = lp->base;
1255 unsigned int old_carrier, new_carrier;
1257 old_carrier = netif_carrier_ok(dev) ? 1 : 0;
1260 new_carrier = (SMC_GET_EPH_STATUS() & ES_LINK_OK) ? 1 : 0;
1263 if (init || (old_carrier != new_carrier)) {
1265 netif_carrier_off(dev);
1267 netif_carrier_on(dev);
1269 if (netif_msg_link(lp))
1270 printk(KERN_INFO "%s: link %s\n", dev->name,
1271 new_carrier ? "up" : "down");
1275 static void smc_eph_interrupt(struct net_device *dev)
1277 struct smc_local *lp = netdev_priv(dev);
1278 void __iomem *ioaddr = lp->base;
1281 smc_10bt_check_media(dev, 0);
1284 ctl = SMC_GET_CTL();
1285 SMC_SET_CTL(ctl & ~CTL_LE_ENABLE);
1291 * This is the main routine of the driver, to handle the device when
1292 * it needs some attention.
1294 static irqreturn_t smc_interrupt(int irq, void *dev_id)
1296 struct net_device *dev = dev_id;
1297 struct smc_local *lp = netdev_priv(dev);
1298 void __iomem *ioaddr = lp->base;
1299 int status, mask, timeout, card_stats;
1302 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
1304 spin_lock(&lp->lock);
1306 /* A preamble may be used when there is a potential race
1307 * between the interruptible transmit functions and this
1309 SMC_INTERRUPT_PREAMBLE;
1311 saved_pointer = SMC_GET_PTR();
1312 mask = SMC_GET_INT_MASK();
1313 SMC_SET_INT_MASK(0);
1315 /* set a timeout value, so I don't stay here forever */
1316 timeout = MAX_IRQ_LOOPS;
1319 status = SMC_GET_INT();
1321 DBG(2, "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1322 dev->name, status, mask,
1323 ({ int meminfo; SMC_SELECT_BANK(0);
1324 meminfo = SMC_GET_MIR();
1325 SMC_SELECT_BANK(2); meminfo; }),
1332 if (status & IM_TX_INT) {
1333 /* do this before RX as it will free memory quickly */
1334 DBG(3, "%s: TX int\n", dev->name);
1336 SMC_ACK_INT(IM_TX_INT);
1337 if (THROTTLE_TX_PKTS)
1338 netif_wake_queue(dev);
1339 } else if (status & IM_RCV_INT) {
1340 DBG(3, "%s: RX irq\n", dev->name);
1342 } else if (status & IM_ALLOC_INT) {
1343 DBG(3, "%s: Allocation irq\n", dev->name);
1344 tasklet_hi_schedule(&lp->tx_task);
1345 mask &= ~IM_ALLOC_INT;
1346 } else if (status & IM_TX_EMPTY_INT) {
1347 DBG(3, "%s: TX empty\n", dev->name);
1348 mask &= ~IM_TX_EMPTY_INT;
1352 card_stats = SMC_GET_COUNTER();
1355 /* single collisions */
1356 lp->stats.collisions += card_stats & 0xF;
1359 /* multiple collisions */
1360 lp->stats.collisions += card_stats & 0xF;
1361 } else if (status & IM_RX_OVRN_INT) {
1362 DBG(1, "%s: RX overrun (EPH_ST 0x%04x)\n", dev->name,
1363 ({ int eph_st; SMC_SELECT_BANK(0);
1364 eph_st = SMC_GET_EPH_STATUS();
1365 SMC_SELECT_BANK(2); eph_st; }) );
1366 SMC_ACK_INT(IM_RX_OVRN_INT);
1367 lp->stats.rx_errors++;
1368 lp->stats.rx_fifo_errors++;
1369 } else if (status & IM_EPH_INT) {
1370 smc_eph_interrupt(dev);
1371 } else if (status & IM_MDINT) {
1372 SMC_ACK_INT(IM_MDINT);
1373 smc_phy_interrupt(dev);
1374 } else if (status & IM_ERCV_INT) {
1375 SMC_ACK_INT(IM_ERCV_INT);
1376 PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name);
1378 } while (--timeout);
1380 /* restore register states */
1381 SMC_SET_PTR(saved_pointer);
1382 SMC_SET_INT_MASK(mask);
1383 spin_unlock(&lp->lock);
1385 if (timeout == MAX_IRQ_LOOPS)
1386 PRINTK("%s: spurious interrupt (mask = 0x%02x)\n",
1388 DBG(3, "%s: Interrupt done (%d loops)\n",
1389 dev->name, MAX_IRQ_LOOPS - timeout);
1392 * We return IRQ_HANDLED unconditionally here even if there was
1393 * nothing to do. There is a possibility that a packet might
1394 * get enqueued into the chip right after TX_EMPTY_INT is raised
1395 * but just before the CPU acknowledges the IRQ.
1396 * Better take an unneeded IRQ in some occasions than complexifying
1397 * the code for all cases.
1402 #ifdef CONFIG_NET_POLL_CONTROLLER
1404 * Polling receive - used by netconsole and other diagnostic tools
1405 * to allow network i/o with interrupts disabled.
1407 static void smc_poll_controller(struct net_device *dev)
1409 disable_irq(dev->irq);
1410 smc_interrupt(dev->irq, dev);
1411 enable_irq(dev->irq);
1415 /* Our watchdog timed out. Called by the networking layer */
1416 static void smc_timeout(struct net_device *dev)
1418 struct smc_local *lp = netdev_priv(dev);
1419 void __iomem *ioaddr = lp->base;
1420 int status, mask, eph_st, meminfo, fifo;
1422 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1424 spin_lock_irq(&lp->lock);
1425 status = SMC_GET_INT();
1426 mask = SMC_GET_INT_MASK();
1427 fifo = SMC_GET_FIFO();
1429 eph_st = SMC_GET_EPH_STATUS();
1430 meminfo = SMC_GET_MIR();
1432 spin_unlock_irq(&lp->lock);
1433 PRINTK( "%s: TX timeout (INT 0x%02x INTMASK 0x%02x "
1434 "MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
1435 dev->name, status, mask, meminfo, fifo, eph_st );
1441 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1442 * smc_phy_configure() calls msleep() which calls schedule_timeout()
1443 * which calls schedule(). Hence we use a work queue.
1445 if (lp->phy_type != 0) {
1446 if (schedule_work(&lp->phy_configure)) {
1447 lp->work_pending = 1;
1451 /* We can accept TX packets again */
1452 dev->trans_start = jiffies;
1453 netif_wake_queue(dev);
1457 * This routine will, depending on the values passed to it,
1458 * either make it accept multicast packets, go into
1459 * promiscuous mode (for TCPDUMP and cousins) or accept
1460 * a select set of multicast packets
1462 static void smc_set_multicast_list(struct net_device *dev)
1464 struct smc_local *lp = netdev_priv(dev);
1465 void __iomem *ioaddr = lp->base;
1466 unsigned char multicast_table[8];
1467 int update_multicast = 0;
1469 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1471 if (dev->flags & IFF_PROMISC) {
1472 DBG(2, "%s: RCR_PRMS\n", dev->name);
1473 lp->rcr_cur_mode |= RCR_PRMS;
1476 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1477 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1478 when promiscuous mode is turned on.
1482 * Here, I am setting this to accept all multicast packets.
1483 * I don't need to zero the multicast table, because the flag is
1484 * checked before the table is
1486 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1487 DBG(2, "%s: RCR_ALMUL\n", dev->name);
1488 lp->rcr_cur_mode |= RCR_ALMUL;
1492 * This sets the internal hardware table to filter out unwanted
1493 * multicast packets before they take up memory.
1495 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1496 * address are the offset into the table. If that bit is 1, then the
1497 * multicast packet is accepted. Otherwise, it's dropped silently.
1499 * To use the 6 bits as an offset into the table, the high 3 bits are
1500 * the number of the 8 bit register, while the low 3 bits are the bit
1501 * within that register.
1503 else if (dev->mc_count) {
1505 struct dev_mc_list *cur_addr;
1507 /* table for flipping the order of 3 bits */
1508 static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};
1510 /* start with a table of all zeros: reject all */
1511 memset(multicast_table, 0, sizeof(multicast_table));
1513 cur_addr = dev->mc_list;
1514 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1517 /* do we have a pointer here? */
1520 /* make sure this is a multicast address -
1521 shouldn't this be a given if we have it here ? */
1522 if (!(*cur_addr->dmi_addr & 1))
1525 /* only use the low order bits */
1526 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1528 /* do some messy swapping to put the bit in the right spot */
1529 multicast_table[invert3[position&7]] |=
1530 (1<<invert3[(position>>3)&7]);
1533 /* be sure I get rid of flags I might have set */
1534 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1536 /* now, the table can be loaded into the chipset */
1537 update_multicast = 1;
1539 DBG(2, "%s: ~(RCR_PRMS|RCR_ALMUL)\n", dev->name);
1540 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1543 * since I'm disabling all multicast entirely, I need to
1544 * clear the multicast list
1546 memset(multicast_table, 0, sizeof(multicast_table));
1547 update_multicast = 1;
1550 spin_lock_irq(&lp->lock);
1552 SMC_SET_RCR(lp->rcr_cur_mode);
1553 if (update_multicast) {
1555 SMC_SET_MCAST(multicast_table);
1558 spin_unlock_irq(&lp->lock);
1563 * Open and Initialize the board
1565 * Set up everything, reset the card, etc..
1568 smc_open(struct net_device *dev)
1570 struct smc_local *lp = netdev_priv(dev);
1572 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1575 * Check that the address is valid. If its not, refuse
1576 * to bring the device up. The user must specify an
1577 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1579 if (!is_valid_ether_addr(dev->dev_addr)) {
1580 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
1584 /* Setup the default Register Modes */
1585 lp->tcr_cur_mode = TCR_DEFAULT;
1586 lp->rcr_cur_mode = RCR_DEFAULT;
1587 lp->rpc_cur_mode = RPC_DEFAULT;
1590 * If we are not using a MII interface, we need to
1591 * monitor our own carrier signal to detect faults.
1593 if (lp->phy_type == 0)
1594 lp->tcr_cur_mode |= TCR_MON_CSN;
1596 /* reset the hardware */
1600 /* Configure the PHY, initialize the link state */
1601 if (lp->phy_type != 0)
1602 smc_phy_configure(&lp->phy_configure);
1604 spin_lock_irq(&lp->lock);
1605 smc_10bt_check_media(dev, 1);
1606 spin_unlock_irq(&lp->lock);
1609 netif_start_queue(dev);
1616 * this makes the board clean up everything that it can
1617 * and not talk to the outside world. Caused by
1618 * an 'ifconfig ethX down'
1620 static int smc_close(struct net_device *dev)
1622 struct smc_local *lp = netdev_priv(dev);
1624 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1626 netif_stop_queue(dev);
1627 netif_carrier_off(dev);
1629 /* clear everything */
1631 tasklet_kill(&lp->tx_task);
1632 smc_phy_powerdown(dev);
1637 * Get the current statistics.
1638 * This may be called with the card open or closed.
1640 static struct net_device_stats *smc_query_statistics(struct net_device *dev)
1642 struct smc_local *lp = netdev_priv(dev);
1644 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1653 smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1655 struct smc_local *lp = netdev_priv(dev);
1661 if (lp->phy_type != 0) {
1662 spin_lock_irq(&lp->lock);
1663 ret = mii_ethtool_gset(&lp->mii, cmd);
1664 spin_unlock_irq(&lp->lock);
1666 cmd->supported = SUPPORTED_10baseT_Half |
1667 SUPPORTED_10baseT_Full |
1668 SUPPORTED_TP | SUPPORTED_AUI;
1670 if (lp->ctl_rspeed == 10)
1671 cmd->speed = SPEED_10;
1672 else if (lp->ctl_rspeed == 100)
1673 cmd->speed = SPEED_100;
1675 cmd->autoneg = AUTONEG_DISABLE;
1676 cmd->transceiver = XCVR_INTERNAL;
1678 cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
1687 smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1689 struct smc_local *lp = netdev_priv(dev);
1692 if (lp->phy_type != 0) {
1693 spin_lock_irq(&lp->lock);
1694 ret = mii_ethtool_sset(&lp->mii, cmd);
1695 spin_unlock_irq(&lp->lock);
1697 if (cmd->autoneg != AUTONEG_DISABLE ||
1698 cmd->speed != SPEED_10 ||
1699 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1700 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1703 // lp->port = cmd->port;
1704 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1706 // if (netif_running(dev))
1707 // smc_set_port(dev);
1716 smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1718 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1719 strncpy(info->version, version, sizeof(info->version));
1720 strncpy(info->bus_info, dev->class_dev.dev->bus_id, sizeof(info->bus_info));
1723 static int smc_ethtool_nwayreset(struct net_device *dev)
1725 struct smc_local *lp = netdev_priv(dev);
1728 if (lp->phy_type != 0) {
1729 spin_lock_irq(&lp->lock);
1730 ret = mii_nway_restart(&lp->mii);
1731 spin_unlock_irq(&lp->lock);
1737 static u32 smc_ethtool_getmsglevel(struct net_device *dev)
1739 struct smc_local *lp = netdev_priv(dev);
1740 return lp->msg_enable;
1743 static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
1745 struct smc_local *lp = netdev_priv(dev);
1746 lp->msg_enable = level;
1749 static const struct ethtool_ops smc_ethtool_ops = {
1750 .get_settings = smc_ethtool_getsettings,
1751 .set_settings = smc_ethtool_setsettings,
1752 .get_drvinfo = smc_ethtool_getdrvinfo,
1754 .get_msglevel = smc_ethtool_getmsglevel,
1755 .set_msglevel = smc_ethtool_setmsglevel,
1756 .nway_reset = smc_ethtool_nwayreset,
1757 .get_link = ethtool_op_get_link,
1758 // .get_eeprom = smc_ethtool_geteeprom,
1759 // .set_eeprom = smc_ethtool_seteeprom,
1765 * This routine has a simple purpose -- make the SMC chip generate an
1766 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1769 * does this still work?
1771 * I just deleted auto_irq.c, since it was never built...
1774 static int __init smc_findirq(void __iomem *ioaddr)
1777 unsigned long cookie;
1779 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1781 cookie = probe_irq_on();
1784 * What I try to do here is trigger an ALLOC_INT. This is done
1785 * by allocating a small chunk of memory, which will give an interrupt
1788 /* enable ALLOCation interrupts ONLY */
1790 SMC_SET_INT_MASK(IM_ALLOC_INT);
1793 * Allocate 512 bytes of memory. Note that the chip was just
1794 * reset so all the memory is available
1796 SMC_SET_MMU_CMD(MC_ALLOC | 1);
1799 * Wait until positive that the interrupt has been generated
1804 int_status = SMC_GET_INT();
1805 if (int_status & IM_ALLOC_INT)
1806 break; /* got the interrupt */
1807 } while (--timeout);
1810 * there is really nothing that I can do here if timeout fails,
1811 * as autoirq_report will return a 0 anyway, which is what I
1812 * want in this case. Plus, the clean up is needed in both
1816 /* and disable all interrupts again */
1817 SMC_SET_INT_MASK(0);
1819 /* and return what I found */
1820 return probe_irq_off(cookie);
1824 * Function: smc_probe(unsigned long ioaddr)
1827 * Tests to see if a given ioaddr points to an SMC91x chip.
1828 * Returns a 0 on success
1831 * (1) see if the high byte of BANK_SELECT is 0x33
1832 * (2) compare the ioaddr with the base register's address
1833 * (3) see if I recognize the chip ID in the appropriate register
1835 * Here I do typical initialization tasks.
1837 * o Initialize the structure if needed
1838 * o print out my vanity message if not done so already
1839 * o print out what type of hardware is detected
1840 * o print out the ethernet address
1842 * o set up my private data
1843 * o configure the dev structure with my subroutines
1844 * o actually GRAB the irq.
1847 static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr)
1849 struct smc_local *lp = netdev_priv(dev);
1850 static int version_printed = 0;
1852 unsigned int val, revision_register;
1853 const char *version_string;
1855 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1857 /* First, see if the high byte is 0x33 */
1858 val = SMC_CURRENT_BANK();
1859 DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val);
1860 if ((val & 0xFF00) != 0x3300) {
1861 if ((val & 0xFF) == 0x33) {
1863 "%s: Detected possible byte-swapped interface"
1864 " at IOADDR %p\n", CARDNAME, ioaddr);
1871 * The above MIGHT indicate a device, but I need to write to
1872 * further test this.
1875 val = SMC_CURRENT_BANK();
1876 if ((val & 0xFF00) != 0x3300) {
1882 * well, we've already written once, so hopefully another
1883 * time won't hurt. This time, I need to switch the bank
1884 * register to bank 1, so I can access the base address
1888 val = SMC_GET_BASE();
1889 val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
1890 if (((unsigned int)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
1891 printk("%s: IOADDR %p doesn't match configuration (%x).\n",
1892 CARDNAME, ioaddr, val);
1896 * check if the revision register is something that I
1897 * recognize. These might need to be added to later,
1898 * as future revisions could be added.
1901 revision_register = SMC_GET_REV();
1902 DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
1903 version_string = chip_ids[ (revision_register >> 4) & 0xF];
1904 if (!version_string || (revision_register & 0xff00) != 0x3300) {
1905 /* I don't recognize this chip, so... */
1906 printk("%s: IO %p: Unrecognized revision register 0x%04x"
1907 ", Contact author.\n", CARDNAME,
1908 ioaddr, revision_register);
1914 /* At this point I'll assume that the chip is an SMC91x. */
1915 if (version_printed++ == 0)
1916 printk("%s", version);
1918 /* fill in some of the fields */
1919 dev->base_addr = (unsigned long)ioaddr;
1921 lp->version = revision_register & 0xff;
1922 spin_lock_init(&lp->lock);
1924 /* Get the MAC address */
1926 SMC_GET_MAC_ADDR(dev->dev_addr);
1928 /* now, reset the chip, and put it into a known state */
1932 * If dev->irq is 0, then the device has to be banged on to see
1935 * This banging doesn't always detect the IRQ, for unknown reasons.
1936 * a workaround is to reset the chip and try again.
1938 * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1939 * be what is requested on the command line. I don't do that, mostly
1940 * because the card that I have uses a non-standard method of accessing
1941 * the IRQs, and because this _should_ work in most configurations.
1943 * Specifying an IRQ is done with the assumption that the user knows
1944 * what (s)he is doing. No checking is done!!!!
1951 dev->irq = smc_findirq(ioaddr);
1954 /* kick the card and try again */
1958 if (dev->irq == 0) {
1959 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1964 dev->irq = irq_canonicalize(dev->irq);
1966 /* Fill in the fields of the device structure with ethernet values. */
1969 dev->open = smc_open;
1970 dev->stop = smc_close;
1971 dev->hard_start_xmit = smc_hard_start_xmit;
1972 dev->tx_timeout = smc_timeout;
1973 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1974 dev->get_stats = smc_query_statistics;
1975 dev->set_multicast_list = smc_set_multicast_list;
1976 dev->ethtool_ops = &smc_ethtool_ops;
1977 #ifdef CONFIG_NET_POLL_CONTROLLER
1978 dev->poll_controller = smc_poll_controller;
1981 tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev);
1982 INIT_WORK(&lp->phy_configure, smc_phy_configure);
1984 lp->mii.phy_id_mask = 0x1f;
1985 lp->mii.reg_num_mask = 0x1f;
1986 lp->mii.force_media = 0;
1987 lp->mii.full_duplex = 0;
1989 lp->mii.mdio_read = smc_phy_read;
1990 lp->mii.mdio_write = smc_phy_write;
1993 * Locate the phy, if any.
1995 if (lp->version >= (CHIP_91100 << 4))
1996 smc_phy_detect(dev);
1998 /* then shut everything down to save power */
2000 smc_phy_powerdown(dev);
2002 /* Set default parameters */
2003 lp->msg_enable = NETIF_MSG_LINK;
2004 lp->ctl_rfduplx = 0;
2005 lp->ctl_rspeed = 10;
2007 if (lp->version >= (CHIP_91100 << 4)) {
2008 lp->ctl_rfduplx = 1;
2009 lp->ctl_rspeed = 100;
2013 retval = request_irq(dev->irq, &smc_interrupt, SMC_IRQ_FLAGS, dev->name, dev);
2017 #ifdef SMC_USE_PXA_DMA
2019 int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
2020 smc_pxa_dma_irq, NULL);
2026 retval = register_netdev(dev);
2028 /* now, print out the card info, in a short format.. */
2029 printk("%s: %s (rev %d) at %p IRQ %d",
2030 dev->name, version_string, revision_register & 0x0f,
2031 lp->base, dev->irq);
2033 if (dev->dma != (unsigned char)-1)
2034 printk(" DMA %d", dev->dma);
2036 printk("%s%s\n", nowait ? " [nowait]" : "",
2037 THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
2039 if (!is_valid_ether_addr(dev->dev_addr)) {
2040 printk("%s: Invalid ethernet MAC address. Please "
2041 "set using ifconfig\n", dev->name);
2043 /* Print the Ethernet address */
2044 printk("%s: Ethernet addr: ", dev->name);
2045 for (i = 0; i < 5; i++)
2046 printk("%2.2x:", dev->dev_addr[i]);
2047 printk("%2.2x\n", dev->dev_addr[5]);
2050 if (lp->phy_type == 0) {
2051 PRINTK("%s: No PHY found\n", dev->name);
2052 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
2053 PRINTK("%s: PHY LAN83C183 (LAN91C111 Internal)\n", dev->name);
2054 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
2055 PRINTK("%s: PHY LAN83C180\n", dev->name);
2060 #ifdef SMC_USE_PXA_DMA
2061 if (retval && dev->dma != (unsigned char)-1)
2062 pxa_free_dma(dev->dma);
2067 static int smc_enable_device(struct platform_device *pdev)
2069 unsigned long flags;
2070 unsigned char ecor, ecsr;
2072 struct resource * res;
2074 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2079 * Map the attribute space. This is overkill, but clean.
2081 addr = ioremap(res->start, ATTRIB_SIZE);
2086 * Reset the device. We must disable IRQs around this
2087 * since a reset causes the IRQ line become active.
2089 local_irq_save(flags);
2090 ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
2091 writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
2092 readb(addr + (ECOR << SMC_IO_SHIFT));
2095 * Wait 100us for the chip to reset.
2100 * The device will ignore all writes to the enable bit while
2101 * reset is asserted, even if the reset bit is cleared in the
2102 * same write. Must clear reset first, then enable the device.
2104 writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
2105 writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
2108 * Set the appropriate byte/word mode.
2110 ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
2111 if (!SMC_CAN_USE_16BIT)
2113 writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
2114 local_irq_restore(flags);
2119 * Wait for the chip to wake up. We could poll the control
2120 * register in the main register space, but that isn't mapped
2121 * yet. We know this is going to take 750us.
2128 static int smc_request_attrib(struct platform_device *pdev)
2130 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2135 if (!request_mem_region(res->start, ATTRIB_SIZE, CARDNAME))
2141 static void smc_release_attrib(struct platform_device *pdev)
2143 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2146 release_mem_region(res->start, ATTRIB_SIZE);
2149 static inline void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev)
2151 if (SMC_CAN_USE_DATACS) {
2152 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2153 struct smc_local *lp = netdev_priv(ndev);
2158 if(!request_mem_region(res->start, SMC_DATA_EXTENT, CARDNAME)) {
2159 printk(KERN_INFO "%s: failed to request datacs memory region.\n", CARDNAME);
2163 lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
2167 static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev)
2169 if (SMC_CAN_USE_DATACS) {
2170 struct smc_local *lp = netdev_priv(ndev);
2171 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2174 iounmap(lp->datacs);
2179 release_mem_region(res->start, SMC_DATA_EXTENT);
2186 * dev->base_addr == 0, try to find all possible locations
2187 * dev->base_addr > 0x1ff, this is the address to check
2188 * dev->base_addr == <anything else>, return failure code
2191 * 0 --> there is a device
2192 * anything else, error
2194 static int smc_drv_probe(struct platform_device *pdev)
2196 struct net_device *ndev;
2197 struct resource *res;
2198 unsigned int __iomem *addr;
2201 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2203 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2210 if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
2215 ndev = alloc_etherdev(sizeof(struct smc_local));
2217 printk("%s: could not allocate device.\n", CARDNAME);
2219 goto out_release_io;
2221 SET_MODULE_OWNER(ndev);
2222 SET_NETDEV_DEV(ndev, &pdev->dev);
2224 ndev->dma = (unsigned char)-1;
2225 ndev->irq = platform_get_irq(pdev, 0);
2226 if (ndev->irq < 0) {
2228 goto out_free_netdev;
2231 ret = smc_request_attrib(pdev);
2233 goto out_free_netdev;
2234 #if defined(CONFIG_SA1100_ASSABET)
2235 NCR_0 |= NCR_ENET_OSC_EN;
2237 ret = smc_enable_device(pdev);
2239 goto out_release_attrib;
2241 addr = ioremap(res->start, SMC_IO_EXTENT);
2244 goto out_release_attrib;
2247 platform_set_drvdata(pdev, ndev);
2248 ret = smc_probe(ndev, addr);
2251 #ifdef SMC_USE_PXA_DMA
2253 struct smc_local *lp = netdev_priv(ndev);
2254 lp->physaddr = res->start;
2258 smc_request_datacs(pdev, ndev);
2263 platform_set_drvdata(pdev, NULL);
2266 smc_release_attrib(pdev);
2270 release_mem_region(res->start, SMC_IO_EXTENT);
2272 printk("%s: not found (%d).\n", CARDNAME, ret);
2277 static int smc_drv_remove(struct platform_device *pdev)
2279 struct net_device *ndev = platform_get_drvdata(pdev);
2280 struct smc_local *lp = netdev_priv(ndev);
2281 struct resource *res;
2283 platform_set_drvdata(pdev, NULL);
2285 unregister_netdev(ndev);
2287 free_irq(ndev->irq, ndev);
2289 #ifdef SMC_USE_PXA_DMA
2290 if (ndev->dma != (unsigned char)-1)
2291 pxa_free_dma(ndev->dma);
2295 smc_release_datacs(pdev,ndev);
2296 smc_release_attrib(pdev);
2298 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2300 platform_get_resource(pdev, IORESOURCE_MEM, 0);
2301 release_mem_region(res->start, SMC_IO_EXTENT);
2308 static int smc_drv_suspend(struct platform_device *dev, pm_message_t state)
2310 struct net_device *ndev = platform_get_drvdata(dev);
2313 if (netif_running(ndev)) {
2314 netif_device_detach(ndev);
2316 smc_phy_powerdown(ndev);
2322 static int smc_drv_resume(struct platform_device *dev)
2324 struct net_device *ndev = platform_get_drvdata(dev);
2327 struct smc_local *lp = netdev_priv(ndev);
2328 smc_enable_device(dev);
2329 if (netif_running(ndev)) {
2332 if (lp->phy_type != 0)
2333 smc_phy_configure(&lp->phy_configure);
2334 netif_device_attach(ndev);
2340 static struct platform_driver smc_driver = {
2341 .probe = smc_drv_probe,
2342 .remove = smc_drv_remove,
2343 .suspend = smc_drv_suspend,
2344 .resume = smc_drv_resume,
2350 static int __init smc_init(void)
2356 "%s: You shouldn't use auto-probing with insmod!\n",
2361 return platform_driver_register(&smc_driver);
2364 static void __exit smc_cleanup(void)
2366 platform_driver_unregister(&smc_driver);
2369 module_init(smc_init);
2370 module_exit(smc_cleanup);