3 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
5 * Copyright (C) 1996 by Erik Stahlman
6 * Copyright (C) 2001 Standard Microsystems Corporation
7 * Developed by Simple Network Magic Corporation
8 * Copyright (C) 2003 Monta Vista Software, Inc.
9 * Unified SMC91x driver by Nicolas Pitre
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 * io = for the base address
28 * nowait = 0 for normal wait states, 1 eliminates additional wait states
31 * Erik Stahlman <erik@vt.edu>
33 * hardware multicast code:
34 * Peter Cammaert <pc@denkart.be>
37 * Daris A Nevil <dnevil@snmc.com>
38 * Nicolas Pitre <nico@cam.org>
39 * Russell King <rmk@arm.linux.org.uk>
42 * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
43 * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
44 * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
45 * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
46 * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
47 * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
48 * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
49 * more bus abstraction, big cleanup, etc.
50 * 29/09/03 Russell King - add driver model support
52 * - convert to use generic MII interface
53 * - add link up/down notification
54 * - don't try to handle full negotiation in
56 * - clean up (and fix stack overrun) in PHY
57 * MII read/write functions
58 * 22/09/04 Nicolas Pitre big update (see commit log for details)
60 static const char version[] =
61 "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>\n";
69 #include <linux/init.h>
70 #include <linux/module.h>
71 #include <linux/kernel.h>
72 #include <linux/sched.h>
73 #include <linux/slab.h>
74 #include <linux/delay.h>
75 #include <linux/interrupt.h>
76 #include <linux/errno.h>
77 #include <linux/ioport.h>
78 #include <linux/crc32.h>
79 #include <linux/platform_device.h>
80 #include <linux/spinlock.h>
81 #include <linux/ethtool.h>
82 #include <linux/mii.h>
83 #include <linux/workqueue.h>
85 #include <linux/netdevice.h>
86 #include <linux/etherdevice.h>
87 #include <linux/skbuff.h>
95 * the LAN91C111 can be at any of the following port addresses. To change,
96 * for a slightly different card, you can add it to the array. Keep in
97 * mind that the array must end in zero.
99 static unsigned int smc_portlist[] __initdata = {
100 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0,
101 0x300, 0x320, 0x340, 0x360, 0x380, 0x3A0, 0x3C0, 0x3E0, 0
105 # define SMC_IOADDR -1
107 static unsigned long io = SMC_IOADDR;
108 module_param(io, ulong, 0400);
109 MODULE_PARM_DESC(io, "I/O base address");
114 static int irq = SMC_IRQ;
115 module_param(irq, int, 0400);
116 MODULE_PARM_DESC(irq, "IRQ number");
118 #endif /* CONFIG_ISA */
121 # define SMC_NOWAIT 0
123 static int nowait = SMC_NOWAIT;
124 module_param(nowait, int, 0400);
125 MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
128 * Transmit timeout, default 5 seconds.
130 static int watchdog = 1000;
131 module_param(watchdog, int, 0400);
132 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
134 MODULE_LICENSE("GPL");
137 * The internal workings of the driver. If you are changing anything
138 * here with the SMC stuff, you should have the datasheet and know
139 * what you are doing.
141 #define CARDNAME "smc91x"
144 * Use power-down feature of the chip
149 * Wait time for memory to be free. This probably shouldn't be
150 * tuned that much, as waiting for this means nothing else happens
153 #define MEMORY_WAIT_TIME 16
156 * The maximum number of processing loops allowed for each call to the
159 #define MAX_IRQ_LOOPS 8
162 * This selects whether TX packets are sent one by one to the SMC91x internal
163 * memory and throttled until transmission completes. This may prevent
164 * RX overruns a litle by keeping much of the memory free for RX packets
165 * but to the expense of reduced TX throughput and increased IRQ overhead.
166 * Note this is not a cure for a too slow data bus or too high IRQ latency.
168 #define THROTTLE_TX_PKTS 0
171 * The MII clock high/low times. 2x this number gives the MII clock period
172 * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
177 #define DBG(n, args...) \
179 if (SMC_DEBUG >= (n)) \
183 #define PRINTK(args...) printk(args)
185 #define DBG(n, args...) do { } while(0)
186 #define PRINTK(args...) printk(KERN_DEBUG args)
190 static void PRINT_PKT(u_char *buf, int length)
197 remainder = length % 16;
199 for (i = 0; i < lines ; i ++) {
201 for (cur = 0; cur < 8; cur++) {
205 printk("%02x%02x ", a, b);
209 for (i = 0; i < remainder/2 ; i++) {
213 printk("%02x%02x ", a, b);
218 #define PRINT_PKT(x...) do { } while(0)
222 /* this enables an interrupt in the interrupt mask register */
223 #define SMC_ENABLE_INT(x) do { \
224 unsigned char mask; \
225 spin_lock_irq(&lp->lock); \
226 mask = SMC_GET_INT_MASK(); \
228 SMC_SET_INT_MASK(mask); \
229 spin_unlock_irq(&lp->lock); \
232 /* this disables an interrupt from the interrupt mask register */
233 #define SMC_DISABLE_INT(x) do { \
234 unsigned char mask; \
235 spin_lock_irq(&lp->lock); \
236 mask = SMC_GET_INT_MASK(); \
238 SMC_SET_INT_MASK(mask); \
239 spin_unlock_irq(&lp->lock); \
243 * Wait while MMU is busy. This is usually in the order of a few nanosecs
244 * if at all, but let's avoid deadlocking the system if the hardware
245 * decides to go south.
247 #define SMC_WAIT_MMU_BUSY() do { \
248 if (unlikely(SMC_GET_MMU_CMD() & MC_BUSY)) { \
249 unsigned long timeout = jiffies + 2; \
250 while (SMC_GET_MMU_CMD() & MC_BUSY) { \
251 if (time_after(jiffies, timeout)) { \
252 printk("%s: timeout %s line %d\n", \
253 dev->name, __FILE__, __LINE__); \
263 * this does a soft reset on the device
265 static void smc_reset(struct net_device *dev)
267 struct smc_local *lp = netdev_priv(dev);
268 void __iomem *ioaddr = lp->base;
269 unsigned int ctl, cfg;
270 struct sk_buff *pending_skb;
272 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
274 /* Disable all interrupts, block TX tasklet */
275 spin_lock_irq(&lp->lock);
278 pending_skb = lp->pending_tx_skb;
279 lp->pending_tx_skb = NULL;
280 spin_unlock_irq(&lp->lock);
282 /* free any pending tx skb */
284 dev_kfree_skb(pending_skb);
285 dev->stats.tx_errors++;
286 dev->stats.tx_aborted_errors++;
290 * This resets the registers mostly to defaults, but doesn't
291 * affect EEPROM. That seems unnecessary
294 SMC_SET_RCR(RCR_SOFTRST);
297 * Setup the Configuration Register
298 * This is necessary because the CONFIG_REG is not affected
303 cfg = CONFIG_DEFAULT;
306 * Setup for fast accesses if requested. If the card/system
307 * can't handle it then there will be no recovery except for
308 * a hard reset or power cycle
311 cfg |= CONFIG_NO_WAIT;
314 * Release from possible power-down state
315 * Configuration register is not affected by Soft Reset
317 cfg |= CONFIG_EPH_POWER_EN;
321 /* this should pause enough for the chip to be happy */
323 * elaborate? What does the chip _need_? --jgarzik
325 * This seems to be undocumented, but something the original
326 * driver(s) have always done. Suspect undocumented timing
327 * info/determined empirically. --rmk
331 /* Disable transmit and receive functionality */
333 SMC_SET_RCR(RCR_CLEAR);
334 SMC_SET_TCR(TCR_CLEAR);
337 ctl = SMC_GET_CTL() | CTL_LE_ENABLE;
340 * Set the control register to automatically release successfully
341 * transmitted packets, to make the best use out of our limited
344 if(!THROTTLE_TX_PKTS)
345 ctl |= CTL_AUTO_RELEASE;
347 ctl &= ~CTL_AUTO_RELEASE;
352 SMC_SET_MMU_CMD(MC_RESET);
357 * Enable Interrupts, Receive, and Transmit
359 static void smc_enable(struct net_device *dev)
361 struct smc_local *lp = netdev_priv(dev);
362 void __iomem *ioaddr = lp->base;
365 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
367 /* see the header file for options in TCR/RCR DEFAULT */
369 SMC_SET_TCR(lp->tcr_cur_mode);
370 SMC_SET_RCR(lp->rcr_cur_mode);
373 SMC_SET_MAC_ADDR(dev->dev_addr);
375 /* now, enable interrupts */
376 mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
377 if (lp->version >= (CHIP_91100 << 4))
380 SMC_SET_INT_MASK(mask);
383 * From this point the register bank must _NOT_ be switched away
384 * to something else than bank 2 without proper locking against
385 * races with any tasklet or interrupt handlers until smc_shutdown()
386 * or smc_reset() is called.
391 * this puts the device in an inactive state
393 static void smc_shutdown(struct net_device *dev)
395 struct smc_local *lp = netdev_priv(dev);
396 void __iomem *ioaddr = lp->base;
397 struct sk_buff *pending_skb;
399 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
401 /* no more interrupts for me */
402 spin_lock_irq(&lp->lock);
405 pending_skb = lp->pending_tx_skb;
406 lp->pending_tx_skb = NULL;
407 spin_unlock_irq(&lp->lock);
409 dev_kfree_skb(pending_skb);
411 /* and tell the card to stay away from that nasty outside world */
413 SMC_SET_RCR(RCR_CLEAR);
414 SMC_SET_TCR(TCR_CLEAR);
417 /* finally, shut the chip down */
419 SMC_SET_CONFIG(SMC_GET_CONFIG() & ~CONFIG_EPH_POWER_EN);
424 * This is the procedure to handle the receipt of a packet.
426 static inline void smc_rcv(struct net_device *dev)
428 struct smc_local *lp = netdev_priv(dev);
429 void __iomem *ioaddr = lp->base;
430 unsigned int packet_number, status, packet_len;
432 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
434 packet_number = SMC_GET_RXFIFO();
435 if (unlikely(packet_number & RXFIFO_REMPTY)) {
436 PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name);
440 /* read from start of packet */
441 SMC_SET_PTR(PTR_READ | PTR_RCV | PTR_AUTOINC);
443 /* First two words are status and packet length */
444 SMC_GET_PKT_HDR(status, packet_len);
445 packet_len &= 0x07ff; /* mask off top bits */
446 DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
447 dev->name, packet_number, status,
448 packet_len, packet_len);
450 if (unlikely(packet_len == 0 && !(status & RS_ERRORS))) {
451 printk(KERN_ERR "%s: bad memory timings: rxlen %u status %x\n",
452 dev->name, packet_len, status);
453 status |= RS_TOOSHORT;
456 if (unlikely(packet_len < 6 || status & RS_ERRORS)) {
457 if (status & RS_TOOLONG && packet_len <= (1514 + 4 + 6)) {
458 /* accept VLAN packets */
459 status &= ~RS_TOOLONG;
462 if (packet_len < 6) {
463 /* bloody hardware */
464 printk(KERN_ERR "%s: fubar (rxlen %u status %x\n",
465 dev->name, packet_len, status);
466 status |= RS_TOOSHORT;
469 SMC_SET_MMU_CMD(MC_RELEASE);
470 dev->stats.rx_errors++;
471 if (status & RS_ALGNERR)
472 dev->stats.rx_frame_errors++;
473 if (status & (RS_TOOSHORT | RS_TOOLONG))
474 dev->stats.rx_length_errors++;
475 if (status & RS_BADCRC)
476 dev->stats.rx_crc_errors++;
480 unsigned int data_len;
482 /* set multicast stats */
483 if (status & RS_MULTICAST)
484 dev->stats.multicast++;
487 * Actual payload is packet_len - 6 (or 5 if odd byte).
488 * We want skb_reserve(2) and the final ctrl word
489 * (2 bytes, possibly containing the payload odd byte).
490 * Furthermore, we add 2 bytes to allow rounding up to
491 * multiple of 4 bytes on 32 bit buses.
492 * Hence packet_len - 6 + 2 + 2 + 2.
494 skb = dev_alloc_skb(packet_len);
495 if (unlikely(skb == NULL)) {
496 printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
499 SMC_SET_MMU_CMD(MC_RELEASE);
500 dev->stats.rx_dropped++;
504 /* Align IP header to 32 bits */
507 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
508 if (lp->version == 0x90)
509 status |= RS_ODDFRAME;
512 * If odd length: packet_len - 5,
513 * otherwise packet_len - 6.
514 * With the trailing ctrl byte it's packet_len - 4.
516 data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
517 data = skb_put(skb, data_len);
518 SMC_PULL_DATA(data, packet_len - 4);
521 SMC_SET_MMU_CMD(MC_RELEASE);
523 PRINT_PKT(data, packet_len - 4);
525 dev->last_rx = jiffies;
526 skb->protocol = eth_type_trans(skb, dev);
528 dev->stats.rx_packets++;
529 dev->stats.rx_bytes += data_len;
535 * On SMP we have the following problem:
537 * A = smc_hardware_send_pkt()
538 * B = smc_hard_start_xmit()
539 * C = smc_interrupt()
541 * A and B can never be executed simultaneously. However, at least on UP,
542 * it is possible (and even desirable) for C to interrupt execution of
543 * A or B in order to have better RX reliability and avoid overruns.
544 * C, just like A and B, must have exclusive access to the chip and
545 * each of them must lock against any other concurrent access.
546 * Unfortunately this is not possible to have C suspend execution of A or
547 * B taking place on another CPU. On UP this is no an issue since A and B
548 * are run from softirq context and C from hard IRQ context, and there is
549 * no other CPU where concurrent access can happen.
550 * If ever there is a way to force at least B and C to always be executed
551 * on the same CPU then we could use read/write locks to protect against
552 * any other concurrent access and C would always interrupt B. But life
553 * isn't that easy in a SMP world...
555 #define smc_special_trylock(lock) \
558 local_irq_disable(); \
559 __ret = spin_trylock(lock); \
561 local_irq_enable(); \
564 #define smc_special_lock(lock) spin_lock_irq(lock)
565 #define smc_special_unlock(lock) spin_unlock_irq(lock)
567 #define smc_special_trylock(lock) (1)
568 #define smc_special_lock(lock) do { } while (0)
569 #define smc_special_unlock(lock) do { } while (0)
573 * This is called to actually send a packet to the chip.
575 static void smc_hardware_send_pkt(unsigned long data)
577 struct net_device *dev = (struct net_device *)data;
578 struct smc_local *lp = netdev_priv(dev);
579 void __iomem *ioaddr = lp->base;
581 unsigned int packet_no, len;
584 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
586 if (!smc_special_trylock(&lp->lock)) {
587 netif_stop_queue(dev);
588 tasklet_schedule(&lp->tx_task);
592 skb = lp->pending_tx_skb;
593 if (unlikely(!skb)) {
594 smc_special_unlock(&lp->lock);
597 lp->pending_tx_skb = NULL;
599 packet_no = SMC_GET_AR();
600 if (unlikely(packet_no & AR_FAILED)) {
601 printk("%s: Memory allocation failed.\n", dev->name);
602 dev->stats.tx_errors++;
603 dev->stats.tx_fifo_errors++;
604 smc_special_unlock(&lp->lock);
608 /* point to the beginning of the packet */
609 SMC_SET_PN(packet_no);
610 SMC_SET_PTR(PTR_AUTOINC);
614 DBG(2, "%s: TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
615 dev->name, packet_no, len, len, buf);
619 * Send the packet length (+6 for status words, length, and ctl.
620 * The card will pad to 64 bytes with zeroes if packet is too small.
622 SMC_PUT_PKT_HDR(0, len + 6);
624 /* send the actual data */
625 SMC_PUSH_DATA(buf, len & ~1);
627 /* Send final ctl word with the last byte if there is one */
628 SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG);
631 * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
632 * have the effect of having at most one packet queued for TX
633 * in the chip's memory at all time.
635 * If THROTTLE_TX_PKTS is not set then the queue is stopped only
636 * when memory allocation (MC_ALLOC) does not succeed right away.
638 if (THROTTLE_TX_PKTS)
639 netif_stop_queue(dev);
641 /* queue the packet for TX */
642 SMC_SET_MMU_CMD(MC_ENQUEUE);
643 smc_special_unlock(&lp->lock);
645 dev->trans_start = jiffies;
646 dev->stats.tx_packets++;
647 dev->stats.tx_bytes += len;
649 SMC_ENABLE_INT(IM_TX_INT | IM_TX_EMPTY_INT);
651 done: if (!THROTTLE_TX_PKTS)
652 netif_wake_queue(dev);
658 * Since I am not sure if I will have enough room in the chip's ram
659 * to store the packet, I call this routine which either sends it
660 * now, or set the card to generates an interrupt when ready
663 static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
665 struct smc_local *lp = netdev_priv(dev);
666 void __iomem *ioaddr = lp->base;
667 unsigned int numPages, poll_count, status;
669 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
671 BUG_ON(lp->pending_tx_skb != NULL);
674 * The MMU wants the number of pages to be the number of 256 bytes
675 * 'pages', minus 1 (since a packet can't ever have 0 pages :))
677 * The 91C111 ignores the size bits, but earlier models don't.
679 * Pkt size for allocating is data length +6 (for additional status
680 * words, length and ctl)
682 * If odd size then last byte is included in ctl word.
684 numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
685 if (unlikely(numPages > 7)) {
686 printk("%s: Far too big packet error.\n", dev->name);
687 dev->stats.tx_errors++;
688 dev->stats.tx_dropped++;
693 smc_special_lock(&lp->lock);
695 /* now, try to allocate the memory */
696 SMC_SET_MMU_CMD(MC_ALLOC | numPages);
699 * Poll the chip for a short amount of time in case the
700 * allocation succeeds quickly.
702 poll_count = MEMORY_WAIT_TIME;
704 status = SMC_GET_INT();
705 if (status & IM_ALLOC_INT) {
706 SMC_ACK_INT(IM_ALLOC_INT);
709 } while (--poll_count);
711 smc_special_unlock(&lp->lock);
713 lp->pending_tx_skb = skb;
715 /* oh well, wait until the chip finds memory later */
716 netif_stop_queue(dev);
717 DBG(2, "%s: TX memory allocation deferred.\n", dev->name);
718 SMC_ENABLE_INT(IM_ALLOC_INT);
721 * Allocation succeeded: push packet to the chip's own memory
724 smc_hardware_send_pkt((unsigned long)dev);
731 * This handles a TX interrupt, which is only called when:
732 * - a TX error occurred, or
733 * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
735 static void smc_tx(struct net_device *dev)
737 struct smc_local *lp = netdev_priv(dev);
738 void __iomem *ioaddr = lp->base;
739 unsigned int saved_packet, packet_no, tx_status, pkt_len;
741 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
743 /* If the TX FIFO is empty then nothing to do */
744 packet_no = SMC_GET_TXFIFO();
745 if (unlikely(packet_no & TXFIFO_TEMPTY)) {
746 PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name);
750 /* select packet to read from */
751 saved_packet = SMC_GET_PN();
752 SMC_SET_PN(packet_no);
754 /* read the first word (status word) from this packet */
755 SMC_SET_PTR(PTR_AUTOINC | PTR_READ);
756 SMC_GET_PKT_HDR(tx_status, pkt_len);
757 DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
758 dev->name, tx_status, packet_no);
760 if (!(tx_status & ES_TX_SUC))
761 dev->stats.tx_errors++;
763 if (tx_status & ES_LOSTCARR)
764 dev->stats.tx_carrier_errors++;
766 if (tx_status & (ES_LATCOL | ES_16COL)) {
767 PRINTK("%s: %s occurred on last xmit\n", dev->name,
768 (tx_status & ES_LATCOL) ?
769 "late collision" : "too many collisions");
770 dev->stats.tx_window_errors++;
771 if (!(dev->stats.tx_window_errors & 63) && net_ratelimit()) {
772 printk(KERN_INFO "%s: unexpectedly large number of "
773 "bad collisions. Please check duplex "
774 "setting.\n", dev->name);
778 /* kill the packet */
780 SMC_SET_MMU_CMD(MC_FREEPKT);
782 /* Don't restore Packet Number Reg until busy bit is cleared */
784 SMC_SET_PN(saved_packet);
786 /* re-enable transmit */
788 SMC_SET_TCR(lp->tcr_cur_mode);
793 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
795 static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
797 struct smc_local *lp = netdev_priv(dev);
798 void __iomem *ioaddr = lp->base;
799 unsigned int mii_reg, mask;
801 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
804 for (mask = 1 << (bits - 1); mask; mask >>= 1) {
810 SMC_SET_MII(mii_reg);
812 SMC_SET_MII(mii_reg | MII_MCLK);
817 static unsigned int smc_mii_in(struct net_device *dev, int bits)
819 struct smc_local *lp = netdev_priv(dev);
820 void __iomem *ioaddr = lp->base;
821 unsigned int mii_reg, mask, val;
823 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
824 SMC_SET_MII(mii_reg);
826 for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
827 if (SMC_GET_MII() & MII_MDI)
830 SMC_SET_MII(mii_reg);
832 SMC_SET_MII(mii_reg | MII_MCLK);
840 * Reads a register from the MII Management serial interface
842 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
844 struct smc_local *lp = netdev_priv(dev);
845 void __iomem *ioaddr = lp->base;
846 unsigned int phydata;
851 smc_mii_out(dev, 0xffffffff, 32);
853 /* Start code (01) + read (10) + phyaddr + phyreg */
854 smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
856 /* Turnaround (2bits) + phydata */
857 phydata = smc_mii_in(dev, 18);
859 /* Return to idle state */
860 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
862 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
863 __FUNCTION__, phyaddr, phyreg, phydata);
870 * Writes a register to the MII Management serial interface
872 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
875 struct smc_local *lp = netdev_priv(dev);
876 void __iomem *ioaddr = lp->base;
881 smc_mii_out(dev, 0xffffffff, 32);
883 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
884 smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
886 /* Return to idle state */
887 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
889 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
890 __FUNCTION__, phyaddr, phyreg, phydata);
896 * Finds and reports the PHY address
898 static void smc_phy_detect(struct net_device *dev)
900 struct smc_local *lp = netdev_priv(dev);
903 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
908 * Scan all 32 PHY addresses if necessary, starting at
909 * PHY#1 to PHY#31, and then PHY#0 last.
911 for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
912 unsigned int id1, id2;
914 /* Read the PHY identifiers */
915 id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
916 id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
918 DBG(3, "%s: phy_id1=0x%x, phy_id2=0x%x\n",
919 dev->name, id1, id2);
921 /* Make sure it is a valid identifier */
922 if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
923 id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
924 /* Save the PHY's address */
925 lp->mii.phy_id = phyaddr & 31;
926 lp->phy_type = id1 << 16 | id2;
933 * Sets the PHY to a configuration as determined by the user
935 static int smc_phy_fixed(struct net_device *dev)
937 struct smc_local *lp = netdev_priv(dev);
938 void __iomem *ioaddr = lp->base;
939 int phyaddr = lp->mii.phy_id;
942 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
944 /* Enter Link Disable state */
945 cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
946 cfg1 |= PHY_CFG1_LNKDIS;
947 smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
950 * Set our fixed capabilities
951 * Disable auto-negotiation
956 bmcr |= BMCR_FULLDPLX;
958 if (lp->ctl_rspeed == 100)
959 bmcr |= BMCR_SPEED100;
961 /* Write our capabilities to the phy control register */
962 smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
964 /* Re-Configure the Receive/Phy Control register */
966 SMC_SET_RPC(lp->rpc_cur_mode);
973 * smc_phy_reset - reset the phy
977 * Issue a software reset for the specified PHY and
978 * wait up to 100ms for the reset to complete. We should
979 * not access the PHY for 50ms after issuing the reset.
981 * The time to wait appears to be dependent on the PHY.
983 * Must be called with lp->lock locked.
985 static int smc_phy_reset(struct net_device *dev, int phy)
987 struct smc_local *lp = netdev_priv(dev);
991 smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
993 for (timeout = 2; timeout; timeout--) {
994 spin_unlock_irq(&lp->lock);
996 spin_lock_irq(&lp->lock);
998 bmcr = smc_phy_read(dev, phy, MII_BMCR);
999 if (!(bmcr & BMCR_RESET))
1003 return bmcr & BMCR_RESET;
1007 * smc_phy_powerdown - powerdown phy
1010 * Power down the specified PHY
1012 static void smc_phy_powerdown(struct net_device *dev)
1014 struct smc_local *lp = netdev_priv(dev);
1016 int phy = lp->mii.phy_id;
1018 if (lp->phy_type == 0)
1021 /* We need to ensure that no calls to smc_phy_configure are
1024 flush_scheduled_work() cannot be called because we are
1025 running with the netlink semaphore held (from
1026 devinet_ioctl()) and the pending work queue contains
1027 linkwatch_event() (scheduled by netif_carrier_off()
1028 above). linkwatch_event() also wants the netlink semaphore.
1030 while(lp->work_pending)
1033 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1034 smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
1038 * smc_phy_check_media - check the media status and adjust TCR
1040 * @init: set true for initialisation
1042 * Select duplex mode depending on negotiation state. This
1043 * also updates our carrier state.
1045 static void smc_phy_check_media(struct net_device *dev, int init)
1047 struct smc_local *lp = netdev_priv(dev);
1048 void __iomem *ioaddr = lp->base;
1050 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
1051 /* duplex state has changed */
1052 if (lp->mii.full_duplex) {
1053 lp->tcr_cur_mode |= TCR_SWFDUP;
1055 lp->tcr_cur_mode &= ~TCR_SWFDUP;
1059 SMC_SET_TCR(lp->tcr_cur_mode);
1064 * Configures the specified PHY through the MII management interface
1065 * using Autonegotiation.
1066 * Calls smc_phy_fixed() if the user has requested a certain config.
1067 * If RPC ANEG bit is set, the media selection is dependent purely on
1068 * the selection by the MII (either in the MII BMCR reg or the result
1069 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
1070 * is controlled by the RPC SPEED and RPC DPLX bits.
1072 static void smc_phy_configure(struct work_struct *work)
1074 struct smc_local *lp =
1075 container_of(work, struct smc_local, phy_configure);
1076 struct net_device *dev = lp->dev;
1077 void __iomem *ioaddr = lp->base;
1078 int phyaddr = lp->mii.phy_id;
1079 int my_phy_caps; /* My PHY capabilities */
1080 int my_ad_caps; /* My Advertised capabilities */
1083 DBG(3, "%s:smc_program_phy()\n", dev->name);
1085 spin_lock_irq(&lp->lock);
1088 * We should not be called if phy_type is zero.
1090 if (lp->phy_type == 0)
1091 goto smc_phy_configure_exit;
1093 if (smc_phy_reset(dev, phyaddr)) {
1094 printk("%s: PHY reset timed out\n", dev->name);
1095 goto smc_phy_configure_exit;
1099 * Enable PHY Interrupts (for register 18)
1100 * Interrupts listed here are disabled
1102 smc_phy_write(dev, phyaddr, PHY_MASK_REG,
1103 PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
1104 PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
1105 PHY_INT_SPDDET | PHY_INT_DPLXDET);
1107 /* Configure the Receive/Phy Control register */
1109 SMC_SET_RPC(lp->rpc_cur_mode);
1111 /* If the user requested no auto neg, then go set his request */
1112 if (lp->mii.force_media) {
1114 goto smc_phy_configure_exit;
1117 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1118 my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
1120 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
1121 printk(KERN_INFO "Auto negotiation NOT supported\n");
1123 goto smc_phy_configure_exit;
1126 my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
1128 if (my_phy_caps & BMSR_100BASE4)
1129 my_ad_caps |= ADVERTISE_100BASE4;
1130 if (my_phy_caps & BMSR_100FULL)
1131 my_ad_caps |= ADVERTISE_100FULL;
1132 if (my_phy_caps & BMSR_100HALF)
1133 my_ad_caps |= ADVERTISE_100HALF;
1134 if (my_phy_caps & BMSR_10FULL)
1135 my_ad_caps |= ADVERTISE_10FULL;
1136 if (my_phy_caps & BMSR_10HALF)
1137 my_ad_caps |= ADVERTISE_10HALF;
1139 /* Disable capabilities not selected by our user */
1140 if (lp->ctl_rspeed != 100)
1141 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1143 if (!lp->ctl_rfduplx)
1144 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1146 /* Update our Auto-Neg Advertisement Register */
1147 smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
1148 lp->mii.advertising = my_ad_caps;
1151 * Read the register back. Without this, it appears that when
1152 * auto-negotiation is restarted, sometimes it isn't ready and
1153 * the link does not come up.
1155 status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
1157 DBG(2, "%s: phy caps=%x\n", dev->name, my_phy_caps);
1158 DBG(2, "%s: phy advertised caps=%x\n", dev->name, my_ad_caps);
1160 /* Restart auto-negotiation process in order to advertise my caps */
1161 smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
1163 smc_phy_check_media(dev, 1);
1165 smc_phy_configure_exit:
1167 spin_unlock_irq(&lp->lock);
1168 lp->work_pending = 0;
1174 * Purpose: Handle interrupts relating to PHY register 18. This is
1175 * called from the "hard" interrupt handler under our private spinlock.
1177 static void smc_phy_interrupt(struct net_device *dev)
1179 struct smc_local *lp = netdev_priv(dev);
1180 int phyaddr = lp->mii.phy_id;
1183 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1185 if (lp->phy_type == 0)
1189 smc_phy_check_media(dev, 0);
1191 /* Read PHY Register 18, Status Output */
1192 phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
1193 if ((phy18 & PHY_INT_INT) == 0)
1198 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1200 static void smc_10bt_check_media(struct net_device *dev, int init)
1202 struct smc_local *lp = netdev_priv(dev);
1203 void __iomem *ioaddr = lp->base;
1204 unsigned int old_carrier, new_carrier;
1206 old_carrier = netif_carrier_ok(dev) ? 1 : 0;
1209 new_carrier = (SMC_GET_EPH_STATUS() & ES_LINK_OK) ? 1 : 0;
1212 if (init || (old_carrier != new_carrier)) {
1214 netif_carrier_off(dev);
1216 netif_carrier_on(dev);
1218 if (netif_msg_link(lp))
1219 printk(KERN_INFO "%s: link %s\n", dev->name,
1220 new_carrier ? "up" : "down");
1224 static void smc_eph_interrupt(struct net_device *dev)
1226 struct smc_local *lp = netdev_priv(dev);
1227 void __iomem *ioaddr = lp->base;
1230 smc_10bt_check_media(dev, 0);
1233 ctl = SMC_GET_CTL();
1234 SMC_SET_CTL(ctl & ~CTL_LE_ENABLE);
1240 * This is the main routine of the driver, to handle the device when
1241 * it needs some attention.
1243 static irqreturn_t smc_interrupt(int irq, void *dev_id)
1245 struct net_device *dev = dev_id;
1246 struct smc_local *lp = netdev_priv(dev);
1247 void __iomem *ioaddr = lp->base;
1248 int status, mask, timeout, card_stats;
1251 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
1253 spin_lock(&lp->lock);
1255 /* A preamble may be used when there is a potential race
1256 * between the interruptible transmit functions and this
1258 SMC_INTERRUPT_PREAMBLE;
1260 saved_pointer = SMC_GET_PTR();
1261 mask = SMC_GET_INT_MASK();
1262 SMC_SET_INT_MASK(0);
1264 /* set a timeout value, so I don't stay here forever */
1265 timeout = MAX_IRQ_LOOPS;
1268 status = SMC_GET_INT();
1270 DBG(2, "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1271 dev->name, status, mask,
1272 ({ int meminfo; SMC_SELECT_BANK(0);
1273 meminfo = SMC_GET_MIR();
1274 SMC_SELECT_BANK(2); meminfo; }),
1281 if (status & IM_TX_INT) {
1282 /* do this before RX as it will free memory quickly */
1283 DBG(3, "%s: TX int\n", dev->name);
1285 SMC_ACK_INT(IM_TX_INT);
1286 if (THROTTLE_TX_PKTS)
1287 netif_wake_queue(dev);
1288 } else if (status & IM_RCV_INT) {
1289 DBG(3, "%s: RX irq\n", dev->name);
1291 } else if (status & IM_ALLOC_INT) {
1292 DBG(3, "%s: Allocation irq\n", dev->name);
1293 tasklet_hi_schedule(&lp->tx_task);
1294 mask &= ~IM_ALLOC_INT;
1295 } else if (status & IM_TX_EMPTY_INT) {
1296 DBG(3, "%s: TX empty\n", dev->name);
1297 mask &= ~IM_TX_EMPTY_INT;
1301 card_stats = SMC_GET_COUNTER();
1304 /* single collisions */
1305 dev->stats.collisions += card_stats & 0xF;
1308 /* multiple collisions */
1309 dev->stats.collisions += card_stats & 0xF;
1310 } else if (status & IM_RX_OVRN_INT) {
1311 DBG(1, "%s: RX overrun (EPH_ST 0x%04x)\n", dev->name,
1312 ({ int eph_st; SMC_SELECT_BANK(0);
1313 eph_st = SMC_GET_EPH_STATUS();
1314 SMC_SELECT_BANK(2); eph_st; }) );
1315 SMC_ACK_INT(IM_RX_OVRN_INT);
1316 dev->stats.rx_errors++;
1317 dev->stats.rx_fifo_errors++;
1318 } else if (status & IM_EPH_INT) {
1319 smc_eph_interrupt(dev);
1320 } else if (status & IM_MDINT) {
1321 SMC_ACK_INT(IM_MDINT);
1322 smc_phy_interrupt(dev);
1323 } else if (status & IM_ERCV_INT) {
1324 SMC_ACK_INT(IM_ERCV_INT);
1325 PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name);
1327 } while (--timeout);
1329 /* restore register states */
1330 SMC_SET_PTR(saved_pointer);
1331 SMC_SET_INT_MASK(mask);
1332 spin_unlock(&lp->lock);
1334 if (timeout == MAX_IRQ_LOOPS)
1335 PRINTK("%s: spurious interrupt (mask = 0x%02x)\n",
1337 DBG(3, "%s: Interrupt done (%d loops)\n",
1338 dev->name, MAX_IRQ_LOOPS - timeout);
1341 * We return IRQ_HANDLED unconditionally here even if there was
1342 * nothing to do. There is a possibility that a packet might
1343 * get enqueued into the chip right after TX_EMPTY_INT is raised
1344 * but just before the CPU acknowledges the IRQ.
1345 * Better take an unneeded IRQ in some occasions than complexifying
1346 * the code for all cases.
1351 #ifdef CONFIG_NET_POLL_CONTROLLER
1353 * Polling receive - used by netconsole and other diagnostic tools
1354 * to allow network i/o with interrupts disabled.
1356 static void smc_poll_controller(struct net_device *dev)
1358 disable_irq(dev->irq);
1359 smc_interrupt(dev->irq, dev);
1360 enable_irq(dev->irq);
1364 /* Our watchdog timed out. Called by the networking layer */
1365 static void smc_timeout(struct net_device *dev)
1367 struct smc_local *lp = netdev_priv(dev);
1368 void __iomem *ioaddr = lp->base;
1369 int status, mask, eph_st, meminfo, fifo;
1371 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1373 spin_lock_irq(&lp->lock);
1374 status = SMC_GET_INT();
1375 mask = SMC_GET_INT_MASK();
1376 fifo = SMC_GET_FIFO();
1378 eph_st = SMC_GET_EPH_STATUS();
1379 meminfo = SMC_GET_MIR();
1381 spin_unlock_irq(&lp->lock);
1382 PRINTK( "%s: TX timeout (INT 0x%02x INTMASK 0x%02x "
1383 "MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
1384 dev->name, status, mask, meminfo, fifo, eph_st );
1390 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1391 * smc_phy_configure() calls msleep() which calls schedule_timeout()
1392 * which calls schedule(). Hence we use a work queue.
1394 if (lp->phy_type != 0) {
1395 if (schedule_work(&lp->phy_configure)) {
1396 lp->work_pending = 1;
1400 /* We can accept TX packets again */
1401 dev->trans_start = jiffies;
1402 netif_wake_queue(dev);
1406 * This routine will, depending on the values passed to it,
1407 * either make it accept multicast packets, go into
1408 * promiscuous mode (for TCPDUMP and cousins) or accept
1409 * a select set of multicast packets
1411 static void smc_set_multicast_list(struct net_device *dev)
1413 struct smc_local *lp = netdev_priv(dev);
1414 void __iomem *ioaddr = lp->base;
1415 unsigned char multicast_table[8];
1416 int update_multicast = 0;
1418 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1420 if (dev->flags & IFF_PROMISC) {
1421 DBG(2, "%s: RCR_PRMS\n", dev->name);
1422 lp->rcr_cur_mode |= RCR_PRMS;
1425 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1426 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1427 when promiscuous mode is turned on.
1431 * Here, I am setting this to accept all multicast packets.
1432 * I don't need to zero the multicast table, because the flag is
1433 * checked before the table is
1435 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1436 DBG(2, "%s: RCR_ALMUL\n", dev->name);
1437 lp->rcr_cur_mode |= RCR_ALMUL;
1441 * This sets the internal hardware table to filter out unwanted
1442 * multicast packets before they take up memory.
1444 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1445 * address are the offset into the table. If that bit is 1, then the
1446 * multicast packet is accepted. Otherwise, it's dropped silently.
1448 * To use the 6 bits as an offset into the table, the high 3 bits are
1449 * the number of the 8 bit register, while the low 3 bits are the bit
1450 * within that register.
1452 else if (dev->mc_count) {
1454 struct dev_mc_list *cur_addr;
1456 /* table for flipping the order of 3 bits */
1457 static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};
1459 /* start with a table of all zeros: reject all */
1460 memset(multicast_table, 0, sizeof(multicast_table));
1462 cur_addr = dev->mc_list;
1463 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1466 /* do we have a pointer here? */
1469 /* make sure this is a multicast address -
1470 shouldn't this be a given if we have it here ? */
1471 if (!(*cur_addr->dmi_addr & 1))
1474 /* only use the low order bits */
1475 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1477 /* do some messy swapping to put the bit in the right spot */
1478 multicast_table[invert3[position&7]] |=
1479 (1<<invert3[(position>>3)&7]);
1482 /* be sure I get rid of flags I might have set */
1483 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1485 /* now, the table can be loaded into the chipset */
1486 update_multicast = 1;
1488 DBG(2, "%s: ~(RCR_PRMS|RCR_ALMUL)\n", dev->name);
1489 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1492 * since I'm disabling all multicast entirely, I need to
1493 * clear the multicast list
1495 memset(multicast_table, 0, sizeof(multicast_table));
1496 update_multicast = 1;
1499 spin_lock_irq(&lp->lock);
1501 SMC_SET_RCR(lp->rcr_cur_mode);
1502 if (update_multicast) {
1504 SMC_SET_MCAST(multicast_table);
1507 spin_unlock_irq(&lp->lock);
1512 * Open and Initialize the board
1514 * Set up everything, reset the card, etc..
1517 smc_open(struct net_device *dev)
1519 struct smc_local *lp = netdev_priv(dev);
1521 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1524 * Check that the address is valid. If its not, refuse
1525 * to bring the device up. The user must specify an
1526 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1528 if (!is_valid_ether_addr(dev->dev_addr)) {
1529 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
1533 /* Setup the default Register Modes */
1534 lp->tcr_cur_mode = TCR_DEFAULT;
1535 lp->rcr_cur_mode = RCR_DEFAULT;
1536 lp->rpc_cur_mode = RPC_DEFAULT;
1539 * If we are not using a MII interface, we need to
1540 * monitor our own carrier signal to detect faults.
1542 if (lp->phy_type == 0)
1543 lp->tcr_cur_mode |= TCR_MON_CSN;
1545 /* reset the hardware */
1549 /* Configure the PHY, initialize the link state */
1550 if (lp->phy_type != 0)
1551 smc_phy_configure(&lp->phy_configure);
1553 spin_lock_irq(&lp->lock);
1554 smc_10bt_check_media(dev, 1);
1555 spin_unlock_irq(&lp->lock);
1558 netif_start_queue(dev);
1565 * this makes the board clean up everything that it can
1566 * and not talk to the outside world. Caused by
1567 * an 'ifconfig ethX down'
1569 static int smc_close(struct net_device *dev)
1571 struct smc_local *lp = netdev_priv(dev);
1573 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1575 netif_stop_queue(dev);
1576 netif_carrier_off(dev);
1578 /* clear everything */
1580 tasklet_kill(&lp->tx_task);
1581 smc_phy_powerdown(dev);
1589 smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1591 struct smc_local *lp = netdev_priv(dev);
1597 if (lp->phy_type != 0) {
1598 spin_lock_irq(&lp->lock);
1599 ret = mii_ethtool_gset(&lp->mii, cmd);
1600 spin_unlock_irq(&lp->lock);
1602 cmd->supported = SUPPORTED_10baseT_Half |
1603 SUPPORTED_10baseT_Full |
1604 SUPPORTED_TP | SUPPORTED_AUI;
1606 if (lp->ctl_rspeed == 10)
1607 cmd->speed = SPEED_10;
1608 else if (lp->ctl_rspeed == 100)
1609 cmd->speed = SPEED_100;
1611 cmd->autoneg = AUTONEG_DISABLE;
1612 cmd->transceiver = XCVR_INTERNAL;
1614 cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
1623 smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1625 struct smc_local *lp = netdev_priv(dev);
1628 if (lp->phy_type != 0) {
1629 spin_lock_irq(&lp->lock);
1630 ret = mii_ethtool_sset(&lp->mii, cmd);
1631 spin_unlock_irq(&lp->lock);
1633 if (cmd->autoneg != AUTONEG_DISABLE ||
1634 cmd->speed != SPEED_10 ||
1635 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1636 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1639 // lp->port = cmd->port;
1640 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1642 // if (netif_running(dev))
1643 // smc_set_port(dev);
1652 smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1654 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1655 strncpy(info->version, version, sizeof(info->version));
1656 strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
1659 static int smc_ethtool_nwayreset(struct net_device *dev)
1661 struct smc_local *lp = netdev_priv(dev);
1664 if (lp->phy_type != 0) {
1665 spin_lock_irq(&lp->lock);
1666 ret = mii_nway_restart(&lp->mii);
1667 spin_unlock_irq(&lp->lock);
1673 static u32 smc_ethtool_getmsglevel(struct net_device *dev)
1675 struct smc_local *lp = netdev_priv(dev);
1676 return lp->msg_enable;
1679 static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
1681 struct smc_local *lp = netdev_priv(dev);
1682 lp->msg_enable = level;
1685 static const struct ethtool_ops smc_ethtool_ops = {
1686 .get_settings = smc_ethtool_getsettings,
1687 .set_settings = smc_ethtool_setsettings,
1688 .get_drvinfo = smc_ethtool_getdrvinfo,
1690 .get_msglevel = smc_ethtool_getmsglevel,
1691 .set_msglevel = smc_ethtool_setmsglevel,
1692 .nway_reset = smc_ethtool_nwayreset,
1693 .get_link = ethtool_op_get_link,
1694 // .get_eeprom = smc_ethtool_geteeprom,
1695 // .set_eeprom = smc_ethtool_seteeprom,
1701 * This routine has a simple purpose -- make the SMC chip generate an
1702 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1705 * does this still work?
1707 * I just deleted auto_irq.c, since it was never built...
1710 static int __init smc_findirq(void __iomem *ioaddr)
1713 unsigned long cookie;
1715 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1717 cookie = probe_irq_on();
1720 * What I try to do here is trigger an ALLOC_INT. This is done
1721 * by allocating a small chunk of memory, which will give an interrupt
1724 /* enable ALLOCation interrupts ONLY */
1726 SMC_SET_INT_MASK(IM_ALLOC_INT);
1729 * Allocate 512 bytes of memory. Note that the chip was just
1730 * reset so all the memory is available
1732 SMC_SET_MMU_CMD(MC_ALLOC | 1);
1735 * Wait until positive that the interrupt has been generated
1740 int_status = SMC_GET_INT();
1741 if (int_status & IM_ALLOC_INT)
1742 break; /* got the interrupt */
1743 } while (--timeout);
1746 * there is really nothing that I can do here if timeout fails,
1747 * as autoirq_report will return a 0 anyway, which is what I
1748 * want in this case. Plus, the clean up is needed in both
1752 /* and disable all interrupts again */
1753 SMC_SET_INT_MASK(0);
1755 /* and return what I found */
1756 return probe_irq_off(cookie);
1760 * Function: smc_probe(unsigned long ioaddr)
1763 * Tests to see if a given ioaddr points to an SMC91x chip.
1764 * Returns a 0 on success
1767 * (1) see if the high byte of BANK_SELECT is 0x33
1768 * (2) compare the ioaddr with the base register's address
1769 * (3) see if I recognize the chip ID in the appropriate register
1771 * Here I do typical initialization tasks.
1773 * o Initialize the structure if needed
1774 * o print out my vanity message if not done so already
1775 * o print out what type of hardware is detected
1776 * o print out the ethernet address
1778 * o set up my private data
1779 * o configure the dev structure with my subroutines
1780 * o actually GRAB the irq.
1783 static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr,
1784 unsigned long irq_flags)
1786 struct smc_local *lp = netdev_priv(dev);
1787 static int version_printed = 0;
1789 unsigned int val, revision_register;
1790 const char *version_string;
1791 DECLARE_MAC_BUF(mac);
1793 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1795 /* First, see if the high byte is 0x33 */
1796 val = SMC_CURRENT_BANK();
1797 DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val);
1798 if ((val & 0xFF00) != 0x3300) {
1799 if ((val & 0xFF) == 0x33) {
1801 "%s: Detected possible byte-swapped interface"
1802 " at IOADDR %p\n", CARDNAME, ioaddr);
1809 * The above MIGHT indicate a device, but I need to write to
1810 * further test this.
1813 val = SMC_CURRENT_BANK();
1814 if ((val & 0xFF00) != 0x3300) {
1820 * well, we've already written once, so hopefully another
1821 * time won't hurt. This time, I need to switch the bank
1822 * register to bank 1, so I can access the base address
1826 val = SMC_GET_BASE();
1827 val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
1828 if (((unsigned int)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
1829 printk("%s: IOADDR %p doesn't match configuration (%x).\n",
1830 CARDNAME, ioaddr, val);
1834 * check if the revision register is something that I
1835 * recognize. These might need to be added to later,
1836 * as future revisions could be added.
1839 revision_register = SMC_GET_REV();
1840 DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
1841 version_string = chip_ids[ (revision_register >> 4) & 0xF];
1842 if (!version_string || (revision_register & 0xff00) != 0x3300) {
1843 /* I don't recognize this chip, so... */
1844 printk("%s: IO %p: Unrecognized revision register 0x%04x"
1845 ", Contact author.\n", CARDNAME,
1846 ioaddr, revision_register);
1852 /* At this point I'll assume that the chip is an SMC91x. */
1853 if (version_printed++ == 0)
1854 printk("%s", version);
1856 /* fill in some of the fields */
1857 dev->base_addr = (unsigned long)ioaddr;
1859 lp->version = revision_register & 0xff;
1860 spin_lock_init(&lp->lock);
1862 /* Get the MAC address */
1864 SMC_GET_MAC_ADDR(dev->dev_addr);
1866 /* now, reset the chip, and put it into a known state */
1870 * If dev->irq is 0, then the device has to be banged on to see
1873 * This banging doesn't always detect the IRQ, for unknown reasons.
1874 * a workaround is to reset the chip and try again.
1876 * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1877 * be what is requested on the command line. I don't do that, mostly
1878 * because the card that I have uses a non-standard method of accessing
1879 * the IRQs, and because this _should_ work in most configurations.
1881 * Specifying an IRQ is done with the assumption that the user knows
1882 * what (s)he is doing. No checking is done!!!!
1889 dev->irq = smc_findirq(ioaddr);
1892 /* kick the card and try again */
1896 if (dev->irq == 0) {
1897 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1902 dev->irq = irq_canonicalize(dev->irq);
1904 /* Fill in the fields of the device structure with ethernet values. */
1907 dev->open = smc_open;
1908 dev->stop = smc_close;
1909 dev->hard_start_xmit = smc_hard_start_xmit;
1910 dev->tx_timeout = smc_timeout;
1911 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1912 dev->set_multicast_list = smc_set_multicast_list;
1913 dev->ethtool_ops = &smc_ethtool_ops;
1914 #ifdef CONFIG_NET_POLL_CONTROLLER
1915 dev->poll_controller = smc_poll_controller;
1918 tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev);
1919 INIT_WORK(&lp->phy_configure, smc_phy_configure);
1921 lp->mii.phy_id_mask = 0x1f;
1922 lp->mii.reg_num_mask = 0x1f;
1923 lp->mii.force_media = 0;
1924 lp->mii.full_duplex = 0;
1926 lp->mii.mdio_read = smc_phy_read;
1927 lp->mii.mdio_write = smc_phy_write;
1930 * Locate the phy, if any.
1932 if (lp->version >= (CHIP_91100 << 4))
1933 smc_phy_detect(dev);
1935 /* then shut everything down to save power */
1937 smc_phy_powerdown(dev);
1939 /* Set default parameters */
1940 lp->msg_enable = NETIF_MSG_LINK;
1941 lp->ctl_rfduplx = 0;
1942 lp->ctl_rspeed = 10;
1944 if (lp->version >= (CHIP_91100 << 4)) {
1945 lp->ctl_rfduplx = 1;
1946 lp->ctl_rspeed = 100;
1950 retval = request_irq(dev->irq, &smc_interrupt, irq_flags, dev->name, dev);
1954 #ifdef SMC_USE_PXA_DMA
1956 int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
1957 smc_pxa_dma_irq, NULL);
1963 retval = register_netdev(dev);
1965 /* now, print out the card info, in a short format.. */
1966 printk("%s: %s (rev %d) at %p IRQ %d",
1967 dev->name, version_string, revision_register & 0x0f,
1968 lp->base, dev->irq);
1970 if (dev->dma != (unsigned char)-1)
1971 printk(" DMA %d", dev->dma);
1973 printk("%s%s\n", nowait ? " [nowait]" : "",
1974 THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
1976 if (!is_valid_ether_addr(dev->dev_addr)) {
1977 printk("%s: Invalid ethernet MAC address. Please "
1978 "set using ifconfig\n", dev->name);
1980 /* Print the Ethernet address */
1981 printk("%s: Ethernet addr: %s\n",
1982 dev->name, print_mac(mac, dev->dev_addr));
1985 if (lp->phy_type == 0) {
1986 PRINTK("%s: No PHY found\n", dev->name);
1987 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
1988 PRINTK("%s: PHY LAN83C183 (LAN91C111 Internal)\n", dev->name);
1989 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
1990 PRINTK("%s: PHY LAN83C180\n", dev->name);
1995 #ifdef SMC_USE_PXA_DMA
1996 if (retval && dev->dma != (unsigned char)-1)
1997 pxa_free_dma(dev->dma);
2002 static int smc_enable_device(struct platform_device *pdev)
2004 unsigned long flags;
2005 unsigned char ecor, ecsr;
2007 struct resource * res;
2009 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2014 * Map the attribute space. This is overkill, but clean.
2016 addr = ioremap(res->start, ATTRIB_SIZE);
2021 * Reset the device. We must disable IRQs around this
2022 * since a reset causes the IRQ line become active.
2024 local_irq_save(flags);
2025 ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
2026 writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
2027 readb(addr + (ECOR << SMC_IO_SHIFT));
2030 * Wait 100us for the chip to reset.
2035 * The device will ignore all writes to the enable bit while
2036 * reset is asserted, even if the reset bit is cleared in the
2037 * same write. Must clear reset first, then enable the device.
2039 writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
2040 writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
2043 * Set the appropriate byte/word mode.
2045 ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
2046 if (!SMC_CAN_USE_16BIT)
2048 writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
2049 local_irq_restore(flags);
2054 * Wait for the chip to wake up. We could poll the control
2055 * register in the main register space, but that isn't mapped
2056 * yet. We know this is going to take 750us.
2063 static int smc_request_attrib(struct platform_device *pdev)
2065 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2070 if (!request_mem_region(res->start, ATTRIB_SIZE, CARDNAME))
2076 static void smc_release_attrib(struct platform_device *pdev)
2078 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2081 release_mem_region(res->start, ATTRIB_SIZE);
2084 static inline void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev)
2086 if (SMC_CAN_USE_DATACS) {
2087 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2088 struct smc_local *lp = netdev_priv(ndev);
2093 if(!request_mem_region(res->start, SMC_DATA_EXTENT, CARDNAME)) {
2094 printk(KERN_INFO "%s: failed to request datacs memory region.\n", CARDNAME);
2098 lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
2102 static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev)
2104 if (SMC_CAN_USE_DATACS) {
2105 struct smc_local *lp = netdev_priv(ndev);
2106 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2109 iounmap(lp->datacs);
2114 release_mem_region(res->start, SMC_DATA_EXTENT);
2121 * dev->base_addr == 0, try to find all possible locations
2122 * dev->base_addr > 0x1ff, this is the address to check
2123 * dev->base_addr == <anything else>, return failure code
2126 * 0 --> there is a device
2127 * anything else, error
2129 static int smc_drv_probe(struct platform_device *pdev)
2131 struct net_device *ndev;
2132 struct resource *res, *ires;
2133 unsigned int __iomem *addr;
2134 unsigned long irq_flags = SMC_IRQ_FLAGS;
2137 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2139 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2146 if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
2151 ndev = alloc_etherdev(sizeof(struct smc_local));
2153 printk("%s: could not allocate device.\n", CARDNAME);
2155 goto out_release_io;
2157 SET_NETDEV_DEV(ndev, &pdev->dev);
2159 ndev->dma = (unsigned char)-1;
2161 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2164 goto out_free_netdev;
2167 ndev->irq = ires->start;
2168 if (SMC_IRQ_FLAGS == -1)
2169 irq_flags = ires->flags & IRQF_TRIGGER_MASK;
2171 ret = smc_request_attrib(pdev);
2173 goto out_free_netdev;
2174 #if defined(CONFIG_SA1100_ASSABET)
2175 NCR_0 |= NCR_ENET_OSC_EN;
2177 ret = smc_enable_device(pdev);
2179 goto out_release_attrib;
2181 addr = ioremap(res->start, SMC_IO_EXTENT);
2184 goto out_release_attrib;
2187 #ifdef SMC_USE_PXA_DMA
2189 struct smc_local *lp = netdev_priv(ndev);
2190 lp->device = &pdev->dev;
2191 lp->physaddr = res->start;
2195 platform_set_drvdata(pdev, ndev);
2196 ret = smc_probe(ndev, addr, irq_flags);
2200 smc_request_datacs(pdev, ndev);
2205 platform_set_drvdata(pdev, NULL);
2208 smc_release_attrib(pdev);
2212 release_mem_region(res->start, SMC_IO_EXTENT);
2214 printk("%s: not found (%d).\n", CARDNAME, ret);
2219 static int smc_drv_remove(struct platform_device *pdev)
2221 struct net_device *ndev = platform_get_drvdata(pdev);
2222 struct smc_local *lp = netdev_priv(ndev);
2223 struct resource *res;
2225 platform_set_drvdata(pdev, NULL);
2227 unregister_netdev(ndev);
2229 free_irq(ndev->irq, ndev);
2231 #ifdef SMC_USE_PXA_DMA
2232 if (ndev->dma != (unsigned char)-1)
2233 pxa_free_dma(ndev->dma);
2237 smc_release_datacs(pdev,ndev);
2238 smc_release_attrib(pdev);
2240 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2242 platform_get_resource(pdev, IORESOURCE_MEM, 0);
2243 release_mem_region(res->start, SMC_IO_EXTENT);
2250 static int smc_drv_suspend(struct platform_device *dev, pm_message_t state)
2252 struct net_device *ndev = platform_get_drvdata(dev);
2255 if (netif_running(ndev)) {
2256 netif_device_detach(ndev);
2258 smc_phy_powerdown(ndev);
2264 static int smc_drv_resume(struct platform_device *dev)
2266 struct net_device *ndev = platform_get_drvdata(dev);
2269 struct smc_local *lp = netdev_priv(ndev);
2270 smc_enable_device(dev);
2271 if (netif_running(ndev)) {
2274 if (lp->phy_type != 0)
2275 smc_phy_configure(&lp->phy_configure);
2276 netif_device_attach(ndev);
2282 static struct platform_driver smc_driver = {
2283 .probe = smc_drv_probe,
2284 .remove = smc_drv_remove,
2285 .suspend = smc_drv_suspend,
2286 .resume = smc_drv_resume,
2292 static int __init smc_init(void)
2298 "%s: You shouldn't use auto-probing with insmod!\n",
2303 return platform_driver_register(&smc_driver);
2306 static void __exit smc_cleanup(void)
2308 platform_driver_unregister(&smc_driver);
2311 module_init(smc_init);
2312 module_exit(smc_cleanup);