1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2008 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include "net_driver.h"
33 #define EFX_MAX_MTU (9 * 1024)
35 /* RX slow fill workqueue. If memory allocation fails in the fast path,
36 * a work item is pushed onto this work queue to retry the allocation later,
37 * to avoid the NIC being starved of RX buffers. Since this is a per cpu
38 * workqueue, there is nothing to be gained in making it per NIC
40 static struct workqueue_struct *refill_workqueue;
42 /**************************************************************************
46 *************************************************************************/
49 * Enable large receive offload (LRO) aka soft segment reassembly (SSR)
51 * This sets the default for new devices. It can be controlled later
54 static int lro = true;
55 module_param(lro, int, 0644);
56 MODULE_PARM_DESC(lro, "Large receive offload acceleration");
59 * Use separate channels for TX and RX events
61 * Set this to 1 to use separate channels for TX and RX. It allows us to
62 * apply a higher level of interrupt moderation to TX events.
64 * This is forced to 0 for MSI interrupt mode as the interrupt vector
67 static unsigned int separate_tx_and_rx_channels = true;
69 /* This is the weight assigned to each of the (per-channel) virtual
72 static int napi_weight = 64;
74 /* This is the time (in jiffies) between invocations of the hardware
75 * monitor, which checks for known hardware bugs and resets the
76 * hardware and driver as necessary.
78 unsigned int efx_monitor_interval = 1 * HZ;
80 /* This controls whether or not the hardware monitor will trigger a
81 * reset when it detects an error condition.
83 static unsigned int monitor_reset = true;
85 /* This controls whether or not the driver will initialise devices
86 * with invalid MAC addresses stored in the EEPROM or flash. If true,
87 * such devices will be initialised with a random locally-generated
88 * MAC address. This allows for loading the sfc_mtd driver to
89 * reprogram the flash, even if the flash contents (including the MAC
90 * address) have previously been erased.
92 static unsigned int allow_bad_hwaddr;
94 /* Initial interrupt moderation settings. They can be modified after
95 * module load with ethtool.
97 * The default for RX should strike a balance between increasing the
98 * round-trip latency and reducing overhead.
100 static unsigned int rx_irq_mod_usec = 60;
102 /* Initial interrupt moderation settings. They can be modified after
103 * module load with ethtool.
105 * This default is chosen to ensure that a 10G link does not go idle
106 * while a TX queue is stopped after it has become full. A queue is
107 * restarted when it drops below half full. The time this takes (assuming
108 * worst case 3 descriptors per packet and 1024 descriptors) is
109 * 512 / 3 * 1.2 = 205 usec.
111 static unsigned int tx_irq_mod_usec = 150;
113 /* This is the first interrupt mode to try out of:
118 static unsigned int interrupt_mode;
120 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
121 * i.e. the number of CPUs among which we may distribute simultaneous
122 * interrupt handling.
124 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
125 * The default (0) means to assign an interrupt to each package (level II cache)
127 static unsigned int rss_cpus;
128 module_param(rss_cpus, uint, 0444);
129 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
131 /**************************************************************************
133 * Utility functions and prototypes
135 *************************************************************************/
136 static void efx_remove_channel(struct efx_channel *channel);
137 static void efx_remove_port(struct efx_nic *efx);
138 static void efx_fini_napi(struct efx_nic *efx);
139 static void efx_fini_channels(struct efx_nic *efx);
141 #define EFX_ASSERT_RESET_SERIALISED(efx) \
143 if ((efx->state == STATE_RUNNING) || \
144 (efx->state == STATE_RESETTING)) \
148 /**************************************************************************
150 * Event queue processing
152 *************************************************************************/
154 /* Process channel's event queue
156 * This function is responsible for processing the event queue of a
157 * single channel. The caller must guarantee that this function will
158 * never be concurrently called more than once on the same channel,
159 * though different channels may be being processed concurrently.
161 static int efx_process_channel(struct efx_channel *channel, int rx_quota)
164 struct efx_rx_queue *rx_queue;
166 if (unlikely(channel->efx->reset_pending != RESET_TYPE_NONE ||
170 rxdmaqs = falcon_process_eventq(channel, &rx_quota);
172 /* Deliver last RX packet. */
173 if (channel->rx_pkt) {
174 __efx_rx_packet(channel, channel->rx_pkt,
175 channel->rx_pkt_csummed);
176 channel->rx_pkt = NULL;
179 efx_flush_lro(channel);
180 efx_rx_strategy(channel);
182 /* Refill descriptor rings as necessary */
183 rx_queue = &channel->efx->rx_queue[0];
186 efx_fast_push_rx_descriptors(rx_queue);
194 /* Mark channel as finished processing
196 * Note that since we will not receive further interrupts for this
197 * channel before we finish processing and call the eventq_read_ack()
198 * method, there is no need to use the interrupt hold-off timers.
200 static inline void efx_channel_processed(struct efx_channel *channel)
202 /* The interrupt handler for this channel may set work_pending
203 * as soon as we acknowledge the events we've seen. Make sure
204 * it's cleared before then. */
205 channel->work_pending = false;
208 falcon_eventq_read_ack(channel);
213 * NAPI guarantees serialisation of polls of the same device, which
214 * provides the guarantee required by efx_process_channel().
216 static int efx_poll(struct napi_struct *napi, int budget)
218 struct efx_channel *channel =
219 container_of(napi, struct efx_channel, napi_str);
220 struct net_device *napi_dev = channel->napi_dev;
224 EFX_TRACE(channel->efx, "channel %d NAPI poll executing on CPU %d\n",
225 channel->channel, raw_smp_processor_id());
227 unused = efx_process_channel(channel, budget);
228 rx_packets = (budget - unused);
230 if (rx_packets < budget) {
231 /* There is no race here; although napi_disable() will
232 * only wait for netif_rx_complete(), this isn't a problem
233 * since efx_channel_processed() will have no effect if
234 * interrupts have already been disabled.
236 netif_rx_complete(napi_dev, napi);
237 efx_channel_processed(channel);
243 /* Process the eventq of the specified channel immediately on this CPU
245 * Disable hardware generated interrupts, wait for any existing
246 * processing to finish, then directly poll (and ack ) the eventq.
247 * Finally reenable NAPI and interrupts.
249 * Since we are touching interrupts the caller should hold the suspend lock
251 void efx_process_channel_now(struct efx_channel *channel)
253 struct efx_nic *efx = channel->efx;
255 BUG_ON(!channel->used_flags);
256 BUG_ON(!channel->enabled);
258 /* Disable interrupts and wait for ISRs to complete */
259 falcon_disable_interrupts(efx);
261 synchronize_irq(efx->legacy_irq);
262 if (channel->has_interrupt && channel->irq)
263 synchronize_irq(channel->irq);
265 /* Wait for any NAPI processing to complete */
266 napi_disable(&channel->napi_str);
268 /* Poll the channel */
269 efx_process_channel(channel, efx->type->evq_size);
271 /* Ack the eventq. This may cause an interrupt to be generated
272 * when they are reenabled */
273 efx_channel_processed(channel);
275 napi_enable(&channel->napi_str);
276 falcon_enable_interrupts(efx);
279 /* Create event queue
280 * Event queue memory allocations are done only once. If the channel
281 * is reset, the memory buffer will be reused; this guards against
282 * errors during channel reset and also simplifies interrupt handling.
284 static int efx_probe_eventq(struct efx_channel *channel)
286 EFX_LOG(channel->efx, "chan %d create event queue\n", channel->channel);
288 return falcon_probe_eventq(channel);
291 /* Prepare channel's event queue */
292 static int efx_init_eventq(struct efx_channel *channel)
294 EFX_LOG(channel->efx, "chan %d init event queue\n", channel->channel);
296 channel->eventq_read_ptr = 0;
298 return falcon_init_eventq(channel);
301 static void efx_fini_eventq(struct efx_channel *channel)
303 EFX_LOG(channel->efx, "chan %d fini event queue\n", channel->channel);
305 falcon_fini_eventq(channel);
308 static void efx_remove_eventq(struct efx_channel *channel)
310 EFX_LOG(channel->efx, "chan %d remove event queue\n", channel->channel);
312 falcon_remove_eventq(channel);
315 /**************************************************************************
319 *************************************************************************/
321 static int efx_probe_channel(struct efx_channel *channel)
323 struct efx_tx_queue *tx_queue;
324 struct efx_rx_queue *rx_queue;
327 EFX_LOG(channel->efx, "creating channel %d\n", channel->channel);
329 rc = efx_probe_eventq(channel);
333 efx_for_each_channel_tx_queue(tx_queue, channel) {
334 rc = efx_probe_tx_queue(tx_queue);
339 efx_for_each_channel_rx_queue(rx_queue, channel) {
340 rc = efx_probe_rx_queue(rx_queue);
345 channel->n_rx_frm_trunc = 0;
350 efx_for_each_channel_rx_queue(rx_queue, channel)
351 efx_remove_rx_queue(rx_queue);
353 efx_for_each_channel_tx_queue(tx_queue, channel)
354 efx_remove_tx_queue(tx_queue);
360 /* Channels are shutdown and reinitialised whilst the NIC is running
361 * to propagate configuration changes (mtu, checksum offload), or
362 * to clear hardware error conditions
364 static int efx_init_channels(struct efx_nic *efx)
366 struct efx_tx_queue *tx_queue;
367 struct efx_rx_queue *rx_queue;
368 struct efx_channel *channel;
371 /* Calculate the rx buffer allocation parameters required to
372 * support the current MTU, including padding for header
373 * alignment and overruns.
375 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
376 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
377 efx->type->rx_buffer_padding);
378 efx->rx_buffer_order = get_order(efx->rx_buffer_len);
380 /* Initialise the channels */
381 efx_for_each_channel(channel, efx) {
382 EFX_LOG(channel->efx, "init chan %d\n", channel->channel);
384 rc = efx_init_eventq(channel);
388 efx_for_each_channel_tx_queue(tx_queue, channel) {
389 rc = efx_init_tx_queue(tx_queue);
394 /* The rx buffer allocation strategy is MTU dependent */
395 efx_rx_strategy(channel);
397 efx_for_each_channel_rx_queue(rx_queue, channel) {
398 rc = efx_init_rx_queue(rx_queue);
403 WARN_ON(channel->rx_pkt != NULL);
404 efx_rx_strategy(channel);
410 EFX_ERR(efx, "failed to initialise channel %d\n",
411 channel ? channel->channel : -1);
412 efx_fini_channels(efx);
416 /* This enables event queue processing and packet transmission.
418 * Note that this function is not allowed to fail, since that would
419 * introduce too much complexity into the suspend/resume path.
421 static void efx_start_channel(struct efx_channel *channel)
423 struct efx_rx_queue *rx_queue;
425 EFX_LOG(channel->efx, "starting chan %d\n", channel->channel);
427 if (!(channel->efx->net_dev->flags & IFF_UP))
428 netif_napi_add(channel->napi_dev, &channel->napi_str,
429 efx_poll, napi_weight);
431 /* The interrupt handler for this channel may set work_pending
432 * as soon as we enable it. Make sure it's cleared before
433 * then. Similarly, make sure it sees the enabled flag set. */
434 channel->work_pending = false;
435 channel->enabled = true;
438 napi_enable(&channel->napi_str);
440 /* Load up RX descriptors */
441 efx_for_each_channel_rx_queue(rx_queue, channel)
442 efx_fast_push_rx_descriptors(rx_queue);
445 /* This disables event queue processing and packet transmission.
446 * This function does not guarantee that all queue processing
447 * (e.g. RX refill) is complete.
449 static void efx_stop_channel(struct efx_channel *channel)
451 struct efx_rx_queue *rx_queue;
453 if (!channel->enabled)
456 EFX_LOG(channel->efx, "stop chan %d\n", channel->channel);
458 channel->enabled = false;
459 napi_disable(&channel->napi_str);
461 /* Ensure that any worker threads have exited or will be no-ops */
462 efx_for_each_channel_rx_queue(rx_queue, channel) {
463 spin_lock_bh(&rx_queue->add_lock);
464 spin_unlock_bh(&rx_queue->add_lock);
468 static void efx_fini_channels(struct efx_nic *efx)
470 struct efx_channel *channel;
471 struct efx_tx_queue *tx_queue;
472 struct efx_rx_queue *rx_queue;
474 EFX_ASSERT_RESET_SERIALISED(efx);
475 BUG_ON(efx->port_enabled);
477 efx_for_each_channel(channel, efx) {
478 EFX_LOG(channel->efx, "shut down chan %d\n", channel->channel);
480 efx_for_each_channel_rx_queue(rx_queue, channel)
481 efx_fini_rx_queue(rx_queue);
482 efx_for_each_channel_tx_queue(tx_queue, channel)
483 efx_fini_tx_queue(tx_queue);
486 /* Do the event queues last so that we can handle flush events
487 * for all DMA queues. */
488 efx_for_each_channel(channel, efx) {
489 EFX_LOG(channel->efx, "shut down evq %d\n", channel->channel);
491 efx_fini_eventq(channel);
495 static void efx_remove_channel(struct efx_channel *channel)
497 struct efx_tx_queue *tx_queue;
498 struct efx_rx_queue *rx_queue;
500 EFX_LOG(channel->efx, "destroy chan %d\n", channel->channel);
502 efx_for_each_channel_rx_queue(rx_queue, channel)
503 efx_remove_rx_queue(rx_queue);
504 efx_for_each_channel_tx_queue(tx_queue, channel)
505 efx_remove_tx_queue(tx_queue);
506 efx_remove_eventq(channel);
508 channel->used_flags = 0;
511 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue, int delay)
513 queue_delayed_work(refill_workqueue, &rx_queue->work, delay);
516 /**************************************************************************
520 **************************************************************************/
522 /* This ensures that the kernel is kept informed (via
523 * netif_carrier_on/off) of the link status, and also maintains the
524 * link status's stop on the port's TX queue.
526 static void efx_link_status_changed(struct efx_nic *efx)
528 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
529 * that no events are triggered between unregister_netdev() and the
530 * driver unloading. A more general condition is that NETDEV_CHANGE
531 * can only be generated between NETDEV_UP and NETDEV_DOWN */
532 if (!netif_running(efx->net_dev))
535 if (efx->link_up != netif_carrier_ok(efx->net_dev)) {
536 efx->n_link_state_changes++;
539 netif_carrier_on(efx->net_dev);
541 netif_carrier_off(efx->net_dev);
544 /* Status message for kernel log */
546 struct mii_if_info *gmii = &efx->mii;
548 /* NONE here means direct XAUI from the controller, with no
549 * MDIO-attached device we can query. */
550 if (efx->phy_type != PHY_TYPE_NONE) {
551 adv = gmii_advertised(gmii);
552 lpa = gmii_lpa(gmii);
554 lpa = GM_LPA_10000 | LPA_DUPLEX;
557 EFX_INFO(efx, "link up at %dMbps %s-duplex "
558 "(adv %04x lpa %04x) (MTU %d)%s\n",
559 (efx->link_options & GM_LPA_10000 ? 10000 :
560 (efx->link_options & GM_LPA_1000 ? 1000 :
561 (efx->link_options & GM_LPA_100 ? 100 :
563 (efx->link_options & GM_LPA_DUPLEX ?
567 (efx->promiscuous ? " [PROMISC]" : ""));
569 EFX_INFO(efx, "link down\n");
574 /* This call reinitialises the MAC to pick up new PHY settings. The
575 * caller must hold the mac_lock */
576 static void __efx_reconfigure_port(struct efx_nic *efx)
578 WARN_ON(!mutex_is_locked(&efx->mac_lock));
580 EFX_LOG(efx, "reconfiguring MAC from PHY settings on CPU %d\n",
581 raw_smp_processor_id());
583 falcon_reconfigure_xmac(efx);
585 /* Inform kernel of loss/gain of carrier */
586 efx_link_status_changed(efx);
589 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
591 void efx_reconfigure_port(struct efx_nic *efx)
593 EFX_ASSERT_RESET_SERIALISED(efx);
595 mutex_lock(&efx->mac_lock);
596 __efx_reconfigure_port(efx);
597 mutex_unlock(&efx->mac_lock);
600 /* Asynchronous efx_reconfigure_port work item. To speed up efx_flush_all()
601 * we don't efx_reconfigure_port() if the port is disabled. Care is taken
602 * in efx_stop_all() and efx_start_port() to prevent PHY events being lost */
603 static void efx_reconfigure_work(struct work_struct *data)
605 struct efx_nic *efx = container_of(data, struct efx_nic,
608 mutex_lock(&efx->mac_lock);
609 if (efx->port_enabled)
610 __efx_reconfigure_port(efx);
611 mutex_unlock(&efx->mac_lock);
614 static int efx_probe_port(struct efx_nic *efx)
618 EFX_LOG(efx, "create port\n");
620 /* Connect up MAC/PHY operations table and read MAC address */
621 rc = falcon_probe_port(efx);
625 /* Sanity check MAC address */
626 if (is_valid_ether_addr(efx->mac_address)) {
627 memcpy(efx->net_dev->dev_addr, efx->mac_address, ETH_ALEN);
629 DECLARE_MAC_BUF(mac);
631 EFX_ERR(efx, "invalid MAC address %s\n",
632 print_mac(mac, efx->mac_address));
633 if (!allow_bad_hwaddr) {
637 random_ether_addr(efx->net_dev->dev_addr);
638 EFX_INFO(efx, "using locally-generated MAC %s\n",
639 print_mac(mac, efx->net_dev->dev_addr));
645 efx_remove_port(efx);
649 static int efx_init_port(struct efx_nic *efx)
653 EFX_LOG(efx, "init port\n");
655 /* Initialise the MAC and PHY */
656 rc = falcon_init_xmac(efx);
660 efx->port_initialized = true;
662 /* Reconfigure port to program MAC registers */
663 falcon_reconfigure_xmac(efx);
668 /* Allow efx_reconfigure_port() to be scheduled, and close the window
669 * between efx_stop_port and efx_flush_all whereby a previously scheduled
670 * efx_reconfigure_port() may have been cancelled */
671 static void efx_start_port(struct efx_nic *efx)
673 EFX_LOG(efx, "start port\n");
674 BUG_ON(efx->port_enabled);
676 mutex_lock(&efx->mac_lock);
677 efx->port_enabled = true;
678 __efx_reconfigure_port(efx);
679 mutex_unlock(&efx->mac_lock);
682 /* Prevent efx_reconfigure_work and efx_monitor() from executing, and
683 * efx_set_multicast_list() from scheduling efx_reconfigure_work.
684 * efx_reconfigure_work can still be scheduled via NAPI processing
685 * until efx_flush_all() is called */
686 static void efx_stop_port(struct efx_nic *efx)
688 EFX_LOG(efx, "stop port\n");
690 mutex_lock(&efx->mac_lock);
691 efx->port_enabled = false;
692 mutex_unlock(&efx->mac_lock);
694 /* Serialise against efx_set_multicast_list() */
695 if (efx_dev_registered(efx)) {
696 netif_addr_lock_bh(efx->net_dev);
697 netif_addr_unlock_bh(efx->net_dev);
701 static void efx_fini_port(struct efx_nic *efx)
703 EFX_LOG(efx, "shut down port\n");
705 if (!efx->port_initialized)
708 falcon_fini_xmac(efx);
709 efx->port_initialized = false;
711 efx->link_up = false;
712 efx_link_status_changed(efx);
715 static void efx_remove_port(struct efx_nic *efx)
717 EFX_LOG(efx, "destroying port\n");
719 falcon_remove_port(efx);
722 /**************************************************************************
726 **************************************************************************/
728 /* This configures the PCI device to enable I/O and DMA. */
729 static int efx_init_io(struct efx_nic *efx)
731 struct pci_dev *pci_dev = efx->pci_dev;
732 dma_addr_t dma_mask = efx->type->max_dma_mask;
735 EFX_LOG(efx, "initialising I/O\n");
737 rc = pci_enable_device(pci_dev);
739 EFX_ERR(efx, "failed to enable PCI device\n");
743 pci_set_master(pci_dev);
745 /* Set the PCI DMA mask. Try all possibilities from our
746 * genuine mask down to 32 bits, because some architectures
747 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
748 * masks event though they reject 46 bit masks.
750 while (dma_mask > 0x7fffffffUL) {
751 if (pci_dma_supported(pci_dev, dma_mask) &&
752 ((rc = pci_set_dma_mask(pci_dev, dma_mask)) == 0))
757 EFX_ERR(efx, "could not find a suitable DMA mask\n");
760 EFX_LOG(efx, "using DMA mask %llx\n", (unsigned long long) dma_mask);
761 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
763 /* pci_set_consistent_dma_mask() is not *allowed* to
764 * fail with a mask that pci_set_dma_mask() accepted,
765 * but just in case...
767 EFX_ERR(efx, "failed to set consistent DMA mask\n");
771 efx->membase_phys = pci_resource_start(efx->pci_dev,
773 rc = pci_request_region(pci_dev, efx->type->mem_bar, "sfc");
775 EFX_ERR(efx, "request for memory BAR failed\n");
779 efx->membase = ioremap_nocache(efx->membase_phys,
780 efx->type->mem_map_size);
782 EFX_ERR(efx, "could not map memory BAR %d at %llx+%x\n",
784 (unsigned long long)efx->membase_phys,
785 efx->type->mem_map_size);
789 EFX_LOG(efx, "memory BAR %u at %llx+%x (virtual %p)\n",
790 efx->type->mem_bar, (unsigned long long)efx->membase_phys,
791 efx->type->mem_map_size, efx->membase);
796 release_mem_region(efx->membase_phys, efx->type->mem_map_size);
798 efx->membase_phys = 0;
800 pci_disable_device(efx->pci_dev);
805 static void efx_fini_io(struct efx_nic *efx)
807 EFX_LOG(efx, "shutting down I/O\n");
810 iounmap(efx->membase);
814 if (efx->membase_phys) {
815 pci_release_region(efx->pci_dev, efx->type->mem_bar);
816 efx->membase_phys = 0;
819 pci_disable_device(efx->pci_dev);
822 /* Probe the number and type of interrupts we are able to obtain. */
823 static void efx_probe_interrupts(struct efx_nic *efx)
825 int max_channel = efx->type->phys_addr_channels - 1;
826 struct msix_entry xentries[EFX_MAX_CHANNELS];
829 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
830 BUG_ON(!pci_find_capability(efx->pci_dev, PCI_CAP_ID_MSIX));
836 cpus_clear(core_mask);
838 for_each_online_cpu(cpu) {
839 if (!cpu_isset(cpu, core_mask)) {
841 cpus_or(core_mask, core_mask,
842 topology_core_siblings(cpu));
846 efx->rss_queues = rss_cpus;
849 efx->rss_queues = min(efx->rss_queues, max_channel + 1);
850 efx->rss_queues = min(efx->rss_queues, EFX_MAX_CHANNELS);
852 /* Request maximum number of MSI interrupts, and fill out
853 * the channel interrupt information the allowed allocation */
854 for (i = 0; i < efx->rss_queues; i++)
855 xentries[i].entry = i;
856 rc = pci_enable_msix(efx->pci_dev, xentries, efx->rss_queues);
858 EFX_BUG_ON_PARANOID(rc >= efx->rss_queues);
859 efx->rss_queues = rc;
860 rc = pci_enable_msix(efx->pci_dev, xentries,
865 for (i = 0; i < efx->rss_queues; i++) {
866 efx->channel[i].has_interrupt = true;
867 efx->channel[i].irq = xentries[i].vector;
870 /* Fall back to single channel MSI */
871 efx->interrupt_mode = EFX_INT_MODE_MSI;
872 EFX_ERR(efx, "could not enable MSI-X\n");
876 /* Try single interrupt MSI */
877 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
879 rc = pci_enable_msi(efx->pci_dev);
881 efx->channel[0].irq = efx->pci_dev->irq;
882 efx->channel[0].has_interrupt = true;
884 EFX_ERR(efx, "could not enable MSI\n");
885 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
889 /* Assume legacy interrupts */
890 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
892 /* Every channel is interruptible */
893 for (i = 0; i < EFX_MAX_CHANNELS; i++)
894 efx->channel[i].has_interrupt = true;
895 efx->legacy_irq = efx->pci_dev->irq;
899 static void efx_remove_interrupts(struct efx_nic *efx)
901 struct efx_channel *channel;
903 /* Remove MSI/MSI-X interrupts */
904 efx_for_each_channel_with_interrupt(channel, efx)
906 pci_disable_msi(efx->pci_dev);
907 pci_disable_msix(efx->pci_dev);
909 /* Remove legacy interrupt */
913 /* Select number of used resources
914 * Should be called after probe_interrupts()
916 static void efx_select_used(struct efx_nic *efx)
918 struct efx_tx_queue *tx_queue;
919 struct efx_rx_queue *rx_queue;
922 efx_for_each_tx_queue(tx_queue, efx) {
923 if (!EFX_INT_MODE_USE_MSI(efx) && separate_tx_and_rx_channels)
924 tx_queue->channel = &efx->channel[1];
926 tx_queue->channel = &efx->channel[0];
927 tx_queue->channel->used_flags |= EFX_USED_BY_TX;
930 /* RX queues. Each has a dedicated channel. */
931 for (i = 0; i < EFX_MAX_RX_QUEUES; i++) {
932 rx_queue = &efx->rx_queue[i];
934 if (i < efx->rss_queues) {
935 rx_queue->used = true;
936 /* If we allow multiple RX queues per channel
937 * we need to decide that here
939 rx_queue->channel = &efx->channel[rx_queue->queue];
940 rx_queue->channel->used_flags |= EFX_USED_BY_RX;
946 static int efx_probe_nic(struct efx_nic *efx)
950 EFX_LOG(efx, "creating NIC\n");
952 /* Carry out hardware-type specific initialisation */
953 rc = falcon_probe_nic(efx);
957 /* Determine the number of channels and RX queues by trying to hook
958 * in MSI-X interrupts. */
959 efx_probe_interrupts(efx);
961 /* Determine number of RX queues and TX queues */
962 efx_select_used(efx);
964 /* Initialise the interrupt moderation settings */
965 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec);
970 static void efx_remove_nic(struct efx_nic *efx)
972 EFX_LOG(efx, "destroying NIC\n");
974 efx_remove_interrupts(efx);
975 falcon_remove_nic(efx);
978 /**************************************************************************
980 * NIC startup/shutdown
982 *************************************************************************/
984 static int efx_probe_all(struct efx_nic *efx)
986 struct efx_channel *channel;
990 rc = efx_probe_nic(efx);
992 EFX_ERR(efx, "failed to create NIC\n");
997 rc = efx_probe_port(efx);
999 EFX_ERR(efx, "failed to create port\n");
1003 /* Create channels */
1004 efx_for_each_channel(channel, efx) {
1005 rc = efx_probe_channel(channel);
1007 EFX_ERR(efx, "failed to create channel %d\n",
1016 efx_for_each_channel(channel, efx)
1017 efx_remove_channel(channel);
1018 efx_remove_port(efx);
1020 efx_remove_nic(efx);
1025 /* Called after previous invocation(s) of efx_stop_all, restarts the
1026 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1027 * and ensures that the port is scheduled to be reconfigured.
1028 * This function is safe to call multiple times when the NIC is in any
1030 static void efx_start_all(struct efx_nic *efx)
1032 struct efx_channel *channel;
1034 EFX_ASSERT_RESET_SERIALISED(efx);
1036 /* Check that it is appropriate to restart the interface. All
1037 * of these flags are safe to read under just the rtnl lock */
1038 if (efx->port_enabled)
1040 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1042 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1045 /* Mark the port as enabled so port reconfigurations can start, then
1046 * restart the transmit interface early so the watchdog timer stops */
1047 efx_start_port(efx);
1048 efx_wake_queue(efx);
1050 efx_for_each_channel(channel, efx)
1051 efx_start_channel(channel);
1053 falcon_enable_interrupts(efx);
1055 /* Start hardware monitor if we're in RUNNING */
1056 if (efx->state == STATE_RUNNING)
1057 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1058 efx_monitor_interval);
1061 /* Flush all delayed work. Should only be called when no more delayed work
1062 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1063 * since we're holding the rtnl_lock at this point. */
1064 static void efx_flush_all(struct efx_nic *efx)
1066 struct efx_rx_queue *rx_queue;
1068 /* Make sure the hardware monitor is stopped */
1069 cancel_delayed_work_sync(&efx->monitor_work);
1071 /* Ensure that all RX slow refills are complete. */
1072 efx_for_each_rx_queue(rx_queue, efx)
1073 cancel_delayed_work_sync(&rx_queue->work);
1075 /* Stop scheduled port reconfigurations */
1076 cancel_work_sync(&efx->reconfigure_work);
1080 /* Quiesce hardware and software without bringing the link down.
1081 * Safe to call multiple times, when the nic and interface is in any
1082 * state. The caller is guaranteed to subsequently be in a position
1083 * to modify any hardware and software state they see fit without
1085 static void efx_stop_all(struct efx_nic *efx)
1087 struct efx_channel *channel;
1089 EFX_ASSERT_RESET_SERIALISED(efx);
1091 /* port_enabled can be read safely under the rtnl lock */
1092 if (!efx->port_enabled)
1095 /* Disable interrupts and wait for ISR to complete */
1096 falcon_disable_interrupts(efx);
1097 if (efx->legacy_irq)
1098 synchronize_irq(efx->legacy_irq);
1099 efx_for_each_channel_with_interrupt(channel, efx) {
1101 synchronize_irq(channel->irq);
1104 /* Stop all NAPI processing and synchronous rx refills */
1105 efx_for_each_channel(channel, efx)
1106 efx_stop_channel(channel);
1108 /* Stop all asynchronous port reconfigurations. Since all
1109 * event processing has already been stopped, there is no
1110 * window to loose phy events */
1113 /* Flush reconfigure_work, refill_workqueue, monitor_work */
1116 /* Isolate the MAC from the TX and RX engines, so that queue
1117 * flushes will complete in a timely fashion. */
1118 falcon_deconfigure_mac_wrapper(efx);
1119 falcon_drain_tx_fifo(efx);
1121 /* Stop the kernel transmit interface late, so the watchdog
1122 * timer isn't ticking over the flush */
1123 efx_stop_queue(efx);
1124 if (efx_dev_registered(efx)) {
1125 netif_tx_lock_bh(efx->net_dev);
1126 netif_tx_unlock_bh(efx->net_dev);
1130 static void efx_remove_all(struct efx_nic *efx)
1132 struct efx_channel *channel;
1134 efx_for_each_channel(channel, efx)
1135 efx_remove_channel(channel);
1136 efx_remove_port(efx);
1137 efx_remove_nic(efx);
1140 /* A convinience function to safely flush all the queues */
1141 int efx_flush_queues(struct efx_nic *efx)
1145 EFX_ASSERT_RESET_SERIALISED(efx);
1149 efx_fini_channels(efx);
1150 rc = efx_init_channels(efx);
1152 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
1161 /**************************************************************************
1163 * Interrupt moderation
1165 **************************************************************************/
1167 /* Set interrupt moderation parameters */
1168 void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs)
1170 struct efx_tx_queue *tx_queue;
1171 struct efx_rx_queue *rx_queue;
1173 EFX_ASSERT_RESET_SERIALISED(efx);
1175 efx_for_each_tx_queue(tx_queue, efx)
1176 tx_queue->channel->irq_moderation = tx_usecs;
1178 efx_for_each_rx_queue(rx_queue, efx)
1179 rx_queue->channel->irq_moderation = rx_usecs;
1182 /**************************************************************************
1186 **************************************************************************/
1188 /* Run periodically off the general workqueue. Serialised against
1189 * efx_reconfigure_port via the mac_lock */
1190 static void efx_monitor(struct work_struct *data)
1192 struct efx_nic *efx = container_of(data, struct efx_nic,
1196 EFX_TRACE(efx, "hardware monitor executing on CPU %d\n",
1197 raw_smp_processor_id());
1200 /* If the mac_lock is already held then it is likely a port
1201 * reconfiguration is already in place, which will likely do
1202 * most of the work of check_hw() anyway. */
1203 if (!mutex_trylock(&efx->mac_lock)) {
1204 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1205 efx_monitor_interval);
1209 if (efx->port_enabled)
1210 rc = falcon_check_xmac(efx);
1211 mutex_unlock(&efx->mac_lock);
1214 if (monitor_reset) {
1215 EFX_ERR(efx, "hardware monitor detected a fault: "
1216 "triggering reset\n");
1217 efx_schedule_reset(efx, RESET_TYPE_MONITOR);
1219 EFX_ERR(efx, "hardware monitor detected a fault, "
1220 "skipping reset\n");
1224 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1225 efx_monitor_interval);
1228 /**************************************************************************
1232 *************************************************************************/
1235 * Context: process, rtnl_lock() held.
1237 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1239 struct efx_nic *efx = netdev_priv(net_dev);
1241 EFX_ASSERT_RESET_SERIALISED(efx);
1243 return generic_mii_ioctl(&efx->mii, if_mii(ifr), cmd, NULL);
1246 /**************************************************************************
1250 **************************************************************************/
1252 static int efx_init_napi(struct efx_nic *efx)
1254 struct efx_channel *channel;
1257 efx_for_each_channel(channel, efx) {
1258 channel->napi_dev = efx->net_dev;
1259 rc = efx_lro_init(&channel->lro_mgr, efx);
1269 static void efx_fini_napi(struct efx_nic *efx)
1271 struct efx_channel *channel;
1273 efx_for_each_channel(channel, efx) {
1274 efx_lro_fini(&channel->lro_mgr);
1275 channel->napi_dev = NULL;
1279 /**************************************************************************
1281 * Kernel netpoll interface
1283 *************************************************************************/
1285 #ifdef CONFIG_NET_POLL_CONTROLLER
1287 /* Although in the common case interrupts will be disabled, this is not
1288 * guaranteed. However, all our work happens inside the NAPI callback,
1289 * so no locking is required.
1291 static void efx_netpoll(struct net_device *net_dev)
1293 struct efx_nic *efx = netdev_priv(net_dev);
1294 struct efx_channel *channel;
1296 efx_for_each_channel_with_interrupt(channel, efx)
1297 efx_schedule_channel(channel);
1302 /**************************************************************************
1304 * Kernel net device interface
1306 *************************************************************************/
1308 /* Context: process, rtnl_lock() held. */
1309 static int efx_net_open(struct net_device *net_dev)
1311 struct efx_nic *efx = netdev_priv(net_dev);
1312 EFX_ASSERT_RESET_SERIALISED(efx);
1314 EFX_LOG(efx, "opening device %s on CPU %d\n", net_dev->name,
1315 raw_smp_processor_id());
1321 /* Context: process, rtnl_lock() held.
1322 * Note that the kernel will ignore our return code; this method
1323 * should really be a void.
1325 static int efx_net_stop(struct net_device *net_dev)
1327 struct efx_nic *efx = netdev_priv(net_dev);
1330 EFX_LOG(efx, "closing %s on CPU %d\n", net_dev->name,
1331 raw_smp_processor_id());
1333 /* Stop the device and flush all the channels */
1335 efx_fini_channels(efx);
1336 rc = efx_init_channels(efx);
1338 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
1343 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1344 static struct net_device_stats *efx_net_stats(struct net_device *net_dev)
1346 struct efx_nic *efx = netdev_priv(net_dev);
1347 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1348 struct net_device_stats *stats = &net_dev->stats;
1350 /* Update stats if possible, but do not wait if another thread
1351 * is updating them (or resetting the NIC); slightly stale
1352 * stats are acceptable.
1354 if (!spin_trylock(&efx->stats_lock))
1356 if (efx->state == STATE_RUNNING) {
1357 falcon_update_stats_xmac(efx);
1358 falcon_update_nic_stats(efx);
1360 spin_unlock(&efx->stats_lock);
1362 stats->rx_packets = mac_stats->rx_packets;
1363 stats->tx_packets = mac_stats->tx_packets;
1364 stats->rx_bytes = mac_stats->rx_bytes;
1365 stats->tx_bytes = mac_stats->tx_bytes;
1366 stats->multicast = mac_stats->rx_multicast;
1367 stats->collisions = mac_stats->tx_collision;
1368 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1369 mac_stats->rx_length_error);
1370 stats->rx_over_errors = efx->n_rx_nodesc_drop_cnt;
1371 stats->rx_crc_errors = mac_stats->rx_bad;
1372 stats->rx_frame_errors = mac_stats->rx_align_error;
1373 stats->rx_fifo_errors = mac_stats->rx_overflow;
1374 stats->rx_missed_errors = mac_stats->rx_missed;
1375 stats->tx_window_errors = mac_stats->tx_late_collision;
1377 stats->rx_errors = (stats->rx_length_errors +
1378 stats->rx_over_errors +
1379 stats->rx_crc_errors +
1380 stats->rx_frame_errors +
1381 stats->rx_fifo_errors +
1382 stats->rx_missed_errors +
1383 mac_stats->rx_symbol_error);
1384 stats->tx_errors = (stats->tx_window_errors +
1390 /* Context: netif_tx_lock held, BHs disabled. */
1391 static void efx_watchdog(struct net_device *net_dev)
1393 struct efx_nic *efx = netdev_priv(net_dev);
1395 EFX_ERR(efx, "TX stuck with stop_count=%d port_enabled=%d: %s\n",
1396 atomic_read(&efx->netif_stop_count), efx->port_enabled,
1397 monitor_reset ? "resetting channels" : "skipping reset");
1400 efx_schedule_reset(efx, RESET_TYPE_MONITOR);
1404 /* Context: process, rtnl_lock() held. */
1405 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1407 struct efx_nic *efx = netdev_priv(net_dev);
1410 EFX_ASSERT_RESET_SERIALISED(efx);
1412 if (new_mtu > EFX_MAX_MTU)
1417 EFX_LOG(efx, "changing MTU to %d\n", new_mtu);
1419 efx_fini_channels(efx);
1420 net_dev->mtu = new_mtu;
1421 rc = efx_init_channels(efx);
1429 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
1433 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1435 struct efx_nic *efx = netdev_priv(net_dev);
1436 struct sockaddr *addr = data;
1437 char *new_addr = addr->sa_data;
1439 EFX_ASSERT_RESET_SERIALISED(efx);
1441 if (!is_valid_ether_addr(new_addr)) {
1442 DECLARE_MAC_BUF(mac);
1443 EFX_ERR(efx, "invalid ethernet MAC address requested: %s\n",
1444 print_mac(mac, new_addr));
1448 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1450 /* Reconfigure the MAC */
1451 efx_reconfigure_port(efx);
1456 /* Context: netif_tx_lock held, BHs disabled. */
1457 static void efx_set_multicast_list(struct net_device *net_dev)
1459 struct efx_nic *efx = netdev_priv(net_dev);
1460 struct dev_mc_list *mc_list = net_dev->mc_list;
1461 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1467 /* Set per-MAC promiscuity flag and reconfigure MAC if necessary */
1468 promiscuous = !!(net_dev->flags & IFF_PROMISC);
1469 if (efx->promiscuous != promiscuous) {
1470 efx->promiscuous = promiscuous;
1471 /* Close the window between efx_stop_port() and efx_flush_all()
1472 * by only queuing work when the port is enabled. */
1473 if (efx->port_enabled)
1474 queue_work(efx->workqueue, &efx->reconfigure_work);
1477 /* Build multicast hash table */
1478 if (promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1479 memset(mc_hash, 0xff, sizeof(*mc_hash));
1481 memset(mc_hash, 0x00, sizeof(*mc_hash));
1482 for (i = 0; i < net_dev->mc_count; i++) {
1483 crc = ether_crc_le(ETH_ALEN, mc_list->dmi_addr);
1484 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1485 set_bit_le(bit, mc_hash->byte);
1486 mc_list = mc_list->next;
1490 /* Create and activate new global multicast hash table */
1491 falcon_set_multicast_hash(efx);
1494 static int efx_netdev_event(struct notifier_block *this,
1495 unsigned long event, void *ptr)
1497 struct net_device *net_dev = ptr;
1499 if (net_dev->open == efx_net_open && event == NETDEV_CHANGENAME) {
1500 struct efx_nic *efx = netdev_priv(net_dev);
1502 strcpy(efx->name, net_dev->name);
1508 static struct notifier_block efx_netdev_notifier = {
1509 .notifier_call = efx_netdev_event,
1512 static int efx_register_netdev(struct efx_nic *efx)
1514 struct net_device *net_dev = efx->net_dev;
1517 net_dev->watchdog_timeo = 5 * HZ;
1518 net_dev->irq = efx->pci_dev->irq;
1519 net_dev->open = efx_net_open;
1520 net_dev->stop = efx_net_stop;
1521 net_dev->get_stats = efx_net_stats;
1522 net_dev->tx_timeout = &efx_watchdog;
1523 net_dev->hard_start_xmit = efx_hard_start_xmit;
1524 net_dev->do_ioctl = efx_ioctl;
1525 net_dev->change_mtu = efx_change_mtu;
1526 net_dev->set_mac_address = efx_set_mac_address;
1527 net_dev->set_multicast_list = efx_set_multicast_list;
1528 #ifdef CONFIG_NET_POLL_CONTROLLER
1529 net_dev->poll_controller = efx_netpoll;
1531 SET_NETDEV_DEV(net_dev, &efx->pci_dev->dev);
1532 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1534 /* Always start with carrier off; PHY events will detect the link */
1535 netif_carrier_off(efx->net_dev);
1537 /* Clear MAC statistics */
1538 falcon_update_stats_xmac(efx);
1539 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1541 rc = register_netdev(net_dev);
1543 EFX_ERR(efx, "could not register net dev\n");
1546 strcpy(efx->name, net_dev->name);
1551 static void efx_unregister_netdev(struct efx_nic *efx)
1553 struct efx_tx_queue *tx_queue;
1558 BUG_ON(netdev_priv(efx->net_dev) != efx);
1560 /* Free up any skbs still remaining. This has to happen before
1561 * we try to unregister the netdev as running their destructors
1562 * may be needed to get the device ref. count to 0. */
1563 efx_for_each_tx_queue(tx_queue, efx)
1564 efx_release_tx_buffers(tx_queue);
1566 if (efx_dev_registered(efx)) {
1567 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
1568 unregister_netdev(efx->net_dev);
1572 /**************************************************************************
1574 * Device reset and suspend
1576 **************************************************************************/
1578 /* The final hardware and software finalisation before reset. */
1579 static int efx_reset_down(struct efx_nic *efx, struct ethtool_cmd *ecmd)
1583 EFX_ASSERT_RESET_SERIALISED(efx);
1585 rc = falcon_xmac_get_settings(efx, ecmd);
1587 EFX_ERR(efx, "could not back up PHY settings\n");
1591 efx_fini_channels(efx);
1598 /* The first part of software initialisation after a hardware reset
1599 * This function does not handle serialisation with the kernel, it
1600 * assumes the caller has done this */
1601 static int efx_reset_up(struct efx_nic *efx, struct ethtool_cmd *ecmd)
1605 rc = efx_init_channels(efx);
1609 /* Restore MAC and PHY settings. */
1610 rc = falcon_xmac_set_settings(efx, ecmd);
1612 EFX_ERR(efx, "could not restore PHY settings\n");
1619 efx_fini_channels(efx);
1624 /* Reset the NIC as transparently as possible. Do not reset the PHY
1625 * Note that the reset may fail, in which case the card will be left
1626 * in a most-probably-unusable state.
1628 * This function will sleep. You cannot reset from within an atomic
1629 * state; use efx_schedule_reset() instead.
1631 * Grabs the rtnl_lock.
1633 static int efx_reset(struct efx_nic *efx)
1635 struct ethtool_cmd ecmd;
1636 enum reset_type method = efx->reset_pending;
1639 /* Serialise with kernel interfaces */
1642 /* If we're not RUNNING then don't reset. Leave the reset_pending
1643 * flag set so that efx_pci_probe_main will be retried */
1644 if (efx->state != STATE_RUNNING) {
1645 EFX_INFO(efx, "scheduled reset quenched. NIC not RUNNING\n");
1649 efx->state = STATE_RESETTING;
1650 EFX_INFO(efx, "resetting (%d)\n", method);
1652 /* The net_dev->get_stats handler is quite slow, and will fail
1653 * if a fetch is pending over reset. Serialise against it. */
1654 spin_lock(&efx->stats_lock);
1655 spin_unlock(&efx->stats_lock);
1658 mutex_lock(&efx->mac_lock);
1660 rc = efx_reset_down(efx, &ecmd);
1664 rc = falcon_reset_hw(efx, method);
1666 EFX_ERR(efx, "failed to reset hardware\n");
1670 /* Allow resets to be rescheduled. */
1671 efx->reset_pending = RESET_TYPE_NONE;
1673 /* Reinitialise bus-mastering, which may have been turned off before
1674 * the reset was scheduled. This is still appropriate, even in the
1675 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
1676 * can respond to requests. */
1677 pci_set_master(efx->pci_dev);
1679 /* Reinitialise device. This is appropriate in the RESET_TYPE_DISABLE
1680 * case so the driver can talk to external SRAM */
1681 rc = falcon_init_nic(efx);
1683 EFX_ERR(efx, "failed to initialise NIC\n");
1687 /* Leave device stopped if necessary */
1688 if (method == RESET_TYPE_DISABLE) {
1689 /* Reinitialise the device anyway so the driver unload sequence
1690 * can talk to the external SRAM */
1691 falcon_init_nic(efx);
1696 rc = efx_reset_up(efx, &ecmd);
1700 mutex_unlock(&efx->mac_lock);
1701 EFX_LOG(efx, "reset complete\n");
1703 efx->state = STATE_RUNNING;
1715 EFX_ERR(efx, "has been disabled\n");
1716 efx->state = STATE_DISABLED;
1718 mutex_unlock(&efx->mac_lock);
1720 efx_unregister_netdev(efx);
1725 /* The worker thread exists so that code that cannot sleep can
1726 * schedule a reset for later.
1728 static void efx_reset_work(struct work_struct *data)
1730 struct efx_nic *nic = container_of(data, struct efx_nic, reset_work);
1735 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
1737 enum reset_type method;
1739 if (efx->reset_pending != RESET_TYPE_NONE) {
1740 EFX_INFO(efx, "quenching already scheduled reset\n");
1745 case RESET_TYPE_INVISIBLE:
1746 case RESET_TYPE_ALL:
1747 case RESET_TYPE_WORLD:
1748 case RESET_TYPE_DISABLE:
1751 case RESET_TYPE_RX_RECOVERY:
1752 case RESET_TYPE_RX_DESC_FETCH:
1753 case RESET_TYPE_TX_DESC_FETCH:
1754 case RESET_TYPE_TX_SKIP:
1755 method = RESET_TYPE_INVISIBLE;
1758 method = RESET_TYPE_ALL;
1763 EFX_LOG(efx, "scheduling reset (%d:%d)\n", type, method);
1765 EFX_LOG(efx, "scheduling reset (%d)\n", method);
1767 efx->reset_pending = method;
1769 queue_work(efx->reset_workqueue, &efx->reset_work);
1772 /**************************************************************************
1774 * List of NICs we support
1776 **************************************************************************/
1778 /* PCI device ID table */
1779 static struct pci_device_id efx_pci_table[] __devinitdata = {
1780 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID),
1781 .driver_data = (unsigned long) &falcon_a_nic_type},
1782 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID),
1783 .driver_data = (unsigned long) &falcon_b_nic_type},
1784 {0} /* end of list */
1787 /**************************************************************************
1789 * Dummy PHY/MAC/Board operations
1791 * Can be used where the MAC does not implement this operation
1792 * Needed so all function pointers are valid and do not have to be tested
1795 **************************************************************************/
1796 int efx_port_dummy_op_int(struct efx_nic *efx)
1800 void efx_port_dummy_op_void(struct efx_nic *efx) {}
1801 void efx_port_dummy_op_blink(struct efx_nic *efx, bool blink) {}
1803 static struct efx_phy_operations efx_dummy_phy_operations = {
1804 .init = efx_port_dummy_op_int,
1805 .reconfigure = efx_port_dummy_op_void,
1806 .check_hw = efx_port_dummy_op_int,
1807 .fini = efx_port_dummy_op_void,
1808 .clear_interrupt = efx_port_dummy_op_void,
1809 .reset_xaui = efx_port_dummy_op_void,
1812 /* Dummy board operations */
1813 static int efx_nic_dummy_op_int(struct efx_nic *nic)
1818 static struct efx_board efx_dummy_board_info = {
1819 .init = efx_nic_dummy_op_int,
1820 .init_leds = efx_port_dummy_op_int,
1821 .set_fault_led = efx_port_dummy_op_blink,
1822 .fini = efx_port_dummy_op_void,
1825 /**************************************************************************
1829 **************************************************************************/
1831 /* This zeroes out and then fills in the invariants in a struct
1832 * efx_nic (including all sub-structures).
1834 static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
1835 struct pci_dev *pci_dev, struct net_device *net_dev)
1837 struct efx_channel *channel;
1838 struct efx_tx_queue *tx_queue;
1839 struct efx_rx_queue *rx_queue;
1842 /* Initialise common structures */
1843 memset(efx, 0, sizeof(*efx));
1844 spin_lock_init(&efx->biu_lock);
1845 spin_lock_init(&efx->phy_lock);
1846 INIT_WORK(&efx->reset_work, efx_reset_work);
1847 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
1848 efx->pci_dev = pci_dev;
1849 efx->state = STATE_INIT;
1850 efx->reset_pending = RESET_TYPE_NONE;
1851 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
1852 efx->board_info = efx_dummy_board_info;
1854 efx->net_dev = net_dev;
1855 efx->rx_checksum_enabled = true;
1856 spin_lock_init(&efx->netif_stop_lock);
1857 spin_lock_init(&efx->stats_lock);
1858 mutex_init(&efx->mac_lock);
1859 efx->phy_op = &efx_dummy_phy_operations;
1860 efx->mii.dev = net_dev;
1861 INIT_WORK(&efx->reconfigure_work, efx_reconfigure_work);
1862 atomic_set(&efx->netif_stop_count, 1);
1864 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
1865 channel = &efx->channel[i];
1867 channel->channel = i;
1868 channel->evqnum = i;
1869 channel->work_pending = false;
1871 for (i = 0; i < EFX_TX_QUEUE_COUNT; i++) {
1872 tx_queue = &efx->tx_queue[i];
1873 tx_queue->efx = efx;
1874 tx_queue->queue = i;
1875 tx_queue->buffer = NULL;
1876 tx_queue->channel = &efx->channel[0]; /* for safety */
1877 tx_queue->tso_headers_free = NULL;
1879 for (i = 0; i < EFX_MAX_RX_QUEUES; i++) {
1880 rx_queue = &efx->rx_queue[i];
1881 rx_queue->efx = efx;
1882 rx_queue->queue = i;
1883 rx_queue->channel = &efx->channel[0]; /* for safety */
1884 rx_queue->buffer = NULL;
1885 spin_lock_init(&rx_queue->add_lock);
1886 INIT_DELAYED_WORK(&rx_queue->work, efx_rx_work);
1891 /* Sanity-check NIC type */
1892 EFX_BUG_ON_PARANOID(efx->type->txd_ring_mask &
1893 (efx->type->txd_ring_mask + 1));
1894 EFX_BUG_ON_PARANOID(efx->type->rxd_ring_mask &
1895 (efx->type->rxd_ring_mask + 1));
1896 EFX_BUG_ON_PARANOID(efx->type->evq_size &
1897 (efx->type->evq_size - 1));
1898 /* As close as we can get to guaranteeing that we don't overflow */
1899 EFX_BUG_ON_PARANOID(efx->type->evq_size <
1900 (efx->type->txd_ring_mask + 1 +
1901 efx->type->rxd_ring_mask + 1));
1902 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
1904 /* Higher numbered interrupt modes are less capable! */
1905 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
1908 efx->workqueue = create_singlethread_workqueue("sfc_work");
1909 if (!efx->workqueue) {
1914 efx->reset_workqueue = create_singlethread_workqueue("sfc_reset");
1915 if (!efx->reset_workqueue) {
1923 destroy_workqueue(efx->workqueue);
1924 efx->workqueue = NULL;
1930 static void efx_fini_struct(struct efx_nic *efx)
1932 if (efx->reset_workqueue) {
1933 destroy_workqueue(efx->reset_workqueue);
1934 efx->reset_workqueue = NULL;
1936 if (efx->workqueue) {
1937 destroy_workqueue(efx->workqueue);
1938 efx->workqueue = NULL;
1942 /**************************************************************************
1946 **************************************************************************/
1948 /* Main body of final NIC shutdown code
1949 * This is called only at module unload (or hotplug removal).
1951 static void efx_pci_remove_main(struct efx_nic *efx)
1953 EFX_ASSERT_RESET_SERIALISED(efx);
1955 /* Skip everything if we never obtained a valid membase */
1959 efx_fini_channels(efx);
1962 /* Shutdown the board, then the NIC and board state */
1963 efx->board_info.fini(efx);
1964 falcon_fini_interrupt(efx);
1967 efx_remove_all(efx);
1970 /* Final NIC shutdown
1971 * This is called only at module unload (or hotplug removal).
1973 static void efx_pci_remove(struct pci_dev *pci_dev)
1975 struct efx_nic *efx;
1977 efx = pci_get_drvdata(pci_dev);
1981 /* Mark the NIC as fini, then stop the interface */
1983 efx->state = STATE_FINI;
1984 dev_close(efx->net_dev);
1986 /* Allow any queued efx_resets() to complete */
1989 if (efx->membase == NULL)
1992 efx_unregister_netdev(efx);
1994 /* Wait for any scheduled resets to complete. No more will be
1995 * scheduled from this point because efx_stop_all() has been
1996 * called, we are no longer registered with driverlink, and
1997 * the net_device's have been removed. */
1998 flush_workqueue(efx->reset_workqueue);
2000 efx_pci_remove_main(efx);
2004 EFX_LOG(efx, "shutdown successful\n");
2006 pci_set_drvdata(pci_dev, NULL);
2007 efx_fini_struct(efx);
2008 free_netdev(efx->net_dev);
2011 /* Main body of NIC initialisation
2012 * This is called at module load (or hotplug insertion, theoretically).
2014 static int efx_pci_probe_main(struct efx_nic *efx)
2018 /* Do start-of-day initialisation */
2019 rc = efx_probe_all(efx);
2023 rc = efx_init_napi(efx);
2027 /* Initialise the board */
2028 rc = efx->board_info.init(efx);
2030 EFX_ERR(efx, "failed to initialise board\n");
2034 rc = falcon_init_nic(efx);
2036 EFX_ERR(efx, "failed to initialise NIC\n");
2040 rc = efx_init_port(efx);
2042 EFX_ERR(efx, "failed to initialise port\n");
2046 rc = efx_init_channels(efx);
2050 rc = falcon_init_interrupt(efx);
2057 efx_fini_channels(efx);
2065 efx_remove_all(efx);
2070 /* NIC initialisation
2072 * This is called at module load (or hotplug insertion,
2073 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2074 * sets up and registers the network devices with the kernel and hooks
2075 * the interrupt service routine. It does not prepare the device for
2076 * transmission; this is left to the first time one of the network
2077 * interfaces is brought up (i.e. efx_net_open).
2079 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2080 const struct pci_device_id *entry)
2082 struct efx_nic_type *type = (struct efx_nic_type *) entry->driver_data;
2083 struct net_device *net_dev;
2084 struct efx_nic *efx;
2087 /* Allocate and initialise a struct net_device and struct efx_nic */
2088 net_dev = alloc_etherdev(sizeof(*efx));
2091 net_dev->features |= (NETIF_F_IP_CSUM | NETIF_F_SG |
2092 NETIF_F_HIGHDMA | NETIF_F_TSO);
2094 net_dev->features |= NETIF_F_LRO;
2095 /* Mask for features that also apply to VLAN devices */
2096 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2098 efx = netdev_priv(net_dev);
2099 pci_set_drvdata(pci_dev, efx);
2100 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2104 EFX_INFO(efx, "Solarflare Communications NIC detected\n");
2106 /* Set up basic I/O (BAR mappings etc) */
2107 rc = efx_init_io(efx);
2111 /* No serialisation is required with the reset path because
2112 * we're in STATE_INIT. */
2113 for (i = 0; i < 5; i++) {
2114 rc = efx_pci_probe_main(efx);
2118 /* Serialise against efx_reset(). No more resets will be
2119 * scheduled since efx_stop_all() has been called, and we
2120 * have not and never have been registered with either
2121 * the rtnetlink or driverlink layers. */
2122 flush_workqueue(efx->reset_workqueue);
2124 /* Retry if a recoverably reset event has been scheduled */
2125 if ((efx->reset_pending != RESET_TYPE_INVISIBLE) &&
2126 (efx->reset_pending != RESET_TYPE_ALL))
2129 efx->reset_pending = RESET_TYPE_NONE;
2133 EFX_ERR(efx, "Could not reset NIC\n");
2137 /* Switch to the running state before we expose the device to
2138 * the OS. This is to ensure that the initial gathering of
2139 * MAC stats succeeds. */
2141 efx->state = STATE_RUNNING;
2144 rc = efx_register_netdev(efx);
2148 EFX_LOG(efx, "initialisation successful\n");
2153 efx_pci_remove_main(efx);
2158 efx_fini_struct(efx);
2160 EFX_LOG(efx, "initialisation failed. rc=%d\n", rc);
2161 free_netdev(net_dev);
2165 static struct pci_driver efx_pci_driver = {
2166 .name = EFX_DRIVER_NAME,
2167 .id_table = efx_pci_table,
2168 .probe = efx_pci_probe,
2169 .remove = efx_pci_remove,
2172 /**************************************************************************
2174 * Kernel module interface
2176 *************************************************************************/
2178 module_param(interrupt_mode, uint, 0444);
2179 MODULE_PARM_DESC(interrupt_mode,
2180 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2182 static int __init efx_init_module(void)
2186 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2188 rc = register_netdevice_notifier(&efx_netdev_notifier);
2192 refill_workqueue = create_workqueue("sfc_refill");
2193 if (!refill_workqueue) {
2198 rc = pci_register_driver(&efx_pci_driver);
2205 destroy_workqueue(refill_workqueue);
2207 unregister_netdevice_notifier(&efx_netdev_notifier);
2212 static void __exit efx_exit_module(void)
2214 printk(KERN_INFO "Solarflare NET driver unloading\n");
2216 pci_unregister_driver(&efx_pci_driver);
2217 destroy_workqueue(refill_workqueue);
2218 unregister_netdevice_notifier(&efx_netdev_notifier);
2222 module_init(efx_init_module);
2223 module_exit(efx_exit_module);
2225 MODULE_AUTHOR("Michael Brown <mbrown@fensystems.co.uk> and "
2226 "Solarflare Communications");
2227 MODULE_DESCRIPTION("Solarflare Communications network driver");
2228 MODULE_LICENSE("GPL");
2229 MODULE_DEVICE_TABLE(pci, efx_pci_table);