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r8169: fix broken ring index handling in suspend/resume
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1 /*
2 =========================================================================
3  r8169.c: A RealTek RTL-8169 Gigabit Ethernet driver for Linux kernel 2.4.x.
4  --------------------------------------------------------------------
5
6  History:
7  Feb  4 2002    - created initially by ShuChen <shuchen@realtek.com.tw>.
8  May 20 2002    - Add link status force-mode and TBI mode support.
9         2004    - Massive updates. See kernel SCM system for details.
10 =========================================================================
11   1. [DEPRECATED: use ethtool instead] The media can be forced in 5 modes.
12          Command: 'insmod r8169 media = SET_MEDIA'
13          Ex:      'insmod r8169 media = 0x04' will force PHY to operate in 100Mpbs Half-duplex.
14         
15          SET_MEDIA can be:
16                 _10_Half        = 0x01
17                 _10_Full        = 0x02
18                 _100_Half       = 0x04
19                 _100_Full       = 0x08
20                 _1000_Full      = 0x10
21   
22   2. Support TBI mode.
23 =========================================================================
24 VERSION 1.1     <2002/10/4>
25
26         The bit4:0 of MII register 4 is called "selector field", and have to be
27         00001b to indicate support of IEEE std 802.3 during NWay process of
28         exchanging Link Code Word (FLP). 
29
30 VERSION 1.2     <2002/11/30>
31
32         - Large style cleanup
33         - Use ether_crc in stock kernel (linux/crc32.h)
34         - Copy mc_filter setup code from 8139cp
35           (includes an optimization, and avoids set_bit use)
36
37 VERSION 1.6LK   <2004/04/14>
38
39         - Merge of Realtek's version 1.6
40         - Conversion to DMA API
41         - Suspend/resume
42         - Endianness
43         - Misc Rx/Tx bugs
44
45 VERSION 2.2LK   <2005/01/25>
46
47         - RX csum, TX csum/SG, TSO
48         - VLAN
49         - baby (< 7200) Jumbo frames support
50         - Merge of Realtek's version 2.2 (new phy)
51  */
52
53 #include <linux/module.h>
54 #include <linux/moduleparam.h>
55 #include <linux/pci.h>
56 #include <linux/netdevice.h>
57 #include <linux/etherdevice.h>
58 #include <linux/delay.h>
59 #include <linux/ethtool.h>
60 #include <linux/mii.h>
61 #include <linux/if_vlan.h>
62 #include <linux/crc32.h>
63 #include <linux/in.h>
64 #include <linux/ip.h>
65 #include <linux/tcp.h>
66 #include <linux/init.h>
67 #include <linux/dma-mapping.h>
68
69 #include <asm/io.h>
70 #include <asm/irq.h>
71
72 #ifdef CONFIG_R8169_NAPI
73 #define NAPI_SUFFIX     "-NAPI"
74 #else
75 #define NAPI_SUFFIX     ""
76 #endif
77
78 #define RTL8169_VERSION "2.2LK" NAPI_SUFFIX
79 #define MODULENAME "r8169"
80 #define PFX MODULENAME ": "
81
82 #ifdef RTL8169_DEBUG
83 #define assert(expr) \
84         if(!(expr)) {                                   \
85                 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
86                 #expr,__FILE__,__FUNCTION__,__LINE__);          \
87         }
88 #define dprintk(fmt, args...)   do { printk(PFX fmt, ## args); } while (0)
89 #else
90 #define assert(expr) do {} while (0)
91 #define dprintk(fmt, args...)   do {} while (0)
92 #endif /* RTL8169_DEBUG */
93
94 #define R8169_MSG_DEFAULT \
95         (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
96
97 #define TX_BUFFS_AVAIL(tp) \
98         (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1)
99
100 #ifdef CONFIG_R8169_NAPI
101 #define rtl8169_rx_skb                  netif_receive_skb
102 #define rtl8169_rx_hwaccel_skb          vlan_hwaccel_receive_skb
103 #define rtl8169_rx_quota(count, quota)  min(count, quota)
104 #else
105 #define rtl8169_rx_skb                  netif_rx
106 #define rtl8169_rx_hwaccel_skb          vlan_hwaccel_rx
107 #define rtl8169_rx_quota(count, quota)  count
108 #endif
109
110 /* media options */
111 #define MAX_UNITS 8
112 static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };
113 static int num_media = 0;
114
115 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
116 static int max_interrupt_work = 20;
117
118 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
119    The RTL chips use a 64 element hash table based on the Ethernet CRC. */
120 static int multicast_filter_limit = 32;
121
122 /* MAC address length */
123 #define MAC_ADDR_LEN    6
124
125 #define RX_FIFO_THRESH  7       /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
126 #define RX_DMA_BURST    6       /* Maximum PCI burst, '6' is 1024 */
127 #define TX_DMA_BURST    6       /* Maximum PCI burst, '6' is 1024 */
128 #define EarlyTxThld     0x3F    /* 0x3F means NO early transmit */
129 #define RxPacketMaxSize 0x3FE8  /* 16K - 1 - ETH_HLEN - VLAN - CRC... */
130 #define SafeMtu         0x1c20  /* ... actually life sucks beyond ~7k */
131 #define InterFrameGap   0x03    /* 3 means InterFrameGap = the shortest one */
132
133 #define R8169_REGS_SIZE         256
134 #define R8169_NAPI_WEIGHT       64
135 #define NUM_TX_DESC     64      /* Number of Tx descriptor registers */
136 #define NUM_RX_DESC     256     /* Number of Rx descriptor registers */
137 #define RX_BUF_SIZE     1536    /* Rx Buffer size */
138 #define R8169_TX_RING_BYTES     (NUM_TX_DESC * sizeof(struct TxDesc))
139 #define R8169_RX_RING_BYTES     (NUM_RX_DESC * sizeof(struct RxDesc))
140
141 #define RTL8169_TX_TIMEOUT      (6*HZ)
142 #define RTL8169_PHY_TIMEOUT     (10*HZ)
143
144 /* write/read MMIO register */
145 #define RTL_W8(reg, val8)       writeb ((val8), ioaddr + (reg))
146 #define RTL_W16(reg, val16)     writew ((val16), ioaddr + (reg))
147 #define RTL_W32(reg, val32)     writel ((val32), ioaddr + (reg))
148 #define RTL_R8(reg)             readb (ioaddr + (reg))
149 #define RTL_R16(reg)            readw (ioaddr + (reg))
150 #define RTL_R32(reg)            ((unsigned long) readl (ioaddr + (reg)))
151
152 enum mac_version {
153         RTL_GIGA_MAC_VER_B = 0x00,
154         /* RTL_GIGA_MAC_VER_C = 0x03, */
155         RTL_GIGA_MAC_VER_D = 0x01,
156         RTL_GIGA_MAC_VER_E = 0x02,
157         RTL_GIGA_MAC_VER_X = 0x04       /* Greater than RTL_GIGA_MAC_VER_E */
158 };
159
160 enum phy_version {
161         RTL_GIGA_PHY_VER_C = 0x03, /* PHY Reg 0x03 bit0-3 == 0x0000 */
162         RTL_GIGA_PHY_VER_D = 0x04, /* PHY Reg 0x03 bit0-3 == 0x0000 */
163         RTL_GIGA_PHY_VER_E = 0x05, /* PHY Reg 0x03 bit0-3 == 0x0000 */
164         RTL_GIGA_PHY_VER_F = 0x06, /* PHY Reg 0x03 bit0-3 == 0x0001 */
165         RTL_GIGA_PHY_VER_G = 0x07, /* PHY Reg 0x03 bit0-3 == 0x0002 */
166         RTL_GIGA_PHY_VER_H = 0x08, /* PHY Reg 0x03 bit0-3 == 0x0003 */
167 };
168
169
170 #define _R(NAME,MAC,MASK) \
171         { .name = NAME, .mac_version = MAC, .RxConfigMask = MASK }
172
173 static const struct {
174         const char *name;
175         u8 mac_version;
176         u32 RxConfigMask;       /* Clears the bits supported by this chip */
177 } rtl_chip_info[] = {
178         _R("RTL8169",           RTL_GIGA_MAC_VER_B, 0xff7e1880),
179         _R("RTL8169s/8110s",    RTL_GIGA_MAC_VER_D, 0xff7e1880),
180         _R("RTL8169s/8110s",    RTL_GIGA_MAC_VER_E, 0xff7e1880),
181         _R("RTL8169s/8110s",    RTL_GIGA_MAC_VER_X, 0xff7e1880),
182 };
183 #undef _R
184
185 static struct pci_device_id rtl8169_pci_tbl[] = {
186         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8169), },
187         { PCI_DEVICE(PCI_VENDOR_ID_DLINK,       0x4300), },
188         { PCI_DEVICE(0x16ec,                    0x0116), },
189         { PCI_VENDOR_ID_LINKSYS,                0x1032, PCI_ANY_ID, 0x0024, },
190         {0,},
191 };
192
193 MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl);
194
195 static int rx_copybreak = 200;
196 static int use_dac;
197 static struct {
198         u32 msg_enable;
199 } debug = { -1 };
200
201 enum RTL8169_registers {
202         MAC0 = 0,               /* Ethernet hardware address. */
203         MAR0 = 8,               /* Multicast filter. */
204         CounterAddrLow = 0x10,
205         CounterAddrHigh = 0x14,
206         TxDescStartAddrLow = 0x20,
207         TxDescStartAddrHigh = 0x24,
208         TxHDescStartAddrLow = 0x28,
209         TxHDescStartAddrHigh = 0x2c,
210         FLASH = 0x30,
211         ERSR = 0x36,
212         ChipCmd = 0x37,
213         TxPoll = 0x38,
214         IntrMask = 0x3C,
215         IntrStatus = 0x3E,
216         TxConfig = 0x40,
217         RxConfig = 0x44,
218         RxMissed = 0x4C,
219         Cfg9346 = 0x50,
220         Config0 = 0x51,
221         Config1 = 0x52,
222         Config2 = 0x53,
223         Config3 = 0x54,
224         Config4 = 0x55,
225         Config5 = 0x56,
226         MultiIntr = 0x5C,
227         PHYAR = 0x60,
228         TBICSR = 0x64,
229         TBI_ANAR = 0x68,
230         TBI_LPAR = 0x6A,
231         PHYstatus = 0x6C,
232         RxMaxSize = 0xDA,
233         CPlusCmd = 0xE0,
234         IntrMitigate = 0xE2,
235         RxDescAddrLow = 0xE4,
236         RxDescAddrHigh = 0xE8,
237         EarlyTxThres = 0xEC,
238         FuncEvent = 0xF0,
239         FuncEventMask = 0xF4,
240         FuncPresetState = 0xF8,
241         FuncForceEvent = 0xFC,
242 };
243
244 enum RTL8169_register_content {
245         /* InterruptStatusBits */
246         SYSErr = 0x8000,
247         PCSTimeout = 0x4000,
248         SWInt = 0x0100,
249         TxDescUnavail = 0x80,
250         RxFIFOOver = 0x40,
251         LinkChg = 0x20,
252         RxOverflow = 0x10,
253         TxErr = 0x08,
254         TxOK = 0x04,
255         RxErr = 0x02,
256         RxOK = 0x01,
257
258         /* RxStatusDesc */
259         RxRES = 0x00200000,
260         RxCRC = 0x00080000,
261         RxRUNT = 0x00100000,
262         RxRWT = 0x00400000,
263
264         /* ChipCmdBits */
265         CmdReset = 0x10,
266         CmdRxEnb = 0x08,
267         CmdTxEnb = 0x04,
268         RxBufEmpty = 0x01,
269
270         /* Cfg9346Bits */
271         Cfg9346_Lock = 0x00,
272         Cfg9346_Unlock = 0xC0,
273
274         /* rx_mode_bits */
275         AcceptErr = 0x20,
276         AcceptRunt = 0x10,
277         AcceptBroadcast = 0x08,
278         AcceptMulticast = 0x04,
279         AcceptMyPhys = 0x02,
280         AcceptAllPhys = 0x01,
281
282         /* RxConfigBits */
283         RxCfgFIFOShift = 13,
284         RxCfgDMAShift = 8,
285
286         /* TxConfigBits */
287         TxInterFrameGapShift = 24,
288         TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
289
290         /* Config1 register p.24 */
291         PMEnable        = (1 << 0),     /* Power Management Enable */
292
293         /* Config5 register p.27 */
294         PMEStatus       = (1 << 0),     /* PME status can be reset by PCI RST# */
295
296         /* TBICSR p.28 */
297         TBIReset        = 0x80000000,
298         TBILoopback     = 0x40000000,
299         TBINwEnable     = 0x20000000,
300         TBINwRestart    = 0x10000000,
301         TBILinkOk       = 0x02000000,
302         TBINwComplete   = 0x01000000,
303
304         /* CPlusCmd p.31 */
305         RxVlan          = (1 << 6),
306         RxChkSum        = (1 << 5),
307         PCIDAC          = (1 << 4),
308         PCIMulRW        = (1 << 3),
309
310         /* rtl8169_PHYstatus */
311         TBI_Enable = 0x80,
312         TxFlowCtrl = 0x40,
313         RxFlowCtrl = 0x20,
314         _1000bpsF = 0x10,
315         _100bps = 0x08,
316         _10bps = 0x04,
317         LinkStatus = 0x02,
318         FullDup = 0x01,
319
320         /* GIGABIT_PHY_registers */
321         PHY_CTRL_REG = 0,
322         PHY_STAT_REG = 1,
323         PHY_AUTO_NEGO_REG = 4,
324         PHY_1000_CTRL_REG = 9,
325
326         /* GIGABIT_PHY_REG_BIT */
327         PHY_Restart_Auto_Nego = 0x0200,
328         PHY_Enable_Auto_Nego = 0x1000,
329
330         /* PHY_STAT_REG = 1 */
331         PHY_Auto_Neco_Comp = 0x0020,
332
333         /* PHY_AUTO_NEGO_REG = 4 */
334         PHY_Cap_10_Half = 0x0020,
335         PHY_Cap_10_Full = 0x0040,
336         PHY_Cap_100_Half = 0x0080,
337         PHY_Cap_100_Full = 0x0100,
338
339         /* PHY_1000_CTRL_REG = 9 */
340         PHY_Cap_1000_Full = 0x0200,
341
342         PHY_Cap_Null = 0x0,
343
344         /* _MediaType */
345         _10_Half = 0x01,
346         _10_Full = 0x02,
347         _100_Half = 0x04,
348         _100_Full = 0x08,
349         _1000_Full = 0x10,
350
351         /* _TBICSRBit */
352         TBILinkOK = 0x02000000,
353
354         /* DumpCounterCommand */
355         CounterDump = 0x8,
356 };
357
358 enum _DescStatusBit {
359         DescOwn         = (1 << 31), /* Descriptor is owned by NIC */
360         RingEnd         = (1 << 30), /* End of descriptor ring */
361         FirstFrag       = (1 << 29), /* First segment of a packet */
362         LastFrag        = (1 << 28), /* Final segment of a packet */
363
364         /* Tx private */
365         LargeSend       = (1 << 27), /* TCP Large Send Offload (TSO) */
366         MSSShift        = 16,        /* MSS value position */
367         MSSMask         = 0xfff,     /* MSS value + LargeSend bit: 12 bits */
368         IPCS            = (1 << 18), /* Calculate IP checksum */
369         UDPCS           = (1 << 17), /* Calculate UDP/IP checksum */
370         TCPCS           = (1 << 16), /* Calculate TCP/IP checksum */
371         TxVlanTag       = (1 << 17), /* Add VLAN tag */
372
373         /* Rx private */
374         PID1            = (1 << 18), /* Protocol ID bit 1/2 */
375         PID0            = (1 << 17), /* Protocol ID bit 2/2 */
376
377 #define RxProtoUDP      (PID1)
378 #define RxProtoTCP      (PID0)
379 #define RxProtoIP       (PID1 | PID0)
380 #define RxProtoMask     RxProtoIP
381
382         IPFail          = (1 << 16), /* IP checksum failed */
383         UDPFail         = (1 << 15), /* UDP/IP checksum failed */
384         TCPFail         = (1 << 14), /* TCP/IP checksum failed */
385         RxVlanTag       = (1 << 16), /* VLAN tag available */
386 };
387
388 #define RsvdMask        0x3fffc000
389
390 struct TxDesc {
391         u32 opts1;
392         u32 opts2;
393         u64 addr;
394 };
395
396 struct RxDesc {
397         u32 opts1;
398         u32 opts2;
399         u64 addr;
400 };
401
402 struct ring_info {
403         struct sk_buff  *skb;
404         u32             len;
405         u8              __pad[sizeof(void *) - sizeof(u32)];
406 };
407
408 struct rtl8169_private {
409         void __iomem *mmio_addr;        /* memory map physical address */
410         struct pci_dev *pci_dev;        /* Index of PCI device */
411         struct net_device_stats stats;  /* statistics of net device */
412         spinlock_t lock;                /* spin lock flag */
413         u32 msg_enable;
414         int chipset;
415         int mac_version;
416         int phy_version;
417         u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
418         u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
419         u32 dirty_rx;
420         u32 dirty_tx;
421         struct TxDesc *TxDescArray;     /* 256-aligned Tx descriptor ring */
422         struct RxDesc *RxDescArray;     /* 256-aligned Rx descriptor ring */
423         dma_addr_t TxPhyAddr;
424         dma_addr_t RxPhyAddr;
425         struct sk_buff *Rx_skbuff[NUM_RX_DESC]; /* Rx data buffers */
426         struct ring_info tx_skb[NUM_TX_DESC];   /* Tx data buffers */
427         unsigned rx_buf_sz;
428         struct timer_list timer;
429         u16 cp_cmd;
430         u16 intr_mask;
431         int phy_auto_nego_reg;
432         int phy_1000_ctrl_reg;
433 #ifdef CONFIG_R8169_VLAN
434         struct vlan_group *vlgrp;
435 #endif
436         int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex);
437         void (*get_settings)(struct net_device *, struct ethtool_cmd *);
438         void (*phy_reset_enable)(void __iomem *);
439         unsigned int (*phy_reset_pending)(void __iomem *);
440         unsigned int (*link_ok)(void __iomem *);
441         struct work_struct task;
442 };
443
444 MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>");
445 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
446 module_param_array(media, int, &num_media, 0);
447 MODULE_PARM_DESC(media, "force phy operation. Deprecated by ethtool (8).");
448 module_param(rx_copybreak, int, 0);
449 MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
450 module_param(use_dac, int, 0);
451 MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
452 module_param_named(debug, debug.msg_enable, int, 0);
453 MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
454 MODULE_LICENSE("GPL");
455 MODULE_VERSION(RTL8169_VERSION);
456
457 static int rtl8169_open(struct net_device *dev);
458 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev);
459 static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance,
460                               struct pt_regs *regs);
461 static int rtl8169_init_ring(struct net_device *dev);
462 static void rtl8169_hw_start(struct net_device *dev);
463 static int rtl8169_close(struct net_device *dev);
464 static void rtl8169_set_rx_mode(struct net_device *dev);
465 static void rtl8169_tx_timeout(struct net_device *dev);
466 static struct net_device_stats *rtl8169_get_stats(struct net_device *dev);
467 static int rtl8169_rx_interrupt(struct net_device *, struct rtl8169_private *,
468                                 void __iomem *);
469 static int rtl8169_change_mtu(struct net_device *dev, int new_mtu);
470 static void rtl8169_down(struct net_device *dev);
471
472 #ifdef CONFIG_R8169_NAPI
473 static int rtl8169_poll(struct net_device *dev, int *budget);
474 #endif
475
476 static const u16 rtl8169_intr_mask =
477         SYSErr | LinkChg | RxOverflow | RxFIFOOver | TxErr | TxOK | RxErr | RxOK;
478 static const u16 rtl8169_napi_event =
479         RxOK | RxOverflow | RxFIFOOver | TxOK | TxErr;
480 static const unsigned int rtl8169_rx_config =
481     (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift);
482
483 #define PHY_Cap_10_Half_Or_Less PHY_Cap_10_Half
484 #define PHY_Cap_10_Full_Or_Less PHY_Cap_10_Full | PHY_Cap_10_Half_Or_Less
485 #define PHY_Cap_100_Half_Or_Less PHY_Cap_100_Half | PHY_Cap_10_Full_Or_Less
486 #define PHY_Cap_100_Full_Or_Less PHY_Cap_100_Full | PHY_Cap_100_Half_Or_Less
487
488 static void mdio_write(void __iomem *ioaddr, int RegAddr, int value)
489 {
490         int i;
491
492         RTL_W32(PHYAR, 0x80000000 | (RegAddr & 0xFF) << 16 | value);
493
494         for (i = 20; i > 0; i--) {
495                 /* Check if the RTL8169 has completed writing to the specified MII register */
496                 if (!(RTL_R32(PHYAR) & 0x80000000)) 
497                         break;
498                 udelay(25);
499         }
500 }
501
502 static int mdio_read(void __iomem *ioaddr, int RegAddr)
503 {
504         int i, value = -1;
505
506         RTL_W32(PHYAR, 0x0 | (RegAddr & 0xFF) << 16);
507
508         for (i = 20; i > 0; i--) {
509                 /* Check if the RTL8169 has completed retrieving data from the specified MII register */
510                 if (RTL_R32(PHYAR) & 0x80000000) {
511                         value = (int) (RTL_R32(PHYAR) & 0xFFFF);
512                         break;
513                 }
514                 udelay(25);
515         }
516         return value;
517 }
518
519 static void rtl8169_irq_mask_and_ack(void __iomem *ioaddr)
520 {
521         RTL_W16(IntrMask, 0x0000);
522
523         RTL_W16(IntrStatus, 0xffff);
524 }
525
526 static void rtl8169_asic_down(void __iomem *ioaddr)
527 {
528         RTL_W8(ChipCmd, 0x00);
529         rtl8169_irq_mask_and_ack(ioaddr);
530         RTL_R16(CPlusCmd);
531 }
532
533 static unsigned int rtl8169_tbi_reset_pending(void __iomem *ioaddr)
534 {
535         return RTL_R32(TBICSR) & TBIReset;
536 }
537
538 static unsigned int rtl8169_xmii_reset_pending(void __iomem *ioaddr)
539 {
540         return mdio_read(ioaddr, 0) & 0x8000;
541 }
542
543 static unsigned int rtl8169_tbi_link_ok(void __iomem *ioaddr)
544 {
545         return RTL_R32(TBICSR) & TBILinkOk;
546 }
547
548 static unsigned int rtl8169_xmii_link_ok(void __iomem *ioaddr)
549 {
550         return RTL_R8(PHYstatus) & LinkStatus;
551 }
552
553 static void rtl8169_tbi_reset_enable(void __iomem *ioaddr)
554 {
555         RTL_W32(TBICSR, RTL_R32(TBICSR) | TBIReset);
556 }
557
558 static void rtl8169_xmii_reset_enable(void __iomem *ioaddr)
559 {
560         unsigned int val;
561
562         val = (mdio_read(ioaddr, PHY_CTRL_REG) | 0x8000) & 0xffff;
563         mdio_write(ioaddr, PHY_CTRL_REG, val);
564 }
565
566 static void rtl8169_check_link_status(struct net_device *dev,
567                                       struct rtl8169_private *tp, void __iomem *ioaddr)
568 {
569         unsigned long flags;
570
571         spin_lock_irqsave(&tp->lock, flags);
572         if (tp->link_ok(ioaddr)) {
573                 netif_carrier_on(dev);
574                 if (netif_msg_ifup(tp))
575                         printk(KERN_INFO PFX "%s: link up\n", dev->name);
576         } else {
577                 if (netif_msg_ifdown(tp))
578                         printk(KERN_INFO PFX "%s: link down\n", dev->name);
579                 netif_carrier_off(dev);
580         }
581         spin_unlock_irqrestore(&tp->lock, flags);
582 }
583
584 static void rtl8169_link_option(int idx, u8 *autoneg, u16 *speed, u8 *duplex)
585 {
586         struct {
587                 u16 speed;
588                 u8 duplex;
589                 u8 autoneg;
590                 u8 media;
591         } link_settings[] = {
592                 { SPEED_10,     DUPLEX_HALF, AUTONEG_DISABLE,   _10_Half },
593                 { SPEED_10,     DUPLEX_FULL, AUTONEG_DISABLE,   _10_Full },
594                 { SPEED_100,    DUPLEX_HALF, AUTONEG_DISABLE,   _100_Half },
595                 { SPEED_100,    DUPLEX_FULL, AUTONEG_DISABLE,   _100_Full },
596                 { SPEED_1000,   DUPLEX_FULL, AUTONEG_DISABLE,   _1000_Full },
597                 /* Make TBI happy */
598                 { SPEED_1000,   DUPLEX_FULL, AUTONEG_ENABLE,    0xff }
599         }, *p;
600         unsigned char option;
601         
602         option = ((idx < MAX_UNITS) && (idx >= 0)) ? media[idx] : 0xff;
603
604         if ((option != 0xff) && !idx && netif_msg_drv(&debug))
605                 printk(KERN_WARNING PFX "media option is deprecated.\n");
606
607         for (p = link_settings; p->media != 0xff; p++) {
608                 if (p->media == option)
609                         break;
610         }
611         *autoneg = p->autoneg;
612         *speed = p->speed;
613         *duplex = p->duplex;
614 }
615
616 static void rtl8169_get_drvinfo(struct net_device *dev,
617                                 struct ethtool_drvinfo *info)
618 {
619         struct rtl8169_private *tp = netdev_priv(dev);
620
621         strcpy(info->driver, MODULENAME);
622         strcpy(info->version, RTL8169_VERSION);
623         strcpy(info->bus_info, pci_name(tp->pci_dev));
624 }
625
626 static int rtl8169_get_regs_len(struct net_device *dev)
627 {
628         return R8169_REGS_SIZE;
629 }
630
631 static int rtl8169_set_speed_tbi(struct net_device *dev,
632                                  u8 autoneg, u16 speed, u8 duplex)
633 {
634         struct rtl8169_private *tp = netdev_priv(dev);
635         void __iomem *ioaddr = tp->mmio_addr;
636         int ret = 0;
637         u32 reg;
638
639         reg = RTL_R32(TBICSR);
640         if ((autoneg == AUTONEG_DISABLE) && (speed == SPEED_1000) &&
641             (duplex == DUPLEX_FULL)) {
642                 RTL_W32(TBICSR, reg & ~(TBINwEnable | TBINwRestart));
643         } else if (autoneg == AUTONEG_ENABLE)
644                 RTL_W32(TBICSR, reg | TBINwEnable | TBINwRestart);
645         else {
646                 if (netif_msg_link(tp)) {
647                         printk(KERN_WARNING "%s: "
648                                "incorrect speed setting refused in TBI mode\n",
649                                dev->name);
650                 }
651                 ret = -EOPNOTSUPP;
652         }
653
654         return ret;
655 }
656
657 static int rtl8169_set_speed_xmii(struct net_device *dev,
658                                   u8 autoneg, u16 speed, u8 duplex)
659 {
660         struct rtl8169_private *tp = netdev_priv(dev);
661         void __iomem *ioaddr = tp->mmio_addr;
662         int auto_nego, giga_ctrl;
663
664         auto_nego = mdio_read(ioaddr, PHY_AUTO_NEGO_REG);
665         auto_nego &= ~(PHY_Cap_10_Half | PHY_Cap_10_Full |
666                        PHY_Cap_100_Half | PHY_Cap_100_Full);
667         giga_ctrl = mdio_read(ioaddr, PHY_1000_CTRL_REG);
668         giga_ctrl &= ~(PHY_Cap_1000_Full | PHY_Cap_Null);
669
670         if (autoneg == AUTONEG_ENABLE) {
671                 auto_nego |= (PHY_Cap_10_Half | PHY_Cap_10_Full |
672                               PHY_Cap_100_Half | PHY_Cap_100_Full);
673                 giga_ctrl |= PHY_Cap_1000_Full;
674         } else {
675                 if (speed == SPEED_10)
676                         auto_nego |= PHY_Cap_10_Half | PHY_Cap_10_Full;
677                 else if (speed == SPEED_100)
678                         auto_nego |= PHY_Cap_100_Half | PHY_Cap_100_Full;
679                 else if (speed == SPEED_1000)
680                         giga_ctrl |= PHY_Cap_1000_Full;
681
682                 if (duplex == DUPLEX_HALF)
683                         auto_nego &= ~(PHY_Cap_10_Full | PHY_Cap_100_Full);
684
685                 if (duplex == DUPLEX_FULL)
686                         auto_nego &= ~(PHY_Cap_10_Half | PHY_Cap_100_Half);
687         }
688
689         tp->phy_auto_nego_reg = auto_nego;
690         tp->phy_1000_ctrl_reg = giga_ctrl;
691
692         mdio_write(ioaddr, PHY_AUTO_NEGO_REG, auto_nego);
693         mdio_write(ioaddr, PHY_1000_CTRL_REG, giga_ctrl);
694         mdio_write(ioaddr, PHY_CTRL_REG, PHY_Enable_Auto_Nego |
695                                          PHY_Restart_Auto_Nego);
696         return 0;
697 }
698
699 static int rtl8169_set_speed(struct net_device *dev,
700                              u8 autoneg, u16 speed, u8 duplex)
701 {
702         struct rtl8169_private *tp = netdev_priv(dev);
703         int ret;
704
705         ret = tp->set_speed(dev, autoneg, speed, duplex);
706
707         if (netif_running(dev) && (tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full))
708                 mod_timer(&tp->timer, jiffies + RTL8169_PHY_TIMEOUT);
709
710         return ret;
711 }
712
713 static int rtl8169_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
714 {
715         struct rtl8169_private *tp = netdev_priv(dev);
716         unsigned long flags;
717         int ret;
718
719         spin_lock_irqsave(&tp->lock, flags);
720         ret = rtl8169_set_speed(dev, cmd->autoneg, cmd->speed, cmd->duplex);
721         spin_unlock_irqrestore(&tp->lock, flags);
722         
723         return ret;
724 }
725
726 static u32 rtl8169_get_rx_csum(struct net_device *dev)
727 {
728         struct rtl8169_private *tp = netdev_priv(dev);
729
730         return tp->cp_cmd & RxChkSum;
731 }
732
733 static int rtl8169_set_rx_csum(struct net_device *dev, u32 data)
734 {
735         struct rtl8169_private *tp = netdev_priv(dev);
736         void __iomem *ioaddr = tp->mmio_addr;
737         unsigned long flags;
738
739         spin_lock_irqsave(&tp->lock, flags);
740
741         if (data)
742                 tp->cp_cmd |= RxChkSum;
743         else
744                 tp->cp_cmd &= ~RxChkSum;
745
746         RTL_W16(CPlusCmd, tp->cp_cmd);
747         RTL_R16(CPlusCmd);
748
749         spin_unlock_irqrestore(&tp->lock, flags);
750
751         return 0;
752 }
753
754 #ifdef CONFIG_R8169_VLAN
755
756 static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
757                                       struct sk_buff *skb)
758 {
759         return (tp->vlgrp && vlan_tx_tag_present(skb)) ?
760                 TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
761 }
762
763 static void rtl8169_vlan_rx_register(struct net_device *dev,
764                                      struct vlan_group *grp)
765 {
766         struct rtl8169_private *tp = netdev_priv(dev);
767         void __iomem *ioaddr = tp->mmio_addr;
768         unsigned long flags;
769
770         spin_lock_irqsave(&tp->lock, flags);
771         tp->vlgrp = grp;
772         if (tp->vlgrp)
773                 tp->cp_cmd |= RxVlan;
774         else
775                 tp->cp_cmd &= ~RxVlan;
776         RTL_W16(CPlusCmd, tp->cp_cmd);
777         RTL_R16(CPlusCmd);
778         spin_unlock_irqrestore(&tp->lock, flags);
779 }
780
781 static void rtl8169_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
782 {
783         struct rtl8169_private *tp = netdev_priv(dev);
784         unsigned long flags;
785
786         spin_lock_irqsave(&tp->lock, flags);
787         if (tp->vlgrp)
788                 tp->vlgrp->vlan_devices[vid] = NULL;
789         spin_unlock_irqrestore(&tp->lock, flags);
790 }
791
792 static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
793                                struct sk_buff *skb)
794 {
795         u32 opts2 = le32_to_cpu(desc->opts2);
796         int ret;
797
798         if (tp->vlgrp && (opts2 & RxVlanTag)) {
799                 rtl8169_rx_hwaccel_skb(skb, tp->vlgrp,
800                                        swab16(opts2 & 0xffff));
801                 ret = 0;
802         } else
803                 ret = -1;
804         desc->opts2 = 0;
805         return ret;
806 }
807
808 #else /* !CONFIG_R8169_VLAN */
809
810 static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
811                                       struct sk_buff *skb)
812 {
813         return 0;
814 }
815
816 static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
817                                struct sk_buff *skb)
818 {
819         return -1;
820 }
821
822 #endif
823
824 static void rtl8169_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd)
825 {
826         struct rtl8169_private *tp = netdev_priv(dev);
827         void __iomem *ioaddr = tp->mmio_addr;
828         u32 status;
829
830         cmd->supported =
831                 SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_FIBRE;
832         cmd->port = PORT_FIBRE;
833         cmd->transceiver = XCVR_INTERNAL;
834
835         status = RTL_R32(TBICSR);
836         cmd->advertising = (status & TBINwEnable) ?  ADVERTISED_Autoneg : 0;
837         cmd->autoneg = !!(status & TBINwEnable);
838
839         cmd->speed = SPEED_1000;
840         cmd->duplex = DUPLEX_FULL; /* Always set */
841 }
842
843 static void rtl8169_gset_xmii(struct net_device *dev, struct ethtool_cmd *cmd)
844 {
845         struct rtl8169_private *tp = netdev_priv(dev);
846         void __iomem *ioaddr = tp->mmio_addr;
847         u8 status;
848
849         cmd->supported = SUPPORTED_10baseT_Half |
850                          SUPPORTED_10baseT_Full |
851                          SUPPORTED_100baseT_Half |
852                          SUPPORTED_100baseT_Full |
853                          SUPPORTED_1000baseT_Full |
854                          SUPPORTED_Autoneg |
855                          SUPPORTED_TP;
856
857         cmd->autoneg = 1;
858         cmd->advertising = ADVERTISED_TP | ADVERTISED_Autoneg;
859
860         if (tp->phy_auto_nego_reg & PHY_Cap_10_Half)
861                 cmd->advertising |= ADVERTISED_10baseT_Half;
862         if (tp->phy_auto_nego_reg & PHY_Cap_10_Full)
863                 cmd->advertising |= ADVERTISED_10baseT_Full;
864         if (tp->phy_auto_nego_reg & PHY_Cap_100_Half)
865                 cmd->advertising |= ADVERTISED_100baseT_Half;
866         if (tp->phy_auto_nego_reg & PHY_Cap_100_Full)
867                 cmd->advertising |= ADVERTISED_100baseT_Full;
868         if (tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full)
869                 cmd->advertising |= ADVERTISED_1000baseT_Full;
870
871         status = RTL_R8(PHYstatus);
872
873         if (status & _1000bpsF)
874                 cmd->speed = SPEED_1000;
875         else if (status & _100bps)
876                 cmd->speed = SPEED_100;
877         else if (status & _10bps)
878                 cmd->speed = SPEED_10;
879
880         cmd->duplex = ((status & _1000bpsF) || (status & FullDup)) ?
881                       DUPLEX_FULL : DUPLEX_HALF;
882 }
883
884 static int rtl8169_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
885 {
886         struct rtl8169_private *tp = netdev_priv(dev);
887         unsigned long flags;
888
889         spin_lock_irqsave(&tp->lock, flags);
890
891         tp->get_settings(dev, cmd);
892
893         spin_unlock_irqrestore(&tp->lock, flags);
894         return 0;
895 }
896
897 static void rtl8169_get_regs(struct net_device *dev, struct ethtool_regs *regs,
898                              void *p)
899 {
900         struct rtl8169_private *tp = netdev_priv(dev);
901         unsigned long flags;
902
903         if (regs->len > R8169_REGS_SIZE)
904                 regs->len = R8169_REGS_SIZE;
905
906         spin_lock_irqsave(&tp->lock, flags);
907         memcpy_fromio(p, tp->mmio_addr, regs->len);
908         spin_unlock_irqrestore(&tp->lock, flags);
909 }
910
911 static u32 rtl8169_get_msglevel(struct net_device *dev)
912 {
913         struct rtl8169_private *tp = netdev_priv(dev);
914
915         return tp->msg_enable;
916 }
917
918 static void rtl8169_set_msglevel(struct net_device *dev, u32 value)
919 {
920         struct rtl8169_private *tp = netdev_priv(dev);
921
922         tp->msg_enable = value;
923 }
924
925 static const char rtl8169_gstrings[][ETH_GSTRING_LEN] = {
926         "tx_packets",
927         "rx_packets",
928         "tx_errors",
929         "rx_errors",
930         "rx_missed",
931         "align_errors",
932         "tx_single_collisions",
933         "tx_multi_collisions",
934         "unicast",
935         "broadcast",
936         "multicast",
937         "tx_aborted",
938         "tx_underrun",
939 };
940
941 struct rtl8169_counters {
942         u64     tx_packets;
943         u64     rx_packets;
944         u64     tx_errors;
945         u32     rx_errors;
946         u16     rx_missed;
947         u16     align_errors;
948         u32     tx_one_collision;
949         u32     tx_multi_collision;
950         u64     rx_unicast;
951         u64     rx_broadcast;
952         u32     rx_multicast;
953         u16     tx_aborted;
954         u16     tx_underun;
955 };
956
957 static int rtl8169_get_stats_count(struct net_device *dev)
958 {
959         return ARRAY_SIZE(rtl8169_gstrings);
960 }
961
962 static void rtl8169_get_ethtool_stats(struct net_device *dev,
963                                       struct ethtool_stats *stats, u64 *data)
964 {
965         struct rtl8169_private *tp = netdev_priv(dev);
966         void __iomem *ioaddr = tp->mmio_addr;
967         struct rtl8169_counters *counters;
968         dma_addr_t paddr;
969         u32 cmd;
970
971         ASSERT_RTNL();
972
973         counters = pci_alloc_consistent(tp->pci_dev, sizeof(*counters), &paddr);
974         if (!counters)
975                 return;
976
977         RTL_W32(CounterAddrHigh, (u64)paddr >> 32);
978         cmd = (u64)paddr & DMA_32BIT_MASK;
979         RTL_W32(CounterAddrLow, cmd);
980         RTL_W32(CounterAddrLow, cmd | CounterDump);
981
982         while (RTL_R32(CounterAddrLow) & CounterDump) {
983                 if (msleep_interruptible(1))
984                         break;
985         }
986
987         RTL_W32(CounterAddrLow, 0);
988         RTL_W32(CounterAddrHigh, 0);
989
990         data[0] = le64_to_cpu(counters->tx_packets);
991         data[1] = le64_to_cpu(counters->rx_packets);
992         data[2] = le64_to_cpu(counters->tx_errors);
993         data[3] = le32_to_cpu(counters->rx_errors);
994         data[4] = le16_to_cpu(counters->rx_missed);
995         data[5] = le16_to_cpu(counters->align_errors);
996         data[6] = le32_to_cpu(counters->tx_one_collision);
997         data[7] = le32_to_cpu(counters->tx_multi_collision);
998         data[8] = le64_to_cpu(counters->rx_unicast);
999         data[9] = le64_to_cpu(counters->rx_broadcast);
1000         data[10] = le32_to_cpu(counters->rx_multicast);
1001         data[11] = le16_to_cpu(counters->tx_aborted);
1002         data[12] = le16_to_cpu(counters->tx_underun);
1003
1004         pci_free_consistent(tp->pci_dev, sizeof(*counters), counters, paddr);
1005 }
1006
1007 static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data)
1008 {
1009         switch(stringset) {
1010         case ETH_SS_STATS:
1011                 memcpy(data, *rtl8169_gstrings, sizeof(rtl8169_gstrings));
1012                 break;
1013         }
1014 }
1015
1016
1017 static struct ethtool_ops rtl8169_ethtool_ops = {
1018         .get_drvinfo            = rtl8169_get_drvinfo,
1019         .get_regs_len           = rtl8169_get_regs_len,
1020         .get_link               = ethtool_op_get_link,
1021         .get_settings           = rtl8169_get_settings,
1022         .set_settings           = rtl8169_set_settings,
1023         .get_msglevel           = rtl8169_get_msglevel,
1024         .set_msglevel           = rtl8169_set_msglevel,
1025         .get_rx_csum            = rtl8169_get_rx_csum,
1026         .set_rx_csum            = rtl8169_set_rx_csum,
1027         .get_tx_csum            = ethtool_op_get_tx_csum,
1028         .set_tx_csum            = ethtool_op_set_tx_csum,
1029         .get_sg                 = ethtool_op_get_sg,
1030         .set_sg                 = ethtool_op_set_sg,
1031         .get_tso                = ethtool_op_get_tso,
1032         .set_tso                = ethtool_op_set_tso,
1033         .get_regs               = rtl8169_get_regs,
1034         .get_strings            = rtl8169_get_strings,
1035         .get_stats_count        = rtl8169_get_stats_count,
1036         .get_ethtool_stats      = rtl8169_get_ethtool_stats,
1037         .get_perm_addr          = ethtool_op_get_perm_addr,
1038 };
1039
1040 static void rtl8169_write_gmii_reg_bit(void __iomem *ioaddr, int reg, int bitnum,
1041                                        int bitval)
1042 {
1043         int val;
1044
1045         val = mdio_read(ioaddr, reg);
1046         val = (bitval == 1) ?
1047                 val | (bitval << bitnum) :  val & ~(0x0001 << bitnum);
1048         mdio_write(ioaddr, reg, val & 0xffff); 
1049 }
1050
1051 static void rtl8169_get_mac_version(struct rtl8169_private *tp, void __iomem *ioaddr)
1052 {
1053         const struct {
1054                 u32 mask;
1055                 int mac_version;
1056         } mac_info[] = {
1057                 { 0x1 << 28,    RTL_GIGA_MAC_VER_X },
1058                 { 0x1 << 26,    RTL_GIGA_MAC_VER_E },
1059                 { 0x1 << 23,    RTL_GIGA_MAC_VER_D }, 
1060                 { 0x00000000,   RTL_GIGA_MAC_VER_B } /* Catch-all */
1061         }, *p = mac_info;
1062         u32 reg;
1063
1064         reg = RTL_R32(TxConfig) & 0x7c800000;
1065         while ((reg & p->mask) != p->mask)
1066                 p++;
1067         tp->mac_version = p->mac_version;
1068 }
1069
1070 static void rtl8169_print_mac_version(struct rtl8169_private *tp)
1071 {
1072         struct {
1073                 int version;
1074                 char *msg;
1075         } mac_print[] = {
1076                 { RTL_GIGA_MAC_VER_E, "RTL_GIGA_MAC_VER_E" },
1077                 { RTL_GIGA_MAC_VER_D, "RTL_GIGA_MAC_VER_D" },
1078                 { RTL_GIGA_MAC_VER_B, "RTL_GIGA_MAC_VER_B" },
1079                 { 0, NULL }
1080         }, *p;
1081
1082         for (p = mac_print; p->msg; p++) {
1083                 if (tp->mac_version == p->version) {
1084                         dprintk("mac_version == %s (%04d)\n", p->msg,
1085                                   p->version);
1086                         return;
1087                 }
1088         }
1089         dprintk("mac_version == Unknown\n");
1090 }
1091
1092 static void rtl8169_get_phy_version(struct rtl8169_private *tp, void __iomem *ioaddr)
1093 {
1094         const struct {
1095                 u16 mask;
1096                 u16 set;
1097                 int phy_version;
1098         } phy_info[] = {
1099                 { 0x000f, 0x0002, RTL_GIGA_PHY_VER_G },
1100                 { 0x000f, 0x0001, RTL_GIGA_PHY_VER_F },
1101                 { 0x000f, 0x0000, RTL_GIGA_PHY_VER_E },
1102                 { 0x0000, 0x0000, RTL_GIGA_PHY_VER_D } /* Catch-all */
1103         }, *p = phy_info;
1104         u16 reg;
1105
1106         reg = mdio_read(ioaddr, 3) & 0xffff;
1107         while ((reg & p->mask) != p->set)
1108                 p++;
1109         tp->phy_version = p->phy_version;
1110 }
1111
1112 static void rtl8169_print_phy_version(struct rtl8169_private *tp)
1113 {
1114         struct {
1115                 int version;
1116                 char *msg;
1117                 u32 reg;
1118         } phy_print[] = {
1119                 { RTL_GIGA_PHY_VER_G, "RTL_GIGA_PHY_VER_G", 0x0002 },
1120                 { RTL_GIGA_PHY_VER_F, "RTL_GIGA_PHY_VER_F", 0x0001 },
1121                 { RTL_GIGA_PHY_VER_E, "RTL_GIGA_PHY_VER_E", 0x0000 },
1122                 { RTL_GIGA_PHY_VER_D, "RTL_GIGA_PHY_VER_D", 0x0000 },
1123                 { 0, NULL, 0x0000 }
1124         }, *p;
1125
1126         for (p = phy_print; p->msg; p++) {
1127                 if (tp->phy_version == p->version) {
1128                         dprintk("phy_version == %s (%04x)\n", p->msg, p->reg);
1129                         return;
1130                 }
1131         }
1132         dprintk("phy_version == Unknown\n");
1133 }
1134
1135 static void rtl8169_hw_phy_config(struct net_device *dev)
1136 {
1137         struct rtl8169_private *tp = netdev_priv(dev);
1138         void __iomem *ioaddr = tp->mmio_addr;
1139         struct {
1140                 u16 regs[5]; /* Beware of bit-sign propagation */
1141         } phy_magic[5] = { {
1142                 { 0x0000,       //w 4 15 12 0
1143                   0x00a1,       //w 3 15 0 00a1
1144                   0x0008,       //w 2 15 0 0008
1145                   0x1020,       //w 1 15 0 1020
1146                   0x1000 } },{  //w 0 15 0 1000
1147                 { 0x7000,       //w 4 15 12 7
1148                   0xff41,       //w 3 15 0 ff41
1149                   0xde60,       //w 2 15 0 de60
1150                   0x0140,       //w 1 15 0 0140
1151                   0x0077 } },{  //w 0 15 0 0077
1152                 { 0xa000,       //w 4 15 12 a
1153                   0xdf01,       //w 3 15 0 df01
1154                   0xdf20,       //w 2 15 0 df20
1155                   0xff95,       //w 1 15 0 ff95
1156                   0xfa00 } },{  //w 0 15 0 fa00
1157                 { 0xb000,       //w 4 15 12 b
1158                   0xff41,       //w 3 15 0 ff41
1159                   0xde20,       //w 2 15 0 de20
1160                   0x0140,       //w 1 15 0 0140
1161                   0x00bb } },{  //w 0 15 0 00bb
1162                 { 0xf000,       //w 4 15 12 f
1163                   0xdf01,       //w 3 15 0 df01
1164                   0xdf20,       //w 2 15 0 df20
1165                   0xff95,       //w 1 15 0 ff95
1166                   0xbf00 }      //w 0 15 0 bf00
1167                 }
1168         }, *p = phy_magic;
1169         int i;
1170
1171         rtl8169_print_mac_version(tp);
1172         rtl8169_print_phy_version(tp);
1173
1174         if (tp->mac_version <= RTL_GIGA_MAC_VER_B)
1175                 return;
1176         if (tp->phy_version >= RTL_GIGA_PHY_VER_H)
1177                 return;
1178
1179         dprintk("MAC version != 0 && PHY version == 0 or 1\n");
1180         dprintk("Do final_reg2.cfg\n");
1181
1182         /* Shazam ! */
1183
1184         if (tp->mac_version == RTL_GIGA_MAC_VER_X) {
1185                 mdio_write(ioaddr, 31, 0x0001);
1186                 mdio_write(ioaddr,  9, 0x273a);
1187                 mdio_write(ioaddr, 14, 0x7bfb);
1188                 mdio_write(ioaddr, 27, 0x841e);
1189
1190                 mdio_write(ioaddr, 31, 0x0002);
1191                 mdio_write(ioaddr,  1, 0x90d0);
1192                 mdio_write(ioaddr, 31, 0x0000);
1193                 return;
1194         }
1195
1196         /* phy config for RTL8169s mac_version C chip */
1197         mdio_write(ioaddr, 31, 0x0001);                 //w 31 2 0 1
1198         mdio_write(ioaddr, 21, 0x1000);                 //w 21 15 0 1000
1199         mdio_write(ioaddr, 24, 0x65c7);                 //w 24 15 0 65c7
1200         rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0);   //w 4 11 11 0
1201
1202         for (i = 0; i < ARRAY_SIZE(phy_magic); i++, p++) {
1203                 int val, pos = 4;
1204
1205                 val = (mdio_read(ioaddr, pos) & 0x0fff) | (p->regs[0] & 0xffff);
1206                 mdio_write(ioaddr, pos, val);
1207                 while (--pos >= 0)
1208                         mdio_write(ioaddr, pos, p->regs[4 - pos] & 0xffff);
1209                 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 1); //w 4 11 11 1
1210                 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0
1211         }
1212         mdio_write(ioaddr, 31, 0x0000); //w 31 2 0 0
1213 }
1214
1215 static void rtl8169_phy_timer(unsigned long __opaque)
1216 {
1217         struct net_device *dev = (struct net_device *)__opaque;
1218         struct rtl8169_private *tp = netdev_priv(dev);
1219         struct timer_list *timer = &tp->timer;
1220         void __iomem *ioaddr = tp->mmio_addr;
1221         unsigned long timeout = RTL8169_PHY_TIMEOUT;
1222
1223         assert(tp->mac_version > RTL_GIGA_MAC_VER_B);
1224         assert(tp->phy_version < RTL_GIGA_PHY_VER_H);
1225
1226         if (!(tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full))
1227                 return;
1228
1229         spin_lock_irq(&tp->lock);
1230
1231         if (tp->phy_reset_pending(ioaddr)) {
1232                 /* 
1233                  * A busy loop could burn quite a few cycles on nowadays CPU.
1234                  * Let's delay the execution of the timer for a few ticks.
1235                  */
1236                 timeout = HZ/10;
1237                 goto out_mod_timer;
1238         }
1239
1240         if (tp->link_ok(ioaddr))
1241                 goto out_unlock;
1242
1243         if (netif_msg_link(tp))
1244                 printk(KERN_WARNING "%s: PHY reset until link up\n", dev->name);
1245
1246         tp->phy_reset_enable(ioaddr);
1247
1248 out_mod_timer:
1249         mod_timer(timer, jiffies + timeout);
1250 out_unlock:
1251         spin_unlock_irq(&tp->lock);
1252 }
1253
1254 static inline void rtl8169_delete_timer(struct net_device *dev)
1255 {
1256         struct rtl8169_private *tp = netdev_priv(dev);
1257         struct timer_list *timer = &tp->timer;
1258
1259         if ((tp->mac_version <= RTL_GIGA_MAC_VER_B) ||
1260             (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1261                 return;
1262
1263         del_timer_sync(timer);
1264 }
1265
1266 static inline void rtl8169_request_timer(struct net_device *dev)
1267 {
1268         struct rtl8169_private *tp = netdev_priv(dev);
1269         struct timer_list *timer = &tp->timer;
1270
1271         if ((tp->mac_version <= RTL_GIGA_MAC_VER_B) ||
1272             (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1273                 return;
1274
1275         init_timer(timer);
1276         timer->expires = jiffies + RTL8169_PHY_TIMEOUT;
1277         timer->data = (unsigned long)(dev);
1278         timer->function = rtl8169_phy_timer;
1279         add_timer(timer);
1280 }
1281
1282 #ifdef CONFIG_NET_POLL_CONTROLLER
1283 /*
1284  * Polling 'interrupt' - used by things like netconsole to send skbs
1285  * without having to re-enable interrupts. It's not called while
1286  * the interrupt routine is executing.
1287  */
1288 static void rtl8169_netpoll(struct net_device *dev)
1289 {
1290         struct rtl8169_private *tp = netdev_priv(dev);
1291         struct pci_dev *pdev = tp->pci_dev;
1292
1293         disable_irq(pdev->irq);
1294         rtl8169_interrupt(pdev->irq, dev, NULL);
1295         enable_irq(pdev->irq);
1296 }
1297 #endif
1298
1299 static void rtl8169_release_board(struct pci_dev *pdev, struct net_device *dev,
1300                                   void __iomem *ioaddr)
1301 {
1302         iounmap(ioaddr);
1303         pci_release_regions(pdev);
1304         pci_disable_device(pdev);
1305         free_netdev(dev);
1306 }
1307
1308 static int __devinit
1309 rtl8169_init_board(struct pci_dev *pdev, struct net_device **dev_out,
1310                    void __iomem **ioaddr_out)
1311 {
1312         void __iomem *ioaddr;
1313         struct net_device *dev;
1314         struct rtl8169_private *tp;
1315         int rc = -ENOMEM, i, acpi_idle_state = 0, pm_cap;
1316
1317         assert(ioaddr_out != NULL);
1318
1319         /* dev zeroed in alloc_etherdev */
1320         dev = alloc_etherdev(sizeof (*tp));
1321         if (dev == NULL) {
1322                 if (netif_msg_drv(&debug))
1323                         printk(KERN_ERR PFX "unable to alloc new ethernet\n");
1324                 goto err_out;
1325         }
1326
1327         SET_MODULE_OWNER(dev);
1328         SET_NETDEV_DEV(dev, &pdev->dev);
1329         tp = netdev_priv(dev);
1330         tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT);
1331
1332         /* enable device (incl. PCI PM wakeup and hotplug setup) */
1333         rc = pci_enable_device(pdev);
1334         if (rc < 0) {
1335                 if (netif_msg_probe(tp)) {
1336                         printk(KERN_ERR PFX "%s: enable failure\n",
1337                                pci_name(pdev));
1338                 }
1339                 goto err_out_free_dev;
1340         }
1341
1342         rc = pci_set_mwi(pdev);
1343         if (rc < 0)
1344                 goto err_out_disable;
1345
1346         /* save power state before pci_enable_device overwrites it */
1347         pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
1348         if (pm_cap) {
1349                 u16 pwr_command;
1350
1351                 pci_read_config_word(pdev, pm_cap + PCI_PM_CTRL, &pwr_command);
1352                 acpi_idle_state = pwr_command & PCI_PM_CTRL_STATE_MASK;
1353         } else {
1354                 if (netif_msg_probe(tp)) {
1355                         printk(KERN_ERR PFX
1356                                "PowerManagement capability not found.\n");
1357                 }
1358         }
1359
1360         /* make sure PCI base addr 1 is MMIO */
1361         if (!(pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
1362                 if (netif_msg_probe(tp)) {
1363                         printk(KERN_ERR PFX
1364                                "region #1 not an MMIO resource, aborting\n");
1365                 }
1366                 rc = -ENODEV;
1367                 goto err_out_mwi;
1368         }
1369         /* check for weird/broken PCI region reporting */
1370         if (pci_resource_len(pdev, 1) < R8169_REGS_SIZE) {
1371                 if (netif_msg_probe(tp)) {
1372                         printk(KERN_ERR PFX
1373                                "Invalid PCI region size(s), aborting\n");
1374                 }
1375                 rc = -ENODEV;
1376                 goto err_out_mwi;
1377         }
1378
1379         rc = pci_request_regions(pdev, MODULENAME);
1380         if (rc < 0) {
1381                 if (netif_msg_probe(tp)) {
1382                         printk(KERN_ERR PFX "%s: could not request regions.\n",
1383                                pci_name(pdev));
1384                 }
1385                 goto err_out_mwi;
1386         }
1387
1388         tp->cp_cmd = PCIMulRW | RxChkSum;
1389
1390         if ((sizeof(dma_addr_t) > 4) &&
1391             !pci_set_dma_mask(pdev, DMA_64BIT_MASK) && use_dac) {
1392                 tp->cp_cmd |= PCIDAC;
1393                 dev->features |= NETIF_F_HIGHDMA;
1394         } else {
1395                 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1396                 if (rc < 0) {
1397                         if (netif_msg_probe(tp)) {
1398                                 printk(KERN_ERR PFX
1399                                        "DMA configuration failed.\n");
1400                         }
1401                         goto err_out_free_res;
1402                 }
1403         }
1404
1405         pci_set_master(pdev);
1406
1407         /* ioremap MMIO region */
1408         ioaddr = ioremap(pci_resource_start(pdev, 1), R8169_REGS_SIZE);
1409         if (ioaddr == NULL) {
1410                 if (netif_msg_probe(tp))
1411                         printk(KERN_ERR PFX "cannot remap MMIO, aborting\n");
1412                 rc = -EIO;
1413                 goto err_out_free_res;
1414         }
1415
1416         /* Unneeded ? Don't mess with Mrs. Murphy. */
1417         rtl8169_irq_mask_and_ack(ioaddr);
1418
1419         /* Soft reset the chip. */
1420         RTL_W8(ChipCmd, CmdReset);
1421
1422         /* Check that the chip has finished the reset. */
1423         for (i = 1000; i > 0; i--) {
1424                 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1425                         break;
1426                 udelay(10);
1427         }
1428
1429         /* Identify chip attached to board */
1430         rtl8169_get_mac_version(tp, ioaddr);
1431         rtl8169_get_phy_version(tp, ioaddr);
1432
1433         rtl8169_print_mac_version(tp);
1434         rtl8169_print_phy_version(tp);
1435
1436         for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--) {
1437                 if (tp->mac_version == rtl_chip_info[i].mac_version)
1438                         break;
1439         }
1440         if (i < 0) {
1441                 /* Unknown chip: assume array element #0, original RTL-8169 */
1442                 if (netif_msg_probe(tp)) {
1443                         printk(KERN_DEBUG PFX "PCI device %s: "
1444                                "unknown chip version, assuming %s\n",
1445                                pci_name(pdev), rtl_chip_info[0].name);
1446                 }
1447                 i++;
1448         }
1449         tp->chipset = i;
1450
1451         RTL_W8(Cfg9346, Cfg9346_Unlock);
1452         RTL_W8(Config1, RTL_R8(Config1) | PMEnable);
1453         RTL_W8(Config5, RTL_R8(Config5) & PMEStatus);
1454         RTL_W8(Cfg9346, Cfg9346_Lock);
1455
1456         *ioaddr_out = ioaddr;
1457         *dev_out = dev;
1458 out:
1459         return rc;
1460
1461 err_out_free_res:
1462         pci_release_regions(pdev);
1463
1464 err_out_mwi:
1465         pci_clear_mwi(pdev);
1466
1467 err_out_disable:
1468         pci_disable_device(pdev);
1469
1470 err_out_free_dev:
1471         free_netdev(dev);
1472 err_out:
1473         *ioaddr_out = NULL;
1474         *dev_out = NULL;
1475         goto out;
1476 }
1477
1478 static int __devinit
1479 rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1480 {
1481         struct net_device *dev = NULL;
1482         struct rtl8169_private *tp;
1483         void __iomem *ioaddr = NULL;
1484         static int board_idx = -1;
1485         u8 autoneg, duplex;
1486         u16 speed;
1487         int i, rc;
1488
1489         assert(pdev != NULL);
1490         assert(ent != NULL);
1491
1492         board_idx++;
1493
1494         if (netif_msg_drv(&debug)) {
1495                 printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n",
1496                        MODULENAME, RTL8169_VERSION);
1497         }
1498
1499         rc = rtl8169_init_board(pdev, &dev, &ioaddr);
1500         if (rc)
1501                 return rc;
1502
1503         tp = netdev_priv(dev);
1504         assert(ioaddr != NULL);
1505
1506         if (RTL_R8(PHYstatus) & TBI_Enable) {
1507                 tp->set_speed = rtl8169_set_speed_tbi;
1508                 tp->get_settings = rtl8169_gset_tbi;
1509                 tp->phy_reset_enable = rtl8169_tbi_reset_enable;
1510                 tp->phy_reset_pending = rtl8169_tbi_reset_pending;
1511                 tp->link_ok = rtl8169_tbi_link_ok;
1512
1513                 tp->phy_1000_ctrl_reg = PHY_Cap_1000_Full; /* Implied by TBI */
1514         } else {
1515                 tp->set_speed = rtl8169_set_speed_xmii;
1516                 tp->get_settings = rtl8169_gset_xmii;
1517                 tp->phy_reset_enable = rtl8169_xmii_reset_enable;
1518                 tp->phy_reset_pending = rtl8169_xmii_reset_pending;
1519                 tp->link_ok = rtl8169_xmii_link_ok;
1520         }
1521
1522         /* Get MAC address.  FIXME: read EEPROM */
1523         for (i = 0; i < MAC_ADDR_LEN; i++)
1524                 dev->dev_addr[i] = RTL_R8(MAC0 + i);
1525         memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
1526
1527         dev->open = rtl8169_open;
1528         dev->hard_start_xmit = rtl8169_start_xmit;
1529         dev->get_stats = rtl8169_get_stats;
1530         SET_ETHTOOL_OPS(dev, &rtl8169_ethtool_ops);
1531         dev->stop = rtl8169_close;
1532         dev->tx_timeout = rtl8169_tx_timeout;
1533         dev->set_multicast_list = rtl8169_set_rx_mode;
1534         dev->watchdog_timeo = RTL8169_TX_TIMEOUT;
1535         dev->irq = pdev->irq;
1536         dev->base_addr = (unsigned long) ioaddr;
1537         dev->change_mtu = rtl8169_change_mtu;
1538
1539 #ifdef CONFIG_R8169_NAPI
1540         dev->poll = rtl8169_poll;
1541         dev->weight = R8169_NAPI_WEIGHT;
1542 #endif
1543
1544 #ifdef CONFIG_R8169_VLAN
1545         dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1546         dev->vlan_rx_register = rtl8169_vlan_rx_register;
1547         dev->vlan_rx_kill_vid = rtl8169_vlan_rx_kill_vid;
1548 #endif
1549
1550 #ifdef CONFIG_NET_POLL_CONTROLLER
1551         dev->poll_controller = rtl8169_netpoll;
1552 #endif
1553
1554         tp->intr_mask = 0xffff;
1555         tp->pci_dev = pdev;
1556         tp->mmio_addr = ioaddr;
1557
1558         spin_lock_init(&tp->lock);
1559
1560         rc = register_netdev(dev);
1561         if (rc) {
1562                 rtl8169_release_board(pdev, dev, ioaddr);
1563                 return rc;
1564         }
1565
1566         if (netif_msg_probe(tp)) {
1567                 printk(KERN_DEBUG "%s: Identified chip type is '%s'.\n",
1568                        dev->name, rtl_chip_info[tp->chipset].name);
1569         }
1570
1571         pci_set_drvdata(pdev, dev);
1572
1573         if (netif_msg_probe(tp)) {
1574                 printk(KERN_INFO "%s: %s at 0x%lx, "
1575                        "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
1576                        "IRQ %d\n",
1577                        dev->name,
1578                        rtl_chip_info[ent->driver_data].name,
1579                        dev->base_addr,
1580                        dev->dev_addr[0], dev->dev_addr[1],
1581                        dev->dev_addr[2], dev->dev_addr[3],
1582                        dev->dev_addr[4], dev->dev_addr[5], dev->irq);
1583         }
1584
1585         rtl8169_hw_phy_config(dev);
1586
1587         dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1588         RTL_W8(0x82, 0x01);
1589
1590         if (tp->mac_version < RTL_GIGA_MAC_VER_E) {
1591                 dprintk("Set PCI Latency=0x40\n");
1592                 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40);
1593         }
1594
1595         if (tp->mac_version == RTL_GIGA_MAC_VER_D) {
1596                 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1597                 RTL_W8(0x82, 0x01);
1598                 dprintk("Set PHY Reg 0x0bh = 0x00h\n");
1599                 mdio_write(ioaddr, 0x0b, 0x0000); //w 0x0b 15 0 0
1600         }
1601
1602         rtl8169_link_option(board_idx, &autoneg, &speed, &duplex);
1603
1604         rtl8169_set_speed(dev, autoneg, speed, duplex);
1605         
1606         if ((RTL_R8(PHYstatus) & TBI_Enable) && netif_msg_link(tp))
1607                 printk(KERN_INFO PFX "%s: TBI auto-negotiating\n", dev->name);
1608
1609         return 0;
1610 }
1611
1612 static void __devexit
1613 rtl8169_remove_one(struct pci_dev *pdev)
1614 {
1615         struct net_device *dev = pci_get_drvdata(pdev);
1616         struct rtl8169_private *tp = netdev_priv(dev);
1617
1618         assert(dev != NULL);
1619         assert(tp != NULL);
1620
1621         unregister_netdev(dev);
1622         rtl8169_release_board(pdev, dev, tp->mmio_addr);
1623         pci_set_drvdata(pdev, NULL);
1624 }
1625
1626 static void rtl8169_set_rxbufsize(struct rtl8169_private *tp,
1627                                   struct net_device *dev)
1628 {
1629         unsigned int mtu = dev->mtu;
1630
1631         tp->rx_buf_sz = (mtu > RX_BUF_SIZE) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE;
1632 }
1633
1634 static int rtl8169_open(struct net_device *dev)
1635 {
1636         struct rtl8169_private *tp = netdev_priv(dev);
1637         struct pci_dev *pdev = tp->pci_dev;
1638         int retval;
1639
1640         rtl8169_set_rxbufsize(tp, dev);
1641
1642         retval =
1643             request_irq(dev->irq, rtl8169_interrupt, SA_SHIRQ, dev->name, dev);
1644         if (retval < 0)
1645                 goto out;
1646
1647         retval = -ENOMEM;
1648
1649         /*
1650          * Rx and Tx desscriptors needs 256 bytes alignment.
1651          * pci_alloc_consistent provides more.
1652          */
1653         tp->TxDescArray = pci_alloc_consistent(pdev, R8169_TX_RING_BYTES,
1654                                                &tp->TxPhyAddr);
1655         if (!tp->TxDescArray)
1656                 goto err_free_irq;
1657
1658         tp->RxDescArray = pci_alloc_consistent(pdev, R8169_RX_RING_BYTES,
1659                                                &tp->RxPhyAddr);
1660         if (!tp->RxDescArray)
1661                 goto err_free_tx;
1662
1663         retval = rtl8169_init_ring(dev);
1664         if (retval < 0)
1665                 goto err_free_rx;
1666
1667         INIT_WORK(&tp->task, NULL, dev);
1668
1669         rtl8169_hw_start(dev);
1670
1671         rtl8169_request_timer(dev);
1672
1673         rtl8169_check_link_status(dev, tp, tp->mmio_addr);
1674 out:
1675         return retval;
1676
1677 err_free_rx:
1678         pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
1679                             tp->RxPhyAddr);
1680 err_free_tx:
1681         pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
1682                             tp->TxPhyAddr);
1683 err_free_irq:
1684         free_irq(dev->irq, dev);
1685         goto out;
1686 }
1687
1688 static void rtl8169_hw_reset(void __iomem *ioaddr)
1689 {
1690         /* Disable interrupts */
1691         rtl8169_irq_mask_and_ack(ioaddr);
1692
1693         /* Reset the chipset */
1694         RTL_W8(ChipCmd, CmdReset);
1695
1696         /* PCI commit */
1697         RTL_R8(ChipCmd);
1698 }
1699
1700 static void
1701 rtl8169_hw_start(struct net_device *dev)
1702 {
1703         struct rtl8169_private *tp = netdev_priv(dev);
1704         void __iomem *ioaddr = tp->mmio_addr;
1705         u32 i;
1706
1707         /* Soft reset the chip. */
1708         RTL_W8(ChipCmd, CmdReset);
1709
1710         /* Check that the chip has finished the reset. */
1711         for (i = 1000; i > 0; i--) {
1712                 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1713                         break;
1714                 udelay(10);
1715         }
1716
1717         RTL_W8(Cfg9346, Cfg9346_Unlock);
1718         RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
1719         RTL_W8(EarlyTxThres, EarlyTxThld);
1720
1721         /* Low hurts. Let's disable the filtering. */
1722         RTL_W16(RxMaxSize, 16383);
1723
1724         /* Set Rx Config register */
1725         i = rtl8169_rx_config |
1726                 (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
1727         RTL_W32(RxConfig, i);
1728
1729         /* Set DMA burst size and Interframe Gap Time */
1730         RTL_W32(TxConfig,
1731                 (TX_DMA_BURST << TxDMAShift) | (InterFrameGap <<
1732                                                 TxInterFrameGapShift));
1733         tp->cp_cmd |= RTL_R16(CPlusCmd);
1734         RTL_W16(CPlusCmd, tp->cp_cmd);
1735
1736         if ((tp->mac_version == RTL_GIGA_MAC_VER_D) ||
1737             (tp->mac_version == RTL_GIGA_MAC_VER_E)) {
1738                 dprintk(KERN_INFO PFX "Set MAC Reg C+CR Offset 0xE0. "
1739                         "Bit-3 and bit-14 MUST be 1\n");
1740                 tp->cp_cmd |= (1 << 14) | PCIMulRW;
1741                 RTL_W16(CPlusCmd, tp->cp_cmd);
1742         }
1743
1744         /*
1745          * Undocumented corner. Supposedly:
1746          * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
1747          */
1748         RTL_W16(IntrMitigate, 0x0000);
1749
1750         RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_32BIT_MASK));
1751         RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32));
1752         RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_32BIT_MASK));
1753         RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32));
1754         RTL_W8(Cfg9346, Cfg9346_Lock);
1755         udelay(10);
1756
1757         RTL_W32(RxMissed, 0);
1758
1759         rtl8169_set_rx_mode(dev);
1760
1761         /* no early-rx interrupts */
1762         RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
1763
1764         /* Enable all known interrupts by setting the interrupt mask. */
1765         RTL_W16(IntrMask, rtl8169_intr_mask);
1766
1767         netif_start_queue(dev);
1768 }
1769
1770 static int rtl8169_change_mtu(struct net_device *dev, int new_mtu)
1771 {
1772         struct rtl8169_private *tp = netdev_priv(dev);
1773         int ret = 0;
1774
1775         if (new_mtu < ETH_ZLEN || new_mtu > SafeMtu)
1776                 return -EINVAL;
1777
1778         dev->mtu = new_mtu;
1779
1780         if (!netif_running(dev))
1781                 goto out;
1782
1783         rtl8169_down(dev);
1784
1785         rtl8169_set_rxbufsize(tp, dev);
1786
1787         ret = rtl8169_init_ring(dev);
1788         if (ret < 0)
1789                 goto out;
1790
1791         netif_poll_enable(dev);
1792
1793         rtl8169_hw_start(dev);
1794
1795         rtl8169_request_timer(dev);
1796
1797 out:
1798         return ret;
1799 }
1800
1801 static inline void rtl8169_make_unusable_by_asic(struct RxDesc *desc)
1802 {
1803         desc->addr = 0x0badbadbadbadbadull;
1804         desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask);
1805 }
1806
1807 static void rtl8169_free_rx_skb(struct rtl8169_private *tp,
1808                                 struct sk_buff **sk_buff, struct RxDesc *desc)
1809 {
1810         struct pci_dev *pdev = tp->pci_dev;
1811
1812         pci_unmap_single(pdev, le64_to_cpu(desc->addr), tp->rx_buf_sz,
1813                          PCI_DMA_FROMDEVICE);
1814         dev_kfree_skb(*sk_buff);
1815         *sk_buff = NULL;
1816         rtl8169_make_unusable_by_asic(desc);
1817 }
1818
1819 static inline void rtl8169_mark_to_asic(struct RxDesc *desc, u32 rx_buf_sz)
1820 {
1821         u32 eor = le32_to_cpu(desc->opts1) & RingEnd;
1822
1823         desc->opts1 = cpu_to_le32(DescOwn | eor | rx_buf_sz);
1824 }
1825
1826 static inline void rtl8169_map_to_asic(struct RxDesc *desc, dma_addr_t mapping,
1827                                        u32 rx_buf_sz)
1828 {
1829         desc->addr = cpu_to_le64(mapping);
1830         wmb();
1831         rtl8169_mark_to_asic(desc, rx_buf_sz);
1832 }
1833
1834 static int rtl8169_alloc_rx_skb(struct pci_dev *pdev, struct sk_buff **sk_buff,
1835                                 struct RxDesc *desc, int rx_buf_sz)
1836 {
1837         struct sk_buff *skb;
1838         dma_addr_t mapping;
1839         int ret = 0;
1840
1841         skb = dev_alloc_skb(rx_buf_sz + NET_IP_ALIGN);
1842         if (!skb)
1843                 goto err_out;
1844
1845         skb_reserve(skb, NET_IP_ALIGN);
1846         *sk_buff = skb;
1847
1848         mapping = pci_map_single(pdev, skb->data, rx_buf_sz,
1849                                  PCI_DMA_FROMDEVICE);
1850
1851         rtl8169_map_to_asic(desc, mapping, rx_buf_sz);
1852
1853 out:
1854         return ret;
1855
1856 err_out:
1857         ret = -ENOMEM;
1858         rtl8169_make_unusable_by_asic(desc);
1859         goto out;
1860 }
1861
1862 static void rtl8169_rx_clear(struct rtl8169_private *tp)
1863 {
1864         int i;
1865
1866         for (i = 0; i < NUM_RX_DESC; i++) {
1867                 if (tp->Rx_skbuff[i]) {
1868                         rtl8169_free_rx_skb(tp, tp->Rx_skbuff + i,
1869                                             tp->RxDescArray + i);
1870                 }
1871         }
1872 }
1873
1874 static u32 rtl8169_rx_fill(struct rtl8169_private *tp, struct net_device *dev,
1875                            u32 start, u32 end)
1876 {
1877         u32 cur;
1878         
1879         for (cur = start; end - cur > 0; cur++) {
1880                 int ret, i = cur % NUM_RX_DESC;
1881
1882                 if (tp->Rx_skbuff[i])
1883                         continue;
1884                         
1885                 ret = rtl8169_alloc_rx_skb(tp->pci_dev, tp->Rx_skbuff + i,
1886                                            tp->RxDescArray + i, tp->rx_buf_sz);
1887                 if (ret < 0)
1888                         break;
1889         }
1890         return cur - start;
1891 }
1892
1893 static inline void rtl8169_mark_as_last_descriptor(struct RxDesc *desc)
1894 {
1895         desc->opts1 |= cpu_to_le32(RingEnd);
1896 }
1897
1898 static void rtl8169_init_ring_indexes(struct rtl8169_private *tp)
1899 {
1900         tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0;
1901 }
1902
1903 static int rtl8169_init_ring(struct net_device *dev)
1904 {
1905         struct rtl8169_private *tp = netdev_priv(dev);
1906
1907         rtl8169_init_ring_indexes(tp);
1908
1909         memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info));
1910         memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *));
1911
1912         if (rtl8169_rx_fill(tp, dev, 0, NUM_RX_DESC) != NUM_RX_DESC)
1913                 goto err_out;
1914
1915         rtl8169_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1);
1916
1917         return 0;
1918
1919 err_out:
1920         rtl8169_rx_clear(tp);
1921         return -ENOMEM;
1922 }
1923
1924 static void rtl8169_unmap_tx_skb(struct pci_dev *pdev, struct ring_info *tx_skb,
1925                                  struct TxDesc *desc)
1926 {
1927         unsigned int len = tx_skb->len;
1928
1929         pci_unmap_single(pdev, le64_to_cpu(desc->addr), len, PCI_DMA_TODEVICE);
1930         desc->opts1 = 0x00;
1931         desc->opts2 = 0x00;
1932         desc->addr = 0x00;
1933         tx_skb->len = 0;
1934 }
1935
1936 static void rtl8169_tx_clear(struct rtl8169_private *tp)
1937 {
1938         unsigned int i;
1939
1940         for (i = tp->dirty_tx; i < tp->dirty_tx + NUM_TX_DESC; i++) {
1941                 unsigned int entry = i % NUM_TX_DESC;
1942                 struct ring_info *tx_skb = tp->tx_skb + entry;
1943                 unsigned int len = tx_skb->len;
1944
1945                 if (len) {
1946                         struct sk_buff *skb = tx_skb->skb;
1947
1948                         rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb,
1949                                              tp->TxDescArray + entry);
1950                         if (skb) {
1951                                 dev_kfree_skb(skb);
1952                                 tx_skb->skb = NULL;
1953                         }
1954                         tp->stats.tx_dropped++;
1955                 }
1956         }
1957         tp->cur_tx = tp->dirty_tx = 0;
1958 }
1959
1960 static void rtl8169_schedule_work(struct net_device *dev, void (*task)(void *))
1961 {
1962         struct rtl8169_private *tp = netdev_priv(dev);
1963
1964         PREPARE_WORK(&tp->task, task, dev);
1965         schedule_delayed_work(&tp->task, 4);
1966 }
1967
1968 static void rtl8169_wait_for_quiescence(struct net_device *dev)
1969 {
1970         struct rtl8169_private *tp = netdev_priv(dev);
1971         void __iomem *ioaddr = tp->mmio_addr;
1972
1973         synchronize_irq(dev->irq);
1974
1975         /* Wait for any pending NAPI task to complete */
1976         netif_poll_disable(dev);
1977
1978         rtl8169_irq_mask_and_ack(ioaddr);
1979
1980         netif_poll_enable(dev);
1981 }
1982
1983 static void rtl8169_reinit_task(void *_data)
1984 {
1985         struct net_device *dev = _data;
1986         int ret;
1987
1988         if (netif_running(dev)) {
1989                 rtl8169_wait_for_quiescence(dev);
1990                 rtl8169_close(dev);
1991         }
1992
1993         ret = rtl8169_open(dev);
1994         if (unlikely(ret < 0)) {
1995                 if (net_ratelimit()) {
1996                         struct rtl8169_private *tp = netdev_priv(dev);
1997
1998                         if (netif_msg_drv(tp)) {
1999                                 printk(PFX KERN_ERR
2000                                        "%s: reinit failure (status = %d)."
2001                                        " Rescheduling.\n", dev->name, ret);
2002                         }
2003                 }
2004                 rtl8169_schedule_work(dev, rtl8169_reinit_task);
2005         }
2006 }
2007
2008 static void rtl8169_reset_task(void *_data)
2009 {
2010         struct net_device *dev = _data;
2011         struct rtl8169_private *tp = netdev_priv(dev);
2012
2013         if (!netif_running(dev))
2014                 return;
2015
2016         rtl8169_wait_for_quiescence(dev);
2017
2018         rtl8169_rx_interrupt(dev, tp, tp->mmio_addr);
2019         rtl8169_tx_clear(tp);
2020
2021         if (tp->dirty_rx == tp->cur_rx) {
2022                 rtl8169_init_ring_indexes(tp);
2023                 rtl8169_hw_start(dev);
2024                 netif_wake_queue(dev);
2025         } else {
2026                 if (net_ratelimit()) {
2027                         struct rtl8169_private *tp = netdev_priv(dev);
2028
2029                         if (netif_msg_intr(tp)) {
2030                                 printk(PFX KERN_EMERG
2031                                        "%s: Rx buffers shortage\n", dev->name);
2032                         }
2033                 }
2034                 rtl8169_schedule_work(dev, rtl8169_reset_task);
2035         }
2036 }
2037
2038 static void rtl8169_tx_timeout(struct net_device *dev)
2039 {
2040         struct rtl8169_private *tp = netdev_priv(dev);
2041
2042         rtl8169_hw_reset(tp->mmio_addr);
2043
2044         /* Let's wait a bit while any (async) irq lands on */
2045         rtl8169_schedule_work(dev, rtl8169_reset_task);
2046 }
2047
2048 static int rtl8169_xmit_frags(struct rtl8169_private *tp, struct sk_buff *skb,
2049                               u32 opts1)
2050 {
2051         struct skb_shared_info *info = skb_shinfo(skb);
2052         unsigned int cur_frag, entry;
2053         struct TxDesc *txd;
2054
2055         entry = tp->cur_tx;
2056         for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) {
2057                 skb_frag_t *frag = info->frags + cur_frag;
2058                 dma_addr_t mapping;
2059                 u32 status, len;
2060                 void *addr;
2061
2062                 entry = (entry + 1) % NUM_TX_DESC;
2063
2064                 txd = tp->TxDescArray + entry;
2065                 len = frag->size;
2066                 addr = ((void *) page_address(frag->page)) + frag->page_offset;
2067                 mapping = pci_map_single(tp->pci_dev, addr, len, PCI_DMA_TODEVICE);
2068
2069                 /* anti gcc 2.95.3 bugware (sic) */
2070                 status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
2071
2072                 txd->opts1 = cpu_to_le32(status);
2073                 txd->addr = cpu_to_le64(mapping);
2074
2075                 tp->tx_skb[entry].len = len;
2076         }
2077
2078         if (cur_frag) {
2079                 tp->tx_skb[entry].skb = skb;
2080                 txd->opts1 |= cpu_to_le32(LastFrag);
2081         }
2082
2083         return cur_frag;
2084 }
2085
2086 static inline u32 rtl8169_tso_csum(struct sk_buff *skb, struct net_device *dev)
2087 {
2088         if (dev->features & NETIF_F_TSO) {
2089                 u32 mss = skb_shinfo(skb)->tso_size;
2090
2091                 if (mss)
2092                         return LargeSend | ((mss & MSSMask) << MSSShift);
2093         }
2094         if (skb->ip_summed == CHECKSUM_HW) {
2095                 const struct iphdr *ip = skb->nh.iph;
2096
2097                 if (ip->protocol == IPPROTO_TCP)
2098                         return IPCS | TCPCS;
2099                 else if (ip->protocol == IPPROTO_UDP)
2100                         return IPCS | UDPCS;
2101                 WARN_ON(1);     /* we need a WARN() */
2102         }
2103         return 0;
2104 }
2105
2106 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev)
2107 {
2108         struct rtl8169_private *tp = netdev_priv(dev);
2109         unsigned int frags, entry = tp->cur_tx % NUM_TX_DESC;
2110         struct TxDesc *txd = tp->TxDescArray + entry;
2111         void __iomem *ioaddr = tp->mmio_addr;
2112         dma_addr_t mapping;
2113         u32 status, len;
2114         u32 opts1;
2115         int ret = 0;
2116         
2117         if (unlikely(TX_BUFFS_AVAIL(tp) < skb_shinfo(skb)->nr_frags)) {
2118                 if (netif_msg_drv(tp)) {
2119                         printk(KERN_ERR
2120                                "%s: BUG! Tx Ring full when queue awake!\n",
2121                                dev->name);
2122                 }
2123                 goto err_stop;
2124         }
2125
2126         if (unlikely(le32_to_cpu(txd->opts1) & DescOwn))
2127                 goto err_stop;
2128
2129         opts1 = DescOwn | rtl8169_tso_csum(skb, dev);
2130
2131         frags = rtl8169_xmit_frags(tp, skb, opts1);
2132         if (frags) {
2133                 len = skb_headlen(skb);
2134                 opts1 |= FirstFrag;
2135         } else {
2136                 len = skb->len;
2137
2138                 if (unlikely(len < ETH_ZLEN)) {
2139                         skb = skb_padto(skb, ETH_ZLEN);
2140                         if (!skb)
2141                                 goto err_update_stats;
2142                         len = ETH_ZLEN;
2143                 }
2144
2145                 opts1 |= FirstFrag | LastFrag;
2146                 tp->tx_skb[entry].skb = skb;
2147         }
2148
2149         mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE);
2150
2151         tp->tx_skb[entry].len = len;
2152         txd->addr = cpu_to_le64(mapping);
2153         txd->opts2 = cpu_to_le32(rtl8169_tx_vlan_tag(tp, skb));
2154
2155         wmb();
2156
2157         /* anti gcc 2.95.3 bugware (sic) */
2158         status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
2159         txd->opts1 = cpu_to_le32(status);
2160
2161         dev->trans_start = jiffies;
2162
2163         tp->cur_tx += frags + 1;
2164
2165         smp_wmb();
2166
2167         RTL_W8(TxPoll, 0x40);   /* set polling bit */
2168
2169         if (TX_BUFFS_AVAIL(tp) < MAX_SKB_FRAGS) {
2170                 netif_stop_queue(dev);
2171                 smp_rmb();
2172                 if (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)
2173                         netif_wake_queue(dev);
2174         }
2175
2176 out:
2177         return ret;
2178
2179 err_stop:
2180         netif_stop_queue(dev);
2181         ret = 1;
2182 err_update_stats:
2183         tp->stats.tx_dropped++;
2184         goto out;
2185 }
2186
2187 static void rtl8169_pcierr_interrupt(struct net_device *dev)
2188 {
2189         struct rtl8169_private *tp = netdev_priv(dev);
2190         struct pci_dev *pdev = tp->pci_dev;
2191         void __iomem *ioaddr = tp->mmio_addr;
2192         u16 pci_status, pci_cmd;
2193
2194         pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);
2195         pci_read_config_word(pdev, PCI_STATUS, &pci_status);
2196
2197         if (netif_msg_intr(tp)) {
2198                 printk(KERN_ERR
2199                        "%s: PCI error (cmd = 0x%04x, status = 0x%04x).\n",
2200                        dev->name, pci_cmd, pci_status);
2201         }
2202
2203         /*
2204          * The recovery sequence below admits a very elaborated explanation:
2205          * - it seems to work;
2206          * - I did not see what else could be done.
2207          *
2208          * Feel free to adjust to your needs.
2209          */
2210         pci_write_config_word(pdev, PCI_COMMAND,
2211                               pci_cmd | PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
2212
2213         pci_write_config_word(pdev, PCI_STATUS,
2214                 pci_status & (PCI_STATUS_DETECTED_PARITY |
2215                 PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_REC_MASTER_ABORT |
2216                 PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_SIG_TARGET_ABORT));
2217
2218         /* The infamous DAC f*ckup only happens at boot time */
2219         if ((tp->cp_cmd & PCIDAC) && !tp->dirty_rx && !tp->cur_rx) {
2220                 if (netif_msg_intr(tp))
2221                         printk(KERN_INFO "%s: disabling PCI DAC.\n", dev->name);
2222                 tp->cp_cmd &= ~PCIDAC;
2223                 RTL_W16(CPlusCmd, tp->cp_cmd);
2224                 dev->features &= ~NETIF_F_HIGHDMA;
2225                 rtl8169_schedule_work(dev, rtl8169_reinit_task);
2226         }
2227
2228         rtl8169_hw_reset(ioaddr);
2229 }
2230
2231 static void
2232 rtl8169_tx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2233                      void __iomem *ioaddr)
2234 {
2235         unsigned int dirty_tx, tx_left;
2236
2237         assert(dev != NULL);
2238         assert(tp != NULL);
2239         assert(ioaddr != NULL);
2240
2241         dirty_tx = tp->dirty_tx;
2242         smp_rmb();
2243         tx_left = tp->cur_tx - dirty_tx;
2244
2245         while (tx_left > 0) {
2246                 unsigned int entry = dirty_tx % NUM_TX_DESC;
2247                 struct ring_info *tx_skb = tp->tx_skb + entry;
2248                 u32 len = tx_skb->len;
2249                 u32 status;
2250
2251                 rmb();
2252                 status = le32_to_cpu(tp->TxDescArray[entry].opts1);
2253                 if (status & DescOwn)
2254                         break;
2255
2256                 tp->stats.tx_bytes += len;
2257                 tp->stats.tx_packets++;
2258
2259                 rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb, tp->TxDescArray + entry);
2260
2261                 if (status & LastFrag) {
2262                         dev_kfree_skb_irq(tx_skb->skb);
2263                         tx_skb->skb = NULL;
2264                 }
2265                 dirty_tx++;
2266                 tx_left--;
2267         }
2268
2269         if (tp->dirty_tx != dirty_tx) {
2270                 tp->dirty_tx = dirty_tx;
2271                 smp_wmb();
2272                 if (netif_queue_stopped(dev) &&
2273                     (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)) {
2274                         netif_wake_queue(dev);
2275                 }
2276         }
2277 }
2278
2279 static inline int rtl8169_fragmented_frame(u32 status)
2280 {
2281         return (status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag);
2282 }
2283
2284 static inline void rtl8169_rx_csum(struct sk_buff *skb, struct RxDesc *desc)
2285 {
2286         u32 opts1 = le32_to_cpu(desc->opts1);
2287         u32 status = opts1 & RxProtoMask;
2288
2289         if (((status == RxProtoTCP) && !(opts1 & TCPFail)) ||
2290             ((status == RxProtoUDP) && !(opts1 & UDPFail)) ||
2291             ((status == RxProtoIP) && !(opts1 & IPFail)))
2292                 skb->ip_summed = CHECKSUM_UNNECESSARY;
2293         else
2294                 skb->ip_summed = CHECKSUM_NONE;
2295 }
2296
2297 static inline int rtl8169_try_rx_copy(struct sk_buff **sk_buff, int pkt_size,
2298                                       struct RxDesc *desc, int rx_buf_sz)
2299 {
2300         int ret = -1;
2301
2302         if (pkt_size < rx_copybreak) {
2303                 struct sk_buff *skb;
2304
2305                 skb = dev_alloc_skb(pkt_size + NET_IP_ALIGN);
2306                 if (skb) {
2307                         skb_reserve(skb, NET_IP_ALIGN);
2308                         eth_copy_and_sum(skb, sk_buff[0]->data, pkt_size, 0);
2309                         *sk_buff = skb;
2310                         rtl8169_mark_to_asic(desc, rx_buf_sz);
2311                         ret = 0;
2312                 }
2313         }
2314         return ret;
2315 }
2316
2317 static int
2318 rtl8169_rx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2319                      void __iomem *ioaddr)
2320 {
2321         unsigned int cur_rx, rx_left;
2322         unsigned int delta, count;
2323
2324         assert(dev != NULL);
2325         assert(tp != NULL);
2326         assert(ioaddr != NULL);
2327
2328         cur_rx = tp->cur_rx;
2329         rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
2330         rx_left = rtl8169_rx_quota(rx_left, (u32) dev->quota);
2331
2332         for (; rx_left > 0; rx_left--, cur_rx++) {
2333                 unsigned int entry = cur_rx % NUM_RX_DESC;
2334                 struct RxDesc *desc = tp->RxDescArray + entry;
2335                 u32 status;
2336
2337                 rmb();
2338                 status = le32_to_cpu(desc->opts1);
2339
2340                 if (status & DescOwn)
2341                         break;
2342                 if (unlikely(status & RxRES)) {
2343                         if (netif_msg_rx_err(tp)) {
2344                                 printk(KERN_INFO
2345                                        "%s: Rx ERROR. status = %08x\n",
2346                                        dev->name, status);
2347                         }
2348                         tp->stats.rx_errors++;
2349                         if (status & (RxRWT | RxRUNT))
2350                                 tp->stats.rx_length_errors++;
2351                         if (status & RxCRC)
2352                                 tp->stats.rx_crc_errors++;
2353                         rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
2354                 } else {
2355                         struct sk_buff *skb = tp->Rx_skbuff[entry];
2356                         int pkt_size = (status & 0x00001FFF) - 4;
2357                         void (*pci_action)(struct pci_dev *, dma_addr_t,
2358                                 size_t, int) = pci_dma_sync_single_for_device;
2359
2360                         /*
2361                          * The driver does not support incoming fragmented
2362                          * frames. They are seen as a symptom of over-mtu
2363                          * sized frames.
2364                          */
2365                         if (unlikely(rtl8169_fragmented_frame(status))) {
2366                                 tp->stats.rx_dropped++;
2367                                 tp->stats.rx_length_errors++;
2368                                 rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
2369                                 continue;
2370                         }
2371
2372                         rtl8169_rx_csum(skb, desc);
2373                         
2374                         pci_dma_sync_single_for_cpu(tp->pci_dev,
2375                                 le64_to_cpu(desc->addr), tp->rx_buf_sz,
2376                                 PCI_DMA_FROMDEVICE);
2377
2378                         if (rtl8169_try_rx_copy(&skb, pkt_size, desc,
2379                                                 tp->rx_buf_sz)) {
2380                                 pci_action = pci_unmap_single;
2381                                 tp->Rx_skbuff[entry] = NULL;
2382                         }
2383
2384                         pci_action(tp->pci_dev, le64_to_cpu(desc->addr),
2385                                    tp->rx_buf_sz, PCI_DMA_FROMDEVICE);
2386
2387                         skb->dev = dev;
2388                         skb_put(skb, pkt_size);
2389                         skb->protocol = eth_type_trans(skb, dev);
2390
2391                         if (rtl8169_rx_vlan_skb(tp, desc, skb) < 0)
2392                                 rtl8169_rx_skb(skb);
2393
2394                         dev->last_rx = jiffies;
2395                         tp->stats.rx_bytes += pkt_size;
2396                         tp->stats.rx_packets++;
2397                 }
2398         }
2399
2400         count = cur_rx - tp->cur_rx;
2401         tp->cur_rx = cur_rx;
2402
2403         delta = rtl8169_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx);
2404         if (!delta && count && netif_msg_intr(tp))
2405                 printk(KERN_INFO "%s: no Rx buffer allocated\n", dev->name);
2406         tp->dirty_rx += delta;
2407
2408         /*
2409          * FIXME: until there is periodic timer to try and refill the ring,
2410          * a temporary shortage may definitely kill the Rx process.
2411          * - disable the asic to try and avoid an overflow and kick it again
2412          *   after refill ?
2413          * - how do others driver handle this condition (Uh oh...).
2414          */
2415         if ((tp->dirty_rx + NUM_RX_DESC == tp->cur_rx) && netif_msg_intr(tp))
2416                 printk(KERN_EMERG "%s: Rx buffers exhausted\n", dev->name);
2417
2418         return count;
2419 }
2420
2421 /* The interrupt handler does all of the Rx thread work and cleans up after the Tx thread. */
2422 static irqreturn_t
2423 rtl8169_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
2424 {
2425         struct net_device *dev = (struct net_device *) dev_instance;
2426         struct rtl8169_private *tp = netdev_priv(dev);
2427         int boguscnt = max_interrupt_work;
2428         void __iomem *ioaddr = tp->mmio_addr;
2429         int status;
2430         int handled = 0;
2431
2432         do {
2433                 status = RTL_R16(IntrStatus);
2434
2435                 /* hotplug/major error/no more work/shared irq */
2436                 if ((status == 0xFFFF) || !status)
2437                         break;
2438
2439                 handled = 1;
2440
2441                 if (unlikely(!netif_running(dev))) {
2442                         rtl8169_asic_down(ioaddr);
2443                         goto out;
2444                 }
2445
2446                 status &= tp->intr_mask;
2447                 RTL_W16(IntrStatus,
2448                         (status & RxFIFOOver) ? (status | RxOverflow) : status);
2449
2450                 if (!(status & rtl8169_intr_mask))
2451                         break;
2452
2453                 if (unlikely(status & SYSErr)) {
2454                         rtl8169_pcierr_interrupt(dev);
2455                         break;
2456                 }
2457
2458                 if (status & LinkChg)
2459                         rtl8169_check_link_status(dev, tp, ioaddr);
2460
2461 #ifdef CONFIG_R8169_NAPI
2462                 RTL_W16(IntrMask, rtl8169_intr_mask & ~rtl8169_napi_event);
2463                 tp->intr_mask = ~rtl8169_napi_event;
2464
2465                 if (likely(netif_rx_schedule_prep(dev)))
2466                         __netif_rx_schedule(dev);
2467                 else if (netif_msg_intr(tp)) {
2468                         printk(KERN_INFO "%s: interrupt %04x taken in poll\n",
2469                                dev->name, status);      
2470                 }
2471                 break;
2472 #else
2473                 /* Rx interrupt */
2474                 if (status & (RxOK | RxOverflow | RxFIFOOver)) {
2475                         rtl8169_rx_interrupt(dev, tp, ioaddr);
2476                 }
2477                 /* Tx interrupt */
2478                 if (status & (TxOK | TxErr))
2479                         rtl8169_tx_interrupt(dev, tp, ioaddr);
2480 #endif
2481
2482                 boguscnt--;
2483         } while (boguscnt > 0);
2484
2485         if (boguscnt <= 0) {
2486                 if (netif_msg_intr(tp) && net_ratelimit() ) {
2487                         printk(KERN_WARNING
2488                                "%s: Too much work at interrupt!\n", dev->name);
2489                 }
2490                 /* Clear all interrupt sources. */
2491                 RTL_W16(IntrStatus, 0xffff);
2492         }
2493 out:
2494         return IRQ_RETVAL(handled);
2495 }
2496
2497 #ifdef CONFIG_R8169_NAPI
2498 static int rtl8169_poll(struct net_device *dev, int *budget)
2499 {
2500         unsigned int work_done, work_to_do = min(*budget, dev->quota);
2501         struct rtl8169_private *tp = netdev_priv(dev);
2502         void __iomem *ioaddr = tp->mmio_addr;
2503
2504         work_done = rtl8169_rx_interrupt(dev, tp, ioaddr);
2505         rtl8169_tx_interrupt(dev, tp, ioaddr);
2506
2507         *budget -= work_done;
2508         dev->quota -= work_done;
2509
2510         if (work_done < work_to_do) {
2511                 netif_rx_complete(dev);
2512                 tp->intr_mask = 0xffff;
2513                 /*
2514                  * 20040426: the barrier is not strictly required but the
2515                  * behavior of the irq handler could be less predictable
2516                  * without it. Btw, the lack of flush for the posted pci
2517                  * write is safe - FR
2518                  */
2519                 smp_wmb();
2520                 RTL_W16(IntrMask, rtl8169_intr_mask);
2521         }
2522
2523         return (work_done >= work_to_do);
2524 }
2525 #endif
2526
2527 static void rtl8169_down(struct net_device *dev)
2528 {
2529         struct rtl8169_private *tp = netdev_priv(dev);
2530         void __iomem *ioaddr = tp->mmio_addr;
2531         unsigned int poll_locked = 0;
2532
2533         rtl8169_delete_timer(dev);
2534
2535         netif_stop_queue(dev);
2536
2537         flush_scheduled_work();
2538
2539 core_down:
2540         spin_lock_irq(&tp->lock);
2541
2542         rtl8169_asic_down(ioaddr);
2543
2544         /* Update the error counts. */
2545         tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2546         RTL_W32(RxMissed, 0);
2547
2548         spin_unlock_irq(&tp->lock);
2549
2550         synchronize_irq(dev->irq);
2551
2552         if (!poll_locked) {
2553                 netif_poll_disable(dev);
2554                 poll_locked++;
2555         }
2556
2557         /* Give a racing hard_start_xmit a few cycles to complete. */
2558         synchronize_sched();  /* FIXME: should this be synchronize_irq()? */
2559
2560         /*
2561          * And now for the 50k$ question: are IRQ disabled or not ?
2562          *
2563          * Two paths lead here:
2564          * 1) dev->close
2565          *    -> netif_running() is available to sync the current code and the
2566          *       IRQ handler. See rtl8169_interrupt for details.
2567          * 2) dev->change_mtu
2568          *    -> rtl8169_poll can not be issued again and re-enable the
2569          *       interruptions. Let's simply issue the IRQ down sequence again.
2570          */
2571         if (RTL_R16(IntrMask))
2572                 goto core_down;
2573
2574         rtl8169_tx_clear(tp);
2575
2576         rtl8169_rx_clear(tp);
2577 }
2578
2579 static int rtl8169_close(struct net_device *dev)
2580 {
2581         struct rtl8169_private *tp = netdev_priv(dev);
2582         struct pci_dev *pdev = tp->pci_dev;
2583
2584         rtl8169_down(dev);
2585
2586         free_irq(dev->irq, dev);
2587
2588         netif_poll_enable(dev);
2589
2590         pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
2591                             tp->RxPhyAddr);
2592         pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
2593                             tp->TxPhyAddr);
2594         tp->TxDescArray = NULL;
2595         tp->RxDescArray = NULL;
2596
2597         return 0;
2598 }
2599
2600 static void
2601 rtl8169_set_rx_mode(struct net_device *dev)
2602 {
2603         struct rtl8169_private *tp = netdev_priv(dev);
2604         void __iomem *ioaddr = tp->mmio_addr;
2605         unsigned long flags;
2606         u32 mc_filter[2];       /* Multicast hash filter */
2607         int i, rx_mode;
2608         u32 tmp = 0;
2609
2610         if (dev->flags & IFF_PROMISC) {
2611                 /* Unconditionally log net taps. */
2612                 if (netif_msg_link(tp)) {
2613                         printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n",
2614                                dev->name);
2615                 }
2616                 rx_mode =
2617                     AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
2618                     AcceptAllPhys;
2619                 mc_filter[1] = mc_filter[0] = 0xffffffff;
2620         } else if ((dev->mc_count > multicast_filter_limit)
2621                    || (dev->flags & IFF_ALLMULTI)) {
2622                 /* Too many to filter perfectly -- accept all multicasts. */
2623                 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
2624                 mc_filter[1] = mc_filter[0] = 0xffffffff;
2625         } else {
2626                 struct dev_mc_list *mclist;
2627                 rx_mode = AcceptBroadcast | AcceptMyPhys;
2628                 mc_filter[1] = mc_filter[0] = 0;
2629                 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
2630                      i++, mclist = mclist->next) {
2631                         int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
2632                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2633                         rx_mode |= AcceptMulticast;
2634                 }
2635         }
2636
2637         spin_lock_irqsave(&tp->lock, flags);
2638
2639         tmp = rtl8169_rx_config | rx_mode |
2640               (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
2641
2642         RTL_W32(RxConfig, tmp);
2643         RTL_W32(MAR0 + 0, mc_filter[0]);
2644         RTL_W32(MAR0 + 4, mc_filter[1]);
2645
2646         spin_unlock_irqrestore(&tp->lock, flags);
2647 }
2648
2649 /**
2650  *  rtl8169_get_stats - Get rtl8169 read/write statistics
2651  *  @dev: The Ethernet Device to get statistics for
2652  *
2653  *  Get TX/RX statistics for rtl8169
2654  */
2655 static struct net_device_stats *rtl8169_get_stats(struct net_device *dev)
2656 {
2657         struct rtl8169_private *tp = netdev_priv(dev);
2658         void __iomem *ioaddr = tp->mmio_addr;
2659         unsigned long flags;
2660
2661         if (netif_running(dev)) {
2662                 spin_lock_irqsave(&tp->lock, flags);
2663                 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2664                 RTL_W32(RxMissed, 0);
2665                 spin_unlock_irqrestore(&tp->lock, flags);
2666         }
2667                 
2668         return &tp->stats;
2669 }
2670
2671 #ifdef CONFIG_PM
2672
2673 static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state)
2674 {
2675         struct net_device *dev = pci_get_drvdata(pdev);
2676         struct rtl8169_private *tp = netdev_priv(dev);
2677         void __iomem *ioaddr = tp->mmio_addr;
2678
2679         if (!netif_running(dev))
2680                 goto out;
2681
2682         netif_device_detach(dev);
2683         netif_stop_queue(dev);
2684
2685         spin_lock_irq(&tp->lock);
2686
2687         rtl8169_asic_down(ioaddr);
2688
2689         tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2690         RTL_W32(RxMissed, 0);
2691
2692         spin_unlock_irq(&tp->lock);
2693
2694         pci_save_state(pdev);
2695         pci_set_power_state(pdev, pci_choose_state(pdev, state));
2696 out:
2697         return 0;
2698 }
2699
2700 static int rtl8169_resume(struct pci_dev *pdev)
2701 {
2702         struct net_device *dev = pci_get_drvdata(pdev);
2703
2704         if (!netif_running(dev))
2705                 goto out;
2706
2707         netif_device_attach(dev);
2708
2709         pci_set_power_state(pdev, PCI_D0);
2710         pci_restore_state(pdev);
2711
2712         rtl8169_schedule_work(dev, rtl8169_reset_task);
2713 out:
2714         return 0;
2715 }
2716
2717 #endif /* CONFIG_PM */
2718
2719 static struct pci_driver rtl8169_pci_driver = {
2720         .name           = MODULENAME,
2721         .id_table       = rtl8169_pci_tbl,
2722         .probe          = rtl8169_init_one,
2723         .remove         = __devexit_p(rtl8169_remove_one),
2724 #ifdef CONFIG_PM
2725         .suspend        = rtl8169_suspend,
2726         .resume         = rtl8169_resume,
2727 #endif
2728 };
2729
2730 static int __init
2731 rtl8169_init_module(void)
2732 {
2733         return pci_module_init(&rtl8169_pci_driver);
2734 }
2735
2736 static void __exit
2737 rtl8169_cleanup_module(void)
2738 {
2739         pci_unregister_driver(&rtl8169_pci_driver);
2740 }
2741
2742 module_init(rtl8169_init_module);
2743 module_exit(rtl8169_cleanup_module);