1 /*************************************************************************
2 * myri10ge.c: Myricom Myri-10G Ethernet driver.
4 * Copyright (C) 2005 - 2007 Myricom, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of Myricom, Inc. nor the names of its contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
32 * If the eeprom on your board is not recent enough, you will need to get a
33 * newer firmware image at:
34 * http://www.myri.com/scs/download-Myri10GE.html
36 * Contact Information:
38 * Myricom, Inc., 325N Santa Anita Avenue, Arcadia, CA 91006
39 *************************************************************************/
41 #include <linux/tcp.h>
42 #include <linux/netdevice.h>
43 #include <linux/skbuff.h>
44 #include <linux/string.h>
45 #include <linux/module.h>
46 #include <linux/pci.h>
47 #include <linux/dma-mapping.h>
48 #include <linux/etherdevice.h>
49 #include <linux/if_ether.h>
50 #include <linux/if_vlan.h>
51 #include <linux/inet_lro.h>
53 #include <linux/inet.h>
55 #include <linux/ethtool.h>
56 #include <linux/firmware.h>
57 #include <linux/delay.h>
58 #include <linux/version.h>
59 #include <linux/timer.h>
60 #include <linux/vmalloc.h>
61 #include <linux/crc32.h>
62 #include <linux/moduleparam.h>
64 #include <linux/log2.h>
65 #include <net/checksum.h>
68 #include <asm/byteorder.h>
70 #include <asm/processor.h>
75 #include "myri10ge_mcp.h"
76 #include "myri10ge_mcp_gen_header.h"
78 #define MYRI10GE_VERSION_STR "1.3.2-1.269"
80 MODULE_DESCRIPTION("Myricom 10G driver (10GbE)");
81 MODULE_AUTHOR("Maintainer: help@myri.com");
82 MODULE_VERSION(MYRI10GE_VERSION_STR);
83 MODULE_LICENSE("Dual BSD/GPL");
85 #define MYRI10GE_MAX_ETHER_MTU 9014
87 #define MYRI10GE_ETH_STOPPED 0
88 #define MYRI10GE_ETH_STOPPING 1
89 #define MYRI10GE_ETH_STARTING 2
90 #define MYRI10GE_ETH_RUNNING 3
91 #define MYRI10GE_ETH_OPEN_FAILED 4
93 #define MYRI10GE_EEPROM_STRINGS_SIZE 256
94 #define MYRI10GE_MAX_SEND_DESC_TSO ((65536 / 2048) * 2)
95 #define MYRI10GE_MAX_LRO_DESCRIPTORS 8
96 #define MYRI10GE_LRO_MAX_PKTS 64
98 #define MYRI10GE_NO_CONFIRM_DATA htonl(0xffffffff)
99 #define MYRI10GE_NO_RESPONSE_RESULT 0xffffffff
101 #define MYRI10GE_ALLOC_ORDER 0
102 #define MYRI10GE_ALLOC_SIZE ((1 << MYRI10GE_ALLOC_ORDER) * PAGE_SIZE)
103 #define MYRI10GE_MAX_FRAGS_PER_FRAME (MYRI10GE_MAX_ETHER_MTU/MYRI10GE_ALLOC_SIZE + 1)
105 struct myri10ge_rx_buffer_state {
108 DECLARE_PCI_UNMAP_ADDR(bus)
109 DECLARE_PCI_UNMAP_LEN(len)
112 struct myri10ge_tx_buffer_state {
115 DECLARE_PCI_UNMAP_ADDR(bus)
116 DECLARE_PCI_UNMAP_LEN(len)
119 struct myri10ge_cmd {
125 struct myri10ge_rx_buf {
126 struct mcp_kreq_ether_recv __iomem *lanai; /* lanai ptr for recv ring */
127 u8 __iomem *wc_fifo; /* w/c rx dma addr fifo address */
128 struct mcp_kreq_ether_recv *shadow; /* host shadow of recv ring */
129 struct myri10ge_rx_buffer_state *info;
136 int mask; /* number of rx slots -1 */
140 struct myri10ge_tx_buf {
141 struct mcp_kreq_ether_send __iomem *lanai; /* lanai ptr for sendq */
142 u8 __iomem *wc_fifo; /* w/c send fifo address */
143 struct mcp_kreq_ether_send *req_list; /* host shadow of sendq */
145 struct myri10ge_tx_buffer_state *info;
146 int mask; /* number of transmit slots -1 */
147 int boundary; /* boundary transmits cannot cross */
148 int req ____cacheline_aligned; /* transmit slots submitted */
149 int pkt_start; /* packets started */
150 int done ____cacheline_aligned; /* transmit slots completed */
151 int pkt_done; /* packets completed */
154 struct myri10ge_rx_done {
155 struct mcp_slot *entry;
159 struct net_lro_mgr lro_mgr;
160 struct net_lro_desc lro_desc[MYRI10GE_MAX_LRO_DESCRIPTORS];
163 struct myri10ge_priv {
164 int running; /* running? */
165 int csum_flag; /* rx_csums? */
166 struct myri10ge_tx_buf tx; /* transmit ring */
167 struct myri10ge_rx_buf rx_small;
168 struct myri10ge_rx_buf rx_big;
169 struct myri10ge_rx_done rx_done;
172 struct net_device *dev;
173 struct napi_struct napi;
174 struct net_device_stats stats;
177 unsigned long board_span;
178 unsigned long iomem_base;
179 __be32 __iomem *irq_claim;
180 __be32 __iomem *irq_deassert;
181 char *mac_addr_string;
182 struct mcp_cmd_response *cmd;
184 struct mcp_irq_data *fw_stats;
185 dma_addr_t fw_stats_bus;
186 struct pci_dev *pdev;
189 unsigned int rdma_tags_available;
191 __be32 __iomem *intr_coal_delay_ptr;
197 wait_queue_head_t down_wq;
198 struct work_struct watchdog_work;
199 struct timer_list watchdog_timer;
200 int watchdog_tx_done;
207 char eeprom_strings[MYRI10GE_EEPROM_STRINGS_SIZE];
208 char fw_version[128];
212 int adopted_rx_filter_bug;
213 u8 mac_addr[6]; /* eeprom mac address */
214 unsigned long serial_number;
215 int vendor_specific_offset;
216 int fw_multicast_support;
224 static char *myri10ge_fw_unaligned = "myri10ge_ethp_z8e.dat";
225 static char *myri10ge_fw_aligned = "myri10ge_eth_z8e.dat";
227 static char *myri10ge_fw_name = NULL;
228 module_param(myri10ge_fw_name, charp, S_IRUGO | S_IWUSR);
229 MODULE_PARM_DESC(myri10ge_fw_name, "Firmware image name\n");
231 static int myri10ge_ecrc_enable = 1;
232 module_param(myri10ge_ecrc_enable, int, S_IRUGO);
233 MODULE_PARM_DESC(myri10ge_ecrc_enable, "Enable Extended CRC on PCI-E\n");
235 static int myri10ge_max_intr_slots = 1024;
236 module_param(myri10ge_max_intr_slots, int, S_IRUGO);
237 MODULE_PARM_DESC(myri10ge_max_intr_slots, "Interrupt queue slots\n");
239 static int myri10ge_small_bytes = -1; /* -1 == auto */
240 module_param(myri10ge_small_bytes, int, S_IRUGO | S_IWUSR);
241 MODULE_PARM_DESC(myri10ge_small_bytes, "Threshold of small packets\n");
243 static int myri10ge_msi = 1; /* enable msi by default */
244 module_param(myri10ge_msi, int, S_IRUGO | S_IWUSR);
245 MODULE_PARM_DESC(myri10ge_msi, "Enable Message Signalled Interrupts\n");
247 static int myri10ge_intr_coal_delay = 75;
248 module_param(myri10ge_intr_coal_delay, int, S_IRUGO);
249 MODULE_PARM_DESC(myri10ge_intr_coal_delay, "Interrupt coalescing delay\n");
251 static int myri10ge_flow_control = 1;
252 module_param(myri10ge_flow_control, int, S_IRUGO);
253 MODULE_PARM_DESC(myri10ge_flow_control, "Pause parameter\n");
255 static int myri10ge_deassert_wait = 1;
256 module_param(myri10ge_deassert_wait, int, S_IRUGO | S_IWUSR);
257 MODULE_PARM_DESC(myri10ge_deassert_wait,
258 "Wait when deasserting legacy interrupts\n");
260 static int myri10ge_force_firmware = 0;
261 module_param(myri10ge_force_firmware, int, S_IRUGO);
262 MODULE_PARM_DESC(myri10ge_force_firmware,
263 "Force firmware to assume aligned completions\n");
265 static int myri10ge_initial_mtu = MYRI10GE_MAX_ETHER_MTU - ETH_HLEN;
266 module_param(myri10ge_initial_mtu, int, S_IRUGO);
267 MODULE_PARM_DESC(myri10ge_initial_mtu, "Initial MTU\n");
269 static int myri10ge_napi_weight = 64;
270 module_param(myri10ge_napi_weight, int, S_IRUGO);
271 MODULE_PARM_DESC(myri10ge_napi_weight, "Set NAPI weight\n");
273 static int myri10ge_watchdog_timeout = 1;
274 module_param(myri10ge_watchdog_timeout, int, S_IRUGO);
275 MODULE_PARM_DESC(myri10ge_watchdog_timeout, "Set watchdog timeout\n");
277 static int myri10ge_max_irq_loops = 1048576;
278 module_param(myri10ge_max_irq_loops, int, S_IRUGO);
279 MODULE_PARM_DESC(myri10ge_max_irq_loops,
280 "Set stuck legacy IRQ detection threshold\n");
282 #define MYRI10GE_MSG_DEFAULT NETIF_MSG_LINK
284 static int myri10ge_debug = -1; /* defaults above */
285 module_param(myri10ge_debug, int, 0);
286 MODULE_PARM_DESC(myri10ge_debug, "Debug level (0=none,...,16=all)");
288 static int myri10ge_lro = 1;
289 module_param(myri10ge_lro, int, S_IRUGO);
290 MODULE_PARM_DESC(myri10ge_lro, "Enable large receive offload\n");
292 static int myri10ge_lro_max_pkts = MYRI10GE_LRO_MAX_PKTS;
293 module_param(myri10ge_lro_max_pkts, int, S_IRUGO);
294 MODULE_PARM_DESC(myri10ge_lro, "Number of LRO packets to be aggregated\n");
296 static int myri10ge_fill_thresh = 256;
297 module_param(myri10ge_fill_thresh, int, S_IRUGO | S_IWUSR);
298 MODULE_PARM_DESC(myri10ge_fill_thresh, "Number of empty rx slots allowed\n");
300 static int myri10ge_reset_recover = 1;
302 static int myri10ge_wcfifo = 0;
303 module_param(myri10ge_wcfifo, int, S_IRUGO);
304 MODULE_PARM_DESC(myri10ge_wcfifo, "Enable WC Fifo when WC is enabled\n");
306 #define MYRI10GE_FW_OFFSET 1024*1024
307 #define MYRI10GE_HIGHPART_TO_U32(X) \
308 (sizeof (X) == 8) ? ((u32)((u64)(X) >> 32)) : (0)
309 #define MYRI10GE_LOWPART_TO_U32(X) ((u32)(X))
311 #define myri10ge_pio_copy(to,from,size) __iowrite64_copy(to,from,size/8)
313 static void myri10ge_set_multicast_list(struct net_device *dev);
315 static inline void put_be32(__be32 val, __be32 __iomem * p)
317 __raw_writel((__force __u32) val, (__force void __iomem *)p);
321 myri10ge_send_cmd(struct myri10ge_priv *mgp, u32 cmd,
322 struct myri10ge_cmd *data, int atomic)
325 char buf_bytes[sizeof(*buf) + 8];
326 struct mcp_cmd_response *response = mgp->cmd;
327 char __iomem *cmd_addr = mgp->sram + MXGEFW_ETH_CMD;
328 u32 dma_low, dma_high, result, value;
331 /* ensure buf is aligned to 8 bytes */
332 buf = (struct mcp_cmd *)ALIGN((unsigned long)buf_bytes, 8);
334 buf->data0 = htonl(data->data0);
335 buf->data1 = htonl(data->data1);
336 buf->data2 = htonl(data->data2);
337 buf->cmd = htonl(cmd);
338 dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
339 dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
341 buf->response_addr.low = htonl(dma_low);
342 buf->response_addr.high = htonl(dma_high);
343 response->result = htonl(MYRI10GE_NO_RESPONSE_RESULT);
345 myri10ge_pio_copy(cmd_addr, buf, sizeof(*buf));
347 /* wait up to 15ms. Longest command is the DMA benchmark,
348 * which is capped at 5ms, but runs from a timeout handler
349 * that runs every 7.8ms. So a 15ms timeout leaves us with
353 /* if atomic is set, do not sleep,
354 * and try to get the completion quickly
355 * (1ms will be enough for those commands) */
356 for (sleep_total = 0;
358 && response->result == htonl(MYRI10GE_NO_RESPONSE_RESULT);
362 /* use msleep for most command */
363 for (sleep_total = 0;
365 && response->result == htonl(MYRI10GE_NO_RESPONSE_RESULT);
370 result = ntohl(response->result);
371 value = ntohl(response->data);
372 if (result != MYRI10GE_NO_RESPONSE_RESULT) {
376 } else if (result == MXGEFW_CMD_UNKNOWN) {
378 } else if (result == MXGEFW_CMD_ERROR_UNALIGNED) {
381 dev_err(&mgp->pdev->dev,
382 "command %d failed, result = %d\n",
388 dev_err(&mgp->pdev->dev, "command %d timed out, result = %d\n",
394 * The eeprom strings on the lanaiX have the format
397 * PT:ddd mmm xx xx:xx:xx xx\0
398 * PV:ddd mmm xx xx:xx:xx xx\0
400 static int myri10ge_read_mac_addr(struct myri10ge_priv *mgp)
405 ptr = mgp->eeprom_strings;
406 limit = mgp->eeprom_strings + MYRI10GE_EEPROM_STRINGS_SIZE;
408 while (*ptr != '\0' && ptr < limit) {
409 if (memcmp(ptr, "MAC=", 4) == 0) {
411 mgp->mac_addr_string = ptr;
412 for (i = 0; i < 6; i++) {
413 if ((ptr + 2) > limit)
416 simple_strtoul(ptr, &ptr, 16);
420 if (memcmp((const void *)ptr, "SN=", 3) == 0) {
422 mgp->serial_number = simple_strtoul(ptr, &ptr, 10);
424 while (ptr < limit && *ptr++) ;
430 dev_err(&mgp->pdev->dev, "failed to parse eeprom_strings\n");
435 * Enable or disable periodic RDMAs from the host to make certain
436 * chipsets resend dropped PCIe messages
439 static void myri10ge_dummy_rdma(struct myri10ge_priv *mgp, int enable)
441 char __iomem *submit;
443 u32 dma_low, dma_high;
446 /* clear confirmation addr */
450 /* send a rdma command to the PCIe engine, and wait for the
451 * response in the confirmation address. The firmware should
452 * write a -1 there to indicate it is alive and well
454 dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
455 dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
457 buf[0] = htonl(dma_high); /* confirm addr MSW */
458 buf[1] = htonl(dma_low); /* confirm addr LSW */
459 buf[2] = MYRI10GE_NO_CONFIRM_DATA; /* confirm data */
460 buf[3] = htonl(dma_high); /* dummy addr MSW */
461 buf[4] = htonl(dma_low); /* dummy addr LSW */
462 buf[5] = htonl(enable); /* enable? */
464 submit = mgp->sram + MXGEFW_BOOT_DUMMY_RDMA;
466 myri10ge_pio_copy(submit, &buf, sizeof(buf));
467 for (i = 0; mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA && i < 20; i++)
469 if (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA)
470 dev_err(&mgp->pdev->dev, "dummy rdma %s failed\n",
471 (enable ? "enable" : "disable"));
475 myri10ge_validate_firmware(struct myri10ge_priv *mgp,
476 struct mcp_gen_header *hdr)
478 struct device *dev = &mgp->pdev->dev;
480 /* check firmware type */
481 if (ntohl(hdr->mcp_type) != MCP_TYPE_ETH) {
482 dev_err(dev, "Bad firmware type: 0x%x\n", ntohl(hdr->mcp_type));
486 /* save firmware version for ethtool */
487 strncpy(mgp->fw_version, hdr->version, sizeof(mgp->fw_version));
489 sscanf(mgp->fw_version, "%d.%d.%d", &mgp->fw_ver_major,
490 &mgp->fw_ver_minor, &mgp->fw_ver_tiny);
492 if (!(mgp->fw_ver_major == MXGEFW_VERSION_MAJOR
493 && mgp->fw_ver_minor == MXGEFW_VERSION_MINOR)) {
494 dev_err(dev, "Found firmware version %s\n", mgp->fw_version);
495 dev_err(dev, "Driver needs %d.%d\n", MXGEFW_VERSION_MAJOR,
496 MXGEFW_VERSION_MINOR);
502 static int myri10ge_load_hotplug_firmware(struct myri10ge_priv *mgp, u32 * size)
504 unsigned crc, reread_crc;
505 const struct firmware *fw;
506 struct device *dev = &mgp->pdev->dev;
507 struct mcp_gen_header *hdr;
512 if ((status = request_firmware(&fw, mgp->fw_name, dev)) < 0) {
513 dev_err(dev, "Unable to load %s firmware image via hotplug\n",
516 goto abort_with_nothing;
521 if (fw->size >= mgp->sram_size - MYRI10GE_FW_OFFSET ||
522 fw->size < MCP_HEADER_PTR_OFFSET + 4) {
523 dev_err(dev, "Firmware size invalid:%d\n", (int)fw->size);
529 hdr_offset = ntohl(*(__be32 *) (fw->data + MCP_HEADER_PTR_OFFSET));
530 if ((hdr_offset & 3) || hdr_offset + sizeof(*hdr) > fw->size) {
531 dev_err(dev, "Bad firmware file\n");
535 hdr = (void *)(fw->data + hdr_offset);
537 status = myri10ge_validate_firmware(mgp, hdr);
541 crc = crc32(~0, fw->data, fw->size);
542 for (i = 0; i < fw->size; i += 256) {
543 myri10ge_pio_copy(mgp->sram + MYRI10GE_FW_OFFSET + i,
545 min(256U, (unsigned)(fw->size - i)));
549 /* corruption checking is good for parity recovery and buggy chipset */
550 memcpy_fromio(fw->data, mgp->sram + MYRI10GE_FW_OFFSET, fw->size);
551 reread_crc = crc32(~0, fw->data, fw->size);
552 if (crc != reread_crc) {
553 dev_err(dev, "CRC failed(fw-len=%u), got 0x%x (expect 0x%x)\n",
554 (unsigned)fw->size, reread_crc, crc);
558 *size = (u32) fw->size;
561 release_firmware(fw);
567 static int myri10ge_adopt_running_firmware(struct myri10ge_priv *mgp)
569 struct mcp_gen_header *hdr;
570 struct device *dev = &mgp->pdev->dev;
571 const size_t bytes = sizeof(struct mcp_gen_header);
575 /* find running firmware header */
576 hdr_offset = ntohl(__raw_readl(mgp->sram + MCP_HEADER_PTR_OFFSET));
578 if ((hdr_offset & 3) || hdr_offset + sizeof(*hdr) > mgp->sram_size) {
579 dev_err(dev, "Running firmware has bad header offset (%d)\n",
584 /* copy header of running firmware from SRAM to host memory to
585 * validate firmware */
586 hdr = kmalloc(bytes, GFP_KERNEL);
588 dev_err(dev, "could not malloc firmware hdr\n");
591 memcpy_fromio(hdr, mgp->sram + hdr_offset, bytes);
592 status = myri10ge_validate_firmware(mgp, hdr);
595 /* check to see if adopted firmware has bug where adopting
596 * it will cause broadcasts to be filtered unless the NIC
597 * is kept in ALLMULTI mode */
598 if (mgp->fw_ver_major == 1 && mgp->fw_ver_minor == 4 &&
599 mgp->fw_ver_tiny >= 4 && mgp->fw_ver_tiny <= 11) {
600 mgp->adopted_rx_filter_bug = 1;
601 dev_warn(dev, "Adopting fw %d.%d.%d: "
602 "working around rx filter bug\n",
603 mgp->fw_ver_major, mgp->fw_ver_minor,
609 static int myri10ge_load_firmware(struct myri10ge_priv *mgp)
611 char __iomem *submit;
613 u32 dma_low, dma_high, size;
617 status = myri10ge_load_hotplug_firmware(mgp, &size);
619 dev_warn(&mgp->pdev->dev, "hotplug firmware loading failed\n");
621 /* Do not attempt to adopt firmware if there
626 status = myri10ge_adopt_running_firmware(mgp);
628 dev_err(&mgp->pdev->dev,
629 "failed to adopt running firmware\n");
632 dev_info(&mgp->pdev->dev,
633 "Successfully adopted running firmware\n");
634 if (mgp->tx.boundary == 4096) {
635 dev_warn(&mgp->pdev->dev,
636 "Using firmware currently running on NIC"
638 dev_warn(&mgp->pdev->dev,
639 "performance consider loading optimized "
641 dev_warn(&mgp->pdev->dev, "via hotplug\n");
644 mgp->fw_name = "adopted";
645 mgp->tx.boundary = 2048;
649 /* clear confirmation addr */
653 /* send a reload command to the bootstrap MCP, and wait for the
654 * response in the confirmation address. The firmware should
655 * write a -1 there to indicate it is alive and well
657 dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
658 dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
660 buf[0] = htonl(dma_high); /* confirm addr MSW */
661 buf[1] = htonl(dma_low); /* confirm addr LSW */
662 buf[2] = MYRI10GE_NO_CONFIRM_DATA; /* confirm data */
664 /* FIX: All newest firmware should un-protect the bottom of
665 * the sram before handoff. However, the very first interfaces
666 * do not. Therefore the handoff copy must skip the first 8 bytes
668 buf[3] = htonl(MYRI10GE_FW_OFFSET + 8); /* where the code starts */
669 buf[4] = htonl(size - 8); /* length of code */
670 buf[5] = htonl(8); /* where to copy to */
671 buf[6] = htonl(0); /* where to jump to */
673 submit = mgp->sram + MXGEFW_BOOT_HANDOFF;
675 myri10ge_pio_copy(submit, &buf, sizeof(buf));
680 while (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA && i < 20) {
684 if (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA) {
685 dev_err(&mgp->pdev->dev, "handoff failed\n");
688 dev_info(&mgp->pdev->dev, "handoff confirmed\n");
689 myri10ge_dummy_rdma(mgp, 1);
694 static int myri10ge_update_mac_address(struct myri10ge_priv *mgp, u8 * addr)
696 struct myri10ge_cmd cmd;
699 cmd.data0 = ((addr[0] << 24) | (addr[1] << 16)
700 | (addr[2] << 8) | addr[3]);
702 cmd.data1 = ((addr[4] << 8) | (addr[5]));
704 status = myri10ge_send_cmd(mgp, MXGEFW_SET_MAC_ADDRESS, &cmd, 0);
708 static int myri10ge_change_pause(struct myri10ge_priv *mgp, int pause)
710 struct myri10ge_cmd cmd;
713 ctl = pause ? MXGEFW_ENABLE_FLOW_CONTROL : MXGEFW_DISABLE_FLOW_CONTROL;
714 status = myri10ge_send_cmd(mgp, ctl, &cmd, 0);
718 "myri10ge: %s: Failed to set flow control mode\n",
727 myri10ge_change_promisc(struct myri10ge_priv *mgp, int promisc, int atomic)
729 struct myri10ge_cmd cmd;
732 ctl = promisc ? MXGEFW_ENABLE_PROMISC : MXGEFW_DISABLE_PROMISC;
733 status = myri10ge_send_cmd(mgp, ctl, &cmd, atomic);
735 printk(KERN_ERR "myri10ge: %s: Failed to set promisc mode\n",
739 static int myri10ge_dma_test(struct myri10ge_priv *mgp, int test_type)
741 struct myri10ge_cmd cmd;
744 struct page *dmatest_page;
745 dma_addr_t dmatest_bus;
748 dmatest_page = alloc_page(GFP_KERNEL);
751 dmatest_bus = pci_map_page(mgp->pdev, dmatest_page, 0, PAGE_SIZE,
754 /* Run a small DMA test.
755 * The magic multipliers to the length tell the firmware
756 * to do DMA read, write, or read+write tests. The
757 * results are returned in cmd.data0. The upper 16
758 * bits or the return is the number of transfers completed.
759 * The lower 16 bits is the time in 0.5us ticks that the
760 * transfers took to complete.
763 len = mgp->tx.boundary;
765 cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
766 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
767 cmd.data2 = len * 0x10000;
768 status = myri10ge_send_cmd(mgp, test_type, &cmd, 0);
773 mgp->read_dma = ((cmd.data0 >> 16) * len * 2) / (cmd.data0 & 0xffff);
774 cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
775 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
776 cmd.data2 = len * 0x1;
777 status = myri10ge_send_cmd(mgp, test_type, &cmd, 0);
782 mgp->write_dma = ((cmd.data0 >> 16) * len * 2) / (cmd.data0 & 0xffff);
784 cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
785 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
786 cmd.data2 = len * 0x10001;
787 status = myri10ge_send_cmd(mgp, test_type, &cmd, 0);
792 mgp->read_write_dma = ((cmd.data0 >> 16) * len * 2 * 2) /
793 (cmd.data0 & 0xffff);
796 pci_unmap_page(mgp->pdev, dmatest_bus, PAGE_SIZE, DMA_BIDIRECTIONAL);
797 put_page(dmatest_page);
799 if (status != 0 && test_type != MXGEFW_CMD_UNALIGNED_TEST)
800 dev_warn(&mgp->pdev->dev, "DMA %s benchmark failed: %d\n",
806 static int myri10ge_reset(struct myri10ge_priv *mgp)
808 struct myri10ge_cmd cmd;
812 /* try to send a reset command to the card to see if it
814 memset(&cmd, 0, sizeof(cmd));
815 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_RESET, &cmd, 0);
817 dev_err(&mgp->pdev->dev, "failed reset\n");
821 (void)myri10ge_dma_test(mgp, MXGEFW_DMA_TEST);
823 /* Now exchange information about interrupts */
825 bytes = myri10ge_max_intr_slots * sizeof(*mgp->rx_done.entry);
826 memset(mgp->rx_done.entry, 0, bytes);
827 cmd.data0 = (u32) bytes;
828 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_SIZE, &cmd, 0);
829 cmd.data0 = MYRI10GE_LOWPART_TO_U32(mgp->rx_done.bus);
830 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(mgp->rx_done.bus);
831 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_DMA, &cmd, 0);
834 myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_IRQ_ACK_OFFSET, &cmd, 0);
835 mgp->irq_claim = (__iomem __be32 *) (mgp->sram + cmd.data0);
836 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET,
838 mgp->irq_deassert = (__iomem __be32 *) (mgp->sram + cmd.data0);
840 status |= myri10ge_send_cmd
841 (mgp, MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET, &cmd, 0);
842 mgp->intr_coal_delay_ptr = (__iomem __be32 *) (mgp->sram + cmd.data0);
844 dev_err(&mgp->pdev->dev, "failed set interrupt parameters\n");
847 put_be32(htonl(mgp->intr_coal_delay), mgp->intr_coal_delay_ptr);
849 memset(mgp->rx_done.entry, 0, bytes);
851 /* reset mcp/driver shared state back to 0 */
854 mgp->tx.pkt_start = 0;
855 mgp->tx.pkt_done = 0;
857 mgp->rx_small.cnt = 0;
858 mgp->rx_done.idx = 0;
859 mgp->rx_done.cnt = 0;
860 mgp->link_changes = 0;
861 status = myri10ge_update_mac_address(mgp, mgp->dev->dev_addr);
862 myri10ge_change_pause(mgp, mgp->pause);
863 myri10ge_set_multicast_list(mgp->dev);
868 myri10ge_submit_8rx(struct mcp_kreq_ether_recv __iomem * dst,
869 struct mcp_kreq_ether_recv *src)
874 src->addr_low = htonl(DMA_32BIT_MASK);
875 myri10ge_pio_copy(dst, src, 4 * sizeof(*src));
877 myri10ge_pio_copy(dst + 4, src + 4, 4 * sizeof(*src));
880 put_be32(low, &dst->addr_low);
884 static inline void myri10ge_vlan_ip_csum(struct sk_buff *skb, __wsum hw_csum)
886 struct vlan_hdr *vh = (struct vlan_hdr *)(skb->data);
888 if ((skb->protocol == htons(ETH_P_8021Q)) &&
889 (vh->h_vlan_encapsulated_proto == htons(ETH_P_IP) ||
890 vh->h_vlan_encapsulated_proto == htons(ETH_P_IPV6))) {
892 skb->ip_summed = CHECKSUM_COMPLETE;
897 myri10ge_rx_skb_build(struct sk_buff *skb, u8 * va,
898 struct skb_frag_struct *rx_frags, int len, int hlen)
900 struct skb_frag_struct *skb_frags;
902 skb->len = skb->data_len = len;
903 skb->truesize = len + sizeof(struct sk_buff);
904 /* attach the page(s) */
906 skb_frags = skb_shinfo(skb)->frags;
908 memcpy(skb_frags, rx_frags, sizeof(*skb_frags));
909 len -= rx_frags->size;
912 skb_shinfo(skb)->nr_frags++;
915 /* pskb_may_pull is not available in irq context, but
916 * skb_pull() (for ether_pad and eth_type_trans()) requires
917 * the beginning of the packet in skb_headlen(), move it
919 skb_copy_to_linear_data(skb, va, hlen);
920 skb_shinfo(skb)->frags[0].page_offset += hlen;
921 skb_shinfo(skb)->frags[0].size -= hlen;
922 skb->data_len -= hlen;
924 skb_pull(skb, MXGEFW_PAD);
928 myri10ge_alloc_rx_pages(struct myri10ge_priv *mgp, struct myri10ge_rx_buf *rx,
929 int bytes, int watchdog)
934 if (unlikely(rx->watchdog_needed && !watchdog))
937 /* try to refill entire ring */
938 while (rx->fill_cnt != (rx->cnt + rx->mask + 1)) {
939 idx = rx->fill_cnt & rx->mask;
940 if (rx->page_offset + bytes <= MYRI10GE_ALLOC_SIZE) {
941 /* we can use part of previous page */
944 /* we need a new page */
946 alloc_pages(GFP_ATOMIC | __GFP_COMP,
947 MYRI10GE_ALLOC_ORDER);
948 if (unlikely(page == NULL)) {
949 if (rx->fill_cnt - rx->cnt < 16)
950 rx->watchdog_needed = 1;
955 rx->bus = pci_map_page(mgp->pdev, page, 0,
959 rx->info[idx].page = rx->page;
960 rx->info[idx].page_offset = rx->page_offset;
961 /* note that this is the address of the start of the
963 pci_unmap_addr_set(&rx->info[idx], bus, rx->bus);
964 rx->shadow[idx].addr_low =
965 htonl(MYRI10GE_LOWPART_TO_U32(rx->bus) + rx->page_offset);
966 rx->shadow[idx].addr_high =
967 htonl(MYRI10GE_HIGHPART_TO_U32(rx->bus));
969 /* start next packet on a cacheline boundary */
970 rx->page_offset += SKB_DATA_ALIGN(bytes);
972 #if MYRI10GE_ALLOC_SIZE > 4096
973 /* don't cross a 4KB boundary */
974 if ((rx->page_offset >> 12) !=
975 ((rx->page_offset + bytes - 1) >> 12))
976 rx->page_offset = (rx->page_offset + 4096) & ~4095;
980 /* copy 8 descriptors to the firmware at a time */
981 if ((idx & 7) == 7) {
982 if (rx->wc_fifo == NULL)
983 myri10ge_submit_8rx(&rx->lanai[idx - 7],
984 &rx->shadow[idx - 7]);
987 myri10ge_pio_copy(rx->wc_fifo,
988 &rx->shadow[idx - 7], 64);
995 myri10ge_unmap_rx_page(struct pci_dev *pdev,
996 struct myri10ge_rx_buffer_state *info, int bytes)
998 /* unmap the recvd page if we're the only or last user of it */
999 if (bytes >= MYRI10GE_ALLOC_SIZE / 2 ||
1000 (info->page_offset + 2 * bytes) > MYRI10GE_ALLOC_SIZE) {
1001 pci_unmap_page(pdev, (pci_unmap_addr(info, bus)
1002 & ~(MYRI10GE_ALLOC_SIZE - 1)),
1003 MYRI10GE_ALLOC_SIZE, PCI_DMA_FROMDEVICE);
1007 #define MYRI10GE_HLEN 64 /* The number of bytes to copy from a
1008 * page into an skb */
1011 myri10ge_rx_done(struct myri10ge_priv *mgp, struct myri10ge_rx_buf *rx,
1012 int bytes, int len, __wsum csum)
1014 struct sk_buff *skb;
1015 struct skb_frag_struct rx_frags[MYRI10GE_MAX_FRAGS_PER_FRAME];
1016 int i, idx, hlen, remainder;
1017 struct pci_dev *pdev = mgp->pdev;
1018 struct net_device *dev = mgp->dev;
1022 idx = rx->cnt & rx->mask;
1023 va = page_address(rx->info[idx].page) + rx->info[idx].page_offset;
1025 /* Fill skb_frag_struct(s) with data from our receive */
1026 for (i = 0, remainder = len; remainder > 0; i++) {
1027 myri10ge_unmap_rx_page(pdev, &rx->info[idx], bytes);
1028 rx_frags[i].page = rx->info[idx].page;
1029 rx_frags[i].page_offset = rx->info[idx].page_offset;
1030 if (remainder < MYRI10GE_ALLOC_SIZE)
1031 rx_frags[i].size = remainder;
1033 rx_frags[i].size = MYRI10GE_ALLOC_SIZE;
1035 idx = rx->cnt & rx->mask;
1036 remainder -= MYRI10GE_ALLOC_SIZE;
1039 if (mgp->csum_flag && myri10ge_lro) {
1040 rx_frags[0].page_offset += MXGEFW_PAD;
1041 rx_frags[0].size -= MXGEFW_PAD;
1043 lro_receive_frags(&mgp->rx_done.lro_mgr, rx_frags,
1044 len, len, (void *)(unsigned long)csum, csum);
1048 hlen = MYRI10GE_HLEN > len ? len : MYRI10GE_HLEN;
1050 /* allocate an skb to attach the page(s) to. This is done
1051 * after trying LRO, so as to avoid skb allocation overheads */
1053 skb = netdev_alloc_skb(dev, MYRI10GE_HLEN + 16);
1054 if (unlikely(skb == NULL)) {
1055 mgp->stats.rx_dropped++;
1058 put_page(rx_frags[i].page);
1063 /* Attach the pages to the skb, and trim off any padding */
1064 myri10ge_rx_skb_build(skb, va, rx_frags, len, hlen);
1065 if (skb_shinfo(skb)->frags[0].size <= 0) {
1066 put_page(skb_shinfo(skb)->frags[0].page);
1067 skb_shinfo(skb)->nr_frags = 0;
1069 skb->protocol = eth_type_trans(skb, dev);
1071 if (mgp->csum_flag) {
1072 if ((skb->protocol == htons(ETH_P_IP)) ||
1073 (skb->protocol == htons(ETH_P_IPV6))) {
1075 skb->ip_summed = CHECKSUM_COMPLETE;
1077 myri10ge_vlan_ip_csum(skb, csum);
1079 netif_receive_skb(skb);
1080 dev->last_rx = jiffies;
1084 static inline void myri10ge_tx_done(struct myri10ge_priv *mgp, int mcp_index)
1086 struct pci_dev *pdev = mgp->pdev;
1087 struct myri10ge_tx_buf *tx = &mgp->tx;
1088 struct sk_buff *skb;
1091 while (tx->pkt_done != mcp_index) {
1092 idx = tx->done & tx->mask;
1093 skb = tx->info[idx].skb;
1096 tx->info[idx].skb = NULL;
1097 if (tx->info[idx].last) {
1099 tx->info[idx].last = 0;
1102 len = pci_unmap_len(&tx->info[idx], len);
1103 pci_unmap_len_set(&tx->info[idx], len, 0);
1105 mgp->stats.tx_bytes += skb->len;
1106 mgp->stats.tx_packets++;
1107 dev_kfree_skb_irq(skb);
1109 pci_unmap_single(pdev,
1110 pci_unmap_addr(&tx->info[idx],
1115 pci_unmap_page(pdev,
1116 pci_unmap_addr(&tx->info[idx],
1121 /* start the queue if we've stopped it */
1122 if (netif_queue_stopped(mgp->dev)
1123 && tx->req - tx->done < (tx->mask >> 1)) {
1125 netif_wake_queue(mgp->dev);
1129 static inline int myri10ge_clean_rx_done(struct myri10ge_priv *mgp, int budget)
1131 struct myri10ge_rx_done *rx_done = &mgp->rx_done;
1132 unsigned long rx_bytes = 0;
1133 unsigned long rx_packets = 0;
1134 unsigned long rx_ok;
1136 int idx = rx_done->idx;
1137 int cnt = rx_done->cnt;
1142 while (rx_done->entry[idx].length != 0 && work_done++ < budget) {
1143 length = ntohs(rx_done->entry[idx].length);
1144 rx_done->entry[idx].length = 0;
1145 checksum = csum_unfold(rx_done->entry[idx].checksum);
1146 if (length <= mgp->small_bytes)
1147 rx_ok = myri10ge_rx_done(mgp, &mgp->rx_small,
1151 rx_ok = myri10ge_rx_done(mgp, &mgp->rx_big,
1154 rx_packets += rx_ok;
1155 rx_bytes += rx_ok * (unsigned long)length;
1157 idx = cnt & (myri10ge_max_intr_slots - 1);
1161 mgp->stats.rx_packets += rx_packets;
1162 mgp->stats.rx_bytes += rx_bytes;
1165 lro_flush_all(&rx_done->lro_mgr);
1167 /* restock receive rings if needed */
1168 if (mgp->rx_small.fill_cnt - mgp->rx_small.cnt < myri10ge_fill_thresh)
1169 myri10ge_alloc_rx_pages(mgp, &mgp->rx_small,
1170 mgp->small_bytes + MXGEFW_PAD, 0);
1171 if (mgp->rx_big.fill_cnt - mgp->rx_big.cnt < myri10ge_fill_thresh)
1172 myri10ge_alloc_rx_pages(mgp, &mgp->rx_big, mgp->big_bytes, 0);
1177 static inline void myri10ge_check_statblock(struct myri10ge_priv *mgp)
1179 struct mcp_irq_data *stats = mgp->fw_stats;
1181 if (unlikely(stats->stats_updated)) {
1182 unsigned link_up = ntohl(stats->link_up);
1183 if (mgp->link_state != link_up) {
1184 mgp->link_state = link_up;
1186 if (mgp->link_state == MXGEFW_LINK_UP) {
1187 if (netif_msg_link(mgp))
1189 "myri10ge: %s: link up\n",
1191 netif_carrier_on(mgp->dev);
1192 mgp->link_changes++;
1194 if (netif_msg_link(mgp))
1196 "myri10ge: %s: link %s\n",
1198 (link_up == MXGEFW_LINK_MYRINET ?
1199 "mismatch (Myrinet detected)" :
1201 netif_carrier_off(mgp->dev);
1202 mgp->link_changes++;
1205 if (mgp->rdma_tags_available !=
1206 ntohl(mgp->fw_stats->rdma_tags_available)) {
1207 mgp->rdma_tags_available =
1208 ntohl(mgp->fw_stats->rdma_tags_available);
1209 printk(KERN_WARNING "myri10ge: %s: RDMA timed out! "
1210 "%d tags left\n", mgp->dev->name,
1211 mgp->rdma_tags_available);
1213 mgp->down_cnt += stats->link_down;
1214 if (stats->link_down)
1215 wake_up(&mgp->down_wq);
1219 static int myri10ge_poll(struct napi_struct *napi, int budget)
1221 struct myri10ge_priv *mgp =
1222 container_of(napi, struct myri10ge_priv, napi);
1223 struct net_device *netdev = mgp->dev;
1224 struct myri10ge_rx_done *rx_done = &mgp->rx_done;
1227 /* process as many rx events as NAPI will allow */
1228 work_done = myri10ge_clean_rx_done(mgp, budget);
1230 if (rx_done->entry[rx_done->idx].length == 0 || !netif_running(netdev)) {
1231 netif_rx_complete(netdev, napi);
1232 put_be32(htonl(3), mgp->irq_claim);
1237 static irqreturn_t myri10ge_intr(int irq, void *arg)
1239 struct myri10ge_priv *mgp = arg;
1240 struct mcp_irq_data *stats = mgp->fw_stats;
1241 struct myri10ge_tx_buf *tx = &mgp->tx;
1242 u32 send_done_count;
1245 /* make sure it is our IRQ, and that the DMA has finished */
1246 if (unlikely(!stats->valid))
1249 /* low bit indicates receives are present, so schedule
1250 * napi poll handler */
1251 if (stats->valid & 1)
1252 netif_rx_schedule(mgp->dev, &mgp->napi);
1254 if (!mgp->msi_enabled) {
1255 put_be32(0, mgp->irq_deassert);
1256 if (!myri10ge_deassert_wait)
1262 /* Wait for IRQ line to go low, if using INTx */
1266 /* check for transmit completes and receives */
1267 send_done_count = ntohl(stats->send_done_count);
1268 if (send_done_count != tx->pkt_done)
1269 myri10ge_tx_done(mgp, (int)send_done_count);
1270 if (unlikely(i > myri10ge_max_irq_loops)) {
1271 printk(KERN_WARNING "myri10ge: %s: irq stuck?\n",
1274 schedule_work(&mgp->watchdog_work);
1276 if (likely(stats->valid == 0))
1282 myri10ge_check_statblock(mgp);
1284 put_be32(htonl(3), mgp->irq_claim + 1);
1285 return (IRQ_HANDLED);
1289 myri10ge_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
1291 cmd->autoneg = AUTONEG_DISABLE;
1292 cmd->speed = SPEED_10000;
1293 cmd->duplex = DUPLEX_FULL;
1298 myri10ge_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *info)
1300 struct myri10ge_priv *mgp = netdev_priv(netdev);
1302 strlcpy(info->driver, "myri10ge", sizeof(info->driver));
1303 strlcpy(info->version, MYRI10GE_VERSION_STR, sizeof(info->version));
1304 strlcpy(info->fw_version, mgp->fw_version, sizeof(info->fw_version));
1305 strlcpy(info->bus_info, pci_name(mgp->pdev), sizeof(info->bus_info));
1309 myri10ge_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *coal)
1311 struct myri10ge_priv *mgp = netdev_priv(netdev);
1312 coal->rx_coalesce_usecs = mgp->intr_coal_delay;
1317 myri10ge_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *coal)
1319 struct myri10ge_priv *mgp = netdev_priv(netdev);
1321 mgp->intr_coal_delay = coal->rx_coalesce_usecs;
1322 put_be32(htonl(mgp->intr_coal_delay), mgp->intr_coal_delay_ptr);
1327 myri10ge_get_pauseparam(struct net_device *netdev,
1328 struct ethtool_pauseparam *pause)
1330 struct myri10ge_priv *mgp = netdev_priv(netdev);
1333 pause->rx_pause = mgp->pause;
1334 pause->tx_pause = mgp->pause;
1338 myri10ge_set_pauseparam(struct net_device *netdev,
1339 struct ethtool_pauseparam *pause)
1341 struct myri10ge_priv *mgp = netdev_priv(netdev);
1343 if (pause->tx_pause != mgp->pause)
1344 return myri10ge_change_pause(mgp, pause->tx_pause);
1345 if (pause->rx_pause != mgp->pause)
1346 return myri10ge_change_pause(mgp, pause->tx_pause);
1347 if (pause->autoneg != 0)
1353 myri10ge_get_ringparam(struct net_device *netdev,
1354 struct ethtool_ringparam *ring)
1356 struct myri10ge_priv *mgp = netdev_priv(netdev);
1358 ring->rx_mini_max_pending = mgp->rx_small.mask + 1;
1359 ring->rx_max_pending = mgp->rx_big.mask + 1;
1360 ring->rx_jumbo_max_pending = 0;
1361 ring->tx_max_pending = mgp->rx_small.mask + 1;
1362 ring->rx_mini_pending = ring->rx_mini_max_pending;
1363 ring->rx_pending = ring->rx_max_pending;
1364 ring->rx_jumbo_pending = ring->rx_jumbo_max_pending;
1365 ring->tx_pending = ring->tx_max_pending;
1368 static u32 myri10ge_get_rx_csum(struct net_device *netdev)
1370 struct myri10ge_priv *mgp = netdev_priv(netdev);
1377 static int myri10ge_set_rx_csum(struct net_device *netdev, u32 csum_enabled)
1379 struct myri10ge_priv *mgp = netdev_priv(netdev);
1381 mgp->csum_flag = MXGEFW_FLAGS_CKSUM;
1387 static const char myri10ge_gstrings_stats[][ETH_GSTRING_LEN] = {
1388 "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
1389 "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
1390 "rx_length_errors", "rx_over_errors", "rx_crc_errors",
1391 "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
1392 "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
1393 "tx_heartbeat_errors", "tx_window_errors",
1394 /* device-specific stats */
1395 "tx_boundary", "WC", "irq", "MSI",
1396 "read_dma_bw_MBs", "write_dma_bw_MBs", "read_write_dma_bw_MBs",
1397 "serial_number", "tx_pkt_start", "tx_pkt_done",
1398 "tx_req", "tx_done", "rx_small_cnt", "rx_big_cnt",
1399 "wake_queue", "stop_queue", "watchdog_resets", "tx_linearized",
1400 "link_changes", "link_up", "dropped_link_overflow",
1401 "dropped_link_error_or_filtered",
1402 "dropped_pause", "dropped_bad_phy", "dropped_bad_crc32",
1403 "dropped_unicast_filtered", "dropped_multicast_filtered",
1404 "dropped_runt", "dropped_overrun", "dropped_no_small_buffer",
1405 "dropped_no_big_buffer", "LRO aggregated", "LRO flushed",
1406 "LRO avg aggr", "LRO no_desc"
1409 #define MYRI10GE_NET_STATS_LEN 21
1410 #define MYRI10GE_STATS_LEN sizeof(myri10ge_gstrings_stats) / ETH_GSTRING_LEN
1413 myri10ge_get_strings(struct net_device *netdev, u32 stringset, u8 * data)
1415 switch (stringset) {
1417 memcpy(data, *myri10ge_gstrings_stats,
1418 sizeof(myri10ge_gstrings_stats));
1423 static int myri10ge_get_sset_count(struct net_device *netdev, int sset)
1427 return MYRI10GE_STATS_LEN;
1434 myri10ge_get_ethtool_stats(struct net_device *netdev,
1435 struct ethtool_stats *stats, u64 * data)
1437 struct myri10ge_priv *mgp = netdev_priv(netdev);
1440 for (i = 0; i < MYRI10GE_NET_STATS_LEN; i++)
1441 data[i] = ((unsigned long *)&mgp->stats)[i];
1443 data[i++] = (unsigned int)mgp->tx.boundary;
1444 data[i++] = (unsigned int)mgp->wc_enabled;
1445 data[i++] = (unsigned int)mgp->pdev->irq;
1446 data[i++] = (unsigned int)mgp->msi_enabled;
1447 data[i++] = (unsigned int)mgp->read_dma;
1448 data[i++] = (unsigned int)mgp->write_dma;
1449 data[i++] = (unsigned int)mgp->read_write_dma;
1450 data[i++] = (unsigned int)mgp->serial_number;
1451 data[i++] = (unsigned int)mgp->tx.pkt_start;
1452 data[i++] = (unsigned int)mgp->tx.pkt_done;
1453 data[i++] = (unsigned int)mgp->tx.req;
1454 data[i++] = (unsigned int)mgp->tx.done;
1455 data[i++] = (unsigned int)mgp->rx_small.cnt;
1456 data[i++] = (unsigned int)mgp->rx_big.cnt;
1457 data[i++] = (unsigned int)mgp->wake_queue;
1458 data[i++] = (unsigned int)mgp->stop_queue;
1459 data[i++] = (unsigned int)mgp->watchdog_resets;
1460 data[i++] = (unsigned int)mgp->tx_linearized;
1461 data[i++] = (unsigned int)mgp->link_changes;
1462 data[i++] = (unsigned int)ntohl(mgp->fw_stats->link_up);
1463 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_link_overflow);
1465 (unsigned int)ntohl(mgp->fw_stats->dropped_link_error_or_filtered);
1466 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_pause);
1467 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_bad_phy);
1468 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_bad_crc32);
1470 (unsigned int)ntohl(mgp->fw_stats->dropped_unicast_filtered);
1472 (unsigned int)ntohl(mgp->fw_stats->dropped_multicast_filtered);
1473 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_runt);
1474 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_overrun);
1475 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_no_small_buffer);
1476 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_no_big_buffer);
1477 data[i++] = mgp->rx_done.lro_mgr.stats.aggregated;
1478 data[i++] = mgp->rx_done.lro_mgr.stats.flushed;
1479 if (mgp->rx_done.lro_mgr.stats.flushed)
1480 data[i++] = mgp->rx_done.lro_mgr.stats.aggregated /
1481 mgp->rx_done.lro_mgr.stats.flushed;
1484 data[i++] = mgp->rx_done.lro_mgr.stats.no_desc;
1487 static void myri10ge_set_msglevel(struct net_device *netdev, u32 value)
1489 struct myri10ge_priv *mgp = netdev_priv(netdev);
1490 mgp->msg_enable = value;
1493 static u32 myri10ge_get_msglevel(struct net_device *netdev)
1495 struct myri10ge_priv *mgp = netdev_priv(netdev);
1496 return mgp->msg_enable;
1499 static const struct ethtool_ops myri10ge_ethtool_ops = {
1500 .get_settings = myri10ge_get_settings,
1501 .get_drvinfo = myri10ge_get_drvinfo,
1502 .get_coalesce = myri10ge_get_coalesce,
1503 .set_coalesce = myri10ge_set_coalesce,
1504 .get_pauseparam = myri10ge_get_pauseparam,
1505 .set_pauseparam = myri10ge_set_pauseparam,
1506 .get_ringparam = myri10ge_get_ringparam,
1507 .get_rx_csum = myri10ge_get_rx_csum,
1508 .set_rx_csum = myri10ge_set_rx_csum,
1509 .set_tx_csum = ethtool_op_set_tx_hw_csum,
1510 .set_sg = ethtool_op_set_sg,
1511 .set_tso = ethtool_op_set_tso,
1512 .get_link = ethtool_op_get_link,
1513 .get_strings = myri10ge_get_strings,
1514 .get_sset_count = myri10ge_get_sset_count,
1515 .get_ethtool_stats = myri10ge_get_ethtool_stats,
1516 .set_msglevel = myri10ge_set_msglevel,
1517 .get_msglevel = myri10ge_get_msglevel
1520 static int myri10ge_allocate_rings(struct net_device *dev)
1522 struct myri10ge_priv *mgp;
1523 struct myri10ge_cmd cmd;
1524 int tx_ring_size, rx_ring_size;
1525 int tx_ring_entries, rx_ring_entries;
1529 mgp = netdev_priv(dev);
1531 /* get ring sizes */
1533 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SEND_RING_SIZE, &cmd, 0);
1534 tx_ring_size = cmd.data0;
1535 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_RX_RING_SIZE, &cmd, 0);
1538 rx_ring_size = cmd.data0;
1540 tx_ring_entries = tx_ring_size / sizeof(struct mcp_kreq_ether_send);
1541 rx_ring_entries = rx_ring_size / sizeof(struct mcp_dma_addr);
1542 mgp->tx.mask = tx_ring_entries - 1;
1543 mgp->rx_small.mask = mgp->rx_big.mask = rx_ring_entries - 1;
1547 /* allocate the host shadow rings */
1549 bytes = 8 + (MYRI10GE_MAX_SEND_DESC_TSO + 4)
1550 * sizeof(*mgp->tx.req_list);
1551 mgp->tx.req_bytes = kzalloc(bytes, GFP_KERNEL);
1552 if (mgp->tx.req_bytes == NULL)
1553 goto abort_with_nothing;
1555 /* ensure req_list entries are aligned to 8 bytes */
1556 mgp->tx.req_list = (struct mcp_kreq_ether_send *)
1557 ALIGN((unsigned long)mgp->tx.req_bytes, 8);
1559 bytes = rx_ring_entries * sizeof(*mgp->rx_small.shadow);
1560 mgp->rx_small.shadow = kzalloc(bytes, GFP_KERNEL);
1561 if (mgp->rx_small.shadow == NULL)
1562 goto abort_with_tx_req_bytes;
1564 bytes = rx_ring_entries * sizeof(*mgp->rx_big.shadow);
1565 mgp->rx_big.shadow = kzalloc(bytes, GFP_KERNEL);
1566 if (mgp->rx_big.shadow == NULL)
1567 goto abort_with_rx_small_shadow;
1569 /* allocate the host info rings */
1571 bytes = tx_ring_entries * sizeof(*mgp->tx.info);
1572 mgp->tx.info = kzalloc(bytes, GFP_KERNEL);
1573 if (mgp->tx.info == NULL)
1574 goto abort_with_rx_big_shadow;
1576 bytes = rx_ring_entries * sizeof(*mgp->rx_small.info);
1577 mgp->rx_small.info = kzalloc(bytes, GFP_KERNEL);
1578 if (mgp->rx_small.info == NULL)
1579 goto abort_with_tx_info;
1581 bytes = rx_ring_entries * sizeof(*mgp->rx_big.info);
1582 mgp->rx_big.info = kzalloc(bytes, GFP_KERNEL);
1583 if (mgp->rx_big.info == NULL)
1584 goto abort_with_rx_small_info;
1586 /* Fill the receive rings */
1587 mgp->rx_big.cnt = 0;
1588 mgp->rx_small.cnt = 0;
1589 mgp->rx_big.fill_cnt = 0;
1590 mgp->rx_small.fill_cnt = 0;
1591 mgp->rx_small.page_offset = MYRI10GE_ALLOC_SIZE;
1592 mgp->rx_big.page_offset = MYRI10GE_ALLOC_SIZE;
1593 mgp->rx_small.watchdog_needed = 0;
1594 mgp->rx_big.watchdog_needed = 0;
1595 myri10ge_alloc_rx_pages(mgp, &mgp->rx_small,
1596 mgp->small_bytes + MXGEFW_PAD, 0);
1598 if (mgp->rx_small.fill_cnt < mgp->rx_small.mask + 1) {
1599 printk(KERN_ERR "myri10ge: %s: alloced only %d small bufs\n",
1600 dev->name, mgp->rx_small.fill_cnt);
1601 goto abort_with_rx_small_ring;
1604 myri10ge_alloc_rx_pages(mgp, &mgp->rx_big, mgp->big_bytes, 0);
1605 if (mgp->rx_big.fill_cnt < mgp->rx_big.mask + 1) {
1606 printk(KERN_ERR "myri10ge: %s: alloced only %d big bufs\n",
1607 dev->name, mgp->rx_big.fill_cnt);
1608 goto abort_with_rx_big_ring;
1613 abort_with_rx_big_ring:
1614 for (i = mgp->rx_big.cnt; i < mgp->rx_big.fill_cnt; i++) {
1615 int idx = i & mgp->rx_big.mask;
1616 myri10ge_unmap_rx_page(mgp->pdev, &mgp->rx_big.info[idx],
1618 put_page(mgp->rx_big.info[idx].page);
1621 abort_with_rx_small_ring:
1622 for (i = mgp->rx_small.cnt; i < mgp->rx_small.fill_cnt; i++) {
1623 int idx = i & mgp->rx_small.mask;
1624 myri10ge_unmap_rx_page(mgp->pdev, &mgp->rx_small.info[idx],
1625 mgp->small_bytes + MXGEFW_PAD);
1626 put_page(mgp->rx_small.info[idx].page);
1629 kfree(mgp->rx_big.info);
1631 abort_with_rx_small_info:
1632 kfree(mgp->rx_small.info);
1635 kfree(mgp->tx.info);
1637 abort_with_rx_big_shadow:
1638 kfree(mgp->rx_big.shadow);
1640 abort_with_rx_small_shadow:
1641 kfree(mgp->rx_small.shadow);
1643 abort_with_tx_req_bytes:
1644 kfree(mgp->tx.req_bytes);
1645 mgp->tx.req_bytes = NULL;
1646 mgp->tx.req_list = NULL;
1652 static void myri10ge_free_rings(struct net_device *dev)
1654 struct myri10ge_priv *mgp;
1655 struct sk_buff *skb;
1656 struct myri10ge_tx_buf *tx;
1659 mgp = netdev_priv(dev);
1661 for (i = mgp->rx_big.cnt; i < mgp->rx_big.fill_cnt; i++) {
1662 idx = i & mgp->rx_big.mask;
1663 if (i == mgp->rx_big.fill_cnt - 1)
1664 mgp->rx_big.info[idx].page_offset = MYRI10GE_ALLOC_SIZE;
1665 myri10ge_unmap_rx_page(mgp->pdev, &mgp->rx_big.info[idx],
1667 put_page(mgp->rx_big.info[idx].page);
1670 for (i = mgp->rx_small.cnt; i < mgp->rx_small.fill_cnt; i++) {
1671 idx = i & mgp->rx_small.mask;
1672 if (i == mgp->rx_small.fill_cnt - 1)
1673 mgp->rx_small.info[idx].page_offset =
1674 MYRI10GE_ALLOC_SIZE;
1675 myri10ge_unmap_rx_page(mgp->pdev, &mgp->rx_small.info[idx],
1676 mgp->small_bytes + MXGEFW_PAD);
1677 put_page(mgp->rx_small.info[idx].page);
1680 while (tx->done != tx->req) {
1681 idx = tx->done & tx->mask;
1682 skb = tx->info[idx].skb;
1685 tx->info[idx].skb = NULL;
1687 len = pci_unmap_len(&tx->info[idx], len);
1688 pci_unmap_len_set(&tx->info[idx], len, 0);
1690 mgp->stats.tx_dropped++;
1691 dev_kfree_skb_any(skb);
1693 pci_unmap_single(mgp->pdev,
1694 pci_unmap_addr(&tx->info[idx],
1699 pci_unmap_page(mgp->pdev,
1700 pci_unmap_addr(&tx->info[idx],
1705 kfree(mgp->rx_big.info);
1707 kfree(mgp->rx_small.info);
1709 kfree(mgp->tx.info);
1711 kfree(mgp->rx_big.shadow);
1713 kfree(mgp->rx_small.shadow);
1715 kfree(mgp->tx.req_bytes);
1716 mgp->tx.req_bytes = NULL;
1717 mgp->tx.req_list = NULL;
1720 static int myri10ge_request_irq(struct myri10ge_priv *mgp)
1722 struct pci_dev *pdev = mgp->pdev;
1726 status = pci_enable_msi(pdev);
1729 "Error %d setting up MSI; falling back to xPIC\n",
1732 mgp->msi_enabled = 1;
1734 mgp->msi_enabled = 0;
1736 status = request_irq(pdev->irq, myri10ge_intr, IRQF_SHARED,
1737 mgp->dev->name, mgp);
1739 dev_err(&pdev->dev, "failed to allocate IRQ\n");
1740 if (mgp->msi_enabled)
1741 pci_disable_msi(pdev);
1746 static void myri10ge_free_irq(struct myri10ge_priv *mgp)
1748 struct pci_dev *pdev = mgp->pdev;
1750 free_irq(pdev->irq, mgp);
1751 if (mgp->msi_enabled)
1752 pci_disable_msi(pdev);
1756 myri10ge_get_frag_header(struct skb_frag_struct *frag, void **mac_hdr,
1757 void **ip_hdr, void **tcpudp_hdr,
1758 u64 * hdr_flags, void *priv)
1761 struct vlan_ethhdr *veh;
1763 u8 *va = page_address(frag->page) + frag->page_offset;
1764 unsigned long ll_hlen;
1765 __wsum csum = (__wsum) (unsigned long)priv;
1767 /* find the mac header, aborting if not IPv4 */
1769 eh = (struct ethhdr *)va;
1772 if (eh->h_proto != htons(ETH_P_IP)) {
1773 if (eh->h_proto == htons(ETH_P_8021Q)) {
1774 veh = (struct vlan_ethhdr *)va;
1775 if (veh->h_vlan_encapsulated_proto != htons(ETH_P_IP))
1778 ll_hlen += VLAN_HLEN;
1781 * HW checksum starts ETH_HLEN bytes into
1782 * frame, so we must subtract off the VLAN
1783 * header's checksum before csum can be used
1785 csum = csum_sub(csum, csum_partial(va + ETH_HLEN,
1791 *hdr_flags = LRO_IPV4;
1793 iph = (struct iphdr *)(va + ll_hlen);
1795 if (iph->protocol != IPPROTO_TCP)
1797 *hdr_flags |= LRO_TCP;
1798 *tcpudp_hdr = (u8 *) (*ip_hdr) + (iph->ihl << 2);
1800 /* verify the IP checksum */
1801 if (unlikely(ip_fast_csum((u8 *) iph, iph->ihl)))
1804 /* verify the checksum */
1805 if (unlikely(csum_tcpudp_magic(iph->saddr, iph->daddr,
1806 ntohs(iph->tot_len) - (iph->ihl << 2),
1807 IPPROTO_TCP, csum)))
1813 static int myri10ge_open(struct net_device *dev)
1815 struct myri10ge_priv *mgp;
1816 struct myri10ge_cmd cmd;
1817 struct net_lro_mgr *lro_mgr;
1818 int status, big_pow2;
1820 mgp = netdev_priv(dev);
1822 if (mgp->running != MYRI10GE_ETH_STOPPED)
1825 mgp->running = MYRI10GE_ETH_STARTING;
1826 status = myri10ge_reset(mgp);
1828 printk(KERN_ERR "myri10ge: %s: failed reset\n", dev->name);
1829 goto abort_with_nothing;
1832 status = myri10ge_request_irq(mgp);
1834 goto abort_with_nothing;
1836 /* decide what small buffer size to use. For good TCP rx
1837 * performance, it is important to not receive 1514 byte
1838 * frames into jumbo buffers, as it confuses the socket buffer
1839 * accounting code, leading to drops and erratic performance.
1842 if (dev->mtu <= ETH_DATA_LEN)
1843 /* enough for a TCP header */
1844 mgp->small_bytes = (128 > SMP_CACHE_BYTES)
1845 ? (128 - MXGEFW_PAD)
1846 : (SMP_CACHE_BYTES - MXGEFW_PAD);
1848 /* enough for a vlan encapsulated ETH_DATA_LEN frame */
1849 mgp->small_bytes = VLAN_ETH_FRAME_LEN;
1851 /* Override the small buffer size? */
1852 if (myri10ge_small_bytes > 0)
1853 mgp->small_bytes = myri10ge_small_bytes;
1855 /* get the lanai pointers to the send and receive rings */
1857 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SEND_OFFSET, &cmd, 0);
1859 (struct mcp_kreq_ether_send __iomem *)(mgp->sram + cmd.data0);
1862 myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SMALL_RX_OFFSET, &cmd, 0);
1863 mgp->rx_small.lanai =
1864 (struct mcp_kreq_ether_recv __iomem *)(mgp->sram + cmd.data0);
1866 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_BIG_RX_OFFSET, &cmd, 0);
1868 (struct mcp_kreq_ether_recv __iomem *)(mgp->sram + cmd.data0);
1872 "myri10ge: %s: failed to get ring sizes or locations\n",
1874 mgp->running = MYRI10GE_ETH_STOPPED;
1875 goto abort_with_irq;
1878 if (myri10ge_wcfifo && mgp->wc_enabled) {
1879 mgp->tx.wc_fifo = (u8 __iomem *) mgp->sram + MXGEFW_ETH_SEND_4;
1880 mgp->rx_small.wc_fifo =
1881 (u8 __iomem *) mgp->sram + MXGEFW_ETH_RECV_SMALL;
1882 mgp->rx_big.wc_fifo =
1883 (u8 __iomem *) mgp->sram + MXGEFW_ETH_RECV_BIG;
1885 mgp->tx.wc_fifo = NULL;
1886 mgp->rx_small.wc_fifo = NULL;
1887 mgp->rx_big.wc_fifo = NULL;
1890 /* Firmware needs the big buff size as a power of 2. Lie and
1891 * tell him the buffer is larger, because we only use 1
1892 * buffer/pkt, and the mtu will prevent overruns.
1894 big_pow2 = dev->mtu + ETH_HLEN + VLAN_HLEN + MXGEFW_PAD;
1895 if (big_pow2 < MYRI10GE_ALLOC_SIZE / 2) {
1896 while (!is_power_of_2(big_pow2))
1898 mgp->big_bytes = dev->mtu + ETH_HLEN + VLAN_HLEN + MXGEFW_PAD;
1900 big_pow2 = MYRI10GE_ALLOC_SIZE;
1901 mgp->big_bytes = big_pow2;
1904 status = myri10ge_allocate_rings(dev);
1906 goto abort_with_irq;
1908 /* now give firmware buffers sizes, and MTU */
1909 cmd.data0 = dev->mtu + ETH_HLEN + VLAN_HLEN;
1910 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_MTU, &cmd, 0);
1911 cmd.data0 = mgp->small_bytes;
1913 myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_SMALL_BUFFER_SIZE, &cmd, 0);
1914 cmd.data0 = big_pow2;
1916 myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_BIG_BUFFER_SIZE, &cmd, 0);
1918 printk(KERN_ERR "myri10ge: %s: Couldn't set buffer sizes\n",
1920 goto abort_with_rings;
1923 cmd.data0 = MYRI10GE_LOWPART_TO_U32(mgp->fw_stats_bus);
1924 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(mgp->fw_stats_bus);
1925 cmd.data2 = sizeof(struct mcp_irq_data);
1926 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_STATS_DMA_V2, &cmd, 0);
1927 if (status == -ENOSYS) {
1928 dma_addr_t bus = mgp->fw_stats_bus;
1929 bus += offsetof(struct mcp_irq_data, send_done_count);
1930 cmd.data0 = MYRI10GE_LOWPART_TO_U32(bus);
1931 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(bus);
1932 status = myri10ge_send_cmd(mgp,
1933 MXGEFW_CMD_SET_STATS_DMA_OBSOLETE,
1935 /* Firmware cannot support multicast without STATS_DMA_V2 */
1936 mgp->fw_multicast_support = 0;
1938 mgp->fw_multicast_support = 1;
1941 printk(KERN_ERR "myri10ge: %s: Couldn't set stats DMA\n",
1943 goto abort_with_rings;
1946 mgp->link_state = htonl(~0U);
1947 mgp->rdma_tags_available = 15;
1949 lro_mgr = &mgp->rx_done.lro_mgr;
1951 lro_mgr->features = LRO_F_NAPI;
1952 lro_mgr->ip_summed = CHECKSUM_COMPLETE;
1953 lro_mgr->ip_summed_aggr = CHECKSUM_UNNECESSARY;
1954 lro_mgr->max_desc = MYRI10GE_MAX_LRO_DESCRIPTORS;
1955 lro_mgr->lro_arr = mgp->rx_done.lro_desc;
1956 lro_mgr->get_frag_header = myri10ge_get_frag_header;
1957 lro_mgr->max_aggr = myri10ge_lro_max_pkts;
1958 if (lro_mgr->max_aggr > MAX_SKB_FRAGS)
1959 lro_mgr->max_aggr = MAX_SKB_FRAGS;
1961 napi_enable(&mgp->napi); /* must happen prior to any irq */
1963 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ETHERNET_UP, &cmd, 0);
1965 printk(KERN_ERR "myri10ge: %s: Couldn't bring up link\n",
1967 goto abort_with_rings;
1970 mgp->wake_queue = 0;
1971 mgp->stop_queue = 0;
1972 mgp->running = MYRI10GE_ETH_RUNNING;
1973 mgp->watchdog_timer.expires = jiffies + myri10ge_watchdog_timeout * HZ;
1974 add_timer(&mgp->watchdog_timer);
1975 netif_wake_queue(dev);
1979 myri10ge_free_rings(dev);
1982 myri10ge_free_irq(mgp);
1985 mgp->running = MYRI10GE_ETH_STOPPED;
1989 static int myri10ge_close(struct net_device *dev)
1991 struct myri10ge_priv *mgp;
1992 struct myri10ge_cmd cmd;
1993 int status, old_down_cnt;
1995 mgp = netdev_priv(dev);
1997 if (mgp->running != MYRI10GE_ETH_RUNNING)
2000 if (mgp->tx.req_bytes == NULL)
2003 del_timer_sync(&mgp->watchdog_timer);
2004 mgp->running = MYRI10GE_ETH_STOPPING;
2005 napi_disable(&mgp->napi);
2006 netif_carrier_off(dev);
2007 netif_stop_queue(dev);
2008 old_down_cnt = mgp->down_cnt;
2010 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ETHERNET_DOWN, &cmd, 0);
2012 printk(KERN_ERR "myri10ge: %s: Couldn't bring down link\n",
2015 wait_event_timeout(mgp->down_wq, old_down_cnt != mgp->down_cnt, HZ);
2016 if (old_down_cnt == mgp->down_cnt)
2017 printk(KERN_ERR "myri10ge: %s never got down irq\n", dev->name);
2019 netif_tx_disable(dev);
2020 myri10ge_free_irq(mgp);
2021 myri10ge_free_rings(dev);
2023 mgp->running = MYRI10GE_ETH_STOPPED;
2027 /* copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
2028 * backwards one at a time and handle ring wraps */
2031 myri10ge_submit_req_backwards(struct myri10ge_tx_buf *tx,
2032 struct mcp_kreq_ether_send *src, int cnt)
2034 int idx, starting_slot;
2035 starting_slot = tx->req;
2038 idx = (starting_slot + cnt) & tx->mask;
2039 myri10ge_pio_copy(&tx->lanai[idx], &src[cnt], sizeof(*src));
2045 * copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
2046 * at most 32 bytes at a time, so as to avoid involving the software
2047 * pio handler in the nic. We re-write the first segment's flags
2048 * to mark them valid only after writing the entire chain.
2052 myri10ge_submit_req(struct myri10ge_tx_buf *tx, struct mcp_kreq_ether_send *src,
2056 struct mcp_kreq_ether_send __iomem *dstp, *dst;
2057 struct mcp_kreq_ether_send *srcp;
2060 idx = tx->req & tx->mask;
2062 last_flags = src->flags;
2065 dst = dstp = &tx->lanai[idx];
2068 if ((idx + cnt) < tx->mask) {
2069 for (i = 0; i < (cnt - 1); i += 2) {
2070 myri10ge_pio_copy(dstp, srcp, 2 * sizeof(*src));
2071 mb(); /* force write every 32 bytes */
2076 /* submit all but the first request, and ensure
2077 * that it is submitted below */
2078 myri10ge_submit_req_backwards(tx, src, cnt);
2082 /* submit the first request */
2083 myri10ge_pio_copy(dstp, srcp, sizeof(*src));
2084 mb(); /* barrier before setting valid flag */
2087 /* re-write the last 32-bits with the valid flags */
2088 src->flags = last_flags;
2089 put_be32(*((__be32 *) src + 3), (__be32 __iomem *) dst + 3);
2095 myri10ge_submit_req_wc(struct myri10ge_tx_buf *tx,
2096 struct mcp_kreq_ether_send *src, int cnt)
2101 myri10ge_pio_copy(tx->wc_fifo, src, 64);
2107 /* pad it to 64 bytes. The src is 64 bytes bigger than it
2108 * needs to be so that we don't overrun it */
2109 myri10ge_pio_copy(tx->wc_fifo + MXGEFW_ETH_SEND_OFFSET(cnt),
2116 * Transmit a packet. We need to split the packet so that a single
2117 * segment does not cross myri10ge->tx.boundary, so this makes segment
2118 * counting tricky. So rather than try to count segments up front, we
2119 * just give up if there are too few segments to hold a reasonably
2120 * fragmented packet currently available. If we run
2121 * out of segments while preparing a packet for DMA, we just linearize
2125 static int myri10ge_xmit(struct sk_buff *skb, struct net_device *dev)
2127 struct myri10ge_priv *mgp = netdev_priv(dev);
2128 struct mcp_kreq_ether_send *req;
2129 struct myri10ge_tx_buf *tx = &mgp->tx;
2130 struct skb_frag_struct *frag;
2133 __be32 high_swapped;
2135 int idx, last_idx, avail, frag_cnt, frag_idx, count, mss, max_segments;
2136 u16 pseudo_hdr_offset, cksum_offset;
2137 int cum_len, seglen, boundary, rdma_count;
2142 avail = tx->mask - 1 - (tx->req - tx->done);
2145 max_segments = MXGEFW_MAX_SEND_DESC;
2147 if (skb_is_gso(skb)) {
2148 mss = skb_shinfo(skb)->gso_size;
2149 max_segments = MYRI10GE_MAX_SEND_DESC_TSO;
2152 if ((unlikely(avail < max_segments))) {
2153 /* we are out of transmit resources */
2155 netif_stop_queue(dev);
2159 /* Setup checksum offloading, if needed */
2161 pseudo_hdr_offset = 0;
2163 flags = (MXGEFW_FLAGS_NO_TSO | MXGEFW_FLAGS_FIRST);
2164 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2165 cksum_offset = skb_transport_offset(skb);
2166 pseudo_hdr_offset = cksum_offset + skb->csum_offset;
2167 /* If the headers are excessively large, then we must
2168 * fall back to a software checksum */
2169 if (unlikely(cksum_offset > 255 || pseudo_hdr_offset > 127)) {
2170 if (skb_checksum_help(skb))
2173 pseudo_hdr_offset = 0;
2175 odd_flag = MXGEFW_FLAGS_ALIGN_ODD;
2176 flags |= MXGEFW_FLAGS_CKSUM;
2182 if (mss) { /* TSO */
2183 /* this removes any CKSUM flag from before */
2184 flags = (MXGEFW_FLAGS_TSO_HDR | MXGEFW_FLAGS_FIRST);
2186 /* negative cum_len signifies to the
2187 * send loop that we are still in the
2188 * header portion of the TSO packet.
2189 * TSO header must be at most 134 bytes long */
2190 cum_len = -(skb_transport_offset(skb) + tcp_hdrlen(skb));
2192 /* for TSO, pseudo_hdr_offset holds mss.
2193 * The firmware figures out where to put
2194 * the checksum by parsing the header. */
2195 pseudo_hdr_offset = mss;
2197 /* Mark small packets, and pad out tiny packets */
2198 if (skb->len <= MXGEFW_SEND_SMALL_SIZE) {
2199 flags |= MXGEFW_FLAGS_SMALL;
2201 /* pad frames to at least ETH_ZLEN bytes */
2202 if (unlikely(skb->len < ETH_ZLEN)) {
2203 if (skb_padto(skb, ETH_ZLEN)) {
2204 /* The packet is gone, so we must
2206 mgp->stats.tx_dropped += 1;
2209 /* adjust the len to account for the zero pad
2210 * so that the nic can know how long it is */
2211 skb->len = ETH_ZLEN;
2215 /* map the skb for DMA */
2216 len = skb->len - skb->data_len;
2217 idx = tx->req & tx->mask;
2218 tx->info[idx].skb = skb;
2219 bus = pci_map_single(mgp->pdev, skb->data, len, PCI_DMA_TODEVICE);
2220 pci_unmap_addr_set(&tx->info[idx], bus, bus);
2221 pci_unmap_len_set(&tx->info[idx], len, len);
2223 frag_cnt = skb_shinfo(skb)->nr_frags;
2228 /* "rdma_count" is the number of RDMAs belonging to the
2229 * current packet BEFORE the current send request. For
2230 * non-TSO packets, this is equal to "count".
2231 * For TSO packets, rdma_count needs to be reset
2232 * to 0 after a segment cut.
2234 * The rdma_count field of the send request is
2235 * the number of RDMAs of the packet starting at
2236 * that request. For TSO send requests with one ore more cuts
2237 * in the middle, this is the number of RDMAs starting
2238 * after the last cut in the request. All previous
2239 * segments before the last cut implicitly have 1 RDMA.
2241 * Since the number of RDMAs is not known beforehand,
2242 * it must be filled-in retroactively - after each
2243 * segmentation cut or at the end of the entire packet.
2247 /* Break the SKB or Fragment up into pieces which
2248 * do not cross mgp->tx.boundary */
2249 low = MYRI10GE_LOWPART_TO_U32(bus);
2250 high_swapped = htonl(MYRI10GE_HIGHPART_TO_U32(bus));
2255 if (unlikely(count == max_segments))
2256 goto abort_linearize;
2258 boundary = (low + tx->boundary) & ~(tx->boundary - 1);
2259 seglen = boundary - low;
2262 flags_next = flags & ~MXGEFW_FLAGS_FIRST;
2263 cum_len_next = cum_len + seglen;
2264 if (mss) { /* TSO */
2265 (req - rdma_count)->rdma_count = rdma_count + 1;
2267 if (likely(cum_len >= 0)) { /* payload */
2268 int next_is_first, chop;
2270 chop = (cum_len_next > mss);
2271 cum_len_next = cum_len_next % mss;
2272 next_is_first = (cum_len_next == 0);
2273 flags |= chop * MXGEFW_FLAGS_TSO_CHOP;
2274 flags_next |= next_is_first *
2276 rdma_count |= -(chop | next_is_first);
2277 rdma_count += chop & !next_is_first;
2278 } else if (likely(cum_len_next >= 0)) { /* header ends */
2284 small = (mss <= MXGEFW_SEND_SMALL_SIZE);
2285 flags_next = MXGEFW_FLAGS_TSO_PLD |
2286 MXGEFW_FLAGS_FIRST |
2287 (small * MXGEFW_FLAGS_SMALL);
2290 req->addr_high = high_swapped;
2291 req->addr_low = htonl(low);
2292 req->pseudo_hdr_offset = htons(pseudo_hdr_offset);
2293 req->pad = 0; /* complete solid 16-byte block; does this matter? */
2294 req->rdma_count = 1;
2295 req->length = htons(seglen);
2296 req->cksum_offset = cksum_offset;
2297 req->flags = flags | ((cum_len & 1) * odd_flag);
2301 cum_len = cum_len_next;
2306 if (unlikely(cksum_offset > seglen))
2307 cksum_offset -= seglen;
2311 if (frag_idx == frag_cnt)
2314 /* map next fragment for DMA */
2315 idx = (count + tx->req) & tx->mask;
2316 frag = &skb_shinfo(skb)->frags[frag_idx];
2319 bus = pci_map_page(mgp->pdev, frag->page, frag->page_offset,
2320 len, PCI_DMA_TODEVICE);
2321 pci_unmap_addr_set(&tx->info[idx], bus, bus);
2322 pci_unmap_len_set(&tx->info[idx], len, len);
2325 (req - rdma_count)->rdma_count = rdma_count;
2329 req->flags |= MXGEFW_FLAGS_TSO_LAST;
2330 } while (!(req->flags & (MXGEFW_FLAGS_TSO_CHOP |
2331 MXGEFW_FLAGS_FIRST)));
2332 idx = ((count - 1) + tx->req) & tx->mask;
2333 tx->info[idx].last = 1;
2334 if (tx->wc_fifo == NULL)
2335 myri10ge_submit_req(tx, tx->req_list, count);
2337 myri10ge_submit_req_wc(tx, tx->req_list, count);
2339 if ((avail - count) < MXGEFW_MAX_SEND_DESC) {
2341 netif_stop_queue(dev);
2343 dev->trans_start = jiffies;
2347 /* Free any DMA resources we've alloced and clear out the skb
2348 * slot so as to not trip up assertions, and to avoid a
2349 * double-free if linearizing fails */
2351 last_idx = (idx + 1) & tx->mask;
2352 idx = tx->req & tx->mask;
2353 tx->info[idx].skb = NULL;
2355 len = pci_unmap_len(&tx->info[idx], len);
2357 if (tx->info[idx].skb != NULL)
2358 pci_unmap_single(mgp->pdev,
2359 pci_unmap_addr(&tx->info[idx],
2363 pci_unmap_page(mgp->pdev,
2364 pci_unmap_addr(&tx->info[idx],
2367 pci_unmap_len_set(&tx->info[idx], len, 0);
2368 tx->info[idx].skb = NULL;
2370 idx = (idx + 1) & tx->mask;
2371 } while (idx != last_idx);
2372 if (skb_is_gso(skb)) {
2374 "myri10ge: %s: TSO but wanted to linearize?!?!?\n",
2379 if (skb_linearize(skb))
2382 mgp->tx_linearized++;
2386 dev_kfree_skb_any(skb);
2387 mgp->stats.tx_dropped += 1;
2392 static struct net_device_stats *myri10ge_get_stats(struct net_device *dev)
2394 struct myri10ge_priv *mgp = netdev_priv(dev);
2398 static void myri10ge_set_multicast_list(struct net_device *dev)
2400 struct myri10ge_cmd cmd;
2401 struct myri10ge_priv *mgp;
2402 struct dev_mc_list *mc_list;
2403 __be32 data[2] = { 0, 0 };
2405 DECLARE_MAC_BUF(mac);
2407 mgp = netdev_priv(dev);
2408 /* can be called from atomic contexts,
2409 * pass 1 to force atomicity in myri10ge_send_cmd() */
2410 myri10ge_change_promisc(mgp, dev->flags & IFF_PROMISC, 1);
2412 /* This firmware is known to not support multicast */
2413 if (!mgp->fw_multicast_support)
2416 /* Disable multicast filtering */
2418 err = myri10ge_send_cmd(mgp, MXGEFW_ENABLE_ALLMULTI, &cmd, 1);
2420 printk(KERN_ERR "myri10ge: %s: Failed MXGEFW_ENABLE_ALLMULTI,"
2421 " error status: %d\n", dev->name, err);
2425 if ((dev->flags & IFF_ALLMULTI) || mgp->adopted_rx_filter_bug) {
2426 /* request to disable multicast filtering, so quit here */
2430 /* Flush the filters */
2432 err = myri10ge_send_cmd(mgp, MXGEFW_LEAVE_ALL_MULTICAST_GROUPS,
2436 "myri10ge: %s: Failed MXGEFW_LEAVE_ALL_MULTICAST_GROUPS"
2437 ", error status: %d\n", dev->name, err);
2441 /* Walk the multicast list, and add each address */
2442 for (mc_list = dev->mc_list; mc_list != NULL; mc_list = mc_list->next) {
2443 memcpy(data, &mc_list->dmi_addr, 6);
2444 cmd.data0 = ntohl(data[0]);
2445 cmd.data1 = ntohl(data[1]);
2446 err = myri10ge_send_cmd(mgp, MXGEFW_JOIN_MULTICAST_GROUP,
2450 printk(KERN_ERR "myri10ge: %s: Failed "
2451 "MXGEFW_JOIN_MULTICAST_GROUP, error status:"
2452 "%d\t", dev->name, err);
2453 printk(KERN_ERR "MAC %s\n",
2454 print_mac(mac, mc_list->dmi_addr));
2458 /* Enable multicast filtering */
2459 err = myri10ge_send_cmd(mgp, MXGEFW_DISABLE_ALLMULTI, &cmd, 1);
2461 printk(KERN_ERR "myri10ge: %s: Failed MXGEFW_DISABLE_ALLMULTI,"
2462 "error status: %d\n", dev->name, err);
2472 static int myri10ge_set_mac_address(struct net_device *dev, void *addr)
2474 struct sockaddr *sa = addr;
2475 struct myri10ge_priv *mgp = netdev_priv(dev);
2478 if (!is_valid_ether_addr(sa->sa_data))
2479 return -EADDRNOTAVAIL;
2481 status = myri10ge_update_mac_address(mgp, sa->sa_data);
2484 "myri10ge: %s: changing mac address failed with %d\n",
2489 /* change the dev structure */
2490 memcpy(dev->dev_addr, sa->sa_data, 6);
2494 static int myri10ge_change_mtu(struct net_device *dev, int new_mtu)
2496 struct myri10ge_priv *mgp = netdev_priv(dev);
2499 if ((new_mtu < 68) || (ETH_HLEN + new_mtu > MYRI10GE_MAX_ETHER_MTU)) {
2500 printk(KERN_ERR "myri10ge: %s: new mtu (%d) is not valid\n",
2501 dev->name, new_mtu);
2504 printk(KERN_INFO "%s: changing mtu from %d to %d\n",
2505 dev->name, dev->mtu, new_mtu);
2507 /* if we change the mtu on an active device, we must
2508 * reset the device so the firmware sees the change */
2509 myri10ge_close(dev);
2519 * Enable ECRC to align PCI-E Completion packets on an 8-byte boundary.
2520 * Only do it if the bridge is a root port since we don't want to disturb
2521 * any other device, except if forced with myri10ge_ecrc_enable > 1.
2524 static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp)
2526 struct pci_dev *bridge = mgp->pdev->bus->self;
2527 struct device *dev = &mgp->pdev->dev;
2534 if (!myri10ge_ecrc_enable || !bridge)
2537 /* check that the bridge is a root port */
2538 cap = pci_find_capability(bridge, PCI_CAP_ID_EXP);
2539 pci_read_config_word(bridge, cap + PCI_CAP_FLAGS, &val);
2540 ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
2541 if (ext_type != PCI_EXP_TYPE_ROOT_PORT) {
2542 if (myri10ge_ecrc_enable > 1) {
2543 struct pci_dev *old_bridge = bridge;
2545 /* Walk the hierarchy up to the root port
2546 * where ECRC has to be enabled */
2548 bridge = bridge->bus->self;
2551 "Failed to find root port"
2552 " to force ECRC\n");
2556 pci_find_capability(bridge, PCI_CAP_ID_EXP);
2557 pci_read_config_word(bridge,
2558 cap + PCI_CAP_FLAGS, &val);
2559 ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
2560 } while (ext_type != PCI_EXP_TYPE_ROOT_PORT);
2563 "Forcing ECRC on non-root port %s"
2564 " (enabling on root port %s)\n",
2565 pci_name(old_bridge), pci_name(bridge));
2568 "Not enabling ECRC on non-root port %s\n",
2574 cap = pci_find_ext_capability(bridge, PCI_EXT_CAP_ID_ERR);
2578 ret = pci_read_config_dword(bridge, cap + PCI_ERR_CAP, &err_cap);
2580 dev_err(dev, "failed reading ext-conf-space of %s\n",
2582 dev_err(dev, "\t pci=nommconf in use? "
2583 "or buggy/incomplete/absent ACPI MCFG attr?\n");
2586 if (!(err_cap & PCI_ERR_CAP_ECRC_GENC))
2589 err_cap |= PCI_ERR_CAP_ECRC_GENE;
2590 pci_write_config_dword(bridge, cap + PCI_ERR_CAP, err_cap);
2591 dev_info(dev, "Enabled ECRC on upstream bridge %s\n", pci_name(bridge));
2595 * The Lanai Z8E PCI-E interface achieves higher Read-DMA throughput
2596 * when the PCI-E Completion packets are aligned on an 8-byte
2597 * boundary. Some PCI-E chip sets always align Completion packets; on
2598 * the ones that do not, the alignment can be enforced by enabling
2599 * ECRC generation (if supported).
2601 * When PCI-E Completion packets are not aligned, it is actually more
2602 * efficient to limit Read-DMA transactions to 2KB, rather than 4KB.
2604 * If the driver can neither enable ECRC nor verify that it has
2605 * already been enabled, then it must use a firmware image which works
2606 * around unaligned completion packets (myri10ge_ethp_z8e.dat), and it
2607 * should also ensure that it never gives the device a Read-DMA which is
2608 * larger than 2KB by setting the tx.boundary to 2KB. If ECRC is
2609 * enabled, then the driver should use the aligned (myri10ge_eth_z8e.dat)
2610 * firmware image, and set tx.boundary to 4KB.
2613 static void myri10ge_firmware_probe(struct myri10ge_priv *mgp)
2615 struct pci_dev *pdev = mgp->pdev;
2616 struct device *dev = &pdev->dev;
2619 mgp->tx.boundary = 4096;
2621 * Verify the max read request size was set to 4KB
2622 * before trying the test with 4KB.
2624 status = pcie_get_readrq(pdev);
2626 dev_err(dev, "Couldn't read max read req size: %d\n", status);
2629 if (status != 4096) {
2630 dev_warn(dev, "Max Read Request size != 4096 (%d)\n", status);
2631 mgp->tx.boundary = 2048;
2634 * load the optimized firmware (which assumes aligned PCIe
2635 * completions) in order to see if it works on this host.
2637 mgp->fw_name = myri10ge_fw_aligned;
2638 status = myri10ge_load_firmware(mgp);
2644 * Enable ECRC if possible
2646 myri10ge_enable_ecrc(mgp);
2649 * Run a DMA test which watches for unaligned completions and
2650 * aborts on the first one seen.
2653 status = myri10ge_dma_test(mgp, MXGEFW_CMD_UNALIGNED_TEST);
2655 return; /* keep the aligned firmware */
2657 if (status != -E2BIG)
2658 dev_warn(dev, "DMA test failed: %d\n", status);
2659 if (status == -ENOSYS)
2660 dev_warn(dev, "Falling back to ethp! "
2661 "Please install up to date fw\n");
2663 /* fall back to using the unaligned firmware */
2664 mgp->tx.boundary = 2048;
2665 mgp->fw_name = myri10ge_fw_unaligned;
2669 static void myri10ge_select_firmware(struct myri10ge_priv *mgp)
2671 if (myri10ge_force_firmware == 0) {
2672 int link_width, exp_cap;
2675 exp_cap = pci_find_capability(mgp->pdev, PCI_CAP_ID_EXP);
2676 pci_read_config_word(mgp->pdev, exp_cap + PCI_EXP_LNKSTA, &lnk);
2677 link_width = (lnk >> 4) & 0x3f;
2679 /* Check to see if Link is less than 8 or if the
2680 * upstream bridge is known to provide aligned
2682 if (link_width < 8) {
2683 dev_info(&mgp->pdev->dev, "PCIE x%d Link\n",
2685 mgp->tx.boundary = 4096;
2686 mgp->fw_name = myri10ge_fw_aligned;
2688 myri10ge_firmware_probe(mgp);
2691 if (myri10ge_force_firmware == 1) {
2692 dev_info(&mgp->pdev->dev,
2693 "Assuming aligned completions (forced)\n");
2694 mgp->tx.boundary = 4096;
2695 mgp->fw_name = myri10ge_fw_aligned;
2697 dev_info(&mgp->pdev->dev,
2698 "Assuming unaligned completions (forced)\n");
2699 mgp->tx.boundary = 2048;
2700 mgp->fw_name = myri10ge_fw_unaligned;
2703 if (myri10ge_fw_name != NULL) {
2704 dev_info(&mgp->pdev->dev, "overriding firmware to %s\n",
2706 mgp->fw_name = myri10ge_fw_name;
2711 static int myri10ge_suspend(struct pci_dev *pdev, pm_message_t state)
2713 struct myri10ge_priv *mgp;
2714 struct net_device *netdev;
2716 mgp = pci_get_drvdata(pdev);
2721 netif_device_detach(netdev);
2722 if (netif_running(netdev)) {
2723 printk(KERN_INFO "myri10ge: closing %s\n", netdev->name);
2725 myri10ge_close(netdev);
2728 myri10ge_dummy_rdma(mgp, 0);
2729 pci_save_state(pdev);
2730 pci_disable_device(pdev);
2732 return pci_set_power_state(pdev, pci_choose_state(pdev, state));
2735 static int myri10ge_resume(struct pci_dev *pdev)
2737 struct myri10ge_priv *mgp;
2738 struct net_device *netdev;
2742 mgp = pci_get_drvdata(pdev);
2746 pci_set_power_state(pdev, 0); /* zeros conf space as a side effect */
2747 msleep(5); /* give card time to respond */
2748 pci_read_config_word(mgp->pdev, PCI_VENDOR_ID, &vendor);
2749 if (vendor == 0xffff) {
2750 printk(KERN_ERR "myri10ge: %s: device disappeared!\n",
2755 status = pci_restore_state(pdev);
2759 status = pci_enable_device(pdev);
2761 dev_err(&pdev->dev, "failed to enable device\n");
2765 pci_set_master(pdev);
2767 myri10ge_reset(mgp);
2768 myri10ge_dummy_rdma(mgp, 1);
2770 /* Save configuration space to be restored if the
2771 * nic resets due to a parity error */
2772 pci_save_state(pdev);
2774 if (netif_running(netdev)) {
2776 status = myri10ge_open(netdev);
2779 goto abort_with_enabled;
2782 netif_device_attach(netdev);
2787 pci_disable_device(pdev);
2791 #endif /* CONFIG_PM */
2793 static u32 myri10ge_read_reboot(struct myri10ge_priv *mgp)
2795 struct pci_dev *pdev = mgp->pdev;
2796 int vs = mgp->vendor_specific_offset;
2799 /*enter read32 mode */
2800 pci_write_config_byte(pdev, vs + 0x10, 0x3);
2802 /*read REBOOT_STATUS (0xfffffff0) */
2803 pci_write_config_dword(pdev, vs + 0x18, 0xfffffff0);
2804 pci_read_config_dword(pdev, vs + 0x14, &reboot);
2809 * This watchdog is used to check whether the board has suffered
2810 * from a parity error and needs to be recovered.
2812 static void myri10ge_watchdog(struct work_struct *work)
2814 struct myri10ge_priv *mgp =
2815 container_of(work, struct myri10ge_priv, watchdog_work);
2820 mgp->watchdog_resets++;
2821 pci_read_config_word(mgp->pdev, PCI_COMMAND, &cmd);
2822 if ((cmd & PCI_COMMAND_MASTER) == 0) {
2823 /* Bus master DMA disabled? Check to see
2824 * if the card rebooted due to a parity error
2825 * For now, just report it */
2826 reboot = myri10ge_read_reboot(mgp);
2828 "myri10ge: %s: NIC rebooted (0x%x),%s resetting\n",
2829 mgp->dev->name, reboot,
2830 myri10ge_reset_recover ? " " : " not");
2831 if (myri10ge_reset_recover == 0)
2834 myri10ge_reset_recover--;
2837 * A rebooted nic will come back with config space as
2838 * it was after power was applied to PCIe bus.
2839 * Attempt to restore config space which was saved
2840 * when the driver was loaded, or the last time the
2841 * nic was resumed from power saving mode.
2843 pci_restore_state(mgp->pdev);
2845 /* save state again for accounting reasons */
2846 pci_save_state(mgp->pdev);
2849 /* if we get back -1's from our slot, perhaps somebody
2850 * powered off our card. Don't try to reset it in
2852 if (cmd == 0xffff) {
2853 pci_read_config_word(mgp->pdev, PCI_VENDOR_ID, &vendor);
2854 if (vendor == 0xffff) {
2856 "myri10ge: %s: device disappeared!\n",
2861 /* Perhaps it is a software error. Try to reset */
2863 printk(KERN_ERR "myri10ge: %s: device timeout, resetting\n",
2865 printk(KERN_INFO "myri10ge: %s: %d %d %d %d %d\n",
2866 mgp->dev->name, mgp->tx.req, mgp->tx.done,
2867 mgp->tx.pkt_start, mgp->tx.pkt_done,
2868 (int)ntohl(mgp->fw_stats->send_done_count));
2870 printk(KERN_INFO "myri10ge: %s: %d %d %d %d %d\n",
2871 mgp->dev->name, mgp->tx.req, mgp->tx.done,
2872 mgp->tx.pkt_start, mgp->tx.pkt_done,
2873 (int)ntohl(mgp->fw_stats->send_done_count));
2876 myri10ge_close(mgp->dev);
2877 status = myri10ge_load_firmware(mgp);
2879 printk(KERN_ERR "myri10ge: %s: failed to load firmware\n",
2882 myri10ge_open(mgp->dev);
2887 * We use our own timer routine rather than relying upon
2888 * netdev->tx_timeout because we have a very large hardware transmit
2889 * queue. Due to the large queue, the netdev->tx_timeout function
2890 * cannot detect a NIC with a parity error in a timely fashion if the
2891 * NIC is lightly loaded.
2893 static void myri10ge_watchdog_timer(unsigned long arg)
2895 struct myri10ge_priv *mgp;
2898 mgp = (struct myri10ge_priv *)arg;
2900 if (mgp->rx_small.watchdog_needed) {
2901 myri10ge_alloc_rx_pages(mgp, &mgp->rx_small,
2902 mgp->small_bytes + MXGEFW_PAD, 1);
2903 if (mgp->rx_small.fill_cnt - mgp->rx_small.cnt >=
2904 myri10ge_fill_thresh)
2905 mgp->rx_small.watchdog_needed = 0;
2907 if (mgp->rx_big.watchdog_needed) {
2908 myri10ge_alloc_rx_pages(mgp, &mgp->rx_big, mgp->big_bytes, 1);
2909 if (mgp->rx_big.fill_cnt - mgp->rx_big.cnt >=
2910 myri10ge_fill_thresh)
2911 mgp->rx_big.watchdog_needed = 0;
2913 rx_pause_cnt = ntohl(mgp->fw_stats->dropped_pause);
2915 if (mgp->tx.req != mgp->tx.done &&
2916 mgp->tx.done == mgp->watchdog_tx_done &&
2917 mgp->watchdog_tx_req != mgp->watchdog_tx_done) {
2918 /* nic seems like it might be stuck.. */
2919 if (rx_pause_cnt != mgp->watchdog_pause) {
2920 if (net_ratelimit())
2921 printk(KERN_WARNING "myri10ge %s:"
2922 "TX paused, check link partner\n",
2925 schedule_work(&mgp->watchdog_work);
2930 mod_timer(&mgp->watchdog_timer,
2931 jiffies + myri10ge_watchdog_timeout * HZ);
2932 mgp->watchdog_tx_done = mgp->tx.done;
2933 mgp->watchdog_tx_req = mgp->tx.req;
2934 mgp->watchdog_pause = rx_pause_cnt;
2937 static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2939 struct net_device *netdev;
2940 struct myri10ge_priv *mgp;
2941 struct device *dev = &pdev->dev;
2944 int status = -ENXIO;
2947 netdev = alloc_etherdev(sizeof(*mgp));
2948 if (netdev == NULL) {
2949 dev_err(dev, "Could not allocate ethernet device\n");
2953 SET_NETDEV_DEV(netdev, &pdev->dev);
2955 mgp = netdev_priv(netdev);
2957 netif_napi_add(netdev, &mgp->napi, myri10ge_poll, myri10ge_napi_weight);
2959 mgp->csum_flag = MXGEFW_FLAGS_CKSUM;
2960 mgp->pause = myri10ge_flow_control;
2961 mgp->intr_coal_delay = myri10ge_intr_coal_delay;
2962 mgp->msg_enable = netif_msg_init(myri10ge_debug, MYRI10GE_MSG_DEFAULT);
2963 init_waitqueue_head(&mgp->down_wq);
2965 if (pci_enable_device(pdev)) {
2966 dev_err(&pdev->dev, "pci_enable_device call failed\n");
2968 goto abort_with_netdev;
2971 /* Find the vendor-specific cap so we can check
2972 * the reboot register later on */
2973 mgp->vendor_specific_offset
2974 = pci_find_capability(pdev, PCI_CAP_ID_VNDR);
2976 /* Set our max read request to 4KB */
2977 status = pcie_set_readrq(pdev, 4096);
2979 dev_err(&pdev->dev, "Error %d writing PCI_EXP_DEVCTL\n",
2981 goto abort_with_netdev;
2984 pci_set_master(pdev);
2986 status = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
2990 "64-bit pci address mask was refused, trying 32-bit");
2991 status = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
2994 dev_err(&pdev->dev, "Error %d setting DMA mask\n", status);
2995 goto abort_with_netdev;
2997 mgp->cmd = dma_alloc_coherent(&pdev->dev, sizeof(*mgp->cmd),
2998 &mgp->cmd_bus, GFP_KERNEL);
2999 if (mgp->cmd == NULL)
3000 goto abort_with_netdev;
3002 mgp->fw_stats = dma_alloc_coherent(&pdev->dev, sizeof(*mgp->fw_stats),
3003 &mgp->fw_stats_bus, GFP_KERNEL);
3004 if (mgp->fw_stats == NULL)
3005 goto abort_with_cmd;
3007 mgp->board_span = pci_resource_len(pdev, 0);
3008 mgp->iomem_base = pci_resource_start(pdev, 0);
3010 mgp->wc_enabled = 0;
3012 mgp->mtrr = mtrr_add(mgp->iomem_base, mgp->board_span,
3013 MTRR_TYPE_WRCOMB, 1);
3015 mgp->wc_enabled = 1;
3017 /* Hack. need to get rid of these magic numbers */
3019 2 * 1024 * 1024 - (2 * (48 * 1024) + (32 * 1024)) - 0x100;
3020 if (mgp->sram_size > mgp->board_span) {
3021 dev_err(&pdev->dev, "board span %ld bytes too small\n",
3025 mgp->sram = ioremap(mgp->iomem_base, mgp->board_span);
3026 if (mgp->sram == NULL) {
3027 dev_err(&pdev->dev, "ioremap failed for %ld bytes at 0x%lx\n",
3028 mgp->board_span, mgp->iomem_base);
3032 memcpy_fromio(mgp->eeprom_strings,
3033 mgp->sram + mgp->sram_size - MYRI10GE_EEPROM_STRINGS_SIZE,
3034 MYRI10GE_EEPROM_STRINGS_SIZE);
3035 memset(mgp->eeprom_strings + MYRI10GE_EEPROM_STRINGS_SIZE - 2, 0, 2);
3036 status = myri10ge_read_mac_addr(mgp);
3038 goto abort_with_ioremap;
3040 for (i = 0; i < ETH_ALEN; i++)
3041 netdev->dev_addr[i] = mgp->mac_addr[i];
3043 /* allocate rx done ring */
3044 bytes = myri10ge_max_intr_slots * sizeof(*mgp->rx_done.entry);
3045 mgp->rx_done.entry = dma_alloc_coherent(&pdev->dev, bytes,
3046 &mgp->rx_done.bus, GFP_KERNEL);
3047 if (mgp->rx_done.entry == NULL)
3048 goto abort_with_ioremap;
3049 memset(mgp->rx_done.entry, 0, bytes);
3051 myri10ge_select_firmware(mgp);
3053 status = myri10ge_load_firmware(mgp);
3055 dev_err(&pdev->dev, "failed to load firmware\n");
3056 goto abort_with_rx_done;
3059 status = myri10ge_reset(mgp);
3061 dev_err(&pdev->dev, "failed reset\n");
3062 goto abort_with_firmware;
3065 pci_set_drvdata(pdev, mgp);
3066 if ((myri10ge_initial_mtu + ETH_HLEN) > MYRI10GE_MAX_ETHER_MTU)
3067 myri10ge_initial_mtu = MYRI10GE_MAX_ETHER_MTU - ETH_HLEN;
3068 if ((myri10ge_initial_mtu + ETH_HLEN) < 68)
3069 myri10ge_initial_mtu = 68;
3070 netdev->mtu = myri10ge_initial_mtu;
3071 netdev->open = myri10ge_open;
3072 netdev->stop = myri10ge_close;
3073 netdev->hard_start_xmit = myri10ge_xmit;
3074 netdev->get_stats = myri10ge_get_stats;
3075 netdev->base_addr = mgp->iomem_base;
3076 netdev->change_mtu = myri10ge_change_mtu;
3077 netdev->set_multicast_list = myri10ge_set_multicast_list;
3078 netdev->set_mac_address = myri10ge_set_mac_address;
3079 netdev->features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO;
3081 netdev->features |= NETIF_F_HIGHDMA;
3083 /* make sure we can get an irq, and that MSI can be
3084 * setup (if available). Also ensure netdev->irq
3085 * is set to correct value if MSI is enabled */
3086 status = myri10ge_request_irq(mgp);
3088 goto abort_with_firmware;
3089 netdev->irq = pdev->irq;
3090 myri10ge_free_irq(mgp);
3092 /* Save configuration space to be restored if the
3093 * nic resets due to a parity error */
3094 pci_save_state(pdev);
3096 /* Setup the watchdog timer */
3097 setup_timer(&mgp->watchdog_timer, myri10ge_watchdog_timer,
3098 (unsigned long)mgp);
3100 SET_ETHTOOL_OPS(netdev, &myri10ge_ethtool_ops);
3101 INIT_WORK(&mgp->watchdog_work, myri10ge_watchdog);
3102 status = register_netdev(netdev);
3104 dev_err(&pdev->dev, "register_netdev failed: %d\n", status);
3105 goto abort_with_state;
3107 dev_info(dev, "%s IRQ %d, tx bndry %d, fw %s, WC %s\n",
3108 (mgp->msi_enabled ? "MSI" : "xPIC"),
3109 netdev->irq, mgp->tx.boundary, mgp->fw_name,
3110 (mgp->wc_enabled ? "Enabled" : "Disabled"));
3115 pci_restore_state(pdev);
3117 abort_with_firmware:
3118 myri10ge_dummy_rdma(mgp, 0);
3121 bytes = myri10ge_max_intr_slots * sizeof(*mgp->rx_done.entry);
3122 dma_free_coherent(&pdev->dev, bytes,
3123 mgp->rx_done.entry, mgp->rx_done.bus);
3131 mtrr_del(mgp->mtrr, mgp->iomem_base, mgp->board_span);
3133 dma_free_coherent(&pdev->dev, sizeof(*mgp->fw_stats),
3134 mgp->fw_stats, mgp->fw_stats_bus);
3137 dma_free_coherent(&pdev->dev, sizeof(*mgp->cmd),
3138 mgp->cmd, mgp->cmd_bus);
3142 free_netdev(netdev);
3149 * Does what is necessary to shutdown one Myrinet device. Called
3150 * once for each Myrinet card by the kernel when a module is
3153 static void myri10ge_remove(struct pci_dev *pdev)
3155 struct myri10ge_priv *mgp;
3156 struct net_device *netdev;
3159 mgp = pci_get_drvdata(pdev);
3163 flush_scheduled_work();
3165 unregister_netdev(netdev);
3167 myri10ge_dummy_rdma(mgp, 0);
3169 /* avoid a memory leak */
3170 pci_restore_state(pdev);
3172 bytes = myri10ge_max_intr_slots * sizeof(*mgp->rx_done.entry);
3173 dma_free_coherent(&pdev->dev, bytes,
3174 mgp->rx_done.entry, mgp->rx_done.bus);
3180 mtrr_del(mgp->mtrr, mgp->iomem_base, mgp->board_span);
3182 dma_free_coherent(&pdev->dev, sizeof(*mgp->fw_stats),
3183 mgp->fw_stats, mgp->fw_stats_bus);
3185 dma_free_coherent(&pdev->dev, sizeof(*mgp->cmd),
3186 mgp->cmd, mgp->cmd_bus);
3188 free_netdev(netdev);
3189 pci_set_drvdata(pdev, NULL);
3192 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E 0x0008
3193 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E_9 0x0009
3195 static struct pci_device_id myri10ge_pci_tbl[] = {
3196 {PCI_DEVICE(PCI_VENDOR_ID_MYRICOM, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E)},
3198 (PCI_VENDOR_ID_MYRICOM, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E_9)},
3202 static struct pci_driver myri10ge_driver = {
3204 .probe = myri10ge_probe,
3205 .remove = myri10ge_remove,
3206 .id_table = myri10ge_pci_tbl,
3208 .suspend = myri10ge_suspend,
3209 .resume = myri10ge_resume,
3213 static __init int myri10ge_init_module(void)
3215 printk(KERN_INFO "%s: Version %s\n", myri10ge_driver.name,
3216 MYRI10GE_VERSION_STR);
3217 return pci_register_driver(&myri10ge_driver);
3220 module_init(myri10ge_init_module);
3222 static __exit void myri10ge_cleanup_module(void)
3224 pci_unregister_driver(&myri10ge_driver);
3227 module_exit(myri10ge_cleanup_module);