drivers/net/ixgbe/ixgbe_main.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2008 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #include <linux/types.h>
  29 #include <linux/module.h>
  30 #include <linux/pci.h>
  31 #include <linux/netdevice.h>
  32 #include <linux/vmalloc.h>
  33 #include <linux/string.h>
  34 #include <linux/in.h>
  35 #include <linux/ip.h>
  36 #include <linux/tcp.h>
  37 #include <linux/ipv6.h>
  38 #include <net/checksum.h>
  39 #include <net/ip6_checksum.h>
  40 #include <linux/ethtool.h>
  41 #include <linux/if_vlan.h>
  42
  43 #include "ixgbe.h"
  44 #include "ixgbe_common.h"
  45
  46 char ixgbe_driver_name[] = "ixgbe";
  47 static const char ixgbe_driver_string[] =
  48                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  49
  50 #define DRV_VERSION "1.3.30-k2"
  51 const char ixgbe_driver_version[] = DRV_VERSION;
  52 static char ixgbe_copyright[] = "Copyright (c) 1999-2007 Intel Corporation.";
  53
  54 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  55         [board_82598] = &ixgbe_82598_info,
  56 };
  57
  58 /* ixgbe_pci_tbl - PCI Device ID Table
  59  *
  60  * Wildcard entries (PCI_ANY_ID) should come last
  61  * Last entry must be all 0s
  62  *
  63  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  64  *   Class, Class Mask, private data (not used) }
  65  */
  66 static struct pci_device_id ixgbe_pci_tbl[] = {
  67         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
  68          board_82598 },
  69         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
  70          board_82598 },
  71         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
  72          board_82598 },
  73         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT),
  74          board_82598 },
  75         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR),
  76          board_82598 },
  77
  78         /* required last entry */
  79         {0, }
  80 };
  81 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
  82
  83 #ifdef CONFIG_IXGBE_DCA
  84 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
  85                             void *p);
  86 static struct notifier_block dca_notifier = {
  87         .notifier_call = ixgbe_notify_dca,
  88         .next          = NULL,
  89         .priority      = 0
  90 };
  91 #endif
  92
  93 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  94 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
  95 MODULE_LICENSE("GPL");
  96 MODULE_VERSION(DRV_VERSION);
  97
  98 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
  99
 100 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 101 {
 102         u32 ctrl_ext;
 103
 104         /* Let firmware take over control of h/w */
 105         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 106         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 107                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 108 }
 109
 110 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 111 {
 112         u32 ctrl_ext;
 113
 114         /* Let firmware know the driver has taken over */
 115         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 116         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 117                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 118 }
 119
 120 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
 121                            u8 msix_vector)
 122 {
 123         u32 ivar, index;
 124
 125         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 126         index = (int_alloc_entry >> 2) & 0x1F;
 127         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
 128         ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
 129         ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
 130         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
 131 }
 132
 133 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
 134                                              struct ixgbe_tx_buffer
 135                                              *tx_buffer_info)
 136 {
 137         if (tx_buffer_info->dma) {
 138                 pci_unmap_page(adapter->pdev, tx_buffer_info->dma,
 139                                tx_buffer_info->length, PCI_DMA_TODEVICE);
 140                 tx_buffer_info->dma = 0;
 141         }
 142         if (tx_buffer_info->skb) {
 143                 dev_kfree_skb_any(tx_buffer_info->skb);
 144                 tx_buffer_info->skb = NULL;
 145         }
 146         /* tx_buffer_info must be completely set up in the transmit path */
 147 }
 148
 149 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
 150                                        struct ixgbe_ring *tx_ring,
 151                                        unsigned int eop)
 152 {
 153         struct ixgbe_hw *hw = &adapter->hw;
 154         u32 head, tail;
 155
 156         /* Detect a transmit hang in hardware, this serializes the
 157          * check with the clearing of time_stamp and movement of eop */
 158         head = IXGBE_READ_REG(hw, tx_ring->head);
 159         tail = IXGBE_READ_REG(hw, tx_ring->tail);
 160         adapter->detect_tx_hung = false;
 161         if ((head != tail) &&
 162             tx_ring->tx_buffer_info[eop].time_stamp &&
 163             time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
 164             !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
 165                 /* detected Tx unit hang */
 166                 union ixgbe_adv_tx_desc *tx_desc;
 167                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
 168                 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
 169                         "  Tx Queue             <%d>\n"
 170                         "  TDH, TDT             <%x>, <%x>\n"
 171                         "  next_to_use          <%x>\n"
 172                         "  next_to_clean        <%x>\n"
 173                         "tx_buffer_info[next_to_clean]\n"
 174                         "  time_stamp           <%lx>\n"
 175                         "  jiffies              <%lx>\n",
 176                         tx_ring->queue_index,
 177                         head, tail,
 178                         tx_ring->next_to_use, eop,
 179                         tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
 180                 return true;
 181         }
 182
 183         return false;
 184 }
 185
 186 #define IXGBE_MAX_TXD_PWR       14
 187 #define IXGBE_MAX_DATA_PER_TXD  (1 << IXGBE_MAX_TXD_PWR)
 188
 189 /* Tx Descriptors needed, worst case */
 190 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
 191                          (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
 192 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
 193         MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
 194
 195 #define GET_TX_HEAD_FROM_RING(ring) (\
 196         *(volatile u32 *) \
 197         ((union ixgbe_adv_tx_desc *)(ring)->desc + (ring)->count))
 198 static void ixgbe_tx_timeout(struct net_device *netdev);
 199
 200 /**
 201  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
 202  * @adapter: board private structure
 203  * @tx_ring: tx ring to clean
 204  **/
 205 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
 206                                struct ixgbe_ring *tx_ring)
 207 {
 208         union ixgbe_adv_tx_desc *tx_desc;
 209         struct ixgbe_tx_buffer *tx_buffer_info;
 210         struct net_device *netdev = adapter->netdev;
 211         struct sk_buff *skb;
 212         unsigned int i;
 213         u32 head, oldhead;
 214         unsigned int count = 0;
 215         unsigned int total_bytes = 0, total_packets = 0;
 216
 217         rmb();
 218         head = GET_TX_HEAD_FROM_RING(tx_ring);
 219         head = le32_to_cpu(head);
 220         i = tx_ring->next_to_clean;
 221         while (1) {
 222                 while (i != head) {
 223                         tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
 224                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
 225                         skb = tx_buffer_info->skb;
 226
 227                         if (skb) {
 228                                 unsigned int segs, bytecount;
 229
 230                                 /* gso_segs is currently only valid for tcp */
 231                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
 232                                 /* multiply data chunks by size of headers */
 233                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
 234                                             skb->len;
 235                                 total_packets += segs;
 236                                 total_bytes += bytecount;
 237                         }
 238
 239                         ixgbe_unmap_and_free_tx_resource(adapter,
 240                                                          tx_buffer_info);
 241
 242                         i++;
 243                         if (i == tx_ring->count)
 244                                 i = 0;
 245
 246                         count++;
 247                         if (count == tx_ring->count)
 248                                 goto done_cleaning;
 249                 }
 250                 oldhead = head;
 251                 rmb();
 252                 head = GET_TX_HEAD_FROM_RING(tx_ring);
 253                 head = le32_to_cpu(head);
 254                 if (head == oldhead)
 255                         goto done_cleaning;
 256         } /* while (1) */
 257
 258 done_cleaning:
 259         tx_ring->next_to_clean = i;
 260
 261 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
 262         if (unlikely(count && netif_carrier_ok(netdev) &&
 263                      (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
 264                 /* Make sure that anybody stopping the queue after this
 265                  * sees the new next_to_clean.
 266                  */
 267                 smp_mb();
 268                 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
 269                     !test_bit(__IXGBE_DOWN, &adapter->state)) {
 270                         netif_wake_subqueue(netdev, tx_ring->queue_index);
 271                         ++adapter->restart_queue;
 272                 }
 273         }
 274
 275         if (adapter->detect_tx_hung) {
 276                 if (ixgbe_check_tx_hang(adapter, tx_ring, i)) {
 277                         /* schedule immediate reset if we believe we hung */
 278                         DPRINTK(PROBE, INFO,
 279                                 "tx hang %d detected, resetting adapter\n",
 280                                 adapter->tx_timeout_count + 1);
 281                         ixgbe_tx_timeout(adapter->netdev);
 282                 }
 283         }
 284
 285         /* re-arm the interrupt */
 286         if ((total_packets >= tx_ring->work_limit) ||
 287             (count == tx_ring->count))
 288                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->v_idx);
 289
 290         tx_ring->total_bytes += total_bytes;
 291         tx_ring->total_packets += total_packets;
 292         tx_ring->stats.bytes += total_bytes;
 293         tx_ring->stats.packets += total_packets;
 294         adapter->net_stats.tx_bytes += total_bytes;
 295         adapter->net_stats.tx_packets += total_packets;
 296         return (total_packets ? true : false);
 297 }
 298
 299 #ifdef CONFIG_IXGBE_DCA
 300 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
 301                                 struct ixgbe_ring *rx_ring)
 302 {
 303         u32 rxctrl;
 304         int cpu = get_cpu();
 305         int q = rx_ring - adapter->rx_ring;
 306
 307         if (rx_ring->cpu != cpu) {
 308                 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
 309                 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
 310                 rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
 311                 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
 312                 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
 313                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
 314                 rx_ring->cpu = cpu;
 315         }
 316         put_cpu();
 317 }
 318
 319 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
 320                                 struct ixgbe_ring *tx_ring)
 321 {
 322         u32 txctrl;
 323         int cpu = get_cpu();
 324         int q = tx_ring - adapter->tx_ring;
 325
 326         if (tx_ring->cpu != cpu) {
 327                 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
 328                 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
 329                 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
 330                 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
 331                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
 332                 tx_ring->cpu = cpu;
 333         }
 334         put_cpu();
 335 }
 336
 337 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
 338 {
 339         int i;
 340
 341         if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
 342                 return;
 343
 344         for (i = 0; i < adapter->num_tx_queues; i++) {
 345                 adapter->tx_ring[i].cpu = -1;
 346                 ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]);
 347         }
 348         for (i = 0; i < adapter->num_rx_queues; i++) {
 349                 adapter->rx_ring[i].cpu = -1;
 350                 ixgbe_update_rx_dca(adapter, &adapter->rx_ring[i]);
 351         }
 352 }
 353
 354 static int __ixgbe_notify_dca(struct device *dev, void *data)
 355 {
 356         struct net_device *netdev = dev_get_drvdata(dev);
 357         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 358         unsigned long event = *(unsigned long *)data;
 359
 360         switch (event) {
 361         case DCA_PROVIDER_ADD:
 362                 /* if we're already enabled, don't do it again */
 363                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 364                         break;
 365                 /* Always use CB2 mode, difference is masked
 366                  * in the CB driver. */
 367                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
 368                 if (dca_add_requester(dev) == 0) {
 369                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
 370                         ixgbe_setup_dca(adapter);
 371                         break;
 372                 }
 373                 /* Fall Through since DCA is disabled. */
 374         case DCA_PROVIDER_REMOVE:
 375                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
 376                         dca_remove_requester(dev);
 377                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
 378                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
 379                 }
 380                 break;
 381         }
 382
 383         return 0;
 384 }
 385
 386 #endif /* CONFIG_IXGBE_DCA */
 387 /**
 388  * ixgbe_receive_skb - Send a completed packet up the stack
 389  * @adapter: board private structure
 390  * @skb: packet to send up
 391  * @status: hardware indication of status of receive
 392  * @rx_ring: rx descriptor ring (for a specific queue) to setup
 393  * @rx_desc: rx descriptor
 394  **/
 395 static void ixgbe_receive_skb(struct ixgbe_adapter *adapter,
 396                               struct sk_buff *skb, u8 status,
 397                               struct ixgbe_ring *ring,
 398                               union ixgbe_adv_rx_desc *rx_desc)
 399 {
 400         bool is_vlan = (status & IXGBE_RXD_STAT_VP);
 401         u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
 402
 403         if (adapter->netdev->features & NETIF_F_LRO &&
 404             skb->ip_summed == CHECKSUM_UNNECESSARY) {
 405                 if (adapter->vlgrp && is_vlan)
 406                         lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
 407                                                      adapter->vlgrp, tag,
 408                                                      rx_desc);
 409                 else
 410                         lro_receive_skb(&ring->lro_mgr, skb, rx_desc);
 411                 ring->lro_used = true;
 412         } else {
 413                 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
 414                         if (adapter->vlgrp && is_vlan)
 415                                 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
 416                         else
 417                                 netif_receive_skb(skb);
 418                 } else {
 419                         if (adapter->vlgrp && is_vlan)
 420                                 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
 421                         else
 422                                 netif_rx(skb);
 423                 }
 424         }
 425 }
 426
 427 /**
 428  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
 429  * @adapter: address of board private structure
 430  * @status_err: hardware indication of status of receive
 431  * @skb: skb currently being received and modified
 432  **/
 433 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
 434                                      u32 status_err, struct sk_buff *skb)
 435 {
 436         skb->ip_summed = CHECKSUM_NONE;
 437
 438         /* Rx csum disabled */
 439         if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
 440                 return;
 441
 442         /* if IP and error */
 443         if ((status_err & IXGBE_RXD_STAT_IPCS) &&
 444             (status_err & IXGBE_RXDADV_ERR_IPE)) {
 445                 adapter->hw_csum_rx_error++;
 446                 return;
 447         }
 448
 449         if (!(status_err & IXGBE_RXD_STAT_L4CS))
 450                 return;
 451
 452         if (status_err & IXGBE_RXDADV_ERR_TCPE) {
 453                 adapter->hw_csum_rx_error++;
 454                 return;
 455         }
 456
 457         /* It must be a TCP or UDP packet with a valid checksum */
 458         skb->ip_summed = CHECKSUM_UNNECESSARY;
 459         adapter->hw_csum_rx_good++;
 460 }
 461
 462 /**
 463  * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
 464  * @adapter: address of board private structure
 465  **/
 466 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
 467                                    struct ixgbe_ring *rx_ring,
 468                                    int cleaned_count)
 469 {
 470         struct pci_dev *pdev = adapter->pdev;
 471         union ixgbe_adv_rx_desc *rx_desc;
 472         struct ixgbe_rx_buffer *bi;
 473         unsigned int i;
 474         unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN;
 475
 476         i = rx_ring->next_to_use;
 477         bi = &rx_ring->rx_buffer_info[i];
 478
 479         while (cleaned_count--) {
 480                 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 481
 482                 if (!bi->page_dma &&
 483                     (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
 484                         if (!bi->page) {
 485                                 bi->page = alloc_page(GFP_ATOMIC);
 486                                 if (!bi->page) {
 487                                         adapter->alloc_rx_page_failed++;
 488                                         goto no_buffers;
 489                                 }
 490                                 bi->page_offset = 0;
 491                         } else {
 492                                 /* use a half page if we're re-using */
 493                                 bi->page_offset ^= (PAGE_SIZE / 2);
 494                         }
 495
 496                         bi->page_dma = pci_map_page(pdev, bi->page,
 497                                                     bi->page_offset,
 498                                                     (PAGE_SIZE / 2),
 499                                                     PCI_DMA_FROMDEVICE);
 500                 }
 501
 502                 if (!bi->skb) {
 503                         struct sk_buff *skb = netdev_alloc_skb(adapter->netdev,
 504                                                                bufsz);
 505
 506                         if (!skb) {
 507                                 adapter->alloc_rx_buff_failed++;
 508                                 goto no_buffers;
 509                         }
 510
 511                         /*
 512                          * Make buffer alignment 2 beyond a 16 byte boundary
 513                          * this will result in a 16 byte aligned IP header after
 514                          * the 14 byte MAC header is removed
 515                          */
 516                         skb_reserve(skb, NET_IP_ALIGN);
 517
 518                         bi->skb = skb;
 519                         bi->dma = pci_map_single(pdev, skb->data, bufsz,
 520                                                  PCI_DMA_FROMDEVICE);
 521                 }
 522                 /* Refresh the desc even if buffer_addrs didn't change because
 523                  * each write-back erases this info. */
 524                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 525                         rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
 526                         rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
 527                 } else {
 528                         rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
 529                 }
 530
 531                 i++;
 532                 if (i == rx_ring->count)
 533                         i = 0;
 534                 bi = &rx_ring->rx_buffer_info[i];
 535         }
 536
 537 no_buffers:
 538         if (rx_ring->next_to_use != i) {
 539                 rx_ring->next_to_use = i;
 540                 if (i-- == 0)
 541                         i = (rx_ring->count - 1);
 542
 543                 /*
 544                  * Force memory writes to complete before letting h/w
 545                  * know there are new descriptors to fetch.  (Only
 546                  * applicable for weak-ordered memory model archs,
 547                  * such as IA-64).
 548                  */
 549                 wmb();
 550                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
 551         }
 552 }
 553
 554 static inline u16 ixgbe_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
 555 {
 556         return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
 557 }
 558
 559 static inline u16 ixgbe_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
 560 {
 561         return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
 562 }
 563
 564 static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
 565                                struct ixgbe_ring *rx_ring,
 566                                int *work_done, int work_to_do)
 567 {
 568         struct pci_dev *pdev = adapter->pdev;
 569         union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
 570         struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
 571         struct sk_buff *skb;
 572         unsigned int i;
 573         u32 len, staterr;
 574         u16 hdr_info;
 575         bool cleaned = false;
 576         int cleaned_count = 0;
 577         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 578
 579         i = rx_ring->next_to_clean;
 580         rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 581         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 582         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 583
 584         while (staterr & IXGBE_RXD_STAT_DD) {
 585                 u32 upper_len = 0;
 586                 if (*work_done >= work_to_do)
 587                         break;
 588                 (*work_done)++;
 589
 590                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 591                         hdr_info = le16_to_cpu(ixgbe_get_hdr_info(rx_desc));
 592                         len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
 593                                IXGBE_RXDADV_HDRBUFLEN_SHIFT;
 594                         if (hdr_info & IXGBE_RXDADV_SPH)
 595                                 adapter->rx_hdr_split++;
 596                         if (len > IXGBE_RX_HDR_SIZE)
 597                                 len = IXGBE_RX_HDR_SIZE;
 598                         upper_len = le16_to_cpu(rx_desc->wb.upper.length);
 599                 } else {
 600                         len = le16_to_cpu(rx_desc->wb.upper.length);
 601                 }
 602
 603                 cleaned = true;
 604                 skb = rx_buffer_info->skb;
 605                 prefetch(skb->data - NET_IP_ALIGN);
 606                 rx_buffer_info->skb = NULL;
 607
 608                 if (len && !skb_shinfo(skb)->nr_frags) {
 609                         pci_unmap_single(pdev, rx_buffer_info->dma,
 610                                          rx_ring->rx_buf_len + NET_IP_ALIGN,
 611                                          PCI_DMA_FROMDEVICE);
 612                         skb_put(skb, len);
 613                 }
 614
 615                 if (upper_len) {
 616                         pci_unmap_page(pdev, rx_buffer_info->page_dma,
 617                                        PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
 618                         rx_buffer_info->page_dma = 0;
 619                         skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
 620                                            rx_buffer_info->page,
 621                                            rx_buffer_info->page_offset,
 622                                            upper_len);
 623
 624                         if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
 625                             (page_count(rx_buffer_info->page) != 1))
 626                                 rx_buffer_info->page = NULL;
 627                         else
 628                                 get_page(rx_buffer_info->page);
 629
 630                         skb->len += upper_len;
 631                         skb->data_len += upper_len;
 632                         skb->truesize += upper_len;
 633                 }
 634
 635                 i++;
 636                 if (i == rx_ring->count)
 637                         i = 0;
 638                 next_buffer = &rx_ring->rx_buffer_info[i];
 639
 640                 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
 641                 prefetch(next_rxd);
 642
 643                 cleaned_count++;
 644                 if (staterr & IXGBE_RXD_STAT_EOP) {
 645                         rx_ring->stats.packets++;
 646                         rx_ring->stats.bytes += skb->len;
 647                 } else {
 648                         rx_buffer_info->skb = next_buffer->skb;
 649                         rx_buffer_info->dma = next_buffer->dma;
 650                         next_buffer->skb = skb;
 651                         next_buffer->dma = 0;
 652                         adapter->non_eop_descs++;
 653                         goto next_desc;
 654                 }
 655
 656                 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
 657                         dev_kfree_skb_irq(skb);
 658                         goto next_desc;
 659                 }
 660
 661                 ixgbe_rx_checksum(adapter, staterr, skb);
 662
 663                 /* probably a little skewed due to removing CRC */
 664                 total_rx_bytes += skb->len;
 665                 total_rx_packets++;
 666
 667                 skb->protocol = eth_type_trans(skb, adapter->netdev);
 668                 ixgbe_receive_skb(adapter, skb, staterr, rx_ring, rx_desc);
 669                 adapter->netdev->last_rx = jiffies;
 670
 671 next_desc:
 672                 rx_desc->wb.upper.status_error = 0;
 673
 674                 /* return some buffers to hardware, one at a time is too slow */
 675                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
 676                         ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 677                         cleaned_count = 0;
 678                 }
 679
 680                 /* use prefetched values */
 681                 rx_desc = next_rxd;
 682                 rx_buffer_info = next_buffer;
 683
 684                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 685         }
 686
 687         if (rx_ring->lro_used) {
 688                 lro_flush_all(&rx_ring->lro_mgr);
 689                 rx_ring->lro_used = false;
 690         }
 691
 692         rx_ring->next_to_clean = i;
 693         cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
 694
 695         if (cleaned_count)
 696                 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 697
 698         rx_ring->total_packets += total_rx_packets;
 699         rx_ring->total_bytes += total_rx_bytes;
 700         adapter->net_stats.rx_bytes += total_rx_bytes;
 701         adapter->net_stats.rx_packets += total_rx_packets;
 702
 703         return cleaned;
 704 }
 705
 706 static int ixgbe_clean_rxonly(struct napi_struct *, int);
 707 /**
 708  * ixgbe_configure_msix - Configure MSI-X hardware
 709  * @adapter: board private structure
 710  *
 711  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
 712  * interrupts.
 713  **/
 714 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
 715 {
 716         struct ixgbe_q_vector *q_vector;
 717         int i, j, q_vectors, v_idx, r_idx;
 718         u32 mask;
 719
 720         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
 721
 722         /* Populate the IVAR table and set the ITR values to the
 723          * corresponding register.
 724          */
 725         for (v_idx = 0; v_idx < q_vectors; v_idx++) {
 726                 q_vector = &adapter->q_vector[v_idx];
 727                 /* XXX for_each_bit(...) */
 728                 r_idx = find_first_bit(q_vector->rxr_idx,
 729                                        adapter->num_rx_queues);
 730
 731                 for (i = 0; i < q_vector->rxr_count; i++) {
 732                         j = adapter->rx_ring[r_idx].reg_idx;
 733                         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(j), v_idx);
 734                         r_idx = find_next_bit(q_vector->rxr_idx,
 735                                               adapter->num_rx_queues,
 736                                               r_idx + 1);
 737                 }
 738                 r_idx = find_first_bit(q_vector->txr_idx,
 739                                        adapter->num_tx_queues);
 740
 741                 for (i = 0; i < q_vector->txr_count; i++) {
 742                         j = adapter->tx_ring[r_idx].reg_idx;
 743                         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(j), v_idx);
 744                         r_idx = find_next_bit(q_vector->txr_idx,
 745                                               adapter->num_tx_queues,
 746                                               r_idx + 1);
 747                 }
 748
 749                 /* if this is a tx only vector halve the interrupt rate */
 750                 if (q_vector->txr_count && !q_vector->rxr_count)
 751                         q_vector->eitr = (adapter->eitr_param >> 1);
 752                 else
 753                         /* rx only */
 754                         q_vector->eitr = adapter->eitr_param;
 755
 756                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx),
 757                                 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
 758         }
 759
 760         ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX, v_idx);
 761         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
 762
 763         /* set up to autoclear timer, and the vectors */
 764         mask = IXGBE_EIMS_ENABLE_MASK;
 765         mask &= ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC);
 766         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
 767 }
 768
 769 enum latency_range {
 770         lowest_latency = 0,
 771         low_latency = 1,
 772         bulk_latency = 2,
 773         latency_invalid = 255
 774 };
 775
 776 /**
 777  * ixgbe_update_itr - update the dynamic ITR value based on statistics
 778  * @adapter: pointer to adapter
 779  * @eitr: eitr setting (ints per sec) to give last timeslice
 780  * @itr_setting: current throttle rate in ints/second
 781  * @packets: the number of packets during this measurement interval
 782  * @bytes: the number of bytes during this measurement interval
 783  *
 784  *      Stores a new ITR value based on packets and byte
 785  *      counts during the last interrupt.  The advantage of per interrupt
 786  *      computation is faster updates and more accurate ITR for the current
 787  *      traffic pattern.  Constants in this function were computed
 788  *      based on theoretical maximum wire speed and thresholds were set based
 789  *      on testing data as well as attempting to minimize response time
 790  *      while increasing bulk throughput.
 791  *      this functionality is controlled by the InterruptThrottleRate module
 792  *      parameter (see ixgbe_param.c)
 793  **/
 794 static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
 795                            u32 eitr, u8 itr_setting,
 796                            int packets, int bytes)
 797 {
 798         unsigned int retval = itr_setting;
 799         u32 timepassed_us;
 800         u64 bytes_perint;
 801
 802         if (packets == 0)
 803                 goto update_itr_done;
 804
 805
 806         /* simple throttlerate management
 807          *    0-20MB/s lowest (100000 ints/s)
 808          *   20-100MB/s low   (20000 ints/s)
 809          *  100-1249MB/s bulk (8000 ints/s)
 810          */
 811         /* what was last interrupt timeslice? */
 812         timepassed_us = 1000000/eitr;
 813         bytes_perint = bytes / timepassed_us; /* bytes/usec */
 814
 815         switch (itr_setting) {
 816         case lowest_latency:
 817                 if (bytes_perint > adapter->eitr_low)
 818                         retval = low_latency;
 819                 break;
 820         case low_latency:
 821                 if (bytes_perint > adapter->eitr_high)
 822                         retval = bulk_latency;
 823                 else if (bytes_perint <= adapter->eitr_low)
 824                         retval = lowest_latency;
 825                 break;
 826         case bulk_latency:
 827                 if (bytes_perint <= adapter->eitr_high)
 828                         retval = low_latency;
 829                 break;
 830         }
 831
 832 update_itr_done:
 833         return retval;
 834 }
 835
 836 static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
 837 {
 838         struct ixgbe_adapter *adapter = q_vector->adapter;
 839         struct ixgbe_hw *hw = &adapter->hw;
 840         u32 new_itr;
 841         u8 current_itr, ret_itr;
 842         int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) /
 843                                sizeof(struct ixgbe_q_vector);
 844         struct ixgbe_ring *rx_ring, *tx_ring;
 845
 846         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 847         for (i = 0; i < q_vector->txr_count; i++) {
 848                 tx_ring = &(adapter->tx_ring[r_idx]);
 849                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 850                                            q_vector->tx_itr,
 851                                            tx_ring->total_packets,
 852                                            tx_ring->total_bytes);
 853                 /* if the result for this queue would decrease interrupt
 854                  * rate for this vector then use that result */
 855                 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
 856                                     q_vector->tx_itr - 1 : ret_itr);
 857                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 858                                       r_idx + 1);
 859         }
 860
 861         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 862         for (i = 0; i < q_vector->rxr_count; i++) {
 863                 rx_ring = &(adapter->rx_ring[r_idx]);
 864                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 865                                            q_vector->rx_itr,
 866                                            rx_ring->total_packets,
 867                                            rx_ring->total_bytes);
 868                 /* if the result for this queue would decrease interrupt
 869                  * rate for this vector then use that result */
 870                 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
 871                                     q_vector->rx_itr - 1 : ret_itr);
 872                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
 873                                       r_idx + 1);
 874         }
 875
 876         current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
 877
 878         switch (current_itr) {
 879         /* counts and packets in update_itr are dependent on these numbers */
 880         case lowest_latency:
 881                 new_itr = 100000;
 882                 break;
 883         case low_latency:
 884                 new_itr = 20000; /* aka hwitr = ~200 */
 885                 break;
 886         case bulk_latency:
 887         default:
 888                 new_itr = 8000;
 889                 break;
 890         }
 891
 892         if (new_itr != q_vector->eitr) {
 893                 u32 itr_reg;
 894                 /* do an exponential smoothing */
 895                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
 896                 q_vector->eitr = new_itr;
 897                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
 898                 /* must write high and low 16 bits to reset counter */
 899                 DPRINTK(TX_ERR, DEBUG, "writing eitr(%d): %08X\n", v_idx,
 900                         itr_reg);
 901                 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg | (itr_reg)<<16);
 902         }
 903
 904         return;
 905 }
 906
 907
 908 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
 909 {
 910         struct ixgbe_hw *hw = &adapter->hw;
 911
 912         adapter->lsc_int++;
 913         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
 914         adapter->link_check_timeout = jiffies;
 915         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
 916                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
 917                 schedule_work(&adapter->watchdog_task);
 918         }
 919 }
 920
 921 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
 922 {
 923         struct net_device *netdev = data;
 924         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 925         struct ixgbe_hw *hw = &adapter->hw;
 926         u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
 927
 928         if (eicr & IXGBE_EICR_LSC)
 929                 ixgbe_check_lsc(adapter);
 930
 931         if (!test_bit(__IXGBE_DOWN, &adapter->state))
 932                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
 933
 934         return IRQ_HANDLED;
 935 }
 936
 937 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
 938 {
 939         struct ixgbe_q_vector *q_vector = data;
 940         struct ixgbe_adapter  *adapter = q_vector->adapter;
 941         struct ixgbe_ring     *tx_ring;
 942         int i, r_idx;
 943
 944         if (!q_vector->txr_count)
 945                 return IRQ_HANDLED;
 946
 947         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 948         for (i = 0; i < q_vector->txr_count; i++) {
 949                 tx_ring = &(adapter->tx_ring[r_idx]);
 950 #ifdef CONFIG_IXGBE_DCA
 951                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 952                         ixgbe_update_tx_dca(adapter, tx_ring);
 953 #endif
 954                 tx_ring->total_bytes = 0;
 955                 tx_ring->total_packets = 0;
 956                 ixgbe_clean_tx_irq(adapter, tx_ring);
 957                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 958                                       r_idx + 1);
 959         }
 960
 961         return IRQ_HANDLED;
 962 }
 963
 964 /**
 965  * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
 966  * @irq: unused
 967  * @data: pointer to our q_vector struct for this interrupt vector
 968  **/
 969 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
 970 {
 971         struct ixgbe_q_vector *q_vector = data;
 972         struct ixgbe_adapter  *adapter = q_vector->adapter;
 973         struct ixgbe_ring  *rx_ring;
 974         int r_idx;
 975         int i;
 976
 977         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 978         for (i = 0;  i < q_vector->rxr_count; i++) {
 979                 rx_ring = &(adapter->rx_ring[r_idx]);
 980                 rx_ring->total_bytes = 0;
 981                 rx_ring->total_packets = 0;
 982                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
 983                                       r_idx + 1);
 984         }
 985
 986         if (!q_vector->rxr_count)
 987                 return IRQ_HANDLED;
 988
 989         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 990         rx_ring = &(adapter->rx_ring[r_idx]);
 991         /* disable interrupts on this vector only */
 992         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rx_ring->v_idx);
 993         netif_rx_schedule(adapter->netdev, &q_vector->napi);
 994
 995         return IRQ_HANDLED;
 996 }
 997
 998 static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
 999 {
1000         ixgbe_msix_clean_rx(irq, data);
1001         ixgbe_msix_clean_tx(irq, data);
1002
1003         return IRQ_HANDLED;
1004 }
1005
1006 /**
1007  * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1008  * @napi: napi struct with our devices info in it
1009  * @budget: amount of work driver is allowed to do this pass, in packets
1010  *
1011  * This function is optimized for cleaning one queue only on a single
1012  * q_vector!!!
1013  **/
1014 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
1015 {
1016         struct ixgbe_q_vector *q_vector =
1017                                container_of(napi, struct ixgbe_q_vector, napi);
1018         struct ixgbe_adapter *adapter = q_vector->adapter;
1019         struct ixgbe_ring *rx_ring = NULL;
1020         int work_done = 0;
1021         long r_idx;
1022
1023         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1024         rx_ring = &(adapter->rx_ring[r_idx]);
1025 #ifdef CONFIG_IXGBE_DCA
1026         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1027                 ixgbe_update_rx_dca(adapter, rx_ring);
1028 #endif
1029
1030         ixgbe_clean_rx_irq(adapter, rx_ring, &work_done, budget);
1031
1032         /* If all Rx work done, exit the polling mode */
1033         if (work_done < budget) {
1034                 netif_rx_complete(adapter->netdev, napi);
1035                 if (adapter->itr_setting & 3)
1036                         ixgbe_set_itr_msix(q_vector);
1037                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1038                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rx_ring->v_idx);
1039         }
1040
1041         return work_done;
1042 }
1043
1044 /**
1045  * ixgbe_clean_rxonly_many - msix (aka one shot) rx clean routine
1046  * @napi: napi struct with our devices info in it
1047  * @budget: amount of work driver is allowed to do this pass, in packets
1048  *
1049  * This function will clean more than one rx queue associated with a
1050  * q_vector.
1051  **/
1052 static int ixgbe_clean_rxonly_many(struct napi_struct *napi, int budget)
1053 {
1054         struct ixgbe_q_vector *q_vector =
1055                                container_of(napi, struct ixgbe_q_vector, napi);
1056         struct ixgbe_adapter *adapter = q_vector->adapter;
1057         struct ixgbe_ring *rx_ring = NULL;
1058         int work_done = 0, i;
1059         long r_idx;
1060         u16 enable_mask = 0;
1061
1062         /* attempt to distribute budget to each queue fairly, but don't allow
1063          * the budget to go below 1 because we'll exit polling */
1064         budget /= (q_vector->rxr_count ?: 1);
1065         budget = max(budget, 1);
1066         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1067         for (i = 0; i < q_vector->rxr_count; i++) {
1068                 rx_ring = &(adapter->rx_ring[r_idx]);
1069 #ifdef CONFIG_IXGBE_DCA
1070                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1071                         ixgbe_update_rx_dca(adapter, rx_ring);
1072 #endif
1073                 ixgbe_clean_rx_irq(adapter, rx_ring, &work_done, budget);
1074                 enable_mask |= rx_ring->v_idx;
1075                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1076                                       r_idx + 1);
1077         }
1078
1079         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1080         rx_ring = &(adapter->rx_ring[r_idx]);
1081         /* If all Rx work done, exit the polling mode */
1082         if (work_done < budget) {
1083                 netif_rx_complete(adapter->netdev, napi);
1084                 if (adapter->itr_setting & 3)
1085                         ixgbe_set_itr_msix(q_vector);
1086                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1087                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, enable_mask);
1088                 return 0;
1089         }
1090
1091         return work_done;
1092 }
1093 static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
1094                                      int r_idx)
1095 {
1096         a->q_vector[v_idx].adapter = a;
1097         set_bit(r_idx, a->q_vector[v_idx].rxr_idx);
1098         a->q_vector[v_idx].rxr_count++;
1099         a->rx_ring[r_idx].v_idx = 1 << v_idx;
1100 }
1101
1102 static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
1103                                      int r_idx)
1104 {
1105         a->q_vector[v_idx].adapter = a;
1106         set_bit(r_idx, a->q_vector[v_idx].txr_idx);
1107         a->q_vector[v_idx].txr_count++;
1108         a->tx_ring[r_idx].v_idx = 1 << v_idx;
1109 }
1110
1111 /**
1112  * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1113  * @adapter: board private structure to initialize
1114  * @vectors: allotted vector count for descriptor rings
1115  *
1116  * This function maps descriptor rings to the queue-specific vectors
1117  * we were allotted through the MSI-X enabling code.  Ideally, we'd have
1118  * one vector per ring/queue, but on a constrained vector budget, we
1119  * group the rings as "efficiently" as possible.  You would add new
1120  * mapping configurations in here.
1121  **/
1122 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
1123                                       int vectors)
1124 {
1125         int v_start = 0;
1126         int rxr_idx = 0, txr_idx = 0;
1127         int rxr_remaining = adapter->num_rx_queues;
1128         int txr_remaining = adapter->num_tx_queues;
1129         int i, j;
1130         int rqpv, tqpv;
1131         int err = 0;
1132
1133         /* No mapping required if MSI-X is disabled. */
1134         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1135                 goto out;
1136
1137         /*
1138          * The ideal configuration...
1139          * We have enough vectors to map one per queue.
1140          */
1141         if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1142                 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1143                         map_vector_to_rxq(adapter, v_start, rxr_idx);
1144
1145                 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1146                         map_vector_to_txq(adapter, v_start, txr_idx);
1147
1148                 goto out;
1149         }
1150
1151         /*
1152          * If we don't have enough vectors for a 1-to-1
1153          * mapping, we'll have to group them so there are
1154          * multiple queues per vector.
1155          */
1156         /* Re-adjusting *qpv takes care of the remainder. */
1157         for (i = v_start; i < vectors; i++) {
1158                 rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i);
1159                 for (j = 0; j < rqpv; j++) {
1160                         map_vector_to_rxq(adapter, i, rxr_idx);
1161                         rxr_idx++;
1162                         rxr_remaining--;
1163                 }
1164         }
1165         for (i = v_start; i < vectors; i++) {
1166                 tqpv = DIV_ROUND_UP(txr_remaining, vectors - i);
1167                 for (j = 0; j < tqpv; j++) {
1168                         map_vector_to_txq(adapter, i, txr_idx);
1169                         txr_idx++;
1170                         txr_remaining--;
1171                 }
1172         }
1173
1174 out:
1175         return err;
1176 }
1177
1178 /**
1179  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1180  * @adapter: board private structure
1181  *
1182  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1183  * interrupts from the kernel.
1184  **/
1185 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1186 {
1187         struct net_device *netdev = adapter->netdev;
1188         irqreturn_t (*handler)(int, void *);
1189         int i, vector, q_vectors, err;
1190
1191         /* Decrement for Other and TCP Timer vectors */
1192         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1193
1194         /* Map the Tx/Rx rings to the vectors we were allotted. */
1195         err = ixgbe_map_rings_to_vectors(adapter, q_vectors);
1196         if (err)
1197                 goto out;
1198
1199 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1200                          (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1201                          &ixgbe_msix_clean_many)
1202         for (vector = 0; vector < q_vectors; vector++) {
1203                 handler = SET_HANDLER(&adapter->q_vector[vector]);
1204                 sprintf(adapter->name[vector], "%s:v%d-%s",
1205                         netdev->name, vector,
1206                         (handler == &ixgbe_msix_clean_rx) ? "Rx" :
1207                          ((handler == &ixgbe_msix_clean_tx) ? "Tx" : "TxRx"));
1208                 err = request_irq(adapter->msix_entries[vector].vector,
1209                                   handler, 0, adapter->name[vector],
1210                                   &(adapter->q_vector[vector]));
1211                 if (err) {
1212                         DPRINTK(PROBE, ERR,
1213                                 "request_irq failed for MSIX interrupt "
1214                                 "Error: %d\n", err);
1215                         goto free_queue_irqs;
1216                 }
1217         }
1218
1219         sprintf(adapter->name[vector], "%s:lsc", netdev->name);
1220         err = request_irq(adapter->msix_entries[vector].vector,
1221                           &ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
1222         if (err) {
1223                 DPRINTK(PROBE, ERR,
1224                         "request_irq for msix_lsc failed: %d\n", err);
1225                 goto free_queue_irqs;
1226         }
1227
1228         return 0;
1229
1230 free_queue_irqs:
1231         for (i = vector - 1; i >= 0; i--)
1232                 free_irq(adapter->msix_entries[--vector].vector,
1233                          &(adapter->q_vector[i]));
1234         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
1235         pci_disable_msix(adapter->pdev);
1236         kfree(adapter->msix_entries);
1237         adapter->msix_entries = NULL;
1238 out:
1239         return err;
1240 }
1241
1242 static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1243 {
1244         struct ixgbe_hw *hw = &adapter->hw;
1245         struct ixgbe_q_vector *q_vector = adapter->q_vector;
1246         u8 current_itr;
1247         u32 new_itr = q_vector->eitr;
1248         struct ixgbe_ring *rx_ring = &adapter->rx_ring[0];
1249         struct ixgbe_ring *tx_ring = &adapter->tx_ring[0];
1250
1251         q_vector->tx_itr = ixgbe_update_itr(adapter, new_itr,
1252                                             q_vector->tx_itr,
1253                                             tx_ring->total_packets,
1254                                             tx_ring->total_bytes);
1255         q_vector->rx_itr = ixgbe_update_itr(adapter, new_itr,
1256                                             q_vector->rx_itr,
1257                                             rx_ring->total_packets,
1258                                             rx_ring->total_bytes);
1259
1260         current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
1261
1262         switch (current_itr) {
1263         /* counts and packets in update_itr are dependent on these numbers */
1264         case lowest_latency:
1265                 new_itr = 100000;
1266                 break;
1267         case low_latency:
1268                 new_itr = 20000; /* aka hwitr = ~200 */
1269                 break;
1270         case bulk_latency:
1271                 new_itr = 8000;
1272                 break;
1273         default:
1274                 break;
1275         }
1276
1277         if (new_itr != q_vector->eitr) {
1278                 u32 itr_reg;
1279                 /* do an exponential smoothing */
1280                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
1281                 q_vector->eitr = new_itr;
1282                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
1283                 /* must write high and low 16 bits to reset counter */
1284                 IXGBE_WRITE_REG(hw, IXGBE_EITR(0), itr_reg | (itr_reg)<<16);
1285         }
1286
1287         return;
1288 }
1289
1290 /**
1291  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1292  * @adapter: board private structure
1293  **/
1294 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
1295 {
1296         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
1297         IXGBE_WRITE_FLUSH(&adapter->hw);
1298         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1299                 int i;
1300                 for (i = 0; i < adapter->num_msix_vectors; i++)
1301                         synchronize_irq(adapter->msix_entries[i].vector);
1302         } else {
1303                 synchronize_irq(adapter->pdev->irq);
1304         }
1305 }
1306
1307 /**
1308  * ixgbe_irq_enable - Enable default interrupt generation settings
1309  * @adapter: board private structure
1310  **/
1311 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
1312 {
1313         u32 mask;
1314         mask = IXGBE_EIMS_ENABLE_MASK;
1315         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1316         IXGBE_WRITE_FLUSH(&adapter->hw);
1317 }
1318
1319 /**
1320  * ixgbe_intr - legacy mode Interrupt Handler
1321  * @irq: interrupt number
1322  * @data: pointer to a network interface device structure
1323  **/
1324 static irqreturn_t ixgbe_intr(int irq, void *data)
1325 {
1326         struct net_device *netdev = data;
1327         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1328         struct ixgbe_hw *hw = &adapter->hw;
1329         u32 eicr;
1330
1331         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1332          * therefore no explict interrupt disable is necessary */
1333         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
1334         if (!eicr) {
1335                 /* shared interrupt alert!
1336                  * make sure interrupts are enabled because the read will
1337                  * have disabled interrupts due to EIAM */
1338                 ixgbe_irq_enable(adapter);
1339                 return IRQ_NONE;        /* Not our interrupt */
1340         }
1341
1342         if (eicr & IXGBE_EICR_LSC)
1343                 ixgbe_check_lsc(adapter);
1344
1345         if (netif_rx_schedule_prep(netdev, &adapter->q_vector[0].napi)) {
1346                 adapter->tx_ring[0].total_packets = 0;
1347                 adapter->tx_ring[0].total_bytes = 0;
1348                 adapter->rx_ring[0].total_packets = 0;
1349                 adapter->rx_ring[0].total_bytes = 0;
1350                 /* would disable interrupts here but EIAM disabled it */
1351                 __netif_rx_schedule(netdev, &adapter->q_vector[0].napi);
1352         }
1353
1354         return IRQ_HANDLED;
1355 }
1356
1357 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
1358 {
1359         int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1360
1361         for (i = 0; i < q_vectors; i++) {
1362                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
1363                 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1364                 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1365                 q_vector->rxr_count = 0;
1366                 q_vector->txr_count = 0;
1367         }
1368 }
1369
1370 /**
1371  * ixgbe_request_irq - initialize interrupts
1372  * @adapter: board private structure
1373  *
1374  * Attempts to configure interrupts using the best available
1375  * capabilities of the hardware and kernel.
1376  **/
1377 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
1378 {
1379         struct net_device *netdev = adapter->netdev;
1380         int err;
1381
1382         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1383                 err = ixgbe_request_msix_irqs(adapter);
1384         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1385                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0,
1386                                   netdev->name, netdev);
1387         } else {
1388                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED,
1389                                   netdev->name, netdev);
1390         }
1391
1392         if (err)
1393                 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
1394
1395         return err;
1396 }
1397
1398 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1399 {
1400         struct net_device *netdev = adapter->netdev;
1401
1402         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1403                 int i, q_vectors;
1404
1405                 q_vectors = adapter->num_msix_vectors;
1406
1407                 i = q_vectors - 1;
1408                 free_irq(adapter->msix_entries[i].vector, netdev);
1409
1410                 i--;
1411                 for (; i >= 0; i--) {
1412                         free_irq(adapter->msix_entries[i].vector,
1413                                  &(adapter->q_vector[i]));
1414                 }
1415
1416                 ixgbe_reset_q_vectors(adapter);
1417         } else {
1418                 free_irq(adapter->pdev->irq, netdev);
1419         }
1420 }
1421
1422 /**
1423  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1424  *
1425  **/
1426 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
1427 {
1428         struct ixgbe_hw *hw = &adapter->hw;
1429
1430         IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
1431                         EITR_INTS_PER_SEC_TO_REG(adapter->eitr_param));
1432
1433         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
1434         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(0), 0);
1435
1436         map_vector_to_rxq(adapter, 0, 0);
1437         map_vector_to_txq(adapter, 0, 0);
1438
1439         DPRINTK(HW, INFO, "Legacy interrupt IVAR setup done\n");
1440 }
1441
1442 /**
1443  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1444  * @adapter: board private structure
1445  *
1446  * Configure the Tx unit of the MAC after a reset.
1447  **/
1448 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1449 {
1450         u64 tdba, tdwba;
1451         struct ixgbe_hw *hw = &adapter->hw;
1452         u32 i, j, tdlen, txctrl;
1453
1454         /* Setup the HW Tx Head and Tail descriptor pointers */
1455         for (i = 0; i < adapter->num_tx_queues; i++) {
1456                 struct ixgbe_ring *ring = &adapter->tx_ring[i];
1457                 j = ring->reg_idx;
1458                 tdba = ring->dma;
1459                 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1460                 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
1461                                 (tdba & DMA_32BIT_MASK));
1462                 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
1463                 tdwba = ring->dma +
1464                         (ring->count * sizeof(union ixgbe_adv_tx_desc));
1465                 tdwba |= IXGBE_TDWBAL_HEAD_WB_ENABLE;
1466                 IXGBE_WRITE_REG(hw, IXGBE_TDWBAL(j), tdwba & DMA_32BIT_MASK);
1467                 IXGBE_WRITE_REG(hw, IXGBE_TDWBAH(j), (tdwba >> 32));
1468                 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
1469                 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
1470                 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
1471                 adapter->tx_ring[i].head = IXGBE_TDH(j);
1472                 adapter->tx_ring[i].tail = IXGBE_TDT(j);
1473                 /* Disable Tx Head Writeback RO bit, since this hoses
1474                  * bookkeeping if things aren't delivered in order.
1475                  */
1476                 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
1477                 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1478                 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
1479         }
1480 }
1481
1482 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1483
1484 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index)
1485 {
1486         struct ixgbe_ring *rx_ring;
1487         u32 srrctl;
1488         int queue0;
1489         unsigned long mask;
1490
1491         /* program one srrctl register per VMDq index */
1492         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
1493                 long shift, len;
1494                 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1495                 len = sizeof(adapter->ring_feature[RING_F_VMDQ].mask) * 8;
1496                 shift = find_first_bit(&mask, len);
1497                 queue0 = index & mask;
1498                 index = (index & mask) >> shift;
1499         /* program one srrctl per RSS queue since RDRXCTL.MVMEN is enabled */
1500         } else {
1501                 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1502                 queue0 = index & mask;
1503                 index = index & mask;
1504         }
1505
1506         rx_ring = &adapter->rx_ring[queue0];
1507
1508         srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(index));
1509
1510         srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1511         srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1512
1513         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1514                 srrctl |= IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1515                 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1516                 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1517                             IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1518                            IXGBE_SRRCTL_BSIZEHDR_MASK);
1519         } else {
1520                 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1521
1522                 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1523                         srrctl |= IXGBE_RXBUFFER_2048 >>
1524                                   IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1525                 else
1526                         srrctl |= rx_ring->rx_buf_len >>
1527                                   IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1528         }
1529         IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl);
1530 }
1531
1532 /**
1533  * ixgbe_get_skb_hdr - helper function for LRO header processing
1534  * @skb: pointer to sk_buff to be added to LRO packet
1535  * @iphdr: pointer to ip header structure
1536  * @tcph: pointer to tcp header structure
1537  * @hdr_flags: pointer to header flags
1538  * @priv: private data
1539  **/
1540 static int ixgbe_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
1541                              u64 *hdr_flags, void *priv)
1542 {
1543         union ixgbe_adv_rx_desc *rx_desc = priv;
1544
1545         /* Verify that this is a valid IPv4 TCP packet */
1546         if (!((ixgbe_get_pkt_info(rx_desc) & IXGBE_RXDADV_PKTTYPE_IPV4) &&
1547              (ixgbe_get_pkt_info(rx_desc) & IXGBE_RXDADV_PKTTYPE_TCP)))
1548                 return -1;
1549
1550         /* Set network headers */
1551         skb_reset_network_header(skb);
1552         skb_set_transport_header(skb, ip_hdrlen(skb));
1553         *iphdr = ip_hdr(skb);
1554         *tcph = tcp_hdr(skb);
1555         *hdr_flags = LRO_IPV4 | LRO_TCP;
1556         return 0;
1557 }
1558
1559 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1560                            (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1561
1562 /**
1563  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1564  * @adapter: board private structure
1565  *
1566  * Configure the Rx unit of the MAC after a reset.
1567  **/
1568 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1569 {
1570         u64 rdba;
1571         struct ixgbe_hw *hw = &adapter->hw;
1572         struct net_device *netdev = adapter->netdev;
1573         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1574         int i, j;
1575         u32 rdlen, rxctrl, rxcsum;
1576         static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1577                           0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1578                           0x6A3E67EA, 0x14364D17, 0x3BED200D};
1579         u32 fctrl, hlreg0;
1580         u32 pages;
1581         u32 reta = 0, mrqc;
1582         u32 rdrxctl;
1583         int rx_buf_len;
1584
1585         /* Decide whether to use packet split mode or not */
1586         adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1587
1588         /* Set the RX buffer length according to the mode */
1589         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1590                 rx_buf_len = IXGBE_RX_HDR_SIZE;
1591         } else {
1592                 if (netdev->mtu <= ETH_DATA_LEN)
1593                         rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1594                 else
1595                         rx_buf_len = ALIGN(max_frame, 1024);
1596         }
1597
1598         fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1599         fctrl |= IXGBE_FCTRL_BAM;
1600         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
1601         IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
1602
1603         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1604         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1605                 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
1606         else
1607                 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
1608         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
1609
1610         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1611
1612         rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1613         /* disable receives while setting up the descriptors */
1614         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1615         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1616
1617         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1618          * the Base and Length of the Rx Descriptor Ring */
1619         for (i = 0; i < adapter->num_rx_queues; i++) {
1620                 rdba = adapter->rx_ring[i].dma;
1621                 j = adapter->rx_ring[i].reg_idx;
1622                 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & DMA_32BIT_MASK));
1623                 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
1624                 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), rdlen);
1625                 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
1626                 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
1627                 adapter->rx_ring[i].head = IXGBE_RDH(j);
1628                 adapter->rx_ring[i].tail = IXGBE_RDT(j);
1629                 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1630                 /* Intitial LRO Settings */
1631                 adapter->rx_ring[i].lro_mgr.max_aggr = IXGBE_MAX_LRO_AGGREGATE;
1632                 adapter->rx_ring[i].lro_mgr.max_desc = IXGBE_MAX_LRO_DESCRIPTORS;
1633                 adapter->rx_ring[i].lro_mgr.get_skb_header = ixgbe_get_skb_hdr;
1634                 adapter->rx_ring[i].lro_mgr.features = LRO_F_EXTRACT_VLAN_ID;
1635                 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1636                         adapter->rx_ring[i].lro_mgr.features |= LRO_F_NAPI;
1637                 adapter->rx_ring[i].lro_mgr.dev = adapter->netdev;
1638                 adapter->rx_ring[i].lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1639                 adapter->rx_ring[i].lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1640
1641                 ixgbe_configure_srrctl(adapter, j);
1642         }
1643
1644         /*
1645          * For VMDq support of different descriptor types or
1646          * buffer sizes through the use of multiple SRRCTL
1647          * registers, RDRXCTL.MVMEN must be set to 1
1648          *
1649          * also, the manual doesn't mention it clearly but DCA hints
1650          * will only use queue 0's tags unless this bit is set.  Side
1651          * effects of setting this bit are only that SRRCTL must be
1652          * fully programmed [0..15]
1653          */
1654         rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
1655         rdrxctl |= IXGBE_RDRXCTL_MVMEN;
1656         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
1657
1658
1659         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
1660                 /* Fill out redirection table */
1661                 for (i = 0, j = 0; i < 128; i++, j++) {
1662                         if (j == adapter->ring_feature[RING_F_RSS].indices)
1663                                 j = 0;
1664                         /* reta = 4-byte sliding window of
1665                          * 0x00..(indices-1)(indices-1)00..etc. */
1666                         reta = (reta << 8) | (j * 0x11);
1667                         if ((i & 3) == 3)
1668                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
1669                 }
1670
1671                 /* Fill out hash function seeds */
1672                 for (i = 0; i < 10; i++)
1673                         IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
1674
1675                 mrqc = IXGBE_MRQC_RSSEN
1676                     /* Perform hash on these packet types */
1677                        | IXGBE_MRQC_RSS_FIELD_IPV4
1678                        | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1679                        | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1680                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1681                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1682                        | IXGBE_MRQC_RSS_FIELD_IPV6
1683                        | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1684                        | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1685                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1686                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1687         }
1688
1689         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1690
1691         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED ||
1692             adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1693                 /* Disable indicating checksum in descriptor, enables
1694                  * RSS hash */
1695                 rxcsum |= IXGBE_RXCSUM_PCSD;
1696         }
1697         if (!(rxcsum & IXGBE_RXCSUM_PCSD)) {
1698                 /* Enable IPv4 payload checksum for UDP fragments
1699                  * if PCSD is not set */
1700                 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1701         }
1702
1703         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1704 }
1705
1706 static void ixgbe_vlan_rx_register(struct net_device *netdev,
1707                                    struct vlan_group *grp)
1708 {
1709         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1710         u32 ctrl;
1711
1712         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1713                 ixgbe_irq_disable(adapter);
1714         adapter->vlgrp = grp;
1715
1716         if (grp) {
1717                 /* enable VLAN tag insert/strip */
1718                 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1719                 ctrl |= IXGBE_VLNCTRL_VME;
1720                 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1721                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1722         }
1723
1724         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1725                 ixgbe_irq_enable(adapter);
1726 }
1727
1728 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1729 {
1730         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1731         struct ixgbe_hw *hw = &adapter->hw;
1732
1733         /* add VID to filter table */
1734         hw->mac.ops.set_vfta(&adapter->hw, vid, 0, true);
1735 }
1736
1737 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1738 {
1739         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1740         struct ixgbe_hw *hw = &adapter->hw;
1741
1742         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1743                 ixgbe_irq_disable(adapter);
1744
1745         vlan_group_set_device(adapter->vlgrp, vid, NULL);
1746
1747         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1748                 ixgbe_irq_enable(adapter);
1749
1750         /* remove VID from filter table */
1751         hw->mac.ops.set_vfta(&adapter->hw, vid, 0, false);
1752 }
1753
1754 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1755 {
1756         ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1757
1758         if (adapter->vlgrp) {
1759                 u16 vid;
1760                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1761                         if (!vlan_group_get_device(adapter->vlgrp, vid))
1762                                 continue;
1763                         ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1764                 }
1765         }
1766 }
1767
1768 static u8 *ixgbe_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr, u32 *vmdq)
1769 {
1770         struct dev_mc_list *mc_ptr;
1771         u8 *addr = *mc_addr_ptr;
1772         *vmdq = 0;
1773
1774         mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
1775         if (mc_ptr->next)
1776                 *mc_addr_ptr = mc_ptr->next->dmi_addr;
1777         else
1778                 *mc_addr_ptr = NULL;
1779
1780         return addr;
1781 }
1782
1783 /**
1784  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1785  * @netdev: network interface device structure
1786  *
1787  * The set_rx_method entry point is called whenever the unicast/multicast
1788  * address list or the network interface flags are updated.  This routine is
1789  * responsible for configuring the hardware for proper unicast, multicast and
1790  * promiscuous mode.
1791  **/
1792 static void ixgbe_set_rx_mode(struct net_device *netdev)
1793 {
1794         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1795         struct ixgbe_hw *hw = &adapter->hw;
1796         u32 fctrl, vlnctrl;
1797         u8 *addr_list = NULL;
1798         int addr_count = 0;
1799
1800         /* Check for Promiscuous and All Multicast modes */
1801
1802         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1803         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1804
1805         if (netdev->flags & IFF_PROMISC) {
1806                 hw->addr_ctrl.user_set_promisc = 1;
1807                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1808                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
1809         } else {
1810                 if (netdev->flags & IFF_ALLMULTI) {
1811                         fctrl |= IXGBE_FCTRL_MPE;
1812                         fctrl &= ~IXGBE_FCTRL_UPE;
1813                 } else {
1814                         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1815                 }
1816                 vlnctrl |= IXGBE_VLNCTRL_VFE;
1817                 hw->addr_ctrl.user_set_promisc = 0;
1818         }
1819
1820         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1821         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
1822
1823         /* reprogram secondary unicast list */
1824         addr_count = netdev->uc_count;
1825         if (addr_count)
1826                 addr_list = netdev->uc_list->dmi_addr;
1827         hw->mac.ops.update_uc_addr_list(hw, addr_list, addr_count,
1828                                           ixgbe_addr_list_itr);
1829
1830         /* reprogram multicast list */
1831         addr_count = netdev->mc_count;
1832         if (addr_count)
1833                 addr_list = netdev->mc_list->dmi_addr;
1834         hw->mac.ops.update_mc_addr_list(hw, addr_list, addr_count,
1835                                         ixgbe_addr_list_itr);
1836 }
1837
1838 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
1839 {
1840         int q_idx;
1841         struct ixgbe_q_vector *q_vector;
1842         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1843
1844         /* legacy and MSI only use one vector */
1845         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1846                 q_vectors = 1;
1847
1848         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1849                 struct napi_struct *napi;
1850                 q_vector = &adapter->q_vector[q_idx];
1851                 if (!q_vector->rxr_count)
1852                         continue;
1853                 napi = &q_vector->napi;
1854                 if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) &&
1855                     (q_vector->rxr_count > 1))
1856                         napi->poll = &ixgbe_clean_rxonly_many;
1857
1858                 napi_enable(napi);
1859         }
1860 }
1861
1862 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
1863 {
1864         int q_idx;
1865         struct ixgbe_q_vector *q_vector;
1866         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1867
1868         /* legacy and MSI only use one vector */
1869         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1870                 q_vectors = 1;
1871
1872         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1873                 q_vector = &adapter->q_vector[q_idx];
1874                 if (!q_vector->rxr_count)
1875                         continue;
1876                 napi_disable(&q_vector->napi);
1877         }
1878 }
1879
1880 static void ixgbe_configure(struct ixgbe_adapter *adapter)
1881 {
1882         struct net_device *netdev = adapter->netdev;
1883         int i;
1884
1885         ixgbe_set_rx_mode(netdev);
1886
1887         ixgbe_restore_vlan(adapter);
1888
1889         ixgbe_configure_tx(adapter);
1890         ixgbe_configure_rx(adapter);
1891         for (i = 0; i < adapter->num_rx_queues; i++)
1892                 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1893                                        (adapter->rx_ring[i].count - 1));
1894 }
1895
1896 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1897 {
1898         struct net_device *netdev = adapter->netdev;
1899         struct ixgbe_hw *hw = &adapter->hw;
1900         int i, j = 0;
1901         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1902         u32 txdctl, rxdctl, mhadd;
1903         u32 gpie;
1904
1905         ixgbe_get_hw_control(adapter);
1906
1907         if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) ||
1908             (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) {
1909                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1910                         gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
1911                                 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
1912                 } else {
1913                         /* MSI only */
1914                         gpie = 0;
1915                 }
1916                 /* XXX: to interrupt immediately for EICS writes, enable this */
1917                 /* gpie |= IXGBE_GPIE_EIMEN; */
1918                 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
1919         }
1920
1921         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
1922                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
1923                  * specifically only auto mask tx and rx interrupts */
1924                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
1925         }
1926
1927         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
1928         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
1929                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
1930                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
1931
1932                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
1933         }
1934
1935         for (i = 0; i < adapter->num_tx_queues; i++) {
1936                 j = adapter->tx_ring[i].reg_idx;
1937                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
1938                 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1939                 txdctl |= (8 << 16);
1940                 txdctl |= IXGBE_TXDCTL_ENABLE;
1941                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
1942         }
1943
1944         for (i = 0; i < adapter->num_rx_queues; i++) {
1945                 j = adapter->rx_ring[i].reg_idx;
1946                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
1947                 /* enable PTHRESH=32 descriptors (half the internal cache)
1948                  * and HTHRESH=0 descriptors (to minimize latency on fetch),
1949                  * this also removes a pesky rx_no_buffer_count increment */
1950                 rxdctl |= 0x0020;
1951                 rxdctl |= IXGBE_RXDCTL_ENABLE;
1952                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl);
1953         }
1954         /* enable all receives */
1955         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1956         rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
1957         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
1958
1959         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
1960                 ixgbe_configure_msix(adapter);
1961         else
1962                 ixgbe_configure_msi_and_legacy(adapter);
1963
1964         clear_bit(__IXGBE_DOWN, &adapter->state);
1965         ixgbe_napi_enable_all(adapter);
1966
1967         /* clear any pending interrupts, may auto mask */
1968         IXGBE_READ_REG(hw, IXGBE_EICR);
1969
1970         ixgbe_irq_enable(adapter);
1971
1972         /* bring the link up in the watchdog, this could race with our first
1973          * link up interrupt but shouldn't be a problem */
1974         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
1975         adapter->link_check_timeout = jiffies;
1976         mod_timer(&adapter->watchdog_timer, jiffies);
1977         return 0;
1978 }
1979
1980 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
1981 {
1982         WARN_ON(in_interrupt());
1983         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
1984                 msleep(1);
1985         ixgbe_down(adapter);
1986         ixgbe_up(adapter);
1987         clear_bit(__IXGBE_RESETTING, &adapter->state);
1988 }
1989
1990 int ixgbe_up(struct ixgbe_adapter *adapter)
1991 {
1992         /* hardware has been reset, we need to reload some things */
1993         ixgbe_configure(adapter);
1994
1995         return ixgbe_up_complete(adapter);
1996 }
1997
1998 void ixgbe_reset(struct ixgbe_adapter *adapter)
1999 {
2000         struct ixgbe_hw *hw = &adapter->hw;
2001         if (hw->mac.ops.init_hw(hw))
2002                 dev_err(&adapter->pdev->dev, "Hardware Error\n");
2003
2004         /* reprogram the RAR[0] in case user changed it. */
2005         hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
2006
2007 }
2008
2009 /**
2010  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
2011  * @adapter: board private structure
2012  * @rx_ring: ring to free buffers from
2013  **/
2014 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
2015                                 struct ixgbe_ring *rx_ring)
2016 {
2017         struct pci_dev *pdev = adapter->pdev;
2018         unsigned long size;
2019         unsigned int i;
2020
2021         /* Free all the Rx ring sk_buffs */
2022
2023         for (i = 0; i < rx_ring->count; i++) {
2024                 struct ixgbe_rx_buffer *rx_buffer_info;
2025
2026                 rx_buffer_info = &rx_ring->rx_buffer_info[i];
2027                 if (rx_buffer_info->dma) {
2028                         pci_unmap_single(pdev, rx_buffer_info->dma,
2029                                          rx_ring->rx_buf_len,
2030                                          PCI_DMA_FROMDEVICE);
2031                         rx_buffer_info->dma = 0;
2032                 }
2033                 if (rx_buffer_info->skb) {
2034                         dev_kfree_skb(rx_buffer_info->skb);
2035                         rx_buffer_info->skb = NULL;
2036                 }
2037                 if (!rx_buffer_info->page)
2038                         continue;
2039                 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE / 2,
2040                                PCI_DMA_FROMDEVICE);
2041                 rx_buffer_info->page_dma = 0;
2042                 put_page(rx_buffer_info->page);
2043                 rx_buffer_info->page = NULL;
2044                 rx_buffer_info->page_offset = 0;
2045         }
2046
2047         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2048         memset(rx_ring->rx_buffer_info, 0, size);
2049
2050         /* Zero out the descriptor ring */
2051         memset(rx_ring->desc, 0, rx_ring->size);
2052
2053         rx_ring->next_to_clean = 0;
2054         rx_ring->next_to_use = 0;
2055
2056         writel(0, adapter->hw.hw_addr + rx_ring->head);
2057         writel(0, adapter->hw.hw_addr + rx_ring->tail);
2058 }
2059
2060 /**
2061  * ixgbe_clean_tx_ring - Free Tx Buffers
2062  * @adapter: board private structure
2063  * @tx_ring: ring to be cleaned
2064  **/
2065 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
2066                                 struct ixgbe_ring *tx_ring)
2067 {
2068         struct ixgbe_tx_buffer *tx_buffer_info;
2069         unsigned long size;
2070         unsigned int i;
2071
2072         /* Free all the Tx ring sk_buffs */
2073
2074         for (i = 0; i < tx_ring->count; i++) {
2075                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2076                 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
2077         }
2078
2079         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2080         memset(tx_ring->tx_buffer_info, 0, size);
2081
2082         /* Zero out the descriptor ring */
2083         memset(tx_ring->desc, 0, tx_ring->size);
2084
2085         tx_ring->next_to_use = 0;
2086         tx_ring->next_to_clean = 0;
2087
2088         writel(0, adapter->hw.hw_addr + tx_ring->head);
2089         writel(0, adapter->hw.hw_addr + tx_ring->tail);
2090 }
2091
2092 /**
2093  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2094  * @adapter: board private structure
2095  **/
2096 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
2097 {
2098         int i;
2099
2100         for (i = 0; i < adapter->num_rx_queues; i++)
2101                 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2102 }
2103
2104 /**
2105  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2106  * @adapter: board private structure
2107  **/
2108 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
2109 {
2110         int i;
2111
2112         for (i = 0; i < adapter->num_tx_queues; i++)
2113                 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2114 }
2115
2116 void ixgbe_down(struct ixgbe_adapter *adapter)
2117 {
2118         struct net_device *netdev = adapter->netdev;
2119         struct ixgbe_hw *hw = &adapter->hw;
2120         u32 rxctrl;
2121         u32 txdctl;
2122         int i, j;
2123
2124         /* signal that we are down to the interrupt handler */
2125         set_bit(__IXGBE_DOWN, &adapter->state);
2126
2127         /* disable receives */
2128         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2129         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
2130
2131         netif_tx_disable(netdev);
2132
2133         IXGBE_WRITE_FLUSH(hw);
2134         msleep(10);
2135
2136         netif_tx_stop_all_queues(netdev);
2137
2138         ixgbe_irq_disable(adapter);
2139
2140         ixgbe_napi_disable_all(adapter);
2141
2142         del_timer_sync(&adapter->watchdog_timer);
2143         cancel_work_sync(&adapter->watchdog_task);
2144
2145         /* disable transmits in the hardware now that interrupts are off */
2146         for (i = 0; i < adapter->num_tx_queues; i++) {
2147                 j = adapter->tx_ring[i].reg_idx;
2148                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2149                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j),
2150                                 (txdctl & ~IXGBE_TXDCTL_ENABLE));
2151         }
2152
2153         netif_carrier_off(netdev);
2154
2155 #ifdef CONFIG_IXGBE_DCA
2156         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2157                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
2158                 dca_remove_requester(&adapter->pdev->dev);
2159         }
2160
2161 #endif
2162         if (!pci_channel_offline(adapter->pdev))
2163                 ixgbe_reset(adapter);
2164         ixgbe_clean_all_tx_rings(adapter);
2165         ixgbe_clean_all_rx_rings(adapter);
2166
2167 #ifdef CONFIG_IXGBE_DCA
2168         /* since we reset the hardware DCA settings were cleared */
2169         if (dca_add_requester(&adapter->pdev->dev) == 0) {
2170                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
2171                 /* always use CB2 mode, difference is masked
2172                  * in the CB driver */
2173                 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
2174                 ixgbe_setup_dca(adapter);
2175         }
2176 #endif
2177 }
2178
2179 /**
2180  * ixgbe_poll - NAPI Rx polling callback
2181  * @napi: structure for representing this polling device
2182  * @budget: how many packets driver is allowed to clean
2183  *
2184  * This function is used for legacy and MSI, NAPI mode
2185  **/
2186 static int ixgbe_poll(struct napi_struct *napi, int budget)
2187 {
2188         struct ixgbe_q_vector *q_vector = container_of(napi,
2189                                                   struct ixgbe_q_vector, napi);
2190         struct ixgbe_adapter *adapter = q_vector->adapter;
2191         int tx_cleaned, work_done = 0;
2192
2193 #ifdef CONFIG_IXGBE_DCA
2194         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2195                 ixgbe_update_tx_dca(adapter, adapter->tx_ring);
2196                 ixgbe_update_rx_dca(adapter, adapter->rx_ring);
2197         }
2198 #endif
2199
2200         tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
2201         ixgbe_clean_rx_irq(adapter, adapter->rx_ring, &work_done, budget);
2202
2203         if (tx_cleaned)
2204                 work_done = budget;
2205
2206         /* If budget not fully consumed, exit the polling mode */
2207         if (work_done < budget) {
2208                 netif_rx_complete(adapter->netdev, napi);
2209                 if (adapter->itr_setting & 3)
2210                         ixgbe_set_itr(adapter);
2211                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2212                         ixgbe_irq_enable(adapter);
2213         }
2214         return work_done;
2215 }
2216
2217 /**
2218  * ixgbe_tx_timeout - Respond to a Tx Hang
2219  * @netdev: network interface device structure
2220  **/
2221 static void ixgbe_tx_timeout(struct net_device *netdev)
2222 {
2223         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2224
2225         /* Do the reset outside of interrupt context */
2226         schedule_work(&adapter->reset_task);
2227 }
2228
2229 static void ixgbe_reset_task(struct work_struct *work)
2230 {
2231         struct ixgbe_adapter *adapter;
2232         adapter = container_of(work, struct ixgbe_adapter, reset_task);
2233
2234         adapter->tx_timeout_count++;
2235
2236         ixgbe_reinit_locked(adapter);
2237 }
2238
2239 static void ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
2240 {
2241         int nrq = 1, ntq = 1;
2242         int feature_mask = 0, rss_i, rss_m;
2243
2244         /* Number of supported queues */
2245         switch (adapter->hw.mac.type) {
2246         case ixgbe_mac_82598EB:
2247                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2248                 rss_m = 0;
2249                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2250
2251                 switch (adapter->flags & feature_mask) {
2252                 case (IXGBE_FLAG_RSS_ENABLED):
2253                         rss_m = 0xF;
2254                         nrq = rss_i;
2255                         ntq = rss_i;
2256                         break;
2257                 case 0:
2258                 default:
2259                         rss_i = 0;
2260                         rss_m = 0;
2261                         nrq = 1;
2262                         ntq = 1;
2263                         break;
2264                 }
2265
2266                 adapter->ring_feature[RING_F_RSS].indices = rss_i;
2267                 adapter->ring_feature[RING_F_RSS].mask = rss_m;
2268                 break;
2269         default:
2270                 nrq = 1;
2271                 ntq = 1;
2272                 break;
2273         }
2274
2275         adapter->num_rx_queues = nrq;
2276         adapter->num_tx_queues = ntq;
2277 }
2278
2279 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
2280                                        int vectors)
2281 {
2282         int err, vector_threshold;
2283
2284         /* We'll want at least 3 (vector_threshold):
2285          * 1) TxQ[0] Cleanup
2286          * 2) RxQ[0] Cleanup
2287          * 3) Other (Link Status Change, etc.)
2288          * 4) TCP Timer (optional)
2289          */
2290         vector_threshold = MIN_MSIX_COUNT;
2291
2292         /* The more we get, the more we will assign to Tx/Rx Cleanup
2293          * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2294          * Right now, we simply care about how many we'll get; we'll
2295          * set them up later while requesting irq's.
2296          */
2297         while (vectors >= vector_threshold) {
2298                 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
2299                                       vectors);
2300                 if (!err) /* Success in acquiring all requested vectors. */
2301                         break;
2302                 else if (err < 0)
2303                         vectors = 0; /* Nasty failure, quit now */
2304                 else /* err == number of vectors we should try again with */
2305                         vectors = err;
2306         }
2307
2308         if (vectors < vector_threshold) {
2309                 /* Can't allocate enough MSI-X interrupts?  Oh well.
2310                  * This just means we'll go with either a single MSI
2311                  * vector or fall back to legacy interrupts.
2312                  */
2313                 DPRINTK(HW, DEBUG, "Unable to allocate MSI-X interrupts\n");
2314                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2315                 kfree(adapter->msix_entries);
2316                 adapter->msix_entries = NULL;
2317                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2318                 ixgbe_set_num_queues(adapter);
2319         } else {
2320                 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
2321                 adapter->num_msix_vectors = vectors;
2322         }
2323 }
2324
2325 /**
2326  * ixgbe_cache_ring_register - Descriptor ring to register mapping
2327  * @adapter: board private structure to initialize
2328  *
2329  * Once we know the feature-set enabled for the device, we'll cache
2330  * the register offset the descriptor ring is assigned to.
2331  **/
2332 static void __devinit ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
2333 {
2334         int feature_mask = 0, rss_i;
2335         int i, txr_idx, rxr_idx;
2336
2337         /* Number of supported queues */
2338         switch (adapter->hw.mac.type) {
2339         case ixgbe_mac_82598EB:
2340                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2341                 txr_idx = 0;
2342                 rxr_idx = 0;
2343                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2344                 switch (adapter->flags & feature_mask) {
2345                 case (IXGBE_FLAG_RSS_ENABLED):
2346                         for (i = 0; i < adapter->num_rx_queues; i++)
2347                                 adapter->rx_ring[i].reg_idx = i;
2348                         for (i = 0; i < adapter->num_tx_queues; i++)
2349                                 adapter->tx_ring[i].reg_idx = i;
2350                         break;
2351                 case 0:
2352                 default:
2353                         break;
2354                 }
2355                 break;
2356         default:
2357                 break;
2358         }
2359 }
2360
2361 /**
2362  * ixgbe_alloc_queues - Allocate memory for all rings
2363  * @adapter: board private structure to initialize
2364  *
2365  * We allocate one ring per queue at run-time since we don't know the
2366  * number of queues at compile-time.  The polling_netdev array is
2367  * intended for Multiqueue, but should work fine with a single queue.
2368  **/
2369 static int __devinit ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
2370 {
2371         int i;
2372
2373         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2374                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2375         if (!adapter->tx_ring)
2376                 goto err_tx_ring_allocation;
2377
2378         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2379                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2380         if (!adapter->rx_ring)
2381                 goto err_rx_ring_allocation;
2382
2383         for (i = 0; i < adapter->num_tx_queues; i++) {
2384                 adapter->tx_ring[i].count = adapter->tx_ring_count;
2385                 adapter->tx_ring[i].queue_index = i;
2386         }
2387
2388         for (i = 0; i < adapter->num_rx_queues; i++) {
2389                 adapter->rx_ring[i].count = adapter->rx_ring_count;
2390                 adapter->rx_ring[i].queue_index = i;
2391         }
2392
2393         ixgbe_cache_ring_register(adapter);
2394
2395         return 0;
2396
2397 err_rx_ring_allocation:
2398         kfree(adapter->tx_ring);
2399 err_tx_ring_allocation:
2400         return -ENOMEM;
2401 }
2402
2403 /**
2404  * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2405  * @adapter: board private structure to initialize
2406  *
2407  * Attempt to configure the interrupts using the best available
2408  * capabilities of the hardware and the kernel.
2409  **/
2410 static int __devinit ixgbe_set_interrupt_capability(struct ixgbe_adapter
2411                                                     *adapter)
2412 {
2413         int err = 0;
2414         int vector, v_budget;
2415
2416         /*
2417          * It's easy to be greedy for MSI-X vectors, but it really
2418          * doesn't do us much good if we have a lot more vectors
2419          * than CPU's.  So let's be conservative and only ask for
2420          * (roughly) twice the number of vectors as there are CPU's.
2421          */
2422         v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2423                        (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2424
2425         /*
2426          * At the same time, hardware can only support a maximum of
2427          * MAX_MSIX_COUNT vectors.  With features such as RSS and VMDq,
2428          * we can easily reach upwards of 64 Rx descriptor queues and
2429          * 32 Tx queues.  Thus, we cap it off in those rare cases where
2430          * the cpu count also exceeds our vector limit.
2431          */
2432         v_budget = min(v_budget, MAX_MSIX_COUNT);
2433
2434         /* A failure in MSI-X entry allocation isn't fatal, but it does
2435          * mean we disable MSI-X capabilities of the adapter. */
2436         adapter->msix_entries = kcalloc(v_budget,
2437                                         sizeof(struct msix_entry), GFP_KERNEL);
2438         if (!adapter->msix_entries) {
2439                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2440                 ixgbe_set_num_queues(adapter);
2441                 kfree(adapter->tx_ring);
2442                 kfree(adapter->rx_ring);
2443                 err = ixgbe_alloc_queues(adapter);
2444                 if (err) {
2445                         DPRINTK(PROBE, ERR, "Unable to allocate memory "
2446                                 "for queues\n");
2447                         goto out;
2448                 }
2449
2450                 goto try_msi;
2451         }
2452
2453         for (vector = 0; vector < v_budget; vector++)
2454                 adapter->msix_entries[vector].entry = vector;
2455
2456         ixgbe_acquire_msix_vectors(adapter, v_budget);
2457
2458         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2459                 goto out;
2460
2461 try_msi:
2462         err = pci_enable_msi(adapter->pdev);
2463         if (!err) {
2464                 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
2465         } else {
2466                 DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, "
2467                         "falling back to legacy.  Error: %d\n", err);
2468                 /* reset err */
2469                 err = 0;
2470         }
2471
2472 out:
2473         /* Notify the stack of the (possibly) reduced Tx Queue count. */
2474         adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
2475
2476         return err;
2477 }
2478
2479 static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
2480 {
2481         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2482                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2483                 pci_disable_msix(adapter->pdev);
2484                 kfree(adapter->msix_entries);
2485                 adapter->msix_entries = NULL;
2486         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
2487                 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
2488                 pci_disable_msi(adapter->pdev);
2489         }
2490         return;
2491 }
2492
2493 /**
2494  * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2495  * @adapter: board private structure to initialize
2496  *
2497  * We determine which interrupt scheme to use based on...
2498  * - Kernel support (MSI, MSI-X)
2499  *   - which can be user-defined (via MODULE_PARAM)
2500  * - Hardware queue count (num_*_queues)
2501  *   - defined by miscellaneous hardware support/features (RSS, etc.)
2502  **/
2503 static int __devinit ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
2504 {
2505         int err;
2506
2507         /* Number of supported queues */
2508         ixgbe_set_num_queues(adapter);
2509
2510         err = ixgbe_alloc_queues(adapter);
2511         if (err) {
2512                 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
2513                 goto err_alloc_queues;
2514         }
2515
2516         err = ixgbe_set_interrupt_capability(adapter);
2517         if (err) {
2518                 DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n");
2519                 goto err_set_interrupt;
2520         }
2521
2522         DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, "
2523                 "Tx Queue count = %u\n",
2524                 (adapter->num_rx_queues > 1) ? "Enabled" :
2525                 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2526
2527         set_bit(__IXGBE_DOWN, &adapter->state);
2528
2529         return 0;
2530
2531 err_set_interrupt:
2532         kfree(adapter->tx_ring);
2533         kfree(adapter->rx_ring);
2534 err_alloc_queues:
2535         return err;
2536 }
2537
2538 /**
2539  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
2540  * @adapter: board private structure to initialize
2541  *
2542  * ixgbe_sw_init initializes the Adapter private data structure.
2543  * Fields are initialized based on PCI device information and
2544  * OS network device settings (MTU size).
2545  **/
2546 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
2547 {
2548         struct ixgbe_hw *hw = &adapter->hw;
2549         struct pci_dev *pdev = adapter->pdev;
2550         unsigned int rss;
2551
2552         /* PCI config space info */
2553
2554         hw->vendor_id = pdev->vendor;
2555         hw->device_id = pdev->device;
2556         hw->revision_id = pdev->revision;
2557         hw->subsystem_vendor_id = pdev->subsystem_vendor;
2558         hw->subsystem_device_id = pdev->subsystem_device;
2559
2560         /* Set capability flags */
2561         rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
2562         adapter->ring_feature[RING_F_RSS].indices = rss;
2563         adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
2564
2565         /* default flow control settings */
2566         hw->fc.original_type = ixgbe_fc_none;
2567         hw->fc.type = ixgbe_fc_none;
2568         hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
2569         hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
2570         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
2571         hw->fc.send_xon = true;
2572
2573         /* select 10G link by default */
2574         hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
2575
2576         /* enable itr by default in dynamic mode */
2577         adapter->itr_setting = 1;
2578         adapter->eitr_param = 20000;
2579
2580         /* set defaults for eitr in MegaBytes */
2581         adapter->eitr_low = 10;
2582         adapter->eitr_high = 20;
2583
2584         /* set default ring sizes */
2585         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
2586         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
2587
2588         /* initialize eeprom parameters */
2589         if (ixgbe_init_eeprom_params_generic(hw)) {
2590                 dev_err(&pdev->dev, "EEPROM initialization failed\n");
2591                 return -EIO;
2592         }
2593
2594         /* enable rx csum by default */
2595         adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2596
2597         set_bit(__IXGBE_DOWN, &adapter->state);
2598
2599         return 0;
2600 }
2601
2602 /**
2603  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2604  * @adapter: board private structure
2605  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
2606  *
2607  * Return 0 on success, negative on failure
2608  **/
2609 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
2610                              struct ixgbe_ring *tx_ring)
2611 {
2612         struct pci_dev *pdev = adapter->pdev;
2613         int size;
2614
2615         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2616         tx_ring->tx_buffer_info = vmalloc(size);
2617         if (!tx_ring->tx_buffer_info)
2618                 goto err;
2619         memset(tx_ring->tx_buffer_info, 0, size);
2620
2621         /* round up to nearest 4K */
2622         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc) +
2623                         sizeof(u32);
2624         tx_ring->size = ALIGN(tx_ring->size, 4096);
2625
2626         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
2627                                              &tx_ring->dma);
2628         if (!tx_ring->desc)
2629                 goto err;
2630
2631         tx_ring->next_to_use = 0;
2632         tx_ring->next_to_clean = 0;
2633         tx_ring->work_limit = tx_ring->count;
2634         return 0;
2635
2636 err:
2637         vfree(tx_ring->tx_buffer_info);
2638         tx_ring->tx_buffer_info = NULL;
2639         DPRINTK(PROBE, ERR, "Unable to allocate memory for the transmit "
2640                             "descriptor ring\n");
2641         return -ENOMEM;
2642 }
2643
2644 /**
2645  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2646  * @adapter: board private structure
2647  *
2648  * If this function returns with an error, then it's possible one or
2649  * more of the rings is populated (while the rest are not).  It is the
2650  * callers duty to clean those orphaned rings.
2651  *
2652  * Return 0 on success, negative on failure
2653  **/
2654 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
2655 {
2656         int i, err = 0;
2657
2658         for (i = 0; i < adapter->num_tx_queues; i++) {
2659                 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2660                 if (!err)
2661                         continue;
2662                 DPRINTK(PROBE, ERR, "Allocation for Tx Queue %u failed\n", i);
2663                 break;
2664         }
2665
2666         return err;
2667 }
2668
2669 /**
2670  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2671  * @adapter: board private structure
2672  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
2673  *
2674  * Returns 0 on success, negative on failure
2675  **/
2676 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
2677                              struct ixgbe_ring *rx_ring)
2678 {
2679         struct pci_dev *pdev = adapter->pdev;
2680         int size;
2681
2682         size = sizeof(struct net_lro_desc) * IXGBE_MAX_LRO_DESCRIPTORS;
2683         rx_ring->lro_mgr.lro_arr = vmalloc(size);
2684         if (!rx_ring->lro_mgr.lro_arr)
2685                 return -ENOMEM;
2686         memset(rx_ring->lro_mgr.lro_arr, 0, size);
2687
2688         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2689         rx_ring->rx_buffer_info = vmalloc(size);
2690         if (!rx_ring->rx_buffer_info) {
2691                 DPRINTK(PROBE, ERR,
2692                         "vmalloc allocation failed for the rx desc ring\n");
2693                 goto alloc_failed;
2694         }
2695         memset(rx_ring->rx_buffer_info, 0, size);
2696
2697         /* Round up to nearest 4K */
2698         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2699         rx_ring->size = ALIGN(rx_ring->size, 4096);
2700
2701         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size, &rx_ring->dma);
2702
2703         if (!rx_ring->desc) {
2704                 DPRINTK(PROBE, ERR,
2705                         "Memory allocation failed for the rx desc ring\n");
2706                 vfree(rx_ring->rx_buffer_info);
2707                 goto alloc_failed;
2708         }
2709
2710         rx_ring->next_to_clean = 0;
2711         rx_ring->next_to_use = 0;
2712
2713         return 0;
2714
2715 alloc_failed:
2716         vfree(rx_ring->lro_mgr.lro_arr);
2717         rx_ring->lro_mgr.lro_arr = NULL;
2718         return -ENOMEM;
2719 }
2720
2721 /**
2722  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2723  * @adapter: board private structure
2724  *
2725  * If this function returns with an error, then it's possible one or
2726  * more of the rings is populated (while the rest are not).  It is the
2727  * callers duty to clean those orphaned rings.
2728  *
2729  * Return 0 on success, negative on failure
2730  **/
2731
2732 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
2733 {
2734         int i, err = 0;
2735
2736         for (i = 0; i < adapter->num_rx_queues; i++) {
2737                 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2738                 if (!err)
2739                         continue;
2740                 DPRINTK(PROBE, ERR, "Allocation for Rx Queue %u failed\n", i);
2741                 break;
2742         }
2743
2744         return err;
2745 }
2746
2747 /**
2748  * ixgbe_free_tx_resources - Free Tx Resources per Queue
2749  * @adapter: board private structure
2750  * @tx_ring: Tx descriptor ring for a specific queue
2751  *
2752  * Free all transmit software resources
2753  **/
2754 void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
2755                              struct ixgbe_ring *tx_ring)
2756 {
2757         struct pci_dev *pdev = adapter->pdev;
2758
2759         ixgbe_clean_tx_ring(adapter, tx_ring);
2760
2761         vfree(tx_ring->tx_buffer_info);
2762         tx_ring->tx_buffer_info = NULL;
2763
2764         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2765
2766         tx_ring->desc = NULL;
2767 }
2768
2769 /**
2770  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
2771  * @adapter: board private structure
2772  *
2773  * Free all transmit software resources
2774  **/
2775 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
2776 {
2777         int i;
2778
2779         for (i = 0; i < adapter->num_tx_queues; i++)
2780                 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
2781 }
2782
2783 /**
2784  * ixgbe_free_rx_resources - Free Rx Resources
2785  * @adapter: board private structure
2786  * @rx_ring: ring to clean the resources from
2787  *
2788  * Free all receive software resources
2789  **/
2790 void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
2791                              struct ixgbe_ring *rx_ring)
2792 {
2793         struct pci_dev *pdev = adapter->pdev;
2794
2795         vfree(rx_ring->lro_mgr.lro_arr);
2796         rx_ring->lro_mgr.lro_arr = NULL;
2797
2798         ixgbe_clean_rx_ring(adapter, rx_ring);
2799
2800         vfree(rx_ring->rx_buffer_info);
2801         rx_ring->rx_buffer_info = NULL;
2802
2803         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2804
2805         rx_ring->desc = NULL;
2806 }
2807
2808 /**
2809  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
2810  * @adapter: board private structure
2811  *
2812  * Free all receive software resources
2813  **/
2814 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
2815 {
2816         int i;
2817
2818         for (i = 0; i < adapter->num_rx_queues; i++)
2819                 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
2820 }
2821
2822 /**
2823  * ixgbe_change_mtu - Change the Maximum Transfer Unit
2824  * @netdev: network interface device structure
2825  * @new_mtu: new value for maximum frame size
2826  *
2827  * Returns 0 on success, negative on failure
2828  **/
2829 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
2830 {
2831         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2832         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
2833
2834         /* MTU < 68 is an error and causes problems on some kernels */
2835         if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
2836                 return -EINVAL;
2837
2838         DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n",
2839                 netdev->mtu, new_mtu);
2840         /* must set new MTU before calling down or up */
2841         netdev->mtu = new_mtu;
2842
2843         if (netif_running(netdev))
2844                 ixgbe_reinit_locked(adapter);
2845
2846         return 0;
2847 }
2848
2849 /**
2850  * ixgbe_open - Called when a network interface is made active
2851  * @netdev: network interface device structure
2852  *
2853  * Returns 0 on success, negative value on failure
2854  *
2855  * The open entry point is called when a network interface is made
2856  * active by the system (IFF_UP).  At this point all resources needed
2857  * for transmit and receive operations are allocated, the interrupt
2858  * handler is registered with the OS, the watchdog timer is started,
2859  * and the stack is notified that the interface is ready.
2860  **/
2861 static int ixgbe_open(struct net_device *netdev)
2862 {
2863         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2864         int err;
2865
2866         /* disallow open during test */
2867         if (test_bit(__IXGBE_TESTING, &adapter->state))
2868                 return -EBUSY;
2869
2870         /* allocate transmit descriptors */
2871         err = ixgbe_setup_all_tx_resources(adapter);
2872         if (err)
2873                 goto err_setup_tx;
2874
2875         /* allocate receive descriptors */
2876         err = ixgbe_setup_all_rx_resources(adapter);
2877         if (err)
2878                 goto err_setup_rx;
2879
2880         ixgbe_configure(adapter);
2881
2882         err = ixgbe_request_irq(adapter);
2883         if (err)
2884                 goto err_req_irq;
2885
2886         err = ixgbe_up_complete(adapter);
2887         if (err)
2888                 goto err_up;
2889
2890         netif_tx_start_all_queues(netdev);
2891
2892         return 0;
2893
2894 err_up:
2895         ixgbe_release_hw_control(adapter);
2896         ixgbe_free_irq(adapter);
2897 err_req_irq:
2898         ixgbe_free_all_rx_resources(adapter);
2899 err_setup_rx:
2900         ixgbe_free_all_tx_resources(adapter);
2901 err_setup_tx:
2902         ixgbe_reset(adapter);
2903
2904         return err;
2905 }
2906
2907 /**
2908  * ixgbe_close - Disables a network interface
2909  * @netdev: network interface device structure
2910  *
2911  * Returns 0, this is not allowed to fail
2912  *
2913  * The close entry point is called when an interface is de-activated
2914  * by the OS.  The hardware is still under the drivers control, but
2915  * needs to be disabled.  A global MAC reset is issued to stop the
2916  * hardware, and all transmit and receive resources are freed.
2917  **/
2918 static int ixgbe_close(struct net_device *netdev)
2919 {
2920         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2921
2922         ixgbe_down(adapter);
2923         ixgbe_free_irq(adapter);
2924
2925         ixgbe_free_all_tx_resources(adapter);
2926         ixgbe_free_all_rx_resources(adapter);
2927
2928         ixgbe_release_hw_control(adapter);
2929
2930         return 0;
2931 }
2932
2933 /**
2934  * ixgbe_napi_add_all - prep napi structs for use
2935  * @adapter: private struct
2936  * helper function to napi_add each possible q_vector->napi
2937  */
2938 static void ixgbe_napi_add_all(struct ixgbe_adapter *adapter)
2939 {
2940         int q_idx, q_vectors;
2941         int (*poll)(struct napi_struct *, int);
2942
2943         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2944                 poll = &ixgbe_clean_rxonly;
2945                 /* Only enable as many vectors as we have rx queues. */
2946                 q_vectors = adapter->num_rx_queues;
2947         } else {
2948                 poll = &ixgbe_poll;
2949                 /* only one q_vector for legacy modes */
2950                 q_vectors = 1;
2951         }
2952
2953         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
2954                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
2955                 netif_napi_add(adapter->netdev, &q_vector->napi, (*poll), 64);
2956         }
2957 }
2958
2959 static void ixgbe_napi_del_all(struct ixgbe_adapter *adapter)
2960 {
2961         int q_idx;
2962         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2963
2964         /* legacy and MSI only use one vector */
2965         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
2966                 q_vectors = 1;
2967
2968         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
2969                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
2970                 if (!q_vector->rxr_count)
2971                         continue;
2972                 netif_napi_del(&q_vector->napi);
2973         }
2974 }
2975
2976 #ifdef CONFIG_PM
2977 static int ixgbe_resume(struct pci_dev *pdev)
2978 {
2979         struct net_device *netdev = pci_get_drvdata(pdev);
2980         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2981         u32 err;
2982
2983         pci_set_power_state(pdev, PCI_D0);
2984         pci_restore_state(pdev);
2985         err = pci_enable_device(pdev);
2986         if (err) {
2987                 printk(KERN_ERR "ixgbe: Cannot enable PCI device from "
2988                                 "suspend\n");
2989                 return err;
2990         }
2991         pci_set_master(pdev);
2992
2993         pci_enable_wake(pdev, PCI_D3hot, 0);
2994         pci_enable_wake(pdev, PCI_D3cold, 0);
2995
2996         err = ixgbe_init_interrupt_scheme(adapter);
2997         if (err) {
2998                 printk(KERN_ERR "ixgbe: Cannot initialize interrupts for "
2999                                 "device\n");
3000                 return err;
3001         }
3002
3003         ixgbe_napi_add_all(adapter);
3004         ixgbe_reset(adapter);
3005
3006         if (netif_running(netdev)) {
3007                 err = ixgbe_open(adapter->netdev);
3008                 if (err)
3009                         return err;
3010         }
3011
3012         netif_device_attach(netdev);
3013
3014         return 0;
3015 }
3016
3017 #endif /* CONFIG_PM */
3018 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
3019 {
3020         struct net_device *netdev = pci_get_drvdata(pdev);
3021         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3022 #ifdef CONFIG_PM
3023         int retval = 0;
3024 #endif
3025
3026         netif_device_detach(netdev);
3027
3028         if (netif_running(netdev)) {
3029                 ixgbe_down(adapter);
3030                 ixgbe_free_irq(adapter);
3031                 ixgbe_free_all_tx_resources(adapter);
3032                 ixgbe_free_all_rx_resources(adapter);
3033         }
3034         ixgbe_reset_interrupt_capability(adapter);
3035         ixgbe_napi_del_all(adapter);
3036         kfree(adapter->tx_ring);
3037         kfree(adapter->rx_ring);
3038
3039 #ifdef CONFIG_PM
3040         retval = pci_save_state(pdev);
3041         if (retval)
3042                 return retval;
3043 #endif
3044
3045         pci_enable_wake(pdev, PCI_D3hot, 0);
3046         pci_enable_wake(pdev, PCI_D3cold, 0);
3047
3048         ixgbe_release_hw_control(adapter);
3049
3050         pci_disable_device(pdev);
3051
3052         pci_set_power_state(pdev, pci_choose_state(pdev, state));
3053
3054         return 0;
3055 }
3056
3057 static void ixgbe_shutdown(struct pci_dev *pdev)
3058 {
3059         ixgbe_suspend(pdev, PMSG_SUSPEND);
3060 }
3061
3062 /**
3063  * ixgbe_update_stats - Update the board statistics counters.
3064  * @adapter: board private structure
3065  **/
3066 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
3067 {
3068         struct ixgbe_hw *hw = &adapter->hw;
3069         u64 total_mpc = 0;
3070         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
3071
3072         adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
3073         for (i = 0; i < 8; i++) {
3074                 /* for packet buffers not used, the register should read 0 */
3075                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
3076                 missed_rx += mpc;
3077                 adapter->stats.mpc[i] += mpc;
3078                 total_mpc += adapter->stats.mpc[i];
3079                 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
3080         }
3081         adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
3082         /* work around hardware counting issue */
3083         adapter->stats.gprc -= missed_rx;
3084
3085         /* 82598 hardware only has a 32 bit counter in the high register */
3086         adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
3087         adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
3088         adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
3089         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
3090         adapter->stats.bprc += bprc;
3091         adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
3092         adapter->stats.mprc -= bprc;
3093         adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
3094         adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
3095         adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
3096         adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
3097         adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
3098         adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
3099         adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
3100         adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
3101         adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
3102         adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
3103         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
3104         adapter->stats.lxontxc += lxon;
3105         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
3106         adapter->stats.lxofftxc += lxoff;
3107         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
3108         adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
3109         adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
3110         /*
3111          * 82598 errata - tx of flow control packets is included in tx counters
3112          */
3113         xon_off_tot = lxon + lxoff;
3114         adapter->stats.gptc -= xon_off_tot;
3115         adapter->stats.mptc -= xon_off_tot;
3116         adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
3117         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
3118         adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
3119         adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
3120         adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
3121         adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
3122         adapter->stats.ptc64 -= xon_off_tot;
3123         adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
3124         adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
3125         adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
3126         adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
3127         adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
3128         adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
3129
3130         /* Fill out the OS statistics structure */
3131         adapter->net_stats.multicast = adapter->stats.mprc;
3132
3133         /* Rx Errors */
3134         adapter->net_stats.rx_errors = adapter->stats.crcerrs +
3135                                        adapter->stats.rlec;
3136         adapter->net_stats.rx_dropped = 0;
3137         adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3138         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3139         adapter->net_stats.rx_missed_errors = total_mpc;
3140 }
3141
3142 /**
3143  * ixgbe_watchdog - Timer Call-back
3144  * @data: pointer to adapter cast into an unsigned long
3145  **/
3146 static void ixgbe_watchdog(unsigned long data)
3147 {
3148         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
3149         struct ixgbe_hw *hw = &adapter->hw;
3150
3151         /* Do the watchdog outside of interrupt context due to the lovely
3152          * delays that some of the newer hardware requires */
3153         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
3154                 /* Cause software interrupt to ensure rx rings are cleaned */
3155                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3156                         u32 eics =
3157                          (1 << (adapter->num_msix_vectors - NON_Q_VECTORS)) - 1;
3158                         IXGBE_WRITE_REG(hw, IXGBE_EICS, eics);
3159                 } else {
3160                         /* For legacy and MSI interrupts don't set any bits that
3161                          * are enabled for EIAM, because this operation would
3162                          * set *both* EIMS and EICS for any bit in EIAM */
3163                         IXGBE_WRITE_REG(hw, IXGBE_EICS,
3164                                     (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
3165                 }
3166                 /* Reset the timer */
3167                 mod_timer(&adapter->watchdog_timer,
3168                           round_jiffies(jiffies + 2 * HZ));
3169         }
3170
3171         schedule_work(&adapter->watchdog_task);
3172 }
3173
3174 /**
3175  * ixgbe_watchdog_task - worker thread to bring link up
3176  * @work: pointer to work_struct containing our data
3177  **/
3178 static void ixgbe_watchdog_task(struct work_struct *work)
3179 {
3180         struct ixgbe_adapter *adapter = container_of(work,
3181                                                      struct ixgbe_adapter,
3182                                                      watchdog_task);
3183         struct net_device *netdev = adapter->netdev;
3184         struct ixgbe_hw *hw = &adapter->hw;
3185         u32 link_speed = adapter->link_speed;
3186         bool link_up = adapter->link_up;
3187
3188         adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
3189
3190         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) {
3191                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
3192                 if (link_up ||
3193                     time_after(jiffies, (adapter->link_check_timeout +
3194                                          IXGBE_TRY_LINK_TIMEOUT))) {
3195                         IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
3196                         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
3197                 }
3198                 adapter->link_up = link_up;
3199                 adapter->link_speed = link_speed;
3200         }
3201
3202         if (link_up) {
3203                 if (!netif_carrier_ok(netdev)) {
3204                         u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3205                         u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
3206 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
3207 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
3208                         DPRINTK(LINK, INFO, "NIC Link is Up %s, "
3209                                 "Flow Control: %s\n",
3210                                 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
3211                                  "10 Gbps" :
3212                                  (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
3213                                   "1 Gbps" : "unknown speed")),
3214                                 ((FLOW_RX && FLOW_TX) ? "RX/TX" :
3215                                  (FLOW_RX ? "RX" :
3216                                  (FLOW_TX ? "TX" : "None"))));
3217
3218                         netif_carrier_on(netdev);
3219                         netif_tx_wake_all_queues(netdev);
3220                 } else {
3221                         /* Force detection of hung controller */
3222                         adapter->detect_tx_hung = true;
3223                 }
3224         } else {
3225                 adapter->link_up = false;
3226                 adapter->link_speed = 0;
3227                 if (netif_carrier_ok(netdev)) {
3228                         DPRINTK(LINK, INFO, "NIC Link is Down\n");
3229                         netif_carrier_off(netdev);
3230                         netif_tx_stop_all_queues(netdev);
3231                 }
3232         }
3233
3234         ixgbe_update_stats(adapter);
3235         adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
3236 }
3237
3238 static int ixgbe_tso(struct ixgbe_adapter *adapter,
3239                      struct ixgbe_ring *tx_ring, struct sk_buff *skb,
3240                      u32 tx_flags, u8 *hdr_len)
3241 {
3242         struct ixgbe_adv_tx_context_desc *context_desc;
3243         unsigned int i;
3244         int err;
3245         struct ixgbe_tx_buffer *tx_buffer_info;
3246         u32 vlan_macip_lens = 0, type_tucmd_mlhl;
3247         u32 mss_l4len_idx, l4len;
3248
3249         if (skb_is_gso(skb)) {
3250                 if (skb_header_cloned(skb)) {
3251                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3252                         if (err)
3253                                 return err;
3254                 }
3255                 l4len = tcp_hdrlen(skb);
3256                 *hdr_len += l4len;
3257
3258                 if (skb->protocol == htons(ETH_P_IP)) {
3259                         struct iphdr *iph = ip_hdr(skb);
3260                         iph->tot_len = 0;
3261                         iph->check = 0;
3262                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3263                                                                  iph->daddr, 0,
3264                                                                  IPPROTO_TCP,
3265                                                                  0);
3266                         adapter->hw_tso_ctxt++;
3267                 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3268                         ipv6_hdr(skb)->payload_len = 0;
3269                         tcp_hdr(skb)->check =
3270                             ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3271                                              &ipv6_hdr(skb)->daddr,
3272                                              0, IPPROTO_TCP, 0);
3273                         adapter->hw_tso6_ctxt++;
3274                 }
3275
3276                 i = tx_ring->next_to_use;
3277
3278                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3279                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3280
3281                 /* VLAN MACLEN IPLEN */
3282                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3283                         vlan_macip_lens |=
3284                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3285                 vlan_macip_lens |= ((skb_network_offset(skb)) <<
3286                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3287                 *hdr_len += skb_network_offset(skb);
3288                 vlan_macip_lens |=
3289                     (skb_transport_header(skb) - skb_network_header(skb));
3290                 *hdr_len +=
3291                     (skb_transport_header(skb) - skb_network_header(skb));
3292                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3293                 context_desc->seqnum_seed = 0;
3294
3295                 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3296                 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
3297                                    IXGBE_ADVTXD_DTYP_CTXT);
3298
3299                 if (skb->protocol == htons(ETH_P_IP))
3300                         type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3301                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3302                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3303
3304                 /* MSS L4LEN IDX */
3305                 mss_l4len_idx =
3306                     (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
3307                 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
3308                 /* use index 1 for TSO */
3309                 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3310                 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3311
3312                 tx_buffer_info->time_stamp = jiffies;
3313                 tx_buffer_info->next_to_watch = i;
3314
3315                 i++;
3316                 if (i == tx_ring->count)
3317                         i = 0;
3318                 tx_ring->next_to_use = i;
3319
3320                 return true;
3321         }
3322         return false;
3323 }
3324
3325 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
3326                           struct ixgbe_ring *tx_ring,
3327                           struct sk_buff *skb, u32 tx_flags)
3328 {
3329         struct ixgbe_adv_tx_context_desc *context_desc;
3330         unsigned int i;
3331         struct ixgbe_tx_buffer *tx_buffer_info;
3332         u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
3333
3334         if (skb->ip_summed == CHECKSUM_PARTIAL ||
3335             (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
3336                 i = tx_ring->next_to_use;
3337                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3338                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3339
3340                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3341                         vlan_macip_lens |=
3342                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3343                 vlan_macip_lens |= (skb_network_offset(skb) <<
3344                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3345                 if (skb->ip_summed == CHECKSUM_PARTIAL)
3346                         vlan_macip_lens |= (skb_transport_header(skb) -
3347                                             skb_network_header(skb));
3348
3349                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3350                 context_desc->seqnum_seed = 0;
3351
3352                 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3353                                     IXGBE_ADVTXD_DTYP_CTXT);
3354
3355                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3356                         switch (skb->protocol) {
3357                         case __constant_htons(ETH_P_IP):
3358                                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3359                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3360                                         type_tucmd_mlhl |=
3361                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3362                                 break;
3363                         case __constant_htons(ETH_P_IPV6):
3364                                 /* XXX what about other V6 headers?? */
3365                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3366                                         type_tucmd_mlhl |=
3367                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3368                                 break;
3369                         default:
3370                                 if (unlikely(net_ratelimit())) {
3371                                         DPRINTK(PROBE, WARNING,
3372                                          "partial checksum but proto=%x!\n",
3373                                          skb->protocol);
3374                                 }
3375                                 break;
3376                         }
3377                 }
3378
3379                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3380                 /* use index zero for tx checksum offload */
3381                 context_desc->mss_l4len_idx = 0;
3382
3383                 tx_buffer_info->time_stamp = jiffies;
3384                 tx_buffer_info->next_to_watch = i;
3385
3386                 adapter->hw_csum_tx_good++;
3387                 i++;
3388                 if (i == tx_ring->count)
3389                         i = 0;
3390                 tx_ring->next_to_use = i;
3391
3392                 return true;
3393         }
3394
3395         return false;
3396 }
3397
3398 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
3399                         struct ixgbe_ring *tx_ring,
3400                         struct sk_buff *skb, unsigned int first)
3401 {
3402         struct ixgbe_tx_buffer *tx_buffer_info;
3403         unsigned int len = skb->len;
3404         unsigned int offset = 0, size, count = 0, i;
3405         unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3406         unsigned int f;
3407
3408         len -= skb->data_len;
3409
3410         i = tx_ring->next_to_use;
3411
3412         while (len) {
3413                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3414                 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3415
3416                 tx_buffer_info->length = size;
3417                 tx_buffer_info->dma = pci_map_single(adapter->pdev,
3418                                                      skb->data + offset,
3419                                                      size, PCI_DMA_TODEVICE);
3420                 tx_buffer_info->time_stamp = jiffies;
3421                 tx_buffer_info->next_to_watch = i;
3422
3423                 len -= size;
3424                 offset += size;
3425                 count++;
3426                 i++;
3427                 if (i == tx_ring->count)
3428                         i = 0;
3429         }
3430
3431         for (f = 0; f < nr_frags; f++) {
3432                 struct skb_frag_struct *frag;
3433
3434                 frag = &skb_shinfo(skb)->frags[f];
3435                 len = frag->size;
3436                 offset = frag->page_offset;
3437
3438                 while (len) {
3439                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
3440                         size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3441
3442                         tx_buffer_info->length = size;
3443                         tx_buffer_info->dma = pci_map_page(adapter->pdev,
3444                                                            frag->page,
3445                                                            offset,
3446                                                            size,
3447                                                            PCI_DMA_TODEVICE);
3448                         tx_buffer_info->time_stamp = jiffies;
3449                         tx_buffer_info->next_to_watch = i;
3450
3451                         len -= size;
3452                         offset += size;
3453                         count++;
3454                         i++;
3455                         if (i == tx_ring->count)
3456                                 i = 0;
3457                 }
3458         }
3459         if (i == 0)
3460                 i = tx_ring->count - 1;
3461         else
3462                 i = i - 1;
3463         tx_ring->tx_buffer_info[i].skb = skb;
3464         tx_ring->tx_buffer_info[first].next_to_watch = i;
3465
3466         return count;
3467 }
3468
3469 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
3470                            struct ixgbe_ring *tx_ring,
3471                            int tx_flags, int count, u32 paylen, u8 hdr_len)
3472 {
3473         union ixgbe_adv_tx_desc *tx_desc = NULL;
3474         struct ixgbe_tx_buffer *tx_buffer_info;
3475         u32 olinfo_status = 0, cmd_type_len = 0;
3476         unsigned int i;
3477         u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3478
3479         cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3480
3481         cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3482
3483         if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3484                 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3485
3486         if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3487                 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3488
3489                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3490                                  IXGBE_ADVTXD_POPTS_SHIFT;
3491
3492                 /* use index 1 context for tso */
3493                 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3494                 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3495                         olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3496                                          IXGBE_ADVTXD_POPTS_SHIFT;
3497
3498         } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3499                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3500                                  IXGBE_ADVTXD_POPTS_SHIFT;
3501
3502         olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3503
3504         i = tx_ring->next_to_use;
3505         while (count--) {
3506                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3507                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3508                 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3509                 tx_desc->read.cmd_type_len =
3510                         cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3511                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3512                 i++;
3513                 if (i == tx_ring->count)
3514                         i = 0;
3515         }
3516
3517         tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3518
3519         /*
3520          * Force memory writes to complete before letting h/w
3521          * know there are new descriptors to fetch.  (Only
3522          * applicable for weak-ordered memory model archs,
3523          * such as IA-64).
3524          */
3525         wmb();
3526
3527         tx_ring->next_to_use = i;
3528         writel(i, adapter->hw.hw_addr + tx_ring->tail);
3529 }
3530
3531 static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
3532                                  struct ixgbe_ring *tx_ring, int size)
3533 {
3534         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3535
3536         netif_stop_subqueue(netdev, tx_ring->queue_index);
3537         /* Herbert's original patch had:
3538          *  smp_mb__after_netif_stop_queue();
3539          * but since that doesn't exist yet, just open code it. */
3540         smp_mb();
3541
3542         /* We need to check again in a case another CPU has just
3543          * made room available. */
3544         if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3545                 return -EBUSY;
3546
3547         /* A reprieve! - use start_queue because it doesn't call schedule */
3548         netif_start_subqueue(netdev, tx_ring->queue_index);
3549         ++adapter->restart_queue;
3550         return 0;
3551 }
3552
3553 static int ixgbe_maybe_stop_tx(struct net_device *netdev,
3554                               struct ixgbe_ring *tx_ring, int size)
3555 {
3556         if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3557                 return 0;
3558         return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
3559 }
3560
3561 static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3562 {
3563         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3564         struct ixgbe_ring *tx_ring;
3565         unsigned int first;
3566         unsigned int tx_flags = 0;
3567         u8 hdr_len = 0;
3568         int r_idx = 0, tso;
3569         int count = 0;
3570         unsigned int f;
3571
3572         r_idx = (adapter->num_tx_queues - 1) & skb->queue_mapping;
3573         tx_ring = &adapter->tx_ring[r_idx];
3574
3575         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3576                 tx_flags |= vlan_tx_tag_get(skb);
3577                 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3578                 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3579         }
3580         /* three things can cause us to need a context descriptor */
3581         if (skb_is_gso(skb) ||
3582             (skb->ip_summed == CHECKSUM_PARTIAL) ||
3583             (tx_flags & IXGBE_TX_FLAGS_VLAN))
3584                 count++;
3585
3586         count += TXD_USE_COUNT(skb_headlen(skb));
3587         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3588                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3589
3590         if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
3591                 adapter->tx_busy++;
3592                 return NETDEV_TX_BUSY;
3593         }
3594
3595         if (skb->protocol == htons(ETH_P_IP))
3596                 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3597         first = tx_ring->next_to_use;
3598         tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3599         if (tso < 0) {
3600                 dev_kfree_skb_any(skb);
3601                 return NETDEV_TX_OK;
3602         }
3603
3604         if (tso)
3605                 tx_flags |= IXGBE_TX_FLAGS_TSO;
3606         else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3607                  (skb->ip_summed == CHECKSUM_PARTIAL))
3608                 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3609
3610         ixgbe_tx_queue(adapter, tx_ring, tx_flags,
3611                        ixgbe_tx_map(adapter, tx_ring, skb, first),
3612                        skb->len, hdr_len);
3613
3614         netdev->trans_start = jiffies;
3615
3616         ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3617
3618         return NETDEV_TX_OK;
3619 }
3620
3621 /**
3622  * ixgbe_get_stats - Get System Network Statistics
3623  * @netdev: network interface device structure
3624  *
3625  * Returns the address of the device statistics structure.
3626  * The statistics are actually updated from the timer callback.
3627  **/
3628 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
3629 {
3630         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3631
3632         /* only return the current stats */
3633         return &adapter->net_stats;
3634 }
3635
3636 /**
3637  * ixgbe_set_mac - Change the Ethernet Address of the NIC
3638  * @netdev: network interface device structure
3639  * @p: pointer to an address structure
3640  *
3641  * Returns 0 on success, negative on failure
3642  **/
3643 static int ixgbe_set_mac(struct net_device *netdev, void *p)
3644 {
3645         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3646         struct ixgbe_hw *hw = &adapter->hw;
3647         struct sockaddr *addr = p;
3648
3649         if (!is_valid_ether_addr(addr->sa_data))
3650                 return -EADDRNOTAVAIL;
3651
3652         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3653         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3654
3655         hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
3656
3657         return 0;
3658 }
3659
3660 #ifdef CONFIG_NET_POLL_CONTROLLER
3661 /*
3662  * Polling 'interrupt' - used by things like netconsole to send skbs
3663  * without having to re-enable interrupts. It's not called while
3664  * the interrupt routine is executing.
3665  */
3666 static void ixgbe_netpoll(struct net_device *netdev)
3667 {
3668         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3669
3670         disable_irq(adapter->pdev->irq);
3671         adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
3672         ixgbe_intr(adapter->pdev->irq, netdev);
3673         adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
3674         enable_irq(adapter->pdev->irq);
3675 }
3676 #endif
3677
3678 /**
3679  * ixgbe_link_config - set up initial link with default speed and duplex
3680  * @hw: pointer to private hardware struct
3681  *
3682  * Returns 0 on success, negative on failure
3683  **/
3684 static int ixgbe_link_config(struct ixgbe_hw *hw)
3685 {
3686         u32 autoneg = IXGBE_LINK_SPEED_10GB_FULL;
3687
3688         /* must always autoneg for both 1G and 10G link */
3689         hw->mac.autoneg = true;
3690
3691         return hw->mac.ops.setup_link_speed(hw, autoneg, true, true);
3692 }
3693
3694 /**
3695  * ixgbe_probe - Device Initialization Routine
3696  * @pdev: PCI device information struct
3697  * @ent: entry in ixgbe_pci_tbl
3698  *
3699  * Returns 0 on success, negative on failure
3700  *
3701  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
3702  * The OS initialization, configuring of the adapter private structure,
3703  * and a hardware reset occur.
3704  **/
3705 static int __devinit ixgbe_probe(struct pci_dev *pdev,
3706                                  const struct pci_device_id *ent)
3707 {
3708         struct net_device *netdev;
3709         struct ixgbe_adapter *adapter = NULL;
3710         struct ixgbe_hw *hw;
3711         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
3712         static int cards_found;
3713         int i, err, pci_using_dac;
3714         u16 link_status, link_speed, link_width;
3715         u32 part_num, eec;
3716
3717         err = pci_enable_device(pdev);
3718         if (err)
3719                 return err;
3720
3721         if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
3722             !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
3723                 pci_using_dac = 1;
3724         } else {
3725                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
3726                 if (err) {
3727                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
3728                         if (err) {
3729                                 dev_err(&pdev->dev, "No usable DMA "
3730                                         "configuration, aborting\n");
3731                                 goto err_dma;
3732                         }
3733                 }
3734                 pci_using_dac = 0;
3735         }
3736
3737         err = pci_request_regions(pdev, ixgbe_driver_name);
3738         if (err) {
3739                 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3740                 goto err_pci_reg;
3741         }
3742
3743         pci_set_master(pdev);
3744         pci_save_state(pdev);
3745
3746         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), MAX_TX_QUEUES);
3747         if (!netdev) {
3748                 err = -ENOMEM;
3749                 goto err_alloc_etherdev;
3750         }
3751
3752         SET_NETDEV_DEV(netdev, &pdev->dev);
3753
3754         pci_set_drvdata(pdev, netdev);
3755         adapter = netdev_priv(netdev);
3756
3757         adapter->netdev = netdev;
3758         adapter->pdev = pdev;
3759         hw = &adapter->hw;
3760         hw->back = adapter;
3761         adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
3762
3763         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3764                               pci_resource_len(pdev, 0));
3765         if (!hw->hw_addr) {
3766                 err = -EIO;
3767                 goto err_ioremap;
3768         }
3769
3770         for (i = 1; i <= 5; i++) {
3771                 if (pci_resource_len(pdev, i) == 0)
3772                         continue;
3773         }
3774
3775         netdev->open = &ixgbe_open;
3776         netdev->stop = &ixgbe_close;
3777         netdev->hard_start_xmit = &ixgbe_xmit_frame;
3778         netdev->get_stats = &ixgbe_get_stats;
3779         netdev->set_rx_mode = &ixgbe_set_rx_mode;
3780         netdev->set_multicast_list = &ixgbe_set_rx_mode;
3781         netdev->set_mac_address = &ixgbe_set_mac;
3782         netdev->change_mtu = &ixgbe_change_mtu;
3783         ixgbe_set_ethtool_ops(netdev);
3784         netdev->tx_timeout = &ixgbe_tx_timeout;
3785         netdev->watchdog_timeo = 5 * HZ;
3786         netdev->vlan_rx_register = ixgbe_vlan_rx_register;
3787         netdev->vlan_rx_add_vid = ixgbe_vlan_rx_add_vid;
3788         netdev->vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid;
3789 #ifdef CONFIG_NET_POLL_CONTROLLER
3790         netdev->poll_controller = ixgbe_netpoll;
3791 #endif
3792         strcpy(netdev->name, pci_name(pdev));
3793
3794         adapter->bd_number = cards_found;
3795
3796         /* Setup hw api */
3797         memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3798         hw->mac.type  = ii->mac;
3799
3800         /* EEPROM */
3801         memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
3802         eec = IXGBE_READ_REG(hw, IXGBE_EEC);
3803         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
3804         if (!(eec & (1 << 8)))
3805                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
3806
3807         /* PHY */
3808         memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
3809         /* phy->sfp_type = ixgbe_sfp_type_unknown; */
3810
3811         err = ii->get_invariants(hw);
3812         if (err)
3813                 goto err_hw_init;
3814
3815         /* setup the private structure */
3816         err = ixgbe_sw_init(adapter);
3817         if (err)
3818                 goto err_sw_init;
3819
3820         /* reset_hw fills in the perm_addr as well */
3821         err = hw->mac.ops.reset_hw(hw);
3822         if (err) {
3823                 dev_err(&adapter->pdev->dev, "HW Init failed: %d\n", err);
3824                 goto err_sw_init;
3825         }
3826
3827         netdev->features = NETIF_F_SG |
3828                            NETIF_F_IP_CSUM |
3829                            NETIF_F_HW_VLAN_TX |
3830                            NETIF_F_HW_VLAN_RX |
3831                            NETIF_F_HW_VLAN_FILTER;
3832
3833         netdev->features |= NETIF_F_IPV6_CSUM;
3834         netdev->features |= NETIF_F_TSO;
3835         netdev->features |= NETIF_F_TSO6;
3836         netdev->features |= NETIF_F_LRO;
3837
3838         netdev->vlan_features |= NETIF_F_TSO;
3839         netdev->vlan_features |= NETIF_F_TSO6;
3840         netdev->vlan_features |= NETIF_F_IP_CSUM;
3841         netdev->vlan_features |= NETIF_F_SG;
3842
3843         if (pci_using_dac)
3844                 netdev->features |= NETIF_F_HIGHDMA;
3845
3846         /* make sure the EEPROM is good */
3847         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
3848                 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
3849                 err = -EIO;
3850                 goto err_eeprom;
3851         }
3852
3853         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
3854         memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
3855
3856         if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
3857                 dev_err(&pdev->dev, "invalid MAC address\n");
3858                 err = -EIO;
3859                 goto err_eeprom;
3860         }
3861
3862         init_timer(&adapter->watchdog_timer);
3863         adapter->watchdog_timer.function = &ixgbe_watchdog;
3864         adapter->watchdog_timer.data = (unsigned long)adapter;
3865
3866         INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
3867         INIT_WORK(&adapter->watchdog_task, ixgbe_watchdog_task);
3868
3869         err = ixgbe_init_interrupt_scheme(adapter);
3870         if (err)
3871                 goto err_sw_init;
3872
3873         /* print bus type/speed/width info */
3874         pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
3875         link_speed = link_status & IXGBE_PCI_LINK_SPEED;
3876         link_width = link_status & IXGBE_PCI_LINK_WIDTH;
3877         dev_info(&pdev->dev, "(PCI Express:%s:%s) "
3878                  "%02x:%02x:%02x:%02x:%02x:%02x\n",
3879                 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
3880                  (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
3881                  "Unknown"),
3882                 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
3883                  (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
3884                  (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
3885                  (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
3886                  "Unknown"),
3887                 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
3888                 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
3889         ixgbe_read_pba_num_generic(hw, &part_num);
3890         dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
3891                  hw->mac.type, hw->phy.type,
3892                  (part_num >> 8), (part_num & 0xff));
3893
3894         if (link_width <= IXGBE_PCI_LINK_WIDTH_4) {
3895                 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
3896                          "this card is not sufficient for optimal "
3897                          "performance.\n");
3898                 dev_warn(&pdev->dev, "For optimal performance a x8 "
3899                          "PCI-Express slot is required.\n");
3900         }
3901
3902         /* reset the hardware with the new settings */
3903         hw->mac.ops.start_hw(hw);
3904
3905         /* link_config depends on start_hw being called at least once */
3906         err = ixgbe_link_config(hw);
3907         if (err) {
3908                 dev_err(&pdev->dev, "setup_link_speed FAILED %d\n", err);
3909                 goto err_register;
3910         }
3911
3912         netif_carrier_off(netdev);
3913         netif_tx_stop_all_queues(netdev);
3914
3915         ixgbe_napi_add_all(adapter);
3916
3917         strcpy(netdev->name, "eth%d");
3918         err = register_netdev(netdev);
3919         if (err)
3920                 goto err_register;
3921
3922 #ifdef CONFIG_IXGBE_DCA
3923         if (dca_add_requester(&pdev->dev) == 0) {
3924                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
3925                 /* always use CB2 mode, difference is masked
3926                  * in the CB driver */
3927                 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
3928                 ixgbe_setup_dca(adapter);
3929         }
3930 #endif
3931
3932         dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
3933         cards_found++;
3934         return 0;
3935
3936 err_register:
3937         ixgbe_release_hw_control(adapter);
3938 err_hw_init:
3939 err_sw_init:
3940         ixgbe_reset_interrupt_capability(adapter);
3941 err_eeprom:
3942         iounmap(hw->hw_addr);
3943 err_ioremap:
3944         free_netdev(netdev);
3945 err_alloc_etherdev:
3946         pci_release_regions(pdev);
3947 err_pci_reg:
3948 err_dma:
3949         pci_disable_device(pdev);
3950         return err;
3951 }
3952
3953 /**
3954  * ixgbe_remove - Device Removal Routine
3955  * @pdev: PCI device information struct
3956  *
3957  * ixgbe_remove is called by the PCI subsystem to alert the driver
3958  * that it should release a PCI device.  The could be caused by a
3959  * Hot-Plug event, or because the driver is going to be removed from
3960  * memory.
3961  **/
3962 static void __devexit ixgbe_remove(struct pci_dev *pdev)
3963 {
3964         struct net_device *netdev = pci_get_drvdata(pdev);
3965         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3966
3967         set_bit(__IXGBE_DOWN, &adapter->state);
3968         del_timer_sync(&adapter->watchdog_timer);
3969
3970         flush_scheduled_work();
3971
3972 #ifdef CONFIG_IXGBE_DCA
3973         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
3974                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
3975                 dca_remove_requester(&pdev->dev);
3976                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
3977         }
3978
3979 #endif
3980         unregister_netdev(netdev);
3981
3982         ixgbe_reset_interrupt_capability(adapter);
3983
3984         ixgbe_release_hw_control(adapter);
3985
3986         iounmap(adapter->hw.hw_addr);
3987         pci_release_regions(pdev);
3988
3989         DPRINTK(PROBE, INFO, "complete\n");
3990         ixgbe_napi_del_all(adapter);
3991         kfree(adapter->tx_ring);
3992         kfree(adapter->rx_ring);
3993
3994         free_netdev(netdev);
3995
3996         pci_disable_device(pdev);
3997 }
3998
3999 /**
4000  * ixgbe_io_error_detected - called when PCI error is detected
4001  * @pdev: Pointer to PCI device
4002  * @state: The current pci connection state
4003  *
4004  * This function is called after a PCI bus error affecting
4005  * this device has been detected.
4006  */
4007 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
4008                                                 pci_channel_state_t state)
4009 {
4010         struct net_device *netdev = pci_get_drvdata(pdev);
4011         struct ixgbe_adapter *adapter = netdev->priv;
4012
4013         netif_device_detach(netdev);
4014
4015         if (netif_running(netdev))
4016                 ixgbe_down(adapter);
4017         pci_disable_device(pdev);
4018
4019         /* Request a slot reset. */
4020         return PCI_ERS_RESULT_NEED_RESET;
4021 }
4022
4023 /**
4024  * ixgbe_io_slot_reset - called after the pci bus has been reset.
4025  * @pdev: Pointer to PCI device
4026  *
4027  * Restart the card from scratch, as if from a cold-boot.
4028  */
4029 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
4030 {
4031         struct net_device *netdev = pci_get_drvdata(pdev);
4032         struct ixgbe_adapter *adapter = netdev->priv;
4033
4034         if (pci_enable_device(pdev)) {
4035                 DPRINTK(PROBE, ERR,
4036                         "Cannot re-enable PCI device after reset.\n");
4037                 return PCI_ERS_RESULT_DISCONNECT;
4038         }
4039         pci_set_master(pdev);
4040         pci_restore_state(pdev);
4041
4042         pci_enable_wake(pdev, PCI_D3hot, 0);
4043         pci_enable_wake(pdev, PCI_D3cold, 0);
4044
4045         ixgbe_reset(adapter);
4046
4047         return PCI_ERS_RESULT_RECOVERED;
4048 }
4049
4050 /**
4051  * ixgbe_io_resume - called when traffic can start flowing again.
4052  * @pdev: Pointer to PCI device
4053  *
4054  * This callback is called when the error recovery driver tells us that
4055  * its OK to resume normal operation.
4056  */
4057 static void ixgbe_io_resume(struct pci_dev *pdev)
4058 {
4059         struct net_device *netdev = pci_get_drvdata(pdev);
4060         struct ixgbe_adapter *adapter = netdev->priv;
4061
4062         if (netif_running(netdev)) {
4063                 if (ixgbe_up(adapter)) {
4064                         DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
4065                         return;
4066                 }
4067         }
4068
4069         netif_device_attach(netdev);
4070 }
4071
4072 static struct pci_error_handlers ixgbe_err_handler = {
4073         .error_detected = ixgbe_io_error_detected,
4074         .slot_reset = ixgbe_io_slot_reset,
4075         .resume = ixgbe_io_resume,
4076 };
4077
4078 static struct pci_driver ixgbe_driver = {
4079         .name     = ixgbe_driver_name,
4080         .id_table = ixgbe_pci_tbl,
4081         .probe    = ixgbe_probe,
4082         .remove   = __devexit_p(ixgbe_remove),
4083 #ifdef CONFIG_PM
4084         .suspend  = ixgbe_suspend,
4085         .resume   = ixgbe_resume,
4086 #endif
4087         .shutdown = ixgbe_shutdown,
4088         .err_handler = &ixgbe_err_handler
4089 };
4090
4091 /**
4092  * ixgbe_init_module - Driver Registration Routine
4093  *
4094  * ixgbe_init_module is the first routine called when the driver is
4095  * loaded. All it does is register with the PCI subsystem.
4096  **/
4097 static int __init ixgbe_init_module(void)
4098 {
4099         int ret;
4100         printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
4101                ixgbe_driver_string, ixgbe_driver_version);
4102
4103         printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
4104
4105 #ifdef CONFIG_IXGBE_DCA
4106         dca_register_notify(&dca_notifier);
4107 #endif
4108
4109         ret = pci_register_driver(&ixgbe_driver);
4110         return ret;
4111 }
4112
4113 module_init(ixgbe_init_module);
4114
4115 /**
4116  * ixgbe_exit_module - Driver Exit Cleanup Routine
4117  *
4118  * ixgbe_exit_module is called just before the driver is removed
4119  * from memory.
4120  **/
4121 static void __exit ixgbe_exit_module(void)
4122 {
4123 #ifdef CONFIG_IXGBE_DCA
4124         dca_unregister_notify(&dca_notifier);
4125 #endif
4126         pci_unregister_driver(&ixgbe_driver);
4127 }
4128
4129 #ifdef CONFIG_IXGBE_DCA
4130 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
4131                             void *p)
4132 {
4133         int ret_val;
4134
4135         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
4136                                          __ixgbe_notify_dca);
4137
4138         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
4139 }
4140 #endif /* CONFIG_IXGBE_DCA */
4141
4142 module_exit(ixgbe_exit_module);
4143
4144 /* ixgbe_main.c */