drivers/net/igb/igb_main.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #include <linux/module.h>
  29 #include <linux/types.h>
  30 #include <linux/init.h>
  31 #include <linux/vmalloc.h>
  32 #include <linux/pagemap.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/ipv6.h>
  35 #include <net/checksum.h>
  36 #include <net/ip6_checksum.h>
  37 #include <linux/mii.h>
  38 #include <linux/ethtool.h>
  39 #include <linux/if_vlan.h>
  40 #include <linux/pci.h>
  41 #include <linux/delay.h>
  42 #include <linux/interrupt.h>
  43 #include <linux/if_ether.h>
  44 #ifdef CONFIG_DCA
  45 #include <linux/dca.h>
  46 #endif
  47 #include "igb.h"
  48
  49 #define DRV_VERSION "1.2.45-k2"
  50 char igb_driver_name[] = "igb";
  51 char igb_driver_version[] = DRV_VERSION;
  52 static const char igb_driver_string[] =
  53                                 "Intel(R) Gigabit Ethernet Network Driver";
  54 static const char igb_copyright[] = "Copyright (c) 2008 Intel Corporation.";
  55
  56 static const struct e1000_info *igb_info_tbl[] = {
  57         [board_82575] = &e1000_82575_info,
  58 };
  59
  60 static struct pci_device_id igb_pci_tbl[] = {
  61         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
  62         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
  63         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
  64         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
  65         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
  66         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
  67         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
  68         /* required last entry */
  69         {0, }
  70 };
  71
  72 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
  73
  74 void igb_reset(struct igb_adapter *);
  75 static int igb_setup_all_tx_resources(struct igb_adapter *);
  76 static int igb_setup_all_rx_resources(struct igb_adapter *);
  77 static void igb_free_all_tx_resources(struct igb_adapter *);
  78 static void igb_free_all_rx_resources(struct igb_adapter *);
  79 static void igb_free_tx_resources(struct igb_ring *);
  80 static void igb_free_rx_resources(struct igb_ring *);
  81 void igb_update_stats(struct igb_adapter *);
  82 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
  83 static void __devexit igb_remove(struct pci_dev *pdev);
  84 static int igb_sw_init(struct igb_adapter *);
  85 static int igb_open(struct net_device *);
  86 static int igb_close(struct net_device *);
  87 static void igb_configure_tx(struct igb_adapter *);
  88 static void igb_configure_rx(struct igb_adapter *);
  89 static void igb_setup_rctl(struct igb_adapter *);
  90 static void igb_clean_all_tx_rings(struct igb_adapter *);
  91 static void igb_clean_all_rx_rings(struct igb_adapter *);
  92 static void igb_clean_tx_ring(struct igb_ring *);
  93 static void igb_clean_rx_ring(struct igb_ring *);
  94 static void igb_set_multi(struct net_device *);
  95 static void igb_update_phy_info(unsigned long);
  96 static void igb_watchdog(unsigned long);
  97 static void igb_watchdog_task(struct work_struct *);
  98 static int igb_xmit_frame_ring_adv(struct sk_buff *, struct net_device *,
  99                                   struct igb_ring *);
 100 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *);
 101 static struct net_device_stats *igb_get_stats(struct net_device *);
 102 static int igb_change_mtu(struct net_device *, int);
 103 static int igb_set_mac(struct net_device *, void *);
 104 static irqreturn_t igb_intr(int irq, void *);
 105 static irqreturn_t igb_intr_msi(int irq, void *);
 106 static irqreturn_t igb_msix_other(int irq, void *);
 107 static irqreturn_t igb_msix_rx(int irq, void *);
 108 static irqreturn_t igb_msix_tx(int irq, void *);
 109 static int igb_clean_rx_ring_msix(struct napi_struct *, int);
 110 #ifdef CONFIG_DCA
 111 static void igb_update_rx_dca(struct igb_ring *);
 112 static void igb_update_tx_dca(struct igb_ring *);
 113 static void igb_setup_dca(struct igb_adapter *);
 114 #endif /* CONFIG_DCA */
 115 static bool igb_clean_tx_irq(struct igb_ring *);
 116 static int igb_poll(struct napi_struct *, int);
 117 static bool igb_clean_rx_irq_adv(struct igb_ring *, int *, int);
 118 static void igb_alloc_rx_buffers_adv(struct igb_ring *, int);
 119 #ifdef CONFIG_IGB_LRO
 120 static int igb_get_skb_hdr(struct sk_buff *skb, void **, void **, u64 *, void *);
 121 #endif
 122 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 123 static void igb_tx_timeout(struct net_device *);
 124 static void igb_reset_task(struct work_struct *);
 125 static void igb_vlan_rx_register(struct net_device *, struct vlan_group *);
 126 static void igb_vlan_rx_add_vid(struct net_device *, u16);
 127 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
 128 static void igb_restore_vlan(struct igb_adapter *);
 129
 130 static int igb_suspend(struct pci_dev *, pm_message_t);
 131 #ifdef CONFIG_PM
 132 static int igb_resume(struct pci_dev *);
 133 #endif
 134 static void igb_shutdown(struct pci_dev *);
 135 #ifdef CONFIG_DCA
 136 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 137 static struct notifier_block dca_notifier = {
 138         .notifier_call  = igb_notify_dca,
 139         .next           = NULL,
 140         .priority       = 0
 141 };
 142 #endif
 143
 144 #ifdef CONFIG_NET_POLL_CONTROLLER
 145 /* for netdump / net console */
 146 static void igb_netpoll(struct net_device *);
 147 #endif
 148
 149 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 150                      pci_channel_state_t);
 151 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 152 static void igb_io_resume(struct pci_dev *);
 153
 154 static struct pci_error_handlers igb_err_handler = {
 155         .error_detected = igb_io_error_detected,
 156         .slot_reset = igb_io_slot_reset,
 157         .resume = igb_io_resume,
 158 };
 159
 160
 161 static struct pci_driver igb_driver = {
 162         .name     = igb_driver_name,
 163         .id_table = igb_pci_tbl,
 164         .probe    = igb_probe,
 165         .remove   = __devexit_p(igb_remove),
 166 #ifdef CONFIG_PM
 167         /* Power Managment Hooks */
 168         .suspend  = igb_suspend,
 169         .resume   = igb_resume,
 170 #endif
 171         .shutdown = igb_shutdown,
 172         .err_handler = &igb_err_handler
 173 };
 174
 175 static int global_quad_port_a; /* global quad port a indication */
 176
 177 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 178 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 179 MODULE_LICENSE("GPL");
 180 MODULE_VERSION(DRV_VERSION);
 181
 182 #ifdef DEBUG
 183 /**
 184  * igb_get_hw_dev_name - return device name string
 185  * used by hardware layer to print debugging information
 186  **/
 187 char *igb_get_hw_dev_name(struct e1000_hw *hw)
 188 {
 189         struct igb_adapter *adapter = hw->back;
 190         return adapter->netdev->name;
 191 }
 192 #endif
 193
 194 /**
 195  * igb_init_module - Driver Registration Routine
 196  *
 197  * igb_init_module is the first routine called when the driver is
 198  * loaded. All it does is register with the PCI subsystem.
 199  **/
 200 static int __init igb_init_module(void)
 201 {
 202         int ret;
 203         printk(KERN_INFO "%s - version %s\n",
 204                igb_driver_string, igb_driver_version);
 205
 206         printk(KERN_INFO "%s\n", igb_copyright);
 207
 208         global_quad_port_a = 0;
 209
 210         ret = pci_register_driver(&igb_driver);
 211 #ifdef CONFIG_DCA
 212         dca_register_notify(&dca_notifier);
 213 #endif
 214         return ret;
 215 }
 216
 217 module_init(igb_init_module);
 218
 219 /**
 220  * igb_exit_module - Driver Exit Cleanup Routine
 221  *
 222  * igb_exit_module is called just before the driver is removed
 223  * from memory.
 224  **/
 225 static void __exit igb_exit_module(void)
 226 {
 227 #ifdef CONFIG_DCA
 228         dca_unregister_notify(&dca_notifier);
 229 #endif
 230         pci_unregister_driver(&igb_driver);
 231 }
 232
 233 module_exit(igb_exit_module);
 234
 235 /**
 236  * igb_alloc_queues - Allocate memory for all rings
 237  * @adapter: board private structure to initialize
 238  *
 239  * We allocate one ring per queue at run-time since we don't know the
 240  * number of queues at compile-time.
 241  **/
 242 static int igb_alloc_queues(struct igb_adapter *adapter)
 243 {
 244         int i;
 245
 246         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
 247                                    sizeof(struct igb_ring), GFP_KERNEL);
 248         if (!adapter->tx_ring)
 249                 return -ENOMEM;
 250
 251         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
 252                                    sizeof(struct igb_ring), GFP_KERNEL);
 253         if (!adapter->rx_ring) {
 254                 kfree(adapter->tx_ring);
 255                 return -ENOMEM;
 256         }
 257
 258         adapter->rx_ring->buddy = adapter->tx_ring;
 259
 260         for (i = 0; i < adapter->num_tx_queues; i++) {
 261                 struct igb_ring *ring = &(adapter->tx_ring[i]);
 262                 ring->adapter = adapter;
 263                 ring->queue_index = i;
 264         }
 265         for (i = 0; i < adapter->num_rx_queues; i++) {
 266                 struct igb_ring *ring = &(adapter->rx_ring[i]);
 267                 ring->adapter = adapter;
 268                 ring->queue_index = i;
 269                 ring->itr_register = E1000_ITR;
 270
 271                 /* set a default napi handler for each rx_ring */
 272                 netif_napi_add(adapter->netdev, &ring->napi, igb_poll, 64);
 273         }
 274         return 0;
 275 }
 276
 277 static void igb_free_queues(struct igb_adapter *adapter)
 278 {
 279         int i;
 280
 281         for (i = 0; i < adapter->num_rx_queues; i++)
 282                 netif_napi_del(&adapter->rx_ring[i].napi);
 283
 284         kfree(adapter->tx_ring);
 285         kfree(adapter->rx_ring);
 286 }
 287
 288 #define IGB_N0_QUEUE -1
 289 static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue,
 290                               int tx_queue, int msix_vector)
 291 {
 292         u32 msixbm = 0;
 293         struct e1000_hw *hw = &adapter->hw;
 294         u32 ivar, index;
 295
 296         switch (hw->mac.type) {
 297         case e1000_82575:
 298                 /* The 82575 assigns vectors using a bitmask, which matches the
 299                    bitmask for the EICR/EIMS/EIMC registers.  To assign one
 300                    or more queues to a vector, we write the appropriate bits
 301                    into the MSIXBM register for that vector. */
 302                 if (rx_queue > IGB_N0_QUEUE) {
 303                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 304                         adapter->rx_ring[rx_queue].eims_value = msixbm;
 305                 }
 306                 if (tx_queue > IGB_N0_QUEUE) {
 307                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 308                         adapter->tx_ring[tx_queue].eims_value =
 309                                   E1000_EICR_TX_QUEUE0 << tx_queue;
 310                 }
 311                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 312                 break;
 313         case e1000_82576:
 314                 /* Kawela uses a table-based method for assigning vectors.
 315                    Each queue has a single entry in the table to which we write
 316                    a vector number along with a "valid" bit.  Sadly, the layout
 317                    of the table is somewhat counterintuitive. */
 318                 if (rx_queue > IGB_N0_QUEUE) {
 319                         index = (rx_queue & 0x7);
 320                         ivar = array_rd32(E1000_IVAR0, index);
 321                         if (rx_queue < 8) {
 322                                 /* vector goes into low byte of register */
 323                                 ivar = ivar & 0xFFFFFF00;
 324                                 ivar |= msix_vector | E1000_IVAR_VALID;
 325                         } else {
 326                                 /* vector goes into third byte of register */
 327                                 ivar = ivar & 0xFF00FFFF;
 328                                 ivar |= (msix_vector | E1000_IVAR_VALID) << 16;
 329                         }
 330                         adapter->rx_ring[rx_queue].eims_value= 1 << msix_vector;
 331                         array_wr32(E1000_IVAR0, index, ivar);
 332                 }
 333                 if (tx_queue > IGB_N0_QUEUE) {
 334                         index = (tx_queue & 0x7);
 335                         ivar = array_rd32(E1000_IVAR0, index);
 336                         if (tx_queue < 8) {
 337                                 /* vector goes into second byte of register */
 338                                 ivar = ivar & 0xFFFF00FF;
 339                                 ivar |= (msix_vector | E1000_IVAR_VALID) << 8;
 340                         } else {
 341                                 /* vector goes into high byte of register */
 342                                 ivar = ivar & 0x00FFFFFF;
 343                                 ivar |= (msix_vector | E1000_IVAR_VALID) << 24;
 344                         }
 345                         adapter->tx_ring[tx_queue].eims_value= 1 << msix_vector;
 346                         array_wr32(E1000_IVAR0, index, ivar);
 347                 }
 348                 break;
 349         default:
 350                 BUG();
 351                 break;
 352         }
 353 }
 354
 355 /**
 356  * igb_configure_msix - Configure MSI-X hardware
 357  *
 358  * igb_configure_msix sets up the hardware to properly
 359  * generate MSI-X interrupts.
 360  **/
 361 static void igb_configure_msix(struct igb_adapter *adapter)
 362 {
 363         u32 tmp;
 364         int i, vector = 0;
 365         struct e1000_hw *hw = &adapter->hw;
 366
 367         adapter->eims_enable_mask = 0;
 368         if (hw->mac.type == e1000_82576)
 369                 /* Turn on MSI-X capability first, or our settings
 370                  * won't stick.  And it will take days to debug. */
 371                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 372                                    E1000_GPIE_PBA | E1000_GPIE_EIAME |
 373                                    E1000_GPIE_NSICR);
 374
 375         for (i = 0; i < adapter->num_tx_queues; i++) {
 376                 struct igb_ring *tx_ring = &adapter->tx_ring[i];
 377                 igb_assign_vector(adapter, IGB_N0_QUEUE, i, vector++);
 378                 adapter->eims_enable_mask |= tx_ring->eims_value;
 379                 if (tx_ring->itr_val)
 380                         writel(tx_ring->itr_val,
 381                                hw->hw_addr + tx_ring->itr_register);
 382                 else
 383                         writel(1, hw->hw_addr + tx_ring->itr_register);
 384         }
 385
 386         for (i = 0; i < adapter->num_rx_queues; i++) {
 387                 struct igb_ring *rx_ring = &adapter->rx_ring[i];
 388                 rx_ring->buddy = 0;
 389                 igb_assign_vector(adapter, i, IGB_N0_QUEUE, vector++);
 390                 adapter->eims_enable_mask |= rx_ring->eims_value;
 391                 if (rx_ring->itr_val)
 392                         writel(rx_ring->itr_val,
 393                                hw->hw_addr + rx_ring->itr_register);
 394                 else
 395                         writel(1, hw->hw_addr + rx_ring->itr_register);
 396         }
 397
 398
 399         /* set vector for other causes, i.e. link changes */
 400         switch (hw->mac.type) {
 401         case e1000_82575:
 402                 array_wr32(E1000_MSIXBM(0), vector++,
 403                                       E1000_EIMS_OTHER);
 404
 405                 tmp = rd32(E1000_CTRL_EXT);
 406                 /* enable MSI-X PBA support*/
 407                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 408
 409                 /* Auto-Mask interrupts upon ICR read. */
 410                 tmp |= E1000_CTRL_EXT_EIAME;
 411                 tmp |= E1000_CTRL_EXT_IRCA;
 412
 413                 wr32(E1000_CTRL_EXT, tmp);
 414                 adapter->eims_enable_mask |= E1000_EIMS_OTHER;
 415                 adapter->eims_other = E1000_EIMS_OTHER;
 416
 417                 break;
 418
 419         case e1000_82576:
 420                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 421                 wr32(E1000_IVAR_MISC, tmp);
 422
 423                 adapter->eims_enable_mask = (1 << (vector)) - 1;
 424                 adapter->eims_other = 1 << (vector - 1);
 425                 break;
 426         default:
 427                 /* do nothing, since nothing else supports MSI-X */
 428                 break;
 429         } /* switch (hw->mac.type) */
 430         wrfl();
 431 }
 432
 433 /**
 434  * igb_request_msix - Initialize MSI-X interrupts
 435  *
 436  * igb_request_msix allocates MSI-X vectors and requests interrupts from the
 437  * kernel.
 438  **/
 439 static int igb_request_msix(struct igb_adapter *adapter)
 440 {
 441         struct net_device *netdev = adapter->netdev;
 442         int i, err = 0, vector = 0;
 443
 444         vector = 0;
 445
 446         for (i = 0; i < adapter->num_tx_queues; i++) {
 447                 struct igb_ring *ring = &(adapter->tx_ring[i]);
 448                 sprintf(ring->name, "%s-tx%d", netdev->name, i);
 449                 err = request_irq(adapter->msix_entries[vector].vector,
 450                                   &igb_msix_tx, 0, ring->name,
 451                                   &(adapter->tx_ring[i]));
 452                 if (err)
 453                         goto out;
 454                 ring->itr_register = E1000_EITR(0) + (vector << 2);
 455                 ring->itr_val = 976; /* ~4000 ints/sec */
 456                 vector++;
 457         }
 458         for (i = 0; i < adapter->num_rx_queues; i++) {
 459                 struct igb_ring *ring = &(adapter->rx_ring[i]);
 460                 if (strlen(netdev->name) < (IFNAMSIZ - 5))
 461                         sprintf(ring->name, "%s-rx%d", netdev->name, i);
 462                 else
 463                         memcpy(ring->name, netdev->name, IFNAMSIZ);
 464                 err = request_irq(adapter->msix_entries[vector].vector,
 465                                   &igb_msix_rx, 0, ring->name,
 466                                   &(adapter->rx_ring[i]));
 467                 if (err)
 468                         goto out;
 469                 ring->itr_register = E1000_EITR(0) + (vector << 2);
 470                 ring->itr_val = adapter->itr;
 471                 /* overwrite the poll routine for MSIX, we've already done
 472                  * netif_napi_add */
 473                 ring->napi.poll = &igb_clean_rx_ring_msix;
 474                 vector++;
 475         }
 476
 477         err = request_irq(adapter->msix_entries[vector].vector,
 478                           &igb_msix_other, 0, netdev->name, netdev);
 479         if (err)
 480                 goto out;
 481
 482         igb_configure_msix(adapter);
 483         return 0;
 484 out:
 485         return err;
 486 }
 487
 488 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
 489 {
 490         if (adapter->msix_entries) {
 491                 pci_disable_msix(adapter->pdev);
 492                 kfree(adapter->msix_entries);
 493                 adapter->msix_entries = NULL;
 494         } else if (adapter->flags & IGB_FLAG_HAS_MSI)
 495                 pci_disable_msi(adapter->pdev);
 496         return;
 497 }
 498
 499
 500 /**
 501  * igb_set_interrupt_capability - set MSI or MSI-X if supported
 502  *
 503  * Attempt to configure interrupts using the best available
 504  * capabilities of the hardware and kernel.
 505  **/
 506 static void igb_set_interrupt_capability(struct igb_adapter *adapter)
 507 {
 508         int err;
 509         int numvecs, i;
 510
 511         numvecs = adapter->num_tx_queues + adapter->num_rx_queues + 1;
 512         adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
 513                                         GFP_KERNEL);
 514         if (!adapter->msix_entries)
 515                 goto msi_only;
 516
 517         for (i = 0; i < numvecs; i++)
 518                 adapter->msix_entries[i].entry = i;
 519
 520         err = pci_enable_msix(adapter->pdev,
 521                               adapter->msix_entries,
 522                               numvecs);
 523         if (err == 0)
 524                 return;
 525
 526         igb_reset_interrupt_capability(adapter);
 527
 528         /* If we can't do MSI-X, try MSI */
 529 msi_only:
 530         adapter->num_rx_queues = 1;
 531         adapter->num_tx_queues = 1;
 532         if (!pci_enable_msi(adapter->pdev))
 533                 adapter->flags |= IGB_FLAG_HAS_MSI;
 534
 535 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
 536         /* Notify the stack of the (possibly) reduced Tx Queue count. */
 537         adapter->netdev->egress_subqueue_count = adapter->num_tx_queues;
 538 #endif
 539         return;
 540 }
 541
 542 /**
 543  * igb_request_irq - initialize interrupts
 544  *
 545  * Attempts to configure interrupts using the best available
 546  * capabilities of the hardware and kernel.
 547  **/
 548 static int igb_request_irq(struct igb_adapter *adapter)
 549 {
 550         struct net_device *netdev = adapter->netdev;
 551         struct e1000_hw *hw = &adapter->hw;
 552         int err = 0;
 553
 554         if (adapter->msix_entries) {
 555                 err = igb_request_msix(adapter);
 556                 if (!err)
 557                         goto request_done;
 558                 /* fall back to MSI */
 559                 igb_reset_interrupt_capability(adapter);
 560                 if (!pci_enable_msi(adapter->pdev))
 561                         adapter->flags |= IGB_FLAG_HAS_MSI;
 562                 igb_free_all_tx_resources(adapter);
 563                 igb_free_all_rx_resources(adapter);
 564                 adapter->num_rx_queues = 1;
 565                 igb_alloc_queues(adapter);
 566         } else {
 567                 switch (hw->mac.type) {
 568                 case e1000_82575:
 569                         wr32(E1000_MSIXBM(0),
 570                              (E1000_EICR_RX_QUEUE0 | E1000_EIMS_OTHER));
 571                         break;
 572                 case e1000_82576:
 573                         wr32(E1000_IVAR0, E1000_IVAR_VALID);
 574                         break;
 575                 default:
 576                         break;
 577                 }
 578         }
 579
 580         if (adapter->flags & IGB_FLAG_HAS_MSI) {
 581                 err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0,
 582                                   netdev->name, netdev);
 583                 if (!err)
 584                         goto request_done;
 585                 /* fall back to legacy interrupts */
 586                 igb_reset_interrupt_capability(adapter);
 587                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
 588         }
 589
 590         err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED,
 591                           netdev->name, netdev);
 592
 593         if (err)
 594                 dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
 595                         err);
 596
 597 request_done:
 598         return err;
 599 }
 600
 601 static void igb_free_irq(struct igb_adapter *adapter)
 602 {
 603         struct net_device *netdev = adapter->netdev;
 604
 605         if (adapter->msix_entries) {
 606                 int vector = 0, i;
 607
 608                 for (i = 0; i < adapter->num_tx_queues; i++)
 609                         free_irq(adapter->msix_entries[vector++].vector,
 610                                 &(adapter->tx_ring[i]));
 611                 for (i = 0; i < adapter->num_rx_queues; i++)
 612                         free_irq(adapter->msix_entries[vector++].vector,
 613                                 &(adapter->rx_ring[i]));
 614
 615                 free_irq(adapter->msix_entries[vector++].vector, netdev);
 616                 return;
 617         }
 618
 619         free_irq(adapter->pdev->irq, netdev);
 620 }
 621
 622 /**
 623  * igb_irq_disable - Mask off interrupt generation on the NIC
 624  * @adapter: board private structure
 625  **/
 626 static void igb_irq_disable(struct igb_adapter *adapter)
 627 {
 628         struct e1000_hw *hw = &adapter->hw;
 629
 630         if (adapter->msix_entries) {
 631                 wr32(E1000_EIAM, 0);
 632                 wr32(E1000_EIMC, ~0);
 633                 wr32(E1000_EIAC, 0);
 634         }
 635
 636         wr32(E1000_IAM, 0);
 637         wr32(E1000_IMC, ~0);
 638         wrfl();
 639         synchronize_irq(adapter->pdev->irq);
 640 }
 641
 642 /**
 643  * igb_irq_enable - Enable default interrupt generation settings
 644  * @adapter: board private structure
 645  **/
 646 static void igb_irq_enable(struct igb_adapter *adapter)
 647 {
 648         struct e1000_hw *hw = &adapter->hw;
 649
 650         if (adapter->msix_entries) {
 651                 wr32(E1000_EIAC, adapter->eims_enable_mask);
 652                 wr32(E1000_EIAM, adapter->eims_enable_mask);
 653                 wr32(E1000_EIMS, adapter->eims_enable_mask);
 654                 wr32(E1000_IMS, E1000_IMS_LSC);
 655         } else {
 656                 wr32(E1000_IMS, IMS_ENABLE_MASK);
 657                 wr32(E1000_IAM, IMS_ENABLE_MASK);
 658         }
 659 }
 660
 661 static void igb_update_mng_vlan(struct igb_adapter *adapter)
 662 {
 663         struct net_device *netdev = adapter->netdev;
 664         u16 vid = adapter->hw.mng_cookie.vlan_id;
 665         u16 old_vid = adapter->mng_vlan_id;
 666         if (adapter->vlgrp) {
 667                 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
 668                         if (adapter->hw.mng_cookie.status &
 669                                 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
 670                                 igb_vlan_rx_add_vid(netdev, vid);
 671                                 adapter->mng_vlan_id = vid;
 672                         } else
 673                                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
 674
 675                         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
 676                                         (vid != old_vid) &&
 677                             !vlan_group_get_device(adapter->vlgrp, old_vid))
 678                                 igb_vlan_rx_kill_vid(netdev, old_vid);
 679                 } else
 680                         adapter->mng_vlan_id = vid;
 681         }
 682 }
 683
 684 /**
 685  * igb_release_hw_control - release control of the h/w to f/w
 686  * @adapter: address of board private structure
 687  *
 688  * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
 689  * For ASF and Pass Through versions of f/w this means that the
 690  * driver is no longer loaded.
 691  *
 692  **/
 693 static void igb_release_hw_control(struct igb_adapter *adapter)
 694 {
 695         struct e1000_hw *hw = &adapter->hw;
 696         u32 ctrl_ext;
 697
 698         /* Let firmware take over control of h/w */
 699         ctrl_ext = rd32(E1000_CTRL_EXT);
 700         wr32(E1000_CTRL_EXT,
 701                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
 702 }
 703
 704
 705 /**
 706  * igb_get_hw_control - get control of the h/w from f/w
 707  * @adapter: address of board private structure
 708  *
 709  * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
 710  * For ASF and Pass Through versions of f/w this means that
 711  * the driver is loaded.
 712  *
 713  **/
 714 static void igb_get_hw_control(struct igb_adapter *adapter)
 715 {
 716         struct e1000_hw *hw = &adapter->hw;
 717         u32 ctrl_ext;
 718
 719         /* Let firmware know the driver has taken over */
 720         ctrl_ext = rd32(E1000_CTRL_EXT);
 721         wr32(E1000_CTRL_EXT,
 722                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
 723 }
 724
 725 static void igb_init_manageability(struct igb_adapter *adapter)
 726 {
 727         struct e1000_hw *hw = &adapter->hw;
 728
 729         if (adapter->en_mng_pt) {
 730                 u32 manc2h = rd32(E1000_MANC2H);
 731                 u32 manc = rd32(E1000_MANC);
 732
 733                 /* enable receiving management packets to the host */
 734                 /* this will probably generate destination unreachable messages
 735                  * from the host OS, but the packets will be handled on SMBUS */
 736                 manc |= E1000_MANC_EN_MNG2HOST;
 737 #define E1000_MNG2HOST_PORT_623 (1 << 5)
 738 #define E1000_MNG2HOST_PORT_664 (1 << 6)
 739                 manc2h |= E1000_MNG2HOST_PORT_623;
 740                 manc2h |= E1000_MNG2HOST_PORT_664;
 741                 wr32(E1000_MANC2H, manc2h);
 742
 743                 wr32(E1000_MANC, manc);
 744         }
 745 }
 746
 747 /**
 748  * igb_configure - configure the hardware for RX and TX
 749  * @adapter: private board structure
 750  **/
 751 static void igb_configure(struct igb_adapter *adapter)
 752 {
 753         struct net_device *netdev = adapter->netdev;
 754         int i;
 755
 756         igb_get_hw_control(adapter);
 757         igb_set_multi(netdev);
 758
 759         igb_restore_vlan(adapter);
 760         igb_init_manageability(adapter);
 761
 762         igb_configure_tx(adapter);
 763         igb_setup_rctl(adapter);
 764         igb_configure_rx(adapter);
 765
 766         igb_rx_fifo_flush_82575(&adapter->hw);
 767
 768         /* call IGB_DESC_UNUSED which always leaves
 769          * at least 1 descriptor unused to make sure
 770          * next_to_use != next_to_clean */
 771         for (i = 0; i < adapter->num_rx_queues; i++) {
 772                 struct igb_ring *ring = &adapter->rx_ring[i];
 773                 igb_alloc_rx_buffers_adv(ring, IGB_DESC_UNUSED(ring));
 774         }
 775
 776
 777         adapter->tx_queue_len = netdev->tx_queue_len;
 778 }
 779
 780
 781 /**
 782  * igb_up - Open the interface and prepare it to handle traffic
 783  * @adapter: board private structure
 784  **/
 785
 786 int igb_up(struct igb_adapter *adapter)
 787 {
 788         struct e1000_hw *hw = &adapter->hw;
 789         int i;
 790
 791         /* hardware has been reset, we need to reload some things */
 792         igb_configure(adapter);
 793
 794         clear_bit(__IGB_DOWN, &adapter->state);
 795
 796         for (i = 0; i < adapter->num_rx_queues; i++)
 797                 napi_enable(&adapter->rx_ring[i].napi);
 798         if (adapter->msix_entries)
 799                 igb_configure_msix(adapter);
 800
 801         /* Clear any pending interrupts. */
 802         rd32(E1000_ICR);
 803         igb_irq_enable(adapter);
 804
 805         /* Fire a link change interrupt to start the watchdog. */
 806         wr32(E1000_ICS, E1000_ICS_LSC);
 807         return 0;
 808 }
 809
 810 void igb_down(struct igb_adapter *adapter)
 811 {
 812         struct e1000_hw *hw = &adapter->hw;
 813         struct net_device *netdev = adapter->netdev;
 814         u32 tctl, rctl;
 815         int i;
 816
 817         /* signal that we're down so the interrupt handler does not
 818          * reschedule our watchdog timer */
 819         set_bit(__IGB_DOWN, &adapter->state);
 820
 821         /* disable receives in the hardware */
 822         rctl = rd32(E1000_RCTL);
 823         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
 824         /* flush and sleep below */
 825
 826         netif_stop_queue(netdev);
 827 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
 828         for (i = 0; i < adapter->num_tx_queues; i++)
 829                 netif_stop_subqueue(netdev, i);
 830 #endif
 831
 832         /* disable transmits in the hardware */
 833         tctl = rd32(E1000_TCTL);
 834         tctl &= ~E1000_TCTL_EN;
 835         wr32(E1000_TCTL, tctl);
 836         /* flush both disables and wait for them to finish */
 837         wrfl();
 838         msleep(10);
 839
 840         for (i = 0; i < adapter->num_rx_queues; i++)
 841                 napi_disable(&adapter->rx_ring[i].napi);
 842
 843         igb_irq_disable(adapter);
 844
 845         del_timer_sync(&adapter->watchdog_timer);
 846         del_timer_sync(&adapter->phy_info_timer);
 847
 848         netdev->tx_queue_len = adapter->tx_queue_len;
 849         netif_carrier_off(netdev);
 850         adapter->link_speed = 0;
 851         adapter->link_duplex = 0;
 852
 853         if (!pci_channel_offline(adapter->pdev))
 854                 igb_reset(adapter);
 855         igb_clean_all_tx_rings(adapter);
 856         igb_clean_all_rx_rings(adapter);
 857 }
 858
 859 void igb_reinit_locked(struct igb_adapter *adapter)
 860 {
 861         WARN_ON(in_interrupt());
 862         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 863                 msleep(1);
 864         igb_down(adapter);
 865         igb_up(adapter);
 866         clear_bit(__IGB_RESETTING, &adapter->state);
 867 }
 868
 869 void igb_reset(struct igb_adapter *adapter)
 870 {
 871         struct e1000_hw *hw = &adapter->hw;
 872         struct e1000_mac_info *mac = &hw->mac;
 873         struct e1000_fc_info *fc = &hw->fc;
 874         u32 pba = 0, tx_space, min_tx_space, min_rx_space;
 875         u16 hwm;
 876
 877         /* Repartition Pba for greater than 9k mtu
 878          * To take effect CTRL.RST is required.
 879          */
 880         if (mac->type != e1000_82576) {
 881         pba = E1000_PBA_34K;
 882         }
 883         else {
 884                 pba = E1000_PBA_64K;
 885         }
 886
 887         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
 888             (mac->type < e1000_82576)) {
 889                 /* adjust PBA for jumbo frames */
 890                 wr32(E1000_PBA, pba);
 891
 892                 /* To maintain wire speed transmits, the Tx FIFO should be
 893                  * large enough to accommodate two full transmit packets,
 894                  * rounded up to the next 1KB and expressed in KB.  Likewise,
 895                  * the Rx FIFO should be large enough to accommodate at least
 896                  * one full receive packet and is similarly rounded up and
 897                  * expressed in KB. */
 898                 pba = rd32(E1000_PBA);
 899                 /* upper 16 bits has Tx packet buffer allocation size in KB */
 900                 tx_space = pba >> 16;
 901                 /* lower 16 bits has Rx packet buffer allocation size in KB */
 902                 pba &= 0xffff;
 903                 /* the tx fifo also stores 16 bytes of information about the tx
 904                  * but don't include ethernet FCS because hardware appends it */
 905                 min_tx_space = (adapter->max_frame_size +
 906                                 sizeof(struct e1000_tx_desc) -
 907                                 ETH_FCS_LEN) * 2;
 908                 min_tx_space = ALIGN(min_tx_space, 1024);
 909                 min_tx_space >>= 10;
 910                 /* software strips receive CRC, so leave room for it */
 911                 min_rx_space = adapter->max_frame_size;
 912                 min_rx_space = ALIGN(min_rx_space, 1024);
 913                 min_rx_space >>= 10;
 914
 915                 /* If current Tx allocation is less than the min Tx FIFO size,
 916                  * and the min Tx FIFO size is less than the current Rx FIFO
 917                  * allocation, take space away from current Rx allocation */
 918                 if (tx_space < min_tx_space &&
 919                     ((min_tx_space - tx_space) < pba)) {
 920                         pba = pba - (min_tx_space - tx_space);
 921
 922                         /* if short on rx space, rx wins and must trump tx
 923                          * adjustment */
 924                         if (pba < min_rx_space)
 925                                 pba = min_rx_space;
 926                 }
 927                 wr32(E1000_PBA, pba);
 928         }
 929
 930         /* flow control settings */
 931         /* The high water mark must be low enough to fit one full frame
 932          * (or the size used for early receive) above it in the Rx FIFO.
 933          * Set it to the lower of:
 934          * - 90% of the Rx FIFO size, or
 935          * - the full Rx FIFO size minus one full frame */
 936         hwm = min(((pba << 10) * 9 / 10),
 937                         ((pba << 10) - 2 * adapter->max_frame_size));
 938
 939         if (mac->type < e1000_82576) {
 940                 fc->high_water = hwm & 0xFFF8;  /* 8-byte granularity */
 941                 fc->low_water = fc->high_water - 8;
 942         } else {
 943                 fc->high_water = hwm & 0xFFF0;  /* 16-byte granularity */
 944                 fc->low_water = fc->high_water - 16;
 945         }
 946         fc->pause_time = 0xFFFF;
 947         fc->send_xon = 1;
 948         fc->type = fc->original_type;
 949
 950         /* Allow time for pending master requests to run */
 951         adapter->hw.mac.ops.reset_hw(&adapter->hw);
 952         wr32(E1000_WUC, 0);
 953
 954         if (adapter->hw.mac.ops.init_hw(&adapter->hw))
 955                 dev_err(&adapter->pdev->dev, "Hardware Error\n");
 956
 957         igb_update_mng_vlan(adapter);
 958
 959         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
 960         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
 961
 962         igb_reset_adaptive(&adapter->hw);
 963         if (adapter->hw.phy.ops.get_phy_info)
 964                 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
 965 }
 966
 967 /**
 968  * igb_is_need_ioport - determine if an adapter needs ioport resources or not
 969  * @pdev: PCI device information struct
 970  *
 971  * Returns true if an adapter needs ioport resources
 972  **/
 973 static int igb_is_need_ioport(struct pci_dev *pdev)
 974 {
 975         switch (pdev->device) {
 976         /* Currently there are no adapters that need ioport resources */
 977         default:
 978                 return false;
 979         }
 980 }
 981
 982 /**
 983  * igb_probe - Device Initialization Routine
 984  * @pdev: PCI device information struct
 985  * @ent: entry in igb_pci_tbl
 986  *
 987  * Returns 0 on success, negative on failure
 988  *
 989  * igb_probe initializes an adapter identified by a pci_dev structure.
 990  * The OS initialization, configuring of the adapter private structure,
 991  * and a hardware reset occur.
 992  **/
 993 static int __devinit igb_probe(struct pci_dev *pdev,
 994                                const struct pci_device_id *ent)
 995 {
 996         struct net_device *netdev;
 997         struct igb_adapter *adapter;
 998         struct e1000_hw *hw;
 999         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
1000         unsigned long mmio_start, mmio_len;
1001         int i, err, pci_using_dac;
1002         u16 eeprom_data = 0;
1003         u16 eeprom_apme_mask = IGB_EEPROM_APME;
1004         u32 part_num;
1005         int bars, need_ioport;
1006
1007         /* do not allocate ioport bars when not needed */
1008         need_ioport = igb_is_need_ioport(pdev);
1009         if (need_ioport) {
1010                 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
1011                 err = pci_enable_device(pdev);
1012         } else {
1013                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
1014                 err = pci_enable_device_mem(pdev);
1015         }
1016         if (err)
1017                 return err;
1018
1019         pci_using_dac = 0;
1020         err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
1021         if (!err) {
1022                 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
1023                 if (!err)
1024                         pci_using_dac = 1;
1025         } else {
1026                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1027                 if (err) {
1028                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1029                         if (err) {
1030                                 dev_err(&pdev->dev, "No usable DMA "
1031                                         "configuration, aborting\n");
1032                                 goto err_dma;
1033                         }
1034                 }
1035         }
1036
1037         err = pci_request_selected_regions(pdev, bars, igb_driver_name);
1038         if (err)
1039                 goto err_pci_reg;
1040
1041         pci_set_master(pdev);
1042         pci_save_state(pdev);
1043
1044         err = -ENOMEM;
1045 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1046         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter), IGB_MAX_TX_QUEUES);
1047 #else
1048         netdev = alloc_etherdev(sizeof(struct igb_adapter));
1049 #endif /* CONFIG_NETDEVICES_MULTIQUEUE */
1050         if (!netdev)
1051                 goto err_alloc_etherdev;
1052
1053         SET_NETDEV_DEV(netdev, &pdev->dev);
1054
1055         pci_set_drvdata(pdev, netdev);
1056         adapter = netdev_priv(netdev);
1057         adapter->netdev = netdev;
1058         adapter->pdev = pdev;
1059         hw = &adapter->hw;
1060         hw->back = adapter;
1061         adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE;
1062         adapter->bars = bars;
1063         adapter->need_ioport = need_ioport;
1064
1065         mmio_start = pci_resource_start(pdev, 0);
1066         mmio_len = pci_resource_len(pdev, 0);
1067
1068         err = -EIO;
1069         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
1070         if (!adapter->hw.hw_addr)
1071                 goto err_ioremap;
1072
1073         netdev->open = &igb_open;
1074         netdev->stop = &igb_close;
1075         netdev->get_stats = &igb_get_stats;
1076         netdev->set_multicast_list = &igb_set_multi;
1077         netdev->set_mac_address = &igb_set_mac;
1078         netdev->change_mtu = &igb_change_mtu;
1079         netdev->do_ioctl = &igb_ioctl;
1080         igb_set_ethtool_ops(netdev);
1081         netdev->tx_timeout = &igb_tx_timeout;
1082         netdev->watchdog_timeo = 5 * HZ;
1083         netdev->vlan_rx_register = igb_vlan_rx_register;
1084         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
1085         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
1086 #ifdef CONFIG_NET_POLL_CONTROLLER
1087         netdev->poll_controller = igb_netpoll;
1088 #endif
1089         netdev->hard_start_xmit = &igb_xmit_frame_adv;
1090
1091         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1092
1093         netdev->mem_start = mmio_start;
1094         netdev->mem_end = mmio_start + mmio_len;
1095
1096         /* PCI config space info */
1097         hw->vendor_id = pdev->vendor;
1098         hw->device_id = pdev->device;
1099         hw->revision_id = pdev->revision;
1100         hw->subsystem_vendor_id = pdev->subsystem_vendor;
1101         hw->subsystem_device_id = pdev->subsystem_device;
1102
1103         /* setup the private structure */
1104         hw->back = adapter;
1105         /* Copy the default MAC, PHY and NVM function pointers */
1106         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
1107         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
1108         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
1109         /* Initialize skew-specific constants */
1110         err = ei->get_invariants(hw);
1111         if (err)
1112                 goto err_hw_init;
1113
1114         err = igb_sw_init(adapter);
1115         if (err)
1116                 goto err_sw_init;
1117
1118         igb_get_bus_info_pcie(hw);
1119
1120         /* set flags */
1121         switch (hw->mac.type) {
1122         case e1000_82576:
1123         case e1000_82575:
1124                 adapter->flags |= IGB_FLAG_HAS_DCA;
1125                 adapter->flags |= IGB_FLAG_NEED_CTX_IDX;
1126                 break;
1127         default:
1128                 break;
1129         }
1130
1131         hw->phy.autoneg_wait_to_complete = false;
1132         hw->mac.adaptive_ifs = true;
1133
1134         /* Copper options */
1135         if (hw->phy.media_type == e1000_media_type_copper) {
1136                 hw->phy.mdix = AUTO_ALL_MODES;
1137                 hw->phy.disable_polarity_correction = false;
1138                 hw->phy.ms_type = e1000_ms_hw_default;
1139         }
1140
1141         if (igb_check_reset_block(hw))
1142                 dev_info(&pdev->dev,
1143                         "PHY reset is blocked due to SOL/IDER session.\n");
1144
1145         netdev->features = NETIF_F_SG |
1146                            NETIF_F_HW_CSUM |
1147                            NETIF_F_HW_VLAN_TX |
1148                            NETIF_F_HW_VLAN_RX |
1149                            NETIF_F_HW_VLAN_FILTER;
1150
1151         netdev->features |= NETIF_F_TSO;
1152         netdev->features |= NETIF_F_TSO6;
1153
1154 #ifdef CONFIG_IGB_LRO
1155         netdev->features |= NETIF_F_LRO;
1156 #endif
1157
1158         netdev->vlan_features |= NETIF_F_TSO;
1159         netdev->vlan_features |= NETIF_F_TSO6;
1160         netdev->vlan_features |= NETIF_F_HW_CSUM;
1161         netdev->vlan_features |= NETIF_F_SG;
1162
1163         if (pci_using_dac)
1164                 netdev->features |= NETIF_F_HIGHDMA;
1165
1166 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1167         netdev->features |= NETIF_F_MULTI_QUEUE;
1168 #endif
1169
1170         netdev->features |= NETIF_F_LLTX;
1171         adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw);
1172
1173         /* before reading the NVM, reset the controller to put the device in a
1174          * known good starting state */
1175         hw->mac.ops.reset_hw(hw);
1176
1177         /* make sure the NVM is good */
1178         if (igb_validate_nvm_checksum(hw) < 0) {
1179                 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
1180                 err = -EIO;
1181                 goto err_eeprom;
1182         }
1183
1184         /* copy the MAC address out of the NVM */
1185         if (hw->mac.ops.read_mac_addr(hw))
1186                 dev_err(&pdev->dev, "NVM Read Error\n");
1187
1188         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
1189         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
1190
1191         if (!is_valid_ether_addr(netdev->perm_addr)) {
1192                 dev_err(&pdev->dev, "Invalid MAC Address\n");
1193                 err = -EIO;
1194                 goto err_eeprom;
1195         }
1196
1197         init_timer(&adapter->watchdog_timer);
1198         adapter->watchdog_timer.function = &igb_watchdog;
1199         adapter->watchdog_timer.data = (unsigned long) adapter;
1200
1201         init_timer(&adapter->phy_info_timer);
1202         adapter->phy_info_timer.function = &igb_update_phy_info;
1203         adapter->phy_info_timer.data = (unsigned long) adapter;
1204
1205         INIT_WORK(&adapter->reset_task, igb_reset_task);
1206         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
1207
1208         /* Initialize link & ring properties that are user-changeable */
1209         adapter->tx_ring->count = 256;
1210         for (i = 0; i < adapter->num_tx_queues; i++)
1211                 adapter->tx_ring[i].count = adapter->tx_ring->count;
1212         adapter->rx_ring->count = 256;
1213         for (i = 0; i < adapter->num_rx_queues; i++)
1214                 adapter->rx_ring[i].count = adapter->rx_ring->count;
1215
1216         adapter->fc_autoneg = true;
1217         hw->mac.autoneg = true;
1218         hw->phy.autoneg_advertised = 0x2f;
1219
1220         hw->fc.original_type = e1000_fc_default;
1221         hw->fc.type = e1000_fc_default;
1222
1223         adapter->itr_setting = 3;
1224         adapter->itr = IGB_START_ITR;
1225
1226         igb_validate_mdi_setting(hw);
1227
1228         adapter->rx_csum = 1;
1229
1230         /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1231          * enable the ACPI Magic Packet filter
1232          */
1233
1234         if (hw->bus.func == 0 ||
1235             hw->device_id == E1000_DEV_ID_82575EB_COPPER)
1236                 hw->nvm.ops.read_nvm(hw, NVM_INIT_CONTROL3_PORT_A, 1,
1237                                      &eeprom_data);
1238
1239         if (eeprom_data & eeprom_apme_mask)
1240                 adapter->eeprom_wol |= E1000_WUFC_MAG;
1241
1242         /* now that we have the eeprom settings, apply the special cases where
1243          * the eeprom may be wrong or the board simply won't support wake on
1244          * lan on a particular port */
1245         switch (pdev->device) {
1246         case E1000_DEV_ID_82575GB_QUAD_COPPER:
1247                 adapter->eeprom_wol = 0;
1248                 break;
1249         case E1000_DEV_ID_82575EB_FIBER_SERDES:
1250         case E1000_DEV_ID_82576_FIBER:
1251         case E1000_DEV_ID_82576_SERDES:
1252                 /* Wake events only supported on port A for dual fiber
1253                  * regardless of eeprom setting */
1254                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
1255                         adapter->eeprom_wol = 0;
1256                 break;
1257         case E1000_DEV_ID_82576_QUAD_COPPER:
1258                 /* if quad port adapter, disable WoL on all but port A */
1259                 if (global_quad_port_a != 0)
1260                         adapter->eeprom_wol = 0;
1261                 else
1262                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
1263                 /* Reset for multiple quad port adapters */
1264                 if (++global_quad_port_a == 4)
1265                         global_quad_port_a = 0;
1266                 break;
1267         }
1268
1269         /* initialize the wol settings based on the eeprom settings */
1270         adapter->wol = adapter->eeprom_wol;
1271
1272         /* reset the hardware with the new settings */
1273         igb_reset(adapter);
1274
1275         /* let the f/w know that the h/w is now under the control of the
1276          * driver. */
1277         igb_get_hw_control(adapter);
1278
1279         /* tell the stack to leave us alone until igb_open() is called */
1280         netif_carrier_off(netdev);
1281         netif_stop_queue(netdev);
1282 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1283         for (i = 0; i < adapter->num_tx_queues; i++)
1284                 netif_stop_subqueue(netdev, i);
1285 #endif
1286
1287         strcpy(netdev->name, "eth%d");
1288         err = register_netdev(netdev);
1289         if (err)
1290                 goto err_register;
1291
1292 #ifdef CONFIG_DCA
1293         if ((adapter->flags & IGB_FLAG_HAS_DCA) &&
1294             (dca_add_requester(&pdev->dev) == 0)) {
1295                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
1296                 dev_info(&pdev->dev, "DCA enabled\n");
1297                 /* Always use CB2 mode, difference is masked
1298                  * in the CB driver. */
1299                 wr32(E1000_DCA_CTRL, 2);
1300                 igb_setup_dca(adapter);
1301         }
1302 #endif
1303
1304         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
1305         /* print bus type/speed/width info */
1306         dev_info(&pdev->dev,
1307                  "%s: (PCIe:%s:%s) %02x:%02x:%02x:%02x:%02x:%02x\n",
1308                  netdev->name,
1309                  ((hw->bus.speed == e1000_bus_speed_2500)
1310                   ? "2.5Gb/s" : "unknown"),
1311                  ((hw->bus.width == e1000_bus_width_pcie_x4)
1312                   ? "Width x4" : (hw->bus.width == e1000_bus_width_pcie_x1)
1313                   ? "Width x1" : "unknown"),
1314                  netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
1315                  netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
1316
1317         igb_read_part_num(hw, &part_num);
1318         dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name,
1319                 (part_num >> 8), (part_num & 0xff));
1320
1321         dev_info(&pdev->dev,
1322                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1323                 adapter->msix_entries ? "MSI-X" :
1324                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
1325                 adapter->num_rx_queues, adapter->num_tx_queues);
1326
1327         return 0;
1328
1329 err_register:
1330         igb_release_hw_control(adapter);
1331 err_eeprom:
1332         if (!igb_check_reset_block(hw))
1333                 hw->phy.ops.reset_phy(hw);
1334
1335         if (hw->flash_address)
1336                 iounmap(hw->flash_address);
1337
1338         igb_remove_device(hw);
1339         igb_free_queues(adapter);
1340 err_sw_init:
1341 err_hw_init:
1342         iounmap(hw->hw_addr);
1343 err_ioremap:
1344         free_netdev(netdev);
1345 err_alloc_etherdev:
1346         pci_release_selected_regions(pdev, bars);
1347 err_pci_reg:
1348 err_dma:
1349         pci_disable_device(pdev);
1350         return err;
1351 }
1352
1353 /**
1354  * igb_remove - Device Removal Routine
1355  * @pdev: PCI device information struct
1356  *
1357  * igb_remove is called by the PCI subsystem to alert the driver
1358  * that it should release a PCI device.  The could be caused by a
1359  * Hot-Plug event, or because the driver is going to be removed from
1360  * memory.
1361  **/
1362 static void __devexit igb_remove(struct pci_dev *pdev)
1363 {
1364         struct net_device *netdev = pci_get_drvdata(pdev);
1365         struct igb_adapter *adapter = netdev_priv(netdev);
1366 #ifdef CONFIG_DCA
1367         struct e1000_hw *hw = &adapter->hw;
1368 #endif
1369
1370         /* flush_scheduled work may reschedule our watchdog task, so
1371          * explicitly disable watchdog tasks from being rescheduled  */
1372         set_bit(__IGB_DOWN, &adapter->state);
1373         del_timer_sync(&adapter->watchdog_timer);
1374         del_timer_sync(&adapter->phy_info_timer);
1375
1376         flush_scheduled_work();
1377
1378 #ifdef CONFIG_DCA
1379         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
1380                 dev_info(&pdev->dev, "DCA disabled\n");
1381                 dca_remove_requester(&pdev->dev);
1382                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
1383                 wr32(E1000_DCA_CTRL, 1);
1384         }
1385 #endif
1386
1387         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
1388          * would have already happened in close and is redundant. */
1389         igb_release_hw_control(adapter);
1390
1391         unregister_netdev(netdev);
1392
1393         if (!igb_check_reset_block(&adapter->hw))
1394                 adapter->hw.phy.ops.reset_phy(&adapter->hw);
1395
1396         igb_remove_device(&adapter->hw);
1397         igb_reset_interrupt_capability(adapter);
1398
1399         igb_free_queues(adapter);
1400
1401         iounmap(adapter->hw.hw_addr);
1402         if (adapter->hw.flash_address)
1403                 iounmap(adapter->hw.flash_address);
1404         pci_release_selected_regions(pdev, adapter->bars);
1405
1406         free_netdev(netdev);
1407
1408         pci_disable_device(pdev);
1409 }
1410
1411 /**
1412  * igb_sw_init - Initialize general software structures (struct igb_adapter)
1413  * @adapter: board private structure to initialize
1414  *
1415  * igb_sw_init initializes the Adapter private data structure.
1416  * Fields are initialized based on PCI device information and
1417  * OS network device settings (MTU size).
1418  **/
1419 static int __devinit igb_sw_init(struct igb_adapter *adapter)
1420 {
1421         struct e1000_hw *hw = &adapter->hw;
1422         struct net_device *netdev = adapter->netdev;
1423         struct pci_dev *pdev = adapter->pdev;
1424
1425         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
1426
1427         adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1428         adapter->rx_ps_hdr_size = 0; /* disable packet split */
1429         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1430         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
1431
1432         /* Number of supported queues. */
1433         /* Having more queues than CPUs doesn't make sense. */
1434         adapter->num_rx_queues = min((u32)IGB_MAX_RX_QUEUES, (u32)num_online_cpus());
1435 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1436         adapter->num_tx_queues = min(IGB_MAX_TX_QUEUES, num_online_cpus());
1437 #else
1438         adapter->num_tx_queues = 1;
1439 #endif /* CONFIG_NET_MULTI_QUEUE_DEVICE */
1440
1441         /* This call may decrease the number of queues depending on
1442          * interrupt mode. */
1443         igb_set_interrupt_capability(adapter);
1444
1445         if (igb_alloc_queues(adapter)) {
1446                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1447                 return -ENOMEM;
1448         }
1449
1450         /* Explicitly disable IRQ since the NIC can be in any state. */
1451         igb_irq_disable(adapter);
1452
1453         set_bit(__IGB_DOWN, &adapter->state);
1454         return 0;
1455 }
1456
1457 /**
1458  * igb_open - Called when a network interface is made active
1459  * @netdev: network interface device structure
1460  *
1461  * Returns 0 on success, negative value on failure
1462  *
1463  * The open entry point is called when a network interface is made
1464  * active by the system (IFF_UP).  At this point all resources needed
1465  * for transmit and receive operations are allocated, the interrupt
1466  * handler is registered with the OS, the watchdog timer is started,
1467  * and the stack is notified that the interface is ready.
1468  **/
1469 static int igb_open(struct net_device *netdev)
1470 {
1471         struct igb_adapter *adapter = netdev_priv(netdev);
1472         struct e1000_hw *hw = &adapter->hw;
1473         int err;
1474         int i;
1475
1476         /* disallow open during test */
1477         if (test_bit(__IGB_TESTING, &adapter->state))
1478                 return -EBUSY;
1479
1480         /* allocate transmit descriptors */
1481         err = igb_setup_all_tx_resources(adapter);
1482         if (err)
1483                 goto err_setup_tx;
1484
1485         /* allocate receive descriptors */
1486         err = igb_setup_all_rx_resources(adapter);
1487         if (err)
1488                 goto err_setup_rx;
1489
1490         /* e1000_power_up_phy(adapter); */
1491
1492         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1493         if ((adapter->hw.mng_cookie.status &
1494              E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
1495                 igb_update_mng_vlan(adapter);
1496
1497         /* before we allocate an interrupt, we must be ready to handle it.
1498          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1499          * as soon as we call pci_request_irq, so we have to setup our
1500          * clean_rx handler before we do so.  */
1501         igb_configure(adapter);
1502
1503         err = igb_request_irq(adapter);
1504         if (err)
1505                 goto err_req_irq;
1506
1507         /* From here on the code is the same as igb_up() */
1508         clear_bit(__IGB_DOWN, &adapter->state);
1509
1510         for (i = 0; i < adapter->num_rx_queues; i++)
1511                 napi_enable(&adapter->rx_ring[i].napi);
1512
1513         /* Clear any pending interrupts. */
1514         rd32(E1000_ICR);
1515
1516         igb_irq_enable(adapter);
1517
1518         /* Fire a link status change interrupt to start the watchdog. */
1519         wr32(E1000_ICS, E1000_ICS_LSC);
1520
1521         return 0;
1522
1523 err_req_irq:
1524         igb_release_hw_control(adapter);
1525         /* e1000_power_down_phy(adapter); */
1526         igb_free_all_rx_resources(adapter);
1527 err_setup_rx:
1528         igb_free_all_tx_resources(adapter);
1529 err_setup_tx:
1530         igb_reset(adapter);
1531
1532         return err;
1533 }
1534
1535 /**
1536  * igb_close - Disables a network interface
1537  * @netdev: network interface device structure
1538  *
1539  * Returns 0, this is not allowed to fail
1540  *
1541  * The close entry point is called when an interface is de-activated
1542  * by the OS.  The hardware is still under the driver's control, but
1543  * needs to be disabled.  A global MAC reset is issued to stop the
1544  * hardware, and all transmit and receive resources are freed.
1545  **/
1546 static int igb_close(struct net_device *netdev)
1547 {
1548         struct igb_adapter *adapter = netdev_priv(netdev);
1549
1550         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
1551         igb_down(adapter);
1552
1553         igb_free_irq(adapter);
1554
1555         igb_free_all_tx_resources(adapter);
1556         igb_free_all_rx_resources(adapter);
1557
1558         /* kill manageability vlan ID if supported, but not if a vlan with
1559          * the same ID is registered on the host OS (let 8021q kill it) */
1560         if ((adapter->hw.mng_cookie.status &
1561                           E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1562              !(adapter->vlgrp &&
1563                vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
1564                 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1565
1566         return 0;
1567 }
1568
1569 /**
1570  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1571  * @adapter: board private structure
1572  * @tx_ring: tx descriptor ring (for a specific queue) to setup
1573  *
1574  * Return 0 on success, negative on failure
1575  **/
1576
1577 int igb_setup_tx_resources(struct igb_adapter *adapter,
1578                            struct igb_ring *tx_ring)
1579 {
1580         struct pci_dev *pdev = adapter->pdev;
1581         int size;
1582
1583         size = sizeof(struct igb_buffer) * tx_ring->count;
1584         tx_ring->buffer_info = vmalloc(size);
1585         if (!tx_ring->buffer_info)
1586                 goto err;
1587         memset(tx_ring->buffer_info, 0, size);
1588
1589         /* round up to nearest 4K */
1590         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc)
1591                         + sizeof(u32);
1592         tx_ring->size = ALIGN(tx_ring->size, 4096);
1593
1594         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
1595                                              &tx_ring->dma);
1596
1597         if (!tx_ring->desc)
1598                 goto err;
1599
1600         tx_ring->adapter = adapter;
1601         tx_ring->next_to_use = 0;
1602         tx_ring->next_to_clean = 0;
1603         return 0;
1604
1605 err:
1606         vfree(tx_ring->buffer_info);
1607         dev_err(&adapter->pdev->dev,
1608                 "Unable to allocate memory for the transmit descriptor ring\n");
1609         return -ENOMEM;
1610 }
1611
1612 /**
1613  * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1614  *                                (Descriptors) for all queues
1615  * @adapter: board private structure
1616  *
1617  * Return 0 on success, negative on failure
1618  **/
1619 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
1620 {
1621         int i, err = 0;
1622 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1623         int r_idx;
1624 #endif
1625
1626         for (i = 0; i < adapter->num_tx_queues; i++) {
1627                 err = igb_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1628                 if (err) {
1629                         dev_err(&adapter->pdev->dev,
1630                                 "Allocation for Tx Queue %u failed\n", i);
1631                         for (i--; i >= 0; i--)
1632                                 igb_free_tx_resources(&adapter->tx_ring[i]);
1633                         break;
1634                 }
1635         }
1636
1637 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1638         for (i = 0; i < IGB_MAX_TX_QUEUES; i++) {
1639                 r_idx = i % adapter->num_tx_queues;
1640                 adapter->multi_tx_table[i] = &adapter->tx_ring[r_idx];
1641         }
1642 #endif
1643         return err;
1644 }
1645
1646 /**
1647  * igb_configure_tx - Configure transmit Unit after Reset
1648  * @adapter: board private structure
1649  *
1650  * Configure the Tx unit of the MAC after a reset.
1651  **/
1652 static void igb_configure_tx(struct igb_adapter *adapter)
1653 {
1654         u64 tdba, tdwba;
1655         struct e1000_hw *hw = &adapter->hw;
1656         u32 tctl;
1657         u32 txdctl, txctrl;
1658         int i;
1659
1660         for (i = 0; i < adapter->num_tx_queues; i++) {
1661                 struct igb_ring *ring = &(adapter->tx_ring[i]);
1662
1663                 wr32(E1000_TDLEN(i),
1664                                 ring->count * sizeof(struct e1000_tx_desc));
1665                 tdba = ring->dma;
1666                 wr32(E1000_TDBAL(i),
1667                                 tdba & 0x00000000ffffffffULL);
1668                 wr32(E1000_TDBAH(i), tdba >> 32);
1669
1670                 tdwba = ring->dma + ring->count * sizeof(struct e1000_tx_desc);
1671                 tdwba |= 1; /* enable head wb */
1672                 wr32(E1000_TDWBAL(i),
1673                                 tdwba & 0x00000000ffffffffULL);
1674                 wr32(E1000_TDWBAH(i), tdwba >> 32);
1675
1676                 ring->head = E1000_TDH(i);
1677                 ring->tail = E1000_TDT(i);
1678                 writel(0, hw->hw_addr + ring->tail);
1679                 writel(0, hw->hw_addr + ring->head);
1680                 txdctl = rd32(E1000_TXDCTL(i));
1681                 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
1682                 wr32(E1000_TXDCTL(i), txdctl);
1683
1684                 /* Turn off Relaxed Ordering on head write-backs.  The
1685                  * writebacks MUST be delivered in order or it will
1686                  * completely screw up our bookeeping.
1687                  */
1688                 txctrl = rd32(E1000_DCA_TXCTRL(i));
1689                 txctrl &= ~E1000_DCA_TXCTRL_TX_WB_RO_EN;
1690                 wr32(E1000_DCA_TXCTRL(i), txctrl);
1691         }
1692
1693
1694
1695         /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1696
1697         /* Program the Transmit Control Register */
1698
1699         tctl = rd32(E1000_TCTL);
1700         tctl &= ~E1000_TCTL_CT;
1701         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1702                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1703
1704         igb_config_collision_dist(hw);
1705
1706         /* Setup Transmit Descriptor Settings for eop descriptor */
1707         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS;
1708
1709         /* Enable transmits */
1710         tctl |= E1000_TCTL_EN;
1711
1712         wr32(E1000_TCTL, tctl);
1713 }
1714
1715 /**
1716  * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1717  * @adapter: board private structure
1718  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
1719  *
1720  * Returns 0 on success, negative on failure
1721  **/
1722
1723 int igb_setup_rx_resources(struct igb_adapter *adapter,
1724                            struct igb_ring *rx_ring)
1725 {
1726         struct pci_dev *pdev = adapter->pdev;
1727         int size, desc_len;
1728
1729 #ifdef CONFIG_IGB_LRO
1730         size = sizeof(struct net_lro_desc) * MAX_LRO_DESCRIPTORS;
1731         rx_ring->lro_mgr.lro_arr = vmalloc(size);
1732         if (!rx_ring->lro_mgr.lro_arr)
1733                 goto err;
1734         memset(rx_ring->lro_mgr.lro_arr, 0, size);
1735 #endif
1736
1737         size = sizeof(struct igb_buffer) * rx_ring->count;
1738         rx_ring->buffer_info = vmalloc(size);
1739         if (!rx_ring->buffer_info)
1740                 goto err;
1741         memset(rx_ring->buffer_info, 0, size);
1742
1743         desc_len = sizeof(union e1000_adv_rx_desc);
1744
1745         /* Round up to nearest 4K */
1746         rx_ring->size = rx_ring->count * desc_len;
1747         rx_ring->size = ALIGN(rx_ring->size, 4096);
1748
1749         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
1750                                              &rx_ring->dma);
1751
1752         if (!rx_ring->desc)
1753                 goto err;
1754
1755         rx_ring->next_to_clean = 0;
1756         rx_ring->next_to_use = 0;
1757
1758         rx_ring->adapter = adapter;
1759
1760         return 0;
1761
1762 err:
1763 #ifdef CONFIG_IGB_LRO
1764         vfree(rx_ring->lro_mgr.lro_arr);
1765         rx_ring->lro_mgr.lro_arr = NULL;
1766 #endif
1767         vfree(rx_ring->buffer_info);
1768         dev_err(&adapter->pdev->dev, "Unable to allocate memory for "
1769                 "the receive descriptor ring\n");
1770         return -ENOMEM;
1771 }
1772
1773 /**
1774  * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1775  *                                (Descriptors) for all queues
1776  * @adapter: board private structure
1777  *
1778  * Return 0 on success, negative on failure
1779  **/
1780 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
1781 {
1782         int i, err = 0;
1783
1784         for (i = 0; i < adapter->num_rx_queues; i++) {
1785                 err = igb_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1786                 if (err) {
1787                         dev_err(&adapter->pdev->dev,
1788                                 "Allocation for Rx Queue %u failed\n", i);
1789                         for (i--; i >= 0; i--)
1790                                 igb_free_rx_resources(&adapter->rx_ring[i]);
1791                         break;
1792                 }
1793         }
1794
1795         return err;
1796 }
1797
1798 /**
1799  * igb_setup_rctl - configure the receive control registers
1800  * @adapter: Board private structure
1801  **/
1802 static void igb_setup_rctl(struct igb_adapter *adapter)
1803 {
1804         struct e1000_hw *hw = &adapter->hw;
1805         u32 rctl;
1806         u32 srrctl = 0;
1807         int i;
1808
1809         rctl = rd32(E1000_RCTL);
1810
1811         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1812
1813         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1814                 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1815                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1816
1817         /*
1818          * enable stripping of CRC. It's unlikely this will break BMC
1819          * redirection as it did with e1000. Newer features require
1820          * that the HW strips the CRC.
1821         */
1822         rctl |= E1000_RCTL_SECRC;
1823
1824         rctl &= ~E1000_RCTL_SBP;
1825
1826         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1827                 rctl &= ~E1000_RCTL_LPE;
1828         else
1829                 rctl |= E1000_RCTL_LPE;
1830         if (adapter->rx_buffer_len <= IGB_RXBUFFER_2048) {
1831                 /* Setup buffer sizes */
1832                 rctl &= ~E1000_RCTL_SZ_4096;
1833                 rctl |= E1000_RCTL_BSEX;
1834                 switch (adapter->rx_buffer_len) {
1835                 case IGB_RXBUFFER_256:
1836                         rctl |= E1000_RCTL_SZ_256;
1837                         rctl &= ~E1000_RCTL_BSEX;
1838                         break;
1839                 case IGB_RXBUFFER_512:
1840                         rctl |= E1000_RCTL_SZ_512;
1841                         rctl &= ~E1000_RCTL_BSEX;
1842                         break;
1843                 case IGB_RXBUFFER_1024:
1844                         rctl |= E1000_RCTL_SZ_1024;
1845                         rctl &= ~E1000_RCTL_BSEX;
1846                         break;
1847                 case IGB_RXBUFFER_2048:
1848                 default:
1849                         rctl |= E1000_RCTL_SZ_2048;
1850                         rctl &= ~E1000_RCTL_BSEX;
1851                         break;
1852                 }
1853         } else {
1854                 rctl &= ~E1000_RCTL_BSEX;
1855                 srrctl = adapter->rx_buffer_len >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1856         }
1857
1858         /* 82575 and greater support packet-split where the protocol
1859          * header is placed in skb->data and the packet data is
1860          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1861          * In the case of a non-split, skb->data is linearly filled,
1862          * followed by the page buffers.  Therefore, skb->data is
1863          * sized to hold the largest protocol header.
1864          */
1865         /* allocations using alloc_page take too long for regular MTU
1866          * so only enable packet split for jumbo frames */
1867         if (rctl & E1000_RCTL_LPE) {
1868                 adapter->rx_ps_hdr_size = IGB_RXBUFFER_128;
1869                 srrctl |= adapter->rx_ps_hdr_size <<
1870                          E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
1871                 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1872         } else {
1873                 adapter->rx_ps_hdr_size = 0;
1874                 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
1875         }
1876
1877         for (i = 0; i < adapter->num_rx_queues; i++)
1878                 wr32(E1000_SRRCTL(i), srrctl);
1879
1880         wr32(E1000_RCTL, rctl);
1881 }
1882
1883 /**
1884  * igb_configure_rx - Configure receive Unit after Reset
1885  * @adapter: board private structure
1886  *
1887  * Configure the Rx unit of the MAC after a reset.
1888  **/
1889 static void igb_configure_rx(struct igb_adapter *adapter)
1890 {
1891         u64 rdba;
1892         struct e1000_hw *hw = &adapter->hw;
1893         u32 rctl, rxcsum;
1894         u32 rxdctl;
1895         int i;
1896
1897         /* disable receives while setting up the descriptors */
1898         rctl = rd32(E1000_RCTL);
1899         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1900         wrfl();
1901         mdelay(10);
1902
1903         if (adapter->itr_setting > 3)
1904                 wr32(E1000_ITR, adapter->itr);
1905
1906         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1907          * the Base and Length of the Rx Descriptor Ring */
1908         for (i = 0; i < adapter->num_rx_queues; i++) {
1909                 struct igb_ring *ring = &(adapter->rx_ring[i]);
1910                 rdba = ring->dma;
1911                 wr32(E1000_RDBAL(i),
1912                                 rdba & 0x00000000ffffffffULL);
1913                 wr32(E1000_RDBAH(i), rdba >> 32);
1914                 wr32(E1000_RDLEN(i),
1915                                ring->count * sizeof(union e1000_adv_rx_desc));
1916
1917                 ring->head = E1000_RDH(i);
1918                 ring->tail = E1000_RDT(i);
1919                 writel(0, hw->hw_addr + ring->tail);
1920                 writel(0, hw->hw_addr + ring->head);
1921
1922                 rxdctl = rd32(E1000_RXDCTL(i));
1923                 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
1924                 rxdctl &= 0xFFF00000;
1925                 rxdctl |= IGB_RX_PTHRESH;
1926                 rxdctl |= IGB_RX_HTHRESH << 8;
1927                 rxdctl |= IGB_RX_WTHRESH << 16;
1928                 wr32(E1000_RXDCTL(i), rxdctl);
1929 #ifdef CONFIG_IGB_LRO
1930                 /* Intitial LRO Settings */
1931                 ring->lro_mgr.max_aggr = MAX_LRO_AGGR;
1932                 ring->lro_mgr.max_desc = MAX_LRO_DESCRIPTORS;
1933                 ring->lro_mgr.get_skb_header = igb_get_skb_hdr;
1934                 ring->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
1935                 ring->lro_mgr.dev = adapter->netdev;
1936                 ring->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1937                 ring->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1938 #endif
1939         }
1940
1941         if (adapter->num_rx_queues > 1) {
1942                 u32 random[10];
1943                 u32 mrqc;
1944                 u32 j, shift;
1945                 union e1000_reta {
1946                         u32 dword;
1947                         u8  bytes[4];
1948                 } reta;
1949
1950                 get_random_bytes(&random[0], 40);
1951
1952                 if (hw->mac.type >= e1000_82576)
1953                         shift = 0;
1954                 else
1955                         shift = 6;
1956                 for (j = 0; j < (32 * 4); j++) {
1957                         reta.bytes[j & 3] =
1958                                 (j % adapter->num_rx_queues) << shift;
1959                         if ((j & 3) == 3)
1960                                 writel(reta.dword,
1961                                        hw->hw_addr + E1000_RETA(0) + (j & ~3));
1962                 }
1963                 mrqc = E1000_MRQC_ENABLE_RSS_4Q;
1964
1965                 /* Fill out hash function seeds */
1966                 for (j = 0; j < 10; j++)
1967                         array_wr32(E1000_RSSRK(0), j, random[j]);
1968
1969                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1970                          E1000_MRQC_RSS_FIELD_IPV4_TCP);
1971                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 |
1972                          E1000_MRQC_RSS_FIELD_IPV6_TCP);
1973                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP |
1974                          E1000_MRQC_RSS_FIELD_IPV6_UDP);
1975                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
1976                          E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
1977
1978
1979                 wr32(E1000_MRQC, mrqc);
1980
1981                 /* Multiqueue and raw packet checksumming are mutually
1982                  * exclusive.  Note that this not the same as TCP/IP
1983                  * checksumming, which works fine. */
1984                 rxcsum = rd32(E1000_RXCSUM);
1985                 rxcsum |= E1000_RXCSUM_PCSD;
1986                 wr32(E1000_RXCSUM, rxcsum);
1987         } else {
1988                 /* Enable Receive Checksum Offload for TCP and UDP */
1989                 rxcsum = rd32(E1000_RXCSUM);
1990                 if (adapter->rx_csum) {
1991                         rxcsum |= E1000_RXCSUM_TUOFL;
1992
1993                         /* Enable IPv4 payload checksum for UDP fragments
1994                          * Must be used in conjunction with packet-split. */
1995                         if (adapter->rx_ps_hdr_size)
1996                                 rxcsum |= E1000_RXCSUM_IPPCSE;
1997                 } else {
1998                         rxcsum &= ~E1000_RXCSUM_TUOFL;
1999                         /* don't need to clear IPPCSE as it defaults to 0 */
2000                 }
2001                 wr32(E1000_RXCSUM, rxcsum);
2002         }
2003
2004         if (adapter->vlgrp)
2005                 wr32(E1000_RLPML,
2006                                 adapter->max_frame_size + VLAN_TAG_SIZE);
2007         else
2008                 wr32(E1000_RLPML, adapter->max_frame_size);
2009
2010         /* Enable Receives */
2011         wr32(E1000_RCTL, rctl);
2012 }
2013
2014 /**
2015  * igb_free_tx_resources - Free Tx Resources per Queue
2016  * @adapter: board private structure
2017  * @tx_ring: Tx descriptor ring for a specific queue
2018  *
2019  * Free all transmit software resources
2020  **/
2021 static void igb_free_tx_resources(struct igb_ring *tx_ring)
2022 {
2023         struct pci_dev *pdev = tx_ring->adapter->pdev;
2024
2025         igb_clean_tx_ring(tx_ring);
2026
2027         vfree(tx_ring->buffer_info);
2028         tx_ring->buffer_info = NULL;
2029
2030         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2031
2032         tx_ring->desc = NULL;
2033 }
2034
2035 /**
2036  * igb_free_all_tx_resources - Free Tx Resources for All Queues
2037  * @adapter: board private structure
2038  *
2039  * Free all transmit software resources
2040  **/
2041 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
2042 {
2043         int i;
2044
2045         for (i = 0; i < adapter->num_tx_queues; i++)
2046                 igb_free_tx_resources(&adapter->tx_ring[i]);
2047 }
2048
2049 static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter,
2050                                            struct igb_buffer *buffer_info)
2051 {
2052         if (buffer_info->dma) {
2053                 pci_unmap_page(adapter->pdev,
2054                                 buffer_info->dma,
2055                                 buffer_info->length,
2056                                 PCI_DMA_TODEVICE);
2057                 buffer_info->dma = 0;
2058         }
2059         if (buffer_info->skb) {
2060                 dev_kfree_skb_any(buffer_info->skb);
2061                 buffer_info->skb = NULL;
2062         }
2063         buffer_info->time_stamp = 0;
2064         /* buffer_info must be completely set up in the transmit path */
2065 }
2066
2067 /**
2068  * igb_clean_tx_ring - Free Tx Buffers
2069  * @adapter: board private structure
2070  * @tx_ring: ring to be cleaned
2071  **/
2072 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
2073 {
2074         struct igb_adapter *adapter = tx_ring->adapter;
2075         struct igb_buffer *buffer_info;
2076         unsigned long size;
2077         unsigned int i;
2078
2079         if (!tx_ring->buffer_info)
2080                 return;
2081         /* Free all the Tx ring sk_buffs */
2082
2083         for (i = 0; i < tx_ring->count; i++) {
2084                 buffer_info = &tx_ring->buffer_info[i];
2085                 igb_unmap_and_free_tx_resource(adapter, buffer_info);
2086         }
2087
2088         size = sizeof(struct igb_buffer) * tx_ring->count;
2089         memset(tx_ring->buffer_info, 0, size);
2090
2091         /* Zero out the descriptor ring */
2092
2093         memset(tx_ring->desc, 0, tx_ring->size);
2094
2095         tx_ring->next_to_use = 0;
2096         tx_ring->next_to_clean = 0;
2097
2098         writel(0, adapter->hw.hw_addr + tx_ring->head);
2099         writel(0, adapter->hw.hw_addr + tx_ring->tail);
2100 }
2101
2102 /**
2103  * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2104  * @adapter: board private structure
2105  **/
2106 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
2107 {
2108         int i;
2109
2110         for (i = 0; i < adapter->num_tx_queues; i++)
2111                 igb_clean_tx_ring(&adapter->tx_ring[i]);
2112 }
2113
2114 /**
2115  * igb_free_rx_resources - Free Rx Resources
2116  * @adapter: board private structure
2117  * @rx_ring: ring to clean the resources from
2118  *
2119  * Free all receive software resources
2120  **/
2121 static void igb_free_rx_resources(struct igb_ring *rx_ring)
2122 {
2123         struct pci_dev *pdev = rx_ring->adapter->pdev;
2124
2125         igb_clean_rx_ring(rx_ring);
2126
2127         vfree(rx_ring->buffer_info);
2128         rx_ring->buffer_info = NULL;
2129
2130 #ifdef CONFIG_IGB_LRO
2131         vfree(rx_ring->lro_mgr.lro_arr);
2132         rx_ring->lro_mgr.lro_arr = NULL;
2133 #endif
2134
2135         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2136
2137         rx_ring->desc = NULL;
2138 }
2139
2140 /**
2141  * igb_free_all_rx_resources - Free Rx Resources for All Queues
2142  * @adapter: board private structure
2143  *
2144  * Free all receive software resources
2145  **/
2146 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
2147 {
2148         int i;
2149
2150         for (i = 0; i < adapter->num_rx_queues; i++)
2151                 igb_free_rx_resources(&adapter->rx_ring[i]);
2152 }
2153
2154 /**
2155  * igb_clean_rx_ring - Free Rx Buffers per Queue
2156  * @adapter: board private structure
2157  * @rx_ring: ring to free buffers from
2158  **/
2159 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
2160 {
2161         struct igb_adapter *adapter = rx_ring->adapter;
2162         struct igb_buffer *buffer_info;
2163         struct pci_dev *pdev = adapter->pdev;
2164         unsigned long size;
2165         unsigned int i;
2166
2167         if (!rx_ring->buffer_info)
2168                 return;
2169         /* Free all the Rx ring sk_buffs */
2170         for (i = 0; i < rx_ring->count; i++) {
2171                 buffer_info = &rx_ring->buffer_info[i];
2172                 if (buffer_info->dma) {
2173                         if (adapter->rx_ps_hdr_size)
2174                                 pci_unmap_single(pdev, buffer_info->dma,
2175                                                  adapter->rx_ps_hdr_size,
2176                                                  PCI_DMA_FROMDEVICE);
2177                         else
2178                                 pci_unmap_single(pdev, buffer_info->dma,
2179                                                  adapter->rx_buffer_len,
2180                                                  PCI_DMA_FROMDEVICE);
2181                         buffer_info->dma = 0;
2182                 }
2183
2184                 if (buffer_info->skb) {
2185                         dev_kfree_skb(buffer_info->skb);
2186                         buffer_info->skb = NULL;
2187                 }
2188                 if (buffer_info->page) {
2189                         if (buffer_info->page_dma)
2190                                 pci_unmap_page(pdev, buffer_info->page_dma,
2191                                                PAGE_SIZE / 2,
2192                                                PCI_DMA_FROMDEVICE);
2193                         put_page(buffer_info->page);
2194                         buffer_info->page = NULL;
2195                         buffer_info->page_dma = 0;
2196                         buffer_info->page_offset = 0;
2197                 }
2198         }
2199
2200         size = sizeof(struct igb_buffer) * rx_ring->count;
2201         memset(rx_ring->buffer_info, 0, size);
2202
2203         /* Zero out the descriptor ring */
2204         memset(rx_ring->desc, 0, rx_ring->size);
2205
2206         rx_ring->next_to_clean = 0;
2207         rx_ring->next_to_use = 0;
2208
2209         writel(0, adapter->hw.hw_addr + rx_ring->head);
2210         writel(0, adapter->hw.hw_addr + rx_ring->tail);
2211 }
2212
2213 /**
2214  * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2215  * @adapter: board private structure
2216  **/
2217 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
2218 {
2219         int i;
2220
2221         for (i = 0; i < adapter->num_rx_queues; i++)
2222                 igb_clean_rx_ring(&adapter->rx_ring[i]);
2223 }
2224
2225 /**
2226  * igb_set_mac - Change the Ethernet Address of the NIC
2227  * @netdev: network interface device structure
2228  * @p: pointer to an address structure
2229  *
2230  * Returns 0 on success, negative on failure
2231  **/
2232 static int igb_set_mac(struct net_device *netdev, void *p)
2233 {
2234         struct igb_adapter *adapter = netdev_priv(netdev);
2235         struct sockaddr *addr = p;
2236
2237         if (!is_valid_ether_addr(addr->sa_data))
2238                 return -EADDRNOTAVAIL;
2239
2240         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2241         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2242
2243         adapter->hw.mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2244
2245         return 0;
2246 }
2247
2248 /**
2249  * igb_set_multi - Multicast and Promiscuous mode set
2250  * @netdev: network interface device structure
2251  *
2252  * The set_multi entry point is called whenever the multicast address
2253  * list or the network interface flags are updated.  This routine is
2254  * responsible for configuring the hardware for proper multicast,
2255  * promiscuous mode, and all-multi behavior.
2256  **/
2257 static void igb_set_multi(struct net_device *netdev)
2258 {
2259         struct igb_adapter *adapter = netdev_priv(netdev);
2260         struct e1000_hw *hw = &adapter->hw;
2261         struct e1000_mac_info *mac = &hw->mac;
2262         struct dev_mc_list *mc_ptr;
2263         u8  *mta_list;
2264         u32 rctl;
2265         int i;
2266
2267         /* Check for Promiscuous and All Multicast modes */
2268
2269         rctl = rd32(E1000_RCTL);
2270
2271         if (netdev->flags & IFF_PROMISC)
2272                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2273         else if (netdev->flags & IFF_ALLMULTI) {
2274                 rctl |= E1000_RCTL_MPE;
2275                 rctl &= ~E1000_RCTL_UPE;
2276         } else
2277                 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2278
2279         wr32(E1000_RCTL, rctl);
2280
2281         if (!netdev->mc_count) {
2282                 /* nothing to program, so clear mc list */
2283                 igb_update_mc_addr_list_82575(hw, NULL, 0, 1,
2284                                           mac->rar_entry_count);
2285                 return;
2286         }
2287
2288         mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC);
2289         if (!mta_list)
2290                 return;
2291
2292         /* The shared function expects a packed array of only addresses. */
2293         mc_ptr = netdev->mc_list;
2294
2295         for (i = 0; i < netdev->mc_count; i++) {
2296                 if (!mc_ptr)
2297                         break;
2298                 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN);
2299                 mc_ptr = mc_ptr->next;
2300         }
2301         igb_update_mc_addr_list_82575(hw, mta_list, i, 1,
2302                                       mac->rar_entry_count);
2303         kfree(mta_list);
2304 }
2305
2306 /* Need to wait a few seconds after link up to get diagnostic information from
2307  * the phy */
2308 static void igb_update_phy_info(unsigned long data)
2309 {
2310         struct igb_adapter *adapter = (struct igb_adapter *) data;
2311         if (adapter->hw.phy.ops.get_phy_info)
2312                 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
2313 }
2314
2315 /**
2316  * igb_watchdog - Timer Call-back
2317  * @data: pointer to adapter cast into an unsigned long
2318  **/
2319 static void igb_watchdog(unsigned long data)
2320 {
2321         struct igb_adapter *adapter = (struct igb_adapter *)data;
2322         /* Do the rest outside of interrupt context */
2323         schedule_work(&adapter->watchdog_task);
2324 }
2325
2326 static void igb_watchdog_task(struct work_struct *work)
2327 {
2328         struct igb_adapter *adapter = container_of(work,
2329                                         struct igb_adapter, watchdog_task);
2330         struct e1000_hw *hw = &adapter->hw;
2331
2332         struct net_device *netdev = adapter->netdev;
2333         struct igb_ring *tx_ring = adapter->tx_ring;
2334         struct e1000_mac_info *mac = &adapter->hw.mac;
2335         u32 link;
2336         s32 ret_val;
2337 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2338         int i;
2339 #endif
2340
2341         if ((netif_carrier_ok(netdev)) &&
2342             (rd32(E1000_STATUS) & E1000_STATUS_LU))
2343                 goto link_up;
2344
2345         ret_val = hw->mac.ops.check_for_link(&adapter->hw);
2346         if ((ret_val == E1000_ERR_PHY) &&
2347             (hw->phy.type == e1000_phy_igp_3) &&
2348             (rd32(E1000_CTRL) &
2349              E1000_PHY_CTRL_GBE_DISABLE))
2350                 dev_info(&adapter->pdev->dev,
2351                          "Gigabit has been disabled, downgrading speed\n");
2352
2353         if ((hw->phy.media_type == e1000_media_type_internal_serdes) &&
2354             !(rd32(E1000_TXCW) & E1000_TXCW_ANE))
2355                 link = mac->serdes_has_link;
2356         else
2357                 link = rd32(E1000_STATUS) &
2358                                       E1000_STATUS_LU;
2359
2360         if (link) {
2361                 if (!netif_carrier_ok(netdev)) {
2362                         u32 ctrl;
2363                         hw->mac.ops.get_speed_and_duplex(&adapter->hw,
2364                                                    &adapter->link_speed,
2365                                                    &adapter->link_duplex);
2366
2367                         ctrl = rd32(E1000_CTRL);
2368                         dev_info(&adapter->pdev->dev,
2369                                  "NIC Link is Up %d Mbps %s, "
2370                                  "Flow Control: %s\n",
2371                                  adapter->link_speed,
2372                                  adapter->link_duplex == FULL_DUPLEX ?
2373                                  "Full Duplex" : "Half Duplex",
2374                                  ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2375                                  E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2376                                  E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2377                                  E1000_CTRL_TFCE) ? "TX" : "None")));
2378
2379                         /* tweak tx_queue_len according to speed/duplex and
2380                          * adjust the timeout factor */
2381                         netdev->tx_queue_len = adapter->tx_queue_len;
2382                         adapter->tx_timeout_factor = 1;
2383                         switch (adapter->link_speed) {
2384                         case SPEED_10:
2385                                 netdev->tx_queue_len = 10;
2386                                 adapter->tx_timeout_factor = 14;
2387                                 break;
2388                         case SPEED_100:
2389                                 netdev->tx_queue_len = 100;
2390                                 /* maybe add some timeout factor ? */
2391                                 break;
2392                         }
2393
2394                         netif_carrier_on(netdev);
2395                         netif_wake_queue(netdev);
2396 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2397                         for (i = 0; i < adapter->num_tx_queues; i++)
2398                                 netif_wake_subqueue(netdev, i);
2399 #endif
2400
2401                         if (!test_bit(__IGB_DOWN, &adapter->state))
2402                                 mod_timer(&adapter->phy_info_timer,
2403                                           round_jiffies(jiffies + 2 * HZ));
2404                 }
2405         } else {
2406                 if (netif_carrier_ok(netdev)) {
2407                         adapter->link_speed = 0;
2408                         adapter->link_duplex = 0;
2409                         dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2410                         netif_carrier_off(netdev);
2411                         netif_stop_queue(netdev);
2412 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2413                         for (i = 0; i < adapter->num_tx_queues; i++)
2414                                 netif_stop_subqueue(netdev, i);
2415 #endif
2416                         if (!test_bit(__IGB_DOWN, &adapter->state))
2417                                 mod_timer(&adapter->phy_info_timer,
2418                                           round_jiffies(jiffies + 2 * HZ));
2419                 }
2420         }
2421
2422 link_up:
2423         igb_update_stats(adapter);
2424
2425         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2426         adapter->tpt_old = adapter->stats.tpt;
2427         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
2428         adapter->colc_old = adapter->stats.colc;
2429
2430         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
2431         adapter->gorc_old = adapter->stats.gorc;
2432         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
2433         adapter->gotc_old = adapter->stats.gotc;
2434
2435         igb_update_adaptive(&adapter->hw);
2436
2437         if (!netif_carrier_ok(netdev)) {
2438                 if (IGB_DESC_UNUSED(tx_ring) + 1 < tx_ring->count) {
2439                         /* We've lost link, so the controller stops DMA,
2440                          * but we've got queued Tx work that's never going
2441                          * to get done, so reset controller to flush Tx.
2442                          * (Do the reset outside of interrupt context). */
2443                         adapter->tx_timeout_count++;
2444                         schedule_work(&adapter->reset_task);
2445                 }
2446         }
2447
2448         /* Cause software interrupt to ensure rx ring is cleaned */
2449         wr32(E1000_ICS, E1000_ICS_RXDMT0);
2450
2451         /* Force detection of hung controller every watchdog period */
2452         tx_ring->detect_tx_hung = true;
2453
2454         /* Reset the timer */
2455         if (!test_bit(__IGB_DOWN, &adapter->state))
2456                 mod_timer(&adapter->watchdog_timer,
2457                           round_jiffies(jiffies + 2 * HZ));
2458 }
2459
2460 enum latency_range {
2461         lowest_latency = 0,
2462         low_latency = 1,
2463         bulk_latency = 2,
2464         latency_invalid = 255
2465 };
2466
2467
2468 /**
2469  * igb_update_ring_itr - update the dynamic ITR value based on packet size
2470  *
2471  *      Stores a new ITR value based on strictly on packet size.  This
2472  *      algorithm is less sophisticated than that used in igb_update_itr,
2473  *      due to the difficulty of synchronizing statistics across multiple
2474  *      receive rings.  The divisors and thresholds used by this fuction
2475  *      were determined based on theoretical maximum wire speed and testing
2476  *      data, in order to minimize response time while increasing bulk
2477  *      throughput.
2478  *      This functionality is controlled by the InterruptThrottleRate module
2479  *      parameter (see igb_param.c)
2480  *      NOTE:  This function is called only when operating in a multiqueue
2481  *             receive environment.
2482  * @rx_ring: pointer to ring
2483  **/
2484 static void igb_update_ring_itr(struct igb_ring *rx_ring)
2485 {
2486         int new_val = rx_ring->itr_val;
2487         int avg_wire_size = 0;
2488         struct igb_adapter *adapter = rx_ring->adapter;
2489
2490         if (!rx_ring->total_packets)
2491                 goto clear_counts; /* no packets, so don't do anything */
2492
2493         /* For non-gigabit speeds, just fix the interrupt rate at 4000
2494          * ints/sec - ITR timer value of 120 ticks.
2495          */
2496         if (adapter->link_speed != SPEED_1000) {
2497                 new_val = 120;
2498                 goto set_itr_val;
2499         }
2500         avg_wire_size = rx_ring->total_bytes / rx_ring->total_packets;
2501
2502         /* Add 24 bytes to size to account for CRC, preamble, and gap */
2503         avg_wire_size += 24;
2504
2505         /* Don't starve jumbo frames */
2506         avg_wire_size = min(avg_wire_size, 3000);
2507
2508         /* Give a little boost to mid-size frames */
2509         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
2510                 new_val = avg_wire_size / 3;
2511         else
2512                 new_val = avg_wire_size / 2;
2513
2514 set_itr_val:
2515         if (new_val != rx_ring->itr_val) {
2516                 rx_ring->itr_val = new_val;
2517                 rx_ring->set_itr = 1;
2518         }
2519 clear_counts:
2520         rx_ring->total_bytes = 0;
2521         rx_ring->total_packets = 0;
2522 }
2523
2524 /**
2525  * igb_update_itr - update the dynamic ITR value based on statistics
2526  *      Stores a new ITR value based on packets and byte
2527  *      counts during the last interrupt.  The advantage of per interrupt
2528  *      computation is faster updates and more accurate ITR for the current
2529  *      traffic pattern.  Constants in this function were computed
2530  *      based on theoretical maximum wire speed and thresholds were set based
2531  *      on testing data as well as attempting to minimize response time
2532  *      while increasing bulk throughput.
2533  *      this functionality is controlled by the InterruptThrottleRate module
2534  *      parameter (see igb_param.c)
2535  *      NOTE:  These calculations are only valid when operating in a single-
2536  *             queue environment.
2537  * @adapter: pointer to adapter
2538  * @itr_setting: current adapter->itr
2539  * @packets: the number of packets during this measurement interval
2540  * @bytes: the number of bytes during this measurement interval
2541  **/
2542 static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting,
2543                                    int packets, int bytes)
2544 {
2545         unsigned int retval = itr_setting;
2546
2547         if (packets == 0)
2548                 goto update_itr_done;
2549
2550         switch (itr_setting) {
2551         case lowest_latency:
2552                 /* handle TSO and jumbo frames */
2553                 if (bytes/packets > 8000)
2554                         retval = bulk_latency;
2555                 else if ((packets < 5) && (bytes > 512))
2556                         retval = low_latency;
2557                 break;
2558         case low_latency:  /* 50 usec aka 20000 ints/s */
2559                 if (bytes > 10000) {
2560                         /* this if handles the TSO accounting */
2561                         if (bytes/packets > 8000) {
2562                                 retval = bulk_latency;
2563                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2564                                 retval = bulk_latency;
2565                         } else if ((packets > 35)) {
2566                                 retval = lowest_latency;
2567                         }
2568                 } else if (bytes/packets > 2000) {
2569                         retval = bulk_latency;
2570                 } else if (packets <= 2 && bytes < 512) {
2571                         retval = lowest_latency;
2572                 }
2573                 break;
2574         case bulk_latency: /* 250 usec aka 4000 ints/s */
2575                 if (bytes > 25000) {
2576                         if (packets > 35)
2577                                 retval = low_latency;
2578                 } else if (bytes < 6000) {
2579                         retval = low_latency;
2580                 }
2581                 break;
2582         }
2583
2584 update_itr_done:
2585         return retval;
2586 }
2587
2588 static void igb_set_itr(struct igb_adapter *adapter)
2589 {
2590         u16 current_itr;
2591         u32 new_itr = adapter->itr;
2592
2593         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2594         if (adapter->link_speed != SPEED_1000) {
2595                 current_itr = 0;
2596                 new_itr = 4000;
2597                 goto set_itr_now;
2598         }
2599
2600         adapter->rx_itr = igb_update_itr(adapter,
2601                                     adapter->rx_itr,
2602                                     adapter->rx_ring->total_packets,
2603                                     adapter->rx_ring->total_bytes);
2604
2605         if (adapter->rx_ring->buddy) {
2606                 adapter->tx_itr = igb_update_itr(adapter,
2607                                             adapter->tx_itr,
2608                                             adapter->tx_ring->total_packets,
2609                                             adapter->tx_ring->total_bytes);
2610
2611                 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2612         } else {
2613                 current_itr = adapter->rx_itr;
2614         }
2615
2616         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2617         if (adapter->itr_setting == 3 &&
2618             current_itr == lowest_latency)
2619                 current_itr = low_latency;
2620
2621         switch (current_itr) {
2622         /* counts and packets in update_itr are dependent on these numbers */
2623         case lowest_latency:
2624                 new_itr = 70000;
2625                 break;
2626         case low_latency:
2627                 new_itr = 20000; /* aka hwitr = ~200 */
2628                 break;
2629         case bulk_latency:
2630                 new_itr = 4000;
2631                 break;
2632         default:
2633                 break;
2634         }
2635
2636 set_itr_now:
2637         adapter->rx_ring->total_bytes = 0;
2638         adapter->rx_ring->total_packets = 0;
2639         if (adapter->rx_ring->buddy) {
2640                 adapter->rx_ring->buddy->total_bytes = 0;
2641                 adapter->rx_ring->buddy->total_packets = 0;
2642         }
2643
2644         if (new_itr != adapter->itr) {
2645                 /* this attempts to bias the interrupt rate towards Bulk
2646                  * by adding intermediate steps when interrupt rate is
2647                  * increasing */
2648                 new_itr = new_itr > adapter->itr ?
2649                              min(adapter->itr + (new_itr >> 2), new_itr) :
2650                              new_itr;
2651                 /* Don't write the value here; it resets the adapter's
2652                  * internal timer, and causes us to delay far longer than
2653                  * we should between interrupts.  Instead, we write the ITR
2654                  * value at the beginning of the next interrupt so the timing
2655                  * ends up being correct.
2656                  */
2657                 adapter->itr = new_itr;
2658                 adapter->rx_ring->itr_val = 1000000000 / (new_itr * 256);
2659                 adapter->rx_ring->set_itr = 1;
2660         }
2661
2662         return;
2663 }
2664
2665
2666 #define IGB_TX_FLAGS_CSUM               0x00000001
2667 #define IGB_TX_FLAGS_VLAN               0x00000002
2668 #define IGB_TX_FLAGS_TSO                0x00000004
2669 #define IGB_TX_FLAGS_IPV4               0x00000008
2670 #define IGB_TX_FLAGS_VLAN_MASK  0xffff0000
2671 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2672
2673 static inline int igb_tso_adv(struct igb_adapter *adapter,
2674                               struct igb_ring *tx_ring,
2675                               struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2676 {
2677         struct e1000_adv_tx_context_desc *context_desc;
2678         unsigned int i;
2679         int err;
2680         struct igb_buffer *buffer_info;
2681         u32 info = 0, tu_cmd = 0;
2682         u32 mss_l4len_idx, l4len;
2683         *hdr_len = 0;
2684
2685         if (skb_header_cloned(skb)) {
2686                 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2687                 if (err)
2688                         return err;
2689         }
2690
2691         l4len = tcp_hdrlen(skb);
2692         *hdr_len += l4len;
2693
2694         if (skb->protocol == htons(ETH_P_IP)) {
2695                 struct iphdr *iph = ip_hdr(skb);
2696                 iph->tot_len = 0;
2697                 iph->check = 0;
2698                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2699                                                          iph->daddr, 0,
2700                                                          IPPROTO_TCP,
2701                                                          0);
2702         } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2703                 ipv6_hdr(skb)->payload_len = 0;
2704                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2705                                                        &ipv6_hdr(skb)->daddr,
2706                                                        0, IPPROTO_TCP, 0);
2707         }
2708
2709         i = tx_ring->next_to_use;
2710
2711         buffer_info = &tx_ring->buffer_info[i];
2712         context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2713         /* VLAN MACLEN IPLEN */
2714         if (tx_flags & IGB_TX_FLAGS_VLAN)
2715                 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2716         info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2717         *hdr_len += skb_network_offset(skb);
2718         info |= skb_network_header_len(skb);
2719         *hdr_len += skb_network_header_len(skb);
2720         context_desc->vlan_macip_lens = cpu_to_le32(info);
2721
2722         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2723         tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2724
2725         if (skb->protocol == htons(ETH_P_IP))
2726                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2727         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2728
2729         context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2730
2731         /* MSS L4LEN IDX */
2732         mss_l4len_idx = (skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT);
2733         mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT);
2734
2735         /* Context index must be unique per ring. */
2736         if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2737                 mss_l4len_idx |= tx_ring->queue_index << 4;
2738
2739         context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2740         context_desc->seqnum_seed = 0;
2741
2742         buffer_info->time_stamp = jiffies;
2743         buffer_info->dma = 0;
2744         i++;
2745         if (i == tx_ring->count)
2746                 i = 0;
2747
2748         tx_ring->next_to_use = i;
2749
2750         return true;
2751 }
2752
2753 static inline bool igb_tx_csum_adv(struct igb_adapter *adapter,
2754                                         struct igb_ring *tx_ring,
2755                                         struct sk_buff *skb, u32 tx_flags)
2756 {
2757         struct e1000_adv_tx_context_desc *context_desc;
2758         unsigned int i;
2759         struct igb_buffer *buffer_info;
2760         u32 info = 0, tu_cmd = 0;
2761
2762         if ((skb->ip_summed == CHECKSUM_PARTIAL) ||
2763             (tx_flags & IGB_TX_FLAGS_VLAN)) {
2764                 i = tx_ring->next_to_use;
2765                 buffer_info = &tx_ring->buffer_info[i];
2766                 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2767
2768                 if (tx_flags & IGB_TX_FLAGS_VLAN)
2769                         info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2770                 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2771                 if (skb->ip_summed == CHECKSUM_PARTIAL)
2772                         info |= skb_network_header_len(skb);
2773
2774                 context_desc->vlan_macip_lens = cpu_to_le32(info);
2775
2776                 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2777
2778                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2779                         switch (skb->protocol) {
2780                         case __constant_htons(ETH_P_IP):
2781                                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2782                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2783                                         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2784                                 break;
2785                         case __constant_htons(ETH_P_IPV6):
2786                                 /* XXX what about other V6 headers?? */
2787                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2788                                         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2789                                 break;
2790                         default:
2791                                 if (unlikely(net_ratelimit()))
2792                                         dev_warn(&adapter->pdev->dev,
2793                                             "partial checksum but proto=%x!\n",
2794                                             skb->protocol);
2795                                 break;
2796                         }
2797                 }
2798
2799                 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2800                 context_desc->seqnum_seed = 0;
2801                 if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2802                         context_desc->mss_l4len_idx =
2803                                 cpu_to_le32(tx_ring->queue_index << 4);
2804
2805                 buffer_info->time_stamp = jiffies;
2806                 buffer_info->dma = 0;
2807
2808                 i++;
2809                 if (i == tx_ring->count)
2810                         i = 0;
2811                 tx_ring->next_to_use = i;
2812
2813                 return true;
2814         }
2815
2816
2817         return false;
2818 }
2819
2820 #define IGB_MAX_TXD_PWR 16
2821 #define IGB_MAX_DATA_PER_TXD    (1<<IGB_MAX_TXD_PWR)
2822
2823 static inline int igb_tx_map_adv(struct igb_adapter *adapter,
2824                                  struct igb_ring *tx_ring,
2825                                  struct sk_buff *skb)
2826 {
2827         struct igb_buffer *buffer_info;
2828         unsigned int len = skb_headlen(skb);
2829         unsigned int count = 0, i;
2830         unsigned int f;
2831
2832         i = tx_ring->next_to_use;
2833
2834         buffer_info = &tx_ring->buffer_info[i];
2835         BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2836         buffer_info->length = len;
2837         /* set time_stamp *before* dma to help avoid a possible race */
2838         buffer_info->time_stamp = jiffies;
2839         buffer_info->dma = pci_map_single(adapter->pdev, skb->data, len,
2840                                           PCI_DMA_TODEVICE);
2841         count++;
2842         i++;
2843         if (i == tx_ring->count)
2844                 i = 0;
2845
2846         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
2847                 struct skb_frag_struct *frag;
2848
2849                 frag = &skb_shinfo(skb)->frags[f];
2850                 len = frag->size;
2851
2852                 buffer_info = &tx_ring->buffer_info[i];
2853                 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2854                 buffer_info->length = len;
2855                 buffer_info->time_stamp = jiffies;
2856                 buffer_info->dma = pci_map_page(adapter->pdev,
2857                                                 frag->page,
2858                                                 frag->page_offset,
2859                                                 len,
2860                                                 PCI_DMA_TODEVICE);
2861
2862                 count++;
2863                 i++;
2864                 if (i == tx_ring->count)
2865                         i = 0;
2866         }
2867
2868         i = (i == 0) ? tx_ring->count - 1 : i - 1;
2869         tx_ring->buffer_info[i].skb = skb;
2870
2871         return count;
2872 }
2873
2874 static inline void igb_tx_queue_adv(struct igb_adapter *adapter,
2875                                     struct igb_ring *tx_ring,
2876                                     int tx_flags, int count, u32 paylen,
2877                                     u8 hdr_len)
2878 {
2879         union e1000_adv_tx_desc *tx_desc = NULL;
2880         struct igb_buffer *buffer_info;
2881         u32 olinfo_status = 0, cmd_type_len;
2882         unsigned int i;
2883
2884         cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS |
2885                         E1000_ADVTXD_DCMD_DEXT);
2886
2887         if (tx_flags & IGB_TX_FLAGS_VLAN)
2888                 cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
2889
2890         if (tx_flags & IGB_TX_FLAGS_TSO) {
2891                 cmd_type_len |= E1000_ADVTXD_DCMD_TSE;
2892
2893                 /* insert tcp checksum */
2894                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2895
2896                 /* insert ip checksum */
2897                 if (tx_flags & IGB_TX_FLAGS_IPV4)
2898                         olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
2899
2900         } else if (tx_flags & IGB_TX_FLAGS_CSUM) {
2901                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2902         }
2903
2904         if ((adapter->flags & IGB_FLAG_NEED_CTX_IDX) &&
2905             (tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_TSO |
2906                          IGB_TX_FLAGS_VLAN)))
2907                 olinfo_status |= tx_ring->queue_index << 4;
2908
2909         olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT);
2910
2911         i = tx_ring->next_to_use;
2912         while (count--) {
2913                 buffer_info = &tx_ring->buffer_info[i];
2914                 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
2915                 tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
2916                 tx_desc->read.cmd_type_len =
2917                         cpu_to_le32(cmd_type_len | buffer_info->length);
2918                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2919                 i++;
2920                 if (i == tx_ring->count)
2921                         i = 0;
2922         }
2923
2924         tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd);
2925         /* Force memory writes to complete before letting h/w
2926          * know there are new descriptors to fetch.  (Only
2927          * applicable for weak-ordered memory model archs,
2928          * such as IA-64). */
2929         wmb();
2930
2931         tx_ring->next_to_use = i;
2932         writel(i, adapter->hw.hw_addr + tx_ring->tail);
2933         /* we need this if more than one processor can write to our tail
2934          * at a time, it syncronizes IO on IA64/Altix systems */
2935         mmiowb();
2936 }
2937
2938 static int __igb_maybe_stop_tx(struct net_device *netdev,
2939                                struct igb_ring *tx_ring, int size)
2940 {
2941         struct igb_adapter *adapter = netdev_priv(netdev);
2942
2943 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2944         netif_stop_subqueue(netdev, tx_ring->queue_index);
2945 #else
2946         netif_stop_queue(netdev);
2947 #endif
2948
2949         /* Herbert's original patch had:
2950          *  smp_mb__after_netif_stop_queue();
2951          * but since that doesn't exist yet, just open code it. */
2952         smp_mb();
2953
2954         /* We need to check again in a case another CPU has just
2955          * made room available. */
2956         if (IGB_DESC_UNUSED(tx_ring) < size)
2957                 return -EBUSY;
2958
2959         /* A reprieve! */
2960 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2961         netif_wake_subqueue(netdev, tx_ring->queue_index);
2962 #else
2963         netif_wake_queue(netdev);
2964 #endif
2965         ++adapter->restart_queue;
2966         return 0;
2967 }
2968
2969 static int igb_maybe_stop_tx(struct net_device *netdev,
2970                              struct igb_ring *tx_ring, int size)
2971 {
2972         if (IGB_DESC_UNUSED(tx_ring) >= size)
2973                 return 0;
2974         return __igb_maybe_stop_tx(netdev, tx_ring, size);
2975 }
2976
2977 #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
2978
2979 static int igb_xmit_frame_ring_adv(struct sk_buff *skb,
2980                                    struct net_device *netdev,
2981                                    struct igb_ring *tx_ring)
2982 {
2983         struct igb_adapter *adapter = netdev_priv(netdev);
2984         unsigned int tx_flags = 0;
2985         unsigned int len;
2986         u8 hdr_len = 0;
2987         int tso = 0;
2988
2989         len = skb_headlen(skb);
2990
2991         if (test_bit(__IGB_DOWN, &adapter->state)) {
2992                 dev_kfree_skb_any(skb);
2993                 return NETDEV_TX_OK;
2994         }
2995
2996         if (skb->len <= 0) {
2997                 dev_kfree_skb_any(skb);
2998                 return NETDEV_TX_OK;
2999         }
3000
3001         /* need: 1 descriptor per page,
3002          *       + 2 desc gap to keep tail from touching head,
3003          *       + 1 desc for skb->data,
3004          *       + 1 desc for context descriptor,
3005          * otherwise try next time */
3006         if (igb_maybe_stop_tx(netdev, tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
3007                 /* this is a hard error */
3008                 return NETDEV_TX_BUSY;
3009         }
3010         skb_orphan(skb);
3011
3012         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3013                 tx_flags |= IGB_TX_FLAGS_VLAN;
3014                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
3015         }
3016
3017         if (skb->protocol == htons(ETH_P_IP))
3018                 tx_flags |= IGB_TX_FLAGS_IPV4;
3019
3020         tso = skb_is_gso(skb) ? igb_tso_adv(adapter, tx_ring, skb, tx_flags,
3021                                               &hdr_len) : 0;
3022
3023         if (tso < 0) {
3024                 dev_kfree_skb_any(skb);
3025                 return NETDEV_TX_OK;
3026         }
3027
3028         if (tso)
3029                 tx_flags |= IGB_TX_FLAGS_TSO;
3030         else if (igb_tx_csum_adv(adapter, tx_ring, skb, tx_flags))
3031                         if (skb->ip_summed == CHECKSUM_PARTIAL)
3032                                 tx_flags |= IGB_TX_FLAGS_CSUM;
3033
3034         igb_tx_queue_adv(adapter, tx_ring, tx_flags,
3035                          igb_tx_map_adv(adapter, tx_ring, skb),
3036                          skb->len, hdr_len);
3037
3038         netdev->trans_start = jiffies;
3039
3040         /* Make sure there is space in the ring for the next send. */
3041         igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4);
3042
3043         return NETDEV_TX_OK;
3044 }
3045
3046 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *netdev)
3047 {
3048         struct igb_adapter *adapter = netdev_priv(netdev);
3049         struct igb_ring *tx_ring;
3050
3051 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3052         int r_idx = 0;
3053         r_idx = skb->queue_mapping & (IGB_MAX_TX_QUEUES - 1);
3054         tx_ring = adapter->multi_tx_table[r_idx];
3055 #else
3056         tx_ring = &adapter->tx_ring[0];
3057 #endif
3058
3059
3060         /* This goes back to the question of how to logically map a tx queue
3061          * to a flow.  Right now, performance is impacted slightly negatively
3062          * if using multiple tx queues.  If the stack breaks away from a
3063          * single qdisc implementation, we can look at this again. */
3064         return (igb_xmit_frame_ring_adv(skb, netdev, tx_ring));
3065 }
3066
3067 /**
3068  * igb_tx_timeout - Respond to a Tx Hang
3069  * @netdev: network interface device structure
3070  **/
3071 static void igb_tx_timeout(struct net_device *netdev)
3072 {
3073         struct igb_adapter *adapter = netdev_priv(netdev);
3074         struct e1000_hw *hw = &adapter->hw;
3075
3076         /* Do the reset outside of interrupt context */
3077         adapter->tx_timeout_count++;
3078         schedule_work(&adapter->reset_task);
3079         wr32(E1000_EICS, adapter->eims_enable_mask &
3080                 ~(E1000_EIMS_TCP_TIMER | E1000_EIMS_OTHER));
3081 }
3082
3083 static void igb_reset_task(struct work_struct *work)
3084 {
3085         struct igb_adapter *adapter;
3086         adapter = container_of(work, struct igb_adapter, reset_task);
3087
3088         igb_reinit_locked(adapter);
3089 }
3090
3091 /**
3092  * igb_get_stats - Get System Network Statistics
3093  * @netdev: network interface device structure
3094  *
3095  * Returns the address of the device statistics structure.
3096  * The statistics are actually updated from the timer callback.
3097  **/
3098 static struct net_device_stats *
3099 igb_get_stats(struct net_device *netdev)
3100 {
3101         struct igb_adapter *adapter = netdev_priv(netdev);
3102
3103         /* only return the current stats */
3104         return &adapter->net_stats;
3105 }
3106
3107 /**
3108  * igb_change_mtu - Change the Maximum Transfer Unit
3109  * @netdev: network interface device structure
3110  * @new_mtu: new value for maximum frame size
3111  *
3112  * Returns 0 on success, negative on failure
3113  **/
3114 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
3115 {
3116         struct igb_adapter *adapter = netdev_priv(netdev);
3117         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3118
3119         if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
3120             (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3121                 dev_err(&adapter->pdev->dev, "Invalid MTU setting\n");
3122                 return -EINVAL;
3123         }
3124
3125 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3126         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3127                 dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n");
3128                 return -EINVAL;
3129         }
3130
3131         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
3132                 msleep(1);
3133         /* igb_down has a dependency on max_frame_size */
3134         adapter->max_frame_size = max_frame;
3135         if (netif_running(netdev))
3136                 igb_down(adapter);
3137
3138         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3139          * means we reserve 2 more, this pushes us to allocate from the next
3140          * larger slab size.
3141          * i.e. RXBUFFER_2048 --> size-4096 slab
3142          */
3143
3144         if (max_frame <= IGB_RXBUFFER_256)
3145                 adapter->rx_buffer_len = IGB_RXBUFFER_256;
3146         else if (max_frame <= IGB_RXBUFFER_512)
3147                 adapter->rx_buffer_len = IGB_RXBUFFER_512;
3148         else if (max_frame <= IGB_RXBUFFER_1024)
3149                 adapter->rx_buffer_len = IGB_RXBUFFER_1024;
3150         else if (max_frame <= IGB_RXBUFFER_2048)
3151                 adapter->rx_buffer_len = IGB_RXBUFFER_2048;
3152         else
3153 #if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
3154                 adapter->rx_buffer_len = IGB_RXBUFFER_16384;
3155 #else
3156                 adapter->rx_buffer_len = PAGE_SIZE / 2;
3157 #endif
3158         /* adjust allocation if LPE protects us, and we aren't using SBP */
3159         if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
3160              (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))
3161                 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3162
3163         dev_info(&adapter->pdev->dev, "changing MTU from %d to %d\n",
3164                  netdev->mtu, new_mtu);
3165         netdev->mtu = new_mtu;
3166
3167         if (netif_running(netdev))
3168                 igb_up(adapter);
3169         else
3170                 igb_reset(adapter);
3171
3172         clear_bit(__IGB_RESETTING, &adapter->state);
3173
3174         return 0;
3175 }
3176
3177 /**
3178  * igb_update_stats - Update the board statistics counters
3179  * @adapter: board private structure
3180  **/
3181
3182 void igb_update_stats(struct igb_adapter *adapter)
3183 {
3184         struct e1000_hw *hw = &adapter->hw;
3185         struct pci_dev *pdev = adapter->pdev;
3186         u16 phy_tmp;
3187
3188 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3189
3190         /*
3191          * Prevent stats update while adapter is being reset, or if the pci
3192          * connection is down.
3193          */
3194         if (adapter->link_speed == 0)
3195                 return;
3196         if (pci_channel_offline(pdev))
3197                 return;
3198
3199         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
3200         adapter->stats.gprc += rd32(E1000_GPRC);
3201         adapter->stats.gorc += rd32(E1000_GORCL);
3202         rd32(E1000_GORCH); /* clear GORCL */
3203         adapter->stats.bprc += rd32(E1000_BPRC);
3204         adapter->stats.mprc += rd32(E1000_MPRC);
3205         adapter->stats.roc += rd32(E1000_ROC);
3206
3207         adapter->stats.prc64 += rd32(E1000_PRC64);
3208         adapter->stats.prc127 += rd32(E1000_PRC127);
3209         adapter->stats.prc255 += rd32(E1000_PRC255);
3210         adapter->stats.prc511 += rd32(E1000_PRC511);
3211         adapter->stats.prc1023 += rd32(E1000_PRC1023);
3212         adapter->stats.prc1522 += rd32(E1000_PRC1522);
3213         adapter->stats.symerrs += rd32(E1000_SYMERRS);
3214         adapter->stats.sec += rd32(E1000_SEC);
3215
3216         adapter->stats.mpc += rd32(E1000_MPC);
3217         adapter->stats.scc += rd32(E1000_SCC);
3218         adapter->stats.ecol += rd32(E1000_ECOL);
3219         adapter->stats.mcc += rd32(E1000_MCC);
3220         adapter->stats.latecol += rd32(E1000_LATECOL);
3221         adapter->stats.dc += rd32(E1000_DC);
3222         adapter->stats.rlec += rd32(E1000_RLEC);
3223         adapter->stats.xonrxc += rd32(E1000_XONRXC);
3224         adapter->stats.xontxc += rd32(E1000_XONTXC);
3225         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
3226         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
3227         adapter->stats.fcruc += rd32(E1000_FCRUC);
3228         adapter->stats.gptc += rd32(E1000_GPTC);
3229         adapter->stats.gotc += rd32(E1000_GOTCL);
3230         rd32(E1000_GOTCH); /* clear GOTCL */
3231         adapter->stats.rnbc += rd32(E1000_RNBC);
3232         adapter->stats.ruc += rd32(E1000_RUC);
3233         adapter->stats.rfc += rd32(E1000_RFC);
3234         adapter->stats.rjc += rd32(E1000_RJC);
3235         adapter->stats.tor += rd32(E1000_TORH);
3236         adapter->stats.tot += rd32(E1000_TOTH);
3237         adapter->stats.tpr += rd32(E1000_TPR);
3238
3239         adapter->stats.ptc64 += rd32(E1000_PTC64);
3240         adapter->stats.ptc127 += rd32(E1000_PTC127);
3241         adapter->stats.ptc255 += rd32(E1000_PTC255);
3242         adapter->stats.ptc511 += rd32(E1000_PTC511);
3243         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
3244         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
3245
3246         adapter->stats.mptc += rd32(E1000_MPTC);
3247         adapter->stats.bptc += rd32(E1000_BPTC);
3248
3249         /* used for adaptive IFS */
3250
3251         hw->mac.tx_packet_delta = rd32(E1000_TPT);
3252         adapter->stats.tpt += hw->mac.tx_packet_delta;
3253         hw->mac.collision_delta = rd32(E1000_COLC);
3254         adapter->stats.colc += hw->mac.collision_delta;
3255
3256         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
3257         adapter->stats.rxerrc += rd32(E1000_RXERRC);
3258         adapter->stats.tncrs += rd32(E1000_TNCRS);
3259         adapter->stats.tsctc += rd32(E1000_TSCTC);
3260         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
3261
3262         adapter->stats.iac += rd32(E1000_IAC);
3263         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
3264         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
3265         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
3266         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
3267         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
3268         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
3269         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
3270         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
3271
3272         /* Fill out the OS statistics structure */
3273         adapter->net_stats.multicast = adapter->stats.mprc;
3274         adapter->net_stats.collisions = adapter->stats.colc;
3275
3276         /* Rx Errors */
3277
3278         /* RLEC on some newer hardware can be incorrect so build
3279         * our own version based on RUC and ROC */
3280         adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3281                 adapter->stats.crcerrs + adapter->stats.algnerrc +
3282                 adapter->stats.ruc + adapter->stats.roc +
3283                 adapter->stats.cexterr;
3284         adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3285                                               adapter->stats.roc;
3286         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3287         adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3288         adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3289
3290         /* Tx Errors */
3291         adapter->net_stats.tx_errors = adapter->stats.ecol +
3292                                        adapter->stats.latecol;
3293         adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3294         adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3295         adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3296
3297         /* Tx Dropped needs to be maintained elsewhere */
3298
3299         /* Phy Stats */
3300         if (hw->phy.media_type == e1000_media_type_copper) {
3301                 if ((adapter->link_speed == SPEED_1000) &&
3302                    (!hw->phy.ops.read_phy_reg(hw, PHY_1000T_STATUS,
3303                                               &phy_tmp))) {
3304                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3305                         adapter->phy_stats.idle_errors += phy_tmp;
3306                 }
3307         }
3308
3309         /* Management Stats */
3310         adapter->stats.mgptc += rd32(E1000_MGTPTC);
3311         adapter->stats.mgprc += rd32(E1000_MGTPRC);
3312         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
3313 }
3314
3315
3316 static irqreturn_t igb_msix_other(int irq, void *data)
3317 {
3318         struct net_device *netdev = data;
3319         struct igb_adapter *adapter = netdev_priv(netdev);
3320         struct e1000_hw *hw = &adapter->hw;
3321         u32 icr = rd32(E1000_ICR);
3322
3323         /* reading ICR causes bit 31 of EICR to be cleared */
3324         if (!(icr & E1000_ICR_LSC))
3325                 goto no_link_interrupt;
3326         hw->mac.get_link_status = 1;
3327         /* guard against interrupt when we're going down */
3328         if (!test_bit(__IGB_DOWN, &adapter->state))
3329                 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3330
3331 no_link_interrupt:
3332         wr32(E1000_IMS, E1000_IMS_LSC);
3333         wr32(E1000_EIMS, adapter->eims_other);
3334
3335         return IRQ_HANDLED;
3336 }
3337
3338 static irqreturn_t igb_msix_tx(int irq, void *data)
3339 {
3340         struct igb_ring *tx_ring = data;
3341         struct igb_adapter *adapter = tx_ring->adapter;
3342         struct e1000_hw *hw = &adapter->hw;
3343
3344 #ifdef CONFIG_DCA
3345         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3346                 igb_update_tx_dca(tx_ring);
3347 #endif
3348         tx_ring->total_bytes = 0;
3349         tx_ring->total_packets = 0;
3350
3351         /* auto mask will automatically reenable the interrupt when we write
3352          * EICS */
3353         if (!igb_clean_tx_irq(tx_ring))
3354                 /* Ring was not completely cleaned, so fire another interrupt */
3355                 wr32(E1000_EICS, tx_ring->eims_value);
3356         else
3357                 wr32(E1000_EIMS, tx_ring->eims_value);
3358
3359         return IRQ_HANDLED;
3360 }
3361
3362 static void igb_write_itr(struct igb_ring *ring)
3363 {
3364         struct e1000_hw *hw = &ring->adapter->hw;
3365         if ((ring->adapter->itr_setting & 3) && ring->set_itr) {
3366                 switch (hw->mac.type) {
3367                 case e1000_82576:
3368                         wr32(ring->itr_register,
3369                              ring->itr_val |
3370                              0x80000000);
3371                         break;
3372                 default:
3373                         wr32(ring->itr_register,
3374                              ring->itr_val |
3375                              (ring->itr_val << 16));
3376                         break;
3377                 }
3378                 ring->set_itr = 0;
3379         }
3380 }
3381
3382 static irqreturn_t igb_msix_rx(int irq, void *data)
3383 {
3384         struct igb_ring *rx_ring = data;
3385         struct igb_adapter *adapter = rx_ring->adapter;
3386
3387         /* Write the ITR value calculated at the end of the
3388          * previous interrupt.
3389          */
3390
3391         igb_write_itr(rx_ring);
3392
3393         if (netif_rx_schedule_prep(adapter->netdev, &rx_ring->napi))
3394                 __netif_rx_schedule(adapter->netdev, &rx_ring->napi);
3395
3396 #ifdef CONFIG_DCA
3397         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3398                 igb_update_rx_dca(rx_ring);
3399 #endif
3400                 return IRQ_HANDLED;
3401 }
3402
3403 #ifdef CONFIG_DCA
3404 static void igb_update_rx_dca(struct igb_ring *rx_ring)
3405 {
3406         u32 dca_rxctrl;
3407         struct igb_adapter *adapter = rx_ring->adapter;
3408         struct e1000_hw *hw = &adapter->hw;
3409         int cpu = get_cpu();
3410         int q = rx_ring - adapter->rx_ring;
3411
3412         if (rx_ring->cpu != cpu) {
3413                 dca_rxctrl = rd32(E1000_DCA_RXCTRL(q));
3414                 if (hw->mac.type == e1000_82576) {
3415                         dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK_82576;
3416                         dca_rxctrl |= dca_get_tag(cpu) <<
3417                                       E1000_DCA_RXCTRL_CPUID_SHIFT;
3418                 } else {
3419                         dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK;
3420                         dca_rxctrl |= dca_get_tag(cpu);
3421                 }
3422                 dca_rxctrl |= E1000_DCA_RXCTRL_DESC_DCA_EN;
3423                 dca_rxctrl |= E1000_DCA_RXCTRL_HEAD_DCA_EN;
3424                 dca_rxctrl |= E1000_DCA_RXCTRL_DATA_DCA_EN;
3425                 wr32(E1000_DCA_RXCTRL(q), dca_rxctrl);
3426                 rx_ring->cpu = cpu;
3427         }
3428         put_cpu();
3429 }
3430
3431 static void igb_update_tx_dca(struct igb_ring *tx_ring)
3432 {
3433         u32 dca_txctrl;
3434         struct igb_adapter *adapter = tx_ring->adapter;
3435         struct e1000_hw *hw = &adapter->hw;
3436         int cpu = get_cpu();
3437         int q = tx_ring - adapter->tx_ring;
3438
3439         if (tx_ring->cpu != cpu) {
3440                 dca_txctrl = rd32(E1000_DCA_TXCTRL(q));
3441                 if (hw->mac.type == e1000_82576) {
3442                         dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK_82576;
3443                         dca_txctrl |= dca_get_tag(cpu) <<
3444                                       E1000_DCA_TXCTRL_CPUID_SHIFT;
3445                 } else {
3446                         dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK;
3447                         dca_txctrl |= dca_get_tag(cpu);
3448                 }
3449                 dca_txctrl |= E1000_DCA_TXCTRL_DESC_DCA_EN;
3450                 wr32(E1000_DCA_TXCTRL(q), dca_txctrl);
3451                 tx_ring->cpu = cpu;
3452         }
3453         put_cpu();
3454 }
3455
3456 static void igb_setup_dca(struct igb_adapter *adapter)
3457 {
3458         int i;
3459
3460         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
3461                 return;
3462
3463         for (i = 0; i < adapter->num_tx_queues; i++) {
3464                 adapter->tx_ring[i].cpu = -1;
3465                 igb_update_tx_dca(&adapter->tx_ring[i]);
3466         }
3467         for (i = 0; i < adapter->num_rx_queues; i++) {
3468                 adapter->rx_ring[i].cpu = -1;
3469                 igb_update_rx_dca(&adapter->rx_ring[i]);
3470         }
3471 }
3472
3473 static int __igb_notify_dca(struct device *dev, void *data)
3474 {
3475         struct net_device *netdev = dev_get_drvdata(dev);
3476         struct igb_adapter *adapter = netdev_priv(netdev);
3477         struct e1000_hw *hw = &adapter->hw;
3478         unsigned long event = *(unsigned long *)data;
3479
3480         if (!(adapter->flags & IGB_FLAG_HAS_DCA))
3481                 goto out;
3482
3483         switch (event) {
3484         case DCA_PROVIDER_ADD:
3485                 /* if already enabled, don't do it again */
3486                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3487                         break;
3488                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
3489                 /* Always use CB2 mode, difference is masked
3490                  * in the CB driver. */
3491                 wr32(E1000_DCA_CTRL, 2);
3492                 if (dca_add_requester(dev) == 0) {
3493                         dev_info(&adapter->pdev->dev, "DCA enabled\n");
3494                         igb_setup_dca(adapter);
3495                         break;
3496                 }
3497                 /* Fall Through since DCA is disabled. */
3498         case DCA_PROVIDER_REMOVE:
3499                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3500                         /* without this a class_device is left
3501                          * hanging around in the sysfs model */
3502                         dca_remove_requester(dev);
3503                         dev_info(&adapter->pdev->dev, "DCA disabled\n");
3504                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3505                         wr32(E1000_DCA_CTRL, 1);
3506                 }
3507                 break;
3508         }
3509 out:
3510         return 0;
3511 }
3512
3513 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
3514                           void *p)
3515 {
3516         int ret_val;
3517
3518         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
3519                                          __igb_notify_dca);
3520
3521         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
3522 }
3523 #endif /* CONFIG_DCA */
3524
3525 /**
3526  * igb_intr_msi - Interrupt Handler
3527  * @irq: interrupt number
3528  * @data: pointer to a network interface device structure
3529  **/
3530 static irqreturn_t igb_intr_msi(int irq, void *data)
3531 {
3532         struct net_device *netdev = data;
3533         struct igb_adapter *adapter = netdev_priv(netdev);
3534         struct e1000_hw *hw = &adapter->hw;
3535         /* read ICR disables interrupts using IAM */
3536         u32 icr = rd32(E1000_ICR);
3537
3538         igb_write_itr(adapter->rx_ring);
3539
3540         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3541                 hw->mac.get_link_status = 1;
3542                 if (!test_bit(__IGB_DOWN, &adapter->state))
3543                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3544         }
3545
3546         netif_rx_schedule(netdev, &adapter->rx_ring[0].napi);
3547
3548         return IRQ_HANDLED;
3549 }
3550
3551 /**
3552  * igb_intr - Interrupt Handler
3553  * @irq: interrupt number
3554  * @data: pointer to a network interface device structure
3555  **/
3556 static irqreturn_t igb_intr(int irq, void *data)
3557 {
3558         struct net_device *netdev = data;
3559         struct igb_adapter *adapter = netdev_priv(netdev);
3560         struct e1000_hw *hw = &adapter->hw;
3561         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
3562          * need for the IMC write */
3563         u32 icr = rd32(E1000_ICR);
3564         u32 eicr = 0;
3565         if (!icr)
3566                 return IRQ_NONE;  /* Not our interrupt */
3567
3568         igb_write_itr(adapter->rx_ring);
3569
3570         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3571          * not set, then the adapter didn't send an interrupt */
3572         if (!(icr & E1000_ICR_INT_ASSERTED))
3573                 return IRQ_NONE;
3574
3575         eicr = rd32(E1000_EICR);
3576
3577         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3578                 hw->mac.get_link_status = 1;
3579                 /* guard against interrupt when we're going down */
3580                 if (!test_bit(__IGB_DOWN, &adapter->state))
3581                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3582         }
3583
3584         netif_rx_schedule(netdev, &adapter->rx_ring[0].napi);
3585
3586         return IRQ_HANDLED;
3587 }
3588
3589 /**
3590  * igb_poll - NAPI Rx polling callback
3591  * @napi: napi polling structure
3592  * @budget: count of how many packets we should handle
3593  **/
3594 static int igb_poll(struct napi_struct *napi, int budget)
3595 {
3596         struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3597         struct igb_adapter *adapter = rx_ring->adapter;
3598         struct net_device *netdev = adapter->netdev;
3599         int tx_clean_complete, work_done = 0;
3600
3601         /* this poll routine only supports one tx and one rx queue */
3602 #ifdef CONFIG_DCA
3603         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3604                 igb_update_tx_dca(&adapter->tx_ring[0]);
3605 #endif
3606         tx_clean_complete = igb_clean_tx_irq(&adapter->tx_ring[0]);
3607
3608 #ifdef CONFIG_DCA
3609         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3610                 igb_update_rx_dca(&adapter->rx_ring[0]);
3611 #endif
3612         igb_clean_rx_irq_adv(&adapter->rx_ring[0], &work_done, budget);
3613
3614         /* If no Tx and not enough Rx work done, exit the polling mode */
3615         if ((tx_clean_complete && (work_done < budget)) ||
3616             !netif_running(netdev)) {
3617                 if (adapter->itr_setting & 3)
3618                         igb_set_itr(adapter);
3619                 netif_rx_complete(netdev, napi);
3620                 if (!test_bit(__IGB_DOWN, &adapter->state))
3621                         igb_irq_enable(adapter);
3622                 return 0;
3623         }
3624
3625         return 1;
3626 }
3627
3628 static int igb_clean_rx_ring_msix(struct napi_struct *napi, int budget)
3629 {
3630         struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3631         struct igb_adapter *adapter = rx_ring->adapter;
3632         struct e1000_hw *hw = &adapter->hw;
3633         struct net_device *netdev = adapter->netdev;
3634         int work_done = 0;
3635
3636         /* Keep link state information with original netdev */
3637         if (!netif_carrier_ok(netdev))
3638                 goto quit_polling;
3639
3640 #ifdef CONFIG_DCA
3641         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3642                 igb_update_rx_dca(rx_ring);
3643 #endif
3644         igb_clean_rx_irq_adv(rx_ring, &work_done, budget);
3645
3646
3647         /* If not enough Rx work done, exit the polling mode */
3648         if ((work_done == 0) || !netif_running(netdev)) {
3649 quit_polling:
3650                 netif_rx_complete(netdev, napi);
3651
3652                 if (adapter->itr_setting & 3) {
3653                         if (adapter->num_rx_queues == 1)
3654                                 igb_set_itr(adapter);
3655                         else
3656                                 igb_update_ring_itr(rx_ring);
3657                 }
3658
3659                 if (!test_bit(__IGB_DOWN, &adapter->state))
3660                         wr32(E1000_EIMS, rx_ring->eims_value);
3661
3662                 return 0;
3663         }
3664
3665         return 1;
3666 }
3667
3668 static inline u32 get_head(struct igb_ring *tx_ring)
3669 {
3670         void *end = (struct e1000_tx_desc *)tx_ring->desc + tx_ring->count;
3671         return le32_to_cpu(*(volatile __le32 *)end);
3672 }
3673
3674 /**
3675  * igb_clean_tx_irq - Reclaim resources after transmit completes
3676  * @adapter: board private structure
3677  * returns true if ring is completely cleaned
3678  **/
3679 static bool igb_clean_tx_irq(struct igb_ring *tx_ring)
3680 {
3681         struct igb_adapter *adapter = tx_ring->adapter;
3682         struct e1000_hw *hw = &adapter->hw;
3683         struct net_device *netdev = adapter->netdev;
3684         struct e1000_tx_desc *tx_desc;
3685         struct igb_buffer *buffer_info;
3686         struct sk_buff *skb;
3687         unsigned int i;
3688         u32 head, oldhead;
3689         unsigned int count = 0;
3690         bool cleaned = false;
3691         bool retval = true;
3692         unsigned int total_bytes = 0, total_packets = 0;
3693
3694         rmb();
3695         head = get_head(tx_ring);
3696         i = tx_ring->next_to_clean;
3697         while (1) {
3698                 while (i != head) {
3699                         cleaned = true;
3700                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3701                         buffer_info = &tx_ring->buffer_info[i];
3702                         skb = buffer_info->skb;
3703
3704                         if (skb) {
3705                                 unsigned int segs, bytecount;
3706                                 /* gso_segs is currently only valid for tcp */
3707                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
3708                                 /* multiply data chunks by size of headers */
3709                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
3710                                             skb->len;
3711                                 total_packets += segs;
3712                                 total_bytes += bytecount;
3713                         }
3714
3715                         igb_unmap_and_free_tx_resource(adapter, buffer_info);
3716                         tx_desc->upper.data = 0;
3717
3718                         i++;
3719                         if (i == tx_ring->count)
3720                                 i = 0;
3721
3722                         count++;
3723                         if (count == IGB_MAX_TX_CLEAN) {
3724                                 retval = false;
3725                                 goto done_cleaning;
3726                         }
3727                 }
3728                 oldhead = head;
3729                 rmb();
3730                 head = get_head(tx_ring);
3731                 if (head == oldhead)
3732                         goto done_cleaning;
3733         }  /* while (1) */
3734
3735 done_cleaning:
3736         tx_ring->next_to_clean = i;
3737
3738         if (unlikely(cleaned &&
3739                      netif_carrier_ok(netdev) &&
3740                      IGB_DESC_UNUSED(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
3741                 /* Make sure that anybody stopping the queue after this
3742                  * sees the new next_to_clean.
3743                  */
3744                 smp_mb();
3745 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3746                 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
3747                     !(test_bit(__IGB_DOWN, &adapter->state))) {
3748                         netif_wake_subqueue(netdev, tx_ring->queue_index);
3749                         ++adapter->restart_queue;
3750                 }
3751 #else
3752                 if (netif_queue_stopped(netdev) &&
3753                     !(test_bit(__IGB_DOWN, &adapter->state))) {
3754                         netif_wake_queue(netdev);
3755                         ++adapter->restart_queue;
3756                 }
3757 #endif
3758         }
3759
3760         if (tx_ring->detect_tx_hung) {
3761                 /* Detect a transmit hang in hardware, this serializes the
3762                  * check with the clearing of time_stamp and movement of i */
3763                 tx_ring->detect_tx_hung = false;
3764                 if (tx_ring->buffer_info[i].time_stamp &&
3765                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
3766                                (adapter->tx_timeout_factor * HZ))
3767                     && !(rd32(E1000_STATUS) &
3768                          E1000_STATUS_TXOFF)) {
3769
3770                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3771                         /* detected Tx unit hang */
3772                         dev_err(&adapter->pdev->dev,
3773                                 "Detected Tx Unit Hang\n"
3774                                 "  Tx Queue             <%d>\n"
3775                                 "  TDH                  <%x>\n"
3776                                 "  TDT                  <%x>\n"
3777                                 "  next_to_use          <%x>\n"
3778                                 "  next_to_clean        <%x>\n"
3779                                 "  head (WB)            <%x>\n"
3780                                 "buffer_info[next_to_clean]\n"
3781                                 "  time_stamp           <%lx>\n"
3782                                 "  jiffies              <%lx>\n"
3783                                 "  desc.status          <%x>\n",
3784                                 tx_ring->queue_index,
3785                                 readl(adapter->hw.hw_addr + tx_ring->head),
3786                                 readl(adapter->hw.hw_addr + tx_ring->tail),
3787                                 tx_ring->next_to_use,
3788                                 tx_ring->next_to_clean,
3789                                 head,
3790                                 tx_ring->buffer_info[i].time_stamp,
3791                                 jiffies,
3792                                 tx_desc->upper.fields.status);
3793 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3794                         netif_stop_subqueue(netdev, tx_ring->queue_index);
3795 #else
3796                         netif_stop_queue(netdev);
3797 #endif
3798                 }
3799         }
3800         tx_ring->total_bytes += total_bytes;
3801         tx_ring->total_packets += total_packets;
3802         tx_ring->tx_stats.bytes += total_bytes;
3803         tx_ring->tx_stats.packets += total_packets;
3804         adapter->net_stats.tx_bytes += total_bytes;
3805         adapter->net_stats.tx_packets += total_packets;
3806         return retval;
3807 }
3808
3809 #ifdef CONFIG_IGB_LRO
3810  /**
3811  * igb_get_skb_hdr - helper function for LRO header processing
3812  * @skb: pointer to sk_buff to be added to LRO packet
3813  * @iphdr: pointer to ip header structure
3814  * @tcph: pointer to tcp header structure
3815  * @hdr_flags: pointer to header flags
3816  * @priv: pointer to the receive descriptor for the current sk_buff
3817  **/
3818 static int igb_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
3819                            u64 *hdr_flags, void *priv)
3820 {
3821         union e1000_adv_rx_desc *rx_desc = priv;
3822         u16 pkt_type = rx_desc->wb.lower.lo_dword.pkt_info &
3823                        (E1000_RXDADV_PKTTYPE_IPV4 | E1000_RXDADV_PKTTYPE_TCP);
3824
3825         /* Verify that this is a valid IPv4 TCP packet */
3826         if (pkt_type != (E1000_RXDADV_PKTTYPE_IPV4 |
3827                           E1000_RXDADV_PKTTYPE_TCP))
3828                 return -1;
3829
3830         /* Set network headers */
3831         skb_reset_network_header(skb);
3832         skb_set_transport_header(skb, ip_hdrlen(skb));
3833         *iphdr = ip_hdr(skb);
3834         *tcph = tcp_hdr(skb);
3835         *hdr_flags = LRO_IPV4 | LRO_TCP;
3836
3837         return 0;
3838
3839 }
3840 #endif /* CONFIG_IGB_LRO */
3841
3842 /**
3843  * igb_receive_skb - helper function to handle rx indications
3844  * @ring: pointer to receive ring receving this packet
3845  * @status: descriptor status field as written by hardware
3846  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3847  * @skb: pointer to sk_buff to be indicated to stack
3848  **/
3849 static void igb_receive_skb(struct igb_ring *ring, u8 status,
3850                             union e1000_adv_rx_desc * rx_desc,
3851                             struct sk_buff *skb)
3852 {
3853         struct igb_adapter * adapter = ring->adapter;
3854         bool vlan_extracted = (adapter->vlgrp && (status & E1000_RXD_STAT_VP));
3855
3856 #ifdef CONFIG_IGB_LRO
3857         if (adapter->netdev->features & NETIF_F_LRO &&
3858             skb->ip_summed == CHECKSUM_UNNECESSARY) {
3859                 if (vlan_extracted)
3860                         lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
3861                                            adapter->vlgrp,
3862                                            le16_to_cpu(rx_desc->wb.upper.vlan),
3863                                            rx_desc);
3864                 else
3865                         lro_receive_skb(&ring->lro_mgr,skb, rx_desc);
3866                 ring->lro_used = 1;
3867         } else {
3868 #endif
3869                 if (vlan_extracted)
3870                         vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3871                                           le16_to_cpu(rx_desc->wb.upper.vlan));
3872                 else
3873
3874                         netif_receive_skb(skb);
3875 #ifdef CONFIG_IGB_LRO
3876         }
3877 #endif
3878 }
3879
3880
3881 static inline void igb_rx_checksum_adv(struct igb_adapter *adapter,
3882                                        u32 status_err, struct sk_buff *skb)
3883 {
3884         skb->ip_summed = CHECKSUM_NONE;
3885
3886         /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3887         if ((status_err & E1000_RXD_STAT_IXSM) || !adapter->rx_csum)
3888                 return;
3889         /* TCP/UDP checksum error bit is set */
3890         if (status_err &
3891             (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
3892                 /* let the stack verify checksum errors */
3893                 adapter->hw_csum_err++;
3894                 return;
3895         }
3896         /* It must be a TCP or UDP packet with a valid checksum */
3897         if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
3898                 skb->ip_summed = CHECKSUM_UNNECESSARY;
3899
3900         adapter->hw_csum_good++;
3901 }
3902
3903 static bool igb_clean_rx_irq_adv(struct igb_ring *rx_ring,
3904                                  int *work_done, int budget)
3905 {
3906         struct igb_adapter *adapter = rx_ring->adapter;
3907         struct net_device *netdev = adapter->netdev;
3908         struct pci_dev *pdev = adapter->pdev;
3909         union e1000_adv_rx_desc *rx_desc , *next_rxd;
3910         struct igb_buffer *buffer_info , *next_buffer;
3911         struct sk_buff *skb;
3912         unsigned int i;
3913         u32 length, hlen, staterr;
3914         bool cleaned = false;
3915         int cleaned_count = 0;
3916         unsigned int total_bytes = 0, total_packets = 0;
3917
3918         i = rx_ring->next_to_clean;
3919         rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3920         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3921
3922         while (staterr & E1000_RXD_STAT_DD) {
3923                 if (*work_done >= budget)
3924                         break;
3925                 (*work_done)++;
3926                 buffer_info = &rx_ring->buffer_info[i];
3927
3928                 /* HW will not DMA in data larger than the given buffer, even
3929                  * if it parses the (NFS, of course) header to be larger.  In
3930                  * that case, it fills the header buffer and spills the rest
3931                  * into the page.
3932                  */
3933                 hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info) &
3934                   E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT;
3935                 if (hlen > adapter->rx_ps_hdr_size)
3936                         hlen = adapter->rx_ps_hdr_size;
3937
3938                 length = le16_to_cpu(rx_desc->wb.upper.length);
3939                 cleaned = true;
3940                 cleaned_count++;
3941
3942                 skb = buffer_info->skb;
3943                 prefetch(skb->data - NET_IP_ALIGN);
3944                 buffer_info->skb = NULL;
3945                 if (!adapter->rx_ps_hdr_size) {
3946                         pci_unmap_single(pdev, buffer_info->dma,
3947                                          adapter->rx_buffer_len +
3948                                            NET_IP_ALIGN,
3949                                          PCI_DMA_FROMDEVICE);
3950                         skb_put(skb, length);
3951                         goto send_up;
3952                 }
3953
3954                 if (!skb_shinfo(skb)->nr_frags) {
3955                         pci_unmap_single(pdev, buffer_info->dma,
3956                                          adapter->rx_ps_hdr_size +
3957                                            NET_IP_ALIGN,
3958                                          PCI_DMA_FROMDEVICE);
3959                         skb_put(skb, hlen);
3960                 }
3961
3962                 if (length) {
3963                         pci_unmap_page(pdev, buffer_info->page_dma,
3964                                        PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
3965                         buffer_info->page_dma = 0;
3966
3967                         skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags++,
3968                                                 buffer_info->page,
3969                                                 buffer_info->page_offset,
3970                                                 length);
3971
3972                         if ((adapter->rx_buffer_len > (PAGE_SIZE / 2)) ||
3973                             (page_count(buffer_info->page) != 1))
3974                                 buffer_info->page = NULL;
3975                         else
3976                                 get_page(buffer_info->page);
3977
3978                         skb->len += length;
3979                         skb->data_len += length;
3980
3981                         skb->truesize += length;
3982                 }
3983 send_up:
3984                 i++;
3985                 if (i == rx_ring->count)
3986                         i = 0;
3987                 next_rxd = E1000_RX_DESC_ADV(*rx_ring, i);
3988                 prefetch(next_rxd);
3989                 next_buffer = &rx_ring->buffer_info[i];
3990
3991                 if (!(staterr & E1000_RXD_STAT_EOP)) {
3992                         buffer_info->skb = xchg(&next_buffer->skb, skb);
3993                         buffer_info->dma = xchg(&next_buffer->dma, 0);
3994                         goto next_desc;
3995                 }
3996
3997                 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
3998                         dev_kfree_skb_irq(skb);
3999                         goto next_desc;
4000                 }
4001
4002                 total_bytes += skb->len;
4003                 total_packets++;
4004
4005                 igb_rx_checksum_adv(adapter, staterr, skb);
4006
4007                 skb->protocol = eth_type_trans(skb, netdev);
4008
4009                 igb_receive_skb(rx_ring, staterr, rx_desc, skb);
4010
4011                 netdev->last_rx = jiffies;
4012
4013 next_desc:
4014                 rx_desc->wb.upper.status_error = 0;
4015
4016                 /* return some buffers to hardware, one at a time is too slow */
4017                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
4018                         igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
4019                         cleaned_count = 0;
4020                 }
4021
4022                 /* use prefetched values */
4023                 rx_desc = next_rxd;
4024                 buffer_info = next_buffer;
4025
4026                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
4027         }
4028
4029         rx_ring->next_to_clean = i;
4030         cleaned_count = IGB_DESC_UNUSED(rx_ring);
4031
4032 #ifdef CONFIG_IGB_LRO
4033         if (rx_ring->lro_used) {
4034                 lro_flush_all(&rx_ring->lro_mgr);
4035                 rx_ring->lro_used = 0;
4036         }
4037 #endif
4038
4039         if (cleaned_count)
4040                 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
4041
4042         rx_ring->total_packets += total_packets;
4043         rx_ring->total_bytes += total_bytes;
4044         rx_ring->rx_stats.packets += total_packets;
4045         rx_ring->rx_stats.bytes += total_bytes;
4046         adapter->net_stats.rx_bytes += total_bytes;
4047         adapter->net_stats.rx_packets += total_packets;
4048         return cleaned;
4049 }
4050
4051
4052 /**
4053  * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
4054  * @adapter: address of board private structure
4055  **/
4056 static void igb_alloc_rx_buffers_adv(struct igb_ring *rx_ring,
4057                                      int cleaned_count)
4058 {
4059         struct igb_adapter *adapter = rx_ring->adapter;
4060         struct net_device *netdev = adapter->netdev;
4061         struct pci_dev *pdev = adapter->pdev;
4062         union e1000_adv_rx_desc *rx_desc;
4063         struct igb_buffer *buffer_info;
4064         struct sk_buff *skb;
4065         unsigned int i;
4066
4067         i = rx_ring->next_to_use;
4068         buffer_info = &rx_ring->buffer_info[i];
4069
4070         while (cleaned_count--) {
4071                 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
4072
4073                 if (adapter->rx_ps_hdr_size && !buffer_info->page_dma) {
4074                         if (!buffer_info->page) {
4075                                 buffer_info->page = alloc_page(GFP_ATOMIC);
4076                                 if (!buffer_info->page) {
4077                                         adapter->alloc_rx_buff_failed++;
4078                                         goto no_buffers;
4079                                 }
4080                                 buffer_info->page_offset = 0;
4081                         } else {
4082                                 buffer_info->page_offset ^= PAGE_SIZE / 2;
4083                         }
4084                         buffer_info->page_dma =
4085                                 pci_map_page(pdev,
4086                                              buffer_info->page,
4087                                              buffer_info->page_offset,
4088                                              PAGE_SIZE / 2,
4089                                              PCI_DMA_FROMDEVICE);
4090                 }
4091
4092                 if (!buffer_info->skb) {
4093                         int bufsz;
4094
4095                         if (adapter->rx_ps_hdr_size)
4096                                 bufsz = adapter->rx_ps_hdr_size;
4097                         else
4098                                 bufsz = adapter->rx_buffer_len;
4099                         bufsz += NET_IP_ALIGN;
4100                         skb = netdev_alloc_skb(netdev, bufsz);
4101
4102                         if (!skb) {
4103                                 adapter->alloc_rx_buff_failed++;
4104                                 goto no_buffers;
4105                         }
4106
4107                         /* Make buffer alignment 2 beyond a 16 byte boundary
4108                          * this will result in a 16 byte aligned IP header after
4109                          * the 14 byte MAC header is removed
4110                          */
4111                         skb_reserve(skb, NET_IP_ALIGN);
4112
4113                         buffer_info->skb = skb;
4114                         buffer_info->dma = pci_map_single(pdev, skb->data,
4115                                                           bufsz,
4116                                                           PCI_DMA_FROMDEVICE);
4117
4118                 }
4119                 /* Refresh the desc even if buffer_addrs didn't change because
4120                  * each write-back erases this info. */
4121                 if (adapter->rx_ps_hdr_size) {
4122                         rx_desc->read.pkt_addr =
4123                              cpu_to_le64(buffer_info->page_dma);
4124                         rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma);
4125                 } else {
4126                         rx_desc->read.pkt_addr =
4127                              cpu_to_le64(buffer_info->dma);
4128                         rx_desc->read.hdr_addr = 0;
4129                 }
4130
4131                 i++;
4132                 if (i == rx_ring->count)
4133                         i = 0;
4134                 buffer_info = &rx_ring->buffer_info[i];
4135         }
4136
4137 no_buffers:
4138         if (rx_ring->next_to_use != i) {
4139                 rx_ring->next_to_use = i;
4140                 if (i == 0)
4141                         i = (rx_ring->count - 1);
4142                 else
4143                         i--;
4144
4145                 /* Force memory writes to complete before letting h/w
4146                  * know there are new descriptors to fetch.  (Only
4147                  * applicable for weak-ordered memory model archs,
4148                  * such as IA-64). */
4149                 wmb();
4150                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
4151         }
4152 }
4153
4154 /**
4155  * igb_mii_ioctl -
4156  * @netdev:
4157  * @ifreq:
4158  * @cmd:
4159  **/
4160 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4161 {
4162         struct igb_adapter *adapter = netdev_priv(netdev);
4163         struct mii_ioctl_data *data = if_mii(ifr);
4164
4165         if (adapter->hw.phy.media_type != e1000_media_type_copper)
4166                 return -EOPNOTSUPP;
4167
4168         switch (cmd) {
4169         case SIOCGMIIPHY:
4170                 data->phy_id = adapter->hw.phy.addr;
4171                 break;
4172         case SIOCGMIIREG:
4173                 if (!capable(CAP_NET_ADMIN))
4174                         return -EPERM;
4175                 if (adapter->hw.phy.ops.read_phy_reg(&adapter->hw,
4176                                                      data->reg_num
4177                                                      & 0x1F, &data->val_out))
4178                         return -EIO;
4179                 break;
4180         case SIOCSMIIREG:
4181         default:
4182                 return -EOPNOTSUPP;
4183         }
4184         return 0;
4185 }
4186
4187 /**
4188  * igb_ioctl -
4189  * @netdev:
4190  * @ifreq:
4191  * @cmd:
4192  **/
4193 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4194 {
4195         switch (cmd) {
4196         case SIOCGMIIPHY:
4197         case SIOCGMIIREG:
4198         case SIOCSMIIREG:
4199                 return igb_mii_ioctl(netdev, ifr, cmd);
4200         default:
4201                 return -EOPNOTSUPP;
4202         }
4203 }
4204
4205 static void igb_vlan_rx_register(struct net_device *netdev,
4206                                  struct vlan_group *grp)
4207 {
4208         struct igb_adapter *adapter = netdev_priv(netdev);
4209         struct e1000_hw *hw = &adapter->hw;
4210         u32 ctrl, rctl;
4211
4212         igb_irq_disable(adapter);
4213         adapter->vlgrp = grp;
4214
4215         if (grp) {
4216                 /* enable VLAN tag insert/strip */
4217                 ctrl = rd32(E1000_CTRL);
4218                 ctrl |= E1000_CTRL_VME;
4219                 wr32(E1000_CTRL, ctrl);
4220
4221                 /* enable VLAN receive filtering */
4222                 rctl = rd32(E1000_RCTL);
4223                 rctl |= E1000_RCTL_VFE;
4224                 rctl &= ~E1000_RCTL_CFIEN;
4225                 wr32(E1000_RCTL, rctl);
4226                 igb_update_mng_vlan(adapter);
4227                 wr32(E1000_RLPML,
4228                                 adapter->max_frame_size + VLAN_TAG_SIZE);
4229         } else {
4230                 /* disable VLAN tag insert/strip */
4231                 ctrl = rd32(E1000_CTRL);
4232                 ctrl &= ~E1000_CTRL_VME;
4233                 wr32(E1000_CTRL, ctrl);
4234
4235                 /* disable VLAN filtering */
4236                 rctl = rd32(E1000_RCTL);
4237                 rctl &= ~E1000_RCTL_VFE;
4238                 wr32(E1000_RCTL, rctl);
4239                 if (adapter->mng_vlan_id != (u16)IGB_MNG_VLAN_NONE) {
4240                         igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4241                         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
4242                 }
4243                 wr32(E1000_RLPML,
4244                                 adapter->max_frame_size);
4245         }
4246
4247         if (!test_bit(__IGB_DOWN, &adapter->state))
4248                 igb_irq_enable(adapter);
4249 }
4250
4251 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
4252 {
4253         struct igb_adapter *adapter = netdev_priv(netdev);
4254         struct e1000_hw *hw = &adapter->hw;
4255         u32 vfta, index;
4256
4257         if ((adapter->hw.mng_cookie.status &
4258              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4259             (vid == adapter->mng_vlan_id))
4260                 return;
4261         /* add VID to filter table */
4262         index = (vid >> 5) & 0x7F;
4263         vfta = array_rd32(E1000_VFTA, index);
4264         vfta |= (1 << (vid & 0x1F));
4265         igb_write_vfta(&adapter->hw, index, vfta);
4266 }
4267
4268 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
4269 {
4270         struct igb_adapter *adapter = netdev_priv(netdev);
4271         struct e1000_hw *hw = &adapter->hw;
4272         u32 vfta, index;
4273
4274         igb_irq_disable(adapter);
4275         vlan_group_set_device(adapter->vlgrp, vid, NULL);
4276
4277         if (!test_bit(__IGB_DOWN, &adapter->state))
4278                 igb_irq_enable(adapter);
4279
4280         if ((adapter->hw.mng_cookie.status &
4281              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4282             (vid == adapter->mng_vlan_id)) {
4283                 /* release control to f/w */
4284                 igb_release_hw_control(adapter);
4285                 return;
4286         }
4287
4288         /* remove VID from filter table */
4289         index = (vid >> 5) & 0x7F;
4290         vfta = array_rd32(E1000_VFTA, index);
4291         vfta &= ~(1 << (vid & 0x1F));
4292         igb_write_vfta(&adapter->hw, index, vfta);
4293 }
4294
4295 static void igb_restore_vlan(struct igb_adapter *adapter)
4296 {
4297         igb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4298
4299         if (adapter->vlgrp) {
4300                 u16 vid;
4301                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4302                         if (!vlan_group_get_device(adapter->vlgrp, vid))
4303                                 continue;
4304                         igb_vlan_rx_add_vid(adapter->netdev, vid);
4305                 }
4306         }
4307 }
4308
4309 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
4310 {
4311         struct e1000_mac_info *mac = &adapter->hw.mac;
4312
4313         mac->autoneg = 0;
4314
4315         /* Fiber NICs only allow 1000 gbps Full duplex */
4316         if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
4317                 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4318                 dev_err(&adapter->pdev->dev,
4319                         "Unsupported Speed/Duplex configuration\n");
4320                 return -EINVAL;
4321         }
4322
4323         switch (spddplx) {
4324         case SPEED_10 + DUPLEX_HALF:
4325                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
4326                 break;
4327         case SPEED_10 + DUPLEX_FULL:
4328                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
4329                 break;
4330         case SPEED_100 + DUPLEX_HALF:
4331                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
4332                 break;
4333         case SPEED_100 + DUPLEX_FULL:
4334                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
4335                 break;
4336         case SPEED_1000 + DUPLEX_FULL:
4337                 mac->autoneg = 1;
4338                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
4339                 break;
4340         case SPEED_1000 + DUPLEX_HALF: /* not supported */
4341         default:
4342                 dev_err(&adapter->pdev->dev,
4343                         "Unsupported Speed/Duplex configuration\n");
4344                 return -EINVAL;
4345         }
4346         return 0;
4347 }
4348
4349
4350 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
4351 {
4352         struct net_device *netdev = pci_get_drvdata(pdev);
4353         struct igb_adapter *adapter = netdev_priv(netdev);
4354         struct e1000_hw *hw = &adapter->hw;
4355         u32 ctrl, rctl, status;
4356         u32 wufc = adapter->wol;
4357 #ifdef CONFIG_PM
4358         int retval = 0;
4359 #endif
4360
4361         netif_device_detach(netdev);
4362
4363         if (netif_running(netdev))
4364                 igb_close(netdev);
4365
4366         igb_reset_interrupt_capability(adapter);
4367
4368         igb_free_queues(adapter);
4369
4370 #ifdef CONFIG_PM
4371         retval = pci_save_state(pdev);
4372         if (retval)
4373                 return retval;
4374 #endif
4375
4376         status = rd32(E1000_STATUS);
4377         if (status & E1000_STATUS_LU)
4378                 wufc &= ~E1000_WUFC_LNKC;
4379
4380         if (wufc) {
4381                 igb_setup_rctl(adapter);
4382                 igb_set_multi(netdev);
4383
4384                 /* turn on all-multi mode if wake on multicast is enabled */
4385                 if (wufc & E1000_WUFC_MC) {
4386                         rctl = rd32(E1000_RCTL);
4387                         rctl |= E1000_RCTL_MPE;
4388                         wr32(E1000_RCTL, rctl);
4389                 }
4390
4391                 ctrl = rd32(E1000_CTRL);
4392                 /* advertise wake from D3Cold */
4393                 #define E1000_CTRL_ADVD3WUC 0x00100000
4394                 /* phy power management enable */
4395                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4396                 ctrl |= E1000_CTRL_ADVD3WUC;
4397                 wr32(E1000_CTRL, ctrl);
4398
4399                 /* Allow time for pending master requests to run */
4400                 igb_disable_pcie_master(&adapter->hw);
4401
4402                 wr32(E1000_WUC, E1000_WUC_PME_EN);
4403                 wr32(E1000_WUFC, wufc);
4404         } else {
4405                 wr32(E1000_WUC, 0);
4406                 wr32(E1000_WUFC, 0);
4407         }
4408
4409         /* make sure adapter isn't asleep if manageability/wol is enabled */
4410         if (wufc || adapter->en_mng_pt) {
4411                 pci_enable_wake(pdev, PCI_D3hot, 1);
4412                 pci_enable_wake(pdev, PCI_D3cold, 1);
4413         } else {
4414                 igb_shutdown_fiber_serdes_link_82575(hw);
4415                 pci_enable_wake(pdev, PCI_D3hot, 0);
4416                 pci_enable_wake(pdev, PCI_D3cold, 0);
4417         }
4418
4419         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
4420          * would have already happened in close and is redundant. */
4421         igb_release_hw_control(adapter);
4422
4423         pci_disable_device(pdev);
4424
4425         pci_set_power_state(pdev, pci_choose_state(pdev, state));
4426
4427         return 0;
4428 }
4429
4430 #ifdef CONFIG_PM
4431 static int igb_resume(struct pci_dev *pdev)
4432 {
4433         struct net_device *netdev = pci_get_drvdata(pdev);
4434         struct igb_adapter *adapter = netdev_priv(netdev);
4435         struct e1000_hw *hw = &adapter->hw;
4436         u32 err;
4437
4438         pci_set_power_state(pdev, PCI_D0);
4439         pci_restore_state(pdev);
4440
4441         if (adapter->need_ioport)
4442                 err = pci_enable_device(pdev);
4443         else
4444                 err = pci_enable_device_mem(pdev);
4445         if (err) {
4446                 dev_err(&pdev->dev,
4447                         "igb: Cannot enable PCI device from suspend\n");
4448                 return err;
4449         }
4450         pci_set_master(pdev);
4451
4452         pci_enable_wake(pdev, PCI_D3hot, 0);
4453         pci_enable_wake(pdev, PCI_D3cold, 0);
4454
4455         igb_set_interrupt_capability(adapter);
4456
4457         if (igb_alloc_queues(adapter)) {
4458                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
4459                 return -ENOMEM;
4460         }
4461
4462         /* e1000_power_up_phy(adapter); */
4463
4464         igb_reset(adapter);
4465         wr32(E1000_WUS, ~0);
4466
4467         if (netif_running(netdev)) {
4468                 err = igb_open(netdev);
4469                 if (err)
4470                         return err;
4471         }
4472
4473         netif_device_attach(netdev);
4474
4475         /* let the f/w know that the h/w is now under the control of the
4476          * driver. */
4477         igb_get_hw_control(adapter);
4478
4479         return 0;
4480 }
4481 #endif
4482
4483 static void igb_shutdown(struct pci_dev *pdev)
4484 {
4485         igb_suspend(pdev, PMSG_SUSPEND);
4486 }
4487
4488 #ifdef CONFIG_NET_POLL_CONTROLLER
4489 /*
4490  * Polling 'interrupt' - used by things like netconsole to send skbs
4491  * without having to re-enable interrupts. It's not called while
4492  * the interrupt routine is executing.
4493  */
4494 static void igb_netpoll(struct net_device *netdev)
4495 {
4496         struct igb_adapter *adapter = netdev_priv(netdev);
4497         int i;
4498         int work_done = 0;
4499
4500         igb_irq_disable(adapter);
4501         adapter->flags |= IGB_FLAG_IN_NETPOLL;
4502
4503         for (i = 0; i < adapter->num_tx_queues; i++)
4504                 igb_clean_tx_irq(&adapter->tx_ring[i]);
4505
4506         for (i = 0; i < adapter->num_rx_queues; i++)
4507                 igb_clean_rx_irq_adv(&adapter->rx_ring[i],
4508                                      &work_done,
4509                                      adapter->rx_ring[i].napi.weight);
4510
4511         adapter->flags &= ~IGB_FLAG_IN_NETPOLL;
4512         igb_irq_enable(adapter);
4513 }
4514 #endif /* CONFIG_NET_POLL_CONTROLLER */
4515
4516 /**
4517  * igb_io_error_detected - called when PCI error is detected
4518  * @pdev: Pointer to PCI device
4519  * @state: The current pci connection state
4520  *
4521  * This function is called after a PCI bus error affecting
4522  * this device has been detected.
4523  */
4524 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
4525                                               pci_channel_state_t state)
4526 {
4527         struct net_device *netdev = pci_get_drvdata(pdev);
4528         struct igb_adapter *adapter = netdev_priv(netdev);
4529
4530         netif_device_detach(netdev);
4531
4532         if (netif_running(netdev))
4533                 igb_down(adapter);
4534         pci_disable_device(pdev);
4535
4536         /* Request a slot slot reset. */
4537         return PCI_ERS_RESULT_NEED_RESET;
4538 }
4539
4540 /**
4541  * igb_io_slot_reset - called after the pci bus has been reset.
4542  * @pdev: Pointer to PCI device
4543  *
4544  * Restart the card from scratch, as if from a cold-boot. Implementation
4545  * resembles the first-half of the igb_resume routine.
4546  */
4547 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
4548 {
4549         struct net_device *netdev = pci_get_drvdata(pdev);
4550         struct igb_adapter *adapter = netdev_priv(netdev);
4551         struct e1000_hw *hw = &adapter->hw;
4552         int err;
4553
4554         if (adapter->need_ioport)
4555                 err = pci_enable_device(pdev);
4556         else
4557                 err = pci_enable_device_mem(pdev);
4558         if (err) {
4559                 dev_err(&pdev->dev,
4560                         "Cannot re-enable PCI device after reset.\n");
4561                 return PCI_ERS_RESULT_DISCONNECT;
4562         }
4563         pci_set_master(pdev);
4564         pci_restore_state(pdev);
4565
4566         pci_enable_wake(pdev, PCI_D3hot, 0);
4567         pci_enable_wake(pdev, PCI_D3cold, 0);
4568
4569         igb_reset(adapter);
4570         wr32(E1000_WUS, ~0);
4571
4572         return PCI_ERS_RESULT_RECOVERED;
4573 }
4574
4575 /**
4576  * igb_io_resume - called when traffic can start flowing again.
4577  * @pdev: Pointer to PCI device
4578  *
4579  * This callback is called when the error recovery driver tells us that
4580  * its OK to resume normal operation. Implementation resembles the
4581  * second-half of the igb_resume routine.
4582  */
4583 static void igb_io_resume(struct pci_dev *pdev)
4584 {
4585         struct net_device *netdev = pci_get_drvdata(pdev);
4586         struct igb_adapter *adapter = netdev_priv(netdev);
4587
4588         igb_init_manageability(adapter);
4589
4590         if (netif_running(netdev)) {
4591                 if (igb_up(adapter)) {
4592                         dev_err(&pdev->dev, "igb_up failed after reset\n");
4593                         return;
4594                 }
4595         }
4596
4597         netif_device_attach(netdev);
4598
4599         /* let the f/w know that the h/w is now under the control of the
4600          * driver. */
4601         igb_get_hw_control(adapter);
4602
4603 }
4604
4605 /* igb_main.c */