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[PATCH] e1000: Fix collision distance
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1 /*******************************************************************************
2
3   
4   Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
5   
6   This program is free software; you can redistribute it and/or modify it 
7   under the terms of the GNU General Public License as published by the Free 
8   Software Foundation; either version 2 of the License, or (at your option) 
9   any later version.
10   
11   This program is distributed in the hope that it will be useful, but WITHOUT 
12   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 
13   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for 
14   more details.
15   
16   You should have received a copy of the GNU General Public License along with
17   this program; if not, write to the Free Software Foundation, Inc., 59 
18   Temple Place - Suite 330, Boston, MA  02111-1307, USA.
19   
20   The full GNU General Public License is included in this distribution in the
21   file called LICENSE.
22   
23   Contact Information:
24   Linux NICS <linux.nics@intel.com>
25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30
31 /* Change Log
32  * 6.0.58       4/20/05
33  *   o Accepted ethtool cleanup patch from Stephen Hemminger 
34  * 6.0.44+      2/15/05
35  *   o applied Anton's patch to resolve tx hang in hardware
36  *   o Applied Andrew Mortons patch - e1000 stops working after resume
37  */
38
39 char e1000_driver_name[] = "e1000";
40 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
41 #ifndef CONFIG_E1000_NAPI
42 #define DRIVERNAPI
43 #else
44 #define DRIVERNAPI "-NAPI"
45 #endif
46 #define DRV_VERSION "6.3.9-k2"DRIVERNAPI
47 char e1000_driver_version[] = DRV_VERSION;
48 static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
49
50 /* e1000_pci_tbl - PCI Device ID Table
51  *
52  * Last entry must be all 0s
53  *
54  * Macro expands to...
55  *   {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
56  */
57 static struct pci_device_id e1000_pci_tbl[] = {
58         INTEL_E1000_ETHERNET_DEVICE(0x1000),
59         INTEL_E1000_ETHERNET_DEVICE(0x1001),
60         INTEL_E1000_ETHERNET_DEVICE(0x1004),
61         INTEL_E1000_ETHERNET_DEVICE(0x1008),
62         INTEL_E1000_ETHERNET_DEVICE(0x1009),
63         INTEL_E1000_ETHERNET_DEVICE(0x100C),
64         INTEL_E1000_ETHERNET_DEVICE(0x100D),
65         INTEL_E1000_ETHERNET_DEVICE(0x100E),
66         INTEL_E1000_ETHERNET_DEVICE(0x100F),
67         INTEL_E1000_ETHERNET_DEVICE(0x1010),
68         INTEL_E1000_ETHERNET_DEVICE(0x1011),
69         INTEL_E1000_ETHERNET_DEVICE(0x1012),
70         INTEL_E1000_ETHERNET_DEVICE(0x1013),
71         INTEL_E1000_ETHERNET_DEVICE(0x1014),
72         INTEL_E1000_ETHERNET_DEVICE(0x1015),
73         INTEL_E1000_ETHERNET_DEVICE(0x1016),
74         INTEL_E1000_ETHERNET_DEVICE(0x1017),
75         INTEL_E1000_ETHERNET_DEVICE(0x1018),
76         INTEL_E1000_ETHERNET_DEVICE(0x1019),
77         INTEL_E1000_ETHERNET_DEVICE(0x101A),
78         INTEL_E1000_ETHERNET_DEVICE(0x101D),
79         INTEL_E1000_ETHERNET_DEVICE(0x101E),
80         INTEL_E1000_ETHERNET_DEVICE(0x1026),
81         INTEL_E1000_ETHERNET_DEVICE(0x1027),
82         INTEL_E1000_ETHERNET_DEVICE(0x1028),
83         INTEL_E1000_ETHERNET_DEVICE(0x105E),
84         INTEL_E1000_ETHERNET_DEVICE(0x105F),
85         INTEL_E1000_ETHERNET_DEVICE(0x1060),
86         INTEL_E1000_ETHERNET_DEVICE(0x1075),
87         INTEL_E1000_ETHERNET_DEVICE(0x1076),
88         INTEL_E1000_ETHERNET_DEVICE(0x1077),
89         INTEL_E1000_ETHERNET_DEVICE(0x1078),
90         INTEL_E1000_ETHERNET_DEVICE(0x1079),
91         INTEL_E1000_ETHERNET_DEVICE(0x107A),
92         INTEL_E1000_ETHERNET_DEVICE(0x107B),
93         INTEL_E1000_ETHERNET_DEVICE(0x107C),
94         INTEL_E1000_ETHERNET_DEVICE(0x107D),
95         INTEL_E1000_ETHERNET_DEVICE(0x107E),
96         INTEL_E1000_ETHERNET_DEVICE(0x107F),
97         INTEL_E1000_ETHERNET_DEVICE(0x108A),
98         INTEL_E1000_ETHERNET_DEVICE(0x108B),
99         INTEL_E1000_ETHERNET_DEVICE(0x108C),
100         INTEL_E1000_ETHERNET_DEVICE(0x109A),
101         /* required last entry */
102         {0,}
103 };
104
105 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
106
107 int e1000_up(struct e1000_adapter *adapter);
108 void e1000_down(struct e1000_adapter *adapter);
109 void e1000_reset(struct e1000_adapter *adapter);
110 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
111 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
112 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
113 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
114 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
115 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
116                                     struct e1000_tx_ring *txdr);
117 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
118                                     struct e1000_rx_ring *rxdr);
119 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
120                                     struct e1000_tx_ring *tx_ring);
121 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
122                                     struct e1000_rx_ring *rx_ring);
123 void e1000_update_stats(struct e1000_adapter *adapter);
124
125 /* Local Function Prototypes */
126
127 static int e1000_init_module(void);
128 static void e1000_exit_module(void);
129 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
130 static void __devexit e1000_remove(struct pci_dev *pdev);
131 static int e1000_alloc_queues(struct e1000_adapter *adapter);
132 #ifdef CONFIG_E1000_MQ
133 static void e1000_setup_queue_mapping(struct e1000_adapter *adapter);
134 #endif
135 static int e1000_sw_init(struct e1000_adapter *adapter);
136 static int e1000_open(struct net_device *netdev);
137 static int e1000_close(struct net_device *netdev);
138 static void e1000_configure_tx(struct e1000_adapter *adapter);
139 static void e1000_configure_rx(struct e1000_adapter *adapter);
140 static void e1000_setup_rctl(struct e1000_adapter *adapter);
141 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
142 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
143 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
144                                 struct e1000_tx_ring *tx_ring);
145 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
146                                 struct e1000_rx_ring *rx_ring);
147 static void e1000_set_multi(struct net_device *netdev);
148 static void e1000_update_phy_info(unsigned long data);
149 static void e1000_watchdog(unsigned long data);
150 static void e1000_watchdog_task(struct e1000_adapter *adapter);
151 static void e1000_82547_tx_fifo_stall(unsigned long data);
152 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
153 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
154 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
155 static int e1000_set_mac(struct net_device *netdev, void *p);
156 static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
157 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
158                                     struct e1000_tx_ring *tx_ring);
159 #ifdef CONFIG_E1000_NAPI
160 static int e1000_clean(struct net_device *poll_dev, int *budget);
161 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
162                                     struct e1000_rx_ring *rx_ring,
163                                     int *work_done, int work_to_do);
164 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
165                                        struct e1000_rx_ring *rx_ring,
166                                        int *work_done, int work_to_do);
167 #else
168 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
169                                     struct e1000_rx_ring *rx_ring);
170 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
171                                        struct e1000_rx_ring *rx_ring);
172 #endif
173 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
174                                    struct e1000_rx_ring *rx_ring);
175 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
176                                       struct e1000_rx_ring *rx_ring);
177 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
178 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
179                            int cmd);
180 void e1000_set_ethtool_ops(struct net_device *netdev);
181 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
182 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
183 static void e1000_tx_timeout(struct net_device *dev);
184 static void e1000_tx_timeout_task(struct net_device *dev);
185 static void e1000_smartspeed(struct e1000_adapter *adapter);
186 static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
187                                               struct sk_buff *skb);
188
189 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
190 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
191 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
192 static void e1000_restore_vlan(struct e1000_adapter *adapter);
193
194 #ifdef CONFIG_PM
195 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
196 static int e1000_resume(struct pci_dev *pdev);
197 #endif
198
199 #ifdef CONFIG_NET_POLL_CONTROLLER
200 /* for netdump / net console */
201 static void e1000_netpoll (struct net_device *netdev);
202 #endif
203
204 #ifdef CONFIG_E1000_MQ
205 /* for multiple Rx queues */
206 void e1000_rx_schedule(void *data);
207 #endif
208
209 /* Exported from other modules */
210
211 extern void e1000_check_options(struct e1000_adapter *adapter);
212
213 static struct pci_driver e1000_driver = {
214         .name     = e1000_driver_name,
215         .id_table = e1000_pci_tbl,
216         .probe    = e1000_probe,
217         .remove   = __devexit_p(e1000_remove),
218         /* Power Managment Hooks */
219 #ifdef CONFIG_PM
220         .suspend  = e1000_suspend,
221         .resume   = e1000_resume
222 #endif
223 };
224
225 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
226 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
227 MODULE_LICENSE("GPL");
228 MODULE_VERSION(DRV_VERSION);
229
230 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
231 module_param(debug, int, 0);
232 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
233
234 /**
235  * e1000_init_module - Driver Registration Routine
236  *
237  * e1000_init_module is the first routine called when the driver is
238  * loaded. All it does is register with the PCI subsystem.
239  **/
240
241 static int __init
242 e1000_init_module(void)
243 {
244         int ret;
245         printk(KERN_INFO "%s - version %s\n",
246                e1000_driver_string, e1000_driver_version);
247
248         printk(KERN_INFO "%s\n", e1000_copyright);
249
250         ret = pci_module_init(&e1000_driver);
251
252         return ret;
253 }
254
255 module_init(e1000_init_module);
256
257 /**
258  * e1000_exit_module - Driver Exit Cleanup Routine
259  *
260  * e1000_exit_module is called just before the driver is removed
261  * from memory.
262  **/
263
264 static void __exit
265 e1000_exit_module(void)
266 {
267         pci_unregister_driver(&e1000_driver);
268 }
269
270 module_exit(e1000_exit_module);
271
272 /**
273  * e1000_irq_disable - Mask off interrupt generation on the NIC
274  * @adapter: board private structure
275  **/
276
277 static inline void
278 e1000_irq_disable(struct e1000_adapter *adapter)
279 {
280         atomic_inc(&adapter->irq_sem);
281         E1000_WRITE_REG(&adapter->hw, IMC, ~0);
282         E1000_WRITE_FLUSH(&adapter->hw);
283         synchronize_irq(adapter->pdev->irq);
284 }
285
286 /**
287  * e1000_irq_enable - Enable default interrupt generation settings
288  * @adapter: board private structure
289  **/
290
291 static inline void
292 e1000_irq_enable(struct e1000_adapter *adapter)
293 {
294         if(likely(atomic_dec_and_test(&adapter->irq_sem))) {
295                 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
296                 E1000_WRITE_FLUSH(&adapter->hw);
297         }
298 }
299
300 static void
301 e1000_update_mng_vlan(struct e1000_adapter *adapter)
302 {
303         struct net_device *netdev = adapter->netdev;
304         uint16_t vid = adapter->hw.mng_cookie.vlan_id;
305         uint16_t old_vid = adapter->mng_vlan_id;
306         if(adapter->vlgrp) {
307                 if(!adapter->vlgrp->vlan_devices[vid]) {
308                         if(adapter->hw.mng_cookie.status &
309                                 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
310                                 e1000_vlan_rx_add_vid(netdev, vid);
311                                 adapter->mng_vlan_id = vid;
312                         } else
313                                 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
314                                 
315                         if((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
316                                         (vid != old_vid) && 
317                                         !adapter->vlgrp->vlan_devices[old_vid])
318                                 e1000_vlan_rx_kill_vid(netdev, old_vid);
319                 }
320         }
321 }
322
323 /**
324  * e1000_release_hw_control - release control of the h/w to f/w
325  * @adapter: address of board private structure
326  *
327  * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
328  * For ASF and Pass Through versions of f/w this means that the
329  * driver is no longer loaded. For AMT version (only with 82573) i
330  * of the f/w this means that the netowrk i/f is closed.
331  * 
332  **/
333
334 static inline void 
335 e1000_release_hw_control(struct e1000_adapter *adapter)
336 {
337         uint32_t ctrl_ext;
338         uint32_t swsm;
339
340         /* Let firmware taken over control of h/w */
341         switch (adapter->hw.mac_type) {
342         case e1000_82571:
343         case e1000_82572:
344                 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
345                 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
346                                 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
347                 break;
348         case e1000_82573:
349                 swsm = E1000_READ_REG(&adapter->hw, SWSM);
350                 E1000_WRITE_REG(&adapter->hw, SWSM,
351                                 swsm & ~E1000_SWSM_DRV_LOAD);
352         default:
353                 break;
354         }
355 }
356
357 /**
358  * e1000_get_hw_control - get control of the h/w from f/w
359  * @adapter: address of board private structure
360  *
361  * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
362  * For ASF and Pass Through versions of f/w this means that 
363  * the driver is loaded. For AMT version (only with 82573) 
364  * of the f/w this means that the netowrk i/f is open.
365  * 
366  **/
367
368 static inline void 
369 e1000_get_hw_control(struct e1000_adapter *adapter)
370 {
371         uint32_t ctrl_ext;
372         uint32_t swsm;
373         /* Let firmware know the driver has taken over */
374         switch (adapter->hw.mac_type) {
375         case e1000_82571:
376         case e1000_82572:
377                 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
378                 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
379                                 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
380                 break;
381         case e1000_82573:
382                 swsm = E1000_READ_REG(&adapter->hw, SWSM);
383                 E1000_WRITE_REG(&adapter->hw, SWSM,
384                                 swsm | E1000_SWSM_DRV_LOAD);
385                 break;
386         default:
387                 break;
388         }
389 }
390
391 int
392 e1000_up(struct e1000_adapter *adapter)
393 {
394         struct net_device *netdev = adapter->netdev;
395         int i, err;
396
397         /* hardware has been reset, we need to reload some things */
398
399         /* Reset the PHY if it was previously powered down */
400         if(adapter->hw.media_type == e1000_media_type_copper) {
401                 uint16_t mii_reg;
402                 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
403                 if(mii_reg & MII_CR_POWER_DOWN)
404                         e1000_phy_reset(&adapter->hw);
405         }
406
407         e1000_set_multi(netdev);
408
409         e1000_restore_vlan(adapter);
410
411         e1000_configure_tx(adapter);
412         e1000_setup_rctl(adapter);
413         e1000_configure_rx(adapter);
414         for (i = 0; i < adapter->num_rx_queues; i++) {
415                 adapter->alloc_rx_buf(adapter, &adapter->rx_ring[i]);
416         }
417
418 #ifdef CONFIG_PCI_MSI
419         if(adapter->hw.mac_type > e1000_82547_rev_2) {
420                 adapter->have_msi = TRUE;
421                 if((err = pci_enable_msi(adapter->pdev))) {
422                         DPRINTK(PROBE, ERR,
423                          "Unable to allocate MSI interrupt Error: %d\n", err);
424                         adapter->have_msi = FALSE;
425                 }
426         }
427 #endif
428         if((err = request_irq(adapter->pdev->irq, &e1000_intr,
429                               SA_SHIRQ | SA_SAMPLE_RANDOM,
430                               netdev->name, netdev))) {
431                 DPRINTK(PROBE, ERR,
432                     "Unable to allocate interrupt Error: %d\n", err);
433                 return err;
434         }
435
436 #ifdef CONFIG_E1000_MQ
437         e1000_setup_queue_mapping(adapter);
438 #endif
439
440         adapter->tx_queue_len = netdev->tx_queue_len;
441
442         mod_timer(&adapter->watchdog_timer, jiffies);
443
444 #ifdef CONFIG_E1000_NAPI
445         netif_poll_enable(netdev);
446 #endif
447         e1000_irq_enable(adapter);
448
449         return 0;
450 }
451
452 void
453 e1000_down(struct e1000_adapter *adapter)
454 {
455         struct net_device *netdev = adapter->netdev;
456         boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
457                                      e1000_check_mng_mode(&adapter->hw);
458
459         e1000_irq_disable(adapter);
460 #ifdef CONFIG_E1000_MQ
461         while (atomic_read(&adapter->rx_sched_call_data.count) != 0);
462 #endif
463         free_irq(adapter->pdev->irq, netdev);
464 #ifdef CONFIG_PCI_MSI
465         if(adapter->hw.mac_type > e1000_82547_rev_2 &&
466            adapter->have_msi == TRUE)
467                 pci_disable_msi(adapter->pdev);
468 #endif
469         del_timer_sync(&adapter->tx_fifo_stall_timer);
470         del_timer_sync(&adapter->watchdog_timer);
471         del_timer_sync(&adapter->phy_info_timer);
472
473 #ifdef CONFIG_E1000_NAPI
474         netif_poll_disable(netdev);
475 #endif
476         netdev->tx_queue_len = adapter->tx_queue_len;
477         adapter->link_speed = 0;
478         adapter->link_duplex = 0;
479         netif_carrier_off(netdev);
480         netif_stop_queue(netdev);
481
482         e1000_reset(adapter);
483         e1000_clean_all_tx_rings(adapter);
484         e1000_clean_all_rx_rings(adapter);
485
486         /* Power down the PHY so no link is implied when interface is down *
487          * The PHY cannot be powered down if any of the following is TRUE *
488          * (a) WoL is enabled
489          * (b) AMT is active
490          * (c) SoL/IDER session is active */
491         if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
492            adapter->hw.media_type == e1000_media_type_copper &&
493            !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
494            !mng_mode_enabled &&
495            !e1000_check_phy_reset_block(&adapter->hw)) {
496                 uint16_t mii_reg;
497                 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
498                 mii_reg |= MII_CR_POWER_DOWN;
499                 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
500                 mdelay(1);
501         }
502 }
503
504 void
505 e1000_reset(struct e1000_adapter *adapter)
506 {
507         uint32_t pba, manc;
508         uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
509
510         /* Repartition Pba for greater than 9k mtu
511          * To take effect CTRL.RST is required.
512          */
513
514         switch (adapter->hw.mac_type) {
515         case e1000_82547:
516         case e1000_82547_rev_2:
517                 pba = E1000_PBA_30K;
518                 break;
519         case e1000_82571:
520         case e1000_82572:
521                 pba = E1000_PBA_38K;
522                 break;
523         case e1000_82573:
524                 pba = E1000_PBA_12K;
525                 break;
526         default:
527                 pba = E1000_PBA_48K;
528                 break;
529         }
530
531         if((adapter->hw.mac_type != e1000_82573) &&
532            (adapter->netdev->mtu > E1000_RXBUFFER_8192))
533                 pba -= 8; /* allocate more FIFO for Tx */
534
535
536         if(adapter->hw.mac_type == e1000_82547) {
537                 adapter->tx_fifo_head = 0;
538                 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
539                 adapter->tx_fifo_size =
540                         (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
541                 atomic_set(&adapter->tx_fifo_stall, 0);
542         }
543
544         E1000_WRITE_REG(&adapter->hw, PBA, pba);
545
546         /* flow control settings */
547         /* Set the FC high water mark to 90% of the FIFO size.
548          * Required to clear last 3 LSB */
549         fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
550
551         adapter->hw.fc_high_water = fc_high_water_mark;
552         adapter->hw.fc_low_water = fc_high_water_mark - 8;
553         adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
554         adapter->hw.fc_send_xon = 1;
555         adapter->hw.fc = adapter->hw.original_fc;
556
557         /* Allow time for pending master requests to run */
558         e1000_reset_hw(&adapter->hw);
559         if(adapter->hw.mac_type >= e1000_82544)
560                 E1000_WRITE_REG(&adapter->hw, WUC, 0);
561         if(e1000_init_hw(&adapter->hw))
562                 DPRINTK(PROBE, ERR, "Hardware Error\n");
563         e1000_update_mng_vlan(adapter);
564         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
565         E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
566
567         e1000_reset_adaptive(&adapter->hw);
568         e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
569         if (adapter->en_mng_pt) {
570                 manc = E1000_READ_REG(&adapter->hw, MANC);
571                 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
572                 E1000_WRITE_REG(&adapter->hw, MANC, manc);
573         }
574 }
575
576 /**
577  * e1000_probe - Device Initialization Routine
578  * @pdev: PCI device information struct
579  * @ent: entry in e1000_pci_tbl
580  *
581  * Returns 0 on success, negative on failure
582  *
583  * e1000_probe initializes an adapter identified by a pci_dev structure.
584  * The OS initialization, configuring of the adapter private structure,
585  * and a hardware reset occur.
586  **/
587
588 static int __devinit
589 e1000_probe(struct pci_dev *pdev,
590             const struct pci_device_id *ent)
591 {
592         struct net_device *netdev;
593         struct e1000_adapter *adapter;
594         unsigned long mmio_start, mmio_len;
595
596         static int cards_found = 0;
597         int i, err, pci_using_dac;
598         uint16_t eeprom_data;
599         uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
600         if((err = pci_enable_device(pdev)))
601                 return err;
602
603         if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
604                 pci_using_dac = 1;
605         } else {
606                 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
607                         E1000_ERR("No usable DMA configuration, aborting\n");
608                         return err;
609                 }
610                 pci_using_dac = 0;
611         }
612
613         if((err = pci_request_regions(pdev, e1000_driver_name)))
614                 return err;
615
616         pci_set_master(pdev);
617
618         netdev = alloc_etherdev(sizeof(struct e1000_adapter));
619         if(!netdev) {
620                 err = -ENOMEM;
621                 goto err_alloc_etherdev;
622         }
623
624         SET_MODULE_OWNER(netdev);
625         SET_NETDEV_DEV(netdev, &pdev->dev);
626
627         pci_set_drvdata(pdev, netdev);
628         adapter = netdev_priv(netdev);
629         adapter->netdev = netdev;
630         adapter->pdev = pdev;
631         adapter->hw.back = adapter;
632         adapter->msg_enable = (1 << debug) - 1;
633
634         mmio_start = pci_resource_start(pdev, BAR_0);
635         mmio_len = pci_resource_len(pdev, BAR_0);
636
637         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
638         if(!adapter->hw.hw_addr) {
639                 err = -EIO;
640                 goto err_ioremap;
641         }
642
643         for(i = BAR_1; i <= BAR_5; i++) {
644                 if(pci_resource_len(pdev, i) == 0)
645                         continue;
646                 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
647                         adapter->hw.io_base = pci_resource_start(pdev, i);
648                         break;
649                 }
650         }
651
652         netdev->open = &e1000_open;
653         netdev->stop = &e1000_close;
654         netdev->hard_start_xmit = &e1000_xmit_frame;
655         netdev->get_stats = &e1000_get_stats;
656         netdev->set_multicast_list = &e1000_set_multi;
657         netdev->set_mac_address = &e1000_set_mac;
658         netdev->change_mtu = &e1000_change_mtu;
659         netdev->do_ioctl = &e1000_ioctl;
660         e1000_set_ethtool_ops(netdev);
661         netdev->tx_timeout = &e1000_tx_timeout;
662         netdev->watchdog_timeo = 5 * HZ;
663 #ifdef CONFIG_E1000_NAPI
664         netdev->poll = &e1000_clean;
665         netdev->weight = 64;
666 #endif
667         netdev->vlan_rx_register = e1000_vlan_rx_register;
668         netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
669         netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
670 #ifdef CONFIG_NET_POLL_CONTROLLER
671         netdev->poll_controller = e1000_netpoll;
672 #endif
673         strcpy(netdev->name, pci_name(pdev));
674
675         netdev->mem_start = mmio_start;
676         netdev->mem_end = mmio_start + mmio_len;
677         netdev->base_addr = adapter->hw.io_base;
678
679         adapter->bd_number = cards_found;
680
681         /* setup the private structure */
682
683         if((err = e1000_sw_init(adapter)))
684                 goto err_sw_init;
685
686         if((err = e1000_check_phy_reset_block(&adapter->hw)))
687                 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
688
689         if(adapter->hw.mac_type >= e1000_82543) {
690                 netdev->features = NETIF_F_SG |
691                                    NETIF_F_HW_CSUM |
692                                    NETIF_F_HW_VLAN_TX |
693                                    NETIF_F_HW_VLAN_RX |
694                                    NETIF_F_HW_VLAN_FILTER;
695         }
696
697 #ifdef NETIF_F_TSO
698         if((adapter->hw.mac_type >= e1000_82544) &&
699            (adapter->hw.mac_type != e1000_82547))
700                 netdev->features |= NETIF_F_TSO;
701
702 #ifdef NETIF_F_TSO_IPV6
703         if(adapter->hw.mac_type > e1000_82547_rev_2)
704                 netdev->features |= NETIF_F_TSO_IPV6;
705 #endif
706 #endif
707         if(pci_using_dac)
708                 netdev->features |= NETIF_F_HIGHDMA;
709
710         /* hard_start_xmit is safe against parallel locking */
711         netdev->features |= NETIF_F_LLTX; 
712  
713         adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
714
715         /* before reading the EEPROM, reset the controller to 
716          * put the device in a known good starting state */
717         
718         e1000_reset_hw(&adapter->hw);
719
720         /* make sure the EEPROM is good */
721
722         if(e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
723                 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
724                 err = -EIO;
725                 goto err_eeprom;
726         }
727
728         /* copy the MAC address out of the EEPROM */
729
730         if(e1000_read_mac_addr(&adapter->hw))
731                 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
732         memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
733         memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
734
735         if(!is_valid_ether_addr(netdev->perm_addr)) {
736                 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
737                 err = -EIO;
738                 goto err_eeprom;
739         }
740
741         e1000_read_part_num(&adapter->hw, &(adapter->part_num));
742
743         e1000_get_bus_info(&adapter->hw);
744
745         init_timer(&adapter->tx_fifo_stall_timer);
746         adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
747         adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
748
749         init_timer(&adapter->watchdog_timer);
750         adapter->watchdog_timer.function = &e1000_watchdog;
751         adapter->watchdog_timer.data = (unsigned long) adapter;
752
753         INIT_WORK(&adapter->watchdog_task,
754                 (void (*)(void *))e1000_watchdog_task, adapter);
755
756         init_timer(&adapter->phy_info_timer);
757         adapter->phy_info_timer.function = &e1000_update_phy_info;
758         adapter->phy_info_timer.data = (unsigned long) adapter;
759
760         INIT_WORK(&adapter->tx_timeout_task,
761                 (void (*)(void *))e1000_tx_timeout_task, netdev);
762
763         /* we're going to reset, so assume we have no link for now */
764
765         netif_carrier_off(netdev);
766         netif_stop_queue(netdev);
767
768         e1000_check_options(adapter);
769
770         /* Initial Wake on LAN setting
771          * If APM wake is enabled in the EEPROM,
772          * enable the ACPI Magic Packet filter
773          */
774
775         switch(adapter->hw.mac_type) {
776         case e1000_82542_rev2_0:
777         case e1000_82542_rev2_1:
778         case e1000_82543:
779                 break;
780         case e1000_82544:
781                 e1000_read_eeprom(&adapter->hw,
782                         EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
783                 eeprom_apme_mask = E1000_EEPROM_82544_APM;
784                 break;
785         case e1000_82546:
786         case e1000_82546_rev_3:
787         case e1000_82571:
788                 if((E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
789                    && (adapter->hw.media_type == e1000_media_type_copper)) {
790                         e1000_read_eeprom(&adapter->hw,
791                                 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
792                         break;
793                 }
794                 /* Fall Through */
795         default:
796                 e1000_read_eeprom(&adapter->hw,
797                         EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
798                 break;
799         }
800         if(eeprom_data & eeprom_apme_mask)
801                 adapter->wol |= E1000_WUFC_MAG;
802
803         /* reset the hardware with the new settings */
804         e1000_reset(adapter);
805
806         /* If the controller is 82573 and f/w is AMT, do not set
807          * DRV_LOAD until the interface is up.  For all other cases,
808          * let the f/w know that the h/w is now under the control
809          * of the driver. */
810         if (adapter->hw.mac_type != e1000_82573 ||
811             !e1000_check_mng_mode(&adapter->hw))
812                 e1000_get_hw_control(adapter);
813
814         strcpy(netdev->name, "eth%d");
815         if((err = register_netdev(netdev)))
816                 goto err_register;
817
818         DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
819
820         cards_found++;
821         return 0;
822
823 err_register:
824 err_sw_init:
825 err_eeprom:
826         iounmap(adapter->hw.hw_addr);
827 err_ioremap:
828         free_netdev(netdev);
829 err_alloc_etherdev:
830         pci_release_regions(pdev);
831         return err;
832 }
833
834 /**
835  * e1000_remove - Device Removal Routine
836  * @pdev: PCI device information struct
837  *
838  * e1000_remove is called by the PCI subsystem to alert the driver
839  * that it should release a PCI device.  The could be caused by a
840  * Hot-Plug event, or because the driver is going to be removed from
841  * memory.
842  **/
843
844 static void __devexit
845 e1000_remove(struct pci_dev *pdev)
846 {
847         struct net_device *netdev = pci_get_drvdata(pdev);
848         struct e1000_adapter *adapter = netdev_priv(netdev);
849         uint32_t manc;
850 #ifdef CONFIG_E1000_NAPI
851         int i;
852 #endif
853
854         flush_scheduled_work();
855
856         if(adapter->hw.mac_type >= e1000_82540 &&
857            adapter->hw.media_type == e1000_media_type_copper) {
858                 manc = E1000_READ_REG(&adapter->hw, MANC);
859                 if(manc & E1000_MANC_SMBUS_EN) {
860                         manc |= E1000_MANC_ARP_EN;
861                         E1000_WRITE_REG(&adapter->hw, MANC, manc);
862                 }
863         }
864
865         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
866          * would have already happened in close and is redundant. */
867         e1000_release_hw_control(adapter);
868
869         unregister_netdev(netdev);
870 #ifdef CONFIG_E1000_NAPI
871         for (i = 0; i < adapter->num_rx_queues; i++)
872                 __dev_put(&adapter->polling_netdev[i]);
873 #endif
874
875         if(!e1000_check_phy_reset_block(&adapter->hw))
876                 e1000_phy_hw_reset(&adapter->hw);
877
878         kfree(adapter->tx_ring);
879         kfree(adapter->rx_ring);
880 #ifdef CONFIG_E1000_NAPI
881         kfree(adapter->polling_netdev);
882 #endif
883
884         iounmap(adapter->hw.hw_addr);
885         pci_release_regions(pdev);
886
887 #ifdef CONFIG_E1000_MQ
888         free_percpu(adapter->cpu_netdev);
889         free_percpu(adapter->cpu_tx_ring);
890 #endif
891         free_netdev(netdev);
892
893         pci_disable_device(pdev);
894 }
895
896 /**
897  * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
898  * @adapter: board private structure to initialize
899  *
900  * e1000_sw_init initializes the Adapter private data structure.
901  * Fields are initialized based on PCI device information and
902  * OS network device settings (MTU size).
903  **/
904
905 static int __devinit
906 e1000_sw_init(struct e1000_adapter *adapter)
907 {
908         struct e1000_hw *hw = &adapter->hw;
909         struct net_device *netdev = adapter->netdev;
910         struct pci_dev *pdev = adapter->pdev;
911 #ifdef CONFIG_E1000_NAPI
912         int i;
913 #endif
914
915         /* PCI config space info */
916
917         hw->vendor_id = pdev->vendor;
918         hw->device_id = pdev->device;
919         hw->subsystem_vendor_id = pdev->subsystem_vendor;
920         hw->subsystem_id = pdev->subsystem_device;
921
922         pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
923
924         pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
925
926         adapter->rx_buffer_len = E1000_RXBUFFER_2048;
927         adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
928         hw->max_frame_size = netdev->mtu +
929                              ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
930         hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
931
932         /* identify the MAC */
933
934         if(e1000_set_mac_type(hw)) {
935                 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
936                 return -EIO;
937         }
938
939         /* initialize eeprom parameters */
940
941         if(e1000_init_eeprom_params(hw)) {
942                 E1000_ERR("EEPROM initialization failed\n");
943                 return -EIO;
944         }
945
946         switch(hw->mac_type) {
947         default:
948                 break;
949         case e1000_82541:
950         case e1000_82547:
951         case e1000_82541_rev_2:
952         case e1000_82547_rev_2:
953                 hw->phy_init_script = 1;
954                 break;
955         }
956
957         e1000_set_media_type(hw);
958
959         hw->wait_autoneg_complete = FALSE;
960         hw->tbi_compatibility_en = TRUE;
961         hw->adaptive_ifs = TRUE;
962
963         /* Copper options */
964
965         if(hw->media_type == e1000_media_type_copper) {
966                 hw->mdix = AUTO_ALL_MODES;
967                 hw->disable_polarity_correction = FALSE;
968                 hw->master_slave = E1000_MASTER_SLAVE;
969         }
970
971 #ifdef CONFIG_E1000_MQ
972         /* Number of supported queues */
973         switch (hw->mac_type) {
974         case e1000_82571:
975         case e1000_82572:
976                 /* These controllers support 2 tx queues, but with a single
977                  * qdisc implementation, multiple tx queues aren't quite as
978                  * interesting.  If we can find a logical way of mapping
979                  * flows to a queue, then perhaps we can up the num_tx_queue
980                  * count back to its default.  Until then, we run the risk of
981                  * terrible performance due to SACK overload. */
982                 adapter->num_tx_queues = 1;
983                 adapter->num_rx_queues = 2;
984                 break;
985         default:
986                 adapter->num_tx_queues = 1;
987                 adapter->num_rx_queues = 1;
988                 break;
989         }
990         adapter->num_rx_queues = min(adapter->num_rx_queues, num_online_cpus());
991         adapter->num_tx_queues = min(adapter->num_tx_queues, num_online_cpus());
992         DPRINTK(DRV, INFO, "Multiqueue Enabled: Rx Queue count = %u %s\n",
993                 adapter->num_rx_queues,
994                 ((adapter->num_rx_queues == 1)
995                  ? ((num_online_cpus() > 1)
996                         ? "(due to unsupported feature in current adapter)"
997                         : "(due to unsupported system configuration)")
998                  : ""));
999         DPRINTK(DRV, INFO, "Multiqueue Enabled: Tx Queue count = %u\n",
1000                 adapter->num_tx_queues);
1001 #else
1002         adapter->num_tx_queues = 1;
1003         adapter->num_rx_queues = 1;
1004 #endif
1005
1006         if (e1000_alloc_queues(adapter)) {
1007                 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1008                 return -ENOMEM;
1009         }
1010
1011 #ifdef CONFIG_E1000_NAPI
1012         for (i = 0; i < adapter->num_rx_queues; i++) {
1013                 adapter->polling_netdev[i].priv = adapter;
1014                 adapter->polling_netdev[i].poll = &e1000_clean;
1015                 adapter->polling_netdev[i].weight = 64;
1016                 dev_hold(&adapter->polling_netdev[i]);
1017                 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1018         }
1019         spin_lock_init(&adapter->tx_queue_lock);
1020 #endif
1021
1022         atomic_set(&adapter->irq_sem, 1);
1023         spin_lock_init(&adapter->stats_lock);
1024
1025         return 0;
1026 }
1027
1028 /**
1029  * e1000_alloc_queues - Allocate memory for all rings
1030  * @adapter: board private structure to initialize
1031  *
1032  * We allocate one ring per queue at run-time since we don't know the
1033  * number of queues at compile-time.  The polling_netdev array is
1034  * intended for Multiqueue, but should work fine with a single queue.
1035  **/
1036
1037 static int __devinit
1038 e1000_alloc_queues(struct e1000_adapter *adapter)
1039 {
1040         int size;
1041
1042         size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
1043         adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1044         if (!adapter->tx_ring)
1045                 return -ENOMEM;
1046         memset(adapter->tx_ring, 0, size);
1047
1048         size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
1049         adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1050         if (!adapter->rx_ring) {
1051                 kfree(adapter->tx_ring);
1052                 return -ENOMEM;
1053         }
1054         memset(adapter->rx_ring, 0, size);
1055
1056 #ifdef CONFIG_E1000_NAPI
1057         size = sizeof(struct net_device) * adapter->num_rx_queues;
1058         adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1059         if (!adapter->polling_netdev) {
1060                 kfree(adapter->tx_ring);
1061                 kfree(adapter->rx_ring);
1062                 return -ENOMEM;
1063         }
1064         memset(adapter->polling_netdev, 0, size);
1065 #endif
1066
1067 #ifdef CONFIG_E1000_MQ
1068         adapter->rx_sched_call_data.func = e1000_rx_schedule;
1069         adapter->rx_sched_call_data.info = adapter->netdev;
1070
1071         adapter->cpu_netdev = alloc_percpu(struct net_device *);
1072         adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
1073 #endif
1074
1075         return E1000_SUCCESS;
1076 }
1077
1078 #ifdef CONFIG_E1000_MQ
1079 static void __devinit
1080 e1000_setup_queue_mapping(struct e1000_adapter *adapter)
1081 {
1082         int i, cpu;
1083
1084         adapter->rx_sched_call_data.func = e1000_rx_schedule;
1085         adapter->rx_sched_call_data.info = adapter->netdev;
1086         cpus_clear(adapter->rx_sched_call_data.cpumask);
1087
1088         adapter->cpu_netdev = alloc_percpu(struct net_device *);
1089         adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
1090
1091         lock_cpu_hotplug();
1092         i = 0;
1093         for_each_online_cpu(cpu) {
1094                 *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_tx_queues];
1095                 /* This is incomplete because we'd like to assign separate
1096                  * physical cpus to these netdev polling structures and
1097                  * avoid saturating a subset of cpus.
1098                  */
1099                 if (i < adapter->num_rx_queues) {
1100                         *per_cpu_ptr(adapter->cpu_netdev, cpu) = &adapter->polling_netdev[i];
1101                         adapter->rx_ring[i].cpu = cpu;
1102                         cpu_set(cpu, adapter->cpumask);
1103                 } else
1104                         *per_cpu_ptr(adapter->cpu_netdev, cpu) = NULL;
1105
1106                 i++;
1107         }
1108         unlock_cpu_hotplug();
1109 }
1110 #endif
1111
1112 /**
1113  * e1000_open - Called when a network interface is made active
1114  * @netdev: network interface device structure
1115  *
1116  * Returns 0 on success, negative value on failure
1117  *
1118  * The open entry point is called when a network interface is made
1119  * active by the system (IFF_UP).  At this point all resources needed
1120  * for transmit and receive operations are allocated, the interrupt
1121  * handler is registered with the OS, the watchdog timer is started,
1122  * and the stack is notified that the interface is ready.
1123  **/
1124
1125 static int
1126 e1000_open(struct net_device *netdev)
1127 {
1128         struct e1000_adapter *adapter = netdev_priv(netdev);
1129         int err;
1130
1131         /* allocate transmit descriptors */
1132
1133         if ((err = e1000_setup_all_tx_resources(adapter)))
1134                 goto err_setup_tx;
1135
1136         /* allocate receive descriptors */
1137
1138         if ((err = e1000_setup_all_rx_resources(adapter)))
1139                 goto err_setup_rx;
1140
1141         if((err = e1000_up(adapter)))
1142                 goto err_up;
1143         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1144         if((adapter->hw.mng_cookie.status &
1145                           E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1146                 e1000_update_mng_vlan(adapter);
1147         }
1148
1149         /* If AMT is enabled, let the firmware know that the network
1150          * interface is now open */
1151         if (adapter->hw.mac_type == e1000_82573 &&
1152             e1000_check_mng_mode(&adapter->hw))
1153                 e1000_get_hw_control(adapter);
1154
1155         return E1000_SUCCESS;
1156
1157 err_up:
1158         e1000_free_all_rx_resources(adapter);
1159 err_setup_rx:
1160         e1000_free_all_tx_resources(adapter);
1161 err_setup_tx:
1162         e1000_reset(adapter);
1163
1164         return err;
1165 }
1166
1167 /**
1168  * e1000_close - Disables a network interface
1169  * @netdev: network interface device structure
1170  *
1171  * Returns 0, this is not allowed to fail
1172  *
1173  * The close entry point is called when an interface is de-activated
1174  * by the OS.  The hardware is still under the drivers control, but
1175  * needs to be disabled.  A global MAC reset is issued to stop the
1176  * hardware, and all transmit and receive resources are freed.
1177  **/
1178
1179 static int
1180 e1000_close(struct net_device *netdev)
1181 {
1182         struct e1000_adapter *adapter = netdev_priv(netdev);
1183
1184         e1000_down(adapter);
1185
1186         e1000_free_all_tx_resources(adapter);
1187         e1000_free_all_rx_resources(adapter);
1188
1189         if((adapter->hw.mng_cookie.status &
1190                           E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1191                 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1192         }
1193
1194         /* If AMT is enabled, let the firmware know that the network
1195          * interface is now closed */
1196         if (adapter->hw.mac_type == e1000_82573 &&
1197             e1000_check_mng_mode(&adapter->hw))
1198                 e1000_release_hw_control(adapter);
1199
1200         return 0;
1201 }
1202
1203 /**
1204  * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1205  * @adapter: address of board private structure
1206  * @start: address of beginning of memory
1207  * @len: length of memory
1208  **/
1209 static inline boolean_t
1210 e1000_check_64k_bound(struct e1000_adapter *adapter,
1211                       void *start, unsigned long len)
1212 {
1213         unsigned long begin = (unsigned long) start;
1214         unsigned long end = begin + len;
1215
1216         /* First rev 82545 and 82546 need to not allow any memory
1217          * write location to cross 64k boundary due to errata 23 */
1218         if (adapter->hw.mac_type == e1000_82545 ||
1219             adapter->hw.mac_type == e1000_82546) {
1220                 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1221         }
1222
1223         return TRUE;
1224 }
1225
1226 /**
1227  * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1228  * @adapter: board private structure
1229  * @txdr:    tx descriptor ring (for a specific queue) to setup
1230  *
1231  * Return 0 on success, negative on failure
1232  **/
1233
1234 static int
1235 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1236                          struct e1000_tx_ring *txdr)
1237 {
1238         struct pci_dev *pdev = adapter->pdev;
1239         int size;
1240
1241         size = sizeof(struct e1000_buffer) * txdr->count;
1242
1243         txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
1244         if(!txdr->buffer_info) {
1245                 DPRINTK(PROBE, ERR,
1246                 "Unable to allocate memory for the transmit descriptor ring\n");
1247                 return -ENOMEM;
1248         }
1249         memset(txdr->buffer_info, 0, size);
1250
1251         /* round up to nearest 4K */
1252
1253         txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1254         E1000_ROUNDUP(txdr->size, 4096);
1255
1256         txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1257         if(!txdr->desc) {
1258 setup_tx_desc_die:
1259                 vfree(txdr->buffer_info);
1260                 DPRINTK(PROBE, ERR,
1261                 "Unable to allocate memory for the transmit descriptor ring\n");
1262                 return -ENOMEM;
1263         }
1264
1265         /* Fix for errata 23, can't cross 64kB boundary */
1266         if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1267                 void *olddesc = txdr->desc;
1268                 dma_addr_t olddma = txdr->dma;
1269                 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1270                                      "at %p\n", txdr->size, txdr->desc);
1271                 /* Try again, without freeing the previous */
1272                 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1273                 if(!txdr->desc) {
1274                 /* Failed allocation, critical failure */
1275                         pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1276                         goto setup_tx_desc_die;
1277                 }
1278
1279                 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1280                         /* give up */
1281                         pci_free_consistent(pdev, txdr->size, txdr->desc,
1282                                             txdr->dma);
1283                         pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1284                         DPRINTK(PROBE, ERR,
1285                                 "Unable to allocate aligned memory "
1286                                 "for the transmit descriptor ring\n");
1287                         vfree(txdr->buffer_info);
1288                         return -ENOMEM;
1289                 } else {
1290                         /* Free old allocation, new allocation was successful */
1291                         pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1292                 }
1293         }
1294         memset(txdr->desc, 0, txdr->size);
1295
1296         txdr->next_to_use = 0;
1297         txdr->next_to_clean = 0;
1298         spin_lock_init(&txdr->tx_lock);
1299
1300         return 0;
1301 }
1302
1303 /**
1304  * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1305  *                                (Descriptors) for all queues
1306  * @adapter: board private structure
1307  *
1308  * If this function returns with an error, then it's possible one or
1309  * more of the rings is populated (while the rest are not).  It is the
1310  * callers duty to clean those orphaned rings.
1311  *
1312  * Return 0 on success, negative on failure
1313  **/
1314
1315 int
1316 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1317 {
1318         int i, err = 0;
1319
1320         for (i = 0; i < adapter->num_tx_queues; i++) {
1321                 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1322                 if (err) {
1323                         DPRINTK(PROBE, ERR,
1324                                 "Allocation for Tx Queue %u failed\n", i);
1325                         break;
1326                 }
1327         }
1328
1329         return err;
1330 }
1331
1332 /**
1333  * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1334  * @adapter: board private structure
1335  *
1336  * Configure the Tx unit of the MAC after a reset.
1337  **/
1338
1339 static void
1340 e1000_configure_tx(struct e1000_adapter *adapter)
1341 {
1342         uint64_t tdba;
1343         struct e1000_hw *hw = &adapter->hw;
1344         uint32_t tdlen, tctl, tipg, tarc;
1345         uint32_t ipgr1, ipgr2;
1346
1347         /* Setup the HW Tx Head and Tail descriptor pointers */
1348
1349         switch (adapter->num_tx_queues) {
1350         case 2:
1351                 tdba = adapter->tx_ring[1].dma;
1352                 tdlen = adapter->tx_ring[1].count *
1353                         sizeof(struct e1000_tx_desc);
1354                 E1000_WRITE_REG(hw, TDBAL1, (tdba & 0x00000000ffffffffULL));
1355                 E1000_WRITE_REG(hw, TDBAH1, (tdba >> 32));
1356                 E1000_WRITE_REG(hw, TDLEN1, tdlen);
1357                 E1000_WRITE_REG(hw, TDH1, 0);
1358                 E1000_WRITE_REG(hw, TDT1, 0);
1359                 adapter->tx_ring[1].tdh = E1000_TDH1;
1360                 adapter->tx_ring[1].tdt = E1000_TDT1;
1361                 /* Fall Through */
1362         case 1:
1363         default:
1364                 tdba = adapter->tx_ring[0].dma;
1365                 tdlen = adapter->tx_ring[0].count *
1366                         sizeof(struct e1000_tx_desc);
1367                 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1368                 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1369                 E1000_WRITE_REG(hw, TDLEN, tdlen);
1370                 E1000_WRITE_REG(hw, TDH, 0);
1371                 E1000_WRITE_REG(hw, TDT, 0);
1372                 adapter->tx_ring[0].tdh = E1000_TDH;
1373                 adapter->tx_ring[0].tdt = E1000_TDT;
1374                 break;
1375         }
1376
1377         /* Set the default values for the Tx Inter Packet Gap timer */
1378
1379         if (hw->media_type == e1000_media_type_fiber ||
1380             hw->media_type == e1000_media_type_internal_serdes)
1381                 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1382         else
1383                 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1384
1385         switch (hw->mac_type) {
1386         case e1000_82542_rev2_0:
1387         case e1000_82542_rev2_1:
1388                 tipg = DEFAULT_82542_TIPG_IPGT;
1389                 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1390                 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1391                 break;
1392         default:
1393                 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1394                 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1395                 break;
1396         }
1397         tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1398         tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1399         E1000_WRITE_REG(hw, TIPG, tipg);
1400
1401         /* Set the Tx Interrupt Delay register */
1402
1403         E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1404         if (hw->mac_type >= e1000_82540)
1405                 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1406
1407         /* Program the Transmit Control Register */
1408
1409         tctl = E1000_READ_REG(hw, TCTL);
1410
1411         tctl &= ~E1000_TCTL_CT;
1412         tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC |
1413                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1414
1415         E1000_WRITE_REG(hw, TCTL, tctl);
1416
1417         if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1418                 tarc = E1000_READ_REG(hw, TARC0);
1419                 tarc |= ((1 << 25) | (1 << 21));
1420                 E1000_WRITE_REG(hw, TARC0, tarc);
1421                 tarc = E1000_READ_REG(hw, TARC1);
1422                 tarc |= (1 << 25);
1423                 if (tctl & E1000_TCTL_MULR)
1424                         tarc &= ~(1 << 28);
1425                 else
1426                         tarc |= (1 << 28);
1427                 E1000_WRITE_REG(hw, TARC1, tarc);
1428         }
1429
1430         e1000_config_collision_dist(hw);
1431
1432         /* Setup Transmit Descriptor Settings for eop descriptor */
1433         adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1434                 E1000_TXD_CMD_IFCS;
1435
1436         if (hw->mac_type < e1000_82543)
1437                 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1438         else
1439                 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1440
1441         /* Cache if we're 82544 running in PCI-X because we'll
1442          * need this to apply a workaround later in the send path. */
1443         if (hw->mac_type == e1000_82544 &&
1444             hw->bus_type == e1000_bus_type_pcix)
1445                 adapter->pcix_82544 = 1;
1446 }
1447
1448 /**
1449  * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1450  * @adapter: board private structure
1451  * @rxdr:    rx descriptor ring (for a specific queue) to setup
1452  *
1453  * Returns 0 on success, negative on failure
1454  **/
1455
1456 static int
1457 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1458                          struct e1000_rx_ring *rxdr)
1459 {
1460         struct pci_dev *pdev = adapter->pdev;
1461         int size, desc_len;
1462
1463         size = sizeof(struct e1000_buffer) * rxdr->count;
1464         rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
1465         if (!rxdr->buffer_info) {
1466                 DPRINTK(PROBE, ERR,
1467                 "Unable to allocate memory for the receive descriptor ring\n");
1468                 return -ENOMEM;
1469         }
1470         memset(rxdr->buffer_info, 0, size);
1471
1472         size = sizeof(struct e1000_ps_page) * rxdr->count;
1473         rxdr->ps_page = kmalloc(size, GFP_KERNEL);
1474         if(!rxdr->ps_page) {
1475                 vfree(rxdr->buffer_info);
1476                 DPRINTK(PROBE, ERR,
1477                 "Unable to allocate memory for the receive descriptor ring\n");
1478                 return -ENOMEM;
1479         }
1480         memset(rxdr->ps_page, 0, size);
1481
1482         size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1483         rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
1484         if(!rxdr->ps_page_dma) {
1485                 vfree(rxdr->buffer_info);
1486                 kfree(rxdr->ps_page);
1487                 DPRINTK(PROBE, ERR,
1488                 "Unable to allocate memory for the receive descriptor ring\n");
1489                 return -ENOMEM;
1490         }
1491         memset(rxdr->ps_page_dma, 0, size);
1492
1493         if(adapter->hw.mac_type <= e1000_82547_rev_2)
1494                 desc_len = sizeof(struct e1000_rx_desc);
1495         else
1496                 desc_len = sizeof(union e1000_rx_desc_packet_split);
1497
1498         /* Round up to nearest 4K */
1499
1500         rxdr->size = rxdr->count * desc_len;
1501         E1000_ROUNDUP(rxdr->size, 4096);
1502
1503         rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1504
1505         if (!rxdr->desc) {
1506                 DPRINTK(PROBE, ERR,
1507                 "Unable to allocate memory for the receive descriptor ring\n");
1508 setup_rx_desc_die:
1509                 vfree(rxdr->buffer_info);
1510                 kfree(rxdr->ps_page);
1511                 kfree(rxdr->ps_page_dma);
1512                 return -ENOMEM;
1513         }
1514
1515         /* Fix for errata 23, can't cross 64kB boundary */
1516         if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1517                 void *olddesc = rxdr->desc;
1518                 dma_addr_t olddma = rxdr->dma;
1519                 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1520                                      "at %p\n", rxdr->size, rxdr->desc);
1521                 /* Try again, without freeing the previous */
1522                 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1523                 /* Failed allocation, critical failure */
1524                 if (!rxdr->desc) {
1525                         pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1526                         DPRINTK(PROBE, ERR,
1527                                 "Unable to allocate memory "
1528                                 "for the receive descriptor ring\n");
1529                         goto setup_rx_desc_die;
1530                 }
1531
1532                 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1533                         /* give up */
1534                         pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1535                                             rxdr->dma);
1536                         pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1537                         DPRINTK(PROBE, ERR,
1538                                 "Unable to allocate aligned memory "
1539                                 "for the receive descriptor ring\n");
1540                         goto setup_rx_desc_die;
1541                 } else {
1542                         /* Free old allocation, new allocation was successful */
1543                         pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1544                 }
1545         }
1546         memset(rxdr->desc, 0, rxdr->size);
1547
1548         rxdr->next_to_clean = 0;
1549         rxdr->next_to_use = 0;
1550         rxdr->rx_skb_top = NULL;
1551         rxdr->rx_skb_prev = NULL;
1552
1553         return 0;
1554 }
1555
1556 /**
1557  * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1558  *                                (Descriptors) for all queues
1559  * @adapter: board private structure
1560  *
1561  * If this function returns with an error, then it's possible one or
1562  * more of the rings is populated (while the rest are not).  It is the
1563  * callers duty to clean those orphaned rings.
1564  *
1565  * Return 0 on success, negative on failure
1566  **/
1567
1568 int
1569 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1570 {
1571         int i, err = 0;
1572
1573         for (i = 0; i < adapter->num_rx_queues; i++) {
1574                 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1575                 if (err) {
1576                         DPRINTK(PROBE, ERR,
1577                                 "Allocation for Rx Queue %u failed\n", i);
1578                         break;
1579                 }
1580         }
1581
1582         return err;
1583 }
1584
1585 /**
1586  * e1000_setup_rctl - configure the receive control registers
1587  * @adapter: Board private structure
1588  **/
1589 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1590                         (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1591 static void
1592 e1000_setup_rctl(struct e1000_adapter *adapter)
1593 {
1594         uint32_t rctl, rfctl;
1595         uint32_t psrctl = 0;
1596 #ifdef CONFIG_E1000_PACKET_SPLIT
1597         uint32_t pages = 0;
1598 #endif
1599
1600         rctl = E1000_READ_REG(&adapter->hw, RCTL);
1601
1602         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1603
1604         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1605                 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1606                 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1607
1608         if (adapter->hw.mac_type > e1000_82543)
1609                 rctl |= E1000_RCTL_SECRC;
1610
1611         if (adapter->hw.tbi_compatibility_on == 1)
1612                 rctl |= E1000_RCTL_SBP;
1613         else
1614                 rctl &= ~E1000_RCTL_SBP;
1615
1616         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1617                 rctl &= ~E1000_RCTL_LPE;
1618         else
1619                 rctl |= E1000_RCTL_LPE;
1620
1621         /* Setup buffer sizes */
1622         if(adapter->hw.mac_type >= e1000_82571) {
1623                 /* We can now specify buffers in 1K increments.
1624                  * BSIZE and BSEX are ignored in this case. */
1625                 rctl |= adapter->rx_buffer_len << 0x11;
1626         } else {
1627                 rctl &= ~E1000_RCTL_SZ_4096;
1628                 rctl |= E1000_RCTL_BSEX; 
1629                 switch (adapter->rx_buffer_len) {
1630                 case E1000_RXBUFFER_2048:
1631                 default:
1632                         rctl |= E1000_RCTL_SZ_2048;
1633                         rctl &= ~E1000_RCTL_BSEX;
1634                         break;
1635                 case E1000_RXBUFFER_4096:
1636                         rctl |= E1000_RCTL_SZ_4096;
1637                         break;
1638                 case E1000_RXBUFFER_8192:
1639                         rctl |= E1000_RCTL_SZ_8192;
1640                         break;
1641                 case E1000_RXBUFFER_16384:
1642                         rctl |= E1000_RCTL_SZ_16384;
1643                         break;
1644                 }
1645         }
1646
1647 #ifdef CONFIG_E1000_PACKET_SPLIT
1648         /* 82571 and greater support packet-split where the protocol
1649          * header is placed in skb->data and the packet data is
1650          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1651          * In the case of a non-split, skb->data is linearly filled,
1652          * followed by the page buffers.  Therefore, skb->data is
1653          * sized to hold the largest protocol header.
1654          */
1655         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1656         if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1657             PAGE_SIZE <= 16384)
1658                 adapter->rx_ps_pages = pages;
1659         else
1660                 adapter->rx_ps_pages = 0;
1661 #endif
1662         if (adapter->rx_ps_pages) {
1663                 /* Configure extra packet-split registers */
1664                 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1665                 rfctl |= E1000_RFCTL_EXTEN;
1666                 /* disable IPv6 packet split support */
1667                 rfctl |= E1000_RFCTL_IPV6_DIS;
1668                 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1669
1670                 rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
1671                 
1672                 psrctl |= adapter->rx_ps_bsize0 >>
1673                         E1000_PSRCTL_BSIZE0_SHIFT;
1674
1675                 switch (adapter->rx_ps_pages) {
1676                 case 3:
1677                         psrctl |= PAGE_SIZE <<
1678                                 E1000_PSRCTL_BSIZE3_SHIFT;
1679                 case 2:
1680                         psrctl |= PAGE_SIZE <<
1681                                 E1000_PSRCTL_BSIZE2_SHIFT;
1682                 case 1:
1683                         psrctl |= PAGE_SIZE >>
1684                                 E1000_PSRCTL_BSIZE1_SHIFT;
1685                         break;
1686                 }
1687
1688                 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1689         }
1690
1691         E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1692 }
1693
1694 /**
1695  * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1696  * @adapter: board private structure
1697  *
1698  * Configure the Rx unit of the MAC after a reset.
1699  **/
1700
1701 static void
1702 e1000_configure_rx(struct e1000_adapter *adapter)
1703 {
1704         uint64_t rdba;
1705         struct e1000_hw *hw = &adapter->hw;
1706         uint32_t rdlen, rctl, rxcsum, ctrl_ext;
1707 #ifdef CONFIG_E1000_MQ
1708         uint32_t reta, mrqc;
1709         int i;
1710 #endif
1711
1712         if (adapter->rx_ps_pages) {
1713                 rdlen = adapter->rx_ring[0].count *
1714                         sizeof(union e1000_rx_desc_packet_split);
1715                 adapter->clean_rx = e1000_clean_rx_irq_ps;
1716                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1717         } else {
1718                 rdlen = adapter->rx_ring[0].count *
1719                         sizeof(struct e1000_rx_desc);
1720                 adapter->clean_rx = e1000_clean_rx_irq;
1721                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1722         }
1723
1724         /* disable receives while setting up the descriptors */
1725         rctl = E1000_READ_REG(hw, RCTL);
1726         E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1727
1728         /* set the Receive Delay Timer Register */
1729         E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1730
1731         if (hw->mac_type >= e1000_82540) {
1732                 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
1733                 if(adapter->itr > 1)
1734                         E1000_WRITE_REG(hw, ITR,
1735                                 1000000000 / (adapter->itr * 256));
1736         }
1737
1738         if (hw->mac_type >= e1000_82571) {
1739                 /* Reset delay timers after every interrupt */
1740                 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1741                 ctrl_ext |= E1000_CTRL_EXT_CANC;
1742                 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1743                 E1000_WRITE_FLUSH(hw);
1744         }
1745
1746         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1747          * the Base and Length of the Rx Descriptor Ring */
1748         switch (adapter->num_rx_queues) {
1749 #ifdef CONFIG_E1000_MQ
1750         case 2:
1751                 rdba = adapter->rx_ring[1].dma;
1752                 E1000_WRITE_REG(hw, RDBAL1, (rdba & 0x00000000ffffffffULL));
1753                 E1000_WRITE_REG(hw, RDBAH1, (rdba >> 32));
1754                 E1000_WRITE_REG(hw, RDLEN1, rdlen);
1755                 E1000_WRITE_REG(hw, RDH1, 0);
1756                 E1000_WRITE_REG(hw, RDT1, 0);
1757                 adapter->rx_ring[1].rdh = E1000_RDH1;
1758                 adapter->rx_ring[1].rdt = E1000_RDT1;
1759                 /* Fall Through */
1760 #endif
1761         case 1:
1762         default:
1763                 rdba = adapter->rx_ring[0].dma;
1764                 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1765                 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1766                 E1000_WRITE_REG(hw, RDLEN, rdlen);
1767                 E1000_WRITE_REG(hw, RDH, 0);
1768                 E1000_WRITE_REG(hw, RDT, 0);
1769                 adapter->rx_ring[0].rdh = E1000_RDH;
1770                 adapter->rx_ring[0].rdt = E1000_RDT;
1771                 break;
1772         }
1773
1774 #ifdef CONFIG_E1000_MQ
1775         if (adapter->num_rx_queues > 1) {
1776                 uint32_t random[10];
1777
1778                 get_random_bytes(&random[0], 40);
1779
1780                 if (hw->mac_type <= e1000_82572) {
1781                         E1000_WRITE_REG(hw, RSSIR, 0);
1782                         E1000_WRITE_REG(hw, RSSIM, 0);
1783                 }
1784
1785                 switch (adapter->num_rx_queues) {
1786                 case 2:
1787                 default:
1788                         reta = 0x00800080;
1789                         mrqc = E1000_MRQC_ENABLE_RSS_2Q;
1790                         break;
1791                 }
1792
1793                 /* Fill out redirection table */
1794                 for (i = 0; i < 32; i++)
1795                         E1000_WRITE_REG_ARRAY(hw, RETA, i, reta);
1796                 /* Fill out hash function seeds */
1797                 for (i = 0; i < 10; i++)
1798                         E1000_WRITE_REG_ARRAY(hw, RSSRK, i, random[i]);
1799
1800                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1801                          E1000_MRQC_RSS_FIELD_IPV4_TCP);
1802                 E1000_WRITE_REG(hw, MRQC, mrqc);
1803         }
1804
1805         /* Multiqueue and packet checksumming are mutually exclusive. */
1806         if (hw->mac_type >= e1000_82571) {
1807                 rxcsum = E1000_READ_REG(hw, RXCSUM);
1808                 rxcsum |= E1000_RXCSUM_PCSD;
1809                 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1810         }
1811
1812 #else
1813
1814         /* Enable 82543 Receive Checksum Offload for TCP and UDP */
1815         if (hw->mac_type >= e1000_82543) {
1816                 rxcsum = E1000_READ_REG(hw, RXCSUM);
1817                 if(adapter->rx_csum == TRUE) {
1818                         rxcsum |= E1000_RXCSUM_TUOFL;
1819
1820                         /* Enable 82571 IPv4 payload checksum for UDP fragments
1821                          * Must be used in conjunction with packet-split. */
1822                         if ((hw->mac_type >= e1000_82571) && 
1823                            (adapter->rx_ps_pages)) {
1824                                 rxcsum |= E1000_RXCSUM_IPPCSE;
1825                         }
1826                 } else {
1827                         rxcsum &= ~E1000_RXCSUM_TUOFL;
1828                         /* don't need to clear IPPCSE as it defaults to 0 */
1829                 }
1830                 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1831         }
1832 #endif /* CONFIG_E1000_MQ */
1833
1834         if (hw->mac_type == e1000_82573)
1835                 E1000_WRITE_REG(hw, ERT, 0x0100);
1836
1837         /* Enable Receives */
1838         E1000_WRITE_REG(hw, RCTL, rctl);
1839 }
1840
1841 /**
1842  * e1000_free_tx_resources - Free Tx Resources per Queue
1843  * @adapter: board private structure
1844  * @tx_ring: Tx descriptor ring for a specific queue
1845  *
1846  * Free all transmit software resources
1847  **/
1848
1849 static void
1850 e1000_free_tx_resources(struct e1000_adapter *adapter,
1851                         struct e1000_tx_ring *tx_ring)
1852 {
1853         struct pci_dev *pdev = adapter->pdev;
1854
1855         e1000_clean_tx_ring(adapter, tx_ring);
1856
1857         vfree(tx_ring->buffer_info);
1858         tx_ring->buffer_info = NULL;
1859
1860         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1861
1862         tx_ring->desc = NULL;
1863 }
1864
1865 /**
1866  * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1867  * @adapter: board private structure
1868  *
1869  * Free all transmit software resources
1870  **/
1871
1872 void
1873 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1874 {
1875         int i;
1876
1877         for (i = 0; i < adapter->num_tx_queues; i++)
1878                 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1879 }
1880
1881 static inline void
1882 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1883                         struct e1000_buffer *buffer_info)
1884 {
1885         if(buffer_info->dma) {
1886                 pci_unmap_page(adapter->pdev,
1887                                 buffer_info->dma,
1888                                 buffer_info->length,
1889                                 PCI_DMA_TODEVICE);
1890                 buffer_info->dma = 0;
1891         }
1892         if(buffer_info->skb) {
1893                 dev_kfree_skb_any(buffer_info->skb);
1894                 buffer_info->skb = NULL;
1895         }
1896 }
1897
1898 /**
1899  * e1000_clean_tx_ring - Free Tx Buffers
1900  * @adapter: board private structure
1901  * @tx_ring: ring to be cleaned
1902  **/
1903
1904 static void
1905 e1000_clean_tx_ring(struct e1000_adapter *adapter,
1906                     struct e1000_tx_ring *tx_ring)
1907 {
1908         struct e1000_buffer *buffer_info;
1909         unsigned long size;
1910         unsigned int i;
1911
1912         /* Free all the Tx ring sk_buffs */
1913
1914         for(i = 0; i < tx_ring->count; i++) {
1915                 buffer_info = &tx_ring->buffer_info[i];
1916                 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1917         }
1918
1919         size = sizeof(struct e1000_buffer) * tx_ring->count;
1920         memset(tx_ring->buffer_info, 0, size);
1921
1922         /* Zero out the descriptor ring */
1923
1924         memset(tx_ring->desc, 0, tx_ring->size);
1925
1926         tx_ring->next_to_use = 0;
1927         tx_ring->next_to_clean = 0;
1928         tx_ring->last_tx_tso = 0;
1929
1930         writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1931         writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1932 }
1933
1934 /**
1935  * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1936  * @adapter: board private structure
1937  **/
1938
1939 static void
1940 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
1941 {
1942         int i;
1943
1944         for (i = 0; i < adapter->num_tx_queues; i++)
1945                 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1946 }
1947
1948 /**
1949  * e1000_free_rx_resources - Free Rx Resources
1950  * @adapter: board private structure
1951  * @rx_ring: ring to clean the resources from
1952  *
1953  * Free all receive software resources
1954  **/
1955
1956 static void
1957 e1000_free_rx_resources(struct e1000_adapter *adapter,
1958                         struct e1000_rx_ring *rx_ring)
1959 {
1960         struct pci_dev *pdev = adapter->pdev;
1961
1962         e1000_clean_rx_ring(adapter, rx_ring);
1963
1964         vfree(rx_ring->buffer_info);
1965         rx_ring->buffer_info = NULL;
1966         kfree(rx_ring->ps_page);
1967         rx_ring->ps_page = NULL;
1968         kfree(rx_ring->ps_page_dma);
1969         rx_ring->ps_page_dma = NULL;
1970
1971         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1972
1973         rx_ring->desc = NULL;
1974 }
1975
1976 /**
1977  * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1978  * @adapter: board private structure
1979  *
1980  * Free all receive software resources
1981  **/
1982
1983 void
1984 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
1985 {
1986         int i;
1987
1988         for (i = 0; i < adapter->num_rx_queues; i++)
1989                 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
1990 }
1991
1992 /**
1993  * e1000_clean_rx_ring - Free Rx Buffers per Queue
1994  * @adapter: board private structure
1995  * @rx_ring: ring to free buffers from
1996  **/
1997
1998 static void
1999 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2000                     struct e1000_rx_ring *rx_ring)
2001 {
2002         struct e1000_buffer *buffer_info;
2003         struct e1000_ps_page *ps_page;
2004         struct e1000_ps_page_dma *ps_page_dma;
2005         struct pci_dev *pdev = adapter->pdev;
2006         unsigned long size;
2007         unsigned int i, j;
2008
2009         /* Free all the Rx ring sk_buffs */
2010
2011         for(i = 0; i < rx_ring->count; i++) {
2012                 buffer_info = &rx_ring->buffer_info[i];
2013                 if(buffer_info->skb) {
2014                         ps_page = &rx_ring->ps_page[i];
2015                         ps_page_dma = &rx_ring->ps_page_dma[i];
2016                         pci_unmap_single(pdev,
2017                                          buffer_info->dma,
2018                                          buffer_info->length,
2019                                          PCI_DMA_FROMDEVICE);
2020
2021                         dev_kfree_skb(buffer_info->skb);
2022                         buffer_info->skb = NULL;
2023                 }
2024                 ps_page = &rx_ring->ps_page[i];
2025                 ps_page_dma = &rx_ring->ps_page_dma[i];
2026                 for (j = 0; j < adapter->rx_ps_pages; j++) {
2027                         if (!ps_page->ps_page[j]) break;
2028                         pci_unmap_page(pdev,
2029                                        ps_page_dma->ps_page_dma[j],
2030                                        PAGE_SIZE, PCI_DMA_FROMDEVICE);
2031                         ps_page_dma->ps_page_dma[j] = 0;
2032                         put_page(ps_page->ps_page[j]);
2033                         ps_page->ps_page[j] = NULL;
2034                 }
2035         }
2036
2037         /* there also may be some cached data in our adapter */
2038         if (rx_ring->rx_skb_top) {
2039                 dev_kfree_skb(rx_ring->rx_skb_top);
2040
2041                 /* rx_skb_prev will be wiped out by rx_skb_top */
2042                 rx_ring->rx_skb_top = NULL;
2043                 rx_ring->rx_skb_prev = NULL;
2044         }
2045
2046
2047         size = sizeof(struct e1000_buffer) * rx_ring->count;
2048         memset(rx_ring->buffer_info, 0, size);
2049         size = sizeof(struct e1000_ps_page) * rx_ring->count;
2050         memset(rx_ring->ps_page, 0, size);
2051         size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2052         memset(rx_ring->ps_page_dma, 0, size);
2053
2054         /* Zero out the descriptor ring */
2055
2056         memset(rx_ring->desc, 0, rx_ring->size);
2057
2058         rx_ring->next_to_clean = 0;
2059         rx_ring->next_to_use = 0;
2060
2061         writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2062         writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2063 }
2064
2065 /**
2066  * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2067  * @adapter: board private structure
2068  **/
2069
2070 static void
2071 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2072 {
2073         int i;
2074
2075         for (i = 0; i < adapter->num_rx_queues; i++)
2076                 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2077 }
2078
2079 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2080  * and memory write and invalidate disabled for certain operations
2081  */
2082 static void
2083 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2084 {
2085         struct net_device *netdev = adapter->netdev;
2086         uint32_t rctl;
2087
2088         e1000_pci_clear_mwi(&adapter->hw);
2089
2090         rctl = E1000_READ_REG(&adapter->hw, RCTL);
2091         rctl |= E1000_RCTL_RST;
2092         E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2093         E1000_WRITE_FLUSH(&adapter->hw);
2094         mdelay(5);
2095
2096         if(netif_running(netdev))
2097                 e1000_clean_all_rx_rings(adapter);
2098 }
2099
2100 static void
2101 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2102 {
2103         struct net_device *netdev = adapter->netdev;
2104         uint32_t rctl;
2105
2106         rctl = E1000_READ_REG(&adapter->hw, RCTL);
2107         rctl &= ~E1000_RCTL_RST;
2108         E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2109         E1000_WRITE_FLUSH(&adapter->hw);
2110         mdelay(5);
2111
2112         if(adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2113                 e1000_pci_set_mwi(&adapter->hw);
2114
2115         if(netif_running(netdev)) {
2116                 e1000_configure_rx(adapter);
2117                 e1000_alloc_rx_buffers(adapter, &adapter->rx_ring[0]);
2118         }
2119 }
2120
2121 /**
2122  * e1000_set_mac - Change the Ethernet Address of the NIC
2123  * @netdev: network interface device structure
2124  * @p: pointer to an address structure
2125  *
2126  * Returns 0 on success, negative on failure
2127  **/
2128
2129 static int
2130 e1000_set_mac(struct net_device *netdev, void *p)
2131 {
2132         struct e1000_adapter *adapter = netdev_priv(netdev);
2133         struct sockaddr *addr = p;
2134
2135         if(!is_valid_ether_addr(addr->sa_data))
2136                 return -EADDRNOTAVAIL;
2137
2138         /* 82542 2.0 needs to be in reset to write receive address registers */
2139
2140         if(adapter->hw.mac_type == e1000_82542_rev2_0)
2141                 e1000_enter_82542_rst(adapter);
2142
2143         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2144         memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2145
2146         e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2147
2148         /* With 82571 controllers, LAA may be overwritten (with the default)
2149          * due to controller reset from the other port. */
2150         if (adapter->hw.mac_type == e1000_82571) {
2151                 /* activate the work around */
2152                 adapter->hw.laa_is_present = 1;
2153
2154                 /* Hold a copy of the LAA in RAR[14] This is done so that 
2155                  * between the time RAR[0] gets clobbered  and the time it 
2156                  * gets fixed (in e1000_watchdog), the actual LAA is in one 
2157                  * of the RARs and no incoming packets directed to this port
2158                  * are dropped. Eventaully the LAA will be in RAR[0] and 
2159                  * RAR[14] */
2160                 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 
2161                                         E1000_RAR_ENTRIES - 1);
2162         }
2163
2164         if(adapter->hw.mac_type == e1000_82542_rev2_0)
2165                 e1000_leave_82542_rst(adapter);
2166
2167         return 0;
2168 }
2169
2170 /**
2171  * e1000_set_multi - Multicast and Promiscuous mode set
2172  * @netdev: network interface device structure
2173  *
2174  * The set_multi entry point is called whenever the multicast address
2175  * list or the network interface flags are updated.  This routine is
2176  * responsible for configuring the hardware for proper multicast,
2177  * promiscuous mode, and all-multi behavior.
2178  **/
2179
2180 static void
2181 e1000_set_multi(struct net_device *netdev)
2182 {
2183         struct e1000_adapter *adapter = netdev_priv(netdev);
2184         struct e1000_hw *hw = &adapter->hw;
2185         struct dev_mc_list *mc_ptr;
2186         uint32_t rctl;
2187         uint32_t hash_value;
2188         int i, rar_entries = E1000_RAR_ENTRIES;
2189
2190         /* reserve RAR[14] for LAA over-write work-around */
2191         if (adapter->hw.mac_type == e1000_82571)
2192                 rar_entries--;
2193
2194         /* Check for Promiscuous and All Multicast modes */
2195
2196         rctl = E1000_READ_REG(hw, RCTL);
2197
2198         if(netdev->flags & IFF_PROMISC) {
2199                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2200         } else if(netdev->flags & IFF_ALLMULTI) {
2201                 rctl |= E1000_RCTL_MPE;
2202                 rctl &= ~E1000_RCTL_UPE;
2203         } else {
2204                 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2205         }
2206
2207         E1000_WRITE_REG(hw, RCTL, rctl);
2208
2209         /* 82542 2.0 needs to be in reset to write receive address registers */
2210
2211         if(hw->mac_type == e1000_82542_rev2_0)
2212                 e1000_enter_82542_rst(adapter);
2213
2214         /* load the first 14 multicast address into the exact filters 1-14
2215          * RAR 0 is used for the station MAC adddress
2216          * if there are not 14 addresses, go ahead and clear the filters
2217          * -- with 82571 controllers only 0-13 entries are filled here
2218          */
2219         mc_ptr = netdev->mc_list;
2220
2221         for(i = 1; i < rar_entries; i++) {
2222                 if (mc_ptr) {
2223                         e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2224                         mc_ptr = mc_ptr->next;
2225                 } else {
2226                         E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2227                         E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2228                 }
2229         }
2230
2231         /* clear the old settings from the multicast hash table */
2232
2233         for(i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
2234                 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2235
2236         /* load any remaining addresses into the hash table */
2237
2238         for(; mc_ptr; mc_ptr = mc_ptr->next) {
2239                 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2240                 e1000_mta_set(hw, hash_value);
2241         }
2242
2243         if(hw->mac_type == e1000_82542_rev2_0)
2244                 e1000_leave_82542_rst(adapter);
2245 }
2246
2247 /* Need to wait a few seconds after link up to get diagnostic information from
2248  * the phy */
2249
2250 static void
2251 e1000_update_phy_info(unsigned long data)
2252 {
2253         struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2254         e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2255 }
2256
2257 /**
2258  * e1000_82547_tx_fifo_stall - Timer Call-back
2259  * @data: pointer to adapter cast into an unsigned long
2260  **/
2261
2262 static void
2263 e1000_82547_tx_fifo_stall(unsigned long data)
2264 {
2265         struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2266         struct net_device *netdev = adapter->netdev;
2267         uint32_t tctl;
2268
2269         if(atomic_read(&adapter->tx_fifo_stall)) {
2270                 if((E1000_READ_REG(&adapter->hw, TDT) ==
2271                     E1000_READ_REG(&adapter->hw, TDH)) &&
2272                    (E1000_READ_REG(&adapter->hw, TDFT) ==
2273                     E1000_READ_REG(&adapter->hw, TDFH)) &&
2274                    (E1000_READ_REG(&adapter->hw, TDFTS) ==
2275                     E1000_READ_REG(&adapter->hw, TDFHS))) {
2276                         tctl = E1000_READ_REG(&adapter->hw, TCTL);
2277                         E1000_WRITE_REG(&adapter->hw, TCTL,
2278                                         tctl & ~E1000_TCTL_EN);
2279                         E1000_WRITE_REG(&adapter->hw, TDFT,
2280                                         adapter->tx_head_addr);
2281                         E1000_WRITE_REG(&adapter->hw, TDFH,
2282                                         adapter->tx_head_addr);
2283                         E1000_WRITE_REG(&adapter->hw, TDFTS,
2284                                         adapter->tx_head_addr);
2285                         E1000_WRITE_REG(&adapter->hw, TDFHS,
2286                                         adapter->tx_head_addr);
2287                         E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2288                         E1000_WRITE_FLUSH(&adapter->hw);
2289
2290                         adapter->tx_fifo_head = 0;
2291                         atomic_set(&adapter->tx_fifo_stall, 0);
2292                         netif_wake_queue(netdev);
2293                 } else {
2294                         mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2295                 }
2296         }
2297 }
2298
2299 /**
2300  * e1000_watchdog - Timer Call-back
2301  * @data: pointer to adapter cast into an unsigned long
2302  **/
2303 static void
2304 e1000_watchdog(unsigned long data)
2305 {
2306         struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2307
2308         /* Do the rest outside of interrupt context */
2309         schedule_work(&adapter->watchdog_task);
2310 }
2311
2312 static void
2313 e1000_watchdog_task(struct e1000_adapter *adapter)
2314 {
2315         struct net_device *netdev = adapter->netdev;
2316         struct e1000_tx_ring *txdr = adapter->tx_ring;
2317         uint32_t link;
2318
2319         e1000_check_for_link(&adapter->hw);
2320         if (adapter->hw.mac_type == e1000_82573) {
2321                 e1000_enable_tx_pkt_filtering(&adapter->hw);
2322                 if(adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2323                         e1000_update_mng_vlan(adapter);
2324         }       
2325
2326         if((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2327            !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2328                 link = !adapter->hw.serdes_link_down;
2329         else
2330                 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2331
2332         if(link) {
2333                 if(!netif_carrier_ok(netdev)) {
2334                         e1000_get_speed_and_duplex(&adapter->hw,
2335                                                    &adapter->link_speed,
2336                                                    &adapter->link_duplex);
2337
2338                         DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2339                                adapter->link_speed,
2340                                adapter->link_duplex == FULL_DUPLEX ?
2341                                "Full Duplex" : "Half Duplex");
2342
2343                         /* tweak tx_queue_len according to speed/duplex */
2344                         netdev->tx_queue_len = adapter->tx_queue_len;
2345                         adapter->tx_timeout_factor = 1;
2346                         if (adapter->link_duplex == HALF_DUPLEX) {
2347                                 switch (adapter->link_speed) {
2348                                 case SPEED_10:
2349                                         netdev->tx_queue_len = 10;
2350                                         adapter->tx_timeout_factor = 8;
2351                                         break;
2352                                 case SPEED_100:
2353                                         netdev->tx_queue_len = 100;
2354                                         break;
2355                                 }
2356                         }
2357
2358                         netif_carrier_on(netdev);
2359                         netif_wake_queue(netdev);
2360                         mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2361                         adapter->smartspeed = 0;
2362                 }
2363         } else {
2364                 if(netif_carrier_ok(netdev)) {
2365                         adapter->link_speed = 0;
2366                         adapter->link_duplex = 0;
2367                         DPRINTK(LINK, INFO, "NIC Link is Down\n");
2368                         netif_carrier_off(netdev);
2369                         netif_stop_queue(netdev);
2370                         mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2371                 }
2372
2373                 e1000_smartspeed(adapter);
2374         }
2375
2376         e1000_update_stats(adapter);
2377
2378         adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2379         adapter->tpt_old = adapter->stats.tpt;
2380         adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2381         adapter->colc_old = adapter->stats.colc;
2382
2383         adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2384         adapter->gorcl_old = adapter->stats.gorcl;
2385         adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2386         adapter->gotcl_old = adapter->stats.gotcl;
2387
2388         e1000_update_adaptive(&adapter->hw);
2389
2390 #ifdef CONFIG_E1000_MQ
2391         txdr = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
2392 #endif
2393         if (!netif_carrier_ok(netdev)) {
2394                 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2395                         /* We've lost link, so the controller stops DMA,
2396                          * but we've got queued Tx work that's never going
2397                          * to get done, so reset controller to flush Tx.
2398                          * (Do the reset outside of interrupt context). */
2399                         schedule_work(&adapter->tx_timeout_task);
2400                 }
2401         }
2402
2403         /* Dynamic mode for Interrupt Throttle Rate (ITR) */
2404         if(adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
2405                 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2406                  * asymmetrical Tx or Rx gets ITR=8000; everyone
2407                  * else is between 2000-8000. */
2408                 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
2409                 uint32_t dif = (adapter->gotcl > adapter->gorcl ? 
2410                         adapter->gotcl - adapter->gorcl :
2411                         adapter->gorcl - adapter->gotcl) / 10000;
2412                 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2413                 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2414         }
2415
2416         /* Cause software interrupt to ensure rx ring is cleaned */
2417         E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2418
2419         /* Force detection of hung controller every watchdog period */
2420         adapter->detect_tx_hung = TRUE;
2421
2422         /* With 82571 controllers, LAA may be overwritten due to controller 
2423          * reset from the other port. Set the appropriate LAA in RAR[0] */
2424         if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2425                 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2426
2427         /* Reset the timer */
2428         mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2429 }
2430
2431 #define E1000_TX_FLAGS_CSUM             0x00000001
2432 #define E1000_TX_FLAGS_VLAN             0x00000002
2433 #define E1000_TX_FLAGS_TSO              0x00000004
2434 #define E1000_TX_FLAGS_IPV4             0x00000008
2435 #define E1000_TX_FLAGS_VLAN_MASK        0xffff0000
2436 #define E1000_TX_FLAGS_VLAN_SHIFT       16
2437
2438 static inline int
2439 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2440           struct sk_buff *skb)
2441 {
2442 #ifdef NETIF_F_TSO
2443         struct e1000_context_desc *context_desc;
2444         struct e1000_buffer *buffer_info;
2445         unsigned int i;
2446         uint32_t cmd_length = 0;
2447         uint16_t ipcse = 0, tucse, mss;
2448         uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2449         int err;
2450
2451         if(skb_shinfo(skb)->tso_size) {
2452                 if (skb_header_cloned(skb)) {
2453                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2454                         if (err)
2455                                 return err;
2456                 }
2457
2458                 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2459                 mss = skb_shinfo(skb)->tso_size;
2460                 if(skb->protocol == ntohs(ETH_P_IP)) {
2461                         skb->nh.iph->tot_len = 0;
2462                         skb->nh.iph->check = 0;
2463                         skb->h.th->check =
2464                                 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2465                                                    skb->nh.iph->daddr,
2466                                                    0,
2467                                                    IPPROTO_TCP,
2468                                                    0);
2469                         cmd_length = E1000_TXD_CMD_IP;
2470                         ipcse = skb->h.raw - skb->data - 1;
2471 #ifdef NETIF_F_TSO_IPV6
2472                 } else if(skb->protocol == ntohs(ETH_P_IPV6)) {
2473                         skb->nh.ipv6h->payload_len = 0;
2474                         skb->h.th->check =
2475                                 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2476                                                  &skb->nh.ipv6h->daddr,
2477                                                  0,
2478                                                  IPPROTO_TCP,
2479                                                  0);
2480                         ipcse = 0;
2481 #endif
2482                 }
2483                 ipcss = skb->nh.raw - skb->data;
2484                 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
2485                 tucss = skb->h.raw - skb->data;
2486                 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2487                 tucse = 0;
2488
2489                 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2490                                E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2491
2492                 i = tx_ring->next_to_use;
2493                 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2494                 buffer_info = &tx_ring->buffer_info[i];
2495
2496                 context_desc->lower_setup.ip_fields.ipcss  = ipcss;
2497                 context_desc->lower_setup.ip_fields.ipcso  = ipcso;
2498                 context_desc->lower_setup.ip_fields.ipcse  = cpu_to_le16(ipcse);
2499                 context_desc->upper_setup.tcp_fields.tucss = tucss;
2500                 context_desc->upper_setup.tcp_fields.tucso = tucso;
2501                 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2502                 context_desc->tcp_seg_setup.fields.mss     = cpu_to_le16(mss);
2503                 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2504                 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2505
2506                 buffer_info->time_stamp = jiffies;
2507
2508                 if (++i == tx_ring->count) i = 0;
2509                 tx_ring->next_to_use = i;
2510
2511                 return 1;
2512         }
2513 #endif
2514
2515         return 0;
2516 }
2517
2518 static inline boolean_t
2519 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2520               struct sk_buff *skb)
2521 {
2522         struct e1000_context_desc *context_desc;
2523         struct e1000_buffer *buffer_info;
2524         unsigned int i;
2525         uint8_t css;
2526
2527         if(likely(skb->ip_summed == CHECKSUM_HW)) {
2528                 css = skb->h.raw - skb->data;
2529
2530                 i = tx_ring->next_to_use;
2531                 buffer_info = &tx_ring->buffer_info[i];
2532                 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2533
2534                 context_desc->upper_setup.tcp_fields.tucss = css;
2535                 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2536                 context_desc->upper_setup.tcp_fields.tucse = 0;
2537                 context_desc->tcp_seg_setup.data = 0;
2538                 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2539
2540                 buffer_info->time_stamp = jiffies;
2541
2542                 if (unlikely(++i == tx_ring->count)) i = 0;
2543                 tx_ring->next_to_use = i;
2544
2545                 return TRUE;
2546         }
2547
2548         return FALSE;
2549 }
2550
2551 #define E1000_MAX_TXD_PWR       12
2552 #define E1000_MAX_DATA_PER_TXD  (1<<E1000_MAX_TXD_PWR)
2553
2554 static inline int
2555 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2556              struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2557              unsigned int nr_frags, unsigned int mss)
2558 {
2559         struct e1000_buffer *buffer_info;
2560         unsigned int len = skb->len;
2561         unsigned int offset = 0, size, count = 0, i;
2562         unsigned int f;
2563         len -= skb->data_len;
2564
2565         i = tx_ring->next_to_use;
2566
2567         while(len) {
2568                 buffer_info = &tx_ring->buffer_info[i];
2569                 size = min(len, max_per_txd);
2570 #ifdef NETIF_F_TSO
2571                 /* Workaround for Controller erratum --
2572                  * descriptor for non-tso packet in a linear SKB that follows a
2573                  * tso gets written back prematurely before the data is fully
2574                  * DMAd to the controller */
2575                 if (!skb->data_len && tx_ring->last_tx_tso &&
2576                                 !skb_shinfo(skb)->tso_size) {
2577                         tx_ring->last_tx_tso = 0;
2578                         size -= 4;
2579                 }
2580
2581                 /* Workaround for premature desc write-backs
2582                  * in TSO mode.  Append 4-byte sentinel desc */
2583                 if(unlikely(mss && !nr_frags && size == len && size > 8))
2584                         size -= 4;
2585 #endif
2586                 /* work-around for errata 10 and it applies
2587                  * to all controllers in PCI-X mode
2588                  * The fix is to make sure that the first descriptor of a
2589                  * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2590                  */
2591                 if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2592                                 (size > 2015) && count == 0))
2593                         size = 2015;
2594                                                                                 
2595                 /* Workaround for potential 82544 hang in PCI-X.  Avoid
2596                  * terminating buffers within evenly-aligned dwords. */
2597                 if(unlikely(adapter->pcix_82544 &&
2598                    !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2599                    size > 4))
2600                         size -= 4;
2601
2602                 buffer_info->length = size;
2603                 buffer_info->dma =
2604                         pci_map_single(adapter->pdev,
2605                                 skb->data + offset,
2606                                 size,
2607                                 PCI_DMA_TODEVICE);
2608                 buffer_info->time_stamp = jiffies;
2609
2610                 len -= size;
2611                 offset += size;
2612                 count++;
2613                 if(unlikely(++i == tx_ring->count)) i = 0;
2614         }
2615
2616         for(f = 0; f < nr_frags; f++) {
2617                 struct skb_frag_struct *frag;
2618
2619                 frag = &skb_shinfo(skb)->frags[f];
2620                 len = frag->size;
2621                 offset = frag->page_offset;
2622
2623                 while(len) {
2624                         buffer_info = &tx_ring->buffer_info[i];
2625                         size = min(len, max_per_txd);
2626 #ifdef NETIF_F_TSO
2627                         /* Workaround for premature desc write-backs
2628                          * in TSO mode.  Append 4-byte sentinel desc */
2629                         if(unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
2630                                 size -= 4;
2631 #endif
2632                         /* Workaround for potential 82544 hang in PCI-X.
2633                          * Avoid terminating buffers within evenly-aligned
2634                          * dwords. */
2635                         if(unlikely(adapter->pcix_82544 &&
2636                            !((unsigned long)(frag->page+offset+size-1) & 4) &&
2637                            size > 4))
2638                                 size -= 4;
2639
2640                         buffer_info->length = size;
2641                         buffer_info->dma =
2642                                 pci_map_page(adapter->pdev,
2643                                         frag->page,
2644                                         offset,
2645                                         size,
2646                                         PCI_DMA_TODEVICE);
2647                         buffer_info->time_stamp = jiffies;
2648
2649                         len -= size;
2650                         offset += size;
2651                         count++;
2652                         if(unlikely(++i == tx_ring->count)) i = 0;
2653                 }
2654         }
2655
2656         i = (i == 0) ? tx_ring->count - 1 : i - 1;
2657         tx_ring->buffer_info[i].skb = skb;
2658         tx_ring->buffer_info[first].next_to_watch = i;
2659
2660         return count;
2661 }
2662
2663 static inline void
2664 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2665                int tx_flags, int count)
2666 {
2667         struct e1000_tx_desc *tx_desc = NULL;
2668         struct e1000_buffer *buffer_info;
2669         uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2670         unsigned int i;
2671
2672         if(likely(tx_flags & E1000_TX_FLAGS_TSO)) {
2673                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2674                              E1000_TXD_CMD_TSE;
2675                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2676
2677                 if(likely(tx_flags & E1000_TX_FLAGS_IPV4))
2678                         txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2679         }
2680
2681         if(likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
2682                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2683                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2684         }
2685
2686         if(unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
2687                 txd_lower |= E1000_TXD_CMD_VLE;
2688                 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2689         }
2690
2691         i = tx_ring->next_to_use;
2692
2693         while(count--) {
2694                 buffer_info = &tx_ring->buffer_info[i];
2695                 tx_desc = E1000_TX_DESC(*tx_ring, i);
2696                 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2697                 tx_desc->lower.data =
2698                         cpu_to_le32(txd_lower | buffer_info->length);
2699                 tx_desc->upper.data = cpu_to_le32(txd_upper);
2700                 if(unlikely(++i == tx_ring->count)) i = 0;
2701         }
2702
2703         tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2704
2705         /* Force memory writes to complete before letting h/w
2706          * know there are new descriptors to fetch.  (Only
2707          * applicable for weak-ordered memory model archs,
2708          * such as IA-64). */
2709         wmb();
2710
2711         tx_ring->next_to_use = i;
2712         writel(i, adapter->hw.hw_addr + tx_ring->tdt);
2713 }
2714
2715 /**
2716  * 82547 workaround to avoid controller hang in half-duplex environment.
2717  * The workaround is to avoid queuing a large packet that would span
2718  * the internal Tx FIFO ring boundary by notifying the stack to resend
2719  * the packet at a later time.  This gives the Tx FIFO an opportunity to
2720  * flush all packets.  When that occurs, we reset the Tx FIFO pointers
2721  * to the beginning of the Tx FIFO.
2722  **/
2723
2724 #define E1000_FIFO_HDR                  0x10
2725 #define E1000_82547_PAD_LEN             0x3E0
2726
2727 static inline int
2728 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2729 {
2730         uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2731         uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2732
2733         E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2734
2735         if(adapter->link_duplex != HALF_DUPLEX)
2736                 goto no_fifo_stall_required;
2737
2738         if(atomic_read(&adapter->tx_fifo_stall))
2739                 return 1;
2740
2741         if(skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
2742                 atomic_set(&adapter->tx_fifo_stall, 1);
2743                 return 1;
2744         }
2745
2746 no_fifo_stall_required:
2747         adapter->tx_fifo_head += skb_fifo_len;
2748         if(adapter->tx_fifo_head >= adapter->tx_fifo_size)
2749                 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2750         return 0;
2751 }
2752
2753 #define MINIMUM_DHCP_PACKET_SIZE 282
2754 static inline int
2755 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2756 {
2757         struct e1000_hw *hw =  &adapter->hw;
2758         uint16_t length, offset;
2759         if(vlan_tx_tag_present(skb)) {
2760                 if(!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2761                         ( adapter->hw.mng_cookie.status &
2762                           E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2763                         return 0;
2764         }
2765         if ((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
2766                 struct ethhdr *eth = (struct ethhdr *) skb->data;
2767                 if((htons(ETH_P_IP) == eth->h_proto)) {
2768                         const struct iphdr *ip = 
2769                                 (struct iphdr *)((uint8_t *)skb->data+14);
2770                         if(IPPROTO_UDP == ip->protocol) {
2771                                 struct udphdr *udp = 
2772                                         (struct udphdr *)((uint8_t *)ip + 
2773                                                 (ip->ihl << 2));
2774                                 if(ntohs(udp->dest) == 67) {
2775                                         offset = (uint8_t *)udp + 8 - skb->data;
2776                                         length = skb->len - offset;
2777
2778                                         return e1000_mng_write_dhcp_info(hw,
2779                                                         (uint8_t *)udp + 8, 
2780                                                         length);
2781                                 }
2782                         }
2783                 }
2784         }
2785         return 0;
2786 }
2787
2788 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2789 static int
2790 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2791 {
2792         struct e1000_adapter *adapter = netdev_priv(netdev);
2793         struct e1000_tx_ring *tx_ring;
2794         unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2795         unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2796         unsigned int tx_flags = 0;
2797         unsigned int len = skb->len;
2798         unsigned long flags;
2799         unsigned int nr_frags = 0;
2800         unsigned int mss = 0;
2801         int count = 0;
2802         int tso;
2803         unsigned int f;
2804         len -= skb->data_len;
2805
2806 #ifdef CONFIG_E1000_MQ
2807         tx_ring = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
2808 #else
2809         tx_ring = adapter->tx_ring;
2810 #endif
2811
2812         if (unlikely(skb->len <= 0)) {
2813                 dev_kfree_skb_any(skb);
2814                 return NETDEV_TX_OK;
2815         }
2816
2817 #ifdef NETIF_F_TSO
2818         mss = skb_shinfo(skb)->tso_size;
2819         /* The controller does a simple calculation to 
2820          * make sure there is enough room in the FIFO before
2821          * initiating the DMA for each buffer.  The calc is:
2822          * 4 = ceil(buffer len/mss).  To make sure we don't
2823          * overrun the FIFO, adjust the max buffer len if mss
2824          * drops. */
2825         if(mss) {
2826                 uint8_t hdr_len;
2827                 max_per_txd = min(mss << 2, max_per_txd);
2828                 max_txd_pwr = fls(max_per_txd) - 1;
2829
2830         /* TSO Workaround for 82571/2 Controllers -- if skb->data
2831          * points to just header, pull a few bytes of payload from
2832          * frags into skb->data */
2833                 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2834                 if (skb->data_len && (hdr_len == (skb->len - skb->data_len)) &&
2835                         (adapter->hw.mac_type == e1000_82571 ||
2836                         adapter->hw.mac_type == e1000_82572)) {
2837                         len = skb->len - skb->data_len;
2838                 }
2839         }
2840
2841         if((mss) || (skb->ip_summed == CHECKSUM_HW))
2842         /* reserve a descriptor for the offload context */
2843                 count++;
2844         count++;
2845 #else
2846         if(skb->ip_summed == CHECKSUM_HW)
2847                 count++;
2848 #endif
2849
2850 #ifdef NETIF_F_TSO
2851         /* Controller Erratum workaround */
2852         if (!skb->data_len && tx_ring->last_tx_tso &&
2853                 !skb_shinfo(skb)->tso_size)
2854                 count++;
2855 #endif
2856
2857         count += TXD_USE_COUNT(len, max_txd_pwr);
2858
2859         if(adapter->pcix_82544)
2860                 count++;
2861
2862         /* work-around for errata 10 and it applies to all controllers 
2863          * in PCI-X mode, so add one more descriptor to the count
2864          */
2865         if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2866                         (len > 2015)))
2867                 count++;
2868
2869         nr_frags = skb_shinfo(skb)->nr_frags;
2870         for(f = 0; f < nr_frags; f++)
2871                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2872                                        max_txd_pwr);
2873         if(adapter->pcix_82544)
2874                 count += nr_frags;
2875
2876                 unsigned int pull_size;
2877                 pull_size = min((unsigned int)4, skb->data_len);
2878                 if (!__pskb_pull_tail(skb, pull_size)) {
2879                         printk(KERN_ERR "__pskb_pull_tail failed.\n");
2880                         dev_kfree_skb_any(skb);
2881                         return -EFAULT;
2882                 }
2883
2884         if(adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
2885                 e1000_transfer_dhcp_info(adapter, skb);
2886
2887         local_irq_save(flags);
2888         if (!spin_trylock(&tx_ring->tx_lock)) {
2889                 /* Collision - tell upper layer to requeue */
2890                 local_irq_restore(flags);
2891                 return NETDEV_TX_LOCKED;
2892         }
2893
2894         /* need: count + 2 desc gap to keep tail from touching
2895          * head, otherwise try next time */
2896         if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
2897                 netif_stop_queue(netdev);
2898                 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2899                 return NETDEV_TX_BUSY;
2900         }
2901
2902         if(unlikely(adapter->hw.mac_type == e1000_82547)) {
2903                 if(unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
2904                         netif_stop_queue(netdev);
2905                         mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
2906                         spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2907                         return NETDEV_TX_BUSY;
2908                 }
2909         }
2910
2911         if(unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
2912                 tx_flags |= E1000_TX_FLAGS_VLAN;
2913                 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2914         }
2915
2916         first = tx_ring->next_to_use;
2917         
2918         tso = e1000_tso(adapter, tx_ring, skb);
2919         if (tso < 0) {
2920                 dev_kfree_skb_any(skb);
2921                 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2922                 return NETDEV_TX_OK;
2923         }
2924
2925         if (likely(tso)) {
2926                 tx_ring->last_tx_tso = 1;
2927                 tx_flags |= E1000_TX_FLAGS_TSO;
2928         } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
2929                 tx_flags |= E1000_TX_FLAGS_CSUM;
2930
2931         /* Old method was to assume IPv4 packet by default if TSO was enabled.
2932          * 82571 hardware supports TSO capabilities for IPv6 as well...
2933          * no longer assume, we must. */
2934         if (likely(skb->protocol == ntohs(ETH_P_IP)))
2935                 tx_flags |= E1000_TX_FLAGS_IPV4;
2936
2937         e1000_tx_queue(adapter, tx_ring, tx_flags,
2938                        e1000_tx_map(adapter, tx_ring, skb, first,
2939                                     max_per_txd, nr_frags, mss));
2940
2941         netdev->trans_start = jiffies;
2942
2943         /* Make sure there is space in the ring for the next send. */
2944         if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
2945                 netif_stop_queue(netdev);
2946
2947         spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2948         return NETDEV_TX_OK;
2949 }
2950
2951 /**
2952  * e1000_tx_timeout - Respond to a Tx Hang
2953  * @netdev: network interface device structure
2954  **/
2955
2956 static void
2957 e1000_tx_timeout(struct net_device *netdev)
2958 {
2959         struct e1000_adapter *adapter = netdev_priv(netdev);
2960
2961         /* Do the reset outside of interrupt context */
2962         schedule_work(&adapter->tx_timeout_task);
2963 }
2964
2965 static void
2966 e1000_tx_timeout_task(struct net_device *netdev)
2967 {
2968         struct e1000_adapter *adapter = netdev_priv(netdev);
2969
2970         adapter->tx_timeout_count++;
2971         e1000_down(adapter);
2972         e1000_up(adapter);
2973 }
2974
2975 /**
2976  * e1000_get_stats - Get System Network Statistics
2977  * @netdev: network interface device structure
2978  *
2979  * Returns the address of the device statistics structure.
2980  * The statistics are actually updated from the timer callback.
2981  **/
2982
2983 static struct net_device_stats *
2984 e1000_get_stats(struct net_device *netdev)
2985 {
2986         struct e1000_adapter *adapter = netdev_priv(netdev);
2987
2988         /* only return the current stats */
2989         return &adapter->net_stats;
2990 }
2991
2992 /**
2993  * e1000_change_mtu - Change the Maximum Transfer Unit
2994  * @netdev: network interface device structure
2995  * @new_mtu: new value for maximum frame size
2996  *
2997  * Returns 0 on success, negative on failure
2998  **/
2999
3000 static int
3001 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3002 {
3003         struct e1000_adapter *adapter = netdev_priv(netdev);
3004         int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3005
3006         if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3007                 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3008                         DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3009                 return -EINVAL;
3010         }
3011
3012         /* Adapter-specific max frame size limits. */
3013         switch (adapter->hw.mac_type) {
3014         case e1000_82542_rev2_0:
3015         case e1000_82542_rev2_1:
3016         case e1000_82573:
3017                 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3018                         DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3019                         return -EINVAL;
3020                 }
3021                 break;
3022         case e1000_82571:
3023         case e1000_82572:
3024 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3025                 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3026                         DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3027                         return -EINVAL;
3028                 }
3029                 break;
3030         default:
3031                 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3032                 break;
3033         }
3034
3035         /* since the driver code now supports splitting a packet across
3036          * multiple descriptors, most of the fifo related limitations on
3037          * jumbo frame traffic have gone away.
3038          * simply use 2k descriptors for everything.
3039          *
3040          * NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3041          * means we reserve 2 more, this pushes us to allocate from the next
3042          * larger slab size
3043          * i.e. RXBUFFER_2048 --> size-4096 slab */
3044
3045         /* recent hardware supports 1KB granularity */
3046         if (adapter->hw.mac_type > e1000_82547_rev_2) {
3047                 adapter->rx_buffer_len =
3048                     ((max_frame < E1000_RXBUFFER_2048) ?
3049                         max_frame : E1000_RXBUFFER_2048);
3050                 E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
3051         } else
3052                 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3053
3054         netdev->mtu = new_mtu;
3055
3056         if(netif_running(netdev)) {
3057                 e1000_down(adapter);
3058                 e1000_up(adapter);
3059         }
3060
3061         adapter->hw.max_frame_size = max_frame;
3062
3063         return 0;
3064 }
3065
3066 /**
3067  * e1000_update_stats - Update the board statistics counters
3068  * @adapter: board private structure
3069  **/
3070
3071 void
3072 e1000_update_stats(struct e1000_adapter *adapter)
3073 {
3074         struct e1000_hw *hw = &adapter->hw;
3075         unsigned long flags;
3076         uint16_t phy_tmp;
3077
3078 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3079
3080         spin_lock_irqsave(&adapter->stats_lock, flags);
3081
3082         /* these counters are modified from e1000_adjust_tbi_stats,
3083          * called from the interrupt context, so they must only
3084          * be written while holding adapter->stats_lock
3085          */
3086
3087         adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3088         adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3089         adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3090         adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3091         adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3092         adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3093         adapter->stats.roc += E1000_READ_REG(hw, ROC);
3094         adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3095         adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3096         adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3097         adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3098         adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3099         adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3100
3101         adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3102         adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3103         adapter->stats.scc += E1000_READ_REG(hw, SCC);
3104         adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3105         adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3106         adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3107         adapter->stats.dc += E1000_READ_REG(hw, DC);
3108         adapter->stats.sec += E1000_READ_REG(hw, SEC);
3109         adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3110         adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3111         adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3112         adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3113         adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3114         adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3115         adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3116         adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3117         adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3118         adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3119         adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3120         adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3121         adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3122         adapter->stats.torl += E1000_READ_REG(hw, TORL);
3123         adapter->stats.torh += E1000_READ_REG(hw, TORH);
3124         adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3125         adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3126         adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3127         adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3128         adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3129         adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3130         adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3131         adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3132         adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3133         adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3134         adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3135
3136         /* used for adaptive IFS */
3137
3138         hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3139         adapter->stats.tpt += hw->tx_packet_delta;
3140         hw->collision_delta = E1000_READ_REG(hw, COLC);
3141         adapter->stats.colc += hw->collision_delta;
3142
3143         if(hw->mac_type >= e1000_82543) {
3144                 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3145                 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3146                 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3147                 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3148                 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3149                 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3150         }
3151         if(hw->mac_type > e1000_82547_rev_2) {
3152                 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3153                 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3154                 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3155                 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3156                 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3157                 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3158                 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3159                 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3160                 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3161         }
3162
3163         /* Fill out the OS statistics structure */
3164
3165         adapter->net_stats.rx_packets = adapter->stats.gprc;
3166         adapter->net_stats.tx_packets = adapter->stats.gptc;
3167         adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3168         adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3169         adapter->net_stats.multicast = adapter->stats.mprc;
3170         adapter->net_stats.collisions = adapter->stats.colc;
3171
3172         /* Rx Errors */
3173
3174         adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3175                 adapter->stats.crcerrs + adapter->stats.algnerrc +
3176                 adapter->stats.rlec + adapter->stats.cexterr;
3177         adapter->net_stats.rx_dropped = 0;
3178         adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3179         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3180         adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3181         adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3182
3183         /* Tx Errors */
3184
3185         adapter->net_stats.tx_errors = adapter->stats.ecol +
3186                                        adapter->stats.latecol;
3187         adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3188         adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3189         adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3190
3191         /* Tx Dropped needs to be maintained elsewhere */
3192
3193         /* Phy Stats */
3194
3195         if(hw->media_type == e1000_media_type_copper) {
3196                 if((adapter->link_speed == SPEED_1000) &&
3197                    (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3198                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3199                         adapter->phy_stats.idle_errors += phy_tmp;
3200                 }
3201
3202                 if((hw->mac_type <= e1000_82546) &&
3203                    (hw->phy_type == e1000_phy_m88) &&
3204                    !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3205                         adapter->phy_stats.receive_errors += phy_tmp;
3206         }
3207
3208         spin_unlock_irqrestore(&adapter->stats_lock, flags);
3209 }
3210
3211 #ifdef CONFIG_E1000_MQ
3212 void
3213 e1000_rx_schedule(void *data)
3214 {
3215         struct net_device *poll_dev, *netdev = data;
3216         struct e1000_adapter *adapter = netdev->priv;
3217         int this_cpu = get_cpu();
3218
3219         poll_dev = *per_cpu_ptr(adapter->cpu_netdev, this_cpu);
3220         if (poll_dev == NULL) {
3221                 put_cpu();
3222                 return;
3223         }
3224
3225         if (likely(netif_rx_schedule_prep(poll_dev)))
3226                 __netif_rx_schedule(poll_dev);
3227         else
3228                 e1000_irq_enable(adapter);
3229
3230         put_cpu();
3231 }
3232 #endif
3233
3234 /**
3235  * e1000_intr - Interrupt Handler
3236  * @irq: interrupt number
3237  * @data: pointer to a network interface device structure
3238  * @pt_regs: CPU registers structure
3239  **/
3240
3241 static irqreturn_t
3242 e1000_intr(int irq, void *data, struct pt_regs *regs)
3243 {
3244         struct net_device *netdev = data;
3245         struct e1000_adapter *adapter = netdev_priv(netdev);
3246         struct e1000_hw *hw = &adapter->hw;
3247         uint32_t icr = E1000_READ_REG(hw, ICR);
3248 #if defined(CONFIG_E1000_NAPI) && defined(CONFIG_E1000_MQ) || !defined(CONFIG_E1000_NAPI)
3249         int i;
3250 #endif
3251
3252         if(unlikely(!icr))
3253                 return IRQ_NONE;  /* Not our interrupt */
3254
3255         if(unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3256                 hw->get_link_status = 1;
3257                 mod_timer(&adapter->watchdog_timer, jiffies);
3258         }
3259
3260 #ifdef CONFIG_E1000_NAPI
3261         atomic_inc(&adapter->irq_sem);
3262         E1000_WRITE_REG(hw, IMC, ~0);
3263         E1000_WRITE_FLUSH(hw);
3264 #ifdef CONFIG_E1000_MQ
3265         if (atomic_read(&adapter->rx_sched_call_data.count) == 0) {
3266                 /* We must setup the cpumask once count == 0 since
3267                  * each cpu bit is cleared when the work is done. */
3268                 adapter->rx_sched_call_data.cpumask = adapter->cpumask;
3269                 atomic_add(adapter->num_rx_queues - 1, &adapter->irq_sem);
3270                 atomic_set(&adapter->rx_sched_call_data.count,
3271                            adapter->num_rx_queues);
3272                 smp_call_async_mask(&adapter->rx_sched_call_data);
3273         } else {
3274                 printk("call_data.count == %u\n", atomic_read(&adapter->rx_sched_call_data.count));
3275         }
3276 #else /* if !CONFIG_E1000_MQ */
3277         if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
3278                 __netif_rx_schedule(&adapter->polling_netdev[0]);
3279         else
3280                 e1000_irq_enable(adapter);
3281 #endif /* CONFIG_E1000_MQ */
3282
3283 #else /* if !CONFIG_E1000_NAPI */
3284         /* Writing IMC and IMS is needed for 82547.
3285            Due to Hub Link bus being occupied, an interrupt
3286            de-assertion message is not able to be sent.
3287            When an interrupt assertion message is generated later,
3288            two messages are re-ordered and sent out.
3289            That causes APIC to think 82547 is in de-assertion
3290            state, while 82547 is in assertion state, resulting
3291            in dead lock. Writing IMC forces 82547 into
3292            de-assertion state.
3293         */
3294         if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2){
3295                 atomic_inc(&adapter->irq_sem);
3296                 E1000_WRITE_REG(hw, IMC, ~0);
3297         }
3298
3299         for(i = 0; i < E1000_MAX_INTR; i++)
3300                 if(unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3301                    !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3302                         break;
3303
3304         if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3305                 e1000_irq_enable(adapter);
3306
3307 #endif /* CONFIG_E1000_NAPI */
3308
3309         return IRQ_HANDLED;
3310 }
3311
3312 #ifdef CONFIG_E1000_NAPI
3313 /**
3314  * e1000_clean - NAPI Rx polling callback
3315  * @adapter: board private structure
3316  **/
3317
3318 static int
3319 e1000_clean(struct net_device *poll_dev, int *budget)
3320 {
3321         struct e1000_adapter *adapter;
3322         int work_to_do = min(*budget, poll_dev->quota);
3323         int tx_cleaned, i = 0, work_done = 0;
3324
3325         /* Must NOT use netdev_priv macro here. */
3326         adapter = poll_dev->priv;
3327
3328         /* Keep link state information with original netdev */
3329         if (!netif_carrier_ok(adapter->netdev))
3330                 goto quit_polling;
3331
3332         while (poll_dev != &adapter->polling_netdev[i]) {
3333                 i++;
3334                 if (unlikely(i == adapter->num_rx_queues))
3335                         BUG();
3336         }
3337
3338         tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
3339         adapter->clean_rx(adapter, &adapter->rx_ring[i],
3340                           &work_done, work_to_do);
3341
3342         *budget -= work_done;
3343         poll_dev->quota -= work_done;
3344         
3345         /* If no Tx and not enough Rx work done, exit the polling mode */
3346         if((!tx_cleaned && (work_done == 0)) ||
3347            !netif_running(adapter->netdev)) {
3348 quit_polling:
3349                 netif_rx_complete(poll_dev);
3350                 e1000_irq_enable(adapter);
3351                 return 0;
3352         }
3353
3354         return 1;
3355 }
3356
3357 #endif
3358 /**
3359  * e1000_clean_tx_irq - Reclaim resources after transmit completes
3360  * @adapter: board private structure
3361  **/
3362
3363 static boolean_t
3364 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3365                    struct e1000_tx_ring *tx_ring)
3366 {
3367         struct net_device *netdev = adapter->netdev;
3368         struct e1000_tx_desc *tx_desc, *eop_desc;
3369         struct e1000_buffer *buffer_info;
3370         unsigned int i, eop;
3371         boolean_t cleaned = FALSE;
3372
3373         i = tx_ring->next_to_clean;
3374         eop = tx_ring->buffer_info[i].next_to_watch;
3375         eop_desc = E1000_TX_DESC(*tx_ring, eop);
3376
3377         while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3378                 for(cleaned = FALSE; !cleaned; ) {
3379                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3380                         buffer_info = &tx_ring->buffer_info[i];
3381                         cleaned = (i == eop);
3382
3383                         e1000_unmap_and_free_tx_resource(adapter, buffer_info);
3384
3385                         tx_desc->buffer_addr = 0;
3386                         tx_desc->lower.data = 0;
3387                         tx_desc->upper.data = 0;
3388
3389                         if(unlikely(++i == tx_ring->count)) i = 0;
3390                 }
3391
3392 #ifdef CONFIG_E1000_MQ
3393                 tx_ring->tx_stats.packets++;
3394 #endif
3395
3396                 eop = tx_ring->buffer_info[i].next_to_watch;
3397                 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3398         }
3399
3400         tx_ring->next_to_clean = i;
3401
3402         spin_lock(&tx_ring->tx_lock);
3403
3404         if(unlikely(cleaned && netif_queue_stopped(netdev) &&
3405                     netif_carrier_ok(netdev)))
3406                 netif_wake_queue(netdev);
3407
3408         spin_unlock(&tx_ring->tx_lock);
3409
3410         if (adapter->detect_tx_hung) {
3411                 /* Detect a transmit hang in hardware, this serializes the
3412                  * check with the clearing of time_stamp and movement of i */
3413                 adapter->detect_tx_hung = FALSE;
3414                 if (tx_ring->buffer_info[eop].dma &&
3415                     time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
3416                                adapter->tx_timeout_factor * HZ)
3417                     && !(E1000_READ_REG(&adapter->hw, STATUS) &
3418                          E1000_STATUS_TXOFF)) {
3419
3420                         /* detected Tx unit hang */
3421                         DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
3422                                         "  Tx Queue             <%lu>\n"
3423                                         "  TDH                  <%x>\n"
3424                                         "  TDT                  <%x>\n"
3425                                         "  next_to_use          <%x>\n"
3426                                         "  next_to_clean        <%x>\n"
3427                                         "buffer_info[next_to_clean]\n"
3428                                         "  time_stamp           <%lx>\n"
3429                                         "  next_to_watch        <%x>\n"
3430                                         "  jiffies              <%lx>\n"
3431                                         "  next_to_watch.status <%x>\n",
3432                                 (unsigned long)((tx_ring - adapter->tx_ring) /
3433                                         sizeof(struct e1000_tx_ring)),
3434                                 readl(adapter->hw.hw_addr + tx_ring->tdh),
3435                                 readl(adapter->hw.hw_addr + tx_ring->tdt),
3436                                 tx_ring->next_to_use,
3437                                 tx_ring->next_to_clean,
3438                                 tx_ring->buffer_info[eop].time_stamp,
3439                                 eop,
3440                                 jiffies,
3441                                 eop_desc->upper.fields.status);
3442                         netif_stop_queue(netdev);
3443                 }
3444         }
3445         return cleaned;
3446 }
3447
3448 /**
3449  * e1000_rx_checksum - Receive Checksum Offload for 82543
3450  * @adapter:     board private structure
3451  * @status_err:  receive descriptor status and error fields
3452  * @csum:        receive descriptor csum field
3453  * @sk_buff:     socket buffer with received data
3454  **/
3455
3456 static inline void
3457 e1000_rx_checksum(struct e1000_adapter *adapter,
3458                   uint32_t status_err, uint32_t csum,
3459                   struct sk_buff *skb)
3460 {
3461         uint16_t status = (uint16_t)status_err;
3462         uint8_t errors = (uint8_t)(status_err >> 24);
3463         skb->ip_summed = CHECKSUM_NONE;
3464
3465         /* 82543 or newer only */
3466         if(unlikely(adapter->hw.mac_type < e1000_82543)) return;
3467         /* Ignore Checksum bit is set */
3468         if(unlikely(status & E1000_RXD_STAT_IXSM)) return;
3469         /* TCP/UDP checksum error bit is set */
3470         if(unlikely(errors & E1000_RXD_ERR_TCPE)) {
3471                 /* let the stack verify checksum errors */
3472                 adapter->hw_csum_err++;
3473                 return;
3474         }
3475         /* TCP/UDP Checksum has not been calculated */
3476         if(adapter->hw.mac_type <= e1000_82547_rev_2) {
3477                 if(!(status & E1000_RXD_STAT_TCPCS))
3478                         return;
3479         } else {
3480                 if(!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
3481                         return;
3482         }
3483         /* It must be a TCP or UDP packet with a valid checksum */
3484         if (likely(status & E1000_RXD_STAT_TCPCS)) {
3485                 /* TCP checksum is good */
3486                 skb->ip_summed = CHECKSUM_UNNECESSARY;
3487         } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3488                 /* IP fragment with UDP payload */
3489                 /* Hardware complements the payload checksum, so we undo it
3490                  * and then put the value in host order for further stack use.
3491                  */
3492                 csum = ntohl(csum ^ 0xFFFF);
3493                 skb->csum = csum;
3494                 skb->ip_summed = CHECKSUM_HW;
3495         }
3496         adapter->hw_csum_good++;
3497 }
3498
3499 /**
3500  * e1000_clean_rx_irq - Send received data up the network stack; legacy
3501  * @adapter: board private structure
3502  **/
3503
3504 static boolean_t
3505 #ifdef CONFIG_E1000_NAPI
3506 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3507                    struct e1000_rx_ring *rx_ring,
3508                    int *work_done, int work_to_do)
3509 #else
3510 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3511                    struct e1000_rx_ring *rx_ring)
3512 #endif
3513 {
3514         struct net_device *netdev = adapter->netdev;
3515         struct pci_dev *pdev = adapter->pdev;
3516         struct e1000_rx_desc *rx_desc;
3517         struct e1000_buffer *buffer_info;
3518         struct sk_buff *skb;
3519         unsigned long flags;
3520         uint32_t length;
3521         uint8_t last_byte;
3522         unsigned int i;
3523         boolean_t cleaned = FALSE;
3524
3525         i = rx_ring->next_to_clean;
3526         rx_desc = E1000_RX_DESC(*rx_ring, i);
3527
3528         while(rx_desc->status & E1000_RXD_STAT_DD) {
3529                 buffer_info = &rx_ring->buffer_info[i];
3530 #ifdef CONFIG_E1000_NAPI
3531                 if(*work_done >= work_to_do)
3532                         break;
3533                 (*work_done)++;
3534 #endif
3535                 cleaned = TRUE;
3536
3537                 pci_unmap_single(pdev,
3538                                  buffer_info->dma,
3539                                  buffer_info->length,
3540                                  PCI_DMA_FROMDEVICE);
3541
3542                 skb = buffer_info->skb;
3543                 length = le16_to_cpu(rx_desc->length);
3544
3545                 if(unlikely(!(rx_desc->status & E1000_RXD_STAT_EOP))) {
3546                         /* All receives must fit into a single buffer */
3547                         E1000_DBG("%s: Receive packet consumed multiple"
3548                                   " buffers\n", netdev->name);
3549                         dev_kfree_skb_irq(skb);
3550                         goto next_desc;
3551                 }
3552
3553                 if(unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
3554                         last_byte = *(skb->data + length - 1);
3555                         if(TBI_ACCEPT(&adapter->hw, rx_desc->status,
3556                                       rx_desc->errors, length, last_byte)) {
3557                                 spin_lock_irqsave(&adapter->stats_lock, flags);
3558                                 e1000_tbi_adjust_stats(&adapter->hw,
3559                                                        &adapter->stats,
3560                                                        length, skb->data);
3561                                 spin_unlock_irqrestore(&adapter->stats_lock,
3562                                                        flags);
3563                                 length--;
3564                         } else {
3565                                 dev_kfree_skb_irq(skb);
3566                                 goto next_desc;
3567                         }
3568                 }
3569
3570                 /* Good Receive */
3571                 skb_put(skb, length - ETHERNET_FCS_SIZE);
3572
3573                 /* Receive Checksum Offload */
3574                 e1000_rx_checksum(adapter,
3575                                   (uint32_t)(rx_desc->status) |
3576                                   ((uint32_t)(rx_desc->errors) << 24),
3577                                   rx_desc->csum, skb);
3578                 skb->protocol = eth_type_trans(skb, netdev);
3579 #ifdef CONFIG_E1000_NAPI
3580                 if(unlikely(adapter->vlgrp &&
3581                             (rx_desc->status & E1000_RXD_STAT_VP))) {
3582                         vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3583                                                  le16_to_cpu(rx_desc->special) &
3584                                                  E1000_RXD_SPC_VLAN_MASK);
3585                 } else {
3586                         netif_receive_skb(skb);
3587                 }
3588 #else /* CONFIG_E1000_NAPI */
3589                 if(unlikely(adapter->vlgrp &&
3590                             (rx_desc->status & E1000_RXD_STAT_VP))) {
3591                         vlan_hwaccel_rx(skb, adapter->vlgrp,
3592                                         le16_to_cpu(rx_desc->special) &
3593                                         E1000_RXD_SPC_VLAN_MASK);
3594                 } else {
3595                         netif_rx(skb);
3596                 }
3597 #endif /* CONFIG_E1000_NAPI */
3598                 netdev->last_rx = jiffies;
3599 #ifdef CONFIG_E1000_MQ
3600                 rx_ring->rx_stats.packets++;
3601                 rx_ring->rx_stats.bytes += length;
3602 #endif
3603
3604 next_desc:
3605                 rx_desc->status = 0;
3606                 buffer_info->skb = NULL;
3607                 if(unlikely(++i == rx_ring->count)) i = 0;
3608
3609                 rx_desc = E1000_RX_DESC(*rx_ring, i);
3610         }
3611         rx_ring->next_to_clean = i;
3612         adapter->alloc_rx_buf(adapter, rx_ring);
3613
3614         return cleaned;
3615 }
3616
3617 /**
3618  * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3619  * @adapter: board private structure
3620  **/
3621
3622 static boolean_t
3623 #ifdef CONFIG_E1000_NAPI
3624 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3625                       struct e1000_rx_ring *rx_ring,
3626                       int *work_done, int work_to_do)
3627 #else
3628 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3629                       struct e1000_rx_ring *rx_ring)
3630 #endif
3631 {
3632         union e1000_rx_desc_packet_split *rx_desc;
3633         struct net_device *netdev = adapter->netdev;
3634         struct pci_dev *pdev = adapter->pdev;
3635         struct e1000_buffer *buffer_info;
3636         struct e1000_ps_page *ps_page;
3637         struct e1000_ps_page_dma *ps_page_dma;
3638         struct sk_buff *skb;
3639         unsigned int i, j;
3640         uint32_t length, staterr;
3641         boolean_t cleaned = FALSE;
3642
3643         i = rx_ring->next_to_clean;
3644         rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3645         staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
3646
3647         while(staterr & E1000_RXD_STAT_DD) {
3648                 buffer_info = &rx_ring->buffer_info[i];
3649                 ps_page = &rx_ring->ps_page[i];
3650                 ps_page_dma = &rx_ring->ps_page_dma[i];
3651 #ifdef CONFIG_E1000_NAPI
3652                 if(unlikely(*work_done >= work_to_do))
3653                         break;
3654                 (*work_done)++;
3655 #endif
3656                 cleaned = TRUE;
3657                 pci_unmap_single(pdev, buffer_info->dma,
3658                                  buffer_info->length,
3659                                  PCI_DMA_FROMDEVICE);
3660
3661                 skb = buffer_info->skb;
3662
3663                 if(unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
3664                         E1000_DBG("%s: Packet Split buffers didn't pick up"
3665                                   " the full packet\n", netdev->name);
3666                         dev_kfree_skb_irq(skb);
3667                         goto next_desc;
3668                 }
3669
3670                 if(unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
3671                         dev_kfree_skb_irq(skb);
3672                         goto next_desc;
3673                 }
3674
3675                 length = le16_to_cpu(rx_desc->wb.middle.length0);
3676
3677                 if(unlikely(!length)) {
3678                         E1000_DBG("%s: Last part of the packet spanning"
3679                                   " multiple descriptors\n", netdev->name);
3680                         dev_kfree_skb_irq(skb);
3681                         goto next_desc;
3682                 }
3683
3684                 /* Good Receive */
3685                 skb_put(skb, length);
3686
3687                 for(j = 0; j < adapter->rx_ps_pages; j++) {
3688                         if(!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
3689                                 break;
3690
3691                         pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3692                                         PAGE_SIZE, PCI_DMA_FROMDEVICE);
3693                         ps_page_dma->ps_page_dma[j] = 0;
3694                         skb_shinfo(skb)->frags[j].page =
3695                                 ps_page->ps_page[j];
3696                         ps_page->ps_page[j] = NULL;
3697                         skb_shinfo(skb)->frags[j].page_offset = 0;
3698                         skb_shinfo(skb)->frags[j].size = length;
3699                         skb_shinfo(skb)->nr_frags++;
3700                         skb->len += length;
3701                         skb->data_len += length;
3702                 }
3703
3704                 e1000_rx_checksum(adapter, staterr,
3705                                   rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
3706                 skb->protocol = eth_type_trans(skb, netdev);
3707
3708                 if(likely(rx_desc->wb.upper.header_status &
3709                           E1000_RXDPS_HDRSTAT_HDRSP)) {
3710                         adapter->rx_hdr_split++;
3711 #ifdef HAVE_RX_ZERO_COPY
3712                         skb_shinfo(skb)->zero_copy = TRUE;
3713 #endif
3714                 }
3715 #ifdef CONFIG_E1000_NAPI
3716                 if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3717                         vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3718                                 le16_to_cpu(rx_desc->wb.middle.vlan) &
3719                                 E1000_RXD_SPC_VLAN_MASK);
3720                 } else {
3721                         netif_receive_skb(skb);
3722                 }
3723 #else /* CONFIG_E1000_NAPI */
3724                 if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3725                         vlan_hwaccel_rx(skb, adapter->vlgrp,
3726                                 le16_to_cpu(rx_desc->wb.middle.vlan) &
3727                                 E1000_RXD_SPC_VLAN_MASK);
3728                 } else {
3729                         netif_rx(skb);
3730                 }
3731 #endif /* CONFIG_E1000_NAPI */
3732                 netdev->last_rx = jiffies;
3733 #ifdef CONFIG_E1000_MQ
3734                 rx_ring->rx_stats.packets++;
3735                 rx_ring->rx_stats.bytes += length;
3736 #endif
3737
3738 next_desc:
3739                 rx_desc->wb.middle.status_error &= ~0xFF;
3740                 buffer_info->skb = NULL;
3741                 if(unlikely(++i == rx_ring->count)) i = 0;
3742
3743                 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3744                 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
3745         }
3746         rx_ring->next_to_clean = i;
3747         adapter->alloc_rx_buf(adapter, rx_ring);
3748
3749         return cleaned;
3750 }
3751
3752 /**
3753  * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
3754  * @adapter: address of board private structure
3755  **/
3756
3757 static void
3758 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
3759                        struct e1000_rx_ring *rx_ring)
3760 {
3761         struct net_device *netdev = adapter->netdev;
3762         struct pci_dev *pdev = adapter->pdev;
3763         struct e1000_rx_desc *rx_desc;
3764         struct e1000_buffer *buffer_info;
3765         struct sk_buff *skb;
3766         unsigned int i;
3767         unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
3768
3769         i = rx_ring->next_to_use;
3770         buffer_info = &rx_ring->buffer_info[i];
3771
3772         while(!buffer_info->skb) {
3773                 skb = dev_alloc_skb(bufsz);
3774
3775                 if(unlikely(!skb)) {
3776                         /* Better luck next round */
3777                         break;
3778                 }
3779
3780                 /* Fix for errata 23, can't cross 64kB boundary */
3781                 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3782                         struct sk_buff *oldskb = skb;
3783                         DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
3784                                              "at %p\n", bufsz, skb->data);
3785                         /* Try again, without freeing the previous */
3786                         skb = dev_alloc_skb(bufsz);
3787                         /* Failed allocation, critical failure */
3788                         if (!skb) {
3789                                 dev_kfree_skb(oldskb);
3790                                 break;
3791                         }
3792
3793                         if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3794                                 /* give up */
3795                                 dev_kfree_skb(skb);
3796                                 dev_kfree_skb(oldskb);
3797                                 break; /* while !buffer_info->skb */
3798                         } else {
3799                                 /* Use new allocation */
3800                                 dev_kfree_skb(oldskb);
3801                         }
3802                 }
3803                 /* Make buffer alignment 2 beyond a 16 byte boundary
3804                  * this will result in a 16 byte aligned IP header after
3805                  * the 14 byte MAC header is removed
3806                  */
3807                 skb_reserve(skb, NET_IP_ALIGN);
3808
3809                 skb->dev = netdev;
3810
3811                 buffer_info->skb = skb;
3812                 buffer_info->length = adapter->rx_buffer_len;
3813                 buffer_info->dma = pci_map_single(pdev,
3814                                                   skb->data,
3815                                                   adapter->rx_buffer_len,
3816                                                   PCI_DMA_FROMDEVICE);
3817
3818                 /* Fix for errata 23, can't cross 64kB boundary */
3819                 if (!e1000_check_64k_bound(adapter,
3820                                         (void *)(unsigned long)buffer_info->dma,
3821                                         adapter->rx_buffer_len)) {
3822                         DPRINTK(RX_ERR, ERR,
3823                                 "dma align check failed: %u bytes at %p\n",
3824                                 adapter->rx_buffer_len,
3825                                 (void *)(unsigned long)buffer_info->dma);
3826                         dev_kfree_skb(skb);
3827                         buffer_info->skb = NULL;
3828
3829                         pci_unmap_single(pdev, buffer_info->dma,
3830                                          adapter->rx_buffer_len,
3831                                          PCI_DMA_FROMDEVICE);
3832
3833                         break; /* while !buffer_info->skb */
3834                 }
3835                 rx_desc = E1000_RX_DESC(*rx_ring, i);
3836                 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3837
3838                 if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
3839                         /* Force memory writes to complete before letting h/w
3840                          * know there are new descriptors to fetch.  (Only
3841                          * applicable for weak-ordered memory model archs,
3842                          * such as IA-64). */
3843                         wmb();
3844                         writel(i, adapter->hw.hw_addr + rx_ring->rdt);
3845                 }
3846
3847                 if(unlikely(++i == rx_ring->count)) i = 0;
3848                 buffer_info = &rx_ring->buffer_info[i];
3849         }
3850
3851         rx_ring->next_to_use = i;
3852 }
3853
3854 /**
3855  * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
3856  * @adapter: address of board private structure
3857  **/
3858
3859 static void
3860 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
3861                           struct e1000_rx_ring *rx_ring)
3862 {
3863         struct net_device *netdev = adapter->netdev;
3864         struct pci_dev *pdev = adapter->pdev;
3865         union e1000_rx_desc_packet_split *rx_desc;
3866         struct e1000_buffer *buffer_info;
3867         struct e1000_ps_page *ps_page;
3868         struct e1000_ps_page_dma *ps_page_dma;
3869         struct sk_buff *skb;
3870         unsigned int i, j;
3871
3872         i = rx_ring->next_to_use;
3873         buffer_info = &rx_ring->buffer_info[i];
3874         ps_page = &rx_ring->ps_page[i];
3875         ps_page_dma = &rx_ring->ps_page_dma[i];
3876
3877         while(!buffer_info->skb) {
3878                 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3879
3880                 for(j = 0; j < PS_PAGE_BUFFERS; j++) {
3881                         if (j < adapter->rx_ps_pages) {
3882                                 if (likely(!ps_page->ps_page[j])) {
3883                                         ps_page->ps_page[j] =
3884                                                 alloc_page(GFP_ATOMIC);
3885                                         if (unlikely(!ps_page->ps_page[j]))
3886                                                 goto no_buffers;
3887                                         ps_page_dma->ps_page_dma[j] =
3888                                                 pci_map_page(pdev,
3889                                                             ps_page->ps_page[j],
3890                                                             0, PAGE_SIZE,
3891                                                             PCI_DMA_FROMDEVICE);
3892                                 }
3893                                 /* Refresh the desc even if buffer_addrs didn't
3894                                  * change because each write-back erases 
3895                                  * this info.
3896                                  */
3897                                 rx_desc->read.buffer_addr[j+1] =
3898                                      cpu_to_le64(ps_page_dma->ps_page_dma[j]);
3899                         } else
3900                                 rx_desc->read.buffer_addr[j+1] = ~0;
3901                 }
3902
3903                 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
3904
3905                 if(unlikely(!skb))
3906                         break;
3907
3908                 /* Make buffer alignment 2 beyond a 16 byte boundary
3909                  * this will result in a 16 byte aligned IP header after
3910                  * the 14 byte MAC header is removed
3911                  */
3912                 skb_reserve(skb, NET_IP_ALIGN);
3913
3914                 skb->dev = netdev;
3915
3916                 buffer_info->skb = skb;
3917                 buffer_info->length = adapter->rx_ps_bsize0;
3918                 buffer_info->dma = pci_map_single(pdev, skb->data,
3919                                                   adapter->rx_ps_bsize0,
3920                                                   PCI_DMA_FROMDEVICE);
3921
3922                 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
3923
3924                 if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
3925                         /* Force memory writes to complete before letting h/w
3926                          * know there are new descriptors to fetch.  (Only
3927                          * applicable for weak-ordered memory model archs,
3928                          * such as IA-64). */
3929                         wmb();
3930                         /* Hardware increments by 16 bytes, but packet split
3931                          * descriptors are 32 bytes...so we increment tail
3932                          * twice as much.
3933                          */
3934                         writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
3935                 }
3936
3937                 if(unlikely(++i == rx_ring->count)) i = 0;
3938                 buffer_info = &rx_ring->buffer_info[i];
3939                 ps_page = &rx_ring->ps_page[i];
3940                 ps_page_dma = &rx_ring->ps_page_dma[i];
3941         }
3942
3943 no_buffers:
3944         rx_ring->next_to_use = i;
3945 }
3946
3947 /**
3948  * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
3949  * @adapter:
3950  **/
3951
3952 static void
3953 e1000_smartspeed(struct e1000_adapter *adapter)
3954 {
3955         uint16_t phy_status;
3956         uint16_t phy_ctrl;
3957
3958         if((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
3959            !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
3960                 return;
3961
3962         if(adapter->smartspeed == 0) {
3963                 /* If Master/Slave config fault is asserted twice,
3964                  * we assume back-to-back */
3965                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
3966                 if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
3967                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
3968                 if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
3969                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
3970                 if(phy_ctrl & CR_1000T_MS_ENABLE) {
3971                         phy_ctrl &= ~CR_1000T_MS_ENABLE;
3972                         e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
3973                                             phy_ctrl);
3974                         adapter->smartspeed++;
3975                         if(!e1000_phy_setup_autoneg(&adapter->hw) &&
3976                            !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
3977                                                &phy_ctrl)) {
3978                                 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
3979                                              MII_CR_RESTART_AUTO_NEG);
3980                                 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
3981                                                     phy_ctrl);
3982                         }
3983                 }
3984                 return;
3985         } else if(adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
3986                 /* If still no link, perhaps using 2/3 pair cable */
3987                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
3988                 phy_ctrl |= CR_1000T_MS_ENABLE;
3989                 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
3990                 if(!e1000_phy_setup_autoneg(&adapter->hw) &&
3991                    !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
3992                         phy_ctrl |= (MII_CR_AUTO_NEG_EN |
3993                                      MII_CR_RESTART_AUTO_NEG);
3994                         e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
3995                 }
3996         }
3997         /* Restart process after E1000_SMARTSPEED_MAX iterations */
3998         if(adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
3999                 adapter->smartspeed = 0;
4000 }
4001
4002 /**
4003  * e1000_ioctl -
4004  * @netdev:
4005  * @ifreq:
4006  * @cmd:
4007  **/
4008
4009 static int
4010 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4011 {
4012         switch (cmd) {
4013         case SIOCGMIIPHY:
4014         case SIOCGMIIREG:
4015         case SIOCSMIIREG:
4016                 return e1000_mii_ioctl(netdev, ifr, cmd);
4017         default:
4018                 return -EOPNOTSUPP;
4019         }
4020 }
4021
4022 /**
4023  * e1000_mii_ioctl -
4024  * @netdev:
4025  * @ifreq:
4026  * @cmd:
4027  **/
4028
4029 static int
4030 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4031 {
4032         struct e1000_adapter *adapter = netdev_priv(netdev);
4033         struct mii_ioctl_data *data = if_mii(ifr);
4034         int retval;
4035         uint16_t mii_reg;
4036         uint16_t spddplx;
4037         unsigned long flags;
4038
4039         if(adapter->hw.media_type != e1000_media_type_copper)
4040                 return -EOPNOTSUPP;
4041
4042         switch (cmd) {
4043         case SIOCGMIIPHY:
4044                 data->phy_id = adapter->hw.phy_addr;
4045                 break;
4046         case SIOCGMIIREG:
4047                 if(!capable(CAP_NET_ADMIN))
4048                         return -EPERM;
4049                 spin_lock_irqsave(&adapter->stats_lock, flags);
4050                 if(e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4051                                    &data->val_out)) {
4052                         spin_unlock_irqrestore(&adapter->stats_lock, flags);
4053                         return -EIO;
4054                 }
4055                 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4056                 break;
4057         case SIOCSMIIREG:
4058                 if(!capable(CAP_NET_ADMIN))
4059                         return -EPERM;
4060                 if(data->reg_num & ~(0x1F))
4061                         return -EFAULT;
4062                 mii_reg = data->val_in;
4063                 spin_lock_irqsave(&adapter->stats_lock, flags);
4064                 if(e1000_write_phy_reg(&adapter->hw, data->reg_num,
4065                                         mii_reg)) {
4066                         spin_unlock_irqrestore(&adapter->stats_lock, flags);
4067                         return -EIO;
4068                 }
4069                 if(adapter->hw.phy_type == e1000_phy_m88) {
4070                         switch (data->reg_num) {
4071                         case PHY_CTRL:
4072                                 if(mii_reg & MII_CR_POWER_DOWN)
4073                                         break;
4074                                 if(mii_reg & MII_CR_AUTO_NEG_EN) {
4075                                         adapter->hw.autoneg = 1;
4076                                         adapter->hw.autoneg_advertised = 0x2F;
4077                                 } else {
4078                                         if (mii_reg & 0x40)
4079                                                 spddplx = SPEED_1000;
4080                                         else if (mii_reg & 0x2000)
4081                                                 spddplx = SPEED_100;
4082                                         else
4083                                                 spddplx = SPEED_10;
4084                                         spddplx += (mii_reg & 0x100)
4085                                                    ? FULL_DUPLEX :
4086                                                    HALF_DUPLEX;
4087                                         retval = e1000_set_spd_dplx(adapter,
4088                                                                     spddplx);
4089                                         if(retval) {
4090                                                 spin_unlock_irqrestore(
4091                                                         &adapter->stats_lock, 
4092                                                         flags);
4093                                                 return retval;
4094                                         }
4095                                 }
4096                                 if(netif_running(adapter->netdev)) {
4097                                         e1000_down(adapter);
4098                                         e1000_up(adapter);
4099                                 } else
4100                                         e1000_reset(adapter);
4101                                 break;
4102                         case M88E1000_PHY_SPEC_CTRL:
4103                         case M88E1000_EXT_PHY_SPEC_CTRL:
4104                                 if(e1000_phy_reset(&adapter->hw)) {
4105                                         spin_unlock_irqrestore(
4106                                                 &adapter->stats_lock, flags);
4107                                         return -EIO;
4108                                 }
4109                                 break;
4110                         }
4111                 } else {
4112                         switch (data->reg_num) {
4113                         case PHY_CTRL:
4114                                 if(mii_reg & MII_CR_POWER_DOWN)
4115                                         break;
4116                                 if(netif_running(adapter->netdev)) {
4117                                         e1000_down(adapter);
4118                                         e1000_up(adapter);
4119                                 } else
4120                                         e1000_reset(adapter);
4121                                 break;
4122                         }
4123                 }
4124                 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4125                 break;
4126         default:
4127                 return -EOPNOTSUPP;
4128         }
4129         return E1000_SUCCESS;
4130 }
4131
4132 void
4133 e1000_pci_set_mwi(struct e1000_hw *hw)
4134 {
4135         struct e1000_adapter *adapter = hw->back;
4136         int ret_val = pci_set_mwi(adapter->pdev);
4137
4138         if(ret_val)
4139                 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4140 }
4141
4142 void
4143 e1000_pci_clear_mwi(struct e1000_hw *hw)
4144 {
4145         struct e1000_adapter *adapter = hw->back;
4146
4147         pci_clear_mwi(adapter->pdev);
4148 }
4149
4150 void
4151 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4152 {
4153         struct e1000_adapter *adapter = hw->back;
4154
4155         pci_read_config_word(adapter->pdev, reg, value);
4156 }
4157
4158 void
4159 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4160 {
4161         struct e1000_adapter *adapter = hw->back;
4162
4163         pci_write_config_word(adapter->pdev, reg, *value);
4164 }
4165
4166 uint32_t
4167 e1000_io_read(struct e1000_hw *hw, unsigned long port)
4168 {
4169         return inl(port);
4170 }
4171
4172 void
4173 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4174 {
4175         outl(value, port);
4176 }
4177
4178 static void
4179 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4180 {
4181         struct e1000_adapter *adapter = netdev_priv(netdev);
4182         uint32_t ctrl, rctl;
4183
4184         e1000_irq_disable(adapter);
4185         adapter->vlgrp = grp;
4186
4187         if(grp) {
4188                 /* enable VLAN tag insert/strip */
4189                 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4190                 ctrl |= E1000_CTRL_VME;
4191                 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4192
4193                 /* enable VLAN receive filtering */
4194                 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4195                 rctl |= E1000_RCTL_VFE;
4196                 rctl &= ~E1000_RCTL_CFIEN;
4197                 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4198                 e1000_update_mng_vlan(adapter);
4199         } else {
4200                 /* disable VLAN tag insert/strip */
4201                 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4202                 ctrl &= ~E1000_CTRL_VME;
4203                 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4204
4205                 /* disable VLAN filtering */
4206                 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4207                 rctl &= ~E1000_RCTL_VFE;
4208                 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4209                 if(adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
4210                         e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4211                         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4212                 }
4213         }
4214
4215         e1000_irq_enable(adapter);
4216 }
4217
4218 static void
4219 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4220 {
4221         struct e1000_adapter *adapter = netdev_priv(netdev);
4222         uint32_t vfta, index;
4223         if((adapter->hw.mng_cookie.status &
4224                 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4225                 (vid == adapter->mng_vlan_id))
4226                 return;
4227         /* add VID to filter table */
4228         index = (vid >> 5) & 0x7F;
4229         vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4230         vfta |= (1 << (vid & 0x1F));
4231         e1000_write_vfta(&adapter->hw, index, vfta);
4232 }
4233
4234 static void
4235 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4236 {
4237         struct e1000_adapter *adapter = netdev_priv(netdev);
4238         uint32_t vfta, index;
4239
4240         e1000_irq_disable(adapter);
4241
4242         if(adapter->vlgrp)
4243                 adapter->vlgrp->vlan_devices[vid] = NULL;
4244
4245         e1000_irq_enable(adapter);
4246
4247         if((adapter->hw.mng_cookie.status &
4248                 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4249                 (vid == adapter->mng_vlan_id))
4250                 return;
4251         /* remove VID from filter table */
4252         index = (vid >> 5) & 0x7F;
4253         vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4254         vfta &= ~(1 << (vid & 0x1F));
4255         e1000_write_vfta(&adapter->hw, index, vfta);
4256 }
4257
4258 static void
4259 e1000_restore_vlan(struct e1000_adapter *adapter)
4260 {
4261         e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4262
4263         if(adapter->vlgrp) {
4264                 uint16_t vid;
4265                 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4266                         if(!adapter->vlgrp->vlan_devices[vid])
4267                                 continue;
4268                         e1000_vlan_rx_add_vid(adapter->netdev, vid);
4269                 }
4270         }
4271 }
4272
4273 int
4274 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4275 {
4276         adapter->hw.autoneg = 0;
4277
4278         /* Fiber NICs only allow 1000 gbps Full duplex */
4279         if((adapter->hw.media_type == e1000_media_type_fiber) &&
4280                 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4281                 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4282                 return -EINVAL;
4283         }
4284
4285         switch(spddplx) {
4286         case SPEED_10 + DUPLEX_HALF:
4287                 adapter->hw.forced_speed_duplex = e1000_10_half;
4288                 break;
4289         case SPEED_10 + DUPLEX_FULL:
4290                 adapter->hw.forced_speed_duplex = e1000_10_full;
4291                 break;
4292         case SPEED_100 + DUPLEX_HALF:
4293                 adapter->hw.forced_speed_duplex = e1000_100_half;
4294                 break;
4295         case SPEED_100 + DUPLEX_FULL:
4296                 adapter->hw.forced_speed_duplex = e1000_100_full;
4297                 break;
4298         case SPEED_1000 + DUPLEX_FULL:
4299                 adapter->hw.autoneg = 1;
4300                 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4301                 break;
4302         case SPEED_1000 + DUPLEX_HALF: /* not supported */
4303         default:
4304                 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4305                 return -EINVAL;
4306         }
4307         return 0;
4308 }
4309
4310 #ifdef CONFIG_PM
4311 static int
4312 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4313 {
4314         struct net_device *netdev = pci_get_drvdata(pdev);
4315         struct e1000_adapter *adapter = netdev_priv(netdev);
4316         uint32_t ctrl, ctrl_ext, rctl, manc, status;
4317         uint32_t wufc = adapter->wol;
4318
4319         netif_device_detach(netdev);
4320
4321         if(netif_running(netdev))
4322                 e1000_down(adapter);
4323
4324         status = E1000_READ_REG(&adapter->hw, STATUS);
4325         if(status & E1000_STATUS_LU)
4326                 wufc &= ~E1000_WUFC_LNKC;
4327
4328         if(wufc) {
4329                 e1000_setup_rctl(adapter);
4330                 e1000_set_multi(netdev);
4331
4332                 /* turn on all-multi mode if wake on multicast is enabled */
4333                 if(adapter->wol & E1000_WUFC_MC) {
4334                         rctl = E1000_READ_REG(&adapter->hw, RCTL);
4335                         rctl |= E1000_RCTL_MPE;
4336                         E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4337                 }
4338
4339                 if(adapter->hw.mac_type >= e1000_82540) {
4340                         ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4341                         /* advertise wake from D3Cold */
4342                         #define E1000_CTRL_ADVD3WUC 0x00100000
4343                         /* phy power management enable */
4344                         #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4345                         ctrl |= E1000_CTRL_ADVD3WUC |
4346                                 E1000_CTRL_EN_PHY_PWR_MGMT;
4347                         E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4348                 }
4349
4350                 if(adapter->hw.media_type == e1000_media_type_fiber ||
4351                    adapter->hw.media_type == e1000_media_type_internal_serdes) {
4352                         /* keep the laser running in D3 */
4353                         ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4354                         ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4355                         E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4356                 }
4357
4358                 /* Allow time for pending master requests to run */
4359                 e1000_disable_pciex_master(&adapter->hw);
4360
4361                 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4362                 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
4363                 pci_enable_wake(pdev, 3, 1);
4364                 pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
4365         } else {
4366                 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4367                 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
4368                 pci_enable_wake(pdev, 3, 0);
4369                 pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
4370         }
4371
4372         pci_save_state(pdev);
4373
4374         if(adapter->hw.mac_type >= e1000_82540 &&
4375            adapter->hw.media_type == e1000_media_type_copper) {
4376                 manc = E1000_READ_REG(&adapter->hw, MANC);
4377                 if(manc & E1000_MANC_SMBUS_EN) {
4378                         manc |= E1000_MANC_ARP_EN;
4379                         E1000_WRITE_REG(&adapter->hw, MANC, manc);
4380                         pci_enable_wake(pdev, 3, 1);
4381                         pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
4382                 }
4383         }
4384
4385         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
4386          * would have already happened in close and is redundant. */
4387         e1000_release_hw_control(adapter);
4388
4389         pci_disable_device(pdev);
4390         pci_set_power_state(pdev, pci_choose_state(pdev, state));
4391
4392         return 0;
4393 }
4394
4395 static int
4396 e1000_resume(struct pci_dev *pdev)
4397 {
4398         struct net_device *netdev = pci_get_drvdata(pdev);
4399         struct e1000_adapter *adapter = netdev_priv(netdev);
4400         uint32_t manc, ret_val;
4401
4402         pci_set_power_state(pdev, PCI_D0);
4403         pci_restore_state(pdev);
4404         ret_val = pci_enable_device(pdev);
4405         pci_set_master(pdev);
4406
4407         pci_enable_wake(pdev, PCI_D3hot, 0);
4408         pci_enable_wake(pdev, PCI_D3cold, 0);
4409
4410         e1000_reset(adapter);
4411         E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4412
4413         if(netif_running(netdev))
4414                 e1000_up(adapter);
4415
4416         netif_device_attach(netdev);
4417
4418         if(adapter->hw.mac_type >= e1000_82540 &&
4419            adapter->hw.media_type == e1000_media_type_copper) {
4420                 manc = E1000_READ_REG(&adapter->hw, MANC);
4421                 manc &= ~(E1000_MANC_ARP_EN);
4422                 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4423         }
4424
4425         /* If the controller is 82573 and f/w is AMT, do not set
4426          * DRV_LOAD until the interface is up.  For all other cases,
4427          * let the f/w know that the h/w is now under the control
4428          * of the driver. */
4429         if (adapter->hw.mac_type != e1000_82573 ||
4430             !e1000_check_mng_mode(&adapter->hw))
4431                 e1000_get_hw_control(adapter);
4432
4433         return 0;
4434 }
4435 #endif
4436 #ifdef CONFIG_NET_POLL_CONTROLLER
4437 /*
4438  * Polling 'interrupt' - used by things like netconsole to send skbs
4439  * without having to re-enable interrupts. It's not called while
4440  * the interrupt routine is executing.
4441  */
4442 static void
4443 e1000_netpoll(struct net_device *netdev)
4444 {
4445         struct e1000_adapter *adapter = netdev_priv(netdev);
4446         disable_irq(adapter->pdev->irq);
4447         e1000_intr(adapter->pdev->irq, netdev, NULL);
4448         e1000_clean_tx_irq(adapter, adapter->tx_ring);
4449         enable_irq(adapter->pdev->irq);
4450 }
4451 #endif
4452
4453 /* e1000_main.c */