2 * dm9000.c: Version 1.2 03/18/2003
4 * A Davicom DM9000 ISA NIC fast Ethernet driver for Linux.
5 * Copyright (C) 1997 Sten Wang
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
19 * V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match
20 * 06/22/2001 Support DM9801 progrmming
21 * E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000
22 * E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200
23 * R17 = (R17 & 0xfff0) | NF + 3
24 * E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200
25 * R17 = (R17 & 0xfff0) | NF
27 * v1.00 modify by simon 2001.9.5
28 * change for kernel 2.4.x
30 * v1.1 11/09/2001 fix force mode bug
32 * v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>:
34 * Added tx/rx 32 bit mode.
35 * Cleaned up for kernel merge.
37 * 03/03/2004 Sascha Hauer <s.hauer@pengutronix.de>
40 * 24-Sep-2004 Ben Dooks <ben@simtec.co.uk>
41 * Cleanup of code to remove ifdefs
42 * Allowed platform device data to influence access width
43 * Reformatting areas of code
45 * 17-Mar-2005 Sascha Hauer <s.hauer@pengutronix.de>
46 * * removed 2.4 style module parameters
47 * * removed removed unused stat counter and fixed
49 * * introduced tx_timeout function
52 * 01-Jul-2005 Ben Dooks <ben@simtec.co.uk>
53 * * fixed spinlock call without pointer
54 * * ensure spinlock is initialised
57 #include <linux/module.h>
58 #include <linux/ioport.h>
59 #include <linux/netdevice.h>
60 #include <linux/etherdevice.h>
61 #include <linux/init.h>
62 #include <linux/skbuff.h>
63 #include <linux/spinlock.h>
64 #include <linux/crc32.h>
65 #include <linux/mii.h>
66 #include <linux/ethtool.h>
67 #include <linux/dm9000.h>
68 #include <linux/delay.h>
69 #include <linux/platform_device.h>
70 #include <linux/irq.h>
72 #include <asm/delay.h>
78 /* Board/System/Debug information/definition ---------------- */
80 #define DM9000_PHY 0x40 /* PHY address 0x01 */
82 #define CARDNAME "dm9000"
83 #define PFX CARDNAME ": "
84 #define DRV_VERSION "1.30"
86 #ifdef CONFIG_BLACKFIN
93 #define DEFAULT_TRIGGER IRQF_TRIGGER_HIGH
95 #define DEFAULT_TRIGGER (0)
99 * Transmit timeout, default 5 seconds.
101 static int watchdog = 5000;
102 module_param(watchdog, int, 0400);
103 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
105 /* DM9000 register address locking.
107 * The DM9000 uses an address register to control where data written
108 * to the data register goes. This means that the address register
109 * must be preserved over interrupts or similar calls.
111 * During interrupt and other critical calls, a spinlock is used to
112 * protect the system, but the calls themselves save the address
113 * in the address register in case they are interrupting another
114 * access to the device.
116 * For general accesses a lock is provided so that calls which are
117 * allowed to sleep are serialised so that the address register does
118 * not need to be saved. This lock also serves to serialise access
119 * to the EEPROM and PHY access registers which are shared between
123 /* Structure/enum declaration ------------------------------- */
124 typedef struct board_info {
126 void __iomem *io_addr; /* Register I/O base address */
127 void __iomem *io_data; /* Data I/O address */
132 u16 queue_start_addr;
134 u8 io_mode; /* 0:word, 2:byte */
137 unsigned int in_suspend :1;
141 void (*inblk)(void __iomem *port, void *data, int length);
142 void (*outblk)(void __iomem *port, void *data, int length);
143 void (*dumpblk)(void __iomem *port, int length);
145 struct device *dev; /* parent device */
147 struct resource *addr_res; /* resources found */
148 struct resource *data_res;
149 struct resource *addr_req; /* resources requested */
150 struct resource *data_req;
151 struct resource *irq_res;
153 struct mutex addr_lock; /* phy and eeprom access lock */
157 struct mii_if_info mii;
163 #define dm9000_dbg(db, lev, msg...) do { \
164 if ((lev) < CONFIG_DM9000_DEBUGLEVEL && \
165 (lev) < db->debug_level) { \
166 dev_dbg(db->dev, msg); \
170 static inline board_info_t *to_dm9000_board(struct net_device *dev)
175 /* function declaration ------------------------------------- */
176 static int dm9000_probe(struct platform_device *);
177 static int dm9000_open(struct net_device *);
178 static int dm9000_start_xmit(struct sk_buff *, struct net_device *);
179 static int dm9000_stop(struct net_device *);
181 static void dm9000_init_dm9000(struct net_device *);
183 static irqreturn_t dm9000_interrupt(int, void *);
185 static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg);
186 static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg,
189 static void dm9000_read_eeprom(board_info_t *, int addr, u8 *to);
190 static void dm9000_write_eeprom(board_info_t *, int addr, u8 *dp);
191 static void dm9000_rx(struct net_device *);
192 static void dm9000_hash_table(struct net_device *);
194 /* DM9000 network board routine ---------------------------- */
197 dm9000_reset(board_info_t * db)
199 dev_dbg(db->dev, "resetting device\n");
202 writeb(DM9000_NCR, db->io_addr);
204 writeb(NCR_RST, db->io_data);
209 * Read a byte from I/O port
212 ior(board_info_t * db, int reg)
214 writeb(reg, db->io_addr);
215 return readb(db->io_data);
219 * Write a byte to I/O port
223 iow(board_info_t * db, int reg, int value)
225 writeb(reg, db->io_addr);
226 writeb(value, db->io_data);
229 /* routines for sending block to chip */
231 static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
233 writesb(reg, data, count);
236 static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
238 writesw(reg, data, (count+1) >> 1);
241 static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
243 writesl(reg, data, (count+3) >> 2);
246 /* input block from chip to memory */
248 static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
250 readsb(reg, data, count);
254 static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
256 readsw(reg, data, (count+1) >> 1);
259 static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
261 readsl(reg, data, (count+3) >> 2);
264 /* dump block from chip to null */
266 static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
271 for (i = 0; i < count; i++)
275 static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
280 count = (count + 1) >> 1;
282 for (i = 0; i < count; i++)
286 static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
291 count = (count + 3) >> 2;
293 for (i = 0; i < count; i++)
299 * select the specified set of io routines to use with the
303 static void dm9000_set_io(struct board_info *db, int byte_width)
305 /* use the size of the data resource to work out what IO
306 * routines we want to use
309 switch (byte_width) {
311 db->dumpblk = dm9000_dumpblk_8bit;
312 db->outblk = dm9000_outblk_8bit;
313 db->inblk = dm9000_inblk_8bit;
318 dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n");
320 db->dumpblk = dm9000_dumpblk_16bit;
321 db->outblk = dm9000_outblk_16bit;
322 db->inblk = dm9000_inblk_16bit;
327 db->dumpblk = dm9000_dumpblk_32bit;
328 db->outblk = dm9000_outblk_32bit;
329 db->inblk = dm9000_inblk_32bit;
335 /* Our watchdog timed out. Called by the networking layer */
336 static void dm9000_timeout(struct net_device *dev)
338 board_info_t *db = (board_info_t *) dev->priv;
342 /* Save previous register address */
343 reg_save = readb(db->io_addr);
344 spin_lock_irqsave(&db->lock,flags);
346 netif_stop_queue(dev);
348 dm9000_init_dm9000(dev);
349 /* We can accept TX packets again */
350 dev->trans_start = jiffies;
351 netif_wake_queue(dev);
353 /* Restore previous register address */
354 writeb(reg_save, db->io_addr);
355 spin_unlock_irqrestore(&db->lock,flags);
358 #ifdef CONFIG_NET_POLL_CONTROLLER
362 static void dm9000_poll_controller(struct net_device *dev)
364 disable_irq(dev->irq);
365 dm9000_interrupt(dev->irq,dev);
366 enable_irq(dev->irq);
372 static void dm9000_get_drvinfo(struct net_device *dev,
373 struct ethtool_drvinfo *info)
375 board_info_t *dm = to_dm9000_board(dev);
377 strcpy(info->driver, CARDNAME);
378 strcpy(info->version, DRV_VERSION);
379 strcpy(info->bus_info, to_platform_device(dm->dev)->name);
382 static u32 dm9000_get_msglevel(struct net_device *dev)
384 board_info_t *dm = to_dm9000_board(dev);
386 return dm->msg_enable;
389 static void dm9000_set_msglevel(struct net_device *dev, u32 value)
391 board_info_t *dm = to_dm9000_board(dev);
393 dm->msg_enable = value;
396 static int dm9000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
398 board_info_t *dm = to_dm9000_board(dev);
400 mii_ethtool_gset(&dm->mii, cmd);
404 static int dm9000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
406 board_info_t *dm = to_dm9000_board(dev);
408 return mii_ethtool_sset(&dm->mii, cmd);
411 static int dm9000_nway_reset(struct net_device *dev)
413 board_info_t *dm = to_dm9000_board(dev);
414 return mii_nway_restart(&dm->mii);
417 static u32 dm9000_get_link(struct net_device *dev)
419 board_info_t *dm = to_dm9000_board(dev);
420 return mii_link_ok(&dm->mii);
423 #define DM_EEPROM_MAGIC (0x444D394B)
425 static int dm9000_get_eeprom_len(struct net_device *dev)
430 static int dm9000_get_eeprom(struct net_device *dev,
431 struct ethtool_eeprom *ee, u8 *data)
433 board_info_t *dm = to_dm9000_board(dev);
434 int offset = ee->offset;
438 /* EEPROM access is aligned to two bytes */
440 if ((len & 1) != 0 || (offset & 1) != 0)
443 ee->magic = DM_EEPROM_MAGIC;
445 for (i = 0; i < len; i += 2)
446 dm9000_read_eeprom(dm, (offset + i) / 2, data + i);
451 static int dm9000_set_eeprom(struct net_device *dev,
452 struct ethtool_eeprom *ee, u8 *data)
454 board_info_t *dm = to_dm9000_board(dev);
455 int offset = ee->offset;
459 /* EEPROM access is aligned to two bytes */
461 if ((len & 1) != 0 || (offset & 1) != 0)
464 if (ee->magic != DM_EEPROM_MAGIC)
467 for (i = 0; i < len; i += 2)
468 dm9000_write_eeprom(dm, (offset + i) / 2, data + i);
473 static const struct ethtool_ops dm9000_ethtool_ops = {
474 .get_drvinfo = dm9000_get_drvinfo,
475 .get_settings = dm9000_get_settings,
476 .set_settings = dm9000_set_settings,
477 .get_msglevel = dm9000_get_msglevel,
478 .set_msglevel = dm9000_set_msglevel,
479 .nway_reset = dm9000_nway_reset,
480 .get_link = dm9000_get_link,
481 .get_eeprom_len = dm9000_get_eeprom_len,
482 .get_eeprom = dm9000_get_eeprom,
483 .set_eeprom = dm9000_set_eeprom,
487 /* dm9000_release_board
489 * release a board, and any mapped resources
493 dm9000_release_board(struct platform_device *pdev, struct board_info *db)
495 if (db->data_res == NULL) {
496 if (db->addr_res != NULL)
497 release_mem_region((unsigned long)db->io_addr, 4);
501 /* unmap our resources */
503 iounmap(db->io_addr);
504 iounmap(db->io_data);
506 /* release the resources */
508 if (db->data_req != NULL) {
509 release_resource(db->data_req);
513 if (db->addr_req != NULL) {
514 release_resource(db->addr_req);
519 #define res_size(_r) (((_r)->end - (_r)->start) + 1)
522 * Search DM9000 board, allocate space and register it
525 dm9000_probe(struct platform_device *pdev)
527 struct dm9000_plat_data *pdata = pdev->dev.platform_data;
528 struct board_info *db; /* Point a board information structure */
529 struct net_device *ndev;
536 /* Init network device */
537 ndev = alloc_etherdev(sizeof (struct board_info));
539 dev_err(&pdev->dev, "could not allocate device.\n");
543 SET_NETDEV_DEV(ndev, &pdev->dev);
545 dev_dbg(&pdev->dev, "dm9000_probe()");
547 /* setup board info structure */
548 db = (struct board_info *) ndev->priv;
549 memset(db, 0, sizeof (*db));
551 db->dev = &pdev->dev;
553 spin_lock_init(&db->lock);
554 mutex_init(&db->addr_lock);
556 if (pdev->num_resources < 2) {
559 } else if (pdev->num_resources == 2) {
560 base = pdev->resource[0].start;
562 if (!request_mem_region(base, 4, ndev->name)) {
567 ndev->base_addr = base;
568 ndev->irq = pdev->resource[1].start;
569 db->io_addr = (void __iomem *)base;
570 db->io_data = (void __iomem *)(base + 4);
572 /* ensure at least we have a default set of IO routines */
573 dm9000_set_io(db, 2);
576 db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
577 db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
578 db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
580 if (db->addr_res == NULL || db->data_res == NULL ||
581 db->irq_res == NULL) {
582 dev_err(db->dev, "insufficient resources\n");
587 i = res_size(db->addr_res);
588 db->addr_req = request_mem_region(db->addr_res->start, i,
591 if (db->addr_req == NULL) {
592 dev_err(db->dev, "cannot claim address reg area\n");
597 db->io_addr = ioremap(db->addr_res->start, i);
599 if (db->io_addr == NULL) {
600 dev_err(db->dev, "failed to ioremap address reg\n");
605 iosize = res_size(db->data_res);
606 db->data_req = request_mem_region(db->data_res->start, iosize,
609 if (db->data_req == NULL) {
610 dev_err(db->dev, "cannot claim data reg area\n");
615 db->io_data = ioremap(db->data_res->start, iosize);
617 if (db->io_data == NULL) {
618 dev_err(db->dev,"failed to ioremap data reg\n");
623 /* fill in parameters for net-dev structure */
625 ndev->base_addr = (unsigned long)db->io_addr;
626 ndev->irq = db->irq_res->start;
628 /* ensure at least we have a default set of IO routines */
629 dm9000_set_io(db, iosize);
632 /* check to see if anything is being over-ridden */
634 /* check to see if the driver wants to over-ride the
635 * default IO width */
637 if (pdata->flags & DM9000_PLATF_8BITONLY)
638 dm9000_set_io(db, 1);
640 if (pdata->flags & DM9000_PLATF_16BITONLY)
641 dm9000_set_io(db, 2);
643 if (pdata->flags & DM9000_PLATF_32BITONLY)
644 dm9000_set_io(db, 4);
646 /* check to see if there are any IO routine
649 if (pdata->inblk != NULL)
650 db->inblk = pdata->inblk;
652 if (pdata->outblk != NULL)
653 db->outblk = pdata->outblk;
655 if (pdata->dumpblk != NULL)
656 db->dumpblk = pdata->dumpblk;
658 db->flags = pdata->flags;
663 /* try two times, DM9000 sometimes gets the first read wrong */
664 for (i = 0; i < 2; i++) {
665 id_val = ior(db, DM9000_VIDL);
666 id_val |= (u32)ior(db, DM9000_VIDH) << 8;
667 id_val |= (u32)ior(db, DM9000_PIDL) << 16;
668 id_val |= (u32)ior(db, DM9000_PIDH) << 24;
670 if (id_val == DM9000_ID)
672 dev_err(db->dev, "read wrong id 0x%08x\n", id_val);
675 if (id_val != DM9000_ID) {
676 dev_err(db->dev, "wrong id: 0x%08x\n", id_val);
681 /* from this point we assume that we have found a DM9000 */
683 /* driver system function */
686 ndev->open = &dm9000_open;
687 ndev->hard_start_xmit = &dm9000_start_xmit;
688 ndev->tx_timeout = &dm9000_timeout;
689 ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
690 ndev->stop = &dm9000_stop;
691 ndev->set_multicast_list = &dm9000_hash_table;
692 ndev->ethtool_ops = &dm9000_ethtool_ops;
694 #ifdef CONFIG_NET_POLL_CONTROLLER
695 ndev->poll_controller = &dm9000_poll_controller;
698 db->msg_enable = NETIF_MSG_LINK;
699 db->mii.phy_id_mask = 0x1f;
700 db->mii.reg_num_mask = 0x1f;
701 db->mii.force_media = 0;
702 db->mii.full_duplex = 0;
704 db->mii.mdio_read = dm9000_phy_read;
705 db->mii.mdio_write = dm9000_phy_write;
707 /* try reading the node address from the attached EEPROM */
708 for (i = 0; i < 6; i += 2)
709 dm9000_read_eeprom(db, i / 2, ndev->dev_addr+i);
711 if (!is_valid_ether_addr(ndev->dev_addr)) {
712 /* try reading from mac */
714 for (i = 0; i < 6; i++)
715 ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
718 if (!is_valid_ether_addr(ndev->dev_addr))
719 dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please "
720 "set using ifconfig\n", ndev->name);
722 platform_set_drvdata(pdev, ndev);
723 ret = register_netdev(ndev);
726 DECLARE_MAC_BUF(mac);
727 printk("%s: dm9000 at %p,%p IRQ %d MAC: %s\n",
728 ndev->name, db->io_addr, db->io_data, ndev->irq,
729 print_mac(mac, ndev->dev_addr));
734 dev_err(db->dev, "not found (%d).\n", ret);
736 dm9000_release_board(pdev, db);
743 * Open the interface.
744 * The interface is opened whenever "ifconfig" actives it.
747 dm9000_open(struct net_device *dev)
749 board_info_t *db = (board_info_t *) dev->priv;
750 unsigned long irqflags = db->irq_res->flags & IRQF_TRIGGER_MASK;
752 dev_dbg(db->dev, "entering %s\n", __func__);
754 /* If there is no IRQ type specified, default to something that
755 * may work, and tell the user that this is a problem */
757 if (irqflags == IRQF_TRIGGER_NONE) {
758 dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n");
759 irqflags = DEFAULT_TRIGGER;
762 irqflags |= IRQF_SHARED;
764 if (request_irq(dev->irq, &dm9000_interrupt, irqflags, dev->name, dev))
767 /* Initialize DM9000 board */
769 dm9000_init_dm9000(dev);
771 /* Init driver variable */
774 mii_check_media(&db->mii, netif_msg_link(db), 1);
775 netif_start_queue(dev);
781 * Initilize dm9000 board
784 dm9000_init_dm9000(struct net_device *dev)
786 board_info_t *db = (board_info_t *) dev->priv;
788 dm9000_dbg(db, 1, "entering %s\n", __func__);
791 db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
793 /* GPIO0 on pre-activate PHY */
794 iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
795 iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
796 iow(db, DM9000_GPR, 0); /* Enable PHY */
798 if (db->flags & DM9000_PLATF_EXT_PHY)
799 iow(db, DM9000_NCR, NCR_EXT_PHY);
801 /* Program operating register */
802 iow(db, DM9000_TCR, 0); /* TX Polling clear */
803 iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
804 iow(db, DM9000_FCR, 0xff); /* Flow Control */
805 iow(db, DM9000_SMCR, 0); /* Special Mode */
806 /* clear TX status */
807 iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
808 iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
810 /* Set address filter table */
811 dm9000_hash_table(dev);
813 /* Activate DM9000 */
814 iow(db, DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN);
815 /* Enable TX/RX interrupt mask */
816 iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
818 /* Init Driver variable */
820 db->queue_pkt_len = 0;
821 dev->trans_start = 0;
825 * Hardware start transmission.
826 * Send a packet to media from the upper layer.
829 dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
832 board_info_t *db = (board_info_t *) dev->priv;
834 dm9000_dbg(db, 3, "%s:\n", __func__);
836 if (db->tx_pkt_cnt > 1)
839 spin_lock_irqsave(&db->lock, flags);
841 /* Move data to DM9000 TX RAM */
842 writeb(DM9000_MWCMD, db->io_addr);
844 (db->outblk)(db->io_data, skb->data, skb->len);
845 dev->stats.tx_bytes += skb->len;
848 /* TX control: First packet immediately send, second packet queue */
849 if (db->tx_pkt_cnt == 1) {
850 /* Set TX length to DM9000 */
851 iow(db, DM9000_TXPLL, skb->len & 0xff);
852 iow(db, DM9000_TXPLH, (skb->len >> 8) & 0xff);
854 /* Issue TX polling command */
855 iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
857 dev->trans_start = jiffies; /* save the time stamp */
860 db->queue_pkt_len = skb->len;
861 netif_stop_queue(dev);
864 spin_unlock_irqrestore(&db->lock, flags);
873 dm9000_shutdown(struct net_device *dev)
875 board_info_t *db = (board_info_t *) dev->priv;
878 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
879 iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
880 iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
881 iow(db, DM9000_RCR, 0x00); /* Disable RX */
885 * Stop the interface.
886 * The interface is stopped when it is brought.
889 dm9000_stop(struct net_device *ndev)
891 board_info_t *db = (board_info_t *) ndev->priv;
893 dm9000_dbg(db, 1, "entering %s\n", __func__);
895 netif_stop_queue(ndev);
896 netif_carrier_off(ndev);
899 free_irq(ndev->irq, ndev);
901 dm9000_shutdown(ndev);
907 * DM9000 interrupt handler
908 * receive the packet to upper layer, free the transmitted packet
912 dm9000_tx_done(struct net_device *dev, board_info_t * db)
914 int tx_status = ior(db, DM9000_NSR); /* Got TX status */
916 if (tx_status & (NSR_TX2END | NSR_TX1END)) {
917 /* One packet sent complete */
919 dev->stats.tx_packets++;
921 /* Queue packet check & send */
922 if (db->tx_pkt_cnt > 0) {
923 iow(db, DM9000_TXPLL, db->queue_pkt_len & 0xff);
924 iow(db, DM9000_TXPLH, (db->queue_pkt_len >> 8) & 0xff);
925 iow(db, DM9000_TCR, TCR_TXREQ);
926 dev->trans_start = jiffies;
928 netif_wake_queue(dev);
933 dm9000_interrupt(int irq, void *dev_id)
935 struct net_device *dev = dev_id;
936 board_info_t *db = (board_info_t *) dev->priv;
940 dm9000_dbg(db, 3, "entering %s\n", __func__);
942 /* A real interrupt coming */
944 spin_lock(&db->lock);
946 /* Save previous register address */
947 reg_save = readb(db->io_addr);
949 /* Disable all interrupts */
950 iow(db, DM9000_IMR, IMR_PAR);
952 /* Got DM9000 interrupt status */
953 int_status = ior(db, DM9000_ISR); /* Got ISR */
954 iow(db, DM9000_ISR, int_status); /* Clear ISR status */
956 /* Received the coming packet */
957 if (int_status & ISR_PRS)
960 /* Trnasmit Interrupt check */
961 if (int_status & ISR_PTS)
962 dm9000_tx_done(dev, db);
964 /* Re-enable interrupt mask */
965 iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
967 /* Restore previous register address */
968 writeb(reg_save, db->io_addr);
970 spin_unlock(&db->lock);
975 struct dm9000_rxhdr {
979 } __attribute__((__packed__));
982 * Received a packet and pass to upper layer
985 dm9000_rx(struct net_device *dev)
987 board_info_t *db = (board_info_t *) dev->priv;
988 struct dm9000_rxhdr rxhdr;
994 /* Check packet ready or not */
996 ior(db, DM9000_MRCMDX); /* Dummy read */
998 /* Get most updated data */
999 rxbyte = readb(db->io_data);
1001 /* Status check: this byte must be 0 or 1 */
1002 if (rxbyte > DM9000_PKT_RDY) {
1003 dev_warn(db->dev, "status check fail: %d\n", rxbyte);
1004 iow(db, DM9000_RCR, 0x00); /* Stop Device */
1005 iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
1009 if (rxbyte != DM9000_PKT_RDY)
1012 /* A packet ready now & Get status/length */
1014 writeb(DM9000_MRCMD, db->io_addr);
1016 (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
1018 RxLen = le16_to_cpu(rxhdr.RxLen);
1020 /* Packet Status check */
1023 dev_dbg(db->dev, "Bad Packet received (runt)\n");
1026 if (RxLen > DM9000_PKT_MAX) {
1027 dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen);
1030 if (rxhdr.RxStatus & 0xbf) {
1032 if (rxhdr.RxStatus & 0x01) {
1033 dev_dbg(db->dev, "fifo error\n");
1034 dev->stats.rx_fifo_errors++;
1036 if (rxhdr.RxStatus & 0x02) {
1037 dev_dbg(db->dev, "crc error\n");
1038 dev->stats.rx_crc_errors++;
1040 if (rxhdr.RxStatus & 0x80) {
1041 dev_dbg(db->dev, "length error\n");
1042 dev->stats.rx_length_errors++;
1046 /* Move data from DM9000 */
1048 && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
1049 skb_reserve(skb, 2);
1050 rdptr = (u8 *) skb_put(skb, RxLen - 4);
1052 /* Read received packet from RX SRAM */
1054 (db->inblk)(db->io_data, rdptr, RxLen);
1055 dev->stats.rx_bytes += RxLen;
1057 /* Pass to upper layer */
1058 skb->protocol = eth_type_trans(skb, dev);
1060 dev->stats.rx_packets++;
1063 /* need to dump the packet's data */
1065 (db->dumpblk)(db->io_data, RxLen);
1067 } while (rxbyte == DM9000_PKT_RDY);
1071 * Read a word data from EEPROM
1074 dm9000_read_eeprom(board_info_t *db, int offset, u8 *to)
1076 mutex_lock(&db->addr_lock);
1078 iow(db, DM9000_EPAR, offset);
1079 iow(db, DM9000_EPCR, EPCR_ERPRR);
1080 mdelay(8); /* according to the datasheet 200us should be enough,
1081 but it doesn't work */
1082 iow(db, DM9000_EPCR, 0x0);
1084 to[0] = ior(db, DM9000_EPDRL);
1085 to[1] = ior(db, DM9000_EPDRH);
1087 mutex_unlock(&db->addr_lock);
1091 * Write a word data to SROM
1094 dm9000_write_eeprom(board_info_t *db, int offset, u8 *data)
1096 mutex_lock(&db->addr_lock);
1098 iow(db, DM9000_EPAR, offset);
1099 iow(db, DM9000_EPDRH, data[1]);
1100 iow(db, DM9000_EPDRL, data[0]);
1101 iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
1102 mdelay(8); /* same shit */
1103 iow(db, DM9000_EPCR, 0);
1105 mutex_unlock(&db->addr_lock);
1109 * Calculate the CRC valude of the Rx packet
1110 * flag = 1 : return the reverse CRC (for the received packet CRC)
1111 * 0 : return the normal CRC (for Hash Table index)
1114 static unsigned long
1115 cal_CRC(unsigned char *Data, unsigned int Len, u8 flag)
1118 u32 crc = ether_crc_le(Len, Data);
1127 * Set DM9000 multicast address
1130 dm9000_hash_table(struct net_device *dev)
1132 board_info_t *db = (board_info_t *) dev->priv;
1133 struct dev_mc_list *mcptr = dev->mc_list;
1134 int mc_cnt = dev->mc_count;
1136 u16 i, oft, hash_table[4];
1137 unsigned long flags;
1139 dm9000_dbg(db, 1, "entering %s\n", __func__);
1141 spin_lock_irqsave(&db->lock,flags);
1143 for (i = 0, oft = 0x10; i < 6; i++, oft++)
1144 iow(db, oft, dev->dev_addr[i]);
1146 /* Clear Hash Table */
1147 for (i = 0; i < 4; i++)
1148 hash_table[i] = 0x0;
1150 /* broadcast address */
1151 hash_table[3] = 0x8000;
1153 /* the multicast address in Hash Table : 64 bits */
1154 for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
1155 hash_val = cal_CRC((char *) mcptr->dmi_addr, 6, 0) & 0x3f;
1156 hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
1159 /* Write the hash table to MAC MD table */
1160 for (i = 0, oft = 0x16; i < 4; i++) {
1161 iow(db, oft++, hash_table[i] & 0xff);
1162 iow(db, oft++, (hash_table[i] >> 8) & 0xff);
1165 spin_unlock_irqrestore(&db->lock,flags);
1170 * Sleep, either by using msleep() or if we are suspending, then
1171 * use mdelay() to sleep.
1173 static void dm9000_msleep(board_info_t *db, unsigned int ms)
1182 * Read a word from phyxcer
1185 dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
1187 board_info_t *db = (board_info_t *) dev->priv;
1188 unsigned long flags;
1189 unsigned int reg_save;
1192 mutex_lock(&db->addr_lock);
1194 spin_lock_irqsave(&db->lock,flags);
1196 /* Save previous register address */
1197 reg_save = readb(db->io_addr);
1199 /* Fill the phyxcer register into REG_0C */
1200 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1202 iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */
1204 writeb(reg_save, db->io_addr);
1205 spin_unlock_irqrestore(&db->lock,flags);
1207 dm9000_msleep(db, 1); /* Wait read complete */
1209 spin_lock_irqsave(&db->lock,flags);
1210 reg_save = readb(db->io_addr);
1212 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
1214 /* The read data keeps on REG_0D & REG_0E */
1215 ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
1217 /* restore the previous address */
1218 writeb(reg_save, db->io_addr);
1219 spin_unlock_irqrestore(&db->lock,flags);
1221 mutex_unlock(&db->addr_lock);
1226 * Write a word to phyxcer
1229 dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value)
1231 board_info_t *db = (board_info_t *) dev->priv;
1232 unsigned long flags;
1233 unsigned long reg_save;
1235 mutex_lock(&db->addr_lock);
1237 spin_lock_irqsave(&db->lock,flags);
1239 /* Save previous register address */
1240 reg_save = readb(db->io_addr);
1242 /* Fill the phyxcer register into REG_0C */
1243 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1245 /* Fill the written data into REG_0D & REG_0E */
1246 iow(db, DM9000_EPDRL, (value & 0xff));
1247 iow(db, DM9000_EPDRH, ((value >> 8) & 0xff));
1249 iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */
1251 writeb(reg_save, db->io_addr);
1252 spin_unlock_irqrestore(&db->lock, flags);
1254 dm9000_msleep(db, 1); /* Wait write complete */
1256 spin_lock_irqsave(&db->lock,flags);
1257 reg_save = readb(db->io_addr);
1259 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
1261 /* restore the previous address */
1262 writeb(reg_save, db->io_addr);
1264 spin_unlock_irqrestore(&db->lock, flags);
1265 mutex_unlock(&db->addr_lock);
1269 dm9000_drv_suspend(struct platform_device *dev, pm_message_t state)
1271 struct net_device *ndev = platform_get_drvdata(dev);
1275 db = (board_info_t *) ndev->priv;
1278 if (netif_running(ndev)) {
1279 netif_device_detach(ndev);
1280 dm9000_shutdown(ndev);
1287 dm9000_drv_resume(struct platform_device *dev)
1289 struct net_device *ndev = platform_get_drvdata(dev);
1290 board_info_t *db = (board_info_t *) ndev->priv;
1294 if (netif_running(ndev)) {
1296 dm9000_init_dm9000(ndev);
1298 netif_device_attach(ndev);
1307 dm9000_drv_remove(struct platform_device *pdev)
1309 struct net_device *ndev = platform_get_drvdata(pdev);
1311 platform_set_drvdata(pdev, NULL);
1313 unregister_netdev(ndev);
1314 dm9000_release_board(pdev, (board_info_t *) ndev->priv);
1315 free_netdev(ndev); /* free device structure */
1317 dev_dbg(&pdev->dev, "released and freed device\n");
1321 static struct platform_driver dm9000_driver = {
1324 .owner = THIS_MODULE,
1326 .probe = dm9000_probe,
1327 .remove = dm9000_drv_remove,
1328 .suspend = dm9000_drv_suspend,
1329 .resume = dm9000_drv_resume,
1335 printk(KERN_INFO "%s Ethernet Driver, V%s\n", CARDNAME, DRV_VERSION);
1337 return platform_driver_register(&dm9000_driver); /* search board and register */
1341 dm9000_cleanup(void)
1343 platform_driver_unregister(&dm9000_driver);
1346 module_init(dm9000_init);
1347 module_exit(dm9000_cleanup);
1349 MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1350 MODULE_DESCRIPTION("Davicom DM9000 network driver");
1351 MODULE_LICENSE("GPL");