drivers/net/atlx/atl1.c

   1 /*
   2  * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
   3  * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
   4  * Copyright(c) 2006 - 2008 Jay Cliburn <jcliburn@gmail.com>
   5  *
   6  * Derived from Intel e1000 driver
   7  * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
   8  *
   9  * This program is free software; you can redistribute it and/or modify it
  10  * under the terms of the GNU General Public License as published by the Free
  11  * Software Foundation; either version 2 of the License, or (at your option)
  12  * any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful, but WITHOUT
  15  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  17  * more details.
  18  *
  19  * You should have received a copy of the GNU General Public License along with
  20  * this program; if not, write to the Free Software Foundation, Inc., 59
  21  * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  22  *
  23  * The full GNU General Public License is included in this distribution in the
  24  * file called COPYING.
  25  *
  26  * Contact Information:
  27  * Xiong Huang <xiong_huang@attansic.com>
  28  * Attansic Technology Corp. 3F 147, Xianzheng 9th Road, Zhubei,
  29  * Xinzhu  302, TAIWAN, REPUBLIC OF CHINA
  30  *
  31  * Chris Snook <csnook@redhat.com>
  32  * Jay Cliburn <jcliburn@gmail.com>
  33  *
  34  * This version is adapted from the Attansic reference driver for
  35  * inclusion in the Linux kernel.  It is currently under heavy development.
  36  * A very incomplete list of things that need to be dealt with:
  37  *
  38  * TODO:
  39  * Add more ethtool functions.
  40  * Fix abstruse irq enable/disable condition described here:
  41  *      http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
  42  *
  43  * NEEDS TESTING:
  44  * VLAN
  45  * multicast
  46  * promiscuous mode
  47  * interrupt coalescing
  48  * SMP torture testing
  49  */
  50
  51 #include <asm/atomic.h>
  52 #include <asm/byteorder.h>
  53
  54 #include <linux/compiler.h>
  55 #include <linux/crc32.h>
  56 #include <linux/delay.h>
  57 #include <linux/dma-mapping.h>
  58 #include <linux/etherdevice.h>
  59 #include <linux/hardirq.h>
  60 #include <linux/if_ether.h>
  61 #include <linux/if_vlan.h>
  62 #include <linux/in.h>
  63 #include <linux/interrupt.h>
  64 #include <linux/ip.h>
  65 #include <linux/irqflags.h>
  66 #include <linux/irqreturn.h>
  67 #include <linux/jiffies.h>
  68 #include <linux/mii.h>
  69 #include <linux/module.h>
  70 #include <linux/moduleparam.h>
  71 #include <linux/net.h>
  72 #include <linux/netdevice.h>
  73 #include <linux/pci.h>
  74 #include <linux/pci_ids.h>
  75 #include <linux/pm.h>
  76 #include <linux/skbuff.h>
  77 #include <linux/slab.h>
  78 #include <linux/spinlock.h>
  79 #include <linux/string.h>
  80 #include <linux/tcp.h>
  81 #include <linux/timer.h>
  82 #include <linux/types.h>
  83 #include <linux/workqueue.h>
  84
  85 #include <net/checksum.h>
  86
  87 #include "atl1.h"
  88
  89 /* Temporary hack for merging atl1 and atl2 */
  90 #include "atlx.c"
  91
  92 /*
  93  * This is the only thing that needs to be changed to adjust the
  94  * maximum number of ports that the driver can manage.
  95  */
  96 #define ATL1_MAX_NIC 4
  97
  98 #define OPTION_UNSET    -1
  99 #define OPTION_DISABLED 0
 100 #define OPTION_ENABLED  1
 101
 102 #define ATL1_PARAM_INIT { [0 ... ATL1_MAX_NIC] = OPTION_UNSET }
 103
 104 /*
 105  * Interrupt Moderate Timer in units of 2 us
 106  *
 107  * Valid Range: 10-65535
 108  *
 109  * Default Value: 100 (200us)
 110  */
 111 static int __devinitdata int_mod_timer[ATL1_MAX_NIC+1] = ATL1_PARAM_INIT;
 112 static int num_int_mod_timer;
 113 module_param_array_named(int_mod_timer, int_mod_timer, int,
 114         &num_int_mod_timer, 0);
 115 MODULE_PARM_DESC(int_mod_timer, "Interrupt moderator timer");
 116
 117 #define DEFAULT_INT_MOD_CNT     100     /* 200us */
 118 #define MAX_INT_MOD_CNT         65000
 119 #define MIN_INT_MOD_CNT         50
 120
 121 struct atl1_option {
 122         enum { enable_option, range_option, list_option } type;
 123         char *name;
 124         char *err;
 125         int def;
 126         union {
 127                 struct {        /* range_option info */
 128                         int min;
 129                         int max;
 130                 } r;
 131                 struct {        /* list_option info */
 132                         int nr;
 133                         struct atl1_opt_list {
 134                                 int i;
 135                                 char *str;
 136                         } *p;
 137                 } l;
 138         } arg;
 139 };
 140
 141 static int __devinit atl1_validate_option(int *value, struct atl1_option *opt,
 142         struct pci_dev *pdev)
 143 {
 144         if (*value == OPTION_UNSET) {
 145                 *value = opt->def;
 146                 return 0;
 147         }
 148
 149         switch (opt->type) {
 150         case enable_option:
 151                 switch (*value) {
 152                 case OPTION_ENABLED:
 153                         dev_info(&pdev->dev, "%s enabled\n", opt->name);
 154                         return 0;
 155                 case OPTION_DISABLED:
 156                         dev_info(&pdev->dev, "%s disabled\n", opt->name);
 157                         return 0;
 158                 }
 159                 break;
 160         case range_option:
 161                 if (*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
 162                         dev_info(&pdev->dev, "%s set to %i\n", opt->name,
 163                                 *value);
 164                         return 0;
 165                 }
 166                 break;
 167         case list_option:{
 168                         int i;
 169                         struct atl1_opt_list *ent;
 170
 171                         for (i = 0; i < opt->arg.l.nr; i++) {
 172                                 ent = &opt->arg.l.p[i];
 173                                 if (*value == ent->i) {
 174                                         if (ent->str[0] != '\0')
 175                                                 dev_info(&pdev->dev, "%s\n",
 176                                                         ent->str);
 177                                         return 0;
 178                                 }
 179                         }
 180                 }
 181                 break;
 182
 183         default:
 184                 break;
 185         }
 186
 187         dev_info(&pdev->dev, "invalid %s specified (%i) %s\n",
 188                 opt->name, *value, opt->err);
 189         *value = opt->def;
 190         return -1;
 191 }
 192
 193 /*
 194  * atl1_check_options - Range Checking for Command Line Parameters
 195  * @adapter: board private structure
 196  *
 197  * This routine checks all command line parameters for valid user
 198  * input.  If an invalid value is given, or if no user specified
 199  * value exists, a default value is used.  The final value is stored
 200  * in a variable in the adapter structure.
 201  */
 202 void __devinit atl1_check_options(struct atl1_adapter *adapter)
 203 {
 204         struct pci_dev *pdev = adapter->pdev;
 205         int bd = adapter->bd_number;
 206         if (bd >= ATL1_MAX_NIC) {
 207                 dev_notice(&pdev->dev, "no configuration for board#%i\n", bd);
 208                 dev_notice(&pdev->dev, "using defaults for all values\n");
 209         }
 210         {                       /* Interrupt Moderate Timer */
 211                 struct atl1_option opt = {
 212                         .type = range_option,
 213                         .name = "Interrupt Moderator Timer",
 214                         .err = "using default of "
 215                                 __MODULE_STRING(DEFAULT_INT_MOD_CNT),
 216                         .def = DEFAULT_INT_MOD_CNT,
 217                         .arg = {.r = {.min = MIN_INT_MOD_CNT,
 218                                         .max = MAX_INT_MOD_CNT} }
 219                 };
 220                 int val;
 221                 if (num_int_mod_timer > bd) {
 222                         val = int_mod_timer[bd];
 223                         atl1_validate_option(&val, &opt, pdev);
 224                         adapter->imt = (u16) val;
 225                 } else
 226                         adapter->imt = (u16) (opt.def);
 227         }
 228 }
 229
 230 /*
 231  * atl1_pci_tbl - PCI Device ID Table
 232  */
 233 static const struct pci_device_id atl1_pci_tbl[] = {
 234         {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1)},
 235         /* required last entry */
 236         {0,}
 237 };
 238 MODULE_DEVICE_TABLE(pci, atl1_pci_tbl);
 239
 240 static const u32 atl1_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
 241         NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
 242
 243 static int debug = -1;
 244 module_param(debug, int, 0);
 245 MODULE_PARM_DESC(debug, "Message level (0=none,...,16=all)");
 246
 247 /*
 248  * Reset the transmit and receive units; mask and clear all interrupts.
 249  * hw - Struct containing variables accessed by shared code
 250  * return : 0  or  idle status (if error)
 251  */
 252 static s32 atl1_reset_hw(struct atl1_hw *hw)
 253 {
 254         struct pci_dev *pdev = hw->back->pdev;
 255         struct atl1_adapter *adapter = hw->back;
 256         u32 icr;
 257         int i;
 258
 259         /*
 260          * Clear Interrupt mask to stop board from generating
 261          * interrupts & Clear any pending interrupt events
 262          */
 263         /*
 264          * iowrite32(0, hw->hw_addr + REG_IMR);
 265          * iowrite32(0xffffffff, hw->hw_addr + REG_ISR);
 266          */
 267
 268         /*
 269          * Issue Soft Reset to the MAC.  This will reset the chip's
 270          * transmit, receive, DMA.  It will not effect
 271          * the current PCI configuration.  The global reset bit is self-
 272          * clearing, and should clear within a microsecond.
 273          */
 274         iowrite32(MASTER_CTRL_SOFT_RST, hw->hw_addr + REG_MASTER_CTRL);
 275         ioread32(hw->hw_addr + REG_MASTER_CTRL);
 276
 277         iowrite16(1, hw->hw_addr + REG_PHY_ENABLE);
 278         ioread16(hw->hw_addr + REG_PHY_ENABLE);
 279
 280         /* delay about 1ms */
 281         msleep(1);
 282
 283         /* Wait at least 10ms for All module to be Idle */
 284         for (i = 0; i < 10; i++) {
 285                 icr = ioread32(hw->hw_addr + REG_IDLE_STATUS);
 286                 if (!icr)
 287                         break;
 288                 /* delay 1 ms */
 289                 msleep(1);
 290                 /* FIXME: still the right way to do this? */
 291                 cpu_relax();
 292         }
 293
 294         if (icr) {
 295                 if (netif_msg_hw(adapter))
 296                         dev_dbg(&pdev->dev, "ICR = 0x%x\n", icr);
 297                 return icr;
 298         }
 299
 300         return 0;
 301 }
 302
 303 /* function about EEPROM
 304  *
 305  * check_eeprom_exist
 306  * return 0 if eeprom exist
 307  */
 308 static int atl1_check_eeprom_exist(struct atl1_hw *hw)
 309 {
 310         u32 value;
 311         value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
 312         if (value & SPI_FLASH_CTRL_EN_VPD) {
 313                 value &= ~SPI_FLASH_CTRL_EN_VPD;
 314                 iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
 315         }
 316
 317         value = ioread16(hw->hw_addr + REG_PCIE_CAP_LIST);
 318         return ((value & 0xFF00) == 0x6C00) ? 0 : 1;
 319 }
 320
 321 static bool atl1_read_eeprom(struct atl1_hw *hw, u32 offset, u32 *p_value)
 322 {
 323         int i;
 324         u32 control;
 325
 326         if (offset & 3)
 327                 /* address do not align */
 328                 return false;
 329
 330         iowrite32(0, hw->hw_addr + REG_VPD_DATA);
 331         control = (offset & VPD_CAP_VPD_ADDR_MASK) << VPD_CAP_VPD_ADDR_SHIFT;
 332         iowrite32(control, hw->hw_addr + REG_VPD_CAP);
 333         ioread32(hw->hw_addr + REG_VPD_CAP);
 334
 335         for (i = 0; i < 10; i++) {
 336                 msleep(2);
 337                 control = ioread32(hw->hw_addr + REG_VPD_CAP);
 338                 if (control & VPD_CAP_VPD_FLAG)
 339                         break;
 340         }
 341         if (control & VPD_CAP_VPD_FLAG) {
 342                 *p_value = ioread32(hw->hw_addr + REG_VPD_DATA);
 343                 return true;
 344         }
 345         /* timeout */
 346         return false;
 347 }
 348
 349 /*
 350  * Reads the value from a PHY register
 351  * hw - Struct containing variables accessed by shared code
 352  * reg_addr - address of the PHY register to read
 353  */
 354 s32 atl1_read_phy_reg(struct atl1_hw *hw, u16 reg_addr, u16 *phy_data)
 355 {
 356         u32 val;
 357         int i;
 358
 359         val = ((u32) (reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT |
 360                 MDIO_START | MDIO_SUP_PREAMBLE | MDIO_RW | MDIO_CLK_25_4 <<
 361                 MDIO_CLK_SEL_SHIFT;
 362         iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);
 363         ioread32(hw->hw_addr + REG_MDIO_CTRL);
 364
 365         for (i = 0; i < MDIO_WAIT_TIMES; i++) {
 366                 udelay(2);
 367                 val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
 368                 if (!(val & (MDIO_START | MDIO_BUSY)))
 369                         break;
 370         }
 371         if (!(val & (MDIO_START | MDIO_BUSY))) {
 372                 *phy_data = (u16) val;
 373                 return 0;
 374         }
 375         return ATLX_ERR_PHY;
 376 }
 377
 378 #define CUSTOM_SPI_CS_SETUP     2
 379 #define CUSTOM_SPI_CLK_HI       2
 380 #define CUSTOM_SPI_CLK_LO       2
 381 #define CUSTOM_SPI_CS_HOLD      2
 382 #define CUSTOM_SPI_CS_HI        3
 383
 384 static bool atl1_spi_read(struct atl1_hw *hw, u32 addr, u32 *buf)
 385 {
 386         int i;
 387         u32 value;
 388
 389         iowrite32(0, hw->hw_addr + REG_SPI_DATA);
 390         iowrite32(addr, hw->hw_addr + REG_SPI_ADDR);
 391
 392         value = SPI_FLASH_CTRL_WAIT_READY |
 393             (CUSTOM_SPI_CS_SETUP & SPI_FLASH_CTRL_CS_SETUP_MASK) <<
 394             SPI_FLASH_CTRL_CS_SETUP_SHIFT | (CUSTOM_SPI_CLK_HI &
 395                                              SPI_FLASH_CTRL_CLK_HI_MASK) <<
 396             SPI_FLASH_CTRL_CLK_HI_SHIFT | (CUSTOM_SPI_CLK_LO &
 397                                            SPI_FLASH_CTRL_CLK_LO_MASK) <<
 398             SPI_FLASH_CTRL_CLK_LO_SHIFT | (CUSTOM_SPI_CS_HOLD &
 399                                            SPI_FLASH_CTRL_CS_HOLD_MASK) <<
 400             SPI_FLASH_CTRL_CS_HOLD_SHIFT | (CUSTOM_SPI_CS_HI &
 401                                             SPI_FLASH_CTRL_CS_HI_MASK) <<
 402             SPI_FLASH_CTRL_CS_HI_SHIFT | (1 & SPI_FLASH_CTRL_INS_MASK) <<
 403             SPI_FLASH_CTRL_INS_SHIFT;
 404
 405         iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
 406
 407         value |= SPI_FLASH_CTRL_START;
 408         iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
 409         ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
 410
 411         for (i = 0; i < 10; i++) {
 412                 msleep(1);
 413                 value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
 414                 if (!(value & SPI_FLASH_CTRL_START))
 415                         break;
 416         }
 417
 418         if (value & SPI_FLASH_CTRL_START)
 419                 return false;
 420
 421         *buf = ioread32(hw->hw_addr + REG_SPI_DATA);
 422
 423         return true;
 424 }
 425
 426 /*
 427  * get_permanent_address
 428  * return 0 if get valid mac address,
 429  */
 430 static int atl1_get_permanent_address(struct atl1_hw *hw)
 431 {
 432         u32 addr[2];
 433         u32 i, control;
 434         u16 reg;
 435         u8 eth_addr[ETH_ALEN];
 436         bool key_valid;
 437
 438         if (is_valid_ether_addr(hw->perm_mac_addr))
 439                 return 0;
 440
 441         /* init */
 442         addr[0] = addr[1] = 0;
 443
 444         if (!atl1_check_eeprom_exist(hw)) {
 445                 reg = 0;
 446                 key_valid = false;
 447                 /* Read out all EEPROM content */
 448                 i = 0;
 449                 while (1) {
 450                         if (atl1_read_eeprom(hw, i + 0x100, &control)) {
 451                                 if (key_valid) {
 452                                         if (reg == REG_MAC_STA_ADDR)
 453                                                 addr[0] = control;
 454                                         else if (reg == (REG_MAC_STA_ADDR + 4))
 455                                                 addr[1] = control;
 456                                         key_valid = false;
 457                                 } else if ((control & 0xff) == 0x5A) {
 458                                         key_valid = true;
 459                                         reg = (u16) (control >> 16);
 460                                 } else
 461                                         break;
 462                         } else
 463                                 /* read error */
 464                                 break;
 465                         i += 4;
 466                 }
 467
 468                 *(u32 *) &eth_addr[2] = swab32(addr[0]);
 469                 *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
 470                 if (is_valid_ether_addr(eth_addr)) {
 471                         memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
 472                         return 0;
 473                 }
 474                 return 1;
 475         }
 476
 477         /* see if SPI FLAGS exist ? */
 478         addr[0] = addr[1] = 0;
 479         reg = 0;
 480         key_valid = false;
 481         i = 0;
 482         while (1) {
 483                 if (atl1_spi_read(hw, i + 0x1f000, &control)) {
 484                         if (key_valid) {
 485                                 if (reg == REG_MAC_STA_ADDR)
 486                                         addr[0] = control;
 487                                 else if (reg == (REG_MAC_STA_ADDR + 4))
 488                                         addr[1] = control;
 489                                 key_valid = false;
 490                         } else if ((control & 0xff) == 0x5A) {
 491                                 key_valid = true;
 492                                 reg = (u16) (control >> 16);
 493                         } else
 494                                 /* data end */
 495                                 break;
 496                 } else
 497                         /* read error */
 498                         break;
 499                 i += 4;
 500         }
 501
 502         *(u32 *) &eth_addr[2] = swab32(addr[0]);
 503         *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
 504         if (is_valid_ether_addr(eth_addr)) {
 505                 memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
 506                 return 0;
 507         }
 508
 509         /*
 510          * On some motherboards, the MAC address is written by the
 511          * BIOS directly to the MAC register during POST, and is
 512          * not stored in eeprom.  If all else thus far has failed
 513          * to fetch the permanent MAC address, try reading it directly.
 514          */
 515         addr[0] = ioread32(hw->hw_addr + REG_MAC_STA_ADDR);
 516         addr[1] = ioread16(hw->hw_addr + (REG_MAC_STA_ADDR + 4));
 517         *(u32 *) &eth_addr[2] = swab32(addr[0]);
 518         *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
 519         if (is_valid_ether_addr(eth_addr)) {
 520                 memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
 521                 return 0;
 522         }
 523
 524         return 1;
 525 }
 526
 527 /*
 528  * Reads the adapter's MAC address from the EEPROM
 529  * hw - Struct containing variables accessed by shared code
 530  */
 531 s32 atl1_read_mac_addr(struct atl1_hw *hw)
 532 {
 533         u16 i;
 534
 535         if (atl1_get_permanent_address(hw))
 536                 random_ether_addr(hw->perm_mac_addr);
 537
 538         for (i = 0; i < ETH_ALEN; i++)
 539                 hw->mac_addr[i] = hw->perm_mac_addr[i];
 540         return 0;
 541 }
 542
 543 /*
 544  * Hashes an address to determine its location in the multicast table
 545  * hw - Struct containing variables accessed by shared code
 546  * mc_addr - the multicast address to hash
 547  *
 548  * atl1_hash_mc_addr
 549  *  purpose
 550  *      set hash value for a multicast address
 551  *      hash calcu processing :
 552  *          1. calcu 32bit CRC for multicast address
 553  *          2. reverse crc with MSB to LSB
 554  */
 555 u32 atl1_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr)
 556 {
 557         u32 crc32, value = 0;
 558         int i;
 559
 560         crc32 = ether_crc_le(6, mc_addr);
 561         for (i = 0; i < 32; i++)
 562                 value |= (((crc32 >> i) & 1) << (31 - i));
 563
 564         return value;
 565 }
 566
 567 /*
 568  * Sets the bit in the multicast table corresponding to the hash value.
 569  * hw - Struct containing variables accessed by shared code
 570  * hash_value - Multicast address hash value
 571  */
 572 void atl1_hash_set(struct atl1_hw *hw, u32 hash_value)
 573 {
 574         u32 hash_bit, hash_reg;
 575         u32 mta;
 576
 577         /*
 578          * The HASH Table  is a register array of 2 32-bit registers.
 579          * It is treated like an array of 64 bits.  We want to set
 580          * bit BitArray[hash_value]. So we figure out what register
 581          * the bit is in, read it, OR in the new bit, then write
 582          * back the new value.  The register is determined by the
 583          * upper 7 bits of the hash value and the bit within that
 584          * register are determined by the lower 5 bits of the value.
 585          */
 586         hash_reg = (hash_value >> 31) & 0x1;
 587         hash_bit = (hash_value >> 26) & 0x1F;
 588         mta = ioread32((hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));
 589         mta |= (1 << hash_bit);
 590         iowrite32(mta, (hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));
 591 }
 592
 593 /*
 594  * Writes a value to a PHY register
 595  * hw - Struct containing variables accessed by shared code
 596  * reg_addr - address of the PHY register to write
 597  * data - data to write to the PHY
 598  */
 599 static s32 atl1_write_phy_reg(struct atl1_hw *hw, u32 reg_addr, u16 phy_data)
 600 {
 601         int i;
 602         u32 val;
 603
 604         val = ((u32) (phy_data & MDIO_DATA_MASK)) << MDIO_DATA_SHIFT |
 605             (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT |
 606             MDIO_SUP_PREAMBLE |
 607             MDIO_START | MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT;
 608         iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);
 609         ioread32(hw->hw_addr + REG_MDIO_CTRL);
 610
 611         for (i = 0; i < MDIO_WAIT_TIMES; i++) {
 612                 udelay(2);
 613                 val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
 614                 if (!(val & (MDIO_START | MDIO_BUSY)))
 615                         break;
 616         }
 617
 618         if (!(val & (MDIO_START | MDIO_BUSY)))
 619                 return 0;
 620
 621         return ATLX_ERR_PHY;
 622 }
 623
 624 /*
 625  * Make L001's PHY out of Power Saving State (bug)
 626  * hw - Struct containing variables accessed by shared code
 627  * when power on, L001's PHY always on Power saving State
 628  * (Gigabit Link forbidden)
 629  */
 630 static s32 atl1_phy_leave_power_saving(struct atl1_hw *hw)
 631 {
 632         s32 ret;
 633         ret = atl1_write_phy_reg(hw, 29, 0x0029);
 634         if (ret)
 635                 return ret;
 636         return atl1_write_phy_reg(hw, 30, 0);
 637 }
 638
 639 /*
 640  * Resets the PHY and make all config validate
 641  * hw - Struct containing variables accessed by shared code
 642  *
 643  * Sets bit 15 and 12 of the MII Control regiser (for F001 bug)
 644  */
 645 static s32 atl1_phy_reset(struct atl1_hw *hw)
 646 {
 647         struct pci_dev *pdev = hw->back->pdev;
 648         struct atl1_adapter *adapter = hw->back;
 649         s32 ret_val;
 650         u16 phy_data;
 651
 652         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
 653             hw->media_type == MEDIA_TYPE_1000M_FULL)
 654                 phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
 655         else {
 656                 switch (hw->media_type) {
 657                 case MEDIA_TYPE_100M_FULL:
 658                         phy_data =
 659                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
 660                             MII_CR_RESET;
 661                         break;
 662                 case MEDIA_TYPE_100M_HALF:
 663                         phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
 664                         break;
 665                 case MEDIA_TYPE_10M_FULL:
 666                         phy_data =
 667                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
 668                         break;
 669                 default:
 670                         /* MEDIA_TYPE_10M_HALF: */
 671                         phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
 672                         break;
 673                 }
 674         }
 675
 676         ret_val = atl1_write_phy_reg(hw, MII_BMCR, phy_data);
 677         if (ret_val) {
 678                 u32 val;
 679                 int i;
 680                 /* pcie serdes link may be down! */
 681                 if (netif_msg_hw(adapter))
 682                         dev_dbg(&pdev->dev, "pcie phy link down\n");
 683
 684                 for (i = 0; i < 25; i++) {
 685                         msleep(1);
 686                         val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
 687                         if (!(val & (MDIO_START | MDIO_BUSY)))
 688                                 break;
 689                 }
 690
 691                 if ((val & (MDIO_START | MDIO_BUSY)) != 0) {
 692                         if (netif_msg_hw(adapter))
 693                                 dev_warn(&pdev->dev,
 694                                         "pcie link down at least 25ms\n");
 695                         return ret_val;
 696                 }
 697         }
 698         return 0;
 699 }
 700
 701 /*
 702  * Configures PHY autoneg and flow control advertisement settings
 703  * hw - Struct containing variables accessed by shared code
 704  */
 705 static s32 atl1_phy_setup_autoneg_adv(struct atl1_hw *hw)
 706 {
 707         s32 ret_val;
 708         s16 mii_autoneg_adv_reg;
 709         s16 mii_1000t_ctrl_reg;
 710
 711         /* Read the MII Auto-Neg Advertisement Register (Address 4). */
 712         mii_autoneg_adv_reg = MII_AR_DEFAULT_CAP_MASK;
 713
 714         /* Read the MII 1000Base-T Control Register (Address 9). */
 715         mii_1000t_ctrl_reg = MII_ATLX_CR_1000T_DEFAULT_CAP_MASK;
 716
 717         /*
 718          * First we clear all the 10/100 mb speed bits in the Auto-Neg
 719          * Advertisement Register (Address 4) and the 1000 mb speed bits in
 720          * the  1000Base-T Control Register (Address 9).
 721          */
 722         mii_autoneg_adv_reg &= ~MII_AR_SPEED_MASK;
 723         mii_1000t_ctrl_reg &= ~MII_ATLX_CR_1000T_SPEED_MASK;
 724
 725         /*
 726          * Need to parse media_type  and set up
 727          * the appropriate PHY registers.
 728          */
 729         switch (hw->media_type) {
 730         case MEDIA_TYPE_AUTO_SENSOR:
 731                 mii_autoneg_adv_reg |= (MII_AR_10T_HD_CAPS |
 732                                         MII_AR_10T_FD_CAPS |
 733                                         MII_AR_100TX_HD_CAPS |
 734                                         MII_AR_100TX_FD_CAPS);
 735                 mii_1000t_ctrl_reg |= MII_ATLX_CR_1000T_FD_CAPS;
 736                 break;
 737
 738         case MEDIA_TYPE_1000M_FULL:
 739                 mii_1000t_ctrl_reg |= MII_ATLX_CR_1000T_FD_CAPS;
 740                 break;
 741
 742         case MEDIA_TYPE_100M_FULL:
 743                 mii_autoneg_adv_reg |= MII_AR_100TX_FD_CAPS;
 744                 break;
 745
 746         case MEDIA_TYPE_100M_HALF:
 747                 mii_autoneg_adv_reg |= MII_AR_100TX_HD_CAPS;
 748                 break;
 749
 750         case MEDIA_TYPE_10M_FULL:
 751                 mii_autoneg_adv_reg |= MII_AR_10T_FD_CAPS;
 752                 break;
 753
 754         default:
 755                 mii_autoneg_adv_reg |= MII_AR_10T_HD_CAPS;
 756                 break;
 757         }
 758
 759         /* flow control fixed to enable all */
 760         mii_autoneg_adv_reg |= (MII_AR_ASM_DIR | MII_AR_PAUSE);
 761
 762         hw->mii_autoneg_adv_reg = mii_autoneg_adv_reg;
 763         hw->mii_1000t_ctrl_reg = mii_1000t_ctrl_reg;
 764
 765         ret_val = atl1_write_phy_reg(hw, MII_ADVERTISE, mii_autoneg_adv_reg);
 766         if (ret_val)
 767                 return ret_val;
 768
 769         ret_val = atl1_write_phy_reg(hw, MII_ATLX_CR, mii_1000t_ctrl_reg);
 770         if (ret_val)
 771                 return ret_val;
 772
 773         return 0;
 774 }
 775
 776 /*
 777  * Configures link settings.
 778  * hw - Struct containing variables accessed by shared code
 779  * Assumes the hardware has previously been reset and the
 780  * transmitter and receiver are not enabled.
 781  */
 782 static s32 atl1_setup_link(struct atl1_hw *hw)
 783 {
 784         struct pci_dev *pdev = hw->back->pdev;
 785         struct atl1_adapter *adapter = hw->back;
 786         s32 ret_val;
 787
 788         /*
 789          * Options:
 790          *  PHY will advertise value(s) parsed from
 791          *  autoneg_advertised and fc
 792          *  no matter what autoneg is , We will not wait link result.
 793          */
 794         ret_val = atl1_phy_setup_autoneg_adv(hw);
 795         if (ret_val) {
 796                 if (netif_msg_link(adapter))
 797                         dev_dbg(&pdev->dev,
 798                                 "error setting up autonegotiation\n");
 799                 return ret_val;
 800         }
 801         /* SW.Reset , En-Auto-Neg if needed */
 802         ret_val = atl1_phy_reset(hw);
 803         if (ret_val) {
 804                 if (netif_msg_link(adapter))
 805                         dev_dbg(&pdev->dev, "error resetting phy\n");
 806                 return ret_val;
 807         }
 808         hw->phy_configured = true;
 809         return ret_val;
 810 }
 811
 812 static void atl1_init_flash_opcode(struct atl1_hw *hw)
 813 {
 814         if (hw->flash_vendor >= ARRAY_SIZE(flash_table))
 815                 /* Atmel */
 816                 hw->flash_vendor = 0;
 817
 818         /* Init OP table */
 819         iowrite8(flash_table[hw->flash_vendor].cmd_program,
 820                 hw->hw_addr + REG_SPI_FLASH_OP_PROGRAM);
 821         iowrite8(flash_table[hw->flash_vendor].cmd_sector_erase,
 822                 hw->hw_addr + REG_SPI_FLASH_OP_SC_ERASE);
 823         iowrite8(flash_table[hw->flash_vendor].cmd_chip_erase,
 824                 hw->hw_addr + REG_SPI_FLASH_OP_CHIP_ERASE);
 825         iowrite8(flash_table[hw->flash_vendor].cmd_rdid,
 826                 hw->hw_addr + REG_SPI_FLASH_OP_RDID);
 827         iowrite8(flash_table[hw->flash_vendor].cmd_wren,
 828                 hw->hw_addr + REG_SPI_FLASH_OP_WREN);
 829         iowrite8(flash_table[hw->flash_vendor].cmd_rdsr,
 830                 hw->hw_addr + REG_SPI_FLASH_OP_RDSR);
 831         iowrite8(flash_table[hw->flash_vendor].cmd_wrsr,
 832                 hw->hw_addr + REG_SPI_FLASH_OP_WRSR);
 833         iowrite8(flash_table[hw->flash_vendor].cmd_read,
 834                 hw->hw_addr + REG_SPI_FLASH_OP_READ);
 835 }
 836
 837 /*
 838  * Performs basic configuration of the adapter.
 839  * hw - Struct containing variables accessed by shared code
 840  * Assumes that the controller has previously been reset and is in a
 841  * post-reset uninitialized state. Initializes multicast table,
 842  * and  Calls routines to setup link
 843  * Leaves the transmit and receive units disabled and uninitialized.
 844  */
 845 static s32 atl1_init_hw(struct atl1_hw *hw)
 846 {
 847         u32 ret_val = 0;
 848
 849         /* Zero out the Multicast HASH table */
 850         iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);
 851         /* clear the old settings from the multicast hash table */
 852         iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));
 853
 854         atl1_init_flash_opcode(hw);
 855
 856         if (!hw->phy_configured) {
 857                 /* enable GPHY LinkChange Interrrupt */
 858                 ret_val = atl1_write_phy_reg(hw, 18, 0xC00);
 859                 if (ret_val)
 860                         return ret_val;
 861                 /* make PHY out of power-saving state */
 862                 ret_val = atl1_phy_leave_power_saving(hw);
 863                 if (ret_val)
 864                         return ret_val;
 865                 /* Call a subroutine to configure the link */
 866                 ret_val = atl1_setup_link(hw);
 867         }
 868         return ret_val;
 869 }
 870
 871 /*
 872  * Detects the current speed and duplex settings of the hardware.
 873  * hw - Struct containing variables accessed by shared code
 874  * speed - Speed of the connection
 875  * duplex - Duplex setting of the connection
 876  */
 877 static s32 atl1_get_speed_and_duplex(struct atl1_hw *hw, u16 *speed, u16 *duplex)
 878 {
 879         struct pci_dev *pdev = hw->back->pdev;
 880         struct atl1_adapter *adapter = hw->back;
 881         s32 ret_val;
 882         u16 phy_data;
 883
 884         /* ; --- Read   PHY Specific Status Register (17) */
 885         ret_val = atl1_read_phy_reg(hw, MII_ATLX_PSSR, &phy_data);
 886         if (ret_val)
 887                 return ret_val;
 888
 889         if (!(phy_data & MII_ATLX_PSSR_SPD_DPLX_RESOLVED))
 890                 return ATLX_ERR_PHY_RES;
 891
 892         switch (phy_data & MII_ATLX_PSSR_SPEED) {
 893         case MII_ATLX_PSSR_1000MBS:
 894                 *speed = SPEED_1000;
 895                 break;
 896         case MII_ATLX_PSSR_100MBS:
 897                 *speed = SPEED_100;
 898                 break;
 899         case MII_ATLX_PSSR_10MBS:
 900                 *speed = SPEED_10;
 901                 break;
 902         default:
 903                 if (netif_msg_hw(adapter))
 904                         dev_dbg(&pdev->dev, "error getting speed\n");
 905                 return ATLX_ERR_PHY_SPEED;
 906                 break;
 907         }
 908         if (phy_data & MII_ATLX_PSSR_DPLX)
 909                 *duplex = FULL_DUPLEX;
 910         else
 911                 *duplex = HALF_DUPLEX;
 912
 913         return 0;
 914 }
 915
 916 void atl1_set_mac_addr(struct atl1_hw *hw)
 917 {
 918         u32 value;
 919         /*
 920          * 00-0B-6A-F6-00-DC
 921          * 0:  6AF600DC   1: 000B
 922          * low dword
 923          */
 924         value = (((u32) hw->mac_addr[2]) << 24) |
 925             (((u32) hw->mac_addr[3]) << 16) |
 926             (((u32) hw->mac_addr[4]) << 8) | (((u32) hw->mac_addr[5]));
 927         iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
 928         /* high dword */
 929         value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
 930         iowrite32(value, (hw->hw_addr + REG_MAC_STA_ADDR) + (1 << 2));
 931 }
 932
 933 /*
 934  * atl1_sw_init - Initialize general software structures (struct atl1_adapter)
 935  * @adapter: board private structure to initialize
 936  *
 937  * atl1_sw_init initializes the Adapter private data structure.
 938  * Fields are initialized based on PCI device information and
 939  * OS network device settings (MTU size).
 940  */
 941 static int __devinit atl1_sw_init(struct atl1_adapter *adapter)
 942 {
 943         struct atl1_hw *hw = &adapter->hw;
 944         struct net_device *netdev = adapter->netdev;
 945
 946         hw->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
 947         hw->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
 948
 949         adapter->wol = 0;
 950         adapter->rx_buffer_len = (hw->max_frame_size + 7) & ~7;
 951         adapter->ict = 50000;           /* 100ms */
 952         adapter->link_speed = SPEED_0;  /* hardware init */
 953         adapter->link_duplex = FULL_DUPLEX;
 954
 955         hw->phy_configured = false;
 956         hw->preamble_len = 7;
 957         hw->ipgt = 0x60;
 958         hw->min_ifg = 0x50;
 959         hw->ipgr1 = 0x40;
 960         hw->ipgr2 = 0x60;
 961         hw->max_retry = 0xf;
 962         hw->lcol = 0x37;
 963         hw->jam_ipg = 7;
 964         hw->rfd_burst = 8;
 965         hw->rrd_burst = 8;
 966         hw->rfd_fetch_gap = 1;
 967         hw->rx_jumbo_th = adapter->rx_buffer_len / 8;
 968         hw->rx_jumbo_lkah = 1;
 969         hw->rrd_ret_timer = 16;
 970         hw->tpd_burst = 4;
 971         hw->tpd_fetch_th = 16;
 972         hw->txf_burst = 0x100;
 973         hw->tx_jumbo_task_th = (hw->max_frame_size + 7) >> 3;
 974         hw->tpd_fetch_gap = 1;
 975         hw->rcb_value = atl1_rcb_64;
 976         hw->dma_ord = atl1_dma_ord_enh;
 977         hw->dmar_block = atl1_dma_req_256;
 978         hw->dmaw_block = atl1_dma_req_256;
 979         hw->cmb_rrd = 4;
 980         hw->cmb_tpd = 4;
 981         hw->cmb_rx_timer = 1;   /* about 2us */
 982         hw->cmb_tx_timer = 1;   /* about 2us */
 983         hw->smb_timer = 100000; /* about 200ms */
 984
 985         spin_lock_init(&adapter->lock);
 986         spin_lock_init(&adapter->mb_lock);
 987
 988         return 0;
 989 }
 990
 991 static int mdio_read(struct net_device *netdev, int phy_id, int reg_num)
 992 {
 993         struct atl1_adapter *adapter = netdev_priv(netdev);
 994         u16 result;
 995
 996         atl1_read_phy_reg(&adapter->hw, reg_num & 0x1f, &result);
 997
 998         return result;
 999 }
1000
1001 static void mdio_write(struct net_device *netdev, int phy_id, int reg_num,
1002         int val)
1003 {
1004         struct atl1_adapter *adapter = netdev_priv(netdev);
1005
1006         atl1_write_phy_reg(&adapter->hw, reg_num, val);
1007 }
1008
1009 /*
1010  * atl1_mii_ioctl -
1011  * @netdev:
1012  * @ifreq:
1013  * @cmd:
1014  */
1015 static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1016 {
1017         struct atl1_adapter *adapter = netdev_priv(netdev);
1018         unsigned long flags;
1019         int retval;
1020
1021         if (!netif_running(netdev))
1022                 return -EINVAL;
1023
1024         spin_lock_irqsave(&adapter->lock, flags);
1025         retval = generic_mii_ioctl(&adapter->mii, if_mii(ifr), cmd, NULL);
1026         spin_unlock_irqrestore(&adapter->lock, flags);
1027
1028         return retval;
1029 }
1030
1031 /*
1032  * atl1_setup_mem_resources - allocate Tx / RX descriptor resources
1033  * @adapter: board private structure
1034  *
1035  * Return 0 on success, negative on failure
1036  */
1037 static s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
1038 {
1039         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1040         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1041         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1042         struct atl1_ring_header *ring_header = &adapter->ring_header;
1043         struct pci_dev *pdev = adapter->pdev;
1044         int size;
1045         u8 offset = 0;
1046
1047         size = sizeof(struct atl1_buffer) * (tpd_ring->count + rfd_ring->count);
1048         tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
1049         if (unlikely(!tpd_ring->buffer_info)) {
1050                 if (netif_msg_drv(adapter))
1051                         dev_err(&pdev->dev, "kzalloc failed , size = D%d\n",
1052                                 size);
1053                 goto err_nomem;
1054         }
1055         rfd_ring->buffer_info =
1056                 (struct atl1_buffer *)(tpd_ring->buffer_info + tpd_ring->count);
1057
1058         /*
1059          * real ring DMA buffer
1060          * each ring/block may need up to 8 bytes for alignment, hence the
1061          * additional 40 bytes tacked onto the end.
1062          */
1063         ring_header->size = size =
1064                 sizeof(struct tx_packet_desc) * tpd_ring->count
1065                 + sizeof(struct rx_free_desc) * rfd_ring->count
1066                 + sizeof(struct rx_return_desc) * rrd_ring->count
1067                 + sizeof(struct coals_msg_block)
1068                 + sizeof(struct stats_msg_block)
1069                 + 40;
1070
1071         ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
1072                 &ring_header->dma);
1073         if (unlikely(!ring_header->desc)) {
1074                 if (netif_msg_drv(adapter))
1075                         dev_err(&pdev->dev, "pci_alloc_consistent failed\n");
1076                 goto err_nomem;
1077         }
1078
1079         memset(ring_header->desc, 0, ring_header->size);
1080
1081         /* init TPD ring */
1082         tpd_ring->dma = ring_header->dma;
1083         offset = (tpd_ring->dma & 0x7) ? (8 - (ring_header->dma & 0x7)) : 0;
1084         tpd_ring->dma += offset;
1085         tpd_ring->desc = (u8 *) ring_header->desc + offset;
1086         tpd_ring->size = sizeof(struct tx_packet_desc) * tpd_ring->count;
1087
1088         /* init RFD ring */
1089         rfd_ring->dma = tpd_ring->dma + tpd_ring->size;
1090         offset = (rfd_ring->dma & 0x7) ? (8 - (rfd_ring->dma & 0x7)) : 0;
1091         rfd_ring->dma += offset;
1092         rfd_ring->desc = (u8 *) tpd_ring->desc + (tpd_ring->size + offset);
1093         rfd_ring->size = sizeof(struct rx_free_desc) * rfd_ring->count;
1094
1095
1096         /* init RRD ring */
1097         rrd_ring->dma = rfd_ring->dma + rfd_ring->size;
1098         offset = (rrd_ring->dma & 0x7) ? (8 - (rrd_ring->dma & 0x7)) : 0;
1099         rrd_ring->dma += offset;
1100         rrd_ring->desc = (u8 *) rfd_ring->desc + (rfd_ring->size + offset);
1101         rrd_ring->size = sizeof(struct rx_return_desc) * rrd_ring->count;
1102
1103
1104         /* init CMB */
1105         adapter->cmb.dma = rrd_ring->dma + rrd_ring->size;
1106         offset = (adapter->cmb.dma & 0x7) ? (8 - (adapter->cmb.dma & 0x7)) : 0;
1107         adapter->cmb.dma += offset;
1108         adapter->cmb.cmb = (struct coals_msg_block *)
1109                 ((u8 *) rrd_ring->desc + (rrd_ring->size + offset));
1110
1111         /* init SMB */
1112         adapter->smb.dma = adapter->cmb.dma + sizeof(struct coals_msg_block);
1113         offset = (adapter->smb.dma & 0x7) ? (8 - (adapter->smb.dma & 0x7)) : 0;
1114         adapter->smb.dma += offset;
1115         adapter->smb.smb = (struct stats_msg_block *)
1116                 ((u8 *) adapter->cmb.cmb +
1117                 (sizeof(struct coals_msg_block) + offset));
1118
1119         return 0;
1120
1121 err_nomem:
1122         kfree(tpd_ring->buffer_info);
1123         return -ENOMEM;
1124 }
1125
1126 static void atl1_init_ring_ptrs(struct atl1_adapter *adapter)
1127 {
1128         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1129         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1130         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1131
1132         atomic_set(&tpd_ring->next_to_use, 0);
1133         atomic_set(&tpd_ring->next_to_clean, 0);
1134
1135         rfd_ring->next_to_clean = 0;
1136         atomic_set(&rfd_ring->next_to_use, 0);
1137
1138         rrd_ring->next_to_use = 0;
1139         atomic_set(&rrd_ring->next_to_clean, 0);
1140 }
1141
1142 /*
1143  * atl1_clean_rx_ring - Free RFD Buffers
1144  * @adapter: board private structure
1145  */
1146 static void atl1_clean_rx_ring(struct atl1_adapter *adapter)
1147 {
1148         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1149         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1150         struct atl1_buffer *buffer_info;
1151         struct pci_dev *pdev = adapter->pdev;
1152         unsigned long size;
1153         unsigned int i;
1154
1155         /* Free all the Rx ring sk_buffs */
1156         for (i = 0; i < rfd_ring->count; i++) {
1157                 buffer_info = &rfd_ring->buffer_info[i];
1158                 if (buffer_info->dma) {
1159                         pci_unmap_page(pdev, buffer_info->dma,
1160                                 buffer_info->length, PCI_DMA_FROMDEVICE);
1161                         buffer_info->dma = 0;
1162                 }
1163                 if (buffer_info->skb) {
1164                         dev_kfree_skb(buffer_info->skb);
1165                         buffer_info->skb = NULL;
1166                 }
1167         }
1168
1169         size = sizeof(struct atl1_buffer) * rfd_ring->count;
1170         memset(rfd_ring->buffer_info, 0, size);
1171
1172         /* Zero out the descriptor ring */
1173         memset(rfd_ring->desc, 0, rfd_ring->size);
1174
1175         rfd_ring->next_to_clean = 0;
1176         atomic_set(&rfd_ring->next_to_use, 0);
1177
1178         rrd_ring->next_to_use = 0;
1179         atomic_set(&rrd_ring->next_to_clean, 0);
1180 }
1181
1182 /*
1183  * atl1_clean_tx_ring - Free Tx Buffers
1184  * @adapter: board private structure
1185  */
1186 static void atl1_clean_tx_ring(struct atl1_adapter *adapter)
1187 {
1188         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1189         struct atl1_buffer *buffer_info;
1190         struct pci_dev *pdev = adapter->pdev;
1191         unsigned long size;
1192         unsigned int i;
1193
1194         /* Free all the Tx ring sk_buffs */
1195         for (i = 0; i < tpd_ring->count; i++) {
1196                 buffer_info = &tpd_ring->buffer_info[i];
1197                 if (buffer_info->dma) {
1198                         pci_unmap_page(pdev, buffer_info->dma,
1199                                 buffer_info->length, PCI_DMA_TODEVICE);
1200                         buffer_info->dma = 0;
1201                 }
1202         }
1203
1204         for (i = 0; i < tpd_ring->count; i++) {
1205                 buffer_info = &tpd_ring->buffer_info[i];
1206                 if (buffer_info->skb) {
1207                         dev_kfree_skb_any(buffer_info->skb);
1208                         buffer_info->skb = NULL;
1209                 }
1210         }
1211
1212         size = sizeof(struct atl1_buffer) * tpd_ring->count;
1213         memset(tpd_ring->buffer_info, 0, size);
1214
1215         /* Zero out the descriptor ring */
1216         memset(tpd_ring->desc, 0, tpd_ring->size);
1217
1218         atomic_set(&tpd_ring->next_to_use, 0);
1219         atomic_set(&tpd_ring->next_to_clean, 0);
1220 }
1221
1222 /*
1223  * atl1_free_ring_resources - Free Tx / RX descriptor Resources
1224  * @adapter: board private structure
1225  *
1226  * Free all transmit software resources
1227  */
1228 static void atl1_free_ring_resources(struct atl1_adapter *adapter)
1229 {
1230         struct pci_dev *pdev = adapter->pdev;
1231         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1232         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1233         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1234         struct atl1_ring_header *ring_header = &adapter->ring_header;
1235
1236         atl1_clean_tx_ring(adapter);
1237         atl1_clean_rx_ring(adapter);
1238
1239         kfree(tpd_ring->buffer_info);
1240         pci_free_consistent(pdev, ring_header->size, ring_header->desc,
1241                 ring_header->dma);
1242
1243         tpd_ring->buffer_info = NULL;
1244         tpd_ring->desc = NULL;
1245         tpd_ring->dma = 0;
1246
1247         rfd_ring->buffer_info = NULL;
1248         rfd_ring->desc = NULL;
1249         rfd_ring->dma = 0;
1250
1251         rrd_ring->desc = NULL;
1252         rrd_ring->dma = 0;
1253 }
1254
1255 static void atl1_setup_mac_ctrl(struct atl1_adapter *adapter)
1256 {
1257         u32 value;
1258         struct atl1_hw *hw = &adapter->hw;
1259         struct net_device *netdev = adapter->netdev;
1260         /* Config MAC CTRL Register */
1261         value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
1262         /* duplex */
1263         if (FULL_DUPLEX == adapter->link_duplex)
1264                 value |= MAC_CTRL_DUPLX;
1265         /* speed */
1266         value |= ((u32) ((SPEED_1000 == adapter->link_speed) ?
1267                          MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
1268                   MAC_CTRL_SPEED_SHIFT);
1269         /* flow control */
1270         value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1271         /* PAD & CRC */
1272         value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1273         /* preamble length */
1274         value |= (((u32) adapter->hw.preamble_len
1275                    & MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1276         /* vlan */
1277         if (adapter->vlgrp)
1278                 value |= MAC_CTRL_RMV_VLAN;
1279         /* rx checksum
1280            if (adapter->rx_csum)
1281            value |= MAC_CTRL_RX_CHKSUM_EN;
1282          */
1283         /* filter mode */
1284         value |= MAC_CTRL_BC_EN;
1285         if (netdev->flags & IFF_PROMISC)
1286                 value |= MAC_CTRL_PROMIS_EN;
1287         else if (netdev->flags & IFF_ALLMULTI)
1288                 value |= MAC_CTRL_MC_ALL_EN;
1289         /* value |= MAC_CTRL_LOOPBACK; */
1290         iowrite32(value, hw->hw_addr + REG_MAC_CTRL);
1291 }
1292
1293 static u32 atl1_check_link(struct atl1_adapter *adapter)
1294 {
1295         struct atl1_hw *hw = &adapter->hw;
1296         struct net_device *netdev = adapter->netdev;
1297         u32 ret_val;
1298         u16 speed, duplex, phy_data;
1299         int reconfig = 0;
1300
1301         /* MII_BMSR must read twice */
1302         atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
1303         atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
1304         if (!(phy_data & BMSR_LSTATUS)) {
1305                 /* link down */
1306                 if (netif_carrier_ok(netdev)) {
1307                         /* old link state: Up */
1308                         if (netif_msg_link(adapter))
1309                                 dev_info(&adapter->pdev->dev, "link is down\n");
1310                         adapter->link_speed = SPEED_0;
1311                         netif_carrier_off(netdev);
1312                         netif_stop_queue(netdev);
1313                 }
1314                 return 0;
1315         }
1316
1317         /* Link Up */
1318         ret_val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
1319         if (ret_val)
1320                 return ret_val;
1321
1322         switch (hw->media_type) {
1323         case MEDIA_TYPE_1000M_FULL:
1324                 if (speed != SPEED_1000 || duplex != FULL_DUPLEX)
1325                         reconfig = 1;
1326                 break;
1327         case MEDIA_TYPE_100M_FULL:
1328                 if (speed != SPEED_100 || duplex != FULL_DUPLEX)
1329                         reconfig = 1;
1330                 break;
1331         case MEDIA_TYPE_100M_HALF:
1332                 if (speed != SPEED_100 || duplex != HALF_DUPLEX)
1333                         reconfig = 1;
1334                 break;
1335         case MEDIA_TYPE_10M_FULL:
1336                 if (speed != SPEED_10 || duplex != FULL_DUPLEX)
1337                         reconfig = 1;
1338                 break;
1339         case MEDIA_TYPE_10M_HALF:
1340                 if (speed != SPEED_10 || duplex != HALF_DUPLEX)
1341                         reconfig = 1;
1342                 break;
1343         }
1344
1345         /* link result is our setting */
1346         if (!reconfig) {
1347                 if (adapter->link_speed != speed
1348                     || adapter->link_duplex != duplex) {
1349                         adapter->link_speed = speed;
1350                         adapter->link_duplex = duplex;
1351                         atl1_setup_mac_ctrl(adapter);
1352                         if (netif_msg_link(adapter))
1353                                 dev_info(&adapter->pdev->dev,
1354                                         "%s link is up %d Mbps %s\n",
1355                                         netdev->name, adapter->link_speed,
1356                                         adapter->link_duplex == FULL_DUPLEX ?
1357                                         "full duplex" : "half duplex");
1358                 }
1359                 if (!netif_carrier_ok(netdev)) {
1360                         /* Link down -> Up */
1361                         netif_carrier_on(netdev);
1362                         netif_wake_queue(netdev);
1363                 }
1364                 return 0;
1365         }
1366
1367         /* change original link status */
1368         if (netif_carrier_ok(netdev)) {
1369                 adapter->link_speed = SPEED_0;
1370                 netif_carrier_off(netdev);
1371                 netif_stop_queue(netdev);
1372         }
1373
1374         if (hw->media_type != MEDIA_TYPE_AUTO_SENSOR &&
1375             hw->media_type != MEDIA_TYPE_1000M_FULL) {
1376                 switch (hw->media_type) {
1377                 case MEDIA_TYPE_100M_FULL:
1378                         phy_data = MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
1379                                    MII_CR_RESET;
1380                         break;
1381                 case MEDIA_TYPE_100M_HALF:
1382                         phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
1383                         break;
1384                 case MEDIA_TYPE_10M_FULL:
1385                         phy_data =
1386                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
1387                         break;
1388                 default:
1389                         /* MEDIA_TYPE_10M_HALF: */
1390                         phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
1391                         break;
1392                 }
1393                 atl1_write_phy_reg(hw, MII_BMCR, phy_data);
1394                 return 0;
1395         }
1396
1397         /* auto-neg, insert timer to re-config phy */
1398         if (!adapter->phy_timer_pending) {
1399                 adapter->phy_timer_pending = true;
1400                 mod_timer(&adapter->phy_config_timer, jiffies + 3 * HZ);
1401         }
1402
1403         return 0;
1404 }
1405
1406 static void set_flow_ctrl_old(struct atl1_adapter *adapter)
1407 {
1408         u32 hi, lo, value;
1409
1410         /* RFD Flow Control */
1411         value = adapter->rfd_ring.count;
1412         hi = value / 16;
1413         if (hi < 2)
1414                 hi = 2;
1415         lo = value * 7 / 8;
1416
1417         value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
1418                 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
1419         iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
1420
1421         /* RRD Flow Control */
1422         value = adapter->rrd_ring.count;
1423         lo = value / 16;
1424         hi = value * 7 / 8;
1425         if (lo < 2)
1426                 lo = 2;
1427         value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
1428                 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
1429         iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
1430 }
1431
1432 static void set_flow_ctrl_new(struct atl1_hw *hw)
1433 {
1434         u32 hi, lo, value;
1435
1436         /* RXF Flow Control */
1437         value = ioread32(hw->hw_addr + REG_SRAM_RXF_LEN);
1438         lo = value / 16;
1439         if (lo < 192)
1440                 lo = 192;
1441         hi = value * 7 / 8;
1442         if (hi < lo)
1443                 hi = lo + 16;
1444         value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
1445                 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
1446         iowrite32(value, hw->hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
1447
1448         /* RRD Flow Control */
1449         value = ioread32(hw->hw_addr + REG_SRAM_RRD_LEN);
1450         lo = value / 8;
1451         hi = value * 7 / 8;
1452         if (lo < 2)
1453                 lo = 2;
1454         if (hi < lo)
1455                 hi = lo + 3;
1456         value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
1457                 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
1458         iowrite32(value, hw->hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
1459 }
1460
1461 /*
1462  * atl1_configure - Configure Transmit&Receive Unit after Reset
1463  * @adapter: board private structure
1464  *
1465  * Configure the Tx /Rx unit of the MAC after a reset.
1466  */
1467 static u32 atl1_configure(struct atl1_adapter *adapter)
1468 {
1469         struct atl1_hw *hw = &adapter->hw;
1470         u32 value;
1471
1472         /* clear interrupt status */
1473         iowrite32(0xffffffff, adapter->hw.hw_addr + REG_ISR);
1474
1475         /* set MAC Address */
1476         value = (((u32) hw->mac_addr[2]) << 24) |
1477                 (((u32) hw->mac_addr[3]) << 16) |
1478                 (((u32) hw->mac_addr[4]) << 8) |
1479                 (((u32) hw->mac_addr[5]));
1480         iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
1481         value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
1482         iowrite32(value, hw->hw_addr + (REG_MAC_STA_ADDR + 4));
1483
1484         /* tx / rx ring */
1485
1486         /* HI base address */
1487         iowrite32((u32) ((adapter->tpd_ring.dma & 0xffffffff00000000ULL) >> 32),
1488                 hw->hw_addr + REG_DESC_BASE_ADDR_HI);
1489         /* LO base address */
1490         iowrite32((u32) (adapter->rfd_ring.dma & 0x00000000ffffffffULL),
1491                 hw->hw_addr + REG_DESC_RFD_ADDR_LO);
1492         iowrite32((u32) (adapter->rrd_ring.dma & 0x00000000ffffffffULL),
1493                 hw->hw_addr + REG_DESC_RRD_ADDR_LO);
1494         iowrite32((u32) (adapter->tpd_ring.dma & 0x00000000ffffffffULL),
1495                 hw->hw_addr + REG_DESC_TPD_ADDR_LO);
1496         iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL),
1497                 hw->hw_addr + REG_DESC_CMB_ADDR_LO);
1498         iowrite32((u32) (adapter->smb.dma & 0x00000000ffffffffULL),
1499                 hw->hw_addr + REG_DESC_SMB_ADDR_LO);
1500
1501         /* element count */
1502         value = adapter->rrd_ring.count;
1503         value <<= 16;
1504         value += adapter->rfd_ring.count;
1505         iowrite32(value, hw->hw_addr + REG_DESC_RFD_RRD_RING_SIZE);
1506         iowrite32(adapter->tpd_ring.count, hw->hw_addr +
1507                 REG_DESC_TPD_RING_SIZE);
1508
1509         /* Load Ptr */
1510         iowrite32(1, hw->hw_addr + REG_LOAD_PTR);
1511
1512         /* config Mailbox */
1513         value = ((atomic_read(&adapter->tpd_ring.next_to_use)
1514                   & MB_TPD_PROD_INDX_MASK) << MB_TPD_PROD_INDX_SHIFT) |
1515                 ((atomic_read(&adapter->rrd_ring.next_to_clean)
1516                 & MB_RRD_CONS_INDX_MASK) << MB_RRD_CONS_INDX_SHIFT) |
1517                 ((atomic_read(&adapter->rfd_ring.next_to_use)
1518                 & MB_RFD_PROD_INDX_MASK) << MB_RFD_PROD_INDX_SHIFT);
1519         iowrite32(value, hw->hw_addr + REG_MAILBOX);
1520
1521         /* config IPG/IFG */
1522         value = (((u32) hw->ipgt & MAC_IPG_IFG_IPGT_MASK)
1523                  << MAC_IPG_IFG_IPGT_SHIFT) |
1524                 (((u32) hw->min_ifg & MAC_IPG_IFG_MIFG_MASK)
1525                 << MAC_IPG_IFG_MIFG_SHIFT) |
1526                 (((u32) hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK)
1527                 << MAC_IPG_IFG_IPGR1_SHIFT) |
1528                 (((u32) hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK)
1529                 << MAC_IPG_IFG_IPGR2_SHIFT);
1530         iowrite32(value, hw->hw_addr + REG_MAC_IPG_IFG);
1531
1532         /* config  Half-Duplex Control */
1533         value = ((u32) hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) |
1534                 (((u32) hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK)
1535                 << MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) |
1536                 MAC_HALF_DUPLX_CTRL_EXC_DEF_EN |
1537                 (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) |
1538                 (((u32) hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK)
1539                 << MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT);
1540         iowrite32(value, hw->hw_addr + REG_MAC_HALF_DUPLX_CTRL);
1541
1542         /* set Interrupt Moderator Timer */
1543         iowrite16(adapter->imt, hw->hw_addr + REG_IRQ_MODU_TIMER_INIT);
1544         iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL);
1545
1546         /* set Interrupt Clear Timer */
1547         iowrite16(adapter->ict, hw->hw_addr + REG_CMBDISDMA_TIMER);
1548
1549         /* set max frame size hw will accept */
1550         iowrite32(hw->max_frame_size, hw->hw_addr + REG_MTU);
1551
1552         /* jumbo size & rrd retirement timer */
1553         value = (((u32) hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK)
1554                  << RXQ_JMBOSZ_TH_SHIFT) |
1555                 (((u32) hw->rx_jumbo_lkah & RXQ_JMBO_LKAH_MASK)
1556                 << RXQ_JMBO_LKAH_SHIFT) |
1557                 (((u32) hw->rrd_ret_timer & RXQ_RRD_TIMER_MASK)
1558                 << RXQ_RRD_TIMER_SHIFT);
1559         iowrite32(value, hw->hw_addr + REG_RXQ_JMBOSZ_RRDTIM);
1560
1561         /* Flow Control */
1562         switch (hw->dev_rev) {
1563         case 0x8001:
1564         case 0x9001:
1565         case 0x9002:
1566         case 0x9003:
1567                 set_flow_ctrl_old(adapter);
1568                 break;
1569         default:
1570                 set_flow_ctrl_new(hw);
1571                 break;
1572         }
1573
1574         /* config TXQ */
1575         value = (((u32) hw->tpd_burst & TXQ_CTRL_TPD_BURST_NUM_MASK)
1576                  << TXQ_CTRL_TPD_BURST_NUM_SHIFT) |
1577                 (((u32) hw->txf_burst & TXQ_CTRL_TXF_BURST_NUM_MASK)
1578                 << TXQ_CTRL_TXF_BURST_NUM_SHIFT) |
1579                 (((u32) hw->tpd_fetch_th & TXQ_CTRL_TPD_FETCH_TH_MASK)
1580                 << TXQ_CTRL_TPD_FETCH_TH_SHIFT) | TXQ_CTRL_ENH_MODE |
1581                 TXQ_CTRL_EN;
1582         iowrite32(value, hw->hw_addr + REG_TXQ_CTRL);
1583
1584         /* min tpd fetch gap & tx jumbo packet size threshold for taskoffload */
1585         value = (((u32) hw->tx_jumbo_task_th & TX_JUMBO_TASK_TH_MASK)
1586                 << TX_JUMBO_TASK_TH_SHIFT) |
1587                 (((u32) hw->tpd_fetch_gap & TX_TPD_MIN_IPG_MASK)
1588                 << TX_TPD_MIN_IPG_SHIFT);
1589         iowrite32(value, hw->hw_addr + REG_TX_JUMBO_TASK_TH_TPD_IPG);
1590
1591         /* config RXQ */
1592         value = (((u32) hw->rfd_burst & RXQ_CTRL_RFD_BURST_NUM_MASK)
1593                 << RXQ_CTRL_RFD_BURST_NUM_SHIFT) |
1594                 (((u32) hw->rrd_burst & RXQ_CTRL_RRD_BURST_THRESH_MASK)
1595                 << RXQ_CTRL_RRD_BURST_THRESH_SHIFT) |
1596                 (((u32) hw->rfd_fetch_gap & RXQ_CTRL_RFD_PREF_MIN_IPG_MASK)
1597                 << RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT) | RXQ_CTRL_CUT_THRU_EN |
1598                 RXQ_CTRL_EN;
1599         iowrite32(value, hw->hw_addr + REG_RXQ_CTRL);
1600
1601         /* config DMA Engine */
1602         value = ((((u32) hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1603                 << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
1604                 ((((u32) hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1605                 << DMA_CTRL_DMAW_BURST_LEN_SHIFT) | DMA_CTRL_DMAR_EN |
1606                 DMA_CTRL_DMAW_EN;
1607         value |= (u32) hw->dma_ord;
1608         if (atl1_rcb_128 == hw->rcb_value)
1609                 value |= DMA_CTRL_RCB_VALUE;
1610         iowrite32(value, hw->hw_addr + REG_DMA_CTRL);
1611
1612         /* config CMB / SMB */
1613         value = (hw->cmb_tpd > adapter->tpd_ring.count) ?
1614                 hw->cmb_tpd : adapter->tpd_ring.count;
1615         value <<= 16;
1616         value |= hw->cmb_rrd;
1617         iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TH);
1618         value = hw->cmb_rx_timer | ((u32) hw->cmb_tx_timer << 16);
1619         iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TIMER);
1620         iowrite32(hw->smb_timer, hw->hw_addr + REG_SMB_TIMER);
1621
1622         /* --- enable CMB / SMB */
1623         value = CSMB_CTRL_CMB_EN | CSMB_CTRL_SMB_EN;
1624         iowrite32(value, hw->hw_addr + REG_CSMB_CTRL);
1625
1626         value = ioread32(adapter->hw.hw_addr + REG_ISR);
1627         if (unlikely((value & ISR_PHY_LINKDOWN) != 0))
1628                 value = 1;      /* config failed */
1629         else
1630                 value = 0;
1631
1632         /* clear all interrupt status */
1633         iowrite32(0x3fffffff, adapter->hw.hw_addr + REG_ISR);
1634         iowrite32(0, adapter->hw.hw_addr + REG_ISR);
1635         return value;
1636 }
1637
1638 /*
1639  * atl1_pcie_patch - Patch for PCIE module
1640  */
1641 static void atl1_pcie_patch(struct atl1_adapter *adapter)
1642 {
1643         u32 value;
1644
1645         /* much vendor magic here */
1646         value = 0x6500;
1647         iowrite32(value, adapter->hw.hw_addr + 0x12FC);
1648         /* pcie flow control mode change */
1649         value = ioread32(adapter->hw.hw_addr + 0x1008);
1650         value |= 0x8000;
1651         iowrite32(value, adapter->hw.hw_addr + 0x1008);
1652 }
1653
1654 /*
1655  * When ACPI resume on some VIA MotherBoard, the Interrupt Disable bit/0x400
1656  * on PCI Command register is disable.
1657  * The function enable this bit.
1658  * Brackett, 2006/03/15
1659  */
1660 static void atl1_via_workaround(struct atl1_adapter *adapter)
1661 {
1662         unsigned long value;
1663
1664         value = ioread16(adapter->hw.hw_addr + PCI_COMMAND);
1665         if (value & PCI_COMMAND_INTX_DISABLE)
1666                 value &= ~PCI_COMMAND_INTX_DISABLE;
1667         iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND);
1668 }
1669
1670 static void atl1_inc_smb(struct atl1_adapter *adapter)
1671 {
1672         struct stats_msg_block *smb = adapter->smb.smb;
1673
1674         /* Fill out the OS statistics structure */
1675         adapter->soft_stats.rx_packets += smb->rx_ok;
1676         adapter->soft_stats.tx_packets += smb->tx_ok;
1677         adapter->soft_stats.rx_bytes += smb->rx_byte_cnt;
1678         adapter->soft_stats.tx_bytes += smb->tx_byte_cnt;
1679         adapter->soft_stats.multicast += smb->rx_mcast;
1680         adapter->soft_stats.collisions += (smb->tx_1_col + smb->tx_2_col * 2 +
1681                 smb->tx_late_col + smb->tx_abort_col * adapter->hw.max_retry);
1682
1683         /* Rx Errors */
1684         adapter->soft_stats.rx_errors += (smb->rx_frag + smb->rx_fcs_err +
1685                 smb->rx_len_err + smb->rx_sz_ov + smb->rx_rxf_ov +
1686                 smb->rx_rrd_ov + smb->rx_align_err);
1687         adapter->soft_stats.rx_fifo_errors += smb->rx_rxf_ov;
1688         adapter->soft_stats.rx_length_errors += smb->rx_len_err;
1689         adapter->soft_stats.rx_crc_errors += smb->rx_fcs_err;
1690         adapter->soft_stats.rx_frame_errors += smb->rx_align_err;
1691         adapter->soft_stats.rx_missed_errors += (smb->rx_rrd_ov +
1692                 smb->rx_rxf_ov);
1693
1694         adapter->soft_stats.rx_pause += smb->rx_pause;
1695         adapter->soft_stats.rx_rrd_ov += smb->rx_rrd_ov;
1696         adapter->soft_stats.rx_trunc += smb->rx_sz_ov;
1697
1698         /* Tx Errors */
1699         adapter->soft_stats.tx_errors += (smb->tx_late_col +
1700                 smb->tx_abort_col + smb->tx_underrun + smb->tx_trunc);
1701         adapter->soft_stats.tx_fifo_errors += smb->tx_underrun;
1702         adapter->soft_stats.tx_aborted_errors += smb->tx_abort_col;
1703         adapter->soft_stats.tx_window_errors += smb->tx_late_col;
1704
1705         adapter->soft_stats.excecol += smb->tx_abort_col;
1706         adapter->soft_stats.deffer += smb->tx_defer;
1707         adapter->soft_stats.scc += smb->tx_1_col;
1708         adapter->soft_stats.mcc += smb->tx_2_col;
1709         adapter->soft_stats.latecol += smb->tx_late_col;
1710         adapter->soft_stats.tx_underun += smb->tx_underrun;
1711         adapter->soft_stats.tx_trunc += smb->tx_trunc;
1712         adapter->soft_stats.tx_pause += smb->tx_pause;
1713
1714         adapter->net_stats.rx_packets = adapter->soft_stats.rx_packets;
1715         adapter->net_stats.tx_packets = adapter->soft_stats.tx_packets;
1716         adapter->net_stats.rx_bytes = adapter->soft_stats.rx_bytes;
1717         adapter->net_stats.tx_bytes = adapter->soft_stats.tx_bytes;
1718         adapter->net_stats.multicast = adapter->soft_stats.multicast;
1719         adapter->net_stats.collisions = adapter->soft_stats.collisions;
1720         adapter->net_stats.rx_errors = adapter->soft_stats.rx_errors;
1721         adapter->net_stats.rx_over_errors =
1722                 adapter->soft_stats.rx_missed_errors;
1723         adapter->net_stats.rx_length_errors =
1724                 adapter->soft_stats.rx_length_errors;
1725         adapter->net_stats.rx_crc_errors = adapter->soft_stats.rx_crc_errors;
1726         adapter->net_stats.rx_frame_errors =
1727                 adapter->soft_stats.rx_frame_errors;
1728         adapter->net_stats.rx_fifo_errors = adapter->soft_stats.rx_fifo_errors;
1729         adapter->net_stats.rx_missed_errors =
1730                 adapter->soft_stats.rx_missed_errors;
1731         adapter->net_stats.tx_errors = adapter->soft_stats.tx_errors;
1732         adapter->net_stats.tx_fifo_errors = adapter->soft_stats.tx_fifo_errors;
1733         adapter->net_stats.tx_aborted_errors =
1734                 adapter->soft_stats.tx_aborted_errors;
1735         adapter->net_stats.tx_window_errors =
1736                 adapter->soft_stats.tx_window_errors;
1737         adapter->net_stats.tx_carrier_errors =
1738                 adapter->soft_stats.tx_carrier_errors;
1739 }
1740
1741 static void atl1_update_mailbox(struct atl1_adapter *adapter)
1742 {
1743         unsigned long flags;
1744         u32 tpd_next_to_use;
1745         u32 rfd_next_to_use;
1746         u32 rrd_next_to_clean;
1747         u32 value;
1748
1749         spin_lock_irqsave(&adapter->mb_lock, flags);
1750
1751         tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
1752         rfd_next_to_use = atomic_read(&adapter->rfd_ring.next_to_use);
1753         rrd_next_to_clean = atomic_read(&adapter->rrd_ring.next_to_clean);
1754
1755         value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
1756                 MB_RFD_PROD_INDX_SHIFT) |
1757                 ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
1758                 MB_RRD_CONS_INDX_SHIFT) |
1759                 ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
1760                 MB_TPD_PROD_INDX_SHIFT);
1761         iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
1762
1763         spin_unlock_irqrestore(&adapter->mb_lock, flags);
1764 }
1765
1766 static void atl1_clean_alloc_flag(struct atl1_adapter *adapter,
1767         struct rx_return_desc *rrd, u16 offset)
1768 {
1769         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1770
1771         while (rfd_ring->next_to_clean != (rrd->buf_indx + offset)) {
1772                 rfd_ring->buffer_info[rfd_ring->next_to_clean].alloced = 0;
1773                 if (++rfd_ring->next_to_clean == rfd_ring->count) {
1774                         rfd_ring->next_to_clean = 0;
1775                 }
1776         }
1777 }
1778
1779 static void atl1_update_rfd_index(struct atl1_adapter *adapter,
1780         struct rx_return_desc *rrd)
1781 {
1782         u16 num_buf;
1783
1784         num_buf = (rrd->xsz.xsum_sz.pkt_size + adapter->rx_buffer_len - 1) /
1785                 adapter->rx_buffer_len;
1786         if (rrd->num_buf == num_buf)
1787                 /* clean alloc flag for bad rrd */
1788                 atl1_clean_alloc_flag(adapter, rrd, num_buf);
1789 }
1790
1791 static void atl1_rx_checksum(struct atl1_adapter *adapter,
1792         struct rx_return_desc *rrd, struct sk_buff *skb)
1793 {
1794         struct pci_dev *pdev = adapter->pdev;
1795
1796         skb->ip_summed = CHECKSUM_NONE;
1797
1798         if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
1799                 if (rrd->err_flg & (ERR_FLAG_CRC | ERR_FLAG_TRUNC |
1800                                         ERR_FLAG_CODE | ERR_FLAG_OV)) {
1801                         adapter->hw_csum_err++;
1802                         if (netif_msg_rx_err(adapter))
1803                                 dev_printk(KERN_DEBUG, &pdev->dev,
1804                                         "rx checksum error\n");
1805                         return;
1806                 }
1807         }
1808
1809         /* not IPv4 */
1810         if (!(rrd->pkt_flg & PACKET_FLAG_IPV4))
1811                 /* checksum is invalid, but it's not an IPv4 pkt, so ok */
1812                 return;
1813
1814         /* IPv4 packet */
1815         if (likely(!(rrd->err_flg &
1816                 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM)))) {
1817                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1818                 adapter->hw_csum_good++;
1819                 return;
1820         }
1821
1822         /* IPv4, but hardware thinks its checksum is wrong */
1823         if (netif_msg_rx_err(adapter))
1824                 dev_printk(KERN_DEBUG, &pdev->dev,
1825                         "hw csum wrong, pkt_flag:%x, err_flag:%x\n",
1826                         rrd->pkt_flg, rrd->err_flg);
1827         skb->ip_summed = CHECKSUM_COMPLETE;
1828         skb->csum = htons(rrd->xsz.xsum_sz.rx_chksum);
1829         adapter->hw_csum_err++;
1830         return;
1831 }
1832
1833 /*
1834  * atl1_alloc_rx_buffers - Replace used receive buffers
1835  * @adapter: address of board private structure
1836  */
1837 static u16 atl1_alloc_rx_buffers(struct atl1_adapter *adapter)
1838 {
1839         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1840         struct pci_dev *pdev = adapter->pdev;
1841         struct page *page;
1842         unsigned long offset;
1843         struct atl1_buffer *buffer_info, *next_info;
1844         struct sk_buff *skb;
1845         u16 num_alloc = 0;
1846         u16 rfd_next_to_use, next_next;
1847         struct rx_free_desc *rfd_desc;
1848
1849         next_next = rfd_next_to_use = atomic_read(&rfd_ring->next_to_use);
1850         if (++next_next == rfd_ring->count)
1851                 next_next = 0;
1852         buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1853         next_info = &rfd_ring->buffer_info[next_next];
1854
1855         while (!buffer_info->alloced && !next_info->alloced) {
1856                 if (buffer_info->skb) {
1857                         buffer_info->alloced = 1;
1858                         goto next;
1859                 }
1860
1861                 rfd_desc = ATL1_RFD_DESC(rfd_ring, rfd_next_to_use);
1862
1863                 skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
1864                 if (unlikely(!skb)) {
1865                         /* Better luck next round */
1866                         adapter->net_stats.rx_dropped++;
1867                         break;
1868                 }
1869
1870                 /*
1871                  * Make buffer alignment 2 beyond a 16 byte boundary
1872                  * this will result in a 16 byte aligned IP header after
1873                  * the 14 byte MAC header is removed
1874                  */
1875                 skb_reserve(skb, NET_IP_ALIGN);
1876
1877                 buffer_info->alloced = 1;
1878                 buffer_info->skb = skb;
1879                 buffer_info->length = (u16) adapter->rx_buffer_len;
1880                 page = virt_to_page(skb->data);
1881                 offset = (unsigned long)skb->data & ~PAGE_MASK;
1882                 buffer_info->dma = pci_map_page(pdev, page, offset,
1883                                                 adapter->rx_buffer_len,
1884                                                 PCI_DMA_FROMDEVICE);
1885                 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1886                 rfd_desc->buf_len = cpu_to_le16(adapter->rx_buffer_len);
1887                 rfd_desc->coalese = 0;
1888
1889 next:
1890                 rfd_next_to_use = next_next;
1891                 if (unlikely(++next_next == rfd_ring->count))
1892                         next_next = 0;
1893
1894                 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1895                 next_info = &rfd_ring->buffer_info[next_next];
1896                 num_alloc++;
1897         }
1898
1899         if (num_alloc) {
1900                 /*
1901                  * Force memory writes to complete before letting h/w
1902                  * know there are new descriptors to fetch.  (Only
1903                  * applicable for weak-ordered memory model archs,
1904                  * such as IA-64).
1905                  */
1906                 wmb();
1907                 atomic_set(&rfd_ring->next_to_use, (int)rfd_next_to_use);
1908         }
1909         return num_alloc;
1910 }
1911
1912 static void atl1_intr_rx(struct atl1_adapter *adapter)
1913 {
1914         int i, count;
1915         u16 length;
1916         u16 rrd_next_to_clean;
1917         u32 value;
1918         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1919         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1920         struct atl1_buffer *buffer_info;
1921         struct rx_return_desc *rrd;
1922         struct sk_buff *skb;
1923
1924         count = 0;
1925
1926         rrd_next_to_clean = atomic_read(&rrd_ring->next_to_clean);
1927
1928         while (1) {
1929                 rrd = ATL1_RRD_DESC(rrd_ring, rrd_next_to_clean);
1930                 i = 1;
1931                 if (likely(rrd->xsz.valid)) {   /* packet valid */
1932 chk_rrd:
1933                         /* check rrd status */
1934                         if (likely(rrd->num_buf == 1))
1935                                 goto rrd_ok;
1936                         else if (netif_msg_rx_err(adapter)) {
1937                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1938                                         "unexpected RRD buffer count\n");
1939                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1940                                         "rx_buf_len = %d\n",
1941                                         adapter->rx_buffer_len);
1942                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1943                                         "RRD num_buf = %d\n",
1944                                         rrd->num_buf);
1945                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1946                                         "RRD pkt_len = %d\n",
1947                                         rrd->xsz.xsum_sz.pkt_size);
1948                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1949                                         "RRD pkt_flg = 0x%08X\n",
1950                                         rrd->pkt_flg);
1951                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1952                                         "RRD err_flg = 0x%08X\n",
1953                                         rrd->err_flg);
1954                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1955                                         "RRD vlan_tag = 0x%08X\n",
1956                                         rrd->vlan_tag);
1957                         }
1958
1959                         /* rrd seems to be bad */
1960                         if (unlikely(i-- > 0)) {
1961                                 /* rrd may not be DMAed completely */
1962                                 udelay(1);
1963                                 goto chk_rrd;
1964                         }
1965                         /* bad rrd */
1966                         if (netif_msg_rx_err(adapter))
1967                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1968                                         "bad RRD\n");
1969                         /* see if update RFD index */
1970                         if (rrd->num_buf > 1)
1971                                 atl1_update_rfd_index(adapter, rrd);
1972
1973                         /* update rrd */
1974                         rrd->xsz.valid = 0;
1975                         if (++rrd_next_to_clean == rrd_ring->count)
1976                                 rrd_next_to_clean = 0;
1977                         count++;
1978                         continue;
1979                 } else {        /* current rrd still not be updated */
1980
1981                         break;
1982                 }
1983 rrd_ok:
1984                 /* clean alloc flag for bad rrd */
1985                 atl1_clean_alloc_flag(adapter, rrd, 0);
1986
1987                 buffer_info = &rfd_ring->buffer_info[rrd->buf_indx];
1988                 if (++rfd_ring->next_to_clean == rfd_ring->count)
1989                         rfd_ring->next_to_clean = 0;
1990
1991                 /* update rrd next to clean */
1992                 if (++rrd_next_to_clean == rrd_ring->count)
1993                         rrd_next_to_clean = 0;
1994                 count++;
1995
1996                 if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
1997                         if (!(rrd->err_flg &
1998                                 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM
1999                                 | ERR_FLAG_LEN))) {
2000                                 /* packet error, don't need upstream */
2001                                 buffer_info->alloced = 0;
2002                                 rrd->xsz.valid = 0;
2003                                 continue;
2004                         }
2005                 }
2006
2007                 /* Good Receive */
2008                 pci_unmap_page(adapter->pdev, buffer_info->dma,
2009                                buffer_info->length, PCI_DMA_FROMDEVICE);
2010                 buffer_info->dma = 0;
2011                 skb = buffer_info->skb;
2012                 length = le16_to_cpu(rrd->xsz.xsum_sz.pkt_size);
2013
2014                 skb_put(skb, length - ETH_FCS_LEN);
2015
2016                 /* Receive Checksum Offload */
2017                 atl1_rx_checksum(adapter, rrd, skb);
2018                 skb->protocol = eth_type_trans(skb, adapter->netdev);
2019
2020                 if (adapter->vlgrp && (rrd->pkt_flg & PACKET_FLAG_VLAN_INS)) {
2021                         u16 vlan_tag = (rrd->vlan_tag >> 4) |
2022                                         ((rrd->vlan_tag & 7) << 13) |
2023                                         ((rrd->vlan_tag & 8) << 9);
2024                         vlan_hwaccel_rx(skb, adapter->vlgrp, vlan_tag);
2025                 } else
2026                         netif_rx(skb);
2027
2028                 /* let protocol layer free skb */
2029                 buffer_info->skb = NULL;
2030                 buffer_info->alloced = 0;
2031                 rrd->xsz.valid = 0;
2032
2033                 adapter->netdev->last_rx = jiffies;
2034         }
2035
2036         atomic_set(&rrd_ring->next_to_clean, rrd_next_to_clean);
2037
2038         atl1_alloc_rx_buffers(adapter);
2039
2040         /* update mailbox ? */
2041         if (count) {
2042                 u32 tpd_next_to_use;
2043                 u32 rfd_next_to_use;
2044
2045                 spin_lock(&adapter->mb_lock);
2046
2047                 tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
2048                 rfd_next_to_use =
2049                     atomic_read(&adapter->rfd_ring.next_to_use);
2050                 rrd_next_to_clean =
2051                     atomic_read(&adapter->rrd_ring.next_to_clean);
2052                 value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
2053                         MB_RFD_PROD_INDX_SHIFT) |
2054                         ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
2055                         MB_RRD_CONS_INDX_SHIFT) |
2056                         ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
2057                         MB_TPD_PROD_INDX_SHIFT);
2058                 iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
2059                 spin_unlock(&adapter->mb_lock);
2060         }
2061 }
2062
2063 static void atl1_intr_tx(struct atl1_adapter *adapter)
2064 {
2065         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2066         struct atl1_buffer *buffer_info;
2067         u16 sw_tpd_next_to_clean;
2068         u16 cmb_tpd_next_to_clean;
2069
2070         sw_tpd_next_to_clean = atomic_read(&tpd_ring->next_to_clean);
2071         cmb_tpd_next_to_clean = le16_to_cpu(adapter->cmb.cmb->tpd_cons_idx);
2072
2073         while (cmb_tpd_next_to_clean != sw_tpd_next_to_clean) {
2074                 struct tx_packet_desc *tpd;
2075
2076                 tpd = ATL1_TPD_DESC(tpd_ring, sw_tpd_next_to_clean);
2077                 buffer_info = &tpd_ring->buffer_info[sw_tpd_next_to_clean];
2078                 if (buffer_info->dma) {
2079                         pci_unmap_page(adapter->pdev, buffer_info->dma,
2080                                        buffer_info->length, PCI_DMA_TODEVICE);
2081                         buffer_info->dma = 0;
2082                 }
2083
2084                 if (buffer_info->skb) {
2085                         dev_kfree_skb_irq(buffer_info->skb);
2086                         buffer_info->skb = NULL;
2087                 }
2088
2089                 if (++sw_tpd_next_to_clean == tpd_ring->count)
2090                         sw_tpd_next_to_clean = 0;
2091         }
2092         atomic_set(&tpd_ring->next_to_clean, sw_tpd_next_to_clean);
2093
2094         if (netif_queue_stopped(adapter->netdev)
2095             && netif_carrier_ok(adapter->netdev))
2096                 netif_wake_queue(adapter->netdev);
2097 }
2098
2099 static u16 atl1_tpd_avail(struct atl1_tpd_ring *tpd_ring)
2100 {
2101         u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
2102         u16 next_to_use = atomic_read(&tpd_ring->next_to_use);
2103         return ((next_to_clean > next_to_use) ?
2104                 next_to_clean - next_to_use - 1 :
2105                 tpd_ring->count + next_to_clean - next_to_use - 1);
2106 }
2107
2108 static int atl1_tso(struct atl1_adapter *adapter, struct sk_buff *skb,
2109         struct tx_packet_desc *ptpd)
2110 {
2111         /* spinlock held */
2112         u8 hdr_len, ip_off;
2113         u32 real_len;
2114         int err;
2115
2116         if (skb_shinfo(skb)->gso_size) {
2117                 if (skb_header_cloned(skb)) {
2118                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2119                         if (unlikely(err))
2120                                 return -1;
2121                 }
2122
2123                 if (skb->protocol == htons(ETH_P_IP)) {
2124                         struct iphdr *iph = ip_hdr(skb);
2125
2126                         real_len = (((unsigned char *)iph - skb->data) +
2127                                 ntohs(iph->tot_len));
2128                         if (real_len < skb->len)
2129                                 pskb_trim(skb, real_len);
2130                         hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2131                         if (skb->len == hdr_len) {
2132                                 iph->check = 0;
2133                                 tcp_hdr(skb)->check =
2134                                         ~csum_tcpudp_magic(iph->saddr,
2135                                         iph->daddr, tcp_hdrlen(skb),
2136                                         IPPROTO_TCP, 0);
2137                                 ptpd->word3 |= (iph->ihl & TPD_IPHL_MASK) <<
2138                                         TPD_IPHL_SHIFT;
2139                                 ptpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
2140                                         TPD_TCPHDRLEN_MASK) <<
2141                                         TPD_TCPHDRLEN_SHIFT;
2142                                 ptpd->word3 |= 1 << TPD_IP_CSUM_SHIFT;
2143                                 ptpd->word3 |= 1 << TPD_TCP_CSUM_SHIFT;
2144                                 return 1;
2145                         }
2146
2147                         iph->check = 0;
2148                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2149                                         iph->daddr, 0, IPPROTO_TCP, 0);
2150                         ip_off = (unsigned char *)iph -
2151                                 (unsigned char *) skb_network_header(skb);
2152                         if (ip_off == 8) /* 802.3-SNAP frame */
2153                                 ptpd->word3 |= 1 << TPD_ETHTYPE_SHIFT;
2154                         else if (ip_off != 0)
2155                                 return -2;
2156
2157                         ptpd->word3 |= (iph->ihl & TPD_IPHL_MASK) <<
2158                                 TPD_IPHL_SHIFT;
2159                         ptpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
2160                                 TPD_TCPHDRLEN_MASK) << TPD_TCPHDRLEN_SHIFT;
2161                         ptpd->word3 |= (skb_shinfo(skb)->gso_size &
2162                                 TPD_MSS_MASK) << TPD_MSS_SHIFT;
2163                         ptpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
2164                         return 3;
2165                 }
2166         }
2167         return false;
2168 }
2169
2170 static int atl1_tx_csum(struct atl1_adapter *adapter, struct sk_buff *skb,
2171         struct tx_packet_desc *ptpd)
2172 {
2173         u8 css, cso;
2174
2175         if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2176                 css = (u8) (skb->csum_start - skb_headroom(skb));
2177                 cso = css + (u8) skb->csum_offset;
2178                 if (unlikely(css & 0x1)) {
2179                         /* L1 hardware requires an even number here */
2180                         if (netif_msg_tx_err(adapter))
2181                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2182                                         "payload offset not an even number\n");
2183                         return -1;
2184                 }
2185                 ptpd->word3 |= (css & TPD_PLOADOFFSET_MASK) <<
2186                         TPD_PLOADOFFSET_SHIFT;
2187                 ptpd->word3 |= (cso & TPD_CCSUMOFFSET_MASK) <<
2188                         TPD_CCSUMOFFSET_SHIFT;
2189                 ptpd->word3 |= 1 << TPD_CUST_CSUM_EN_SHIFT;
2190                 return true;
2191         }
2192         return 0;
2193 }
2194
2195 static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,
2196         struct tx_packet_desc *ptpd)
2197 {
2198         /* spinlock held */
2199         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2200         struct atl1_buffer *buffer_info;
2201         u16 buf_len = skb->len;
2202         struct page *page;
2203         unsigned long offset;
2204         unsigned int nr_frags;
2205         unsigned int f;
2206         int retval;
2207         u16 next_to_use;
2208         u16 data_len;
2209         u8 hdr_len;
2210
2211         buf_len -= skb->data_len;
2212         nr_frags = skb_shinfo(skb)->nr_frags;
2213         next_to_use = atomic_read(&tpd_ring->next_to_use);
2214         buffer_info = &tpd_ring->buffer_info[next_to_use];
2215         if (unlikely(buffer_info->skb))
2216                 BUG();
2217         /* put skb in last TPD */
2218         buffer_info->skb = NULL;
2219
2220         retval = (ptpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK;
2221         if (retval) {
2222                 /* TSO */
2223                 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2224                 buffer_info->length = hdr_len;
2225                 page = virt_to_page(skb->data);
2226                 offset = (unsigned long)skb->data & ~PAGE_MASK;
2227                 buffer_info->dma = pci_map_page(adapter->pdev, page,
2228                                                 offset, hdr_len,
2229                                                 PCI_DMA_TODEVICE);
2230
2231                 if (++next_to_use == tpd_ring->count)
2232                         next_to_use = 0;
2233
2234                 if (buf_len > hdr_len) {
2235                         int i, nseg;
2236
2237                         data_len = buf_len - hdr_len;
2238                         nseg = (data_len + ATL1_MAX_TX_BUF_LEN - 1) /
2239                                 ATL1_MAX_TX_BUF_LEN;
2240                         for (i = 0; i < nseg; i++) {
2241                                 buffer_info =
2242                                     &tpd_ring->buffer_info[next_to_use];
2243                                 buffer_info->skb = NULL;
2244                                 buffer_info->length =
2245                                     (ATL1_MAX_TX_BUF_LEN >=
2246                                      data_len) ? ATL1_MAX_TX_BUF_LEN : data_len;
2247                                 data_len -= buffer_info->length;
2248                                 page = virt_to_page(skb->data +
2249                                         (hdr_len + i * ATL1_MAX_TX_BUF_LEN));
2250                                 offset = (unsigned long)(skb->data +
2251                                         (hdr_len + i * ATL1_MAX_TX_BUF_LEN)) &
2252                                         ~PAGE_MASK;
2253                                 buffer_info->dma = pci_map_page(adapter->pdev,
2254                                         page, offset, buffer_info->length,
2255                                         PCI_DMA_TODEVICE);
2256                                 if (++next_to_use == tpd_ring->count)
2257                                         next_to_use = 0;
2258                         }
2259                 }
2260         } else {
2261                 /* not TSO */
2262                 buffer_info->length = buf_len;
2263                 page = virt_to_page(skb->data);
2264                 offset = (unsigned long)skb->data & ~PAGE_MASK;
2265                 buffer_info->dma = pci_map_page(adapter->pdev, page,
2266                         offset, buf_len, PCI_DMA_TODEVICE);
2267                 if (++next_to_use == tpd_ring->count)
2268                         next_to_use = 0;
2269         }
2270
2271         for (f = 0; f < nr_frags; f++) {
2272                 struct skb_frag_struct *frag;
2273                 u16 i, nseg;
2274
2275                 frag = &skb_shinfo(skb)->frags[f];
2276                 buf_len = frag->size;
2277
2278                 nseg = (buf_len + ATL1_MAX_TX_BUF_LEN - 1) /
2279                         ATL1_MAX_TX_BUF_LEN;
2280                 for (i = 0; i < nseg; i++) {
2281                         buffer_info = &tpd_ring->buffer_info[next_to_use];
2282                         if (unlikely(buffer_info->skb))
2283                                 BUG();
2284                         buffer_info->skb = NULL;
2285                         buffer_info->length = (buf_len > ATL1_MAX_TX_BUF_LEN) ?
2286                                 ATL1_MAX_TX_BUF_LEN : buf_len;
2287                         buf_len -= buffer_info->length;
2288                         buffer_info->dma = pci_map_page(adapter->pdev,
2289                                 frag->page,
2290                                 frag->page_offset + (i * ATL1_MAX_TX_BUF_LEN),
2291                                 buffer_info->length, PCI_DMA_TODEVICE);
2292
2293                         if (++next_to_use == tpd_ring->count)
2294                                 next_to_use = 0;
2295                 }
2296         }
2297
2298         /* last tpd's buffer-info */
2299         buffer_info->skb = skb;
2300 }
2301
2302 static void atl1_tx_queue(struct atl1_adapter *adapter, u16 count,
2303        struct tx_packet_desc *ptpd)
2304 {
2305         /* spinlock held */
2306         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2307         struct atl1_buffer *buffer_info;
2308         struct tx_packet_desc *tpd;
2309         u16 j;
2310         u32 val;
2311         u16 next_to_use = (u16) atomic_read(&tpd_ring->next_to_use);
2312
2313         for (j = 0; j < count; j++) {
2314                 buffer_info = &tpd_ring->buffer_info[next_to_use];
2315                 tpd = ATL1_TPD_DESC(&adapter->tpd_ring, next_to_use);
2316                 if (tpd != ptpd)
2317                         memcpy(tpd, ptpd, sizeof(struct tx_packet_desc));
2318                 tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2319                 tpd->word2 = (cpu_to_le16(buffer_info->length) &
2320                         TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT;
2321
2322                 /*
2323                  * if this is the first packet in a TSO chain, set
2324                  * TPD_HDRFLAG, otherwise, clear it.
2325                  */
2326                 val = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) &
2327                         TPD_SEGMENT_EN_MASK;
2328                 if (val) {
2329                         if (!j)
2330                                 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT;
2331                         else
2332                                 tpd->word3 &= ~(1 << TPD_HDRFLAG_SHIFT);
2333                 }
2334
2335                 if (j == (count - 1))
2336                         tpd->word3 |= 1 << TPD_EOP_SHIFT;
2337
2338                 if (++next_to_use == tpd_ring->count)
2339                         next_to_use = 0;
2340         }
2341         /*
2342          * Force memory writes to complete before letting h/w
2343          * know there are new descriptors to fetch.  (Only
2344          * applicable for weak-ordered memory model archs,
2345          * such as IA-64).
2346          */
2347         wmb();
2348
2349         atomic_set(&tpd_ring->next_to_use, next_to_use);
2350 }
2351
2352 static int atl1_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2353 {
2354         struct atl1_adapter *adapter = netdev_priv(netdev);
2355         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2356         int len = skb->len;
2357         int tso;
2358         int count = 1;
2359         int ret_val;
2360         struct tx_packet_desc *ptpd;
2361         u16 frag_size;
2362         u16 vlan_tag;
2363         unsigned long flags;
2364         unsigned int nr_frags = 0;
2365         unsigned int mss = 0;
2366         unsigned int f;
2367         unsigned int proto_hdr_len;
2368
2369         len -= skb->data_len;
2370
2371         if (unlikely(skb->len <= 0)) {
2372                 dev_kfree_skb_any(skb);
2373                 return NETDEV_TX_OK;
2374         }
2375
2376         nr_frags = skb_shinfo(skb)->nr_frags;
2377         for (f = 0; f < nr_frags; f++) {
2378                 frag_size = skb_shinfo(skb)->frags[f].size;
2379                 if (frag_size)
2380                         count += (frag_size + ATL1_MAX_TX_BUF_LEN - 1) /
2381                                 ATL1_MAX_TX_BUF_LEN;
2382         }
2383
2384         mss = skb_shinfo(skb)->gso_size;
2385         if (mss) {
2386                 if (skb->protocol == ntohs(ETH_P_IP)) {
2387                         proto_hdr_len = (skb_transport_offset(skb) +
2388                                          tcp_hdrlen(skb));
2389                         if (unlikely(proto_hdr_len > len)) {
2390                                 dev_kfree_skb_any(skb);
2391                                 return NETDEV_TX_OK;
2392                         }
2393                         /* need additional TPD ? */
2394                         if (proto_hdr_len != len)
2395                                 count += (len - proto_hdr_len +
2396                                         ATL1_MAX_TX_BUF_LEN - 1) /
2397                                         ATL1_MAX_TX_BUF_LEN;
2398                 }
2399         }
2400
2401         if (!spin_trylock_irqsave(&adapter->lock, flags)) {
2402                 /* Can't get lock - tell upper layer to requeue */
2403                 if (netif_msg_tx_queued(adapter))
2404                         dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2405                                 "tx locked\n");
2406                 return NETDEV_TX_LOCKED;
2407         }
2408
2409         if (atl1_tpd_avail(&adapter->tpd_ring) < count) {
2410                 /* not enough descriptors */
2411                 netif_stop_queue(netdev);
2412                 spin_unlock_irqrestore(&adapter->lock, flags);
2413                 if (netif_msg_tx_queued(adapter))
2414                         dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2415                                 "tx busy\n");
2416                 return NETDEV_TX_BUSY;
2417         }
2418
2419         ptpd = ATL1_TPD_DESC(tpd_ring,
2420                 (u16) atomic_read(&tpd_ring->next_to_use));
2421         memset(ptpd, 0, sizeof(struct tx_packet_desc));
2422
2423         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2424                 vlan_tag = vlan_tx_tag_get(skb);
2425                 vlan_tag = (vlan_tag << 4) | (vlan_tag >> 13) |
2426                         ((vlan_tag >> 9) & 0x8);
2427                 ptpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT;
2428                 ptpd->word3 |= (vlan_tag & TPD_VL_TAGGED_MASK) <<
2429                         TPD_VL_TAGGED_SHIFT;
2430         }
2431
2432         tso = atl1_tso(adapter, skb, ptpd);
2433         if (tso < 0) {
2434                 spin_unlock_irqrestore(&adapter->lock, flags);
2435                 dev_kfree_skb_any(skb);
2436                 return NETDEV_TX_OK;
2437         }
2438
2439         if (!tso) {
2440                 ret_val = atl1_tx_csum(adapter, skb, ptpd);
2441                 if (ret_val < 0) {
2442                         spin_unlock_irqrestore(&adapter->lock, flags);
2443                         dev_kfree_skb_any(skb);
2444                         return NETDEV_TX_OK;
2445                 }
2446         }
2447
2448         atl1_tx_map(adapter, skb, ptpd);
2449         atl1_tx_queue(adapter, count, ptpd);
2450         atl1_update_mailbox(adapter);
2451         spin_unlock_irqrestore(&adapter->lock, flags);
2452         netdev->trans_start = jiffies;
2453         return NETDEV_TX_OK;
2454 }
2455
2456 /*
2457  * atl1_intr - Interrupt Handler
2458  * @irq: interrupt number
2459  * @data: pointer to a network interface device structure
2460  * @pt_regs: CPU registers structure
2461  */
2462 static irqreturn_t atl1_intr(int irq, void *data)
2463 {
2464         struct atl1_adapter *adapter = netdev_priv(data);
2465         u32 status;
2466         int max_ints = 10;
2467
2468         status = adapter->cmb.cmb->int_stats;
2469         if (!status)
2470                 return IRQ_NONE;
2471
2472         do {
2473                 /* clear CMB interrupt status at once */
2474                 adapter->cmb.cmb->int_stats = 0;
2475
2476                 if (status & ISR_GPHY)  /* clear phy status */
2477                         atlx_clear_phy_int(adapter);
2478
2479                 /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
2480                 iowrite32(status | ISR_DIS_INT, adapter->hw.hw_addr + REG_ISR);
2481
2482                 /* check if SMB intr */
2483                 if (status & ISR_SMB)
2484                         atl1_inc_smb(adapter);
2485
2486                 /* check if PCIE PHY Link down */
2487                 if (status & ISR_PHY_LINKDOWN) {
2488                         if (netif_msg_intr(adapter))
2489                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2490                                         "pcie phy link down %x\n", status);
2491                         if (netif_running(adapter->netdev)) {   /* reset MAC */
2492                                 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
2493                                 schedule_work(&adapter->pcie_dma_to_rst_task);
2494                                 return IRQ_HANDLED;
2495                         }
2496                 }
2497
2498                 /* check if DMA read/write error ? */
2499                 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
2500                         if (netif_msg_intr(adapter))
2501                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2502                                         "pcie DMA r/w error (status = 0x%x)\n",
2503                                         status);
2504                         iowrite32(0, adapter->hw.hw_addr + REG_IMR);
2505                         schedule_work(&adapter->pcie_dma_to_rst_task);
2506                         return IRQ_HANDLED;
2507                 }
2508
2509                 /* link event */
2510                 if (status & ISR_GPHY) {
2511                         adapter->soft_stats.tx_carrier_errors++;
2512                         atl1_check_for_link(adapter);
2513                 }
2514
2515                 /* transmit event */
2516                 if (status & ISR_CMB_TX)
2517                         atl1_intr_tx(adapter);
2518
2519                 /* rx exception */
2520                 if (unlikely(status & (ISR_RXF_OV | ISR_RFD_UNRUN |
2521                         ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
2522                         ISR_HOST_RRD_OV | ISR_CMB_RX))) {
2523                         if (status & (ISR_RXF_OV | ISR_RFD_UNRUN |
2524                                 ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
2525                                 ISR_HOST_RRD_OV))
2526                                 if (netif_msg_intr(adapter))
2527                                         dev_printk(KERN_DEBUG,
2528                                                 &adapter->pdev->dev,
2529                                                 "rx exception, ISR = 0x%x\n",
2530                                                 status);
2531                         atl1_intr_rx(adapter);
2532                 }
2533
2534                 if (--max_ints < 0)
2535                         break;
2536
2537         } while ((status = adapter->cmb.cmb->int_stats));
2538
2539         /* re-enable Interrupt */
2540         iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter->hw.hw_addr + REG_ISR);
2541         return IRQ_HANDLED;
2542 }
2543
2544 /*
2545  * atl1_watchdog - Timer Call-back
2546  * @data: pointer to netdev cast into an unsigned long
2547  */
2548 static void atl1_watchdog(unsigned long data)
2549 {
2550         struct atl1_adapter *adapter = (struct atl1_adapter *)data;
2551
2552         /* Reset the timer */
2553         mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2554 }
2555
2556 /*
2557  * atl1_phy_config - Timer Call-back
2558  * @data: pointer to netdev cast into an unsigned long
2559  */
2560 static void atl1_phy_config(unsigned long data)
2561 {
2562         struct atl1_adapter *adapter = (struct atl1_adapter *)data;
2563         struct atl1_hw *hw = &adapter->hw;
2564         unsigned long flags;
2565
2566         spin_lock_irqsave(&adapter->lock, flags);
2567         adapter->phy_timer_pending = false;
2568         atl1_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
2569         atl1_write_phy_reg(hw, MII_ATLX_CR, hw->mii_1000t_ctrl_reg);
2570         atl1_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN);
2571         spin_unlock_irqrestore(&adapter->lock, flags);
2572 }
2573
2574 /*
2575  * Orphaned vendor comment left intact here:
2576  * <vendor comment>
2577  * If TPD Buffer size equal to 0, PCIE DMAR_TO_INT
2578  * will assert. We do soft reset <0x1400=1> according
2579  * with the SPEC. BUT, it seemes that PCIE or DMA
2580  * state-machine will not be reset. DMAR_TO_INT will
2581  * assert again and again.
2582  * </vendor comment>
2583  */
2584
2585 static int atl1_reset(struct atl1_adapter *adapter)
2586 {
2587         int ret;
2588         ret = atl1_reset_hw(&adapter->hw);
2589         if (ret)
2590                 return ret;
2591         return atl1_init_hw(&adapter->hw);
2592 }
2593
2594 static s32 atl1_up(struct atl1_adapter *adapter)
2595 {
2596         struct net_device *netdev = adapter->netdev;
2597         int err;
2598         int irq_flags = IRQF_SAMPLE_RANDOM;
2599
2600         /* hardware has been reset, we need to reload some things */
2601         atlx_set_multi(netdev);
2602         atl1_init_ring_ptrs(adapter);
2603         atlx_restore_vlan(adapter);
2604         err = atl1_alloc_rx_buffers(adapter);
2605         if (unlikely(!err))
2606                 /* no RX BUFFER allocated */
2607                 return -ENOMEM;
2608
2609         if (unlikely(atl1_configure(adapter))) {
2610                 err = -EIO;
2611                 goto err_up;
2612         }
2613
2614         err = pci_enable_msi(adapter->pdev);
2615         if (err) {
2616                 if (netif_msg_ifup(adapter))
2617                         dev_info(&adapter->pdev->dev,
2618                                 "Unable to enable MSI: %d\n", err);
2619                 irq_flags |= IRQF_SHARED;
2620         }
2621
2622         err = request_irq(adapter->pdev->irq, &atl1_intr, irq_flags,
2623                         netdev->name, netdev);
2624         if (unlikely(err))
2625                 goto err_up;
2626
2627         mod_timer(&adapter->watchdog_timer, jiffies);
2628         atlx_irq_enable(adapter);
2629         atl1_check_link(adapter);
2630         return 0;
2631
2632 err_up:
2633         pci_disable_msi(adapter->pdev);
2634         /* free rx_buffers */
2635         atl1_clean_rx_ring(adapter);
2636         return err;
2637 }
2638
2639 static void atl1_down(struct atl1_adapter *adapter)
2640 {
2641         struct net_device *netdev = adapter->netdev;
2642
2643         del_timer_sync(&adapter->watchdog_timer);
2644         del_timer_sync(&adapter->phy_config_timer);
2645         adapter->phy_timer_pending = false;
2646
2647         atlx_irq_disable(adapter);
2648         free_irq(adapter->pdev->irq, netdev);
2649         pci_disable_msi(adapter->pdev);
2650         atl1_reset_hw(&adapter->hw);
2651         adapter->cmb.cmb->int_stats = 0;
2652
2653         adapter->link_speed = SPEED_0;
2654         adapter->link_duplex = -1;
2655         netif_carrier_off(netdev);
2656         netif_stop_queue(netdev);
2657
2658         atl1_clean_tx_ring(adapter);
2659         atl1_clean_rx_ring(adapter);
2660 }
2661
2662 static void atl1_tx_timeout_task(struct work_struct *work)
2663 {
2664         struct atl1_adapter *adapter =
2665                 container_of(work, struct atl1_adapter, tx_timeout_task);
2666         struct net_device *netdev = adapter->netdev;
2667
2668         netif_device_detach(netdev);
2669         atl1_down(adapter);
2670         atl1_up(adapter);
2671         netif_device_attach(netdev);
2672 }
2673
2674 /*
2675  * atl1_change_mtu - Change the Maximum Transfer Unit
2676  * @netdev: network interface device structure
2677  * @new_mtu: new value for maximum frame size
2678  *
2679  * Returns 0 on success, negative on failure
2680  */
2681 static int atl1_change_mtu(struct net_device *netdev, int new_mtu)
2682 {
2683         struct atl1_adapter *adapter = netdev_priv(netdev);
2684         int old_mtu = netdev->mtu;
2685         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2686
2687         if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
2688             (max_frame > MAX_JUMBO_FRAME_SIZE)) {
2689                 if (netif_msg_link(adapter))
2690                         dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
2691                 return -EINVAL;
2692         }
2693
2694         adapter->hw.max_frame_size = max_frame;
2695         adapter->hw.tx_jumbo_task_th = (max_frame + 7) >> 3;
2696         adapter->rx_buffer_len = (max_frame + 7) & ~7;
2697         adapter->hw.rx_jumbo_th = adapter->rx_buffer_len / 8;
2698
2699         netdev->mtu = new_mtu;
2700         if ((old_mtu != new_mtu) && netif_running(netdev)) {
2701                 atl1_down(adapter);
2702                 atl1_up(adapter);
2703         }
2704
2705         return 0;
2706 }
2707
2708 /*
2709  * atl1_open - Called when a network interface is made active
2710  * @netdev: network interface device structure
2711  *
2712  * Returns 0 on success, negative value on failure
2713  *
2714  * The open entry point is called when a network interface is made
2715  * active by the system (IFF_UP).  At this point all resources needed
2716  * for transmit and receive operations are allocated, the interrupt
2717  * handler is registered with the OS, the watchdog timer is started,
2718  * and the stack is notified that the interface is ready.
2719  */
2720 static int atl1_open(struct net_device *netdev)
2721 {
2722         struct atl1_adapter *adapter = netdev_priv(netdev);
2723         int err;
2724
2725         /* allocate transmit descriptors */
2726         err = atl1_setup_ring_resources(adapter);
2727         if (err)
2728                 return err;
2729
2730         err = atl1_up(adapter);
2731         if (err)
2732                 goto err_up;
2733
2734         return 0;
2735
2736 err_up:
2737         atl1_reset(adapter);
2738         return err;
2739 }
2740
2741 /*
2742  * atl1_close - Disables a network interface
2743  * @netdev: network interface device structure
2744  *
2745  * Returns 0, this is not allowed to fail
2746  *
2747  * The close entry point is called when an interface is de-activated
2748  * by the OS.  The hardware is still under the drivers control, but
2749  * needs to be disabled.  A global MAC reset is issued to stop the
2750  * hardware, and all transmit and receive resources are freed.
2751  */
2752 static int atl1_close(struct net_device *netdev)
2753 {
2754         struct atl1_adapter *adapter = netdev_priv(netdev);
2755         atl1_down(adapter);
2756         atl1_free_ring_resources(adapter);
2757         return 0;
2758 }
2759
2760 #ifdef CONFIG_PM
2761 static int atl1_suspend(struct pci_dev *pdev, pm_message_t state)
2762 {
2763         struct net_device *netdev = pci_get_drvdata(pdev);
2764         struct atl1_adapter *adapter = netdev_priv(netdev);
2765         struct atl1_hw *hw = &adapter->hw;
2766         u32 ctrl = 0;
2767         u32 wufc = adapter->wol;
2768         u32 val;
2769         int retval;
2770         u16 speed;
2771         u16 duplex;
2772
2773         netif_device_detach(netdev);
2774         if (netif_running(netdev))
2775                 atl1_down(adapter);
2776
2777         retval = pci_save_state(pdev);
2778         if (retval)
2779                 return retval;
2780
2781         atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2782         atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2783         val = ctrl & BMSR_LSTATUS;
2784         if (val)
2785                 wufc &= ~ATLX_WUFC_LNKC;
2786
2787         if (val && wufc) {
2788                 val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
2789                 if (val) {
2790                         if (netif_msg_ifdown(adapter))
2791                                 dev_printk(KERN_DEBUG, &pdev->dev,
2792                                         "error getting speed/duplex\n");
2793                         goto disable_wol;
2794                 }
2795
2796                 ctrl = 0;
2797
2798                 /* enable magic packet WOL */
2799                 if (wufc & ATLX_WUFC_MAG)
2800                         ctrl |= (WOL_MAGIC_EN | WOL_MAGIC_PME_EN);
2801                 iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
2802                 ioread32(hw->hw_addr + REG_WOL_CTRL);
2803
2804                 /* configure the mac */
2805                 ctrl = MAC_CTRL_RX_EN;
2806                 ctrl |= ((u32)((speed == SPEED_1000) ? MAC_CTRL_SPEED_1000 :
2807                         MAC_CTRL_SPEED_10_100) << MAC_CTRL_SPEED_SHIFT);
2808                 if (duplex == FULL_DUPLEX)
2809                         ctrl |= MAC_CTRL_DUPLX;
2810                 ctrl |= (((u32)adapter->hw.preamble_len &
2811                         MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
2812                 if (adapter->vlgrp)
2813                         ctrl |= MAC_CTRL_RMV_VLAN;
2814                 if (wufc & ATLX_WUFC_MAG)
2815                         ctrl |= MAC_CTRL_BC_EN;
2816                 iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);
2817                 ioread32(hw->hw_addr + REG_MAC_CTRL);
2818
2819                 /* poke the PHY */
2820                 ctrl = ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2821                 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2822                 iowrite32(ctrl, hw->hw_addr + REG_PCIE_PHYMISC);
2823                 ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2824
2825                 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2826                 goto exit;
2827         }
2828
2829         if (!val && wufc) {
2830                 ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
2831                 iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
2832                 ioread32(hw->hw_addr + REG_WOL_CTRL);
2833                 iowrite32(0, hw->hw_addr + REG_MAC_CTRL);
2834                 ioread32(hw->hw_addr + REG_MAC_CTRL);
2835                 hw->phy_configured = false;
2836                 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2837                 goto exit;
2838         }
2839
2840 disable_wol:
2841         iowrite32(0, hw->hw_addr + REG_WOL_CTRL);
2842         ioread32(hw->hw_addr + REG_WOL_CTRL);
2843         ctrl = ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2844         ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2845         iowrite32(ctrl, hw->hw_addr + REG_PCIE_PHYMISC);
2846         ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2847         hw->phy_configured = false;
2848         pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
2849 exit:
2850         if (netif_running(netdev))
2851                 pci_disable_msi(adapter->pdev);
2852         pci_disable_device(pdev);
2853         pci_set_power_state(pdev, pci_choose_state(pdev, state));
2854
2855         return 0;
2856 }
2857
2858 static int atl1_resume(struct pci_dev *pdev)
2859 {
2860         struct net_device *netdev = pci_get_drvdata(pdev);
2861         struct atl1_adapter *adapter = netdev_priv(netdev);
2862         u32 err;
2863
2864         pci_set_power_state(pdev, PCI_D0);
2865         pci_restore_state(pdev);
2866
2867         err = pci_enable_device(pdev);
2868         if (err) {
2869                 if (netif_msg_ifup(adapter))
2870                         dev_printk(KERN_DEBUG, &pdev->dev,
2871                                 "error enabling pci device\n");
2872                 return err;
2873         }
2874
2875         pci_set_master(pdev);
2876         iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL);
2877         pci_enable_wake(pdev, PCI_D3hot, 0);
2878         pci_enable_wake(pdev, PCI_D3cold, 0);
2879
2880         atl1_reset_hw(&adapter->hw);
2881         adapter->cmb.cmb->int_stats = 0;
2882
2883         if (netif_running(netdev))
2884                 atl1_up(adapter);
2885         netif_device_attach(netdev);
2886
2887         return 0;
2888 }
2889 #else
2890 #define atl1_suspend NULL
2891 #define atl1_resume NULL
2892 #endif
2893
2894 static void atl1_shutdown(struct pci_dev *pdev)
2895 {
2896 #ifdef CONFIG_PM
2897         atl1_suspend(pdev, PMSG_SUSPEND);
2898 #endif
2899 }
2900
2901 #ifdef CONFIG_NET_POLL_CONTROLLER
2902 static void atl1_poll_controller(struct net_device *netdev)
2903 {
2904         disable_irq(netdev->irq);
2905         atl1_intr(netdev->irq, netdev);
2906         enable_irq(netdev->irq);
2907 }
2908 #endif
2909
2910 /*
2911  * atl1_probe - Device Initialization Routine
2912  * @pdev: PCI device information struct
2913  * @ent: entry in atl1_pci_tbl
2914  *
2915  * Returns 0 on success, negative on failure
2916  *
2917  * atl1_probe initializes an adapter identified by a pci_dev structure.
2918  * The OS initialization, configuring of the adapter private structure,
2919  * and a hardware reset occur.
2920  */
2921 static int __devinit atl1_probe(struct pci_dev *pdev,
2922         const struct pci_device_id *ent)
2923 {
2924         struct net_device *netdev;
2925         struct atl1_adapter *adapter;
2926         static int cards_found = 0;
2927         int err;
2928
2929         err = pci_enable_device(pdev);
2930         if (err)
2931                 return err;
2932
2933         /*
2934          * The atl1 chip can DMA to 64-bit addresses, but it uses a single
2935          * shared register for the high 32 bits, so only a single, aligned,
2936          * 4 GB physical address range can be used at a time.
2937          *
2938          * Supporting 64-bit DMA on this hardware is more trouble than it's
2939          * worth.  It is far easier to limit to 32-bit DMA than update
2940          * various kernel subsystems to support the mechanics required by a
2941          * fixed-high-32-bit system.
2942          */
2943         err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
2944         if (err) {
2945                 dev_err(&pdev->dev, "no usable DMA configuration\n");
2946                 goto err_dma;
2947         }
2948         /*
2949          * Mark all PCI regions associated with PCI device
2950          * pdev as being reserved by owner atl1_driver_name
2951          */
2952         err = pci_request_regions(pdev, ATLX_DRIVER_NAME);
2953         if (err)
2954                 goto err_request_regions;
2955
2956         /*
2957          * Enables bus-mastering on the device and calls
2958          * pcibios_set_master to do the needed arch specific settings
2959          */
2960         pci_set_master(pdev);
2961
2962         netdev = alloc_etherdev(sizeof(struct atl1_adapter));
2963         if (!netdev) {
2964                 err = -ENOMEM;
2965                 goto err_alloc_etherdev;
2966         }
2967         SET_NETDEV_DEV(netdev, &pdev->dev);
2968
2969         pci_set_drvdata(pdev, netdev);
2970         adapter = netdev_priv(netdev);
2971         adapter->netdev = netdev;
2972         adapter->pdev = pdev;
2973         adapter->hw.back = adapter;
2974         adapter->msg_enable = netif_msg_init(debug, atl1_default_msg);
2975
2976         adapter->hw.hw_addr = pci_iomap(pdev, 0, 0);
2977         if (!adapter->hw.hw_addr) {
2978                 err = -EIO;
2979                 goto err_pci_iomap;
2980         }
2981         /* get device revision number */
2982         adapter->hw.dev_rev = ioread16(adapter->hw.hw_addr +
2983                 (REG_MASTER_CTRL + 2));
2984         if (netif_msg_probe(adapter))
2985                 dev_info(&pdev->dev, "version %s\n", ATLX_DRIVER_VERSION);
2986
2987         /* set default ring resource counts */
2988         adapter->rfd_ring.count = adapter->rrd_ring.count = ATL1_DEFAULT_RFD;
2989         adapter->tpd_ring.count = ATL1_DEFAULT_TPD;
2990
2991         adapter->mii.dev = netdev;
2992         adapter->mii.mdio_read = mdio_read;
2993         adapter->mii.mdio_write = mdio_write;
2994         adapter->mii.phy_id_mask = 0x1f;
2995         adapter->mii.reg_num_mask = 0x1f;
2996
2997         netdev->open = &atl1_open;
2998         netdev->stop = &atl1_close;
2999         netdev->hard_start_xmit = &atl1_xmit_frame;
3000         netdev->get_stats = &atlx_get_stats;
3001         netdev->set_multicast_list = &atlx_set_multi;
3002         netdev->set_mac_address = &atl1_set_mac;
3003         netdev->change_mtu = &atl1_change_mtu;
3004         netdev->do_ioctl = &atlx_ioctl;
3005         netdev->tx_timeout = &atlx_tx_timeout;
3006         netdev->watchdog_timeo = 5 * HZ;
3007 #ifdef CONFIG_NET_POLL_CONTROLLER
3008         netdev->poll_controller = atl1_poll_controller;
3009 #endif
3010         netdev->vlan_rx_register = atlx_vlan_rx_register;
3011
3012         netdev->ethtool_ops = &atl1_ethtool_ops;
3013         adapter->bd_number = cards_found;
3014
3015         /* setup the private structure */
3016         err = atl1_sw_init(adapter);
3017         if (err)
3018                 goto err_common;
3019
3020         netdev->features = NETIF_F_HW_CSUM;
3021         netdev->features |= NETIF_F_SG;
3022         netdev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
3023         netdev->features |= NETIF_F_TSO;
3024         netdev->features |= NETIF_F_LLTX;
3025
3026         /*
3027          * patch for some L1 of old version,
3028          * the final version of L1 may not need these
3029          * patches
3030          */
3031         /* atl1_pcie_patch(adapter); */
3032
3033         /* really reset GPHY core */
3034         iowrite16(0, adapter->hw.hw_addr + REG_PHY_ENABLE);
3035
3036         /*
3037          * reset the controller to
3038          * put the device in a known good starting state
3039          */
3040         if (atl1_reset_hw(&adapter->hw)) {
3041                 err = -EIO;
3042                 goto err_common;
3043         }
3044
3045         /* copy the MAC address out of the EEPROM */
3046         atl1_read_mac_addr(&adapter->hw);
3047         memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
3048
3049         if (!is_valid_ether_addr(netdev->dev_addr)) {
3050                 err = -EIO;
3051                 goto err_common;
3052         }
3053
3054         atl1_check_options(adapter);
3055
3056         /* pre-init the MAC, and setup link */
3057         err = atl1_init_hw(&adapter->hw);
3058         if (err) {
3059                 err = -EIO;
3060                 goto err_common;
3061         }
3062
3063         atl1_pcie_patch(adapter);
3064         /* assume we have no link for now */
3065         netif_carrier_off(netdev);
3066         netif_stop_queue(netdev);
3067
3068         init_timer(&adapter->watchdog_timer);
3069         adapter->watchdog_timer.function = &atl1_watchdog;
3070         adapter->watchdog_timer.data = (unsigned long)adapter;
3071
3072         init_timer(&adapter->phy_config_timer);
3073         adapter->phy_config_timer.function = &atl1_phy_config;
3074         adapter->phy_config_timer.data = (unsigned long)adapter;
3075         adapter->phy_timer_pending = false;
3076
3077         INIT_WORK(&adapter->tx_timeout_task, atl1_tx_timeout_task);
3078
3079         INIT_WORK(&adapter->link_chg_task, atlx_link_chg_task);
3080
3081         INIT_WORK(&adapter->pcie_dma_to_rst_task, atl1_tx_timeout_task);
3082
3083         err = register_netdev(netdev);
3084         if (err)
3085                 goto err_common;
3086
3087         cards_found++;
3088         atl1_via_workaround(adapter);
3089         return 0;
3090
3091 err_common:
3092         pci_iounmap(pdev, adapter->hw.hw_addr);
3093 err_pci_iomap:
3094         free_netdev(netdev);
3095 err_alloc_etherdev:
3096         pci_release_regions(pdev);
3097 err_dma:
3098 err_request_regions:
3099         pci_disable_device(pdev);
3100         return err;
3101 }
3102
3103 /*
3104  * atl1_remove - Device Removal Routine
3105  * @pdev: PCI device information struct
3106  *
3107  * atl1_remove is called by the PCI subsystem to alert the driver
3108  * that it should release a PCI device.  The could be caused by a
3109  * Hot-Plug event, or because the driver is going to be removed from
3110  * memory.
3111  */
3112 static void __devexit atl1_remove(struct pci_dev *pdev)
3113 {
3114         struct net_device *netdev = pci_get_drvdata(pdev);
3115         struct atl1_adapter *adapter;
3116         /* Device not available. Return. */
3117         if (!netdev)
3118                 return;
3119
3120         adapter = netdev_priv(netdev);
3121
3122         /*
3123          * Some atl1 boards lack persistent storage for their MAC, and get it
3124          * from the BIOS during POST.  If we've been messing with the MAC
3125          * address, we need to save the permanent one.
3126          */
3127         if (memcmp(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN)) {
3128                 memcpy(adapter->hw.mac_addr, adapter->hw.perm_mac_addr,
3129                         ETH_ALEN);
3130                 atl1_set_mac_addr(&adapter->hw);
3131         }
3132
3133         iowrite16(0, adapter->hw.hw_addr + REG_PHY_ENABLE);
3134         unregister_netdev(netdev);
3135         pci_iounmap(pdev, adapter->hw.hw_addr);
3136         pci_release_regions(pdev);
3137         free_netdev(netdev);
3138         pci_disable_device(pdev);
3139 }
3140
3141 static struct pci_driver atl1_driver = {
3142         .name = ATLX_DRIVER_NAME,
3143         .id_table = atl1_pci_tbl,
3144         .probe = atl1_probe,
3145         .remove = __devexit_p(atl1_remove),
3146         .suspend = atl1_suspend,
3147         .resume = atl1_resume,
3148         .shutdown = atl1_shutdown
3149 };
3150
3151 /*
3152  * atl1_exit_module - Driver Exit Cleanup Routine
3153  *
3154  * atl1_exit_module is called just before the driver is removed
3155  * from memory.
3156  */
3157 static void __exit atl1_exit_module(void)
3158 {
3159         pci_unregister_driver(&atl1_driver);
3160 }
3161
3162 /*
3163  * atl1_init_module - Driver Registration Routine
3164  *
3165  * atl1_init_module is the first routine called when the driver is
3166  * loaded. All it does is register with the PCI subsystem.
3167  */
3168 static int __init atl1_init_module(void)
3169 {
3170         return pci_register_driver(&atl1_driver);
3171 }
3172
3173 module_init(atl1_init_module);
3174 module_exit(atl1_exit_module);
3175
3176 struct atl1_stats {
3177         char stat_string[ETH_GSTRING_LEN];
3178         int sizeof_stat;
3179         int stat_offset;
3180 };
3181
3182 #define ATL1_STAT(m) \
3183         sizeof(((struct atl1_adapter *)0)->m), offsetof(struct atl1_adapter, m)
3184
3185 static struct atl1_stats atl1_gstrings_stats[] = {
3186         {"rx_packets", ATL1_STAT(soft_stats.rx_packets)},
3187         {"tx_packets", ATL1_STAT(soft_stats.tx_packets)},
3188         {"rx_bytes", ATL1_STAT(soft_stats.rx_bytes)},
3189         {"tx_bytes", ATL1_STAT(soft_stats.tx_bytes)},
3190         {"rx_errors", ATL1_STAT(soft_stats.rx_errors)},
3191         {"tx_errors", ATL1_STAT(soft_stats.tx_errors)},
3192         {"rx_dropped", ATL1_STAT(net_stats.rx_dropped)},
3193         {"tx_dropped", ATL1_STAT(net_stats.tx_dropped)},
3194         {"multicast", ATL1_STAT(soft_stats.multicast)},
3195         {"collisions", ATL1_STAT(soft_stats.collisions)},
3196         {"rx_length_errors", ATL1_STAT(soft_stats.rx_length_errors)},
3197         {"rx_over_errors", ATL1_STAT(soft_stats.rx_missed_errors)},
3198         {"rx_crc_errors", ATL1_STAT(soft_stats.rx_crc_errors)},
3199         {"rx_frame_errors", ATL1_STAT(soft_stats.rx_frame_errors)},
3200         {"rx_fifo_errors", ATL1_STAT(soft_stats.rx_fifo_errors)},
3201         {"rx_missed_errors", ATL1_STAT(soft_stats.rx_missed_errors)},
3202         {"tx_aborted_errors", ATL1_STAT(soft_stats.tx_aborted_errors)},
3203         {"tx_carrier_errors", ATL1_STAT(soft_stats.tx_carrier_errors)},
3204         {"tx_fifo_errors", ATL1_STAT(soft_stats.tx_fifo_errors)},
3205         {"tx_window_errors", ATL1_STAT(soft_stats.tx_window_errors)},
3206         {"tx_abort_exce_coll", ATL1_STAT(soft_stats.excecol)},
3207         {"tx_abort_late_coll", ATL1_STAT(soft_stats.latecol)},
3208         {"tx_deferred_ok", ATL1_STAT(soft_stats.deffer)},
3209         {"tx_single_coll_ok", ATL1_STAT(soft_stats.scc)},
3210         {"tx_multi_coll_ok", ATL1_STAT(soft_stats.mcc)},
3211         {"tx_underun", ATL1_STAT(soft_stats.tx_underun)},
3212         {"tx_trunc", ATL1_STAT(soft_stats.tx_trunc)},
3213         {"tx_pause", ATL1_STAT(soft_stats.tx_pause)},
3214         {"rx_pause", ATL1_STAT(soft_stats.rx_pause)},
3215         {"rx_rrd_ov", ATL1_STAT(soft_stats.rx_rrd_ov)},
3216         {"rx_trunc", ATL1_STAT(soft_stats.rx_trunc)}
3217 };
3218
3219 static void atl1_get_ethtool_stats(struct net_device *netdev,
3220         struct ethtool_stats *stats, u64 *data)
3221 {
3222         struct atl1_adapter *adapter = netdev_priv(netdev);
3223         int i;
3224         char *p;
3225
3226         for (i = 0; i < ARRAY_SIZE(atl1_gstrings_stats); i++) {
3227                 p = (char *)adapter+atl1_gstrings_stats[i].stat_offset;
3228                 data[i] = (atl1_gstrings_stats[i].sizeof_stat ==
3229                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
3230         }
3231
3232 }
3233
3234 static int atl1_get_sset_count(struct net_device *netdev, int sset)
3235 {
3236         switch (sset) {
3237         case ETH_SS_STATS:
3238                 return ARRAY_SIZE(atl1_gstrings_stats);
3239         default:
3240                 return -EOPNOTSUPP;
3241         }
3242 }
3243
3244 static int atl1_get_settings(struct net_device *netdev,
3245         struct ethtool_cmd *ecmd)
3246 {
3247         struct atl1_adapter *adapter = netdev_priv(netdev);
3248         struct atl1_hw *hw = &adapter->hw;
3249
3250         ecmd->supported = (SUPPORTED_10baseT_Half |
3251                            SUPPORTED_10baseT_Full |
3252                            SUPPORTED_100baseT_Half |
3253                            SUPPORTED_100baseT_Full |
3254                            SUPPORTED_1000baseT_Full |
3255                            SUPPORTED_Autoneg | SUPPORTED_TP);
3256         ecmd->advertising = ADVERTISED_TP;
3257         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3258             hw->media_type == MEDIA_TYPE_1000M_FULL) {
3259                 ecmd->advertising |= ADVERTISED_Autoneg;
3260                 if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR) {
3261                         ecmd->advertising |= ADVERTISED_Autoneg;
3262                         ecmd->advertising |=
3263                             (ADVERTISED_10baseT_Half |
3264                              ADVERTISED_10baseT_Full |
3265                              ADVERTISED_100baseT_Half |
3266                              ADVERTISED_100baseT_Full |
3267                              ADVERTISED_1000baseT_Full);
3268                 } else
3269                         ecmd->advertising |= (ADVERTISED_1000baseT_Full);
3270         }
3271         ecmd->port = PORT_TP;
3272         ecmd->phy_address = 0;
3273         ecmd->transceiver = XCVR_INTERNAL;
3274
3275         if (netif_carrier_ok(adapter->netdev)) {
3276                 u16 link_speed, link_duplex;
3277                 atl1_get_speed_and_duplex(hw, &link_speed, &link_duplex);
3278                 ecmd->speed = link_speed;
3279                 if (link_duplex == FULL_DUPLEX)
3280                         ecmd->duplex = DUPLEX_FULL;
3281                 else
3282                         ecmd->duplex = DUPLEX_HALF;
3283         } else {
3284                 ecmd->speed = -1;
3285                 ecmd->duplex = -1;
3286         }
3287         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3288             hw->media_type == MEDIA_TYPE_1000M_FULL)
3289                 ecmd->autoneg = AUTONEG_ENABLE;
3290         else
3291                 ecmd->autoneg = AUTONEG_DISABLE;
3292
3293         return 0;
3294 }
3295
3296 static int atl1_set_settings(struct net_device *netdev,
3297         struct ethtool_cmd *ecmd)
3298 {
3299         struct atl1_adapter *adapter = netdev_priv(netdev);
3300         struct atl1_hw *hw = &adapter->hw;
3301         u16 phy_data;
3302         int ret_val = 0;
3303         u16 old_media_type = hw->media_type;
3304
3305         if (netif_running(adapter->netdev)) {
3306                 if (netif_msg_link(adapter))
3307                         dev_dbg(&adapter->pdev->dev,
3308                                 "ethtool shutting down adapter\n");
3309                 atl1_down(adapter);
3310         }
3311
3312         if (ecmd->autoneg == AUTONEG_ENABLE)
3313                 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
3314         else {
3315                 if (ecmd->speed == SPEED_1000) {
3316                         if (ecmd->duplex != DUPLEX_FULL) {
3317                                 if (netif_msg_link(adapter))
3318                                         dev_warn(&adapter->pdev->dev,
3319                                                 "1000M half is invalid\n");
3320                                 ret_val = -EINVAL;
3321                                 goto exit_sset;
3322                         }
3323                         hw->media_type = MEDIA_TYPE_1000M_FULL;
3324                 } else if (ecmd->speed == SPEED_100) {
3325                         if (ecmd->duplex == DUPLEX_FULL)
3326                                 hw->media_type = MEDIA_TYPE_100M_FULL;
3327                         else
3328                                 hw->media_type = MEDIA_TYPE_100M_HALF;
3329                 } else {
3330                         if (ecmd->duplex == DUPLEX_FULL)
3331                                 hw->media_type = MEDIA_TYPE_10M_FULL;
3332                         else
3333                                 hw->media_type = MEDIA_TYPE_10M_HALF;
3334                 }
3335         }
3336         switch (hw->media_type) {
3337         case MEDIA_TYPE_AUTO_SENSOR:
3338                 ecmd->advertising =
3339                     ADVERTISED_10baseT_Half |
3340                     ADVERTISED_10baseT_Full |
3341                     ADVERTISED_100baseT_Half |
3342                     ADVERTISED_100baseT_Full |
3343                     ADVERTISED_1000baseT_Full |
3344                     ADVERTISED_Autoneg | ADVERTISED_TP;
3345                 break;
3346         case MEDIA_TYPE_1000M_FULL:
3347                 ecmd->advertising =
3348                     ADVERTISED_1000baseT_Full |
3349                     ADVERTISED_Autoneg | ADVERTISED_TP;
3350                 break;
3351         default:
3352                 ecmd->advertising = 0;
3353                 break;
3354         }
3355         if (atl1_phy_setup_autoneg_adv(hw)) {
3356                 ret_val = -EINVAL;
3357                 if (netif_msg_link(adapter))
3358                         dev_warn(&adapter->pdev->dev,
3359                                 "invalid ethtool speed/duplex setting\n");
3360                 goto exit_sset;
3361         }
3362         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3363             hw->media_type == MEDIA_TYPE_1000M_FULL)
3364                 phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
3365         else {
3366                 switch (hw->media_type) {
3367                 case MEDIA_TYPE_100M_FULL:
3368                         phy_data =
3369                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
3370                             MII_CR_RESET;
3371                         break;
3372                 case MEDIA_TYPE_100M_HALF:
3373                         phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
3374                         break;
3375                 case MEDIA_TYPE_10M_FULL:
3376                         phy_data =
3377                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
3378                         break;
3379                 default:
3380                         /* MEDIA_TYPE_10M_HALF: */
3381                         phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
3382                         break;
3383                 }
3384         }
3385         atl1_write_phy_reg(hw, MII_BMCR, phy_data);
3386 exit_sset:
3387         if (ret_val)
3388                 hw->media_type = old_media_type;
3389
3390         if (netif_running(adapter->netdev)) {
3391                 if (netif_msg_link(adapter))
3392                         dev_dbg(&adapter->pdev->dev,
3393                                 "ethtool starting adapter\n");
3394                 atl1_up(adapter);
3395         } else if (!ret_val) {
3396                 if (netif_msg_link(adapter))
3397                         dev_dbg(&adapter->pdev->dev,
3398                                 "ethtool resetting adapter\n");
3399                 atl1_reset(adapter);
3400         }
3401         return ret_val;
3402 }
3403
3404 static void atl1_get_drvinfo(struct net_device *netdev,
3405         struct ethtool_drvinfo *drvinfo)
3406 {
3407         struct atl1_adapter *adapter = netdev_priv(netdev);
3408
3409         strncpy(drvinfo->driver, ATLX_DRIVER_NAME, sizeof(drvinfo->driver));
3410         strncpy(drvinfo->version, ATLX_DRIVER_VERSION,
3411                 sizeof(drvinfo->version));
3412         strncpy(drvinfo->fw_version, "N/A", sizeof(drvinfo->fw_version));
3413         strncpy(drvinfo->bus_info, pci_name(adapter->pdev),
3414                 sizeof(drvinfo->bus_info));
3415         drvinfo->eedump_len = ATL1_EEDUMP_LEN;
3416 }
3417
3418 static void atl1_get_wol(struct net_device *netdev,
3419         struct ethtool_wolinfo *wol)
3420 {
3421         struct atl1_adapter *adapter = netdev_priv(netdev);
3422
3423         wol->supported = WAKE_UCAST | WAKE_MCAST | WAKE_BCAST | WAKE_MAGIC;
3424         wol->wolopts = 0;
3425         if (adapter->wol & ATLX_WUFC_EX)
3426                 wol->wolopts |= WAKE_UCAST;
3427         if (adapter->wol & ATLX_WUFC_MC)
3428                 wol->wolopts |= WAKE_MCAST;
3429         if (adapter->wol & ATLX_WUFC_BC)
3430                 wol->wolopts |= WAKE_BCAST;
3431         if (adapter->wol & ATLX_WUFC_MAG)
3432                 wol->wolopts |= WAKE_MAGIC;
3433         return;
3434 }
3435
3436 static int atl1_set_wol(struct net_device *netdev,
3437         struct ethtool_wolinfo *wol)
3438 {
3439         struct atl1_adapter *adapter = netdev_priv(netdev);
3440
3441         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
3442                 return -EOPNOTSUPP;
3443         adapter->wol = 0;
3444         if (wol->wolopts & WAKE_UCAST)
3445                 adapter->wol |= ATLX_WUFC_EX;
3446         if (wol->wolopts & WAKE_MCAST)
3447                 adapter->wol |= ATLX_WUFC_MC;
3448         if (wol->wolopts & WAKE_BCAST)
3449                 adapter->wol |= ATLX_WUFC_BC;
3450         if (wol->wolopts & WAKE_MAGIC)
3451                 adapter->wol |= ATLX_WUFC_MAG;
3452         return 0;
3453 }
3454
3455 static u32 atl1_get_msglevel(struct net_device *netdev)
3456 {
3457         struct atl1_adapter *adapter = netdev_priv(netdev);
3458         return adapter->msg_enable;
3459 }
3460
3461 static void atl1_set_msglevel(struct net_device *netdev, u32 value)
3462 {
3463         struct atl1_adapter *adapter = netdev_priv(netdev);
3464         adapter->msg_enable = value;
3465 }
3466
3467 static int atl1_get_regs_len(struct net_device *netdev)
3468 {
3469         return ATL1_REG_COUNT * sizeof(u32);
3470 }
3471
3472 static void atl1_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
3473         void *p)
3474 {
3475         struct atl1_adapter *adapter = netdev_priv(netdev);
3476         struct atl1_hw *hw = &adapter->hw;
3477         unsigned int i;
3478         u32 *regbuf = p;
3479
3480         for (i = 0; i < ATL1_REG_COUNT; i++) {
3481                 /*
3482                  * This switch statement avoids reserved regions
3483                  * of register space.
3484                  */
3485                 switch (i) {
3486                 case 6 ... 9:
3487                 case 14:
3488                 case 29 ... 31:
3489                 case 34 ... 63:
3490                 case 75 ... 127:
3491                 case 136 ... 1023:
3492                 case 1027 ... 1087:
3493                 case 1091 ... 1151:
3494                 case 1194 ... 1195:
3495                 case 1200 ... 1201:
3496                 case 1206 ... 1213:
3497                 case 1216 ... 1279:
3498                 case 1290 ... 1311:
3499                 case 1323 ... 1343:
3500                 case 1358 ... 1359:
3501                 case 1368 ... 1375:
3502                 case 1378 ... 1383:
3503                 case 1388 ... 1391:
3504                 case 1393 ... 1395:
3505                 case 1402 ... 1403:
3506                 case 1410 ... 1471:
3507                 case 1522 ... 1535:
3508                         /* reserved region; don't read it */
3509                         regbuf[i] = 0;
3510                         break;
3511                 default:
3512                         /* unreserved region */
3513                         regbuf[i] = ioread32(hw->hw_addr + (i * sizeof(u32)));
3514                 }
3515         }
3516 }
3517
3518 static void atl1_get_ringparam(struct net_device *netdev,
3519         struct ethtool_ringparam *ring)
3520 {
3521         struct atl1_adapter *adapter = netdev_priv(netdev);
3522         struct atl1_tpd_ring *txdr = &adapter->tpd_ring;
3523         struct atl1_rfd_ring *rxdr = &adapter->rfd_ring;
3524
3525         ring->rx_max_pending = ATL1_MAX_RFD;
3526         ring->tx_max_pending = ATL1_MAX_TPD;
3527         ring->rx_mini_max_pending = 0;
3528         ring->rx_jumbo_max_pending = 0;
3529         ring->rx_pending = rxdr->count;
3530         ring->tx_pending = txdr->count;
3531         ring->rx_mini_pending = 0;
3532         ring->rx_jumbo_pending = 0;
3533 }
3534
3535 static int atl1_set_ringparam(struct net_device *netdev,
3536         struct ethtool_ringparam *ring)
3537 {
3538         struct atl1_adapter *adapter = netdev_priv(netdev);
3539         struct atl1_tpd_ring *tpdr = &adapter->tpd_ring;
3540         struct atl1_rrd_ring *rrdr = &adapter->rrd_ring;
3541         struct atl1_rfd_ring *rfdr = &adapter->rfd_ring;
3542
3543         struct atl1_tpd_ring tpd_old, tpd_new;
3544         struct atl1_rfd_ring rfd_old, rfd_new;
3545         struct atl1_rrd_ring rrd_old, rrd_new;
3546         struct atl1_ring_header rhdr_old, rhdr_new;
3547         int err;
3548
3549         tpd_old = adapter->tpd_ring;
3550         rfd_old = adapter->rfd_ring;
3551         rrd_old = adapter->rrd_ring;
3552         rhdr_old = adapter->ring_header;
3553
3554         if (netif_running(adapter->netdev))
3555                 atl1_down(adapter);
3556
3557         rfdr->count = (u16) max(ring->rx_pending, (u32) ATL1_MIN_RFD);
3558         rfdr->count = rfdr->count > ATL1_MAX_RFD ? ATL1_MAX_RFD :
3559                         rfdr->count;
3560         rfdr->count = (rfdr->count + 3) & ~3;
3561         rrdr->count = rfdr->count;
3562
3563         tpdr->count = (u16) max(ring->tx_pending, (u32) ATL1_MIN_TPD);
3564         tpdr->count = tpdr->count > ATL1_MAX_TPD ? ATL1_MAX_TPD :
3565                         tpdr->count;
3566         tpdr->count = (tpdr->count + 3) & ~3;
3567
3568         if (netif_running(adapter->netdev)) {
3569                 /* try to get new resources before deleting old */
3570                 err = atl1_setup_ring_resources(adapter);
3571                 if (err)
3572                         goto err_setup_ring;
3573
3574                 /*
3575                  * save the new, restore the old in order to free it,
3576                  * then restore the new back again
3577                  */
3578
3579                 rfd_new = adapter->rfd_ring;
3580                 rrd_new = adapter->rrd_ring;
3581                 tpd_new = adapter->tpd_ring;
3582                 rhdr_new = adapter->ring_header;
3583                 adapter->rfd_ring = rfd_old;
3584                 adapter->rrd_ring = rrd_old;
3585                 adapter->tpd_ring = tpd_old;
3586                 adapter->ring_header = rhdr_old;
3587                 atl1_free_ring_resources(adapter);
3588                 adapter->rfd_ring = rfd_new;
3589                 adapter->rrd_ring = rrd_new;
3590                 adapter->tpd_ring = tpd_new;
3591                 adapter->ring_header = rhdr_new;
3592
3593                 err = atl1_up(adapter);
3594                 if (err)
3595                         return err;
3596         }
3597         return 0;
3598
3599 err_setup_ring:
3600         adapter->rfd_ring = rfd_old;
3601         adapter->rrd_ring = rrd_old;
3602         adapter->tpd_ring = tpd_old;
3603         adapter->ring_header = rhdr_old;
3604         atl1_up(adapter);
3605         return err;
3606 }
3607
3608 static void atl1_get_pauseparam(struct net_device *netdev,
3609         struct ethtool_pauseparam *epause)
3610 {
3611         struct atl1_adapter *adapter = netdev_priv(netdev);
3612         struct atl1_hw *hw = &adapter->hw;
3613
3614         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3615             hw->media_type == MEDIA_TYPE_1000M_FULL) {
3616                 epause->autoneg = AUTONEG_ENABLE;
3617         } else {
3618                 epause->autoneg = AUTONEG_DISABLE;
3619         }
3620         epause->rx_pause = 1;
3621         epause->tx_pause = 1;
3622 }
3623
3624 static int atl1_set_pauseparam(struct net_device *netdev,
3625         struct ethtool_pauseparam *epause)
3626 {
3627         struct atl1_adapter *adapter = netdev_priv(netdev);
3628         struct atl1_hw *hw = &adapter->hw;
3629
3630         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3631             hw->media_type == MEDIA_TYPE_1000M_FULL) {
3632                 epause->autoneg = AUTONEG_ENABLE;
3633         } else {
3634                 epause->autoneg = AUTONEG_DISABLE;
3635         }
3636
3637         epause->rx_pause = 1;
3638         epause->tx_pause = 1;
3639
3640         return 0;
3641 }
3642
3643 /* FIXME: is this right? -- CHS */
3644 static u32 atl1_get_rx_csum(struct net_device *netdev)
3645 {
3646         return 1;
3647 }
3648
3649 static void atl1_get_strings(struct net_device *netdev, u32 stringset,
3650         u8 *data)
3651 {
3652         u8 *p = data;
3653         int i;
3654
3655         switch (stringset) {
3656         case ETH_SS_STATS:
3657                 for (i = 0; i < ARRAY_SIZE(atl1_gstrings_stats); i++) {
3658                         memcpy(p, atl1_gstrings_stats[i].stat_string,
3659                                 ETH_GSTRING_LEN);
3660                         p += ETH_GSTRING_LEN;
3661                 }
3662                 break;
3663         }
3664 }
3665
3666 static int atl1_nway_reset(struct net_device *netdev)
3667 {
3668         struct atl1_adapter *adapter = netdev_priv(netdev);
3669         struct atl1_hw *hw = &adapter->hw;
3670
3671         if (netif_running(netdev)) {
3672                 u16 phy_data;
3673                 atl1_down(adapter);
3674
3675                 if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3676                         hw->media_type == MEDIA_TYPE_1000M_FULL) {
3677                         phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
3678                 } else {
3679                         switch (hw->media_type) {
3680                         case MEDIA_TYPE_100M_FULL:
3681                                 phy_data = MII_CR_FULL_DUPLEX |
3682                                         MII_CR_SPEED_100 | MII_CR_RESET;
3683                                 break;
3684                         case MEDIA_TYPE_100M_HALF:
3685                                 phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
3686                                 break;
3687                         case MEDIA_TYPE_10M_FULL:
3688                                 phy_data = MII_CR_FULL_DUPLEX |
3689                                         MII_CR_SPEED_10 | MII_CR_RESET;
3690                                 break;
3691                         default:
3692                                 /* MEDIA_TYPE_10M_HALF */
3693                                 phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
3694                         }
3695                 }
3696                 atl1_write_phy_reg(hw, MII_BMCR, phy_data);
3697                 atl1_up(adapter);
3698         }
3699         return 0;
3700 }
3701
3702 const struct ethtool_ops atl1_ethtool_ops = {
3703         .get_settings           = atl1_get_settings,
3704         .set_settings           = atl1_set_settings,
3705         .get_drvinfo            = atl1_get_drvinfo,
3706         .get_wol                = atl1_get_wol,
3707         .set_wol                = atl1_set_wol,
3708         .get_msglevel           = atl1_get_msglevel,
3709         .set_msglevel           = atl1_set_msglevel,
3710         .get_regs_len           = atl1_get_regs_len,
3711         .get_regs               = atl1_get_regs,
3712         .get_ringparam          = atl1_get_ringparam,
3713         .set_ringparam          = atl1_set_ringparam,
3714         .get_pauseparam         = atl1_get_pauseparam,
3715         .set_pauseparam         = atl1_set_pauseparam,
3716         .get_rx_csum            = atl1_get_rx_csum,
3717         .set_tx_csum            = ethtool_op_set_tx_hw_csum,
3718         .get_link               = ethtool_op_get_link,
3719         .set_sg                 = ethtool_op_set_sg,
3720         .get_strings            = atl1_get_strings,
3721         .nway_reset             = atl1_nway_reset,
3722         .get_ethtool_stats      = atl1_get_ethtool_stats,
3723         .get_sset_count         = atl1_get_sset_count,
3724         .set_tso                = ethtool_op_set_tso,
3725 };