drivers/net/atlx/atl1.c

   1 /*
   2  * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
   3  * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
   4  * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
   5  *
   6  * Derived from Intel e1000 driver
   7  * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
   8  *
   9  * This program is free software; you can redistribute it and/or modify it
  10  * under the terms of the GNU General Public License as published by the Free
  11  * Software Foundation; either version 2 of the License, or (at your option)
  12  * any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful, but WITHOUT
  15  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  17  * more details.
  18  *
  19  * You should have received a copy of the GNU General Public License along with
  20  * this program; if not, write to the Free Software Foundation, Inc., 59
  21  * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  22  *
  23  * The full GNU General Public License is included in this distribution in the
  24  * file called COPYING.
  25  *
  26  * Contact Information:
  27  * Xiong Huang <xiong_huang@attansic.com>
  28  * Attansic Technology Corp. 3F 147, Xianzheng 9th Road, Zhubei,
  29  * Xinzhu  302, TAIWAN, REPUBLIC OF CHINA
  30  *
  31  * Chris Snook <csnook@redhat.com>
  32  * Jay Cliburn <jcliburn@gmail.com>
  33  *
  34  * This version is adapted from the Attansic reference driver for
  35  * inclusion in the Linux kernel.  It is currently under heavy development.
  36  * A very incomplete list of things that need to be dealt with:
  37  *
  38  * TODO:
  39  * Wake on LAN.
  40  * Add more ethtool functions.
  41  * Fix abstruse irq enable/disable condition described here:
  42  *      http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
  43  *
  44  * NEEDS TESTING:
  45  * VLAN
  46  * multicast
  47  * promiscuous mode
  48  * interrupt coalescing
  49  * SMP torture testing
  50  */
  51
  52 #include <asm/atomic.h>
  53 #include <asm/byteorder.h>
  54
  55 #include <linux/compiler.h>
  56 #include <linux/crc32.h>
  57 #include <linux/delay.h>
  58 #include <linux/dma-mapping.h>
  59 #include <linux/etherdevice.h>
  60 #include <linux/hardirq.h>
  61 #include <linux/if_ether.h>
  62 #include <linux/if_vlan.h>
  63 #include <linux/in.h>
  64 #include <linux/interrupt.h>
  65 #include <linux/ip.h>
  66 #include <linux/irqflags.h>
  67 #include <linux/irqreturn.h>
  68 #include <linux/jiffies.h>
  69 #include <linux/mii.h>
  70 #include <linux/module.h>
  71 #include <linux/moduleparam.h>
  72 #include <linux/net.h>
  73 #include <linux/netdevice.h>
  74 #include <linux/pci.h>
  75 #include <linux/pci_ids.h>
  76 #include <linux/pm.h>
  77 #include <linux/skbuff.h>
  78 #include <linux/slab.h>
  79 #include <linux/spinlock.h>
  80 #include <linux/string.h>
  81 #include <linux/tcp.h>
  82 #include <linux/timer.h>
  83 #include <linux/types.h>
  84 #include <linux/workqueue.h>
  85
  86 #include <net/checksum.h>
  87
  88 #include "atl1.h"
  89
  90 /* Temporary hack for merging atl1 and atl2 */
  91 #include "atlx.c"
  92
  93 /*
  94  * This is the only thing that needs to be changed to adjust the
  95  * maximum number of ports that the driver can manage.
  96  */
  97 #define ATL1_MAX_NIC 4
  98
  99 #define OPTION_UNSET    -1
 100 #define OPTION_DISABLED 0
 101 #define OPTION_ENABLED  1
 102
 103 #define ATL1_PARAM_INIT { [0 ... ATL1_MAX_NIC] = OPTION_UNSET }
 104
 105 /*
 106  * Interrupt Moderate Timer in units of 2 us
 107  *
 108  * Valid Range: 10-65535
 109  *
 110  * Default Value: 100 (200us)
 111  */
 112 static int __devinitdata int_mod_timer[ATL1_MAX_NIC+1] = ATL1_PARAM_INIT;
 113 static int num_int_mod_timer;
 114 module_param_array_named(int_mod_timer, int_mod_timer, int,
 115         &num_int_mod_timer, 0);
 116 MODULE_PARM_DESC(int_mod_timer, "Interrupt moderator timer");
 117
 118 #define DEFAULT_INT_MOD_CNT     100     /* 200us */
 119 #define MAX_INT_MOD_CNT         65000
 120 #define MIN_INT_MOD_CNT         50
 121
 122 struct atl1_option {
 123         enum { enable_option, range_option, list_option } type;
 124         char *name;
 125         char *err;
 126         int def;
 127         union {
 128                 struct {        /* range_option info */
 129                         int min;
 130                         int max;
 131                 } r;
 132                 struct {        /* list_option info */
 133                         int nr;
 134                         struct atl1_opt_list {
 135                                 int i;
 136                                 char *str;
 137                         } *p;
 138                 } l;
 139         } arg;
 140 };
 141
 142 static int __devinit atl1_validate_option(int *value, struct atl1_option *opt,
 143         struct pci_dev *pdev)
 144 {
 145         if (*value == OPTION_UNSET) {
 146                 *value = opt->def;
 147                 return 0;
 148         }
 149
 150         switch (opt->type) {
 151         case enable_option:
 152                 switch (*value) {
 153                 case OPTION_ENABLED:
 154                         dev_info(&pdev->dev, "%s enabled\n", opt->name);
 155                         return 0;
 156                 case OPTION_DISABLED:
 157                         dev_info(&pdev->dev, "%s disabled\n", opt->name);
 158                         return 0;
 159                 }
 160                 break;
 161         case range_option:
 162                 if (*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
 163                         dev_info(&pdev->dev, "%s set to %i\n", opt->name,
 164                                 *value);
 165                         return 0;
 166                 }
 167                 break;
 168         case list_option:{
 169                         int i;
 170                         struct atl1_opt_list *ent;
 171
 172                         for (i = 0; i < opt->arg.l.nr; i++) {
 173                                 ent = &opt->arg.l.p[i];
 174                                 if (*value == ent->i) {
 175                                         if (ent->str[0] != '\0')
 176                                                 dev_info(&pdev->dev, "%s\n",
 177                                                         ent->str);
 178                                         return 0;
 179                                 }
 180                         }
 181                 }
 182                 break;
 183
 184         default:
 185                 break;
 186         }
 187
 188         dev_info(&pdev->dev, "invalid %s specified (%i) %s\n",
 189                 opt->name, *value, opt->err);
 190         *value = opt->def;
 191         return -1;
 192 }
 193
 194 /*
 195  * atl1_check_options - Range Checking for Command Line Parameters
 196  * @adapter: board private structure
 197  *
 198  * This routine checks all command line parameters for valid user
 199  * input.  If an invalid value is given, or if no user specified
 200  * value exists, a default value is used.  The final value is stored
 201  * in a variable in the adapter structure.
 202  */
 203 void __devinit atl1_check_options(struct atl1_adapter *adapter)
 204 {
 205         struct pci_dev *pdev = adapter->pdev;
 206         int bd = adapter->bd_number;
 207         if (bd >= ATL1_MAX_NIC) {
 208                 dev_notice(&pdev->dev, "no configuration for board#%i\n", bd);
 209                 dev_notice(&pdev->dev, "using defaults for all values\n");
 210         }
 211         {                       /* Interrupt Moderate Timer */
 212                 struct atl1_option opt = {
 213                         .type = range_option,
 214                         .name = "Interrupt Moderator Timer",
 215                         .err = "using default of "
 216                                 __MODULE_STRING(DEFAULT_INT_MOD_CNT),
 217                         .def = DEFAULT_INT_MOD_CNT,
 218                         .arg = {.r = {.min = MIN_INT_MOD_CNT,
 219                                         .max = MAX_INT_MOD_CNT} }
 220                 };
 221                 int val;
 222                 if (num_int_mod_timer > bd) {
 223                         val = int_mod_timer[bd];
 224                         atl1_validate_option(&val, &opt, pdev);
 225                         adapter->imt = (u16) val;
 226                 } else
 227                         adapter->imt = (u16) (opt.def);
 228         }
 229 }
 230
 231 /*
 232  * atl1_pci_tbl - PCI Device ID Table
 233  */
 234 static const struct pci_device_id atl1_pci_tbl[] = {
 235         {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1)},
 236         /* required last entry */
 237         {0,}
 238 };
 239 MODULE_DEVICE_TABLE(pci, atl1_pci_tbl);
 240
 241 static const u32 atl1_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
 242         NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
 243
 244 static int debug = -1;
 245 module_param(debug, int, 0);
 246 MODULE_PARM_DESC(debug, "Message level (0=none,...,16=all)");
 247
 248 /*
 249  * Reset the transmit and receive units; mask and clear all interrupts.
 250  * hw - Struct containing variables accessed by shared code
 251  * return : 0  or  idle status (if error)
 252  */
 253 static s32 atl1_reset_hw(struct atl1_hw *hw)
 254 {
 255         struct pci_dev *pdev = hw->back->pdev;
 256         struct atl1_adapter *adapter = hw->back;
 257         u32 icr;
 258         int i;
 259
 260         /*
 261          * Clear Interrupt mask to stop board from generating
 262          * interrupts & Clear any pending interrupt events
 263          */
 264         /*
 265          * iowrite32(0, hw->hw_addr + REG_IMR);
 266          * iowrite32(0xffffffff, hw->hw_addr + REG_ISR);
 267          */
 268
 269         /*
 270          * Issue Soft Reset to the MAC.  This will reset the chip's
 271          * transmit, receive, DMA.  It will not effect
 272          * the current PCI configuration.  The global reset bit is self-
 273          * clearing, and should clear within a microsecond.
 274          */
 275         iowrite32(MASTER_CTRL_SOFT_RST, hw->hw_addr + REG_MASTER_CTRL);
 276         ioread32(hw->hw_addr + REG_MASTER_CTRL);
 277
 278         iowrite16(1, hw->hw_addr + REG_PHY_ENABLE);
 279         ioread16(hw->hw_addr + REG_PHY_ENABLE);
 280
 281         /* delay about 1ms */
 282         msleep(1);
 283
 284         /* Wait at least 10ms for All module to be Idle */
 285         for (i = 0; i < 10; i++) {
 286                 icr = ioread32(hw->hw_addr + REG_IDLE_STATUS);
 287                 if (!icr)
 288                         break;
 289                 /* delay 1 ms */
 290                 msleep(1);
 291                 /* FIXME: still the right way to do this? */
 292                 cpu_relax();
 293         }
 294
 295         if (icr) {
 296                 if (netif_msg_hw(adapter))
 297                         dev_dbg(&pdev->dev, "ICR = 0x%x\n", icr);
 298                 return icr;
 299         }
 300
 301         return 0;
 302 }
 303
 304 /* function about EEPROM
 305  *
 306  * check_eeprom_exist
 307  * return 0 if eeprom exist
 308  */
 309 static int atl1_check_eeprom_exist(struct atl1_hw *hw)
 310 {
 311         u32 value;
 312         value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
 313         if (value & SPI_FLASH_CTRL_EN_VPD) {
 314                 value &= ~SPI_FLASH_CTRL_EN_VPD;
 315                 iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
 316         }
 317
 318         value = ioread16(hw->hw_addr + REG_PCIE_CAP_LIST);
 319         return ((value & 0xFF00) == 0x6C00) ? 0 : 1;
 320 }
 321
 322 static bool atl1_read_eeprom(struct atl1_hw *hw, u32 offset, u32 *p_value)
 323 {
 324         int i;
 325         u32 control;
 326
 327         if (offset & 3)
 328                 /* address do not align */
 329                 return false;
 330
 331         iowrite32(0, hw->hw_addr + REG_VPD_DATA);
 332         control = (offset & VPD_CAP_VPD_ADDR_MASK) << VPD_CAP_VPD_ADDR_SHIFT;
 333         iowrite32(control, hw->hw_addr + REG_VPD_CAP);
 334         ioread32(hw->hw_addr + REG_VPD_CAP);
 335
 336         for (i = 0; i < 10; i++) {
 337                 msleep(2);
 338                 control = ioread32(hw->hw_addr + REG_VPD_CAP);
 339                 if (control & VPD_CAP_VPD_FLAG)
 340                         break;
 341         }
 342         if (control & VPD_CAP_VPD_FLAG) {
 343                 *p_value = ioread32(hw->hw_addr + REG_VPD_DATA);
 344                 return true;
 345         }
 346         /* timeout */
 347         return false;
 348 }
 349
 350 /*
 351  * Reads the value from a PHY register
 352  * hw - Struct containing variables accessed by shared code
 353  * reg_addr - address of the PHY register to read
 354  */
 355 s32 atl1_read_phy_reg(struct atl1_hw *hw, u16 reg_addr, u16 *phy_data)
 356 {
 357         u32 val;
 358         int i;
 359
 360         val = ((u32) (reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT |
 361                 MDIO_START | MDIO_SUP_PREAMBLE | MDIO_RW | MDIO_CLK_25_4 <<
 362                 MDIO_CLK_SEL_SHIFT;
 363         iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);
 364         ioread32(hw->hw_addr + REG_MDIO_CTRL);
 365
 366         for (i = 0; i < MDIO_WAIT_TIMES; i++) {
 367                 udelay(2);
 368                 val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
 369                 if (!(val & (MDIO_START | MDIO_BUSY)))
 370                         break;
 371         }
 372         if (!(val & (MDIO_START | MDIO_BUSY))) {
 373                 *phy_data = (u16) val;
 374                 return 0;
 375         }
 376         return ATLX_ERR_PHY;
 377 }
 378
 379 #define CUSTOM_SPI_CS_SETUP     2
 380 #define CUSTOM_SPI_CLK_HI       2
 381 #define CUSTOM_SPI_CLK_LO       2
 382 #define CUSTOM_SPI_CS_HOLD      2
 383 #define CUSTOM_SPI_CS_HI        3
 384
 385 static bool atl1_spi_read(struct atl1_hw *hw, u32 addr, u32 *buf)
 386 {
 387         int i;
 388         u32 value;
 389
 390         iowrite32(0, hw->hw_addr + REG_SPI_DATA);
 391         iowrite32(addr, hw->hw_addr + REG_SPI_ADDR);
 392
 393         value = SPI_FLASH_CTRL_WAIT_READY |
 394             (CUSTOM_SPI_CS_SETUP & SPI_FLASH_CTRL_CS_SETUP_MASK) <<
 395             SPI_FLASH_CTRL_CS_SETUP_SHIFT | (CUSTOM_SPI_CLK_HI &
 396                                              SPI_FLASH_CTRL_CLK_HI_MASK) <<
 397             SPI_FLASH_CTRL_CLK_HI_SHIFT | (CUSTOM_SPI_CLK_LO &
 398                                            SPI_FLASH_CTRL_CLK_LO_MASK) <<
 399             SPI_FLASH_CTRL_CLK_LO_SHIFT | (CUSTOM_SPI_CS_HOLD &
 400                                            SPI_FLASH_CTRL_CS_HOLD_MASK) <<
 401             SPI_FLASH_CTRL_CS_HOLD_SHIFT | (CUSTOM_SPI_CS_HI &
 402                                             SPI_FLASH_CTRL_CS_HI_MASK) <<
 403             SPI_FLASH_CTRL_CS_HI_SHIFT | (1 & SPI_FLASH_CTRL_INS_MASK) <<
 404             SPI_FLASH_CTRL_INS_SHIFT;
 405
 406         iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
 407
 408         value |= SPI_FLASH_CTRL_START;
 409         iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
 410         ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
 411
 412         for (i = 0; i < 10; i++) {
 413                 msleep(1);
 414                 value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
 415                 if (!(value & SPI_FLASH_CTRL_START))
 416                         break;
 417         }
 418
 419         if (value & SPI_FLASH_CTRL_START)
 420                 return false;
 421
 422         *buf = ioread32(hw->hw_addr + REG_SPI_DATA);
 423
 424         return true;
 425 }
 426
 427 /*
 428  * get_permanent_address
 429  * return 0 if get valid mac address,
 430  */
 431 static int atl1_get_permanent_address(struct atl1_hw *hw)
 432 {
 433         u32 addr[2];
 434         u32 i, control;
 435         u16 reg;
 436         u8 eth_addr[ETH_ALEN];
 437         bool key_valid;
 438
 439         if (is_valid_ether_addr(hw->perm_mac_addr))
 440                 return 0;
 441
 442         /* init */
 443         addr[0] = addr[1] = 0;
 444
 445         if (!atl1_check_eeprom_exist(hw)) {
 446                 reg = 0;
 447                 key_valid = false;
 448                 /* Read out all EEPROM content */
 449                 i = 0;
 450                 while (1) {
 451                         if (atl1_read_eeprom(hw, i + 0x100, &control)) {
 452                                 if (key_valid) {
 453                                         if (reg == REG_MAC_STA_ADDR)
 454                                                 addr[0] = control;
 455                                         else if (reg == (REG_MAC_STA_ADDR + 4))
 456                                                 addr[1] = control;
 457                                         key_valid = false;
 458                                 } else if ((control & 0xff) == 0x5A) {
 459                                         key_valid = true;
 460                                         reg = (u16) (control >> 16);
 461                                 } else
 462                                         break;
 463                         } else
 464                                 /* read error */
 465                                 break;
 466                         i += 4;
 467                 }
 468
 469                 *(u32 *) &eth_addr[2] = swab32(addr[0]);
 470                 *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
 471                 if (is_valid_ether_addr(eth_addr)) {
 472                         memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
 473                         return 0;
 474                 }
 475                 return 1;
 476         }
 477
 478         /* see if SPI FLAGS exist ? */
 479         addr[0] = addr[1] = 0;
 480         reg = 0;
 481         key_valid = false;
 482         i = 0;
 483         while (1) {
 484                 if (atl1_spi_read(hw, i + 0x1f000, &control)) {
 485                         if (key_valid) {
 486                                 if (reg == REG_MAC_STA_ADDR)
 487                                         addr[0] = control;
 488                                 else if (reg == (REG_MAC_STA_ADDR + 4))
 489                                         addr[1] = control;
 490                                 key_valid = false;
 491                         } else if ((control & 0xff) == 0x5A) {
 492                                 key_valid = true;
 493                                 reg = (u16) (control >> 16);
 494                         } else
 495                                 /* data end */
 496                                 break;
 497                 } else
 498                         /* read error */
 499                         break;
 500                 i += 4;
 501         }
 502
 503         *(u32 *) &eth_addr[2] = swab32(addr[0]);
 504         *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
 505         if (is_valid_ether_addr(eth_addr)) {
 506                 memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
 507                 return 0;
 508         }
 509
 510         /*
 511          * On some motherboards, the MAC address is written by the
 512          * BIOS directly to the MAC register during POST, and is
 513          * not stored in eeprom.  If all else thus far has failed
 514          * to fetch the permanent MAC address, try reading it directly.
 515          */
 516         addr[0] = ioread32(hw->hw_addr + REG_MAC_STA_ADDR);
 517         addr[1] = ioread16(hw->hw_addr + (REG_MAC_STA_ADDR + 4));
 518         *(u32 *) &eth_addr[2] = swab32(addr[0]);
 519         *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
 520         if (is_valid_ether_addr(eth_addr)) {
 521                 memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
 522                 return 0;
 523         }
 524
 525         return 1;
 526 }
 527
 528 /*
 529  * Reads the adapter's MAC address from the EEPROM
 530  * hw - Struct containing variables accessed by shared code
 531  */
 532 s32 atl1_read_mac_addr(struct atl1_hw *hw)
 533 {
 534         u16 i;
 535
 536         if (atl1_get_permanent_address(hw))
 537                 random_ether_addr(hw->perm_mac_addr);
 538
 539         for (i = 0; i < ETH_ALEN; i++)
 540                 hw->mac_addr[i] = hw->perm_mac_addr[i];
 541         return 0;
 542 }
 543
 544 /*
 545  * Hashes an address to determine its location in the multicast table
 546  * hw - Struct containing variables accessed by shared code
 547  * mc_addr - the multicast address to hash
 548  *
 549  * atl1_hash_mc_addr
 550  *  purpose
 551  *      set hash value for a multicast address
 552  *      hash calcu processing :
 553  *          1. calcu 32bit CRC for multicast address
 554  *          2. reverse crc with MSB to LSB
 555  */
 556 u32 atl1_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr)
 557 {
 558         u32 crc32, value = 0;
 559         int i;
 560
 561         crc32 = ether_crc_le(6, mc_addr);
 562         for (i = 0; i < 32; i++)
 563                 value |= (((crc32 >> i) & 1) << (31 - i));
 564
 565         return value;
 566 }
 567
 568 /*
 569  * Sets the bit in the multicast table corresponding to the hash value.
 570  * hw - Struct containing variables accessed by shared code
 571  * hash_value - Multicast address hash value
 572  */
 573 void atl1_hash_set(struct atl1_hw *hw, u32 hash_value)
 574 {
 575         u32 hash_bit, hash_reg;
 576         u32 mta;
 577
 578         /*
 579          * The HASH Table  is a register array of 2 32-bit registers.
 580          * It is treated like an array of 64 bits.  We want to set
 581          * bit BitArray[hash_value]. So we figure out what register
 582          * the bit is in, read it, OR in the new bit, then write
 583          * back the new value.  The register is determined by the
 584          * upper 7 bits of the hash value and the bit within that
 585          * register are determined by the lower 5 bits of the value.
 586          */
 587         hash_reg = (hash_value >> 31) & 0x1;
 588         hash_bit = (hash_value >> 26) & 0x1F;
 589         mta = ioread32((hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));
 590         mta |= (1 << hash_bit);
 591         iowrite32(mta, (hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));
 592 }
 593
 594 /*
 595  * Writes a value to a PHY register
 596  * hw - Struct containing variables accessed by shared code
 597  * reg_addr - address of the PHY register to write
 598  * data - data to write to the PHY
 599  */
 600 static s32 atl1_write_phy_reg(struct atl1_hw *hw, u32 reg_addr, u16 phy_data)
 601 {
 602         int i;
 603         u32 val;
 604
 605         val = ((u32) (phy_data & MDIO_DATA_MASK)) << MDIO_DATA_SHIFT |
 606             (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT |
 607             MDIO_SUP_PREAMBLE |
 608             MDIO_START | MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT;
 609         iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);
 610         ioread32(hw->hw_addr + REG_MDIO_CTRL);
 611
 612         for (i = 0; i < MDIO_WAIT_TIMES; i++) {
 613                 udelay(2);
 614                 val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
 615                 if (!(val & (MDIO_START | MDIO_BUSY)))
 616                         break;
 617         }
 618
 619         if (!(val & (MDIO_START | MDIO_BUSY)))
 620                 return 0;
 621
 622         return ATLX_ERR_PHY;
 623 }
 624
 625 /*
 626  * Make L001's PHY out of Power Saving State (bug)
 627  * hw - Struct containing variables accessed by shared code
 628  * when power on, L001's PHY always on Power saving State
 629  * (Gigabit Link forbidden)
 630  */
 631 static s32 atl1_phy_leave_power_saving(struct atl1_hw *hw)
 632 {
 633         s32 ret;
 634         ret = atl1_write_phy_reg(hw, 29, 0x0029);
 635         if (ret)
 636                 return ret;
 637         return atl1_write_phy_reg(hw, 30, 0);
 638 }
 639
 640 /*
 641  * Force the PHY into power saving mode using vendor magic.
 642  */
 643 #ifdef CONFIG_PM
 644 static void atl1_phy_enter_power_saving(struct atl1_hw *hw)
 645 {
 646         atl1_write_phy_reg(hw, MII_DBG_ADDR, 0);
 647         atl1_write_phy_reg(hw, MII_DBG_DATA, 0x124E);
 648         atl1_write_phy_reg(hw, MII_DBG_ADDR, 2);
 649         atl1_write_phy_reg(hw, MII_DBG_DATA, 0x3000);
 650         atl1_write_phy_reg(hw, MII_DBG_ADDR, 3);
 651         atl1_write_phy_reg(hw, MII_DBG_DATA, 0);
 652
 653 }
 654 #endif
 655
 656 /*
 657  * Resets the PHY and make all config validate
 658  * hw - Struct containing variables accessed by shared code
 659  *
 660  * Sets bit 15 and 12 of the MII Control regiser (for F001 bug)
 661  */
 662 static s32 atl1_phy_reset(struct atl1_hw *hw)
 663 {
 664         struct pci_dev *pdev = hw->back->pdev;
 665         struct atl1_adapter *adapter = hw->back;
 666         s32 ret_val;
 667         u16 phy_data;
 668
 669         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
 670             hw->media_type == MEDIA_TYPE_1000M_FULL)
 671                 phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
 672         else {
 673                 switch (hw->media_type) {
 674                 case MEDIA_TYPE_100M_FULL:
 675                         phy_data =
 676                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
 677                             MII_CR_RESET;
 678                         break;
 679                 case MEDIA_TYPE_100M_HALF:
 680                         phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
 681                         break;
 682                 case MEDIA_TYPE_10M_FULL:
 683                         phy_data =
 684                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
 685                         break;
 686                 default:
 687                         /* MEDIA_TYPE_10M_HALF: */
 688                         phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
 689                         break;
 690                 }
 691         }
 692
 693         ret_val = atl1_write_phy_reg(hw, MII_BMCR, phy_data);
 694         if (ret_val) {
 695                 u32 val;
 696                 int i;
 697                 /* pcie serdes link may be down! */
 698                 if (netif_msg_hw(adapter))
 699                         dev_dbg(&pdev->dev, "pcie phy link down\n");
 700
 701                 for (i = 0; i < 25; i++) {
 702                         msleep(1);
 703                         val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
 704                         if (!(val & (MDIO_START | MDIO_BUSY)))
 705                                 break;
 706                 }
 707
 708                 if ((val & (MDIO_START | MDIO_BUSY)) != 0) {
 709                         if (netif_msg_hw(adapter))
 710                                 dev_warn(&pdev->dev,
 711                                         "pcie link down at least 25ms\n");
 712                         return ret_val;
 713                 }
 714         }
 715         return 0;
 716 }
 717
 718 /*
 719  * Configures PHY autoneg and flow control advertisement settings
 720  * hw - Struct containing variables accessed by shared code
 721  */
 722 static s32 atl1_phy_setup_autoneg_adv(struct atl1_hw *hw)
 723 {
 724         s32 ret_val;
 725         s16 mii_autoneg_adv_reg;
 726         s16 mii_1000t_ctrl_reg;
 727
 728         /* Read the MII Auto-Neg Advertisement Register (Address 4). */
 729         mii_autoneg_adv_reg = MII_AR_DEFAULT_CAP_MASK;
 730
 731         /* Read the MII 1000Base-T Control Register (Address 9). */
 732         mii_1000t_ctrl_reg = MII_ATLX_CR_1000T_DEFAULT_CAP_MASK;
 733
 734         /*
 735          * First we clear all the 10/100 mb speed bits in the Auto-Neg
 736          * Advertisement Register (Address 4) and the 1000 mb speed bits in
 737          * the  1000Base-T Control Register (Address 9).
 738          */
 739         mii_autoneg_adv_reg &= ~MII_AR_SPEED_MASK;
 740         mii_1000t_ctrl_reg &= ~MII_ATLX_CR_1000T_SPEED_MASK;
 741
 742         /*
 743          * Need to parse media_type  and set up
 744          * the appropriate PHY registers.
 745          */
 746         switch (hw->media_type) {
 747         case MEDIA_TYPE_AUTO_SENSOR:
 748                 mii_autoneg_adv_reg |= (MII_AR_10T_HD_CAPS |
 749                                         MII_AR_10T_FD_CAPS |
 750                                         MII_AR_100TX_HD_CAPS |
 751                                         MII_AR_100TX_FD_CAPS);
 752                 mii_1000t_ctrl_reg |= MII_ATLX_CR_1000T_FD_CAPS;
 753                 break;
 754
 755         case MEDIA_TYPE_1000M_FULL:
 756                 mii_1000t_ctrl_reg |= MII_ATLX_CR_1000T_FD_CAPS;
 757                 break;
 758
 759         case MEDIA_TYPE_100M_FULL:
 760                 mii_autoneg_adv_reg |= MII_AR_100TX_FD_CAPS;
 761                 break;
 762
 763         case MEDIA_TYPE_100M_HALF:
 764                 mii_autoneg_adv_reg |= MII_AR_100TX_HD_CAPS;
 765                 break;
 766
 767         case MEDIA_TYPE_10M_FULL:
 768                 mii_autoneg_adv_reg |= MII_AR_10T_FD_CAPS;
 769                 break;
 770
 771         default:
 772                 mii_autoneg_adv_reg |= MII_AR_10T_HD_CAPS;
 773                 break;
 774         }
 775
 776         /* flow control fixed to enable all */
 777         mii_autoneg_adv_reg |= (MII_AR_ASM_DIR | MII_AR_PAUSE);
 778
 779         hw->mii_autoneg_adv_reg = mii_autoneg_adv_reg;
 780         hw->mii_1000t_ctrl_reg = mii_1000t_ctrl_reg;
 781
 782         ret_val = atl1_write_phy_reg(hw, MII_ADVERTISE, mii_autoneg_adv_reg);
 783         if (ret_val)
 784                 return ret_val;
 785
 786         ret_val = atl1_write_phy_reg(hw, MII_ATLX_CR, mii_1000t_ctrl_reg);
 787         if (ret_val)
 788                 return ret_val;
 789
 790         return 0;
 791 }
 792
 793 /*
 794  * Configures link settings.
 795  * hw - Struct containing variables accessed by shared code
 796  * Assumes the hardware has previously been reset and the
 797  * transmitter and receiver are not enabled.
 798  */
 799 static s32 atl1_setup_link(struct atl1_hw *hw)
 800 {
 801         struct pci_dev *pdev = hw->back->pdev;
 802         struct atl1_adapter *adapter = hw->back;
 803         s32 ret_val;
 804
 805         /*
 806          * Options:
 807          *  PHY will advertise value(s) parsed from
 808          *  autoneg_advertised and fc
 809          *  no matter what autoneg is , We will not wait link result.
 810          */
 811         ret_val = atl1_phy_setup_autoneg_adv(hw);
 812         if (ret_val) {
 813                 if (netif_msg_link(adapter))
 814                         dev_dbg(&pdev->dev,
 815                                 "error setting up autonegotiation\n");
 816                 return ret_val;
 817         }
 818         /* SW.Reset , En-Auto-Neg if needed */
 819         ret_val = atl1_phy_reset(hw);
 820         if (ret_val) {
 821                 if (netif_msg_link(adapter))
 822                         dev_dbg(&pdev->dev, "error resetting phy\n");
 823                 return ret_val;
 824         }
 825         hw->phy_configured = true;
 826         return ret_val;
 827 }
 828
 829 static void atl1_init_flash_opcode(struct atl1_hw *hw)
 830 {
 831         if (hw->flash_vendor >= ARRAY_SIZE(flash_table))
 832                 /* Atmel */
 833                 hw->flash_vendor = 0;
 834
 835         /* Init OP table */
 836         iowrite8(flash_table[hw->flash_vendor].cmd_program,
 837                 hw->hw_addr + REG_SPI_FLASH_OP_PROGRAM);
 838         iowrite8(flash_table[hw->flash_vendor].cmd_sector_erase,
 839                 hw->hw_addr + REG_SPI_FLASH_OP_SC_ERASE);
 840         iowrite8(flash_table[hw->flash_vendor].cmd_chip_erase,
 841                 hw->hw_addr + REG_SPI_FLASH_OP_CHIP_ERASE);
 842         iowrite8(flash_table[hw->flash_vendor].cmd_rdid,
 843                 hw->hw_addr + REG_SPI_FLASH_OP_RDID);
 844         iowrite8(flash_table[hw->flash_vendor].cmd_wren,
 845                 hw->hw_addr + REG_SPI_FLASH_OP_WREN);
 846         iowrite8(flash_table[hw->flash_vendor].cmd_rdsr,
 847                 hw->hw_addr + REG_SPI_FLASH_OP_RDSR);
 848         iowrite8(flash_table[hw->flash_vendor].cmd_wrsr,
 849                 hw->hw_addr + REG_SPI_FLASH_OP_WRSR);
 850         iowrite8(flash_table[hw->flash_vendor].cmd_read,
 851                 hw->hw_addr + REG_SPI_FLASH_OP_READ);
 852 }
 853
 854 /*
 855  * Performs basic configuration of the adapter.
 856  * hw - Struct containing variables accessed by shared code
 857  * Assumes that the controller has previously been reset and is in a
 858  * post-reset uninitialized state. Initializes multicast table,
 859  * and  Calls routines to setup link
 860  * Leaves the transmit and receive units disabled and uninitialized.
 861  */
 862 static s32 atl1_init_hw(struct atl1_hw *hw)
 863 {
 864         u32 ret_val = 0;
 865
 866         /* Zero out the Multicast HASH table */
 867         iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);
 868         /* clear the old settings from the multicast hash table */
 869         iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));
 870
 871         atl1_init_flash_opcode(hw);
 872
 873         if (!hw->phy_configured) {
 874                 /* enable GPHY LinkChange Interrrupt */
 875                 ret_val = atl1_write_phy_reg(hw, 18, 0xC00);
 876                 if (ret_val)
 877                         return ret_val;
 878                 /* make PHY out of power-saving state */
 879                 ret_val = atl1_phy_leave_power_saving(hw);
 880                 if (ret_val)
 881                         return ret_val;
 882                 /* Call a subroutine to configure the link */
 883                 ret_val = atl1_setup_link(hw);
 884         }
 885         return ret_val;
 886 }
 887
 888 /*
 889  * Detects the current speed and duplex settings of the hardware.
 890  * hw - Struct containing variables accessed by shared code
 891  * speed - Speed of the connection
 892  * duplex - Duplex setting of the connection
 893  */
 894 static s32 atl1_get_speed_and_duplex(struct atl1_hw *hw, u16 *speed, u16 *duplex)
 895 {
 896         struct pci_dev *pdev = hw->back->pdev;
 897         struct atl1_adapter *adapter = hw->back;
 898         s32 ret_val;
 899         u16 phy_data;
 900
 901         /* ; --- Read   PHY Specific Status Register (17) */
 902         ret_val = atl1_read_phy_reg(hw, MII_ATLX_PSSR, &phy_data);
 903         if (ret_val)
 904                 return ret_val;
 905
 906         if (!(phy_data & MII_ATLX_PSSR_SPD_DPLX_RESOLVED))
 907                 return ATLX_ERR_PHY_RES;
 908
 909         switch (phy_data & MII_ATLX_PSSR_SPEED) {
 910         case MII_ATLX_PSSR_1000MBS:
 911                 *speed = SPEED_1000;
 912                 break;
 913         case MII_ATLX_PSSR_100MBS:
 914                 *speed = SPEED_100;
 915                 break;
 916         case MII_ATLX_PSSR_10MBS:
 917                 *speed = SPEED_10;
 918                 break;
 919         default:
 920                 if (netif_msg_hw(adapter))
 921                         dev_dbg(&pdev->dev, "error getting speed\n");
 922                 return ATLX_ERR_PHY_SPEED;
 923                 break;
 924         }
 925         if (phy_data & MII_ATLX_PSSR_DPLX)
 926                 *duplex = FULL_DUPLEX;
 927         else
 928                 *duplex = HALF_DUPLEX;
 929
 930         return 0;
 931 }
 932
 933 void atl1_set_mac_addr(struct atl1_hw *hw)
 934 {
 935         u32 value;
 936         /*
 937          * 00-0B-6A-F6-00-DC
 938          * 0:  6AF600DC   1: 000B
 939          * low dword
 940          */
 941         value = (((u32) hw->mac_addr[2]) << 24) |
 942             (((u32) hw->mac_addr[3]) << 16) |
 943             (((u32) hw->mac_addr[4]) << 8) | (((u32) hw->mac_addr[5]));
 944         iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
 945         /* high dword */
 946         value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
 947         iowrite32(value, (hw->hw_addr + REG_MAC_STA_ADDR) + (1 << 2));
 948 }
 949
 950 /*
 951  * atl1_sw_init - Initialize general software structures (struct atl1_adapter)
 952  * @adapter: board private structure to initialize
 953  *
 954  * atl1_sw_init initializes the Adapter private data structure.
 955  * Fields are initialized based on PCI device information and
 956  * OS network device settings (MTU size).
 957  */
 958 static int __devinit atl1_sw_init(struct atl1_adapter *adapter)
 959 {
 960         struct atl1_hw *hw = &adapter->hw;
 961         struct net_device *netdev = adapter->netdev;
 962
 963         hw->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
 964         hw->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
 965
 966         adapter->wol = 0;
 967         adapter->rx_buffer_len = (hw->max_frame_size + 7) & ~7;
 968         adapter->ict = 50000;           /* 100ms */
 969         adapter->link_speed = SPEED_0;  /* hardware init */
 970         adapter->link_duplex = FULL_DUPLEX;
 971
 972         hw->phy_configured = false;
 973         hw->preamble_len = 7;
 974         hw->ipgt = 0x60;
 975         hw->min_ifg = 0x50;
 976         hw->ipgr1 = 0x40;
 977         hw->ipgr2 = 0x60;
 978         hw->max_retry = 0xf;
 979         hw->lcol = 0x37;
 980         hw->jam_ipg = 7;
 981         hw->rfd_burst = 8;
 982         hw->rrd_burst = 8;
 983         hw->rfd_fetch_gap = 1;
 984         hw->rx_jumbo_th = adapter->rx_buffer_len / 8;
 985         hw->rx_jumbo_lkah = 1;
 986         hw->rrd_ret_timer = 16;
 987         hw->tpd_burst = 4;
 988         hw->tpd_fetch_th = 16;
 989         hw->txf_burst = 0x100;
 990         hw->tx_jumbo_task_th = (hw->max_frame_size + 7) >> 3;
 991         hw->tpd_fetch_gap = 1;
 992         hw->rcb_value = atl1_rcb_64;
 993         hw->dma_ord = atl1_dma_ord_enh;
 994         hw->dmar_block = atl1_dma_req_256;
 995         hw->dmaw_block = atl1_dma_req_256;
 996         hw->cmb_rrd = 4;
 997         hw->cmb_tpd = 4;
 998         hw->cmb_rx_timer = 1;   /* about 2us */
 999         hw->cmb_tx_timer = 1;   /* about 2us */
1000         hw->smb_timer = 100000; /* about 200ms */
1001
1002         spin_lock_init(&adapter->lock);
1003         spin_lock_init(&adapter->mb_lock);
1004
1005         return 0;
1006 }
1007
1008 static int mdio_read(struct net_device *netdev, int phy_id, int reg_num)
1009 {
1010         struct atl1_adapter *adapter = netdev_priv(netdev);
1011         u16 result;
1012
1013         atl1_read_phy_reg(&adapter->hw, reg_num & 0x1f, &result);
1014
1015         return result;
1016 }
1017
1018 static void mdio_write(struct net_device *netdev, int phy_id, int reg_num,
1019         int val)
1020 {
1021         struct atl1_adapter *adapter = netdev_priv(netdev);
1022
1023         atl1_write_phy_reg(&adapter->hw, reg_num, val);
1024 }
1025
1026 /*
1027  * atl1_mii_ioctl -
1028  * @netdev:
1029  * @ifreq:
1030  * @cmd:
1031  */
1032 static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1033 {
1034         struct atl1_adapter *adapter = netdev_priv(netdev);
1035         unsigned long flags;
1036         int retval;
1037
1038         if (!netif_running(netdev))
1039                 return -EINVAL;
1040
1041         spin_lock_irqsave(&adapter->lock, flags);
1042         retval = generic_mii_ioctl(&adapter->mii, if_mii(ifr), cmd, NULL);
1043         spin_unlock_irqrestore(&adapter->lock, flags);
1044
1045         return retval;
1046 }
1047
1048 /*
1049  * atl1_setup_mem_resources - allocate Tx / RX descriptor resources
1050  * @adapter: board private structure
1051  *
1052  * Return 0 on success, negative on failure
1053  */
1054 static s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
1055 {
1056         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1057         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1058         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1059         struct atl1_ring_header *ring_header = &adapter->ring_header;
1060         struct pci_dev *pdev = adapter->pdev;
1061         int size;
1062         u8 offset = 0;
1063
1064         size = sizeof(struct atl1_buffer) * (tpd_ring->count + rfd_ring->count);
1065         tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
1066         if (unlikely(!tpd_ring->buffer_info)) {
1067                 if (netif_msg_drv(adapter))
1068                         dev_err(&pdev->dev, "kzalloc failed , size = D%d\n",
1069                                 size);
1070                 goto err_nomem;
1071         }
1072         rfd_ring->buffer_info =
1073                 (struct atl1_buffer *)(tpd_ring->buffer_info + tpd_ring->count);
1074
1075         /*
1076          * real ring DMA buffer
1077          * each ring/block may need up to 8 bytes for alignment, hence the
1078          * additional 40 bytes tacked onto the end.
1079          */
1080         ring_header->size = size =
1081                 sizeof(struct tx_packet_desc) * tpd_ring->count
1082                 + sizeof(struct rx_free_desc) * rfd_ring->count
1083                 + sizeof(struct rx_return_desc) * rrd_ring->count
1084                 + sizeof(struct coals_msg_block)
1085                 + sizeof(struct stats_msg_block)
1086                 + 40;
1087
1088         ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
1089                 &ring_header->dma);
1090         if (unlikely(!ring_header->desc)) {
1091                 if (netif_msg_drv(adapter))
1092                         dev_err(&pdev->dev, "pci_alloc_consistent failed\n");
1093                 goto err_nomem;
1094         }
1095
1096         memset(ring_header->desc, 0, ring_header->size);
1097
1098         /* init TPD ring */
1099         tpd_ring->dma = ring_header->dma;
1100         offset = (tpd_ring->dma & 0x7) ? (8 - (ring_header->dma & 0x7)) : 0;
1101         tpd_ring->dma += offset;
1102         tpd_ring->desc = (u8 *) ring_header->desc + offset;
1103         tpd_ring->size = sizeof(struct tx_packet_desc) * tpd_ring->count;
1104
1105         /* init RFD ring */
1106         rfd_ring->dma = tpd_ring->dma + tpd_ring->size;
1107         offset = (rfd_ring->dma & 0x7) ? (8 - (rfd_ring->dma & 0x7)) : 0;
1108         rfd_ring->dma += offset;
1109         rfd_ring->desc = (u8 *) tpd_ring->desc + (tpd_ring->size + offset);
1110         rfd_ring->size = sizeof(struct rx_free_desc) * rfd_ring->count;
1111
1112
1113         /* init RRD ring */
1114         rrd_ring->dma = rfd_ring->dma + rfd_ring->size;
1115         offset = (rrd_ring->dma & 0x7) ? (8 - (rrd_ring->dma & 0x7)) : 0;
1116         rrd_ring->dma += offset;
1117         rrd_ring->desc = (u8 *) rfd_ring->desc + (rfd_ring->size + offset);
1118         rrd_ring->size = sizeof(struct rx_return_desc) * rrd_ring->count;
1119
1120
1121         /* init CMB */
1122         adapter->cmb.dma = rrd_ring->dma + rrd_ring->size;
1123         offset = (adapter->cmb.dma & 0x7) ? (8 - (adapter->cmb.dma & 0x7)) : 0;
1124         adapter->cmb.dma += offset;
1125         adapter->cmb.cmb = (struct coals_msg_block *)
1126                 ((u8 *) rrd_ring->desc + (rrd_ring->size + offset));
1127
1128         /* init SMB */
1129         adapter->smb.dma = adapter->cmb.dma + sizeof(struct coals_msg_block);
1130         offset = (adapter->smb.dma & 0x7) ? (8 - (adapter->smb.dma & 0x7)) : 0;
1131         adapter->smb.dma += offset;
1132         adapter->smb.smb = (struct stats_msg_block *)
1133                 ((u8 *) adapter->cmb.cmb +
1134                 (sizeof(struct coals_msg_block) + offset));
1135
1136         return 0;
1137
1138 err_nomem:
1139         kfree(tpd_ring->buffer_info);
1140         return -ENOMEM;
1141 }
1142
1143 static void atl1_init_ring_ptrs(struct atl1_adapter *adapter)
1144 {
1145         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1146         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1147         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1148
1149         atomic_set(&tpd_ring->next_to_use, 0);
1150         atomic_set(&tpd_ring->next_to_clean, 0);
1151
1152         rfd_ring->next_to_clean = 0;
1153         atomic_set(&rfd_ring->next_to_use, 0);
1154
1155         rrd_ring->next_to_use = 0;
1156         atomic_set(&rrd_ring->next_to_clean, 0);
1157 }
1158
1159 /*
1160  * atl1_clean_rx_ring - Free RFD Buffers
1161  * @adapter: board private structure
1162  */
1163 static void atl1_clean_rx_ring(struct atl1_adapter *adapter)
1164 {
1165         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1166         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1167         struct atl1_buffer *buffer_info;
1168         struct pci_dev *pdev = adapter->pdev;
1169         unsigned long size;
1170         unsigned int i;
1171
1172         /* Free all the Rx ring sk_buffs */
1173         for (i = 0; i < rfd_ring->count; i++) {
1174                 buffer_info = &rfd_ring->buffer_info[i];
1175                 if (buffer_info->dma) {
1176                         pci_unmap_page(pdev, buffer_info->dma,
1177                                 buffer_info->length, PCI_DMA_FROMDEVICE);
1178                         buffer_info->dma = 0;
1179                 }
1180                 if (buffer_info->skb) {
1181                         dev_kfree_skb(buffer_info->skb);
1182                         buffer_info->skb = NULL;
1183                 }
1184         }
1185
1186         size = sizeof(struct atl1_buffer) * rfd_ring->count;
1187         memset(rfd_ring->buffer_info, 0, size);
1188
1189         /* Zero out the descriptor ring */
1190         memset(rfd_ring->desc, 0, rfd_ring->size);
1191
1192         rfd_ring->next_to_clean = 0;
1193         atomic_set(&rfd_ring->next_to_use, 0);
1194
1195         rrd_ring->next_to_use = 0;
1196         atomic_set(&rrd_ring->next_to_clean, 0);
1197 }
1198
1199 /*
1200  * atl1_clean_tx_ring - Free Tx Buffers
1201  * @adapter: board private structure
1202  */
1203 static void atl1_clean_tx_ring(struct atl1_adapter *adapter)
1204 {
1205         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1206         struct atl1_buffer *buffer_info;
1207         struct pci_dev *pdev = adapter->pdev;
1208         unsigned long size;
1209         unsigned int i;
1210
1211         /* Free all the Tx ring sk_buffs */
1212         for (i = 0; i < tpd_ring->count; i++) {
1213                 buffer_info = &tpd_ring->buffer_info[i];
1214                 if (buffer_info->dma) {
1215                         pci_unmap_page(pdev, buffer_info->dma,
1216                                 buffer_info->length, PCI_DMA_TODEVICE);
1217                         buffer_info->dma = 0;
1218                 }
1219         }
1220
1221         for (i = 0; i < tpd_ring->count; i++) {
1222                 buffer_info = &tpd_ring->buffer_info[i];
1223                 if (buffer_info->skb) {
1224                         dev_kfree_skb_any(buffer_info->skb);
1225                         buffer_info->skb = NULL;
1226                 }
1227         }
1228
1229         size = sizeof(struct atl1_buffer) * tpd_ring->count;
1230         memset(tpd_ring->buffer_info, 0, size);
1231
1232         /* Zero out the descriptor ring */
1233         memset(tpd_ring->desc, 0, tpd_ring->size);
1234
1235         atomic_set(&tpd_ring->next_to_use, 0);
1236         atomic_set(&tpd_ring->next_to_clean, 0);
1237 }
1238
1239 /*
1240  * atl1_free_ring_resources - Free Tx / RX descriptor Resources
1241  * @adapter: board private structure
1242  *
1243  * Free all transmit software resources
1244  */
1245 static void atl1_free_ring_resources(struct atl1_adapter *adapter)
1246 {
1247         struct pci_dev *pdev = adapter->pdev;
1248         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1249         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1250         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1251         struct atl1_ring_header *ring_header = &adapter->ring_header;
1252
1253         atl1_clean_tx_ring(adapter);
1254         atl1_clean_rx_ring(adapter);
1255
1256         kfree(tpd_ring->buffer_info);
1257         pci_free_consistent(pdev, ring_header->size, ring_header->desc,
1258                 ring_header->dma);
1259
1260         tpd_ring->buffer_info = NULL;
1261         tpd_ring->desc = NULL;
1262         tpd_ring->dma = 0;
1263
1264         rfd_ring->buffer_info = NULL;
1265         rfd_ring->desc = NULL;
1266         rfd_ring->dma = 0;
1267
1268         rrd_ring->desc = NULL;
1269         rrd_ring->dma = 0;
1270 }
1271
1272 static void atl1_setup_mac_ctrl(struct atl1_adapter *adapter)
1273 {
1274         u32 value;
1275         struct atl1_hw *hw = &adapter->hw;
1276         struct net_device *netdev = adapter->netdev;
1277         /* Config MAC CTRL Register */
1278         value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
1279         /* duplex */
1280         if (FULL_DUPLEX == adapter->link_duplex)
1281                 value |= MAC_CTRL_DUPLX;
1282         /* speed */
1283         value |= ((u32) ((SPEED_1000 == adapter->link_speed) ?
1284                          MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
1285                   MAC_CTRL_SPEED_SHIFT);
1286         /* flow control */
1287         value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1288         /* PAD & CRC */
1289         value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1290         /* preamble length */
1291         value |= (((u32) adapter->hw.preamble_len
1292                    & MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1293         /* vlan */
1294         if (adapter->vlgrp)
1295                 value |= MAC_CTRL_RMV_VLAN;
1296         /* rx checksum
1297            if (adapter->rx_csum)
1298            value |= MAC_CTRL_RX_CHKSUM_EN;
1299          */
1300         /* filter mode */
1301         value |= MAC_CTRL_BC_EN;
1302         if (netdev->flags & IFF_PROMISC)
1303                 value |= MAC_CTRL_PROMIS_EN;
1304         else if (netdev->flags & IFF_ALLMULTI)
1305                 value |= MAC_CTRL_MC_ALL_EN;
1306         /* value |= MAC_CTRL_LOOPBACK; */
1307         iowrite32(value, hw->hw_addr + REG_MAC_CTRL);
1308 }
1309
1310 static u32 atl1_check_link(struct atl1_adapter *adapter)
1311 {
1312         struct atl1_hw *hw = &adapter->hw;
1313         struct net_device *netdev = adapter->netdev;
1314         u32 ret_val;
1315         u16 speed, duplex, phy_data;
1316         int reconfig = 0;
1317
1318         /* MII_BMSR must read twice */
1319         atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
1320         atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
1321         if (!(phy_data & BMSR_LSTATUS)) {
1322                 /* link down */
1323                 if (netif_carrier_ok(netdev)) {
1324                         /* old link state: Up */
1325                         if (netif_msg_link(adapter))
1326                                 dev_info(&adapter->pdev->dev, "link is down\n");
1327                         adapter->link_speed = SPEED_0;
1328                         netif_carrier_off(netdev);
1329                         netif_stop_queue(netdev);
1330                 }
1331                 return 0;
1332         }
1333
1334         /* Link Up */
1335         ret_val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
1336         if (ret_val)
1337                 return ret_val;
1338
1339         switch (hw->media_type) {
1340         case MEDIA_TYPE_1000M_FULL:
1341                 if (speed != SPEED_1000 || duplex != FULL_DUPLEX)
1342                         reconfig = 1;
1343                 break;
1344         case MEDIA_TYPE_100M_FULL:
1345                 if (speed != SPEED_100 || duplex != FULL_DUPLEX)
1346                         reconfig = 1;
1347                 break;
1348         case MEDIA_TYPE_100M_HALF:
1349                 if (speed != SPEED_100 || duplex != HALF_DUPLEX)
1350                         reconfig = 1;
1351                 break;
1352         case MEDIA_TYPE_10M_FULL:
1353                 if (speed != SPEED_10 || duplex != FULL_DUPLEX)
1354                         reconfig = 1;
1355                 break;
1356         case MEDIA_TYPE_10M_HALF:
1357                 if (speed != SPEED_10 || duplex != HALF_DUPLEX)
1358                         reconfig = 1;
1359                 break;
1360         }
1361
1362         /* link result is our setting */
1363         if (!reconfig) {
1364                 if (adapter->link_speed != speed
1365                     || adapter->link_duplex != duplex) {
1366                         adapter->link_speed = speed;
1367                         adapter->link_duplex = duplex;
1368                         atl1_setup_mac_ctrl(adapter);
1369                         if (netif_msg_link(adapter))
1370                                 dev_info(&adapter->pdev->dev,
1371                                         "%s link is up %d Mbps %s\n",
1372                                         netdev->name, adapter->link_speed,
1373                                         adapter->link_duplex == FULL_DUPLEX ?
1374                                         "full duplex" : "half duplex");
1375                 }
1376                 if (!netif_carrier_ok(netdev)) {
1377                         /* Link down -> Up */
1378                         netif_carrier_on(netdev);
1379                         netif_wake_queue(netdev);
1380                 }
1381                 return 0;
1382         }
1383
1384         /* change original link status */
1385         if (netif_carrier_ok(netdev)) {
1386                 adapter->link_speed = SPEED_0;
1387                 netif_carrier_off(netdev);
1388                 netif_stop_queue(netdev);
1389         }
1390
1391         if (hw->media_type != MEDIA_TYPE_AUTO_SENSOR &&
1392             hw->media_type != MEDIA_TYPE_1000M_FULL) {
1393                 switch (hw->media_type) {
1394                 case MEDIA_TYPE_100M_FULL:
1395                         phy_data = MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
1396                                    MII_CR_RESET;
1397                         break;
1398                 case MEDIA_TYPE_100M_HALF:
1399                         phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
1400                         break;
1401                 case MEDIA_TYPE_10M_FULL:
1402                         phy_data =
1403                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
1404                         break;
1405                 default:
1406                         /* MEDIA_TYPE_10M_HALF: */
1407                         phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
1408                         break;
1409                 }
1410                 atl1_write_phy_reg(hw, MII_BMCR, phy_data);
1411                 return 0;
1412         }
1413
1414         /* auto-neg, insert timer to re-config phy */
1415         if (!adapter->phy_timer_pending) {
1416                 adapter->phy_timer_pending = true;
1417                 mod_timer(&adapter->phy_config_timer, jiffies + 3 * HZ);
1418         }
1419
1420         return 0;
1421 }
1422
1423 static void set_flow_ctrl_old(struct atl1_adapter *adapter)
1424 {
1425         u32 hi, lo, value;
1426
1427         /* RFD Flow Control */
1428         value = adapter->rfd_ring.count;
1429         hi = value / 16;
1430         if (hi < 2)
1431                 hi = 2;
1432         lo = value * 7 / 8;
1433
1434         value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
1435                 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
1436         iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
1437
1438         /* RRD Flow Control */
1439         value = adapter->rrd_ring.count;
1440         lo = value / 16;
1441         hi = value * 7 / 8;
1442         if (lo < 2)
1443                 lo = 2;
1444         value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
1445                 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
1446         iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
1447 }
1448
1449 static void set_flow_ctrl_new(struct atl1_hw *hw)
1450 {
1451         u32 hi, lo, value;
1452
1453         /* RXF Flow Control */
1454         value = ioread32(hw->hw_addr + REG_SRAM_RXF_LEN);
1455         lo = value / 16;
1456         if (lo < 192)
1457                 lo = 192;
1458         hi = value * 7 / 8;
1459         if (hi < lo)
1460                 hi = lo + 16;
1461         value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
1462                 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
1463         iowrite32(value, hw->hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
1464
1465         /* RRD Flow Control */
1466         value = ioread32(hw->hw_addr + REG_SRAM_RRD_LEN);
1467         lo = value / 8;
1468         hi = value * 7 / 8;
1469         if (lo < 2)
1470                 lo = 2;
1471         if (hi < lo)
1472                 hi = lo + 3;
1473         value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
1474                 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
1475         iowrite32(value, hw->hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
1476 }
1477
1478 /*
1479  * atl1_configure - Configure Transmit&Receive Unit after Reset
1480  * @adapter: board private structure
1481  *
1482  * Configure the Tx /Rx unit of the MAC after a reset.
1483  */
1484 static u32 atl1_configure(struct atl1_adapter *adapter)
1485 {
1486         struct atl1_hw *hw = &adapter->hw;
1487         u32 value;
1488
1489         /* clear interrupt status */
1490         iowrite32(0xffffffff, adapter->hw.hw_addr + REG_ISR);
1491
1492         /* set MAC Address */
1493         value = (((u32) hw->mac_addr[2]) << 24) |
1494                 (((u32) hw->mac_addr[3]) << 16) |
1495                 (((u32) hw->mac_addr[4]) << 8) |
1496                 (((u32) hw->mac_addr[5]));
1497         iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
1498         value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
1499         iowrite32(value, hw->hw_addr + (REG_MAC_STA_ADDR + 4));
1500
1501         /* tx / rx ring */
1502
1503         /* HI base address */
1504         iowrite32((u32) ((adapter->tpd_ring.dma & 0xffffffff00000000ULL) >> 32),
1505                 hw->hw_addr + REG_DESC_BASE_ADDR_HI);
1506         /* LO base address */
1507         iowrite32((u32) (adapter->rfd_ring.dma & 0x00000000ffffffffULL),
1508                 hw->hw_addr + REG_DESC_RFD_ADDR_LO);
1509         iowrite32((u32) (adapter->rrd_ring.dma & 0x00000000ffffffffULL),
1510                 hw->hw_addr + REG_DESC_RRD_ADDR_LO);
1511         iowrite32((u32) (adapter->tpd_ring.dma & 0x00000000ffffffffULL),
1512                 hw->hw_addr + REG_DESC_TPD_ADDR_LO);
1513         iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL),
1514                 hw->hw_addr + REG_DESC_CMB_ADDR_LO);
1515         iowrite32((u32) (adapter->smb.dma & 0x00000000ffffffffULL),
1516                 hw->hw_addr + REG_DESC_SMB_ADDR_LO);
1517
1518         /* element count */
1519         value = adapter->rrd_ring.count;
1520         value <<= 16;
1521         value += adapter->rfd_ring.count;
1522         iowrite32(value, hw->hw_addr + REG_DESC_RFD_RRD_RING_SIZE);
1523         iowrite32(adapter->tpd_ring.count, hw->hw_addr +
1524                 REG_DESC_TPD_RING_SIZE);
1525
1526         /* Load Ptr */
1527         iowrite32(1, hw->hw_addr + REG_LOAD_PTR);
1528
1529         /* config Mailbox */
1530         value = ((atomic_read(&adapter->tpd_ring.next_to_use)
1531                   & MB_TPD_PROD_INDX_MASK) << MB_TPD_PROD_INDX_SHIFT) |
1532                 ((atomic_read(&adapter->rrd_ring.next_to_clean)
1533                 & MB_RRD_CONS_INDX_MASK) << MB_RRD_CONS_INDX_SHIFT) |
1534                 ((atomic_read(&adapter->rfd_ring.next_to_use)
1535                 & MB_RFD_PROD_INDX_MASK) << MB_RFD_PROD_INDX_SHIFT);
1536         iowrite32(value, hw->hw_addr + REG_MAILBOX);
1537
1538         /* config IPG/IFG */
1539         value = (((u32) hw->ipgt & MAC_IPG_IFG_IPGT_MASK)
1540                  << MAC_IPG_IFG_IPGT_SHIFT) |
1541                 (((u32) hw->min_ifg & MAC_IPG_IFG_MIFG_MASK)
1542                 << MAC_IPG_IFG_MIFG_SHIFT) |
1543                 (((u32) hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK)
1544                 << MAC_IPG_IFG_IPGR1_SHIFT) |
1545                 (((u32) hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK)
1546                 << MAC_IPG_IFG_IPGR2_SHIFT);
1547         iowrite32(value, hw->hw_addr + REG_MAC_IPG_IFG);
1548
1549         /* config  Half-Duplex Control */
1550         value = ((u32) hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) |
1551                 (((u32) hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK)
1552                 << MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) |
1553                 MAC_HALF_DUPLX_CTRL_EXC_DEF_EN |
1554                 (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) |
1555                 (((u32) hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK)
1556                 << MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT);
1557         iowrite32(value, hw->hw_addr + REG_MAC_HALF_DUPLX_CTRL);
1558
1559         /* set Interrupt Moderator Timer */
1560         iowrite16(adapter->imt, hw->hw_addr + REG_IRQ_MODU_TIMER_INIT);
1561         iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL);
1562
1563         /* set Interrupt Clear Timer */
1564         iowrite16(adapter->ict, hw->hw_addr + REG_CMBDISDMA_TIMER);
1565
1566         /* set max frame size hw will accept */
1567         iowrite32(hw->max_frame_size, hw->hw_addr + REG_MTU);
1568
1569         /* jumbo size & rrd retirement timer */
1570         value = (((u32) hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK)
1571                  << RXQ_JMBOSZ_TH_SHIFT) |
1572                 (((u32) hw->rx_jumbo_lkah & RXQ_JMBO_LKAH_MASK)
1573                 << RXQ_JMBO_LKAH_SHIFT) |
1574                 (((u32) hw->rrd_ret_timer & RXQ_RRD_TIMER_MASK)
1575                 << RXQ_RRD_TIMER_SHIFT);
1576         iowrite32(value, hw->hw_addr + REG_RXQ_JMBOSZ_RRDTIM);
1577
1578         /* Flow Control */
1579         switch (hw->dev_rev) {
1580         case 0x8001:
1581         case 0x9001:
1582         case 0x9002:
1583         case 0x9003:
1584                 set_flow_ctrl_old(adapter);
1585                 break;
1586         default:
1587                 set_flow_ctrl_new(hw);
1588                 break;
1589         }
1590
1591         /* config TXQ */
1592         value = (((u32) hw->tpd_burst & TXQ_CTRL_TPD_BURST_NUM_MASK)
1593                  << TXQ_CTRL_TPD_BURST_NUM_SHIFT) |
1594                 (((u32) hw->txf_burst & TXQ_CTRL_TXF_BURST_NUM_MASK)
1595                 << TXQ_CTRL_TXF_BURST_NUM_SHIFT) |
1596                 (((u32) hw->tpd_fetch_th & TXQ_CTRL_TPD_FETCH_TH_MASK)
1597                 << TXQ_CTRL_TPD_FETCH_TH_SHIFT) | TXQ_CTRL_ENH_MODE |
1598                 TXQ_CTRL_EN;
1599         iowrite32(value, hw->hw_addr + REG_TXQ_CTRL);
1600
1601         /* min tpd fetch gap & tx jumbo packet size threshold for taskoffload */
1602         value = (((u32) hw->tx_jumbo_task_th & TX_JUMBO_TASK_TH_MASK)
1603                 << TX_JUMBO_TASK_TH_SHIFT) |
1604                 (((u32) hw->tpd_fetch_gap & TX_TPD_MIN_IPG_MASK)
1605                 << TX_TPD_MIN_IPG_SHIFT);
1606         iowrite32(value, hw->hw_addr + REG_TX_JUMBO_TASK_TH_TPD_IPG);
1607
1608         /* config RXQ */
1609         value = (((u32) hw->rfd_burst & RXQ_CTRL_RFD_BURST_NUM_MASK)
1610                 << RXQ_CTRL_RFD_BURST_NUM_SHIFT) |
1611                 (((u32) hw->rrd_burst & RXQ_CTRL_RRD_BURST_THRESH_MASK)
1612                 << RXQ_CTRL_RRD_BURST_THRESH_SHIFT) |
1613                 (((u32) hw->rfd_fetch_gap & RXQ_CTRL_RFD_PREF_MIN_IPG_MASK)
1614                 << RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT) | RXQ_CTRL_CUT_THRU_EN |
1615                 RXQ_CTRL_EN;
1616         iowrite32(value, hw->hw_addr + REG_RXQ_CTRL);
1617
1618         /* config DMA Engine */
1619         value = ((((u32) hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1620                 << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
1621                 ((((u32) hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1622                 << DMA_CTRL_DMAW_BURST_LEN_SHIFT) | DMA_CTRL_DMAR_EN |
1623                 DMA_CTRL_DMAW_EN;
1624         value |= (u32) hw->dma_ord;
1625         if (atl1_rcb_128 == hw->rcb_value)
1626                 value |= DMA_CTRL_RCB_VALUE;
1627         iowrite32(value, hw->hw_addr + REG_DMA_CTRL);
1628
1629         /* config CMB / SMB */
1630         value = (hw->cmb_tpd > adapter->tpd_ring.count) ?
1631                 hw->cmb_tpd : adapter->tpd_ring.count;
1632         value <<= 16;
1633         value |= hw->cmb_rrd;
1634         iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TH);
1635         value = hw->cmb_rx_timer | ((u32) hw->cmb_tx_timer << 16);
1636         iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TIMER);
1637         iowrite32(hw->smb_timer, hw->hw_addr + REG_SMB_TIMER);
1638
1639         /* --- enable CMB / SMB */
1640         value = CSMB_CTRL_CMB_EN | CSMB_CTRL_SMB_EN;
1641         iowrite32(value, hw->hw_addr + REG_CSMB_CTRL);
1642
1643         value = ioread32(adapter->hw.hw_addr + REG_ISR);
1644         if (unlikely((value & ISR_PHY_LINKDOWN) != 0))
1645                 value = 1;      /* config failed */
1646         else
1647                 value = 0;
1648
1649         /* clear all interrupt status */
1650         iowrite32(0x3fffffff, adapter->hw.hw_addr + REG_ISR);
1651         iowrite32(0, adapter->hw.hw_addr + REG_ISR);
1652         return value;
1653 }
1654
1655 /*
1656  * atl1_pcie_patch - Patch for PCIE module
1657  */
1658 static void atl1_pcie_patch(struct atl1_adapter *adapter)
1659 {
1660         u32 value;
1661
1662         /* much vendor magic here */
1663         value = 0x6500;
1664         iowrite32(value, adapter->hw.hw_addr + 0x12FC);
1665         /* pcie flow control mode change */
1666         value = ioread32(adapter->hw.hw_addr + 0x1008);
1667         value |= 0x8000;
1668         iowrite32(value, adapter->hw.hw_addr + 0x1008);
1669 }
1670
1671 /*
1672  * When ACPI resume on some VIA MotherBoard, the Interrupt Disable bit/0x400
1673  * on PCI Command register is disable.
1674  * The function enable this bit.
1675  * Brackett, 2006/03/15
1676  */
1677 static void atl1_via_workaround(struct atl1_adapter *adapter)
1678 {
1679         unsigned long value;
1680
1681         value = ioread16(adapter->hw.hw_addr + PCI_COMMAND);
1682         if (value & PCI_COMMAND_INTX_DISABLE)
1683                 value &= ~PCI_COMMAND_INTX_DISABLE;
1684         iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND);
1685 }
1686
1687 static void atl1_inc_smb(struct atl1_adapter *adapter)
1688 {
1689         struct stats_msg_block *smb = adapter->smb.smb;
1690
1691         /* Fill out the OS statistics structure */
1692         adapter->soft_stats.rx_packets += smb->rx_ok;
1693         adapter->soft_stats.tx_packets += smb->tx_ok;
1694         adapter->soft_stats.rx_bytes += smb->rx_byte_cnt;
1695         adapter->soft_stats.tx_bytes += smb->tx_byte_cnt;
1696         adapter->soft_stats.multicast += smb->rx_mcast;
1697         adapter->soft_stats.collisions += (smb->tx_1_col + smb->tx_2_col * 2 +
1698                 smb->tx_late_col + smb->tx_abort_col * adapter->hw.max_retry);
1699
1700         /* Rx Errors */
1701         adapter->soft_stats.rx_errors += (smb->rx_frag + smb->rx_fcs_err +
1702                 smb->rx_len_err + smb->rx_sz_ov + smb->rx_rxf_ov +
1703                 smb->rx_rrd_ov + smb->rx_align_err);
1704         adapter->soft_stats.rx_fifo_errors += smb->rx_rxf_ov;
1705         adapter->soft_stats.rx_length_errors += smb->rx_len_err;
1706         adapter->soft_stats.rx_crc_errors += smb->rx_fcs_err;
1707         adapter->soft_stats.rx_frame_errors += smb->rx_align_err;
1708         adapter->soft_stats.rx_missed_errors += (smb->rx_rrd_ov +
1709                 smb->rx_rxf_ov);
1710
1711         adapter->soft_stats.rx_pause += smb->rx_pause;
1712         adapter->soft_stats.rx_rrd_ov += smb->rx_rrd_ov;
1713         adapter->soft_stats.rx_trunc += smb->rx_sz_ov;
1714
1715         /* Tx Errors */
1716         adapter->soft_stats.tx_errors += (smb->tx_late_col +
1717                 smb->tx_abort_col + smb->tx_underrun + smb->tx_trunc);
1718         adapter->soft_stats.tx_fifo_errors += smb->tx_underrun;
1719         adapter->soft_stats.tx_aborted_errors += smb->tx_abort_col;
1720         adapter->soft_stats.tx_window_errors += smb->tx_late_col;
1721
1722         adapter->soft_stats.excecol += smb->tx_abort_col;
1723         adapter->soft_stats.deffer += smb->tx_defer;
1724         adapter->soft_stats.scc += smb->tx_1_col;
1725         adapter->soft_stats.mcc += smb->tx_2_col;
1726         adapter->soft_stats.latecol += smb->tx_late_col;
1727         adapter->soft_stats.tx_underun += smb->tx_underrun;
1728         adapter->soft_stats.tx_trunc += smb->tx_trunc;
1729         adapter->soft_stats.tx_pause += smb->tx_pause;
1730
1731         adapter->net_stats.rx_packets = adapter->soft_stats.rx_packets;
1732         adapter->net_stats.tx_packets = adapter->soft_stats.tx_packets;
1733         adapter->net_stats.rx_bytes = adapter->soft_stats.rx_bytes;
1734         adapter->net_stats.tx_bytes = adapter->soft_stats.tx_bytes;
1735         adapter->net_stats.multicast = adapter->soft_stats.multicast;
1736         adapter->net_stats.collisions = adapter->soft_stats.collisions;
1737         adapter->net_stats.rx_errors = adapter->soft_stats.rx_errors;
1738         adapter->net_stats.rx_over_errors =
1739                 adapter->soft_stats.rx_missed_errors;
1740         adapter->net_stats.rx_length_errors =
1741                 adapter->soft_stats.rx_length_errors;
1742         adapter->net_stats.rx_crc_errors = adapter->soft_stats.rx_crc_errors;
1743         adapter->net_stats.rx_frame_errors =
1744                 adapter->soft_stats.rx_frame_errors;
1745         adapter->net_stats.rx_fifo_errors = adapter->soft_stats.rx_fifo_errors;
1746         adapter->net_stats.rx_missed_errors =
1747                 adapter->soft_stats.rx_missed_errors;
1748         adapter->net_stats.tx_errors = adapter->soft_stats.tx_errors;
1749         adapter->net_stats.tx_fifo_errors = adapter->soft_stats.tx_fifo_errors;
1750         adapter->net_stats.tx_aborted_errors =
1751                 adapter->soft_stats.tx_aborted_errors;
1752         adapter->net_stats.tx_window_errors =
1753                 adapter->soft_stats.tx_window_errors;
1754         adapter->net_stats.tx_carrier_errors =
1755                 adapter->soft_stats.tx_carrier_errors;
1756 }
1757
1758 static void atl1_update_mailbox(struct atl1_adapter *adapter)
1759 {
1760         unsigned long flags;
1761         u32 tpd_next_to_use;
1762         u32 rfd_next_to_use;
1763         u32 rrd_next_to_clean;
1764         u32 value;
1765
1766         spin_lock_irqsave(&adapter->mb_lock, flags);
1767
1768         tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
1769         rfd_next_to_use = atomic_read(&adapter->rfd_ring.next_to_use);
1770         rrd_next_to_clean = atomic_read(&adapter->rrd_ring.next_to_clean);
1771
1772         value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
1773                 MB_RFD_PROD_INDX_SHIFT) |
1774                 ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
1775                 MB_RRD_CONS_INDX_SHIFT) |
1776                 ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
1777                 MB_TPD_PROD_INDX_SHIFT);
1778         iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
1779
1780         spin_unlock_irqrestore(&adapter->mb_lock, flags);
1781 }
1782
1783 static void atl1_clean_alloc_flag(struct atl1_adapter *adapter,
1784         struct rx_return_desc *rrd, u16 offset)
1785 {
1786         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1787
1788         while (rfd_ring->next_to_clean != (rrd->buf_indx + offset)) {
1789                 rfd_ring->buffer_info[rfd_ring->next_to_clean].alloced = 0;
1790                 if (++rfd_ring->next_to_clean == rfd_ring->count) {
1791                         rfd_ring->next_to_clean = 0;
1792                 }
1793         }
1794 }
1795
1796 static void atl1_update_rfd_index(struct atl1_adapter *adapter,
1797         struct rx_return_desc *rrd)
1798 {
1799         u16 num_buf;
1800
1801         num_buf = (rrd->xsz.xsum_sz.pkt_size + adapter->rx_buffer_len - 1) /
1802                 adapter->rx_buffer_len;
1803         if (rrd->num_buf == num_buf)
1804                 /* clean alloc flag for bad rrd */
1805                 atl1_clean_alloc_flag(adapter, rrd, num_buf);
1806 }
1807
1808 static void atl1_rx_checksum(struct atl1_adapter *adapter,
1809         struct rx_return_desc *rrd, struct sk_buff *skb)
1810 {
1811         struct pci_dev *pdev = adapter->pdev;
1812
1813         skb->ip_summed = CHECKSUM_NONE;
1814
1815         if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
1816                 if (rrd->err_flg & (ERR_FLAG_CRC | ERR_FLAG_TRUNC |
1817                                         ERR_FLAG_CODE | ERR_FLAG_OV)) {
1818                         adapter->hw_csum_err++;
1819                         if (netif_msg_rx_err(adapter))
1820                                 dev_printk(KERN_DEBUG, &pdev->dev,
1821                                         "rx checksum error\n");
1822                         return;
1823                 }
1824         }
1825
1826         /* not IPv4 */
1827         if (!(rrd->pkt_flg & PACKET_FLAG_IPV4))
1828                 /* checksum is invalid, but it's not an IPv4 pkt, so ok */
1829                 return;
1830
1831         /* IPv4 packet */
1832         if (likely(!(rrd->err_flg &
1833                 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM)))) {
1834                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1835                 adapter->hw_csum_good++;
1836                 return;
1837         }
1838
1839         /* IPv4, but hardware thinks its checksum is wrong */
1840         if (netif_msg_rx_err(adapter))
1841                 dev_printk(KERN_DEBUG, &pdev->dev,
1842                         "hw csum wrong, pkt_flag:%x, err_flag:%x\n",
1843                         rrd->pkt_flg, rrd->err_flg);
1844         skb->ip_summed = CHECKSUM_COMPLETE;
1845         skb->csum = htons(rrd->xsz.xsum_sz.rx_chksum);
1846         adapter->hw_csum_err++;
1847         return;
1848 }
1849
1850 /*
1851  * atl1_alloc_rx_buffers - Replace used receive buffers
1852  * @adapter: address of board private structure
1853  */
1854 static u16 atl1_alloc_rx_buffers(struct atl1_adapter *adapter)
1855 {
1856         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1857         struct pci_dev *pdev = adapter->pdev;
1858         struct page *page;
1859         unsigned long offset;
1860         struct atl1_buffer *buffer_info, *next_info;
1861         struct sk_buff *skb;
1862         u16 num_alloc = 0;
1863         u16 rfd_next_to_use, next_next;
1864         struct rx_free_desc *rfd_desc;
1865
1866         next_next = rfd_next_to_use = atomic_read(&rfd_ring->next_to_use);
1867         if (++next_next == rfd_ring->count)
1868                 next_next = 0;
1869         buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1870         next_info = &rfd_ring->buffer_info[next_next];
1871
1872         while (!buffer_info->alloced && !next_info->alloced) {
1873                 if (buffer_info->skb) {
1874                         buffer_info->alloced = 1;
1875                         goto next;
1876                 }
1877
1878                 rfd_desc = ATL1_RFD_DESC(rfd_ring, rfd_next_to_use);
1879
1880                 skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
1881                 if (unlikely(!skb)) {
1882                         /* Better luck next round */
1883                         adapter->net_stats.rx_dropped++;
1884                         break;
1885                 }
1886
1887                 /*
1888                  * Make buffer alignment 2 beyond a 16 byte boundary
1889                  * this will result in a 16 byte aligned IP header after
1890                  * the 14 byte MAC header is removed
1891                  */
1892                 skb_reserve(skb, NET_IP_ALIGN);
1893
1894                 buffer_info->alloced = 1;
1895                 buffer_info->skb = skb;
1896                 buffer_info->length = (u16) adapter->rx_buffer_len;
1897                 page = virt_to_page(skb->data);
1898                 offset = (unsigned long)skb->data & ~PAGE_MASK;
1899                 buffer_info->dma = pci_map_page(pdev, page, offset,
1900                                                 adapter->rx_buffer_len,
1901                                                 PCI_DMA_FROMDEVICE);
1902                 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1903                 rfd_desc->buf_len = cpu_to_le16(adapter->rx_buffer_len);
1904                 rfd_desc->coalese = 0;
1905
1906 next:
1907                 rfd_next_to_use = next_next;
1908                 if (unlikely(++next_next == rfd_ring->count))
1909                         next_next = 0;
1910
1911                 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1912                 next_info = &rfd_ring->buffer_info[next_next];
1913                 num_alloc++;
1914         }
1915
1916         if (num_alloc) {
1917                 /*
1918                  * Force memory writes to complete before letting h/w
1919                  * know there are new descriptors to fetch.  (Only
1920                  * applicable for weak-ordered memory model archs,
1921                  * such as IA-64).
1922                  */
1923                 wmb();
1924                 atomic_set(&rfd_ring->next_to_use, (int)rfd_next_to_use);
1925         }
1926         return num_alloc;
1927 }
1928
1929 static void atl1_intr_rx(struct atl1_adapter *adapter)
1930 {
1931         int i, count;
1932         u16 length;
1933         u16 rrd_next_to_clean;
1934         u32 value;
1935         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1936         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1937         struct atl1_buffer *buffer_info;
1938         struct rx_return_desc *rrd;
1939         struct sk_buff *skb;
1940
1941         count = 0;
1942
1943         rrd_next_to_clean = atomic_read(&rrd_ring->next_to_clean);
1944
1945         while (1) {
1946                 rrd = ATL1_RRD_DESC(rrd_ring, rrd_next_to_clean);
1947                 i = 1;
1948                 if (likely(rrd->xsz.valid)) {   /* packet valid */
1949 chk_rrd:
1950                         /* check rrd status */
1951                         if (likely(rrd->num_buf == 1))
1952                                 goto rrd_ok;
1953                         else if (netif_msg_rx_err(adapter)) {
1954                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1955                                         "unexpected RRD buffer count\n");
1956                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1957                                         "rx_buf_len = %d\n",
1958                                         adapter->rx_buffer_len);
1959                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1960                                         "RRD num_buf = %d\n",
1961                                         rrd->num_buf);
1962                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1963                                         "RRD pkt_len = %d\n",
1964                                         rrd->xsz.xsum_sz.pkt_size);
1965                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1966                                         "RRD pkt_flg = 0x%08X\n",
1967                                         rrd->pkt_flg);
1968                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1969                                         "RRD err_flg = 0x%08X\n",
1970                                         rrd->err_flg);
1971                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1972                                         "RRD vlan_tag = 0x%08X\n",
1973                                         rrd->vlan_tag);
1974                         }
1975
1976                         /* rrd seems to be bad */
1977                         if (unlikely(i-- > 0)) {
1978                                 /* rrd may not be DMAed completely */
1979                                 udelay(1);
1980                                 goto chk_rrd;
1981                         }
1982                         /* bad rrd */
1983                         if (netif_msg_rx_err(adapter))
1984                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1985                                         "bad RRD\n");
1986                         /* see if update RFD index */
1987                         if (rrd->num_buf > 1)
1988                                 atl1_update_rfd_index(adapter, rrd);
1989
1990                         /* update rrd */
1991                         rrd->xsz.valid = 0;
1992                         if (++rrd_next_to_clean == rrd_ring->count)
1993                                 rrd_next_to_clean = 0;
1994                         count++;
1995                         continue;
1996                 } else {        /* current rrd still not be updated */
1997
1998                         break;
1999                 }
2000 rrd_ok:
2001                 /* clean alloc flag for bad rrd */
2002                 atl1_clean_alloc_flag(adapter, rrd, 0);
2003
2004                 buffer_info = &rfd_ring->buffer_info[rrd->buf_indx];
2005                 if (++rfd_ring->next_to_clean == rfd_ring->count)
2006                         rfd_ring->next_to_clean = 0;
2007
2008                 /* update rrd next to clean */
2009                 if (++rrd_next_to_clean == rrd_ring->count)
2010                         rrd_next_to_clean = 0;
2011                 count++;
2012
2013                 if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
2014                         if (!(rrd->err_flg &
2015                                 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM
2016                                 | ERR_FLAG_LEN))) {
2017                                 /* packet error, don't need upstream */
2018                                 buffer_info->alloced = 0;
2019                                 rrd->xsz.valid = 0;
2020                                 continue;
2021                         }
2022                 }
2023
2024                 /* Good Receive */
2025                 pci_unmap_page(adapter->pdev, buffer_info->dma,
2026                                buffer_info->length, PCI_DMA_FROMDEVICE);
2027                 skb = buffer_info->skb;
2028                 length = le16_to_cpu(rrd->xsz.xsum_sz.pkt_size);
2029
2030                 skb_put(skb, length - ETH_FCS_LEN);
2031
2032                 /* Receive Checksum Offload */
2033                 atl1_rx_checksum(adapter, rrd, skb);
2034                 skb->protocol = eth_type_trans(skb, adapter->netdev);
2035
2036                 if (adapter->vlgrp && (rrd->pkt_flg & PACKET_FLAG_VLAN_INS)) {
2037                         u16 vlan_tag = (rrd->vlan_tag >> 4) |
2038                                         ((rrd->vlan_tag & 7) << 13) |
2039                                         ((rrd->vlan_tag & 8) << 9);
2040                         vlan_hwaccel_rx(skb, adapter->vlgrp, vlan_tag);
2041                 } else
2042                         netif_rx(skb);
2043
2044                 /* let protocol layer free skb */
2045                 buffer_info->skb = NULL;
2046                 buffer_info->alloced = 0;
2047                 rrd->xsz.valid = 0;
2048
2049                 adapter->netdev->last_rx = jiffies;
2050         }
2051
2052         atomic_set(&rrd_ring->next_to_clean, rrd_next_to_clean);
2053
2054         atl1_alloc_rx_buffers(adapter);
2055
2056         /* update mailbox ? */
2057         if (count) {
2058                 u32 tpd_next_to_use;
2059                 u32 rfd_next_to_use;
2060
2061                 spin_lock(&adapter->mb_lock);
2062
2063                 tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
2064                 rfd_next_to_use =
2065                     atomic_read(&adapter->rfd_ring.next_to_use);
2066                 rrd_next_to_clean =
2067                     atomic_read(&adapter->rrd_ring.next_to_clean);
2068                 value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
2069                         MB_RFD_PROD_INDX_SHIFT) |
2070                         ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
2071                         MB_RRD_CONS_INDX_SHIFT) |
2072                         ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
2073                         MB_TPD_PROD_INDX_SHIFT);
2074                 iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
2075                 spin_unlock(&adapter->mb_lock);
2076         }
2077 }
2078
2079 static void atl1_intr_tx(struct atl1_adapter *adapter)
2080 {
2081         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2082         struct atl1_buffer *buffer_info;
2083         u16 sw_tpd_next_to_clean;
2084         u16 cmb_tpd_next_to_clean;
2085
2086         sw_tpd_next_to_clean = atomic_read(&tpd_ring->next_to_clean);
2087         cmb_tpd_next_to_clean = le16_to_cpu(adapter->cmb.cmb->tpd_cons_idx);
2088
2089         while (cmb_tpd_next_to_clean != sw_tpd_next_to_clean) {
2090                 struct tx_packet_desc *tpd;
2091
2092                 tpd = ATL1_TPD_DESC(tpd_ring, sw_tpd_next_to_clean);
2093                 buffer_info = &tpd_ring->buffer_info[sw_tpd_next_to_clean];
2094                 if (buffer_info->dma) {
2095                         pci_unmap_page(adapter->pdev, buffer_info->dma,
2096                                        buffer_info->length, PCI_DMA_TODEVICE);
2097                         buffer_info->dma = 0;
2098                 }
2099
2100                 if (buffer_info->skb) {
2101                         dev_kfree_skb_irq(buffer_info->skb);
2102                         buffer_info->skb = NULL;
2103                 }
2104
2105                 if (++sw_tpd_next_to_clean == tpd_ring->count)
2106                         sw_tpd_next_to_clean = 0;
2107         }
2108         atomic_set(&tpd_ring->next_to_clean, sw_tpd_next_to_clean);
2109
2110         if (netif_queue_stopped(adapter->netdev)
2111             && netif_carrier_ok(adapter->netdev))
2112                 netif_wake_queue(adapter->netdev);
2113 }
2114
2115 static u16 atl1_tpd_avail(struct atl1_tpd_ring *tpd_ring)
2116 {
2117         u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
2118         u16 next_to_use = atomic_read(&tpd_ring->next_to_use);
2119         return ((next_to_clean > next_to_use) ?
2120                 next_to_clean - next_to_use - 1 :
2121                 tpd_ring->count + next_to_clean - next_to_use - 1);
2122 }
2123
2124 static int atl1_tso(struct atl1_adapter *adapter, struct sk_buff *skb,
2125         struct tx_packet_desc *ptpd)
2126 {
2127         /* spinlock held */
2128         u8 hdr_len, ip_off;
2129         u32 real_len;
2130         int err;
2131
2132         if (skb_shinfo(skb)->gso_size) {
2133                 if (skb_header_cloned(skb)) {
2134                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2135                         if (unlikely(err))
2136                                 return -1;
2137                 }
2138
2139                 if (skb->protocol == ntohs(ETH_P_IP)) {
2140                         struct iphdr *iph = ip_hdr(skb);
2141
2142                         real_len = (((unsigned char *)iph - skb->data) +
2143                                 ntohs(iph->tot_len));
2144                         if (real_len < skb->len)
2145                                 pskb_trim(skb, real_len);
2146                         hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2147                         if (skb->len == hdr_len) {
2148                                 iph->check = 0;
2149                                 tcp_hdr(skb)->check =
2150                                         ~csum_tcpudp_magic(iph->saddr,
2151                                         iph->daddr, tcp_hdrlen(skb),
2152                                         IPPROTO_TCP, 0);
2153                                 ptpd->word3 |= (iph->ihl & TPD_IPHL_MASK) <<
2154                                         TPD_IPHL_SHIFT;
2155                                 ptpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
2156                                         TPD_TCPHDRLEN_MASK) <<
2157                                         TPD_TCPHDRLEN_SHIFT;
2158                                 ptpd->word3 |= 1 << TPD_IP_CSUM_SHIFT;
2159                                 ptpd->word3 |= 1 << TPD_TCP_CSUM_SHIFT;
2160                                 return 1;
2161                         }
2162
2163                         iph->check = 0;
2164                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2165                                         iph->daddr, 0, IPPROTO_TCP, 0);
2166                         ip_off = (unsigned char *)iph -
2167                                 (unsigned char *) skb_network_header(skb);
2168                         if (ip_off == 8) /* 802.3-SNAP frame */
2169                                 ptpd->word3 |= 1 << TPD_ETHTYPE_SHIFT;
2170                         else if (ip_off != 0)
2171                                 return -2;
2172
2173                         ptpd->word3 |= (iph->ihl & TPD_IPHL_MASK) <<
2174                                 TPD_IPHL_SHIFT;
2175                         ptpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
2176                                 TPD_TCPHDRLEN_MASK) << TPD_TCPHDRLEN_SHIFT;
2177                         ptpd->word3 |= (skb_shinfo(skb)->gso_size &
2178                                 TPD_MSS_MASK) << TPD_MSS_SHIFT;
2179                         ptpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
2180                         return 3;
2181                 }
2182         }
2183         return false;
2184 }
2185
2186 static int atl1_tx_csum(struct atl1_adapter *adapter, struct sk_buff *skb,
2187         struct tx_packet_desc *ptpd)
2188 {
2189         u8 css, cso;
2190
2191         if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2192                 css = (u8) (skb->csum_start - skb_headroom(skb));
2193                 cso = css + (u8) skb->csum_offset;
2194                 if (unlikely(css & 0x1)) {
2195                         /* L1 hardware requires an even number here */
2196                         if (netif_msg_tx_err(adapter))
2197                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2198                                         "payload offset not an even number\n");
2199                         return -1;
2200                 }
2201                 ptpd->word3 |= (css & TPD_PLOADOFFSET_MASK) <<
2202                         TPD_PLOADOFFSET_SHIFT;
2203                 ptpd->word3 |= (cso & TPD_CCSUMOFFSET_MASK) <<
2204                         TPD_CCSUMOFFSET_SHIFT;
2205                 ptpd->word3 |= 1 << TPD_CUST_CSUM_EN_SHIFT;
2206                 return true;
2207         }
2208         return 0;
2209 }
2210
2211 static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,
2212         struct tx_packet_desc *ptpd)
2213 {
2214         /* spinlock held */
2215         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2216         struct atl1_buffer *buffer_info;
2217         u16 buf_len = skb->len;
2218         struct page *page;
2219         unsigned long offset;
2220         unsigned int nr_frags;
2221         unsigned int f;
2222         int retval;
2223         u16 next_to_use;
2224         u16 data_len;
2225         u8 hdr_len;
2226
2227         buf_len -= skb->data_len;
2228         nr_frags = skb_shinfo(skb)->nr_frags;
2229         next_to_use = atomic_read(&tpd_ring->next_to_use);
2230         buffer_info = &tpd_ring->buffer_info[next_to_use];
2231         if (unlikely(buffer_info->skb))
2232                 BUG();
2233         /* put skb in last TPD */
2234         buffer_info->skb = NULL;
2235
2236         retval = (ptpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK;
2237         if (retval) {
2238                 /* TSO */
2239                 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2240                 buffer_info->length = hdr_len;
2241                 page = virt_to_page(skb->data);
2242                 offset = (unsigned long)skb->data & ~PAGE_MASK;
2243                 buffer_info->dma = pci_map_page(adapter->pdev, page,
2244                                                 offset, hdr_len,
2245                                                 PCI_DMA_TODEVICE);
2246
2247                 if (++next_to_use == tpd_ring->count)
2248                         next_to_use = 0;
2249
2250                 if (buf_len > hdr_len) {
2251                         int i, nseg;
2252
2253                         data_len = buf_len - hdr_len;
2254                         nseg = (data_len + ATL1_MAX_TX_BUF_LEN - 1) /
2255                                 ATL1_MAX_TX_BUF_LEN;
2256                         for (i = 0; i < nseg; i++) {
2257                                 buffer_info =
2258                                     &tpd_ring->buffer_info[next_to_use];
2259                                 buffer_info->skb = NULL;
2260                                 buffer_info->length =
2261                                     (ATL1_MAX_TX_BUF_LEN >=
2262                                      data_len) ? ATL1_MAX_TX_BUF_LEN : data_len;
2263                                 data_len -= buffer_info->length;
2264                                 page = virt_to_page(skb->data +
2265                                         (hdr_len + i * ATL1_MAX_TX_BUF_LEN));
2266                                 offset = (unsigned long)(skb->data +
2267                                         (hdr_len + i * ATL1_MAX_TX_BUF_LEN)) &
2268                                         ~PAGE_MASK;
2269                                 buffer_info->dma = pci_map_page(adapter->pdev,
2270                                         page, offset, buffer_info->length,
2271                                         PCI_DMA_TODEVICE);
2272                                 if (++next_to_use == tpd_ring->count)
2273                                         next_to_use = 0;
2274                         }
2275                 }
2276         } else {
2277                 /* not TSO */
2278                 buffer_info->length = buf_len;
2279                 page = virt_to_page(skb->data);
2280                 offset = (unsigned long)skb->data & ~PAGE_MASK;
2281                 buffer_info->dma = pci_map_page(adapter->pdev, page,
2282                         offset, buf_len, PCI_DMA_TODEVICE);
2283                 if (++next_to_use == tpd_ring->count)
2284                         next_to_use = 0;
2285         }
2286
2287         for (f = 0; f < nr_frags; f++) {
2288                 struct skb_frag_struct *frag;
2289                 u16 i, nseg;
2290
2291                 frag = &skb_shinfo(skb)->frags[f];
2292                 buf_len = frag->size;
2293
2294                 nseg = (buf_len + ATL1_MAX_TX_BUF_LEN - 1) /
2295                         ATL1_MAX_TX_BUF_LEN;
2296                 for (i = 0; i < nseg; i++) {
2297                         buffer_info = &tpd_ring->buffer_info[next_to_use];
2298                         if (unlikely(buffer_info->skb))
2299                                 BUG();
2300                         buffer_info->skb = NULL;
2301                         buffer_info->length = (buf_len > ATL1_MAX_TX_BUF_LEN) ?
2302                                 ATL1_MAX_TX_BUF_LEN : buf_len;
2303                         buf_len -= buffer_info->length;
2304                         buffer_info->dma = pci_map_page(adapter->pdev,
2305                                 frag->page,
2306                                 frag->page_offset + (i * ATL1_MAX_TX_BUF_LEN),
2307                                 buffer_info->length, PCI_DMA_TODEVICE);
2308
2309                         if (++next_to_use == tpd_ring->count)
2310                                 next_to_use = 0;
2311                 }
2312         }
2313
2314         /* last tpd's buffer-info */
2315         buffer_info->skb = skb;
2316 }
2317
2318 static void atl1_tx_queue(struct atl1_adapter *adapter, u16 count,
2319        struct tx_packet_desc *ptpd)
2320 {
2321         /* spinlock held */
2322         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2323         struct atl1_buffer *buffer_info;
2324         struct tx_packet_desc *tpd;
2325         u16 j;
2326         u32 val;
2327         u16 next_to_use = (u16) atomic_read(&tpd_ring->next_to_use);
2328
2329         for (j = 0; j < count; j++) {
2330                 buffer_info = &tpd_ring->buffer_info[next_to_use];
2331                 tpd = ATL1_TPD_DESC(&adapter->tpd_ring, next_to_use);
2332                 if (tpd != ptpd)
2333                         memcpy(tpd, ptpd, sizeof(struct tx_packet_desc));
2334                 tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2335                 tpd->word2 = (cpu_to_le16(buffer_info->length) &
2336                         TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT;
2337
2338                 /*
2339                  * if this is the first packet in a TSO chain, set
2340                  * TPD_HDRFLAG, otherwise, clear it.
2341                  */
2342                 val = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) &
2343                         TPD_SEGMENT_EN_MASK;
2344                 if (val) {
2345                         if (!j)
2346                                 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT;
2347                         else
2348                                 tpd->word3 &= ~(1 << TPD_HDRFLAG_SHIFT);
2349                 }
2350
2351                 if (j == (count - 1))
2352                         tpd->word3 |= 1 << TPD_EOP_SHIFT;
2353
2354                 if (++next_to_use == tpd_ring->count)
2355                         next_to_use = 0;
2356         }
2357         /*
2358          * Force memory writes to complete before letting h/w
2359          * know there are new descriptors to fetch.  (Only
2360          * applicable for weak-ordered memory model archs,
2361          * such as IA-64).
2362          */
2363         wmb();
2364
2365         atomic_set(&tpd_ring->next_to_use, next_to_use);
2366 }
2367
2368 static int atl1_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2369 {
2370         struct atl1_adapter *adapter = netdev_priv(netdev);
2371         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2372         int len = skb->len;
2373         int tso;
2374         int count = 1;
2375         int ret_val;
2376         struct tx_packet_desc *ptpd;
2377         u16 frag_size;
2378         u16 vlan_tag;
2379         unsigned long flags;
2380         unsigned int nr_frags = 0;
2381         unsigned int mss = 0;
2382         unsigned int f;
2383         unsigned int proto_hdr_len;
2384
2385         len -= skb->data_len;
2386
2387         if (unlikely(skb->len <= 0)) {
2388                 dev_kfree_skb_any(skb);
2389                 return NETDEV_TX_OK;
2390         }
2391
2392         nr_frags = skb_shinfo(skb)->nr_frags;
2393         for (f = 0; f < nr_frags; f++) {
2394                 frag_size = skb_shinfo(skb)->frags[f].size;
2395                 if (frag_size)
2396                         count += (frag_size + ATL1_MAX_TX_BUF_LEN - 1) /
2397                                 ATL1_MAX_TX_BUF_LEN;
2398         }
2399
2400         mss = skb_shinfo(skb)->gso_size;
2401         if (mss) {
2402                 if (skb->protocol == ntohs(ETH_P_IP)) {
2403                         proto_hdr_len = (skb_transport_offset(skb) +
2404                                          tcp_hdrlen(skb));
2405                         if (unlikely(proto_hdr_len > len)) {
2406                                 dev_kfree_skb_any(skb);
2407                                 return NETDEV_TX_OK;
2408                         }
2409                         /* need additional TPD ? */
2410                         if (proto_hdr_len != len)
2411                                 count += (len - proto_hdr_len +
2412                                         ATL1_MAX_TX_BUF_LEN - 1) /
2413                                         ATL1_MAX_TX_BUF_LEN;
2414                 }
2415         }
2416
2417         if (!spin_trylock_irqsave(&adapter->lock, flags)) {
2418                 /* Can't get lock - tell upper layer to requeue */
2419                 if (netif_msg_tx_queued(adapter))
2420                         dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2421                                 "tx locked\n");
2422                 return NETDEV_TX_LOCKED;
2423         }
2424
2425         if (atl1_tpd_avail(&adapter->tpd_ring) < count) {
2426                 /* not enough descriptors */
2427                 netif_stop_queue(netdev);
2428                 spin_unlock_irqrestore(&adapter->lock, flags);
2429                 if (netif_msg_tx_queued(adapter))
2430                         dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2431                                 "tx busy\n");
2432                 return NETDEV_TX_BUSY;
2433         }
2434
2435         ptpd = ATL1_TPD_DESC(tpd_ring,
2436                 (u16) atomic_read(&tpd_ring->next_to_use));
2437         memset(ptpd, 0, sizeof(struct tx_packet_desc));
2438
2439         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2440                 vlan_tag = vlan_tx_tag_get(skb);
2441                 vlan_tag = (vlan_tag << 4) | (vlan_tag >> 13) |
2442                         ((vlan_tag >> 9) & 0x8);
2443                 ptpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT;
2444                 ptpd->word3 |= (vlan_tag & TPD_VL_TAGGED_MASK) <<
2445                         TPD_VL_TAGGED_SHIFT;
2446         }
2447
2448         tso = atl1_tso(adapter, skb, ptpd);
2449         if (tso < 0) {
2450                 spin_unlock_irqrestore(&adapter->lock, flags);
2451                 dev_kfree_skb_any(skb);
2452                 return NETDEV_TX_OK;
2453         }
2454
2455         if (!tso) {
2456                 ret_val = atl1_tx_csum(adapter, skb, ptpd);
2457                 if (ret_val < 0) {
2458                         spin_unlock_irqrestore(&adapter->lock, flags);
2459                         dev_kfree_skb_any(skb);
2460                         return NETDEV_TX_OK;
2461                 }
2462         }
2463
2464         atl1_tx_map(adapter, skb, ptpd);
2465         atl1_tx_queue(adapter, count, ptpd);
2466         atl1_update_mailbox(adapter);
2467         spin_unlock_irqrestore(&adapter->lock, flags);
2468         netdev->trans_start = jiffies;
2469         return NETDEV_TX_OK;
2470 }
2471
2472 /*
2473  * atl1_intr - Interrupt Handler
2474  * @irq: interrupt number
2475  * @data: pointer to a network interface device structure
2476  * @pt_regs: CPU registers structure
2477  */
2478 static irqreturn_t atl1_intr(int irq, void *data)
2479 {
2480         struct atl1_adapter *adapter = netdev_priv(data);
2481         u32 status;
2482         int max_ints = 10;
2483
2484         status = adapter->cmb.cmb->int_stats;
2485         if (!status)
2486                 return IRQ_NONE;
2487
2488         do {
2489                 /* clear CMB interrupt status at once */
2490                 adapter->cmb.cmb->int_stats = 0;
2491
2492                 if (status & ISR_GPHY)  /* clear phy status */
2493                         atlx_clear_phy_int(adapter);
2494
2495                 /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
2496                 iowrite32(status | ISR_DIS_INT, adapter->hw.hw_addr + REG_ISR);
2497
2498                 /* check if SMB intr */
2499                 if (status & ISR_SMB)
2500                         atl1_inc_smb(adapter);
2501
2502                 /* check if PCIE PHY Link down */
2503                 if (status & ISR_PHY_LINKDOWN) {
2504                         if (netif_msg_intr(adapter))
2505                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2506                                         "pcie phy link down %x\n", status);
2507                         if (netif_running(adapter->netdev)) {   /* reset MAC */
2508                                 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
2509                                 schedule_work(&adapter->pcie_dma_to_rst_task);
2510                                 return IRQ_HANDLED;
2511                         }
2512                 }
2513
2514                 /* check if DMA read/write error ? */
2515                 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
2516                         if (netif_msg_intr(adapter))
2517                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2518                                         "pcie DMA r/w error (status = 0x%x)\n",
2519                                         status);
2520                         iowrite32(0, adapter->hw.hw_addr + REG_IMR);
2521                         schedule_work(&adapter->pcie_dma_to_rst_task);
2522                         return IRQ_HANDLED;
2523                 }
2524
2525                 /* link event */
2526                 if (status & ISR_GPHY) {
2527                         adapter->soft_stats.tx_carrier_errors++;
2528                         atl1_check_for_link(adapter);
2529                 }
2530
2531                 /* transmit event */
2532                 if (status & ISR_CMB_TX)
2533                         atl1_intr_tx(adapter);
2534
2535                 /* rx exception */
2536                 if (unlikely(status & (ISR_RXF_OV | ISR_RFD_UNRUN |
2537                         ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
2538                         ISR_HOST_RRD_OV | ISR_CMB_RX))) {
2539                         if (status & (ISR_RXF_OV | ISR_RFD_UNRUN |
2540                                 ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
2541                                 ISR_HOST_RRD_OV))
2542                                 if (netif_msg_intr(adapter))
2543                                         dev_printk(KERN_DEBUG,
2544                                                 &adapter->pdev->dev,
2545                                                 "rx exception, ISR = 0x%x\n",
2546                                                 status);
2547                         atl1_intr_rx(adapter);
2548                 }
2549
2550                 if (--max_ints < 0)
2551                         break;
2552
2553         } while ((status = adapter->cmb.cmb->int_stats));
2554
2555         /* re-enable Interrupt */
2556         iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter->hw.hw_addr + REG_ISR);
2557         return IRQ_HANDLED;
2558 }
2559
2560 /*
2561  * atl1_watchdog - Timer Call-back
2562  * @data: pointer to netdev cast into an unsigned long
2563  */
2564 static void atl1_watchdog(unsigned long data)
2565 {
2566         struct atl1_adapter *adapter = (struct atl1_adapter *)data;
2567
2568         /* Reset the timer */
2569         mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2570 }
2571
2572 /*
2573  * atl1_phy_config - Timer Call-back
2574  * @data: pointer to netdev cast into an unsigned long
2575  */
2576 static void atl1_phy_config(unsigned long data)
2577 {
2578         struct atl1_adapter *adapter = (struct atl1_adapter *)data;
2579         struct atl1_hw *hw = &adapter->hw;
2580         unsigned long flags;
2581
2582         spin_lock_irqsave(&adapter->lock, flags);
2583         adapter->phy_timer_pending = false;
2584         atl1_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
2585         atl1_write_phy_reg(hw, MII_ATLX_CR, hw->mii_1000t_ctrl_reg);
2586         atl1_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN);
2587         spin_unlock_irqrestore(&adapter->lock, flags);
2588 }
2589
2590 /*
2591  * Orphaned vendor comment left intact here:
2592  * <vendor comment>
2593  * If TPD Buffer size equal to 0, PCIE DMAR_TO_INT
2594  * will assert. We do soft reset <0x1400=1> according
2595  * with the SPEC. BUT, it seemes that PCIE or DMA
2596  * state-machine will not be reset. DMAR_TO_INT will
2597  * assert again and again.
2598  * </vendor comment>
2599  */
2600
2601 static int atl1_reset(struct atl1_adapter *adapter)
2602 {
2603         int ret;
2604         ret = atl1_reset_hw(&adapter->hw);
2605         if (ret)
2606                 return ret;
2607         return atl1_init_hw(&adapter->hw);
2608 }
2609
2610 static s32 atl1_up(struct atl1_adapter *adapter)
2611 {
2612         struct net_device *netdev = adapter->netdev;
2613         int err;
2614         int irq_flags = IRQF_SAMPLE_RANDOM;
2615
2616         /* hardware has been reset, we need to reload some things */
2617         atlx_set_multi(netdev);
2618         atl1_init_ring_ptrs(adapter);
2619         atlx_restore_vlan(adapter);
2620         err = atl1_alloc_rx_buffers(adapter);
2621         if (unlikely(!err))
2622                 /* no RX BUFFER allocated */
2623                 return -ENOMEM;
2624
2625         if (unlikely(atl1_configure(adapter))) {
2626                 err = -EIO;
2627                 goto err_up;
2628         }
2629
2630         err = pci_enable_msi(adapter->pdev);
2631         if (err) {
2632                 if (netif_msg_ifup(adapter))
2633                         dev_info(&adapter->pdev->dev,
2634                                 "Unable to enable MSI: %d\n", err);
2635                 irq_flags |= IRQF_SHARED;
2636         }
2637
2638         err = request_irq(adapter->pdev->irq, &atl1_intr, irq_flags,
2639                         netdev->name, netdev);
2640         if (unlikely(err))
2641                 goto err_up;
2642
2643         mod_timer(&adapter->watchdog_timer, jiffies);
2644         atlx_irq_enable(adapter);
2645         atl1_check_link(adapter);
2646         return 0;
2647
2648 err_up:
2649         pci_disable_msi(adapter->pdev);
2650         /* free rx_buffers */
2651         atl1_clean_rx_ring(adapter);
2652         return err;
2653 }
2654
2655 static void atl1_down(struct atl1_adapter *adapter)
2656 {
2657         struct net_device *netdev = adapter->netdev;
2658
2659         del_timer_sync(&adapter->watchdog_timer);
2660         del_timer_sync(&adapter->phy_config_timer);
2661         adapter->phy_timer_pending = false;
2662
2663         atlx_irq_disable(adapter);
2664         free_irq(adapter->pdev->irq, netdev);
2665         pci_disable_msi(adapter->pdev);
2666         atl1_reset_hw(&adapter->hw);
2667         adapter->cmb.cmb->int_stats = 0;
2668
2669         adapter->link_speed = SPEED_0;
2670         adapter->link_duplex = -1;
2671         netif_carrier_off(netdev);
2672         netif_stop_queue(netdev);
2673
2674         atl1_clean_tx_ring(adapter);
2675         atl1_clean_rx_ring(adapter);
2676 }
2677
2678 static void atl1_tx_timeout_task(struct work_struct *work)
2679 {
2680         struct atl1_adapter *adapter =
2681                 container_of(work, struct atl1_adapter, tx_timeout_task);
2682         struct net_device *netdev = adapter->netdev;
2683
2684         netif_device_detach(netdev);
2685         atl1_down(adapter);
2686         atl1_up(adapter);
2687         netif_device_attach(netdev);
2688 }
2689
2690 /*
2691  * atl1_change_mtu - Change the Maximum Transfer Unit
2692  * @netdev: network interface device structure
2693  * @new_mtu: new value for maximum frame size
2694  *
2695  * Returns 0 on success, negative on failure
2696  */
2697 static int atl1_change_mtu(struct net_device *netdev, int new_mtu)
2698 {
2699         struct atl1_adapter *adapter = netdev_priv(netdev);
2700         int old_mtu = netdev->mtu;
2701         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2702
2703         if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
2704             (max_frame > MAX_JUMBO_FRAME_SIZE)) {
2705                 if (netif_msg_link(adapter))
2706                         dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
2707                 return -EINVAL;
2708         }
2709
2710         adapter->hw.max_frame_size = max_frame;
2711         adapter->hw.tx_jumbo_task_th = (max_frame + 7) >> 3;
2712         adapter->rx_buffer_len = (max_frame + 7) & ~7;
2713         adapter->hw.rx_jumbo_th = adapter->rx_buffer_len / 8;
2714
2715         netdev->mtu = new_mtu;
2716         if ((old_mtu != new_mtu) && netif_running(netdev)) {
2717                 atl1_down(adapter);
2718                 atl1_up(adapter);
2719         }
2720
2721         return 0;
2722 }
2723
2724 /*
2725  * atl1_open - Called when a network interface is made active
2726  * @netdev: network interface device structure
2727  *
2728  * Returns 0 on success, negative value on failure
2729  *
2730  * The open entry point is called when a network interface is made
2731  * active by the system (IFF_UP).  At this point all resources needed
2732  * for transmit and receive operations are allocated, the interrupt
2733  * handler is registered with the OS, the watchdog timer is started,
2734  * and the stack is notified that the interface is ready.
2735  */
2736 static int atl1_open(struct net_device *netdev)
2737 {
2738         struct atl1_adapter *adapter = netdev_priv(netdev);
2739         int err;
2740
2741         /* allocate transmit descriptors */
2742         err = atl1_setup_ring_resources(adapter);
2743         if (err)
2744                 return err;
2745
2746         err = atl1_up(adapter);
2747         if (err)
2748                 goto err_up;
2749
2750         return 0;
2751
2752 err_up:
2753         atl1_reset(adapter);
2754         return err;
2755 }
2756
2757 /*
2758  * atl1_close - Disables a network interface
2759  * @netdev: network interface device structure
2760  *
2761  * Returns 0, this is not allowed to fail
2762  *
2763  * The close entry point is called when an interface is de-activated
2764  * by the OS.  The hardware is still under the drivers control, but
2765  * needs to be disabled.  A global MAC reset is issued to stop the
2766  * hardware, and all transmit and receive resources are freed.
2767  */
2768 static int atl1_close(struct net_device *netdev)
2769 {
2770         struct atl1_adapter *adapter = netdev_priv(netdev);
2771         atl1_down(adapter);
2772         atl1_free_ring_resources(adapter);
2773         return 0;
2774 }
2775
2776 #ifdef CONFIG_PM
2777 static int atl1_suspend(struct pci_dev *pdev, pm_message_t state)
2778 {
2779         struct net_device *netdev = pci_get_drvdata(pdev);
2780         struct atl1_adapter *adapter = netdev_priv(netdev);
2781         struct atl1_hw *hw = &adapter->hw;
2782         u32 ctrl = 0;
2783         u32 wufc = adapter->wol;
2784         u32 val;
2785         int retval;
2786         u16 speed;
2787         u16 duplex;
2788
2789         netif_device_detach(netdev);
2790         if (netif_running(netdev))
2791                 atl1_down(adapter);
2792
2793         retval = pci_save_state(pdev);
2794         if (retval)
2795                 return retval;
2796
2797         atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2798         atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2799         val = ctrl & BMSR_LSTATUS;
2800         if (val)
2801                 wufc &= ~ATLX_WUFC_LNKC;
2802
2803         if (val && wufc) {
2804                 val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
2805                 if (val) {
2806                         if (netif_msg_ifdown(adapter))
2807                                 dev_printk(KERN_DEBUG, &pdev->dev,
2808                                         "error getting speed/duplex\n");
2809                         goto disable_wol;
2810                 }
2811
2812                 ctrl = 0;
2813
2814                 /* enable magic packet WOL */
2815                 if (wufc & ATLX_WUFC_MAG)
2816                         ctrl |= (WOL_MAGIC_EN | WOL_MAGIC_PME_EN);
2817                 iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
2818                 ioread32(hw->hw_addr + REG_WOL_CTRL);
2819
2820                 /* configure the mac */
2821                 ctrl = MAC_CTRL_RX_EN;
2822                 ctrl |= ((u32)((speed == SPEED_1000) ? MAC_CTRL_SPEED_1000 :
2823                         MAC_CTRL_SPEED_10_100) << MAC_CTRL_SPEED_SHIFT);
2824                 if (duplex == FULL_DUPLEX)
2825                         ctrl |= MAC_CTRL_DUPLX;
2826                 ctrl |= (((u32)adapter->hw.preamble_len &
2827                         MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
2828                 if (adapter->vlgrp)
2829                         ctrl |= MAC_CTRL_RMV_VLAN;
2830                 if (wufc & ATLX_WUFC_MAG)
2831                         ctrl |= MAC_CTRL_BC_EN;
2832                 iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);
2833                 ioread32(hw->hw_addr + REG_MAC_CTRL);
2834
2835                 /* poke the PHY */
2836                 ctrl = ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2837                 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2838                 iowrite32(ctrl, hw->hw_addr + REG_PCIE_PHYMISC);
2839                 ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2840
2841                 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2842                 goto exit;
2843         }
2844
2845         if (!val && wufc) {
2846                 ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
2847                 iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
2848                 ioread32(hw->hw_addr + REG_WOL_CTRL);
2849                 iowrite32(0, hw->hw_addr + REG_MAC_CTRL);
2850                 ioread32(hw->hw_addr + REG_MAC_CTRL);
2851                 hw->phy_configured = false;
2852                 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2853                 goto exit;
2854         }
2855
2856 disable_wol:
2857         iowrite32(0, hw->hw_addr + REG_WOL_CTRL);
2858         ioread32(hw->hw_addr + REG_WOL_CTRL);
2859         ctrl = ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2860         ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2861         iowrite32(ctrl, hw->hw_addr + REG_PCIE_PHYMISC);
2862         ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2863         atl1_phy_enter_power_saving(hw);
2864         hw->phy_configured = false;
2865         pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
2866 exit:
2867         if (netif_running(netdev))
2868                 pci_disable_msi(adapter->pdev);
2869         pci_disable_device(pdev);
2870         pci_set_power_state(pdev, pci_choose_state(pdev, state));
2871
2872         return 0;
2873 }
2874
2875 static int atl1_resume(struct pci_dev *pdev)
2876 {
2877         struct net_device *netdev = pci_get_drvdata(pdev);
2878         struct atl1_adapter *adapter = netdev_priv(netdev);
2879         u32 err;
2880
2881         pci_set_power_state(pdev, PCI_D0);
2882         pci_restore_state(pdev);
2883
2884         err = pci_enable_device(pdev);
2885         if (err) {
2886                 if (netif_msg_ifup(adapter))
2887                         dev_printk(KERN_DEBUG, &pdev->dev,
2888                                 "error enabling pci device\n");
2889                 return err;
2890         }
2891
2892         pci_set_master(pdev);
2893         iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL);
2894         pci_enable_wake(pdev, PCI_D3hot, 0);
2895         pci_enable_wake(pdev, PCI_D3cold, 0);
2896
2897         atl1_reset_hw(&adapter->hw);
2898         adapter->cmb.cmb->int_stats = 0;
2899
2900         if (netif_running(netdev))
2901                 atl1_up(adapter);
2902         netif_device_attach(netdev);
2903
2904         return 0;
2905 }
2906 #else
2907 #define atl1_suspend NULL
2908 #define atl1_resume NULL
2909 #endif
2910
2911 #ifdef CONFIG_NET_POLL_CONTROLLER
2912 static void atl1_poll_controller(struct net_device *netdev)
2913 {
2914         disable_irq(netdev->irq);
2915         atl1_intr(netdev->irq, netdev);
2916         enable_irq(netdev->irq);
2917 }
2918 #endif
2919
2920 /*
2921  * atl1_probe - Device Initialization Routine
2922  * @pdev: PCI device information struct
2923  * @ent: entry in atl1_pci_tbl
2924  *
2925  * Returns 0 on success, negative on failure
2926  *
2927  * atl1_probe initializes an adapter identified by a pci_dev structure.
2928  * The OS initialization, configuring of the adapter private structure,
2929  * and a hardware reset occur.
2930  */
2931 static int __devinit atl1_probe(struct pci_dev *pdev,
2932         const struct pci_device_id *ent)
2933 {
2934         struct net_device *netdev;
2935         struct atl1_adapter *adapter;
2936         static int cards_found = 0;
2937         int err;
2938
2939         err = pci_enable_device(pdev);
2940         if (err)
2941                 return err;
2942
2943         /*
2944          * The atl1 chip can DMA to 64-bit addresses, but it uses a single
2945          * shared register for the high 32 bits, so only a single, aligned,
2946          * 4 GB physical address range can be used at a time.
2947          *
2948          * Supporting 64-bit DMA on this hardware is more trouble than it's
2949          * worth.  It is far easier to limit to 32-bit DMA than update
2950          * various kernel subsystems to support the mechanics required by a
2951          * fixed-high-32-bit system.
2952          */
2953         err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
2954         if (err) {
2955                 dev_err(&pdev->dev, "no usable DMA configuration\n");
2956                 goto err_dma;
2957         }
2958         /*
2959          * Mark all PCI regions associated with PCI device
2960          * pdev as being reserved by owner atl1_driver_name
2961          */
2962         err = pci_request_regions(pdev, ATLX_DRIVER_NAME);
2963         if (err)
2964                 goto err_request_regions;
2965
2966         /*
2967          * Enables bus-mastering on the device and calls
2968          * pcibios_set_master to do the needed arch specific settings
2969          */
2970         pci_set_master(pdev);
2971
2972         netdev = alloc_etherdev(sizeof(struct atl1_adapter));
2973         if (!netdev) {
2974                 err = -ENOMEM;
2975                 goto err_alloc_etherdev;
2976         }
2977         SET_NETDEV_DEV(netdev, &pdev->dev);
2978
2979         pci_set_drvdata(pdev, netdev);
2980         adapter = netdev_priv(netdev);
2981         adapter->netdev = netdev;
2982         adapter->pdev = pdev;
2983         adapter->hw.back = adapter;
2984         adapter->msg_enable = netif_msg_init(debug, atl1_default_msg);
2985
2986         adapter->hw.hw_addr = pci_iomap(pdev, 0, 0);
2987         if (!adapter->hw.hw_addr) {
2988                 err = -EIO;
2989                 goto err_pci_iomap;
2990         }
2991         /* get device revision number */
2992         adapter->hw.dev_rev = ioread16(adapter->hw.hw_addr +
2993                 (REG_MASTER_CTRL + 2));
2994         if (netif_msg_probe(adapter))
2995                 dev_info(&pdev->dev, "version %s\n", ATLX_DRIVER_VERSION);
2996
2997         /* set default ring resource counts */
2998         adapter->rfd_ring.count = adapter->rrd_ring.count = ATL1_DEFAULT_RFD;
2999         adapter->tpd_ring.count = ATL1_DEFAULT_TPD;
3000
3001         adapter->mii.dev = netdev;
3002         adapter->mii.mdio_read = mdio_read;
3003         adapter->mii.mdio_write = mdio_write;
3004         adapter->mii.phy_id_mask = 0x1f;
3005         adapter->mii.reg_num_mask = 0x1f;
3006
3007         netdev->open = &atl1_open;
3008         netdev->stop = &atl1_close;
3009         netdev->hard_start_xmit = &atl1_xmit_frame;
3010         netdev->get_stats = &atlx_get_stats;
3011         netdev->set_multicast_list = &atlx_set_multi;
3012         netdev->set_mac_address = &atl1_set_mac;
3013         netdev->change_mtu = &atl1_change_mtu;
3014         netdev->do_ioctl = &atlx_ioctl;
3015         netdev->tx_timeout = &atlx_tx_timeout;
3016         netdev->watchdog_timeo = 5 * HZ;
3017 #ifdef CONFIG_NET_POLL_CONTROLLER
3018         netdev->poll_controller = atl1_poll_controller;
3019 #endif
3020         netdev->vlan_rx_register = atlx_vlan_rx_register;
3021
3022         netdev->ethtool_ops = &atl1_ethtool_ops;
3023         adapter->bd_number = cards_found;
3024
3025         /* setup the private structure */
3026         err = atl1_sw_init(adapter);
3027         if (err)
3028                 goto err_common;
3029
3030         netdev->features = NETIF_F_HW_CSUM;
3031         netdev->features |= NETIF_F_SG;
3032         netdev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
3033         netdev->features |= NETIF_F_TSO;
3034         netdev->features |= NETIF_F_LLTX;
3035
3036         /*
3037          * patch for some L1 of old version,
3038          * the final version of L1 may not need these
3039          * patches
3040          */
3041         /* atl1_pcie_patch(adapter); */
3042
3043         /* really reset GPHY core */
3044         iowrite16(0, adapter->hw.hw_addr + REG_PHY_ENABLE);
3045
3046         /*
3047          * reset the controller to
3048          * put the device in a known good starting state
3049          */
3050         if (atl1_reset_hw(&adapter->hw)) {
3051                 err = -EIO;
3052                 goto err_common;
3053         }
3054
3055         /* copy the MAC address out of the EEPROM */
3056         atl1_read_mac_addr(&adapter->hw);
3057         memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
3058
3059         if (!is_valid_ether_addr(netdev->dev_addr)) {
3060                 err = -EIO;
3061                 goto err_common;
3062         }
3063
3064         atl1_check_options(adapter);
3065
3066         /* pre-init the MAC, and setup link */
3067         err = atl1_init_hw(&adapter->hw);
3068         if (err) {
3069                 err = -EIO;
3070                 goto err_common;
3071         }
3072
3073         atl1_pcie_patch(adapter);
3074         /* assume we have no link for now */
3075         netif_carrier_off(netdev);
3076         netif_stop_queue(netdev);
3077
3078         init_timer(&adapter->watchdog_timer);
3079         adapter->watchdog_timer.function = &atl1_watchdog;
3080         adapter->watchdog_timer.data = (unsigned long)adapter;
3081
3082         init_timer(&adapter->phy_config_timer);
3083         adapter->phy_config_timer.function = &atl1_phy_config;
3084         adapter->phy_config_timer.data = (unsigned long)adapter;
3085         adapter->phy_timer_pending = false;
3086
3087         INIT_WORK(&adapter->tx_timeout_task, atl1_tx_timeout_task);
3088
3089         INIT_WORK(&adapter->link_chg_task, atlx_link_chg_task);
3090
3091         INIT_WORK(&adapter->pcie_dma_to_rst_task, atl1_tx_timeout_task);
3092
3093         err = register_netdev(netdev);
3094         if (err)
3095                 goto err_common;
3096
3097         cards_found++;
3098         atl1_via_workaround(adapter);
3099         return 0;
3100
3101 err_common:
3102         pci_iounmap(pdev, adapter->hw.hw_addr);
3103 err_pci_iomap:
3104         free_netdev(netdev);
3105 err_alloc_etherdev:
3106         pci_release_regions(pdev);
3107 err_dma:
3108 err_request_regions:
3109         pci_disable_device(pdev);
3110         return err;
3111 }
3112
3113 /*
3114  * atl1_remove - Device Removal Routine
3115  * @pdev: PCI device information struct
3116  *
3117  * atl1_remove is called by the PCI subsystem to alert the driver
3118  * that it should release a PCI device.  The could be caused by a
3119  * Hot-Plug event, or because the driver is going to be removed from
3120  * memory.
3121  */
3122 static void __devexit atl1_remove(struct pci_dev *pdev)
3123 {
3124         struct net_device *netdev = pci_get_drvdata(pdev);
3125         struct atl1_adapter *adapter;
3126         /* Device not available. Return. */
3127         if (!netdev)
3128                 return;
3129
3130         adapter = netdev_priv(netdev);
3131
3132         /*
3133          * Some atl1 boards lack persistent storage for their MAC, and get it
3134          * from the BIOS during POST.  If we've been messing with the MAC
3135          * address, we need to save the permanent one.
3136          */
3137         if (memcmp(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN)) {
3138                 memcpy(adapter->hw.mac_addr, adapter->hw.perm_mac_addr,
3139                         ETH_ALEN);
3140                 atl1_set_mac_addr(&adapter->hw);
3141         }
3142
3143         iowrite16(0, adapter->hw.hw_addr + REG_PHY_ENABLE);
3144         unregister_netdev(netdev);
3145         pci_iounmap(pdev, adapter->hw.hw_addr);
3146         pci_release_regions(pdev);
3147         free_netdev(netdev);
3148         pci_disable_device(pdev);
3149 }
3150
3151 static struct pci_driver atl1_driver = {
3152         .name = ATLX_DRIVER_NAME,
3153         .id_table = atl1_pci_tbl,
3154         .probe = atl1_probe,
3155         .remove = __devexit_p(atl1_remove),
3156         .suspend = atl1_suspend,
3157         .resume = atl1_resume
3158 };
3159
3160 /*
3161  * atl1_exit_module - Driver Exit Cleanup Routine
3162  *
3163  * atl1_exit_module is called just before the driver is removed
3164  * from memory.
3165  */
3166 static void __exit atl1_exit_module(void)
3167 {
3168         pci_unregister_driver(&atl1_driver);
3169 }
3170
3171 /*
3172  * atl1_init_module - Driver Registration Routine
3173  *
3174  * atl1_init_module is the first routine called when the driver is
3175  * loaded. All it does is register with the PCI subsystem.
3176  */
3177 static int __init atl1_init_module(void)
3178 {
3179         return pci_register_driver(&atl1_driver);
3180 }
3181
3182 module_init(atl1_init_module);
3183 module_exit(atl1_exit_module);
3184
3185 struct atl1_stats {
3186         char stat_string[ETH_GSTRING_LEN];
3187         int sizeof_stat;
3188         int stat_offset;
3189 };
3190
3191 #define ATL1_STAT(m) \
3192         sizeof(((struct atl1_adapter *)0)->m), offsetof(struct atl1_adapter, m)
3193
3194 static struct atl1_stats atl1_gstrings_stats[] = {
3195         {"rx_packets", ATL1_STAT(soft_stats.rx_packets)},
3196         {"tx_packets", ATL1_STAT(soft_stats.tx_packets)},
3197         {"rx_bytes", ATL1_STAT(soft_stats.rx_bytes)},
3198         {"tx_bytes", ATL1_STAT(soft_stats.tx_bytes)},
3199         {"rx_errors", ATL1_STAT(soft_stats.rx_errors)},
3200         {"tx_errors", ATL1_STAT(soft_stats.tx_errors)},
3201         {"rx_dropped", ATL1_STAT(net_stats.rx_dropped)},
3202         {"tx_dropped", ATL1_STAT(net_stats.tx_dropped)},
3203         {"multicast", ATL1_STAT(soft_stats.multicast)},
3204         {"collisions", ATL1_STAT(soft_stats.collisions)},
3205         {"rx_length_errors", ATL1_STAT(soft_stats.rx_length_errors)},
3206         {"rx_over_errors", ATL1_STAT(soft_stats.rx_missed_errors)},
3207         {"rx_crc_errors", ATL1_STAT(soft_stats.rx_crc_errors)},
3208         {"rx_frame_errors", ATL1_STAT(soft_stats.rx_frame_errors)},
3209         {"rx_fifo_errors", ATL1_STAT(soft_stats.rx_fifo_errors)},
3210         {"rx_missed_errors", ATL1_STAT(soft_stats.rx_missed_errors)},
3211         {"tx_aborted_errors", ATL1_STAT(soft_stats.tx_aborted_errors)},
3212         {"tx_carrier_errors", ATL1_STAT(soft_stats.tx_carrier_errors)},
3213         {"tx_fifo_errors", ATL1_STAT(soft_stats.tx_fifo_errors)},
3214         {"tx_window_errors", ATL1_STAT(soft_stats.tx_window_errors)},
3215         {"tx_abort_exce_coll", ATL1_STAT(soft_stats.excecol)},
3216         {"tx_abort_late_coll", ATL1_STAT(soft_stats.latecol)},
3217         {"tx_deferred_ok", ATL1_STAT(soft_stats.deffer)},
3218         {"tx_single_coll_ok", ATL1_STAT(soft_stats.scc)},
3219         {"tx_multi_coll_ok", ATL1_STAT(soft_stats.mcc)},
3220         {"tx_underun", ATL1_STAT(soft_stats.tx_underun)},
3221         {"tx_trunc", ATL1_STAT(soft_stats.tx_trunc)},
3222         {"tx_pause", ATL1_STAT(soft_stats.tx_pause)},
3223         {"rx_pause", ATL1_STAT(soft_stats.rx_pause)},
3224         {"rx_rrd_ov", ATL1_STAT(soft_stats.rx_rrd_ov)},
3225         {"rx_trunc", ATL1_STAT(soft_stats.rx_trunc)}
3226 };
3227
3228 static void atl1_get_ethtool_stats(struct net_device *netdev,
3229         struct ethtool_stats *stats, u64 *data)
3230 {
3231         struct atl1_adapter *adapter = netdev_priv(netdev);
3232         int i;
3233         char *p;
3234
3235         for (i = 0; i < ARRAY_SIZE(atl1_gstrings_stats); i++) {
3236                 p = (char *)adapter+atl1_gstrings_stats[i].stat_offset;
3237                 data[i] = (atl1_gstrings_stats[i].sizeof_stat ==
3238                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
3239         }
3240
3241 }
3242
3243 static int atl1_get_sset_count(struct net_device *netdev, int sset)
3244 {
3245         switch (sset) {
3246         case ETH_SS_STATS:
3247                 return ARRAY_SIZE(atl1_gstrings_stats);
3248         default:
3249                 return -EOPNOTSUPP;
3250         }
3251 }
3252
3253 static int atl1_get_settings(struct net_device *netdev,
3254         struct ethtool_cmd *ecmd)
3255 {
3256         struct atl1_adapter *adapter = netdev_priv(netdev);
3257         struct atl1_hw *hw = &adapter->hw;
3258
3259         ecmd->supported = (SUPPORTED_10baseT_Half |
3260                            SUPPORTED_10baseT_Full |
3261                            SUPPORTED_100baseT_Half |
3262                            SUPPORTED_100baseT_Full |
3263                            SUPPORTED_1000baseT_Full |
3264                            SUPPORTED_Autoneg | SUPPORTED_TP);
3265         ecmd->advertising = ADVERTISED_TP;
3266         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3267             hw->media_type == MEDIA_TYPE_1000M_FULL) {
3268                 ecmd->advertising |= ADVERTISED_Autoneg;
3269                 if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR) {
3270                         ecmd->advertising |= ADVERTISED_Autoneg;
3271                         ecmd->advertising |=
3272                             (ADVERTISED_10baseT_Half |
3273                              ADVERTISED_10baseT_Full |
3274                              ADVERTISED_100baseT_Half |
3275                              ADVERTISED_100baseT_Full |
3276                              ADVERTISED_1000baseT_Full);
3277                 } else
3278                         ecmd->advertising |= (ADVERTISED_1000baseT_Full);
3279         }
3280         ecmd->port = PORT_TP;
3281         ecmd->phy_address = 0;
3282         ecmd->transceiver = XCVR_INTERNAL;
3283
3284         if (netif_carrier_ok(adapter->netdev)) {
3285                 u16 link_speed, link_duplex;
3286                 atl1_get_speed_and_duplex(hw, &link_speed, &link_duplex);
3287                 ecmd->speed = link_speed;
3288                 if (link_duplex == FULL_DUPLEX)
3289                         ecmd->duplex = DUPLEX_FULL;
3290                 else
3291                         ecmd->duplex = DUPLEX_HALF;
3292         } else {
3293                 ecmd->speed = -1;
3294                 ecmd->duplex = -1;
3295         }
3296         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3297             hw->media_type == MEDIA_TYPE_1000M_FULL)
3298                 ecmd->autoneg = AUTONEG_ENABLE;
3299         else
3300                 ecmd->autoneg = AUTONEG_DISABLE;
3301
3302         return 0;
3303 }
3304
3305 static int atl1_set_settings(struct net_device *netdev,
3306         struct ethtool_cmd *ecmd)
3307 {
3308         struct atl1_adapter *adapter = netdev_priv(netdev);
3309         struct atl1_hw *hw = &adapter->hw;
3310         u16 phy_data;
3311         int ret_val = 0;
3312         u16 old_media_type = hw->media_type;
3313
3314         if (netif_running(adapter->netdev)) {
3315                 if (netif_msg_link(adapter))
3316                         dev_dbg(&adapter->pdev->dev,
3317                                 "ethtool shutting down adapter\n");
3318                 atl1_down(adapter);
3319         }
3320
3321         if (ecmd->autoneg == AUTONEG_ENABLE)
3322                 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
3323         else {
3324                 if (ecmd->speed == SPEED_1000) {
3325                         if (ecmd->duplex != DUPLEX_FULL) {
3326                                 if (netif_msg_link(adapter))
3327                                         dev_warn(&adapter->pdev->dev,
3328                                                 "1000M half is invalid\n");
3329                                 ret_val = -EINVAL;
3330                                 goto exit_sset;
3331                         }
3332                         hw->media_type = MEDIA_TYPE_1000M_FULL;
3333                 } else if (ecmd->speed == SPEED_100) {
3334                         if (ecmd->duplex == DUPLEX_FULL)
3335                                 hw->media_type = MEDIA_TYPE_100M_FULL;
3336                         else
3337                                 hw->media_type = MEDIA_TYPE_100M_HALF;
3338                 } else {
3339                         if (ecmd->duplex == DUPLEX_FULL)
3340                                 hw->media_type = MEDIA_TYPE_10M_FULL;
3341                         else
3342                                 hw->media_type = MEDIA_TYPE_10M_HALF;
3343                 }
3344         }
3345         switch (hw->media_type) {
3346         case MEDIA_TYPE_AUTO_SENSOR:
3347                 ecmd->advertising =
3348                     ADVERTISED_10baseT_Half |
3349                     ADVERTISED_10baseT_Full |
3350                     ADVERTISED_100baseT_Half |
3351                     ADVERTISED_100baseT_Full |
3352                     ADVERTISED_1000baseT_Full |
3353                     ADVERTISED_Autoneg | ADVERTISED_TP;
3354                 break;
3355         case MEDIA_TYPE_1000M_FULL:
3356                 ecmd->advertising =
3357                     ADVERTISED_1000baseT_Full |
3358                     ADVERTISED_Autoneg | ADVERTISED_TP;
3359                 break;
3360         default:
3361                 ecmd->advertising = 0;
3362                 break;
3363         }
3364         if (atl1_phy_setup_autoneg_adv(hw)) {
3365                 ret_val = -EINVAL;
3366                 if (netif_msg_link(adapter))
3367                         dev_warn(&adapter->pdev->dev,
3368                                 "invalid ethtool speed/duplex setting\n");
3369                 goto exit_sset;
3370         }
3371         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3372             hw->media_type == MEDIA_TYPE_1000M_FULL)
3373                 phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
3374         else {
3375                 switch (hw->media_type) {
3376                 case MEDIA_TYPE_100M_FULL:
3377                         phy_data =
3378                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
3379                             MII_CR_RESET;
3380                         break;
3381                 case MEDIA_TYPE_100M_HALF:
3382                         phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
3383                         break;
3384                 case MEDIA_TYPE_10M_FULL:
3385                         phy_data =
3386                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
3387                         break;
3388                 default:
3389                         /* MEDIA_TYPE_10M_HALF: */
3390                         phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
3391                         break;
3392                 }
3393         }
3394         atl1_write_phy_reg(hw, MII_BMCR, phy_data);
3395 exit_sset:
3396         if (ret_val)
3397                 hw->media_type = old_media_type;
3398
3399         if (netif_running(adapter->netdev)) {
3400                 if (netif_msg_link(adapter))
3401                         dev_dbg(&adapter->pdev->dev,
3402                                 "ethtool starting adapter\n");
3403                 atl1_up(adapter);
3404         } else if (!ret_val) {
3405                 if (netif_msg_link(adapter))
3406                         dev_dbg(&adapter->pdev->dev,
3407                                 "ethtool resetting adapter\n");
3408                 atl1_reset(adapter);
3409         }
3410         return ret_val;
3411 }
3412
3413 static void atl1_get_drvinfo(struct net_device *netdev,
3414         struct ethtool_drvinfo *drvinfo)
3415 {
3416         struct atl1_adapter *adapter = netdev_priv(netdev);
3417
3418         strncpy(drvinfo->driver, ATLX_DRIVER_NAME, sizeof(drvinfo->driver));
3419         strncpy(drvinfo->version, ATLX_DRIVER_VERSION,
3420                 sizeof(drvinfo->version));
3421         strncpy(drvinfo->fw_version, "N/A", sizeof(drvinfo->fw_version));
3422         strncpy(drvinfo->bus_info, pci_name(adapter->pdev),
3423                 sizeof(drvinfo->bus_info));
3424         drvinfo->eedump_len = ATL1_EEDUMP_LEN;
3425 }
3426
3427 static void atl1_get_wol(struct net_device *netdev,
3428         struct ethtool_wolinfo *wol)
3429 {
3430         struct atl1_adapter *adapter = netdev_priv(netdev);
3431
3432         wol->supported = WAKE_UCAST | WAKE_MCAST | WAKE_BCAST | WAKE_MAGIC;
3433         wol->wolopts = 0;
3434         if (adapter->wol & ATLX_WUFC_EX)
3435                 wol->wolopts |= WAKE_UCAST;
3436         if (adapter->wol & ATLX_WUFC_MC)
3437                 wol->wolopts |= WAKE_MCAST;
3438         if (adapter->wol & ATLX_WUFC_BC)
3439                 wol->wolopts |= WAKE_BCAST;
3440         if (adapter->wol & ATLX_WUFC_MAG)
3441                 wol->wolopts |= WAKE_MAGIC;
3442         return;
3443 }
3444
3445 static int atl1_set_wol(struct net_device *netdev,
3446         struct ethtool_wolinfo *wol)
3447 {
3448         struct atl1_adapter *adapter = netdev_priv(netdev);
3449
3450         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
3451                 return -EOPNOTSUPP;
3452         adapter->wol = 0;
3453         if (wol->wolopts & WAKE_UCAST)
3454                 adapter->wol |= ATLX_WUFC_EX;
3455         if (wol->wolopts & WAKE_MCAST)
3456                 adapter->wol |= ATLX_WUFC_MC;
3457         if (wol->wolopts & WAKE_BCAST)
3458                 adapter->wol |= ATLX_WUFC_BC;
3459         if (wol->wolopts & WAKE_MAGIC)
3460                 adapter->wol |= ATLX_WUFC_MAG;
3461         return 0;
3462 }
3463
3464 static u32 atl1_get_msglevel(struct net_device *netdev)
3465 {
3466         struct atl1_adapter *adapter = netdev_priv(netdev);
3467         return adapter->msg_enable;
3468 }
3469
3470 static void atl1_set_msglevel(struct net_device *netdev, u32 value)
3471 {
3472         struct atl1_adapter *adapter = netdev_priv(netdev);
3473         adapter->msg_enable = value;
3474 }
3475
3476 static int atl1_get_regs_len(struct net_device *netdev)
3477 {
3478         return ATL1_REG_COUNT * sizeof(u32);
3479 }
3480
3481 static void atl1_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
3482         void *p)
3483 {
3484         struct atl1_adapter *adapter = netdev_priv(netdev);
3485         struct atl1_hw *hw = &adapter->hw;
3486         unsigned int i;
3487         u32 *regbuf = p;
3488
3489         for (i = 0; i < ATL1_REG_COUNT; i++) {
3490                 /*
3491                  * This switch statement avoids reserved regions
3492                  * of register space.
3493                  */
3494                 switch (i) {
3495                 case 6 ... 9:
3496                 case 14:
3497                 case 29 ... 31:
3498                 case 34 ... 63:
3499                 case 75 ... 127:
3500                 case 136 ... 1023:
3501                 case 1027 ... 1087:
3502                 case 1091 ... 1151:
3503                 case 1194 ... 1195:
3504                 case 1200 ... 1201:
3505                 case 1206 ... 1213:
3506                 case 1216 ... 1279:
3507                 case 1290 ... 1311:
3508                 case 1323 ... 1343:
3509                 case 1358 ... 1359:
3510                 case 1368 ... 1375:
3511                 case 1378 ... 1383:
3512                 case 1388 ... 1391:
3513                 case 1393 ... 1395:
3514                 case 1402 ... 1403:
3515                 case 1410 ... 1471:
3516                 case 1522 ... 1535:
3517                         /* reserved region; don't read it */
3518                         regbuf[i] = 0;
3519                         break;
3520                 default:
3521                         /* unreserved region */
3522                         regbuf[i] = ioread32(hw->hw_addr + (i * sizeof(u32)));
3523                 }
3524         }
3525 }
3526
3527 static void atl1_get_ringparam(struct net_device *netdev,
3528         struct ethtool_ringparam *ring)
3529 {
3530         struct atl1_adapter *adapter = netdev_priv(netdev);
3531         struct atl1_tpd_ring *txdr = &adapter->tpd_ring;
3532         struct atl1_rfd_ring *rxdr = &adapter->rfd_ring;
3533
3534         ring->rx_max_pending = ATL1_MAX_RFD;
3535         ring->tx_max_pending = ATL1_MAX_TPD;
3536         ring->rx_mini_max_pending = 0;
3537         ring->rx_jumbo_max_pending = 0;
3538         ring->rx_pending = rxdr->count;
3539         ring->tx_pending = txdr->count;
3540         ring->rx_mini_pending = 0;
3541         ring->rx_jumbo_pending = 0;
3542 }
3543
3544 static int atl1_set_ringparam(struct net_device *netdev,
3545         struct ethtool_ringparam *ring)
3546 {
3547         struct atl1_adapter *adapter = netdev_priv(netdev);
3548         struct atl1_tpd_ring *tpdr = &adapter->tpd_ring;
3549         struct atl1_rrd_ring *rrdr = &adapter->rrd_ring;
3550         struct atl1_rfd_ring *rfdr = &adapter->rfd_ring;
3551
3552         struct atl1_tpd_ring tpd_old, tpd_new;
3553         struct atl1_rfd_ring rfd_old, rfd_new;
3554         struct atl1_rrd_ring rrd_old, rrd_new;
3555         struct atl1_ring_header rhdr_old, rhdr_new;
3556         int err;
3557
3558         tpd_old = adapter->tpd_ring;
3559         rfd_old = adapter->rfd_ring;
3560         rrd_old = adapter->rrd_ring;
3561         rhdr_old = adapter->ring_header;
3562
3563         if (netif_running(adapter->netdev))
3564                 atl1_down(adapter);
3565
3566         rfdr->count = (u16) max(ring->rx_pending, (u32) ATL1_MIN_RFD);
3567         rfdr->count = rfdr->count > ATL1_MAX_RFD ? ATL1_MAX_RFD :
3568                         rfdr->count;
3569         rfdr->count = (rfdr->count + 3) & ~3;
3570         rrdr->count = rfdr->count;
3571
3572         tpdr->count = (u16) max(ring->tx_pending, (u32) ATL1_MIN_TPD);
3573         tpdr->count = tpdr->count > ATL1_MAX_TPD ? ATL1_MAX_TPD :
3574                         tpdr->count;
3575         tpdr->count = (tpdr->count + 3) & ~3;
3576
3577         if (netif_running(adapter->netdev)) {
3578                 /* try to get new resources before deleting old */
3579                 err = atl1_setup_ring_resources(adapter);
3580                 if (err)
3581                         goto err_setup_ring;
3582
3583                 /*
3584                  * save the new, restore the old in order to free it,
3585                  * then restore the new back again
3586                  */
3587
3588                 rfd_new = adapter->rfd_ring;
3589                 rrd_new = adapter->rrd_ring;
3590                 tpd_new = adapter->tpd_ring;
3591                 rhdr_new = adapter->ring_header;
3592                 adapter->rfd_ring = rfd_old;
3593                 adapter->rrd_ring = rrd_old;
3594                 adapter->tpd_ring = tpd_old;
3595                 adapter->ring_header = rhdr_old;
3596                 atl1_free_ring_resources(adapter);
3597                 adapter->rfd_ring = rfd_new;
3598                 adapter->rrd_ring = rrd_new;
3599                 adapter->tpd_ring = tpd_new;
3600                 adapter->ring_header = rhdr_new;
3601
3602                 err = atl1_up(adapter);
3603                 if (err)
3604                         return err;
3605         }
3606         return 0;
3607
3608 err_setup_ring:
3609         adapter->rfd_ring = rfd_old;
3610         adapter->rrd_ring = rrd_old;
3611         adapter->tpd_ring = tpd_old;
3612         adapter->ring_header = rhdr_old;
3613         atl1_up(adapter);
3614         return err;
3615 }
3616
3617 static void atl1_get_pauseparam(struct net_device *netdev,
3618         struct ethtool_pauseparam *epause)
3619 {
3620         struct atl1_adapter *adapter = netdev_priv(netdev);
3621         struct atl1_hw *hw = &adapter->hw;
3622
3623         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3624             hw->media_type == MEDIA_TYPE_1000M_FULL) {
3625                 epause->autoneg = AUTONEG_ENABLE;
3626         } else {
3627                 epause->autoneg = AUTONEG_DISABLE;
3628         }
3629         epause->rx_pause = 1;
3630         epause->tx_pause = 1;
3631 }
3632
3633 static int atl1_set_pauseparam(struct net_device *netdev,
3634         struct ethtool_pauseparam *epause)
3635 {
3636         struct atl1_adapter *adapter = netdev_priv(netdev);
3637         struct atl1_hw *hw = &adapter->hw;
3638
3639         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3640             hw->media_type == MEDIA_TYPE_1000M_FULL) {
3641                 epause->autoneg = AUTONEG_ENABLE;
3642         } else {
3643                 epause->autoneg = AUTONEG_DISABLE;
3644         }
3645
3646         epause->rx_pause = 1;
3647         epause->tx_pause = 1;
3648
3649         return 0;
3650 }
3651
3652 /* FIXME: is this right? -- CHS */
3653 static u32 atl1_get_rx_csum(struct net_device *netdev)
3654 {
3655         return 1;
3656 }
3657
3658 static void atl1_get_strings(struct net_device *netdev, u32 stringset,
3659         u8 *data)
3660 {
3661         u8 *p = data;
3662         int i;
3663
3664         switch (stringset) {
3665         case ETH_SS_STATS:
3666                 for (i = 0; i < ARRAY_SIZE(atl1_gstrings_stats); i++) {
3667                         memcpy(p, atl1_gstrings_stats[i].stat_string,
3668                                 ETH_GSTRING_LEN);
3669                         p += ETH_GSTRING_LEN;
3670                 }
3671                 break;
3672         }
3673 }
3674
3675 static int atl1_nway_reset(struct net_device *netdev)
3676 {
3677         struct atl1_adapter *adapter = netdev_priv(netdev);
3678         struct atl1_hw *hw = &adapter->hw;
3679
3680         if (netif_running(netdev)) {
3681                 u16 phy_data;
3682                 atl1_down(adapter);
3683
3684                 if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3685                         hw->media_type == MEDIA_TYPE_1000M_FULL) {
3686                         phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
3687                 } else {
3688                         switch (hw->media_type) {
3689                         case MEDIA_TYPE_100M_FULL:
3690                                 phy_data = MII_CR_FULL_DUPLEX |
3691                                         MII_CR_SPEED_100 | MII_CR_RESET;
3692                                 break;
3693                         case MEDIA_TYPE_100M_HALF:
3694                                 phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
3695                                 break;
3696                         case MEDIA_TYPE_10M_FULL:
3697                                 phy_data = MII_CR_FULL_DUPLEX |
3698                                         MII_CR_SPEED_10 | MII_CR_RESET;
3699                                 break;
3700                         default:
3701                                 /* MEDIA_TYPE_10M_HALF */
3702                                 phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
3703                         }
3704                 }
3705                 atl1_write_phy_reg(hw, MII_BMCR, phy_data);
3706                 atl1_up(adapter);
3707         }
3708         return 0;
3709 }
3710
3711 const struct ethtool_ops atl1_ethtool_ops = {
3712         .get_settings           = atl1_get_settings,
3713         .set_settings           = atl1_set_settings,
3714         .get_drvinfo            = atl1_get_drvinfo,
3715         .get_wol                = atl1_get_wol,
3716         .set_wol                = atl1_set_wol,
3717         .get_msglevel           = atl1_get_msglevel,
3718         .set_msglevel           = atl1_set_msglevel,
3719         .get_regs_len           = atl1_get_regs_len,
3720         .get_regs               = atl1_get_regs,
3721         .get_ringparam          = atl1_get_ringparam,
3722         .set_ringparam          = atl1_set_ringparam,
3723         .get_pauseparam         = atl1_get_pauseparam,
3724         .set_pauseparam         = atl1_set_pauseparam,
3725         .get_rx_csum            = atl1_get_rx_csum,
3726         .set_tx_csum            = ethtool_op_set_tx_hw_csum,
3727         .get_link               = ethtool_op_get_link,
3728         .set_sg                 = ethtool_op_set_sg,
3729         .get_strings            = atl1_get_strings,
3730         .nway_reset             = atl1_nway_reset,
3731         .get_ethtool_stats      = atl1_get_ethtool_stats,
3732         .get_sset_count         = atl1_get_sset_count,
3733         .set_tso                = ethtool_op_set_tso,
3734 };