2 * linux/drivers/mtd/onenand/onenand_base.c
4 * Copyright (C) 2005-2007 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
8 * Adrian Hunter <ext-adrian.hunter@nokia.com>:
9 * auto-placement support, read-while load support, various fixes
10 * Copyright (C) Nokia Corporation, 2007
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/sched.h>
21 #include <linux/interrupt.h>
22 #include <linux/jiffies.h>
23 #include <linux/mtd/mtd.h>
24 #include <linux/mtd/onenand.h>
25 #include <linux/mtd/partitions.h>
30 * onenand_oob_64 - oob info for large (2KB) page
32 static struct nand_ecclayout onenand_oob_64 = {
41 {2, 3}, {14, 2}, {18, 3}, {30, 2},
42 {34, 3}, {46, 2}, {50, 3}, {62, 2}
47 * onenand_oob_32 - oob info for middle (1KB) page
49 static struct nand_ecclayout onenand_oob_32 = {
55 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
58 static const unsigned char ffchars[] = {
59 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
60 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
61 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
62 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
63 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
64 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
65 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
66 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
70 * onenand_readw - [OneNAND Interface] Read OneNAND register
71 * @param addr address to read
73 * Read OneNAND register
75 static unsigned short onenand_readw(void __iomem *addr)
81 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
82 * @param value value to write
83 * @param addr address to write
85 * Write OneNAND register with value
87 static void onenand_writew(unsigned short value, void __iomem *addr)
93 * onenand_block_address - [DEFAULT] Get block address
94 * @param this onenand chip data structure
95 * @param block the block
96 * @return translated block address if DDP, otherwise same
98 * Setup Start Address 1 Register (F100h)
100 static int onenand_block_address(struct onenand_chip *this, int block)
102 /* Device Flash Core select, NAND Flash Block Address */
103 if (block & this->density_mask)
104 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
110 * onenand_bufferram_address - [DEFAULT] Get bufferram address
111 * @param this onenand chip data structure
112 * @param block the block
113 * @return set DBS value if DDP, otherwise 0
115 * Setup Start Address 2 Register (F101h) for DDP
117 static int onenand_bufferram_address(struct onenand_chip *this, int block)
119 /* Device BufferRAM Select */
120 if (block & this->density_mask)
121 return ONENAND_DDP_CHIP1;
123 return ONENAND_DDP_CHIP0;
127 * onenand_page_address - [DEFAULT] Get page address
128 * @param page the page address
129 * @param sector the sector address
130 * @return combined page and sector address
132 * Setup Start Address 8 Register (F107h)
134 static int onenand_page_address(int page, int sector)
136 /* Flash Page Address, Flash Sector Address */
139 fpa = page & ONENAND_FPA_MASK;
140 fsa = sector & ONENAND_FSA_MASK;
142 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
146 * onenand_buffer_address - [DEFAULT] Get buffer address
147 * @param dataram1 DataRAM index
148 * @param sectors the sector address
149 * @param count the number of sectors
150 * @return the start buffer value
152 * Setup Start Buffer Register (F200h)
154 static int onenand_buffer_address(int dataram1, int sectors, int count)
158 /* BufferRAM Sector Address */
159 bsa = sectors & ONENAND_BSA_MASK;
162 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
164 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
166 /* BufferRAM Sector Count */
167 bsc = count & ONENAND_BSC_MASK;
169 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
173 * onenand_command - [DEFAULT] Send command to OneNAND device
174 * @param mtd MTD device structure
175 * @param cmd the command to be sent
176 * @param addr offset to read from or write to
177 * @param len number of bytes to read or write
179 * Send command to OneNAND device. This function is used for middle/large page
180 * devices (1KB/2KB Bytes per page)
182 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
184 struct onenand_chip *this = mtd->priv;
185 int value, readcmd = 0, block_cmd = 0;
188 /* Address translation */
190 case ONENAND_CMD_UNLOCK:
191 case ONENAND_CMD_LOCK:
192 case ONENAND_CMD_LOCK_TIGHT:
193 case ONENAND_CMD_UNLOCK_ALL:
198 case ONENAND_CMD_ERASE:
199 case ONENAND_CMD_BUFFERRAM:
200 case ONENAND_CMD_OTP_ACCESS:
202 block = (int) (addr >> this->erase_shift);
207 block = (int) (addr >> this->erase_shift);
208 page = (int) (addr >> this->page_shift);
209 page &= this->page_mask;
213 /* NOTE: The setting order of the registers is very important! */
214 if (cmd == ONENAND_CMD_BUFFERRAM) {
215 /* Select DataRAM for DDP */
216 value = onenand_bufferram_address(this, block);
217 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
219 /* Switch to the next data buffer */
220 ONENAND_SET_NEXT_BUFFERRAM(this);
226 /* Write 'DFS, FBA' of Flash */
227 value = onenand_block_address(this, block);
228 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
231 /* Select DataRAM for DDP */
232 value = onenand_bufferram_address(this, block);
233 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
238 /* Now we use page size operation */
239 int sectors = 4, count = 4;
243 case ONENAND_CMD_READ:
244 case ONENAND_CMD_READOOB:
245 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
250 dataram = ONENAND_CURRENT_BUFFERRAM(this);
254 /* Write 'FPA, FSA' of Flash */
255 value = onenand_page_address(page, sectors);
256 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
258 /* Write 'BSA, BSC' of DataRAM */
259 value = onenand_buffer_address(dataram, sectors, count);
260 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
263 /* Select DataRAM for DDP */
264 value = onenand_bufferram_address(this, block);
265 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
269 /* Interrupt clear */
270 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
273 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
279 * onenand_wait - [DEFAULT] wait until the command is done
280 * @param mtd MTD device structure
281 * @param state state to select the max. timeout value
283 * Wait for command done. This applies to all OneNAND command
284 * Read can take up to 30us, erase up to 2ms and program up to 350us
285 * according to general OneNAND specs
287 static int onenand_wait(struct mtd_info *mtd, int state)
289 struct onenand_chip * this = mtd->priv;
290 unsigned long timeout;
291 unsigned int flags = ONENAND_INT_MASTER;
292 unsigned int interrupt = 0;
295 /* The 20 msec is enough */
296 timeout = jiffies + msecs_to_jiffies(20);
297 while (time_before(jiffies, timeout)) {
298 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
300 if (interrupt & flags)
303 if (state != FL_READING)
306 /* To get correct interrupt status in timeout case */
307 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
309 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
311 if (ctrl & ONENAND_CTRL_ERROR) {
312 printk(KERN_ERR "onenand_wait: controller error = 0x%04x\n", ctrl);
313 if (ctrl & ONENAND_CTRL_LOCK)
314 printk(KERN_ERR "onenand_wait: it's locked error.\n");
318 if (interrupt & ONENAND_INT_READ) {
319 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
321 printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc);
322 if (ecc & ONENAND_ECC_2BIT_ALL) {
323 mtd->ecc_stats.failed++;
325 } else if (ecc & ONENAND_ECC_1BIT_ALL)
326 mtd->ecc_stats.corrected++;
328 } else if (state == FL_READING) {
329 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
337 * onenand_interrupt - [DEFAULT] onenand interrupt handler
338 * @param irq onenand interrupt number
339 * @param dev_id interrupt data
343 static irqreturn_t onenand_interrupt(int irq, void *data)
345 struct onenand_chip *this = (struct onenand_chip *) data;
347 /* To handle shared interrupt */
348 if (!this->complete.done)
349 complete(&this->complete);
355 * onenand_interrupt_wait - [DEFAULT] wait until the command is done
356 * @param mtd MTD device structure
357 * @param state state to select the max. timeout value
359 * Wait for command done.
361 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
363 struct onenand_chip *this = mtd->priv;
365 wait_for_completion(&this->complete);
367 return onenand_wait(mtd, state);
371 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
372 * @param mtd MTD device structure
373 * @param state state to select the max. timeout value
375 * Try interrupt based wait (It is used one-time)
377 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
379 struct onenand_chip *this = mtd->priv;
380 unsigned long remain, timeout;
382 /* We use interrupt wait first */
383 this->wait = onenand_interrupt_wait;
385 timeout = msecs_to_jiffies(100);
386 remain = wait_for_completion_timeout(&this->complete, timeout);
388 printk(KERN_INFO "OneNAND: There's no interrupt. "
389 "We use the normal wait\n");
391 /* Release the irq */
392 free_irq(this->irq, this);
394 this->wait = onenand_wait;
397 return onenand_wait(mtd, state);
401 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
402 * @param mtd MTD device structure
404 * There's two method to wait onenand work
405 * 1. polling - read interrupt status register
406 * 2. interrupt - use the kernel interrupt method
408 static void onenand_setup_wait(struct mtd_info *mtd)
410 struct onenand_chip *this = mtd->priv;
413 init_completion(&this->complete);
415 if (this->irq <= 0) {
416 this->wait = onenand_wait;
420 if (request_irq(this->irq, &onenand_interrupt,
421 IRQF_SHARED, "onenand", this)) {
422 /* If we can't get irq, use the normal wait */
423 this->wait = onenand_wait;
427 /* Enable interrupt */
428 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
429 syscfg |= ONENAND_SYS_CFG1_IOBE;
430 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
432 this->wait = onenand_try_interrupt_wait;
436 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
437 * @param mtd MTD data structure
438 * @param area BufferRAM area
439 * @return offset given area
441 * Return BufferRAM offset given area
443 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
445 struct onenand_chip *this = mtd->priv;
447 if (ONENAND_CURRENT_BUFFERRAM(this)) {
448 if (area == ONENAND_DATARAM)
449 return mtd->writesize;
450 if (area == ONENAND_SPARERAM)
458 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
459 * @param mtd MTD data structure
460 * @param area BufferRAM area
461 * @param buffer the databuffer to put/get data
462 * @param offset offset to read from or write to
463 * @param count number of bytes to read/write
465 * Read the BufferRAM area
467 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
468 unsigned char *buffer, int offset, size_t count)
470 struct onenand_chip *this = mtd->priv;
471 void __iomem *bufferram;
473 bufferram = this->base + area;
475 bufferram += onenand_bufferram_offset(mtd, area);
477 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
480 /* Align with word(16-bit) size */
483 /* Read word and save byte */
484 word = this->read_word(bufferram + offset + count);
485 buffer[count] = (word & 0xff);
488 memcpy(buffer, bufferram + offset, count);
494 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
495 * @param mtd MTD data structure
496 * @param area BufferRAM area
497 * @param buffer the databuffer to put/get data
498 * @param offset offset to read from or write to
499 * @param count number of bytes to read/write
501 * Read the BufferRAM area with Sync. Burst Mode
503 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
504 unsigned char *buffer, int offset, size_t count)
506 struct onenand_chip *this = mtd->priv;
507 void __iomem *bufferram;
509 bufferram = this->base + area;
511 bufferram += onenand_bufferram_offset(mtd, area);
513 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
515 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
518 /* Align with word(16-bit) size */
521 /* Read word and save byte */
522 word = this->read_word(bufferram + offset + count);
523 buffer[count] = (word & 0xff);
526 memcpy(buffer, bufferram + offset, count);
528 this->mmcontrol(mtd, 0);
534 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
535 * @param mtd MTD data structure
536 * @param area BufferRAM area
537 * @param buffer the databuffer to put/get data
538 * @param offset offset to read from or write to
539 * @param count number of bytes to read/write
541 * Write the BufferRAM area
543 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
544 const unsigned char *buffer, int offset, size_t count)
546 struct onenand_chip *this = mtd->priv;
547 void __iomem *bufferram;
549 bufferram = this->base + area;
551 bufferram += onenand_bufferram_offset(mtd, area);
553 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
557 /* Align with word(16-bit) size */
560 /* Calculate byte access offset */
561 byte_offset = offset + count;
563 /* Read word and save byte */
564 word = this->read_word(bufferram + byte_offset);
565 word = (word & ~0xff) | buffer[count];
566 this->write_word(word, bufferram + byte_offset);
569 memcpy(bufferram + offset, buffer, count);
575 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
576 * @param mtd MTD data structure
577 * @param addr address to check
578 * @return 1 if there are valid data, otherwise 0
580 * Check bufferram if there is data we required
582 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
584 struct onenand_chip *this = mtd->priv;
585 int blockpage, found = 0;
588 blockpage = (int) (addr >> this->page_shift);
590 /* Is there valid data? */
591 i = ONENAND_CURRENT_BUFFERRAM(this);
592 if (this->bufferram[i].blockpage == blockpage)
595 /* Check another BufferRAM */
596 i = ONENAND_NEXT_BUFFERRAM(this);
597 if (this->bufferram[i].blockpage == blockpage) {
598 ONENAND_SET_NEXT_BUFFERRAM(this);
603 if (found && ONENAND_IS_DDP(this)) {
604 /* Select DataRAM for DDP */
605 int block = (int) (addr >> this->erase_shift);
606 int value = onenand_bufferram_address(this, block);
607 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
614 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
615 * @param mtd MTD data structure
616 * @param addr address to update
617 * @param valid valid flag
619 * Update BufferRAM information
621 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
624 struct onenand_chip *this = mtd->priv;
628 blockpage = (int) (addr >> this->page_shift);
630 /* Invalidate another BufferRAM */
631 i = ONENAND_NEXT_BUFFERRAM(this);
632 if (this->bufferram[i].blockpage == blockpage)
633 this->bufferram[i].blockpage = -1;
635 /* Update BufferRAM */
636 i = ONENAND_CURRENT_BUFFERRAM(this);
638 this->bufferram[i].blockpage = blockpage;
640 this->bufferram[i].blockpage = -1;
644 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
645 * @param mtd MTD data structure
646 * @param addr start address to invalidate
647 * @param len length to invalidate
649 * Invalidate BufferRAM information
651 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
654 struct onenand_chip *this = mtd->priv;
656 loff_t end_addr = addr + len;
658 /* Invalidate BufferRAM */
659 for (i = 0; i < MAX_BUFFERRAM; i++) {
660 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
661 if (buf_addr >= addr && buf_addr < end_addr)
662 this->bufferram[i].blockpage = -1;
667 * onenand_get_device - [GENERIC] Get chip for selected access
668 * @param mtd MTD device structure
669 * @param new_state the state which is requested
671 * Get the device and lock it for exclusive access
673 static int onenand_get_device(struct mtd_info *mtd, int new_state)
675 struct onenand_chip *this = mtd->priv;
676 DECLARE_WAITQUEUE(wait, current);
679 * Grab the lock and see if the device is available
682 spin_lock(&this->chip_lock);
683 if (this->state == FL_READY) {
684 this->state = new_state;
685 spin_unlock(&this->chip_lock);
688 if (new_state == FL_PM_SUSPENDED) {
689 spin_unlock(&this->chip_lock);
690 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
692 set_current_state(TASK_UNINTERRUPTIBLE);
693 add_wait_queue(&this->wq, &wait);
694 spin_unlock(&this->chip_lock);
696 remove_wait_queue(&this->wq, &wait);
703 * onenand_release_device - [GENERIC] release chip
704 * @param mtd MTD device structure
706 * Deselect, release chip lock and wake up anyone waiting on the device
708 static void onenand_release_device(struct mtd_info *mtd)
710 struct onenand_chip *this = mtd->priv;
712 /* Release the chip */
713 spin_lock(&this->chip_lock);
714 this->state = FL_READY;
716 spin_unlock(&this->chip_lock);
720 * onenand_read - [MTD Interface] Read data from flash
721 * @param mtd MTD device structure
722 * @param from offset to read from
723 * @param len number of bytes to read
724 * @param retlen pointer to variable to store the number of read bytes
725 * @param buf the databuffer to put data
729 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
730 size_t *retlen, u_char *buf)
732 struct onenand_chip *this = mtd->priv;
733 struct mtd_ecc_stats stats;
734 int read = 0, column;
736 int ret = 0, boundary = 0;
738 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
740 /* Do not allow reads past end of device */
741 if ((from + len) > mtd->size) {
742 printk(KERN_ERR "onenand_read: Attempt read beyond end of device\n");
747 /* Grab the lock and see if the device is available */
748 onenand_get_device(mtd, FL_READING);
750 stats = mtd->ecc_stats;
752 /* Read-while-load method */
754 /* Do first load to bufferRAM */
756 if (!onenand_check_bufferram(mtd, from)) {
757 this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
758 ret = this->wait(mtd, FL_READING);
759 onenand_update_bufferram(mtd, from, !ret);
763 thislen = min_t(int, mtd->writesize, len - read);
764 column = from & (mtd->writesize - 1);
765 if (column + thislen > mtd->writesize)
766 thislen = mtd->writesize - column;
769 /* If there is more to load then start next load */
771 if (read + thislen < len) {
772 this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
774 * Chip boundary handling in DDP
775 * Now we issued chip 1 read and pointed chip 1
776 * bufferam so we have to point chip 0 bufferam.
778 if (ONENAND_IS_DDP(this) &&
779 unlikely(from == (this->chipsize >> 1))) {
780 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
784 ONENAND_SET_PREV_BUFFERRAM(this);
786 /* While load is going, read from last bufferRAM */
787 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
788 /* See if we are done */
792 /* Set up for next read from bufferRAM */
793 if (unlikely(boundary))
794 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
795 ONENAND_SET_NEXT_BUFFERRAM(this);
797 thislen = min_t(int, mtd->writesize, len - read);
800 /* Now wait for load */
801 ret = this->wait(mtd, FL_READING);
802 onenand_update_bufferram(mtd, from, !ret);
805 /* Deselect and wake up anyone waiting on the device */
806 onenand_release_device(mtd);
809 * Return success, if no ECC failures, else -EBADMSG
810 * fs driver will take care of that, because
811 * retlen == desired len and result == -EBADMSG
815 if (mtd->ecc_stats.failed - stats.failed)
821 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
825 * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
826 * @param mtd MTD device structure
827 * @param buf destination address
828 * @param column oob offset to read from
829 * @param thislen oob length to read
831 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
834 struct onenand_chip *this = mtd->priv;
835 struct nand_oobfree *free;
836 int readcol = column;
837 int readend = column + thislen;
840 uint8_t *oob_buf = this->oob_buf;
842 free = this->ecclayout->oobfree;
843 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
844 if (readcol >= lastgap)
845 readcol += free->offset - lastgap;
846 if (readend >= lastgap)
847 readend += free->offset - lastgap;
848 lastgap = free->offset + free->length;
850 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
851 free = this->ecclayout->oobfree;
852 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
853 int free_end = free->offset + free->length;
854 if (free->offset < readend && free_end > readcol) {
855 int st = max_t(int,free->offset,readcol);
856 int ed = min_t(int,free_end,readend);
858 memcpy(buf, oob_buf + st, n);
860 } else if (column == 0)
867 * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
868 * @param mtd MTD device structure
869 * @param from offset to read from
870 * @param len number of bytes to read
871 * @param retlen pointer to variable to store the number of read bytes
872 * @param buf the databuffer to put data
873 * @param mode operation mode
875 * OneNAND read out-of-band data from the spare area
877 static int onenand_do_read_oob(struct mtd_info *mtd, loff_t from,
878 struct mtd_oob_ops *ops)
880 struct onenand_chip *this = mtd->priv;
881 int read = 0, thislen, column, oobsize;
882 size_t len = ops->ooblen;
883 mtd_oob_mode_t mode = ops->mode;
884 u_char *buf = ops->oobbuf;
887 from += ops->ooboffs;
889 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
891 /* Initialize return length value */
894 if (mode == MTD_OOB_AUTO)
895 oobsize = this->ecclayout->oobavail;
897 oobsize = mtd->oobsize;
899 column = from & (mtd->oobsize - 1);
901 if (unlikely(column >= oobsize)) {
902 printk(KERN_ERR "onenand_read_oob: Attempted to start read outside oob\n");
906 /* Do not allow reads past end of device */
907 if (unlikely(from >= mtd->size ||
908 column + len > ((mtd->size >> this->page_shift) -
909 (from >> this->page_shift)) * oobsize)) {
910 printk(KERN_ERR "onenand_read_oob: Attempted to read beyond end of device\n");
914 /* Grab the lock and see if the device is available */
915 onenand_get_device(mtd, FL_READING);
920 thislen = oobsize - column;
921 thislen = min_t(int, thislen, len);
923 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
925 onenand_update_bufferram(mtd, from, 0);
927 ret = this->wait(mtd, FL_READING);
928 /* First copy data and check return value for ECC handling */
930 if (mode == MTD_OOB_AUTO)
931 onenand_transfer_auto_oob(mtd, buf, column, thislen);
933 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
936 printk(KERN_ERR "onenand_read_oob: read failed = 0x%x\n", ret);
950 from += mtd->writesize;
955 /* Deselect and wake up anyone waiting on the device */
956 onenand_release_device(mtd);
958 ops->oobretlen = read;
963 * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
964 * @param mtd: MTD device structure
965 * @param from: offset to read from
966 * @param ops: oob operation description structure
968 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
969 struct mtd_oob_ops *ops)
976 /* Not implemented yet */
980 return onenand_do_read_oob(mtd, from, ops);
984 * onenand_bbt_wait - [DEFAULT] wait until the command is done
985 * @param mtd MTD device structure
986 * @param state state to select the max. timeout value
988 * Wait for command done.
990 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
992 struct onenand_chip *this = mtd->priv;
993 unsigned long timeout;
994 unsigned int interrupt;
997 /* The 20 msec is enough */
998 timeout = jiffies + msecs_to_jiffies(20);
999 while (time_before(jiffies, timeout)) {
1000 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1001 if (interrupt & ONENAND_INT_MASTER)
1004 /* To get correct interrupt status in timeout case */
1005 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1006 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1008 if (ctrl & ONENAND_CTRL_ERROR) {
1009 printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl);
1010 /* Initial bad block case */
1011 if (ctrl & ONENAND_CTRL_LOAD)
1012 return ONENAND_BBT_READ_ERROR;
1013 return ONENAND_BBT_READ_FATAL_ERROR;
1016 if (interrupt & ONENAND_INT_READ) {
1017 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
1018 if (ecc & ONENAND_ECC_2BIT_ALL)
1019 return ONENAND_BBT_READ_ERROR;
1021 printk(KERN_ERR "onenand_bbt_wait: read timeout!"
1022 "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
1023 return ONENAND_BBT_READ_FATAL_ERROR;
1030 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1031 * @param mtd MTD device structure
1032 * @param from offset to read from
1033 * @param ops oob operation description structure
1035 * OneNAND read out-of-band data from the spare area for bbt scan
1037 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1038 struct mtd_oob_ops *ops)
1040 struct onenand_chip *this = mtd->priv;
1041 int read = 0, thislen, column;
1043 size_t len = ops->ooblen;
1044 u_char *buf = ops->oobbuf;
1046 DEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len);
1048 /* Initialize return value */
1051 /* Do not allow reads past end of device */
1052 if (unlikely((from + len) > mtd->size)) {
1053 printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
1054 return ONENAND_BBT_READ_FATAL_ERROR;
1057 /* Grab the lock and see if the device is available */
1058 onenand_get_device(mtd, FL_READING);
1060 column = from & (mtd->oobsize - 1);
1062 while (read < len) {
1065 thislen = mtd->oobsize - column;
1066 thislen = min_t(int, thislen, len);
1068 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
1070 onenand_update_bufferram(mtd, from, 0);
1072 ret = onenand_bbt_wait(mtd, FL_READING);
1076 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1085 /* Update Page size */
1086 from += mtd->writesize;
1091 /* Deselect and wake up anyone waiting on the device */
1092 onenand_release_device(mtd);
1094 ops->oobretlen = read;
1098 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1100 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1101 * @param mtd MTD device structure
1102 * @param buf the databuffer to verify
1103 * @param to offset to read from
1106 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1108 struct onenand_chip *this = mtd->priv;
1112 this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
1113 onenand_update_bufferram(mtd, to, 0);
1114 status = this->wait(mtd, FL_READING);
1118 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1119 for (i = 0; i < mtd->oobsize; i++)
1120 if (buf[i] != 0xFF && buf[i] != oobbuf[i])
1127 * onenand_verify - [GENERIC] verify the chip contents after a write
1128 * @param mtd MTD device structure
1129 * @param buf the databuffer to verify
1130 * @param addr offset to read from
1131 * @param len number of bytes to read and compare
1134 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1136 struct onenand_chip *this = mtd->priv;
1137 void __iomem *dataram;
1139 int thislen, column;
1142 thislen = min_t(int, mtd->writesize, len);
1143 column = addr & (mtd->writesize - 1);
1144 if (column + thislen > mtd->writesize)
1145 thislen = mtd->writesize - column;
1147 this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
1149 onenand_update_bufferram(mtd, addr, 0);
1151 ret = this->wait(mtd, FL_READING);
1155 onenand_update_bufferram(mtd, addr, 1);
1157 dataram = this->base + ONENAND_DATARAM;
1158 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1160 if (memcmp(buf, dataram + column, thislen))
1171 #define onenand_verify(...) (0)
1172 #define onenand_verify_oob(...) (0)
1175 #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
1178 * onenand_write - [MTD Interface] write buffer to FLASH
1179 * @param mtd MTD device structure
1180 * @param to offset to write to
1181 * @param len number of bytes to write
1182 * @param retlen pointer to variable to store the number of written bytes
1183 * @param buf the data to write
1187 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
1188 size_t *retlen, const u_char *buf)
1190 struct onenand_chip *this = mtd->priv;
1193 int column, subpage;
1195 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1197 /* Initialize retlen, in case of early exit */
1200 /* Do not allow writes past end of device */
1201 if (unlikely((to + len) > mtd->size)) {
1202 printk(KERN_ERR "onenand_write: Attempt write to past end of device\n");
1206 /* Reject writes, which are not page aligned */
1207 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
1208 printk(KERN_ERR "onenand_write: Attempt to write not page aligned data\n");
1212 column = to & (mtd->writesize - 1);
1214 /* Grab the lock and see if the device is available */
1215 onenand_get_device(mtd, FL_WRITING);
1217 /* Loop until all data write */
1218 while (written < len) {
1219 int thislen = min_t(int, mtd->writesize - column, len - written);
1220 u_char *wbuf = (u_char *) buf;
1224 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1226 /* Partial page write */
1227 subpage = thislen < mtd->writesize;
1229 memset(this->page_buf, 0xff, mtd->writesize);
1230 memcpy(this->page_buf + column, buf, thislen);
1231 wbuf = this->page_buf;
1234 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1235 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1237 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1239 ret = this->wait(mtd, FL_WRITING);
1241 /* In partial page write we don't update bufferram */
1242 onenand_update_bufferram(mtd, to, !ret && !subpage);
1245 printk(KERN_ERR "onenand_write: write filaed %d\n", ret);
1249 /* Only check verify write turn on */
1250 ret = onenand_verify(mtd, (u_char *) wbuf, to, thislen);
1252 printk(KERN_ERR "onenand_write: verify failed %d\n", ret);
1266 /* Deselect and wake up anyone waiting on the device */
1267 onenand_release_device(mtd);
1275 * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1276 * @param mtd MTD device structure
1277 * @param oob_buf oob buffer
1278 * @param buf source address
1279 * @param column oob offset to write to
1280 * @param thislen oob length to write
1282 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1283 const u_char *buf, int column, int thislen)
1285 struct onenand_chip *this = mtd->priv;
1286 struct nand_oobfree *free;
1287 int writecol = column;
1288 int writeend = column + thislen;
1292 free = this->ecclayout->oobfree;
1293 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1294 if (writecol >= lastgap)
1295 writecol += free->offset - lastgap;
1296 if (writeend >= lastgap)
1297 writeend += free->offset - lastgap;
1298 lastgap = free->offset + free->length;
1300 free = this->ecclayout->oobfree;
1301 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1302 int free_end = free->offset + free->length;
1303 if (free->offset < writeend && free_end > writecol) {
1304 int st = max_t(int,free->offset,writecol);
1305 int ed = min_t(int,free_end,writeend);
1307 memcpy(oob_buf + st, buf, n);
1309 } else if (column == 0)
1316 * onenand_do_write_oob - [Internal] OneNAND write out-of-band
1317 * @param mtd MTD device structure
1318 * @param to offset to write to
1319 * @param len number of bytes to write
1320 * @param retlen pointer to variable to store the number of written bytes
1321 * @param buf the data to write
1322 * @param mode operation mode
1324 * OneNAND write out-of-band
1326 static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to,
1327 struct mtd_oob_ops *ops)
1329 struct onenand_chip *this = mtd->priv;
1330 int column, ret = 0, oobsize;
1333 size_t len = ops->ooblen;
1334 const u_char *buf = ops->oobbuf;
1335 mtd_oob_mode_t mode = ops->mode;
1339 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1341 /* Initialize retlen, in case of early exit */
1344 if (mode == MTD_OOB_AUTO)
1345 oobsize = this->ecclayout->oobavail;
1347 oobsize = mtd->oobsize;
1349 column = to & (mtd->oobsize - 1);
1351 if (unlikely(column >= oobsize)) {
1352 printk(KERN_ERR "onenand_write_oob: Attempted to start write outside oob\n");
1356 /* For compatibility with NAND: Do not allow write past end of page */
1357 if (unlikely(column + len > oobsize)) {
1358 printk(KERN_ERR "onenand_write_oob: "
1359 "Attempt to write past end of page\n");
1363 /* Do not allow reads past end of device */
1364 if (unlikely(to >= mtd->size ||
1365 column + len > ((mtd->size >> this->page_shift) -
1366 (to >> this->page_shift)) * oobsize)) {
1367 printk(KERN_ERR "onenand_write_oob: Attempted to write past end of device\n");
1371 /* Grab the lock and see if the device is available */
1372 onenand_get_device(mtd, FL_WRITING);
1374 oobbuf = this->oob_buf;
1376 /* Loop until all data write */
1377 while (written < len) {
1378 int thislen = min_t(int, oobsize, len - written);
1382 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1384 /* We send data to spare ram with oobsize
1385 * to prevent byte access */
1386 memset(oobbuf, 0xff, mtd->oobsize);
1387 if (mode == MTD_OOB_AUTO)
1388 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
1390 memcpy(oobbuf + column, buf, thislen);
1391 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1393 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1395 onenand_update_bufferram(mtd, to, 0);
1397 ret = this->wait(mtd, FL_WRITING);
1399 printk(KERN_ERR "onenand_write_oob: write failed %d\n", ret);
1403 ret = onenand_verify_oob(mtd, oobbuf, to);
1405 printk(KERN_ERR "onenand_write_oob: verify failed %d\n", ret);
1413 to += mtd->writesize;
1418 /* Deselect and wake up anyone waiting on the device */
1419 onenand_release_device(mtd);
1421 ops->oobretlen = written;
1427 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1428 * @param mtd: MTD device structure
1429 * @param to: offset to write
1430 * @param ops: oob operation description structure
1432 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1433 struct mtd_oob_ops *ops)
1435 switch (ops->mode) {
1440 /* Not implemented yet */
1444 return onenand_do_write_oob(mtd, to, ops);
1448 * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1449 * @param mtd MTD device structure
1450 * @param ofs offset from device start
1451 * @param getchip 0, if the chip is already selected
1452 * @param allowbbt 1, if its allowed to access the bbt area
1454 * Check, if the block is bad. Either by reading the bad block table or
1455 * calling of the scan function.
1457 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1459 struct onenand_chip *this = mtd->priv;
1460 struct bbm_info *bbm = this->bbm;
1462 /* Return info from the table */
1463 return bbm->isbad_bbt(mtd, ofs, allowbbt);
1467 * onenand_erase - [MTD Interface] erase block(s)
1468 * @param mtd MTD device structure
1469 * @param instr erase instruction
1471 * Erase one ore more blocks
1473 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1475 struct onenand_chip *this = mtd->priv;
1476 unsigned int block_size;
1481 DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1483 block_size = (1 << this->erase_shift);
1485 /* Start address must align on block boundary */
1486 if (unlikely(instr->addr & (block_size - 1))) {
1487 printk(KERN_ERR "onenand_erase: Unaligned address\n");
1491 /* Length must align on block boundary */
1492 if (unlikely(instr->len & (block_size - 1))) {
1493 printk(KERN_ERR "onenand_erase: Length not block aligned\n");
1497 /* Do not allow erase past end of device */
1498 if (unlikely((instr->len + instr->addr) > mtd->size)) {
1499 printk(KERN_ERR "onenand_erase: Erase past end of device\n");
1503 instr->fail_addr = 0xffffffff;
1505 /* Grab the lock and see if the device is available */
1506 onenand_get_device(mtd, FL_ERASING);
1508 /* Loop throught the pages */
1512 instr->state = MTD_ERASING;
1517 /* Check if we have a bad block, we do not erase bad blocks */
1518 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1519 printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1520 instr->state = MTD_ERASE_FAILED;
1524 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1526 onenand_invalidate_bufferram(mtd, addr, block_size);
1528 ret = this->wait(mtd, FL_ERASING);
1529 /* Check, if it is write protected */
1531 printk(KERN_ERR "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1532 instr->state = MTD_ERASE_FAILED;
1533 instr->fail_addr = addr;
1541 instr->state = MTD_ERASE_DONE;
1545 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1546 /* Do call back function */
1548 mtd_erase_callback(instr);
1550 /* Deselect and wake up anyone waiting on the device */
1551 onenand_release_device(mtd);
1557 * onenand_sync - [MTD Interface] sync
1558 * @param mtd MTD device structure
1560 * Sync is actually a wait for chip ready function
1562 static void onenand_sync(struct mtd_info *mtd)
1564 DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1566 /* Grab the lock and see if the device is available */
1567 onenand_get_device(mtd, FL_SYNCING);
1569 /* Release it and go back */
1570 onenand_release_device(mtd);
1574 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1575 * @param mtd MTD device structure
1576 * @param ofs offset relative to mtd start
1578 * Check whether the block is bad
1580 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1582 /* Check for invalid offset */
1583 if (ofs > mtd->size)
1586 return onenand_block_checkbad(mtd, ofs, 1, 0);
1590 * onenand_default_block_markbad - [DEFAULT] mark a block bad
1591 * @param mtd MTD device structure
1592 * @param ofs offset from device start
1594 * This is the default implementation, which can be overridden by
1595 * a hardware specific driver.
1597 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1599 struct onenand_chip *this = mtd->priv;
1600 struct bbm_info *bbm = this->bbm;
1601 u_char buf[2] = {0, 0};
1602 struct mtd_oob_ops ops = {
1603 .mode = MTD_OOB_PLACE,
1610 /* Get block number */
1611 block = ((int) ofs) >> bbm->bbt_erase_shift;
1613 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1615 /* We write two bytes, so we dont have to mess with 16 bit access */
1616 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1617 return onenand_do_write_oob(mtd, ofs, &ops);
1621 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1622 * @param mtd MTD device structure
1623 * @param ofs offset relative to mtd start
1625 * Mark the block as bad
1627 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1629 struct onenand_chip *this = mtd->priv;
1632 ret = onenand_block_isbad(mtd, ofs);
1634 /* If it was bad already, return success and do nothing */
1640 return this->block_markbad(mtd, ofs);
1644 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1645 * @param mtd MTD device structure
1646 * @param ofs offset relative to mtd start
1647 * @param len number of bytes to lock or unlock
1648 * @param cmd lock or unlock command
1650 * Lock or unlock one or more blocks
1652 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1654 struct onenand_chip *this = mtd->priv;
1655 int start, end, block, value, status;
1658 start = ofs >> this->erase_shift;
1659 end = len >> this->erase_shift;
1661 if (cmd == ONENAND_CMD_LOCK)
1662 wp_status_mask = ONENAND_WP_LS;
1664 wp_status_mask = ONENAND_WP_US;
1666 /* Continuous lock scheme */
1667 if (this->options & ONENAND_HAS_CONT_LOCK) {
1668 /* Set start block address */
1669 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1670 /* Set end block address */
1671 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1672 /* Write lock command */
1673 this->command(mtd, cmd, 0, 0);
1675 /* There's no return value */
1676 this->wait(mtd, FL_LOCKING);
1679 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1680 & ONENAND_CTRL_ONGO)
1683 /* Check lock status */
1684 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1685 if (!(status & wp_status_mask))
1686 printk(KERN_ERR "wp status = 0x%x\n", status);
1691 /* Block lock scheme */
1692 for (block = start; block < start + end; block++) {
1693 /* Set block address */
1694 value = onenand_block_address(this, block);
1695 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1696 /* Select DataRAM for DDP */
1697 value = onenand_bufferram_address(this, block);
1698 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1699 /* Set start block address */
1700 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1701 /* Write lock command */
1702 this->command(mtd, cmd, 0, 0);
1704 /* There's no return value */
1705 this->wait(mtd, FL_LOCKING);
1708 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1709 & ONENAND_CTRL_ONGO)
1712 /* Check lock status */
1713 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1714 if (!(status & wp_status_mask))
1715 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1722 * onenand_lock - [MTD Interface] Lock block(s)
1723 * @param mtd MTD device structure
1724 * @param ofs offset relative to mtd start
1725 * @param len number of bytes to unlock
1727 * Lock one or more blocks
1729 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1731 return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1735 * onenand_unlock - [MTD Interface] Unlock block(s)
1736 * @param mtd MTD device structure
1737 * @param ofs offset relative to mtd start
1738 * @param len number of bytes to unlock
1740 * Unlock one or more blocks
1742 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1744 return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1748 * onenand_check_lock_status - [OneNAND Interface] Check lock status
1749 * @param this onenand chip data structure
1753 static void onenand_check_lock_status(struct onenand_chip *this)
1755 unsigned int value, block, status;
1758 end = this->chipsize >> this->erase_shift;
1759 for (block = 0; block < end; block++) {
1760 /* Set block address */
1761 value = onenand_block_address(this, block);
1762 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1763 /* Select DataRAM for DDP */
1764 value = onenand_bufferram_address(this, block);
1765 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1766 /* Set start block address */
1767 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1769 /* Check lock status */
1770 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1771 if (!(status & ONENAND_WP_US))
1772 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1777 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1778 * @param mtd MTD device structure
1782 static int onenand_unlock_all(struct mtd_info *mtd)
1784 struct onenand_chip *this = mtd->priv;
1786 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1787 /* Set start block address */
1788 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1789 /* Write unlock command */
1790 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1792 /* There's no return value */
1793 this->wait(mtd, FL_LOCKING);
1796 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1797 & ONENAND_CTRL_ONGO)
1800 /* Workaround for all block unlock in DDP */
1801 if (ONENAND_IS_DDP(this)) {
1802 /* 1st block on another chip */
1803 loff_t ofs = this->chipsize >> 1;
1804 size_t len = mtd->erasesize;
1806 onenand_unlock(mtd, ofs, len);
1809 onenand_check_lock_status(this);
1814 onenand_unlock(mtd, 0x0, this->chipsize);
1819 #ifdef CONFIG_MTD_ONENAND_OTP
1821 /* Interal OTP operation */
1822 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1823 size_t *retlen, u_char *buf);
1826 * do_otp_read - [DEFAULT] Read OTP block area
1827 * @param mtd MTD device structure
1828 * @param from The offset to read
1829 * @param len number of bytes to read
1830 * @param retlen pointer to variable to store the number of readbytes
1831 * @param buf the databuffer to put/get data
1833 * Read OTP block area.
1835 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1836 size_t *retlen, u_char *buf)
1838 struct onenand_chip *this = mtd->priv;
1841 /* Enter OTP access mode */
1842 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1843 this->wait(mtd, FL_OTPING);
1845 ret = mtd->read(mtd, from, len, retlen, buf);
1847 /* Exit OTP access mode */
1848 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1849 this->wait(mtd, FL_RESETING);
1855 * do_otp_write - [DEFAULT] Write OTP block area
1856 * @param mtd MTD device structure
1857 * @param from The offset to write
1858 * @param len number of bytes to write
1859 * @param retlen pointer to variable to store the number of write bytes
1860 * @param buf the databuffer to put/get data
1862 * Write OTP block area.
1864 static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1865 size_t *retlen, u_char *buf)
1867 struct onenand_chip *this = mtd->priv;
1868 unsigned char *pbuf = buf;
1871 /* Force buffer page aligned */
1872 if (len < mtd->writesize) {
1873 memcpy(this->page_buf, buf, len);
1874 memset(this->page_buf + len, 0xff, mtd->writesize - len);
1875 pbuf = this->page_buf;
1876 len = mtd->writesize;
1879 /* Enter OTP access mode */
1880 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1881 this->wait(mtd, FL_OTPING);
1883 ret = mtd->write(mtd, from, len, retlen, pbuf);
1885 /* Exit OTP access mode */
1886 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1887 this->wait(mtd, FL_RESETING);
1893 * do_otp_lock - [DEFAULT] Lock OTP block area
1894 * @param mtd MTD device structure
1895 * @param from The offset to lock
1896 * @param len number of bytes to lock
1897 * @param retlen pointer to variable to store the number of lock bytes
1898 * @param buf the databuffer to put/get data
1900 * Lock OTP block area.
1902 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1903 size_t *retlen, u_char *buf)
1905 struct onenand_chip *this = mtd->priv;
1906 struct mtd_oob_ops ops = {
1907 .mode = MTD_OOB_PLACE,
1914 /* Enter OTP access mode */
1915 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1916 this->wait(mtd, FL_OTPING);
1918 ret = onenand_do_write_oob(mtd, from, &ops);
1920 *retlen = ops.oobretlen;
1922 /* Exit OTP access mode */
1923 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1924 this->wait(mtd, FL_RESETING);
1930 * onenand_otp_walk - [DEFAULT] Handle OTP operation
1931 * @param mtd MTD device structure
1932 * @param from The offset to read/write
1933 * @param len number of bytes to read/write
1934 * @param retlen pointer to variable to store the number of read bytes
1935 * @param buf the databuffer to put/get data
1936 * @param action do given action
1937 * @param mode specify user and factory
1939 * Handle OTP operation.
1941 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1942 size_t *retlen, u_char *buf,
1943 otp_op_t action, int mode)
1945 struct onenand_chip *this = mtd->priv;
1952 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1953 if (density < ONENAND_DEVICE_DENSITY_512Mb)
1958 if (mode == MTD_OTP_FACTORY) {
1959 from += mtd->writesize * otp_pages;
1960 otp_pages = 64 - otp_pages;
1963 /* Check User/Factory boundary */
1964 if (((mtd->writesize * otp_pages) - (from + len)) < 0)
1967 while (len > 0 && otp_pages > 0) {
1968 if (!action) { /* OTP Info functions */
1969 struct otp_info *otpinfo;
1971 len -= sizeof(struct otp_info);
1975 otpinfo = (struct otp_info *) buf;
1976 otpinfo->start = from;
1977 otpinfo->length = mtd->writesize;
1978 otpinfo->locked = 0;
1980 from += mtd->writesize;
1981 buf += sizeof(struct otp_info);
1982 *retlen += sizeof(struct otp_info);
1987 ret = action(mtd, from, len, &tmp_retlen, buf);
2003 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
2004 * @param mtd MTD device structure
2005 * @param buf the databuffer to put/get data
2006 * @param len number of bytes to read
2008 * Read factory OTP info.
2010 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
2011 struct otp_info *buf, size_t len)
2016 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
2018 return ret ? : retlen;
2022 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
2023 * @param mtd MTD device structure
2024 * @param from The offset to read
2025 * @param len number of bytes to read
2026 * @param retlen pointer to variable to store the number of read bytes
2027 * @param buf the databuffer to put/get data
2029 * Read factory OTP area.
2031 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
2032 size_t len, size_t *retlen, u_char *buf)
2034 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
2038 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
2039 * @param mtd MTD device structure
2040 * @param buf the databuffer to put/get data
2041 * @param len number of bytes to read
2043 * Read user OTP info.
2045 static int onenand_get_user_prot_info(struct mtd_info *mtd,
2046 struct otp_info *buf, size_t len)
2051 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
2053 return ret ? : retlen;
2057 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
2058 * @param mtd MTD device structure
2059 * @param from The offset to read
2060 * @param len number of bytes to read
2061 * @param retlen pointer to variable to store the number of read bytes
2062 * @param buf the databuffer to put/get data
2064 * Read user OTP area.
2066 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
2067 size_t len, size_t *retlen, u_char *buf)
2069 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
2073 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
2074 * @param mtd MTD device structure
2075 * @param from The offset to write
2076 * @param len number of bytes to write
2077 * @param retlen pointer to variable to store the number of write bytes
2078 * @param buf the databuffer to put/get data
2080 * Write user OTP area.
2082 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
2083 size_t len, size_t *retlen, u_char *buf)
2085 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
2089 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
2090 * @param mtd MTD device structure
2091 * @param from The offset to lock
2092 * @param len number of bytes to unlock
2094 * Write lock mark on spare area in page 0 in OTP block
2096 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
2099 unsigned char oob_buf[64];
2103 memset(oob_buf, 0xff, mtd->oobsize);
2105 * Note: OTP lock operation
2106 * OTP block : 0xXXFC
2107 * 1st block : 0xXXF3 (If chip support)
2108 * Both : 0xXXF0 (If chip support)
2110 oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
2113 * Write lock mark to 8th word of sector0 of page0 of the spare0.
2114 * We write 16 bytes spare area instead of 2 bytes.
2119 ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
2121 return ret ? : retlen;
2123 #endif /* CONFIG_MTD_ONENAND_OTP */
2126 * onenand_check_features - Check and set OneNAND features
2127 * @param mtd MTD data structure
2129 * Check and set OneNAND features
2132 static void onenand_check_features(struct mtd_info *mtd)
2134 struct onenand_chip *this = mtd->priv;
2135 unsigned int density, process;
2137 /* Lock scheme depends on density and process */
2138 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2139 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
2142 if (density >= ONENAND_DEVICE_DENSITY_1Gb) {
2143 /* A-Die has all block unlock */
2145 printk(KERN_DEBUG "Chip support all block unlock\n");
2146 this->options |= ONENAND_HAS_UNLOCK_ALL;
2149 /* Some OneNAND has continues lock scheme */
2151 printk(KERN_DEBUG "Lock scheme is Continues Lock\n");
2152 this->options |= ONENAND_HAS_CONT_LOCK;
2158 * onenand_print_device_info - Print device & version ID
2159 * @param device device ID
2160 * @param version version ID
2162 * Print device & version ID
2164 static void onenand_print_device_info(int device, int version)
2166 int vcc, demuxed, ddp, density;
2168 vcc = device & ONENAND_DEVICE_VCC_MASK;
2169 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
2170 ddp = device & ONENAND_DEVICE_IS_DDP;
2171 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
2172 printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
2173 demuxed ? "" : "Muxed ",
2176 vcc ? "2.65/3.3" : "1.8",
2178 printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
2181 static const struct onenand_manufacturers onenand_manuf_ids[] = {
2182 {ONENAND_MFR_SAMSUNG, "Samsung"},
2186 * onenand_check_maf - Check manufacturer ID
2187 * @param manuf manufacturer ID
2189 * Check manufacturer ID
2191 static int onenand_check_maf(int manuf)
2193 int size = ARRAY_SIZE(onenand_manuf_ids);
2197 for (i = 0; i < size; i++)
2198 if (manuf == onenand_manuf_ids[i].id)
2202 name = onenand_manuf_ids[i].name;
2206 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
2212 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
2213 * @param mtd MTD device structure
2215 * OneNAND detection method:
2216 * Compare the values from command with ones from register
2218 static int onenand_probe(struct mtd_info *mtd)
2220 struct onenand_chip *this = mtd->priv;
2221 int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
2225 /* Save system configuration 1 */
2226 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
2227 /* Clear Sync. Burst Read mode to read BootRAM */
2228 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
2230 /* Send the command for reading device ID from BootRAM */
2231 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
2233 /* Read manufacturer and device IDs from BootRAM */
2234 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
2235 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
2237 /* Reset OneNAND to read default register values */
2238 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
2240 this->wait(mtd, FL_RESETING);
2242 /* Restore system configuration 1 */
2243 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
2245 /* Check manufacturer ID */
2246 if (onenand_check_maf(bram_maf_id))
2249 /* Read manufacturer and device IDs from Register */
2250 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
2251 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
2252 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
2254 /* Check OneNAND device */
2255 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
2258 /* Flash device information */
2259 onenand_print_device_info(dev_id, ver_id);
2260 this->device_id = dev_id;
2261 this->version_id = ver_id;
2263 density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2264 this->chipsize = (16 << density) << 20;
2265 /* Set density mask. it is used for DDP */
2266 if (ONENAND_IS_DDP(this))
2267 this->density_mask = (1 << (density + 6));
2269 this->density_mask = 0;
2271 /* OneNAND page size & block size */
2272 /* The data buffer size is equal to page size */
2273 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
2274 mtd->oobsize = mtd->writesize >> 5;
2275 /* Pages per a block are always 64 in OneNAND */
2276 mtd->erasesize = mtd->writesize << 6;
2278 this->erase_shift = ffs(mtd->erasesize) - 1;
2279 this->page_shift = ffs(mtd->writesize) - 1;
2280 this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
2282 /* REVIST: Multichip handling */
2284 mtd->size = this->chipsize;
2286 /* Check OneNAND features */
2287 onenand_check_features(mtd);
2293 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
2294 * @param mtd MTD device structure
2296 static int onenand_suspend(struct mtd_info *mtd)
2298 return onenand_get_device(mtd, FL_PM_SUSPENDED);
2302 * onenand_resume - [MTD Interface] Resume the OneNAND flash
2303 * @param mtd MTD device structure
2305 static void onenand_resume(struct mtd_info *mtd)
2307 struct onenand_chip *this = mtd->priv;
2309 if (this->state == FL_PM_SUSPENDED)
2310 onenand_release_device(mtd);
2312 printk(KERN_ERR "resume() called for the chip which is not"
2313 "in suspended state\n");
2317 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2318 * @param mtd MTD device structure
2319 * @param maxchips Number of chips to scan for
2321 * This fills out all the not initialized function pointers
2322 * with the defaults.
2323 * The flash ID is read and the mtd/chip structures are
2324 * filled with the appropriate values.
2326 int onenand_scan(struct mtd_info *mtd, int maxchips)
2329 struct onenand_chip *this = mtd->priv;
2331 if (!this->read_word)
2332 this->read_word = onenand_readw;
2333 if (!this->write_word)
2334 this->write_word = onenand_writew;
2337 this->command = onenand_command;
2339 onenand_setup_wait(mtd);
2341 if (!this->read_bufferram)
2342 this->read_bufferram = onenand_read_bufferram;
2343 if (!this->write_bufferram)
2344 this->write_bufferram = onenand_write_bufferram;
2346 if (!this->block_markbad)
2347 this->block_markbad = onenand_default_block_markbad;
2348 if (!this->scan_bbt)
2349 this->scan_bbt = onenand_default_bbt;
2351 if (onenand_probe(mtd))
2354 /* Set Sync. Burst Read after probing */
2355 if (this->mmcontrol) {
2356 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2357 this->read_bufferram = onenand_sync_read_bufferram;
2360 /* Allocate buffers, if necessary */
2361 if (!this->page_buf) {
2362 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
2363 if (!this->page_buf) {
2364 printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2367 this->options |= ONENAND_PAGEBUF_ALLOC;
2369 if (!this->oob_buf) {
2370 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
2371 if (!this->oob_buf) {
2372 printk(KERN_ERR "onenand_scan(): Can't allocate oob_buf\n");
2373 if (this->options & ONENAND_PAGEBUF_ALLOC) {
2374 this->options &= ~ONENAND_PAGEBUF_ALLOC;
2375 kfree(this->page_buf);
2379 this->options |= ONENAND_OOBBUF_ALLOC;
2382 this->state = FL_READY;
2383 init_waitqueue_head(&this->wq);
2384 spin_lock_init(&this->chip_lock);
2387 * Allow subpage writes up to oobsize.
2389 switch (mtd->oobsize) {
2391 this->ecclayout = &onenand_oob_64;
2392 mtd->subpage_sft = 2;
2396 this->ecclayout = &onenand_oob_32;
2397 mtd->subpage_sft = 1;
2401 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2403 mtd->subpage_sft = 0;
2404 /* To prevent kernel oops */
2405 this->ecclayout = &onenand_oob_32;
2409 this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2412 * The number of bytes available for a client to place data into
2413 * the out of band area
2415 this->ecclayout->oobavail = 0;
2416 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
2417 this->ecclayout->oobfree[i].length; i++)
2418 this->ecclayout->oobavail +=
2419 this->ecclayout->oobfree[i].length;
2420 mtd->oobavail = this->ecclayout->oobavail;
2422 mtd->ecclayout = this->ecclayout;
2424 /* Fill in remaining MTD driver data */
2425 mtd->type = MTD_NANDFLASH;
2426 mtd->flags = MTD_CAP_NANDFLASH;
2427 mtd->erase = onenand_erase;
2429 mtd->unpoint = NULL;
2430 mtd->read = onenand_read;
2431 mtd->write = onenand_write;
2432 mtd->read_oob = onenand_read_oob;
2433 mtd->write_oob = onenand_write_oob;
2434 #ifdef CONFIG_MTD_ONENAND_OTP
2435 mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2436 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2437 mtd->get_user_prot_info = onenand_get_user_prot_info;
2438 mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2439 mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2440 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2442 mtd->sync = onenand_sync;
2443 mtd->lock = onenand_lock;
2444 mtd->unlock = onenand_unlock;
2445 mtd->suspend = onenand_suspend;
2446 mtd->resume = onenand_resume;
2447 mtd->block_isbad = onenand_block_isbad;
2448 mtd->block_markbad = onenand_block_markbad;
2449 mtd->owner = THIS_MODULE;
2451 /* Unlock whole block */
2452 onenand_unlock_all(mtd);
2454 return this->scan_bbt(mtd);
2458 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2459 * @param mtd MTD device structure
2461 void onenand_release(struct mtd_info *mtd)
2463 struct onenand_chip *this = mtd->priv;
2465 #ifdef CONFIG_MTD_PARTITIONS
2466 /* Deregister partitions */
2467 del_mtd_partitions (mtd);
2469 /* Deregister the device */
2470 del_mtd_device (mtd);
2472 /* Free bad block table memory, if allocated */
2474 struct bbm_info *bbm = this->bbm;
2478 /* Buffers allocated by onenand_scan */
2479 if (this->options & ONENAND_PAGEBUF_ALLOC)
2480 kfree(this->page_buf);
2481 if (this->options & ONENAND_OOBBUF_ALLOC)
2482 kfree(this->oob_buf);
2485 EXPORT_SYMBOL_GPL(onenand_scan);
2486 EXPORT_SYMBOL_GPL(onenand_release);
2488 MODULE_LICENSE("GPL");
2489 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2490 MODULE_DESCRIPTION("Generic OneNAND flash driver code");