]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/blob - drivers/mtd/onenand/onenand_base.c
OMAP: Add OMAP_GPIO_SWITCH dependency for N800
[linux-2.6-omap-h63xx.git] / drivers / mtd / onenand / onenand_base.c
1 /*
2  *  linux/drivers/mtd/onenand/onenand_base.c
3  *
4  *  Copyright (C) 2005-2007 Samsung Electronics
5  *  Kyungmin Park <kyungmin.park@samsung.com>
6  *
7  *  Credits:
8  *      Adrian Hunter <ext-adrian.hunter@nokia.com>:
9  *      auto-placement support, read-while load support, various fixes
10  *      Copyright (C) Nokia Corporation, 2007
11  *
12  * This program is free software; you can redistribute it and/or modify
13  * it under the terms of the GNU General Public License version 2 as
14  * published by the Free Software Foundation.
15  */
16
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/sched.h>
21 #include <linux/interrupt.h>
22 #include <linux/jiffies.h>
23 #include <linux/mtd/mtd.h>
24 #include <linux/mtd/onenand.h>
25 #include <linux/mtd/partitions.h>
26
27 #include <asm/io.h>
28
29 /**
30  * onenand_oob_64 - oob info for large (2KB) page
31  */
32 static struct nand_ecclayout onenand_oob_64 = {
33         .eccbytes       = 20,
34         .eccpos         = {
35                 8, 9, 10, 11, 12,
36                 24, 25, 26, 27, 28,
37                 40, 41, 42, 43, 44,
38                 56, 57, 58, 59, 60,
39                 },
40         .oobfree        = {
41                 {2, 3}, {14, 2}, {18, 3}, {30, 2},
42                 {34, 3}, {46, 2}, {50, 3}, {62, 2}
43         }
44 };
45
46 /**
47  * onenand_oob_32 - oob info for middle (1KB) page
48  */
49 static struct nand_ecclayout onenand_oob_32 = {
50         .eccbytes       = 10,
51         .eccpos         = {
52                 8, 9, 10, 11, 12,
53                 24, 25, 26, 27, 28,
54                 },
55         .oobfree        = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
56 };
57
58 static const unsigned char ffchars[] = {
59         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
60         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
61         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
62         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
63         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
64         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
65         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
66         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
67 };
68
69 /**
70  * onenand_readw - [OneNAND Interface] Read OneNAND register
71  * @param addr          address to read
72  *
73  * Read OneNAND register
74  */
75 static unsigned short onenand_readw(void __iomem *addr)
76 {
77         return readw(addr);
78 }
79
80 /**
81  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
82  * @param value         value to write
83  * @param addr          address to write
84  *
85  * Write OneNAND register with value
86  */
87 static void onenand_writew(unsigned short value, void __iomem *addr)
88 {
89         writew(value, addr);
90 }
91
92 /**
93  * onenand_block_address - [DEFAULT] Get block address
94  * @param this          onenand chip data structure
95  * @param block         the block
96  * @return              translated block address if DDP, otherwise same
97  *
98  * Setup Start Address 1 Register (F100h)
99  */
100 static int onenand_block_address(struct onenand_chip *this, int block)
101 {
102         /* Device Flash Core select, NAND Flash Block Address */
103         if (block & this->density_mask)
104                 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
105
106         return block;
107 }
108
109 /**
110  * onenand_bufferram_address - [DEFAULT] Get bufferram address
111  * @param this          onenand chip data structure
112  * @param block         the block
113  * @return              set DBS value if DDP, otherwise 0
114  *
115  * Setup Start Address 2 Register (F101h) for DDP
116  */
117 static int onenand_bufferram_address(struct onenand_chip *this, int block)
118 {
119         /* Device BufferRAM Select */
120         if (block & this->density_mask)
121                 return ONENAND_DDP_CHIP1;
122
123         return ONENAND_DDP_CHIP0;
124 }
125
126 /**
127  * onenand_page_address - [DEFAULT] Get page address
128  * @param page          the page address
129  * @param sector        the sector address
130  * @return              combined page and sector address
131  *
132  * Setup Start Address 8 Register (F107h)
133  */
134 static int onenand_page_address(int page, int sector)
135 {
136         /* Flash Page Address, Flash Sector Address */
137         int fpa, fsa;
138
139         fpa = page & ONENAND_FPA_MASK;
140         fsa = sector & ONENAND_FSA_MASK;
141
142         return ((fpa << ONENAND_FPA_SHIFT) | fsa);
143 }
144
145 /**
146  * onenand_buffer_address - [DEFAULT] Get buffer address
147  * @param dataram1      DataRAM index
148  * @param sectors       the sector address
149  * @param count         the number of sectors
150  * @return              the start buffer value
151  *
152  * Setup Start Buffer Register (F200h)
153  */
154 static int onenand_buffer_address(int dataram1, int sectors, int count)
155 {
156         int bsa, bsc;
157
158         /* BufferRAM Sector Address */
159         bsa = sectors & ONENAND_BSA_MASK;
160
161         if (dataram1)
162                 bsa |= ONENAND_BSA_DATARAM1;    /* DataRAM1 */
163         else
164                 bsa |= ONENAND_BSA_DATARAM0;    /* DataRAM0 */
165
166         /* BufferRAM Sector Count */
167         bsc = count & ONENAND_BSC_MASK;
168
169         return ((bsa << ONENAND_BSA_SHIFT) | bsc);
170 }
171
172 /**
173  * onenand_command - [DEFAULT] Send command to OneNAND device
174  * @param mtd           MTD device structure
175  * @param cmd           the command to be sent
176  * @param addr          offset to read from or write to
177  * @param len           number of bytes to read or write
178  *
179  * Send command to OneNAND device. This function is used for middle/large page
180  * devices (1KB/2KB Bytes per page)
181  */
182 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
183 {
184         struct onenand_chip *this = mtd->priv;
185         int value, readcmd = 0, block_cmd = 0;
186         int block, page;
187
188         /* Address translation */
189         switch (cmd) {
190         case ONENAND_CMD_UNLOCK:
191         case ONENAND_CMD_LOCK:
192         case ONENAND_CMD_LOCK_TIGHT:
193         case ONENAND_CMD_UNLOCK_ALL:
194                 block = -1;
195                 page = -1;
196                 break;
197
198         case ONENAND_CMD_ERASE:
199         case ONENAND_CMD_BUFFERRAM:
200         case ONENAND_CMD_OTP_ACCESS:
201                 block_cmd = 1;
202                 block = (int) (addr >> this->erase_shift);
203                 page = -1;
204                 break;
205
206         default:
207                 block = (int) (addr >> this->erase_shift);
208                 page = (int) (addr >> this->page_shift);
209                 page &= this->page_mask;
210                 break;
211         }
212
213         /* NOTE: The setting order of the registers is very important! */
214         if (cmd == ONENAND_CMD_BUFFERRAM) {
215                 /* Select DataRAM for DDP */
216                 value = onenand_bufferram_address(this, block);
217                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
218
219                 /* Switch to the next data buffer */
220                 ONENAND_SET_NEXT_BUFFERRAM(this);
221
222                 return 0;
223         }
224
225         if (block != -1) {
226                 /* Write 'DFS, FBA' of Flash */
227                 value = onenand_block_address(this, block);
228                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
229
230                 if (block_cmd) {
231                         /* Select DataRAM for DDP */
232                         value = onenand_bufferram_address(this, block);
233                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
234                 }
235         }
236
237         if (page != -1) {
238                 /* Now we use page size operation */
239                 int sectors = 4, count = 4;
240                 int dataram;
241
242                 switch (cmd) {
243                 case ONENAND_CMD_READ:
244                 case ONENAND_CMD_READOOB:
245                         dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
246                         readcmd = 1;
247                         break;
248
249                 default:
250                         dataram = ONENAND_CURRENT_BUFFERRAM(this);
251                         break;
252                 }
253
254                 /* Write 'FPA, FSA' of Flash */
255                 value = onenand_page_address(page, sectors);
256                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
257
258                 /* Write 'BSA, BSC' of DataRAM */
259                 value = onenand_buffer_address(dataram, sectors, count);
260                 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
261
262                 if (readcmd) {
263                         /* Select DataRAM for DDP */
264                         value = onenand_bufferram_address(this, block);
265                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
266                 }
267         }
268
269         /* Interrupt clear */
270         this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
271
272         /* Write command */
273         this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
274
275         return 0;
276 }
277
278 /**
279  * onenand_wait - [DEFAULT] wait until the command is done
280  * @param mtd           MTD device structure
281  * @param state         state to select the max. timeout value
282  *
283  * Wait for command done. This applies to all OneNAND command
284  * Read can take up to 30us, erase up to 2ms and program up to 350us
285  * according to general OneNAND specs
286  */
287 static int onenand_wait(struct mtd_info *mtd, int state)
288 {
289         struct onenand_chip * this = mtd->priv;
290         unsigned long timeout;
291         unsigned int flags = ONENAND_INT_MASTER;
292         unsigned int interrupt = 0;
293         unsigned int ctrl;
294
295         /* The 20 msec is enough */
296         timeout = jiffies + msecs_to_jiffies(20);
297         while (time_before(jiffies, timeout)) {
298                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
299
300                 if (interrupt & flags)
301                         break;
302
303                 if (state != FL_READING)
304                         cond_resched();
305         }
306         /* To get correct interrupt status in timeout case */
307         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
308
309         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
310
311         if (ctrl & ONENAND_CTRL_ERROR) {
312                 printk(KERN_ERR "onenand_wait: controller error = 0x%04x\n", ctrl);
313                 if (ctrl & ONENAND_CTRL_LOCK)
314                         printk(KERN_ERR "onenand_wait: it's locked error.\n");
315                 return ctrl;
316         }
317
318         if (interrupt & ONENAND_INT_READ) {
319                 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
320                 if (ecc) {
321                         printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc);
322                         if (ecc & ONENAND_ECC_2BIT_ALL) {
323                                 mtd->ecc_stats.failed++;
324                                 return ecc;
325                         } else if (ecc & ONENAND_ECC_1BIT_ALL)
326                                 mtd->ecc_stats.corrected++;
327                 }
328         } else if (state == FL_READING) {
329                 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
330                 return -EIO;
331         }
332
333         return 0;
334 }
335
336 /*
337  * onenand_interrupt - [DEFAULT] onenand interrupt handler
338  * @param irq           onenand interrupt number
339  * @param dev_id        interrupt data
340  *
341  * complete the work
342  */
343 static irqreturn_t onenand_interrupt(int irq, void *data)
344 {
345         struct onenand_chip *this = (struct onenand_chip *) data;
346
347         /* To handle shared interrupt */
348         if (!this->complete.done)
349                 complete(&this->complete);
350
351         return IRQ_HANDLED;
352 }
353
354 /*
355  * onenand_interrupt_wait - [DEFAULT] wait until the command is done
356  * @param mtd           MTD device structure
357  * @param state         state to select the max. timeout value
358  *
359  * Wait for command done.
360  */
361 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
362 {
363         struct onenand_chip *this = mtd->priv;
364
365         wait_for_completion(&this->complete);
366
367         return onenand_wait(mtd, state);
368 }
369
370 /*
371  * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
372  * @param mtd           MTD device structure
373  * @param state         state to select the max. timeout value
374  *
375  * Try interrupt based wait (It is used one-time)
376  */
377 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
378 {
379         struct onenand_chip *this = mtd->priv;
380         unsigned long remain, timeout;
381
382         /* We use interrupt wait first */
383         this->wait = onenand_interrupt_wait;
384
385         timeout = msecs_to_jiffies(100);
386         remain = wait_for_completion_timeout(&this->complete, timeout);
387         if (!remain) {
388                 printk(KERN_INFO "OneNAND: There's no interrupt. "
389                                 "We use the normal wait\n");
390
391                 /* Release the irq */
392                 free_irq(this->irq, this);
393
394                 this->wait = onenand_wait;
395         }
396
397         return onenand_wait(mtd, state);
398 }
399
400 /*
401  * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
402  * @param mtd           MTD device structure
403  *
404  * There's two method to wait onenand work
405  * 1. polling - read interrupt status register
406  * 2. interrupt - use the kernel interrupt method
407  */
408 static void onenand_setup_wait(struct mtd_info *mtd)
409 {
410         struct onenand_chip *this = mtd->priv;
411         int syscfg;
412
413         init_completion(&this->complete);
414
415         if (this->irq <= 0) {
416                 this->wait = onenand_wait;
417                 return;
418         }
419
420         if (request_irq(this->irq, &onenand_interrupt,
421                                 IRQF_SHARED, "onenand", this)) {
422                 /* If we can't get irq, use the normal wait */
423                 this->wait = onenand_wait;
424                 return;
425         }
426
427         /* Enable interrupt */
428         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
429         syscfg |= ONENAND_SYS_CFG1_IOBE;
430         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
431
432         this->wait = onenand_try_interrupt_wait;
433 }
434
435 /**
436  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
437  * @param mtd           MTD data structure
438  * @param area          BufferRAM area
439  * @return              offset given area
440  *
441  * Return BufferRAM offset given area
442  */
443 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
444 {
445         struct onenand_chip *this = mtd->priv;
446
447         if (ONENAND_CURRENT_BUFFERRAM(this)) {
448                 if (area == ONENAND_DATARAM)
449                         return mtd->writesize;
450                 if (area == ONENAND_SPARERAM)
451                         return mtd->oobsize;
452         }
453
454         return 0;
455 }
456
457 /**
458  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
459  * @param mtd           MTD data structure
460  * @param area          BufferRAM area
461  * @param buffer        the databuffer to put/get data
462  * @param offset        offset to read from or write to
463  * @param count         number of bytes to read/write
464  *
465  * Read the BufferRAM area
466  */
467 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
468                 unsigned char *buffer, int offset, size_t count)
469 {
470         struct onenand_chip *this = mtd->priv;
471         void __iomem *bufferram;
472
473         bufferram = this->base + area;
474
475         bufferram += onenand_bufferram_offset(mtd, area);
476
477         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
478                 unsigned short word;
479
480                 /* Align with word(16-bit) size */
481                 count--;
482
483                 /* Read word and save byte */
484                 word = this->read_word(bufferram + offset + count);
485                 buffer[count] = (word & 0xff);
486         }
487
488         memcpy(buffer, bufferram + offset, count);
489
490         return 0;
491 }
492
493 /**
494  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
495  * @param mtd           MTD data structure
496  * @param area          BufferRAM area
497  * @param buffer        the databuffer to put/get data
498  * @param offset        offset to read from or write to
499  * @param count         number of bytes to read/write
500  *
501  * Read the BufferRAM area with Sync. Burst Mode
502  */
503 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
504                 unsigned char *buffer, int offset, size_t count)
505 {
506         struct onenand_chip *this = mtd->priv;
507         void __iomem *bufferram;
508
509         bufferram = this->base + area;
510
511         bufferram += onenand_bufferram_offset(mtd, area);
512
513         this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
514
515         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
516                 unsigned short word;
517
518                 /* Align with word(16-bit) size */
519                 count--;
520
521                 /* Read word and save byte */
522                 word = this->read_word(bufferram + offset + count);
523                 buffer[count] = (word & 0xff);
524         }
525
526         memcpy(buffer, bufferram + offset, count);
527
528         this->mmcontrol(mtd, 0);
529
530         return 0;
531 }
532
533 /**
534  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
535  * @param mtd           MTD data structure
536  * @param area          BufferRAM area
537  * @param buffer        the databuffer to put/get data
538  * @param offset        offset to read from or write to
539  * @param count         number of bytes to read/write
540  *
541  * Write the BufferRAM area
542  */
543 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
544                 const unsigned char *buffer, int offset, size_t count)
545 {
546         struct onenand_chip *this = mtd->priv;
547         void __iomem *bufferram;
548
549         bufferram = this->base + area;
550
551         bufferram += onenand_bufferram_offset(mtd, area);
552
553         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
554                 unsigned short word;
555                 int byte_offset;
556
557                 /* Align with word(16-bit) size */
558                 count--;
559
560                 /* Calculate byte access offset */
561                 byte_offset = offset + count;
562
563                 /* Read word and save byte */
564                 word = this->read_word(bufferram + byte_offset);
565                 word = (word & ~0xff) | buffer[count];
566                 this->write_word(word, bufferram + byte_offset);
567         }
568
569         memcpy(bufferram + offset, buffer, count);
570
571         return 0;
572 }
573
574 /**
575  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
576  * @param mtd           MTD data structure
577  * @param addr          address to check
578  * @return              1 if there are valid data, otherwise 0
579  *
580  * Check bufferram if there is data we required
581  */
582 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
583 {
584         struct onenand_chip *this = mtd->priv;
585         int blockpage, found = 0;
586         unsigned int i;
587
588         blockpage = (int) (addr >> this->page_shift);
589
590         /* Is there valid data? */
591         i = ONENAND_CURRENT_BUFFERRAM(this);
592         if (this->bufferram[i].blockpage == blockpage)
593                 found = 1;
594         else {
595                 /* Check another BufferRAM */
596                 i = ONENAND_NEXT_BUFFERRAM(this);
597                 if (this->bufferram[i].blockpage == blockpage) {
598                         ONENAND_SET_NEXT_BUFFERRAM(this);
599                         found = 1;
600                 }
601         }
602
603         if (found && ONENAND_IS_DDP(this)) {
604                 /* Select DataRAM for DDP */
605                 int block = (int) (addr >> this->erase_shift);
606                 int value = onenand_bufferram_address(this, block);
607                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
608         }
609
610         return found;
611 }
612
613 /**
614  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
615  * @param mtd           MTD data structure
616  * @param addr          address to update
617  * @param valid         valid flag
618  *
619  * Update BufferRAM information
620  */
621 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
622                 int valid)
623 {
624         struct onenand_chip *this = mtd->priv;
625         int blockpage;
626         unsigned int i;
627
628         blockpage = (int) (addr >> this->page_shift);
629
630         /* Invalidate another BufferRAM */
631         i = ONENAND_NEXT_BUFFERRAM(this);
632         if (this->bufferram[i].blockpage == blockpage)
633                 this->bufferram[i].blockpage = -1;
634
635         /* Update BufferRAM */
636         i = ONENAND_CURRENT_BUFFERRAM(this);
637         if (valid)
638                 this->bufferram[i].blockpage = blockpage;
639         else
640                 this->bufferram[i].blockpage = -1;
641 }
642
643 /**
644  * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
645  * @param mtd           MTD data structure
646  * @param addr          start address to invalidate
647  * @param len           length to invalidate
648  *
649  * Invalidate BufferRAM information
650  */
651 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
652                 unsigned int len)
653 {
654         struct onenand_chip *this = mtd->priv;
655         int i;
656         loff_t end_addr = addr + len;
657
658         /* Invalidate BufferRAM */
659         for (i = 0; i < MAX_BUFFERRAM; i++) {
660                 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
661                 if (buf_addr >= addr && buf_addr < end_addr)
662                         this->bufferram[i].blockpage = -1;
663         }
664 }
665
666 /**
667  * onenand_get_device - [GENERIC] Get chip for selected access
668  * @param mtd           MTD device structure
669  * @param new_state     the state which is requested
670  *
671  * Get the device and lock it for exclusive access
672  */
673 static int onenand_get_device(struct mtd_info *mtd, int new_state)
674 {
675         struct onenand_chip *this = mtd->priv;
676         DECLARE_WAITQUEUE(wait, current);
677
678         /*
679          * Grab the lock and see if the device is available
680          */
681         while (1) {
682                 spin_lock(&this->chip_lock);
683                 if (this->state == FL_READY) {
684                         this->state = new_state;
685                         spin_unlock(&this->chip_lock);
686                         break;
687                 }
688                 if (new_state == FL_PM_SUSPENDED) {
689                         spin_unlock(&this->chip_lock);
690                         return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
691                 }
692                 set_current_state(TASK_UNINTERRUPTIBLE);
693                 add_wait_queue(&this->wq, &wait);
694                 spin_unlock(&this->chip_lock);
695                 schedule();
696                 remove_wait_queue(&this->wq, &wait);
697         }
698
699         return 0;
700 }
701
702 /**
703  * onenand_release_device - [GENERIC] release chip
704  * @param mtd           MTD device structure
705  *
706  * Deselect, release chip lock and wake up anyone waiting on the device
707  */
708 static void onenand_release_device(struct mtd_info *mtd)
709 {
710         struct onenand_chip *this = mtd->priv;
711
712         /* Release the chip */
713         spin_lock(&this->chip_lock);
714         this->state = FL_READY;
715         wake_up(&this->wq);
716         spin_unlock(&this->chip_lock);
717 }
718
719 /**
720  * onenand_read - [MTD Interface] Read data from flash
721  * @param mtd           MTD device structure
722  * @param from          offset to read from
723  * @param len           number of bytes to read
724  * @param retlen        pointer to variable to store the number of read bytes
725  * @param buf           the databuffer to put data
726  *
727  * Read with ecc
728 */
729 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
730         size_t *retlen, u_char *buf)
731 {
732         struct onenand_chip *this = mtd->priv;
733         struct mtd_ecc_stats stats;
734         int read = 0, column;
735         int thislen;
736         int ret = 0, boundary = 0;
737
738         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
739
740         /* Do not allow reads past end of device */
741         if ((from + len) > mtd->size) {
742                 printk(KERN_ERR "onenand_read: Attempt read beyond end of device\n");
743                 *retlen = 0;
744                 return -EINVAL;
745         }
746
747         /* Grab the lock and see if the device is available */
748         onenand_get_device(mtd, FL_READING);
749
750         stats = mtd->ecc_stats;
751
752         /* Read-while-load method */
753
754         /* Do first load to bufferRAM */
755         if (read < len) {
756                 if (!onenand_check_bufferram(mtd, from)) {
757                         this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
758                         ret = this->wait(mtd, FL_READING);
759                         onenand_update_bufferram(mtd, from, !ret);
760                 }
761         }
762
763         thislen = min_t(int, mtd->writesize, len - read);
764         column = from & (mtd->writesize - 1);
765         if (column + thislen > mtd->writesize)
766                 thislen = mtd->writesize - column;
767
768         while (!ret) {
769                 /* If there is more to load then start next load */
770                 from += thislen;
771                 if (read + thislen < len) {
772                         this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
773                         /*
774                          * Chip boundary handling in DDP
775                          * Now we issued chip 1 read and pointed chip 1
776                          * bufferam so we have to point chip 0 bufferam.
777                          */
778                         if (ONENAND_IS_DDP(this) &&
779                             unlikely(from == (this->chipsize >> 1))) {
780                                 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
781                                 boundary = 1;
782                         } else
783                                 boundary = 0;
784                         ONENAND_SET_PREV_BUFFERRAM(this);
785                 }
786                 /* While load is going, read from last bufferRAM */
787                 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
788                 /* See if we are done */
789                 read += thislen;
790                 if (read == len)
791                         break;
792                 /* Set up for next read from bufferRAM */
793                 if (unlikely(boundary))
794                         this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
795                 ONENAND_SET_NEXT_BUFFERRAM(this);
796                 buf += thislen;
797                 thislen = min_t(int, mtd->writesize, len - read);
798                 column = 0;
799                 cond_resched();
800                 /* Now wait for load */
801                 ret = this->wait(mtd, FL_READING);
802                 onenand_update_bufferram(mtd, from, !ret);
803         }
804
805         /* Deselect and wake up anyone waiting on the device */
806         onenand_release_device(mtd);
807
808         /*
809          * Return success, if no ECC failures, else -EBADMSG
810          * fs driver will take care of that, because
811          * retlen == desired len and result == -EBADMSG
812          */
813         *retlen = read;
814
815         if (mtd->ecc_stats.failed - stats.failed)
816                 return -EBADMSG;
817
818         if (ret)
819                 return ret;
820
821         return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
822 }
823
824 /**
825  * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
826  * @param mtd           MTD device structure
827  * @param buf           destination address
828  * @param column        oob offset to read from
829  * @param thislen       oob length to read
830  */
831 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
832                                 int thislen)
833 {
834         struct onenand_chip *this = mtd->priv;
835         struct nand_oobfree *free;
836         int readcol = column;
837         int readend = column + thislen;
838         int lastgap = 0;
839         unsigned int i;
840         uint8_t *oob_buf = this->oob_buf;
841
842         free = this->ecclayout->oobfree;
843         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
844                 if (readcol >= lastgap)
845                         readcol += free->offset - lastgap;
846                 if (readend >= lastgap)
847                         readend += free->offset - lastgap;
848                 lastgap = free->offset + free->length;
849         }
850         this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
851         free = this->ecclayout->oobfree;
852         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
853                 int free_end = free->offset + free->length;
854                 if (free->offset < readend && free_end > readcol) {
855                         int st = max_t(int,free->offset,readcol);
856                         int ed = min_t(int,free_end,readend);
857                         int n = ed - st;
858                         memcpy(buf, oob_buf + st, n);
859                         buf += n;
860                 } else if (column == 0)
861                         break;
862         }
863         return 0;
864 }
865
866 /**
867  * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
868  * @param mtd           MTD device structure
869  * @param from          offset to read from
870  * @param len           number of bytes to read
871  * @param retlen        pointer to variable to store the number of read bytes
872  * @param buf           the databuffer to put data
873  * @param mode          operation mode
874  *
875  * OneNAND read out-of-band data from the spare area
876  */
877 static int onenand_do_read_oob(struct mtd_info *mtd, loff_t from,
878                         struct mtd_oob_ops *ops)
879 {
880         struct onenand_chip *this = mtd->priv;
881         int read = 0, thislen, column, oobsize;
882         size_t len = ops->ooblen;
883         mtd_oob_mode_t mode = ops->mode;
884         u_char *buf = ops->oobbuf;
885         int ret = 0;
886
887         from += ops->ooboffs;
888
889         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
890
891         /* Initialize return length value */
892         ops->oobretlen = 0;
893
894         if (mode == MTD_OOB_AUTO)
895                 oobsize = this->ecclayout->oobavail;
896         else
897                 oobsize = mtd->oobsize;
898
899         column = from & (mtd->oobsize - 1);
900
901         if (unlikely(column >= oobsize)) {
902                 printk(KERN_ERR "onenand_read_oob: Attempted to start read outside oob\n");
903                 return -EINVAL;
904         }
905
906         /* Do not allow reads past end of device */
907         if (unlikely(from >= mtd->size ||
908                      column + len > ((mtd->size >> this->page_shift) -
909                                      (from >> this->page_shift)) * oobsize)) {
910                 printk(KERN_ERR "onenand_read_oob: Attempted to read beyond end of device\n");
911                 return -EINVAL;
912         }
913
914         /* Grab the lock and see if the device is available */
915         onenand_get_device(mtd, FL_READING);
916
917         while (read < len) {
918                 cond_resched();
919
920                 thislen = oobsize - column;
921                 thislen = min_t(int, thislen, len);
922
923                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
924
925                 onenand_update_bufferram(mtd, from, 0);
926
927                 ret = this->wait(mtd, FL_READING);
928                 /* First copy data and check return value for ECC handling */
929
930                 if (mode == MTD_OOB_AUTO)
931                         onenand_transfer_auto_oob(mtd, buf, column, thislen);
932                 else
933                         this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
934
935                 if (ret) {
936                         printk(KERN_ERR "onenand_read_oob: read failed = 0x%x\n", ret);
937                         break;
938                 }
939
940                 read += thislen;
941
942                 if (read == len)
943                         break;
944
945                 buf += thislen;
946
947                 /* Read more? */
948                 if (read < len) {
949                         /* Page size */
950                         from += mtd->writesize;
951                         column = 0;
952                 }
953         }
954
955         /* Deselect and wake up anyone waiting on the device */
956         onenand_release_device(mtd);
957
958         ops->oobretlen = read;
959         return ret;
960 }
961
962 /**
963  * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
964  * @param mtd:          MTD device structure
965  * @param from:         offset to read from
966  * @param ops:          oob operation description structure
967  */
968 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
969                             struct mtd_oob_ops *ops)
970 {
971         switch (ops->mode) {
972         case MTD_OOB_PLACE:
973         case MTD_OOB_AUTO:
974                 break;
975         case MTD_OOB_RAW:
976                 /* Not implemented yet */
977         default:
978                 return -EINVAL;
979         }
980         return onenand_do_read_oob(mtd, from, ops);
981 }
982
983 /**
984  * onenand_bbt_wait - [DEFAULT] wait until the command is done
985  * @param mtd           MTD device structure
986  * @param state         state to select the max. timeout value
987  *
988  * Wait for command done.
989  */
990 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
991 {
992         struct onenand_chip *this = mtd->priv;
993         unsigned long timeout;
994         unsigned int interrupt;
995         unsigned int ctrl;
996
997         /* The 20 msec is enough */
998         timeout = jiffies + msecs_to_jiffies(20);
999         while (time_before(jiffies, timeout)) {
1000                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1001                 if (interrupt & ONENAND_INT_MASTER)
1002                         break;
1003         }
1004         /* To get correct interrupt status in timeout case */
1005         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1006         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1007
1008         if (ctrl & ONENAND_CTRL_ERROR) {
1009                 printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl);
1010                 /* Initial bad block case */
1011                 if (ctrl & ONENAND_CTRL_LOAD)
1012                         return ONENAND_BBT_READ_ERROR;
1013                 return ONENAND_BBT_READ_FATAL_ERROR;
1014         }
1015
1016         if (interrupt & ONENAND_INT_READ) {
1017                 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
1018                 if (ecc & ONENAND_ECC_2BIT_ALL)
1019                         return ONENAND_BBT_READ_ERROR;
1020         } else {
1021                 printk(KERN_ERR "onenand_bbt_wait: read timeout!"
1022                         "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
1023                 return ONENAND_BBT_READ_FATAL_ERROR;
1024         }
1025
1026         return 0;
1027 }
1028
1029 /**
1030  * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1031  * @param mtd           MTD device structure
1032  * @param from          offset to read from
1033  * @param ops           oob operation description structure
1034  *
1035  * OneNAND read out-of-band data from the spare area for bbt scan
1036  */
1037 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from, 
1038                             struct mtd_oob_ops *ops)
1039 {
1040         struct onenand_chip *this = mtd->priv;
1041         int read = 0, thislen, column;
1042         int ret = 0;
1043         size_t len = ops->ooblen;
1044         u_char *buf = ops->oobbuf;
1045
1046         DEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len);
1047
1048         /* Initialize return value */
1049         ops->oobretlen = 0;
1050
1051         /* Do not allow reads past end of device */
1052         if (unlikely((from + len) > mtd->size)) {
1053                 printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
1054                 return ONENAND_BBT_READ_FATAL_ERROR;
1055         }
1056
1057         /* Grab the lock and see if the device is available */
1058         onenand_get_device(mtd, FL_READING);
1059
1060         column = from & (mtd->oobsize - 1);
1061
1062         while (read < len) {
1063                 cond_resched();
1064
1065                 thislen = mtd->oobsize - column;
1066                 thislen = min_t(int, thislen, len);
1067
1068                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
1069
1070                 onenand_update_bufferram(mtd, from, 0);
1071
1072                 ret = onenand_bbt_wait(mtd, FL_READING);
1073                 if (ret)
1074                         break;
1075
1076                 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1077                 read += thislen;
1078                 if (read == len)
1079                         break;
1080
1081                 buf += thislen;
1082
1083                 /* Read more? */
1084                 if (read < len) {
1085                         /* Update Page size */
1086                         from += mtd->writesize;
1087                         column = 0;
1088                 }
1089         }
1090
1091         /* Deselect and wake up anyone waiting on the device */
1092         onenand_release_device(mtd);
1093
1094         ops->oobretlen = read;
1095         return ret;
1096 }
1097
1098 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1099 /**
1100  * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1101  * @param mtd           MTD device structure
1102  * @param buf           the databuffer to verify
1103  * @param to            offset to read from
1104  *
1105  */
1106 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1107 {
1108         struct onenand_chip *this = mtd->priv;
1109         char oobbuf[64];
1110         int status, i;
1111
1112         this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
1113         onenand_update_bufferram(mtd, to, 0);
1114         status = this->wait(mtd, FL_READING);
1115         if (status)
1116                 return status;
1117
1118         this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1119         for (i = 0; i < mtd->oobsize; i++)
1120                 if (buf[i] != 0xFF && buf[i] != oobbuf[i])
1121                         return -EBADMSG;
1122
1123         return 0;
1124 }
1125
1126 /**
1127  * onenand_verify - [GENERIC] verify the chip contents after a write
1128  * @param mtd          MTD device structure
1129  * @param buf          the databuffer to verify
1130  * @param addr         offset to read from
1131  * @param len          number of bytes to read and compare
1132  *
1133  */
1134 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1135 {
1136         struct onenand_chip *this = mtd->priv;
1137         void __iomem *dataram;
1138         int ret = 0;
1139         int thislen, column;
1140
1141         while (len != 0) {
1142                 thislen = min_t(int, mtd->writesize, len);
1143                 column = addr & (mtd->writesize - 1);
1144                 if (column + thislen > mtd->writesize)
1145                         thislen = mtd->writesize - column;
1146
1147                 this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
1148
1149                 onenand_update_bufferram(mtd, addr, 0);
1150
1151                 ret = this->wait(mtd, FL_READING);
1152                 if (ret)
1153                         return ret;
1154
1155                 onenand_update_bufferram(mtd, addr, 1);
1156
1157                 dataram = this->base + ONENAND_DATARAM;
1158                 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1159
1160                 if (memcmp(buf, dataram + column, thislen))
1161                         return -EBADMSG;
1162
1163                 len -= thislen;
1164                 buf += thislen;
1165                 addr += thislen;
1166         }
1167
1168         return 0;
1169 }
1170 #else
1171 #define onenand_verify(...)             (0)
1172 #define onenand_verify_oob(...)         (0)
1173 #endif
1174
1175 #define NOTALIGNED(x)   ((x & (this->subpagesize - 1)) != 0)
1176
1177 /**
1178  * onenand_write - [MTD Interface] write buffer to FLASH
1179  * @param mtd           MTD device structure
1180  * @param to            offset to write to
1181  * @param len           number of bytes to write
1182  * @param retlen        pointer to variable to store the number of written bytes
1183  * @param buf           the data to write
1184  *
1185  * Write with ECC
1186  */
1187 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
1188         size_t *retlen, const u_char *buf)
1189 {
1190         struct onenand_chip *this = mtd->priv;
1191         int written = 0;
1192         int ret = 0;
1193         int column, subpage;
1194
1195         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1196
1197         /* Initialize retlen, in case of early exit */
1198         *retlen = 0;
1199
1200         /* Do not allow writes past end of device */
1201         if (unlikely((to + len) > mtd->size)) {
1202                 printk(KERN_ERR "onenand_write: Attempt write to past end of device\n");
1203                 return -EINVAL;
1204         }
1205
1206         /* Reject writes, which are not page aligned */
1207         if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
1208                 printk(KERN_ERR "onenand_write: Attempt to write not page aligned data\n");
1209                 return -EINVAL;
1210         }
1211
1212         column = to & (mtd->writesize - 1);
1213
1214         /* Grab the lock and see if the device is available */
1215         onenand_get_device(mtd, FL_WRITING);
1216
1217         /* Loop until all data write */
1218         while (written < len) {
1219                 int thislen = min_t(int, mtd->writesize - column, len - written);
1220                 u_char *wbuf = (u_char *) buf;
1221
1222                 cond_resched();
1223
1224                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1225
1226                 /* Partial page write */
1227                 subpage = thislen < mtd->writesize;
1228                 if (subpage) {
1229                         memset(this->page_buf, 0xff, mtd->writesize);
1230                         memcpy(this->page_buf + column, buf, thislen);
1231                         wbuf = this->page_buf;
1232                 }
1233
1234                 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1235                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1236
1237                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1238
1239                 ret = this->wait(mtd, FL_WRITING);
1240
1241                 /* In partial page write we don't update bufferram */
1242                 onenand_update_bufferram(mtd, to, !ret && !subpage);
1243
1244                 if (ret) {
1245                         printk(KERN_ERR "onenand_write: write filaed %d\n", ret);
1246                         break;
1247                 }
1248
1249                 /* Only check verify write turn on */
1250                 ret = onenand_verify(mtd, (u_char *) wbuf, to, thislen);
1251                 if (ret) {
1252                         printk(KERN_ERR "onenand_write: verify failed %d\n", ret);
1253                         break;
1254                 }
1255
1256                 written += thislen;
1257
1258                 if (written == len)
1259                         break;
1260
1261                 column = 0;
1262                 to += thislen;
1263                 buf += thislen;
1264         }
1265
1266         /* Deselect and wake up anyone waiting on the device */
1267         onenand_release_device(mtd);
1268
1269         *retlen = written;
1270
1271         return ret;
1272 }
1273
1274 /**
1275  * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1276  * @param mtd           MTD device structure
1277  * @param oob_buf       oob buffer
1278  * @param buf           source address
1279  * @param column        oob offset to write to
1280  * @param thislen       oob length to write
1281  */
1282 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1283                                   const u_char *buf, int column, int thislen)
1284 {
1285         struct onenand_chip *this = mtd->priv;
1286         struct nand_oobfree *free;
1287         int writecol = column;
1288         int writeend = column + thislen;
1289         int lastgap = 0;
1290         unsigned int i;
1291
1292         free = this->ecclayout->oobfree;
1293         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1294                 if (writecol >= lastgap)
1295                         writecol += free->offset - lastgap;
1296                 if (writeend >= lastgap)
1297                         writeend += free->offset - lastgap;
1298                 lastgap = free->offset + free->length;
1299         }
1300         free = this->ecclayout->oobfree;
1301         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1302                 int free_end = free->offset + free->length;
1303                 if (free->offset < writeend && free_end > writecol) {
1304                         int st = max_t(int,free->offset,writecol);
1305                         int ed = min_t(int,free_end,writeend);
1306                         int n = ed - st;
1307                         memcpy(oob_buf + st, buf, n);
1308                         buf += n;
1309                 } else if (column == 0)
1310                         break;
1311         }
1312         return 0;
1313 }
1314
1315 /**
1316  * onenand_do_write_oob - [Internal] OneNAND write out-of-band
1317  * @param mtd           MTD device structure
1318  * @param to            offset to write to
1319  * @param len           number of bytes to write
1320  * @param retlen        pointer to variable to store the number of written bytes
1321  * @param buf           the data to write
1322  * @param mode          operation mode
1323  *
1324  * OneNAND write out-of-band
1325  */
1326 static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to,
1327                                 struct mtd_oob_ops *ops)
1328 {
1329         struct onenand_chip *this = mtd->priv;
1330         int column, ret = 0, oobsize;
1331         int written = 0;
1332         u_char *oobbuf;
1333         size_t len = ops->ooblen;
1334         const u_char *buf = ops->oobbuf;
1335         mtd_oob_mode_t mode = ops->mode;
1336
1337         to += ops->ooboffs;
1338
1339         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1340
1341         /* Initialize retlen, in case of early exit */
1342         ops->oobretlen = 0;
1343
1344         if (mode == MTD_OOB_AUTO)
1345                 oobsize = this->ecclayout->oobavail;
1346         else
1347                 oobsize = mtd->oobsize;
1348
1349         column = to & (mtd->oobsize - 1);
1350
1351         if (unlikely(column >= oobsize)) {
1352                 printk(KERN_ERR "onenand_write_oob: Attempted to start write outside oob\n");
1353                 return -EINVAL;
1354         }
1355
1356         /* For compatibility with NAND: Do not allow write past end of page */
1357         if (unlikely(column + len > oobsize)) {
1358                 printk(KERN_ERR "onenand_write_oob: "
1359                       "Attempt to write past end of page\n");
1360                 return -EINVAL;
1361         }
1362
1363         /* Do not allow reads past end of device */
1364         if (unlikely(to >= mtd->size ||
1365                      column + len > ((mtd->size >> this->page_shift) -
1366                                      (to >> this->page_shift)) * oobsize)) {
1367                 printk(KERN_ERR "onenand_write_oob: Attempted to write past end of device\n");
1368                 return -EINVAL;
1369         }
1370
1371         /* Grab the lock and see if the device is available */
1372         onenand_get_device(mtd, FL_WRITING);
1373
1374         oobbuf = this->oob_buf;
1375
1376         /* Loop until all data write */
1377         while (written < len) {
1378                 int thislen = min_t(int, oobsize, len - written);
1379
1380                 cond_resched();
1381
1382                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1383
1384                 /* We send data to spare ram with oobsize
1385                  * to prevent byte access */
1386                 memset(oobbuf, 0xff, mtd->oobsize);
1387                 if (mode == MTD_OOB_AUTO)
1388                         onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
1389                 else
1390                         memcpy(oobbuf + column, buf, thislen);
1391                 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1392
1393                 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1394
1395                 onenand_update_bufferram(mtd, to, 0);
1396
1397                 ret = this->wait(mtd, FL_WRITING);
1398                 if (ret) {
1399                         printk(KERN_ERR "onenand_write_oob: write failed %d\n", ret);
1400                         break;
1401                 }
1402
1403                 ret = onenand_verify_oob(mtd, oobbuf, to);
1404                 if (ret) {
1405                         printk(KERN_ERR "onenand_write_oob: verify failed %d\n", ret);
1406                         break;
1407                 }
1408
1409                 written += thislen;
1410                 if (written == len)
1411                         break;
1412
1413                 to += mtd->writesize;
1414                 buf += thislen;
1415                 column = 0;
1416         }
1417
1418         /* Deselect and wake up anyone waiting on the device */
1419         onenand_release_device(mtd);
1420
1421         ops->oobretlen = written;
1422
1423         return ret;
1424 }
1425
1426 /**
1427  * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1428  * @param mtd:          MTD device structure
1429  * @param to:           offset to write
1430  * @param ops:          oob operation description structure
1431  */
1432 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1433                              struct mtd_oob_ops *ops)
1434 {
1435         switch (ops->mode) {
1436         case MTD_OOB_PLACE:
1437         case MTD_OOB_AUTO:
1438                 break;
1439         case MTD_OOB_RAW:
1440                 /* Not implemented yet */
1441         default:
1442                 return -EINVAL;
1443         }
1444         return onenand_do_write_oob(mtd, to, ops);
1445 }
1446
1447 /**
1448  * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1449  * @param mtd           MTD device structure
1450  * @param ofs           offset from device start
1451  * @param getchip       0, if the chip is already selected
1452  * @param allowbbt      1, if its allowed to access the bbt area
1453  *
1454  * Check, if the block is bad. Either by reading the bad block table or
1455  * calling of the scan function.
1456  */
1457 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1458 {
1459         struct onenand_chip *this = mtd->priv;
1460         struct bbm_info *bbm = this->bbm;
1461
1462         /* Return info from the table */
1463         return bbm->isbad_bbt(mtd, ofs, allowbbt);
1464 }
1465
1466 /**
1467  * onenand_erase - [MTD Interface] erase block(s)
1468  * @param mtd           MTD device structure
1469  * @param instr         erase instruction
1470  *
1471  * Erase one ore more blocks
1472  */
1473 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1474 {
1475         struct onenand_chip *this = mtd->priv;
1476         unsigned int block_size;
1477         loff_t addr;
1478         int len;
1479         int ret = 0;
1480
1481         DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1482
1483         block_size = (1 << this->erase_shift);
1484
1485         /* Start address must align on block boundary */
1486         if (unlikely(instr->addr & (block_size - 1))) {
1487                 printk(KERN_ERR "onenand_erase: Unaligned address\n");
1488                 return -EINVAL;
1489         }
1490
1491         /* Length must align on block boundary */
1492         if (unlikely(instr->len & (block_size - 1))) {
1493                 printk(KERN_ERR "onenand_erase: Length not block aligned\n");
1494                 return -EINVAL;
1495         }
1496
1497         /* Do not allow erase past end of device */
1498         if (unlikely((instr->len + instr->addr) > mtd->size)) {
1499                 printk(KERN_ERR "onenand_erase: Erase past end of device\n");
1500                 return -EINVAL;
1501         }
1502
1503         instr->fail_addr = 0xffffffff;
1504
1505         /* Grab the lock and see if the device is available */
1506         onenand_get_device(mtd, FL_ERASING);
1507
1508         /* Loop throught the pages */
1509         len = instr->len;
1510         addr = instr->addr;
1511
1512         instr->state = MTD_ERASING;
1513
1514         while (len) {
1515                 cond_resched();
1516
1517                 /* Check if we have a bad block, we do not erase bad blocks */
1518                 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1519                         printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1520                         instr->state = MTD_ERASE_FAILED;
1521                         goto erase_exit;
1522                 }
1523
1524                 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1525
1526                 onenand_invalidate_bufferram(mtd, addr, block_size);
1527
1528                 ret = this->wait(mtd, FL_ERASING);
1529                 /* Check, if it is write protected */
1530                 if (ret) {
1531                         printk(KERN_ERR "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1532                         instr->state = MTD_ERASE_FAILED;
1533                         instr->fail_addr = addr;
1534                         goto erase_exit;
1535                 }
1536
1537                 len -= block_size;
1538                 addr += block_size;
1539         }
1540
1541         instr->state = MTD_ERASE_DONE;
1542
1543 erase_exit:
1544
1545         ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1546         /* Do call back function */
1547         if (!ret)
1548                 mtd_erase_callback(instr);
1549
1550         /* Deselect and wake up anyone waiting on the device */
1551         onenand_release_device(mtd);
1552
1553         return ret;
1554 }
1555
1556 /**
1557  * onenand_sync - [MTD Interface] sync
1558  * @param mtd           MTD device structure
1559  *
1560  * Sync is actually a wait for chip ready function
1561  */
1562 static void onenand_sync(struct mtd_info *mtd)
1563 {
1564         DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1565
1566         /* Grab the lock and see if the device is available */
1567         onenand_get_device(mtd, FL_SYNCING);
1568
1569         /* Release it and go back */
1570         onenand_release_device(mtd);
1571 }
1572
1573 /**
1574  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1575  * @param mtd           MTD device structure
1576  * @param ofs           offset relative to mtd start
1577  *
1578  * Check whether the block is bad
1579  */
1580 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1581 {
1582         /* Check for invalid offset */
1583         if (ofs > mtd->size)
1584                 return -EINVAL;
1585
1586         return onenand_block_checkbad(mtd, ofs, 1, 0);
1587 }
1588
1589 /**
1590  * onenand_default_block_markbad - [DEFAULT] mark a block bad
1591  * @param mtd           MTD device structure
1592  * @param ofs           offset from device start
1593  *
1594  * This is the default implementation, which can be overridden by
1595  * a hardware specific driver.
1596  */
1597 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1598 {
1599         struct onenand_chip *this = mtd->priv;
1600         struct bbm_info *bbm = this->bbm;
1601         u_char buf[2] = {0, 0};
1602         struct mtd_oob_ops ops = {
1603                 .mode = MTD_OOB_PLACE,
1604                 .ooblen = 2,
1605                 .oobbuf = buf,
1606                 .ooboffs = 0,
1607         };
1608         int block;
1609
1610         /* Get block number */
1611         block = ((int) ofs) >> bbm->bbt_erase_shift;
1612         if (bbm->bbt)
1613                 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1614
1615         /* We write two bytes, so we dont have to mess with 16 bit access */
1616         ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1617         return onenand_do_write_oob(mtd, ofs, &ops);
1618 }
1619
1620 /**
1621  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1622  * @param mtd           MTD device structure
1623  * @param ofs           offset relative to mtd start
1624  *
1625  * Mark the block as bad
1626  */
1627 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1628 {
1629         struct onenand_chip *this = mtd->priv;
1630         int ret;
1631
1632         ret = onenand_block_isbad(mtd, ofs);
1633         if (ret) {
1634                 /* If it was bad already, return success and do nothing */
1635                 if (ret > 0)
1636                         return 0;
1637                 return ret;
1638         }
1639
1640         return this->block_markbad(mtd, ofs);
1641 }
1642
1643 /**
1644  * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1645  * @param mtd           MTD device structure
1646  * @param ofs           offset relative to mtd start
1647  * @param len           number of bytes to lock or unlock
1648  * @param cmd           lock or unlock command
1649  *
1650  * Lock or unlock one or more blocks
1651  */
1652 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1653 {
1654         struct onenand_chip *this = mtd->priv;
1655         int start, end, block, value, status;
1656         int wp_status_mask;
1657
1658         start = ofs >> this->erase_shift;
1659         end = len >> this->erase_shift;
1660
1661         if (cmd == ONENAND_CMD_LOCK)
1662                 wp_status_mask = ONENAND_WP_LS;
1663         else
1664                 wp_status_mask = ONENAND_WP_US;
1665
1666         /* Continuous lock scheme */
1667         if (this->options & ONENAND_HAS_CONT_LOCK) {
1668                 /* Set start block address */
1669                 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1670                 /* Set end block address */
1671                 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1672                 /* Write lock command */
1673                 this->command(mtd, cmd, 0, 0);
1674
1675                 /* There's no return value */
1676                 this->wait(mtd, FL_LOCKING);
1677
1678                 /* Sanity check */
1679                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1680                     & ONENAND_CTRL_ONGO)
1681                         continue;
1682
1683                 /* Check lock status */
1684                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1685                 if (!(status & wp_status_mask))
1686                         printk(KERN_ERR "wp status = 0x%x\n", status);
1687
1688                 return 0;
1689         }
1690
1691         /* Block lock scheme */
1692         for (block = start; block < start + end; block++) {
1693                 /* Set block address */
1694                 value = onenand_block_address(this, block);
1695                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1696                 /* Select DataRAM for DDP */
1697                 value = onenand_bufferram_address(this, block);
1698                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1699                 /* Set start block address */
1700                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1701                 /* Write lock command */
1702                 this->command(mtd, cmd, 0, 0);
1703
1704                 /* There's no return value */
1705                 this->wait(mtd, FL_LOCKING);
1706
1707                 /* Sanity check */
1708                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1709                     & ONENAND_CTRL_ONGO)
1710                         continue;
1711
1712                 /* Check lock status */
1713                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1714                 if (!(status & wp_status_mask))
1715                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1716         }
1717
1718         return 0;
1719 }
1720
1721 /**
1722  * onenand_lock - [MTD Interface] Lock block(s)
1723  * @param mtd           MTD device structure
1724  * @param ofs           offset relative to mtd start
1725  * @param len           number of bytes to unlock
1726  *
1727  * Lock one or more blocks
1728  */
1729 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1730 {
1731         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1732 }
1733
1734 /**
1735  * onenand_unlock - [MTD Interface] Unlock block(s)
1736  * @param mtd           MTD device structure
1737  * @param ofs           offset relative to mtd start
1738  * @param len           number of bytes to unlock
1739  *
1740  * Unlock one or more blocks
1741  */
1742 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1743 {
1744         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1745 }
1746
1747 /**
1748  * onenand_check_lock_status - [OneNAND Interface] Check lock status
1749  * @param this          onenand chip data structure
1750  *
1751  * Check lock status
1752  */
1753 static void onenand_check_lock_status(struct onenand_chip *this)
1754 {
1755         unsigned int value, block, status;
1756         unsigned int end;
1757
1758         end = this->chipsize >> this->erase_shift;
1759         for (block = 0; block < end; block++) {
1760                 /* Set block address */
1761                 value = onenand_block_address(this, block);
1762                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1763                 /* Select DataRAM for DDP */
1764                 value = onenand_bufferram_address(this, block);
1765                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1766                 /* Set start block address */
1767                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1768
1769                 /* Check lock status */
1770                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1771                 if (!(status & ONENAND_WP_US))
1772                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1773         }
1774 }
1775
1776 /**
1777  * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1778  * @param mtd           MTD device structure
1779  *
1780  * Unlock all blocks
1781  */
1782 static int onenand_unlock_all(struct mtd_info *mtd)
1783 {
1784         struct onenand_chip *this = mtd->priv;
1785
1786         if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1787                 /* Set start block address */
1788                 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1789                 /* Write unlock command */
1790                 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1791
1792                 /* There's no return value */
1793                 this->wait(mtd, FL_LOCKING);
1794
1795                 /* Sanity check */
1796                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1797                     & ONENAND_CTRL_ONGO)
1798                         continue;
1799
1800                 /* Workaround for all block unlock in DDP */
1801                 if (ONENAND_IS_DDP(this)) {
1802                         /* 1st block on another chip */
1803                         loff_t ofs = this->chipsize >> 1;
1804                         size_t len = mtd->erasesize;
1805
1806                         onenand_unlock(mtd, ofs, len);
1807                 }
1808
1809                 onenand_check_lock_status(this);
1810
1811                 return 0;
1812         }
1813
1814         onenand_unlock(mtd, 0x0, this->chipsize);
1815
1816         return 0;
1817 }
1818
1819 #ifdef CONFIG_MTD_ONENAND_OTP
1820
1821 /* Interal OTP operation */
1822 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1823                 size_t *retlen, u_char *buf);
1824
1825 /**
1826  * do_otp_read - [DEFAULT] Read OTP block area
1827  * @param mtd           MTD device structure
1828  * @param from          The offset to read
1829  * @param len           number of bytes to read
1830  * @param retlen        pointer to variable to store the number of readbytes
1831  * @param buf           the databuffer to put/get data
1832  *
1833  * Read OTP block area.
1834  */
1835 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1836                 size_t *retlen, u_char *buf)
1837 {
1838         struct onenand_chip *this = mtd->priv;
1839         int ret;
1840
1841         /* Enter OTP access mode */
1842         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1843         this->wait(mtd, FL_OTPING);
1844
1845         ret = mtd->read(mtd, from, len, retlen, buf);
1846
1847         /* Exit OTP access mode */
1848         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1849         this->wait(mtd, FL_RESETING);
1850
1851         return ret;
1852 }
1853
1854 /**
1855  * do_otp_write - [DEFAULT] Write OTP block area
1856  * @param mtd           MTD device structure
1857  * @param from          The offset to write
1858  * @param len           number of bytes to write
1859  * @param retlen        pointer to variable to store the number of write bytes
1860  * @param buf           the databuffer to put/get data
1861  *
1862  * Write OTP block area.
1863  */
1864 static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1865                 size_t *retlen, u_char *buf)
1866 {
1867         struct onenand_chip *this = mtd->priv;
1868         unsigned char *pbuf = buf;
1869         int ret;
1870
1871         /* Force buffer page aligned */
1872         if (len < mtd->writesize) {
1873                 memcpy(this->page_buf, buf, len);
1874                 memset(this->page_buf + len, 0xff, mtd->writesize - len);
1875                 pbuf = this->page_buf;
1876                 len = mtd->writesize;
1877         }
1878
1879         /* Enter OTP access mode */
1880         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1881         this->wait(mtd, FL_OTPING);
1882
1883         ret = mtd->write(mtd, from, len, retlen, pbuf);
1884
1885         /* Exit OTP access mode */
1886         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1887         this->wait(mtd, FL_RESETING);
1888
1889         return ret;
1890 }
1891
1892 /**
1893  * do_otp_lock - [DEFAULT] Lock OTP block area
1894  * @param mtd           MTD device structure
1895  * @param from          The offset to lock
1896  * @param len           number of bytes to lock
1897  * @param retlen        pointer to variable to store the number of lock bytes
1898  * @param buf           the databuffer to put/get data
1899  *
1900  * Lock OTP block area.
1901  */
1902 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1903                 size_t *retlen, u_char *buf)
1904 {
1905         struct onenand_chip *this = mtd->priv;
1906         struct mtd_oob_ops ops = {
1907                 .mode = MTD_OOB_PLACE,
1908                 .ooblen = len,
1909                 .oobbuf = buf,
1910                 .ooboffs = 0,
1911         };
1912         int ret;
1913
1914         /* Enter OTP access mode */
1915         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1916         this->wait(mtd, FL_OTPING);
1917
1918         ret = onenand_do_write_oob(mtd, from, &ops);
1919
1920         *retlen = ops.oobretlen;
1921
1922         /* Exit OTP access mode */
1923         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1924         this->wait(mtd, FL_RESETING);
1925
1926         return ret;
1927 }
1928
1929 /**
1930  * onenand_otp_walk - [DEFAULT] Handle OTP operation
1931  * @param mtd           MTD device structure
1932  * @param from          The offset to read/write
1933  * @param len           number of bytes to read/write
1934  * @param retlen        pointer to variable to store the number of read bytes
1935  * @param buf           the databuffer to put/get data
1936  * @param action        do given action
1937  * @param mode          specify user and factory
1938  *
1939  * Handle OTP operation.
1940  */
1941 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1942                         size_t *retlen, u_char *buf,
1943                         otp_op_t action, int mode)
1944 {
1945         struct onenand_chip *this = mtd->priv;
1946         int otp_pages;
1947         int density;
1948         int ret = 0;
1949
1950         *retlen = 0;
1951
1952         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1953         if (density < ONENAND_DEVICE_DENSITY_512Mb)
1954                 otp_pages = 20;
1955         else
1956                 otp_pages = 10;
1957
1958         if (mode == MTD_OTP_FACTORY) {
1959                 from += mtd->writesize * otp_pages;
1960                 otp_pages = 64 - otp_pages;
1961         }
1962
1963         /* Check User/Factory boundary */
1964         if (((mtd->writesize * otp_pages) - (from + len)) < 0)
1965                 return 0;
1966
1967         while (len > 0 && otp_pages > 0) {
1968                 if (!action) {  /* OTP Info functions */
1969                         struct otp_info *otpinfo;
1970
1971                         len -= sizeof(struct otp_info);
1972                         if (len <= 0)
1973                                 return -ENOSPC;
1974
1975                         otpinfo = (struct otp_info *) buf;
1976                         otpinfo->start = from;
1977                         otpinfo->length = mtd->writesize;
1978                         otpinfo->locked = 0;
1979
1980                         from += mtd->writesize;
1981                         buf += sizeof(struct otp_info);
1982                         *retlen += sizeof(struct otp_info);
1983                 } else {
1984                         size_t tmp_retlen;
1985                         int size = len;
1986
1987                         ret = action(mtd, from, len, &tmp_retlen, buf);
1988
1989                         buf += size;
1990                         len -= size;
1991                         *retlen += size;
1992
1993                         if (ret < 0)
1994                                 return ret;
1995                 }
1996                 otp_pages--;
1997         }
1998
1999         return 0;
2000 }
2001
2002 /**
2003  * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
2004  * @param mtd           MTD device structure
2005  * @param buf           the databuffer to put/get data
2006  * @param len           number of bytes to read
2007  *
2008  * Read factory OTP info.
2009  */
2010 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
2011                         struct otp_info *buf, size_t len)
2012 {
2013         size_t retlen;
2014         int ret;
2015
2016         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
2017
2018         return ret ? : retlen;
2019 }
2020
2021 /**
2022  * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
2023  * @param mtd           MTD device structure
2024  * @param from          The offset to read
2025  * @param len           number of bytes to read
2026  * @param retlen        pointer to variable to store the number of read bytes
2027  * @param buf           the databuffer to put/get data
2028  *
2029  * Read factory OTP area.
2030  */
2031 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
2032                         size_t len, size_t *retlen, u_char *buf)
2033 {
2034         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
2035 }
2036
2037 /**
2038  * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
2039  * @param mtd           MTD device structure
2040  * @param buf           the databuffer to put/get data
2041  * @param len           number of bytes to read
2042  *
2043  * Read user OTP info.
2044  */
2045 static int onenand_get_user_prot_info(struct mtd_info *mtd,
2046                         struct otp_info *buf, size_t len)
2047 {
2048         size_t retlen;
2049         int ret;
2050
2051         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
2052
2053         return ret ? : retlen;
2054 }
2055
2056 /**
2057  * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
2058  * @param mtd           MTD device structure
2059  * @param from          The offset to read
2060  * @param len           number of bytes to read
2061  * @param retlen        pointer to variable to store the number of read bytes
2062  * @param buf           the databuffer to put/get data
2063  *
2064  * Read user OTP area.
2065  */
2066 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
2067                         size_t len, size_t *retlen, u_char *buf)
2068 {
2069         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
2070 }
2071
2072 /**
2073  * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
2074  * @param mtd           MTD device structure
2075  * @param from          The offset to write
2076  * @param len           number of bytes to write
2077  * @param retlen        pointer to variable to store the number of write bytes
2078  * @param buf           the databuffer to put/get data
2079  *
2080  * Write user OTP area.
2081  */
2082 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
2083                         size_t len, size_t *retlen, u_char *buf)
2084 {
2085         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
2086 }
2087
2088 /**
2089  * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
2090  * @param mtd           MTD device structure
2091  * @param from          The offset to lock
2092  * @param len           number of bytes to unlock
2093  *
2094  * Write lock mark on spare area in page 0 in OTP block
2095  */
2096 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
2097                         size_t len)
2098 {
2099         unsigned char oob_buf[64];
2100         size_t retlen;
2101         int ret;
2102
2103         memset(oob_buf, 0xff, mtd->oobsize);
2104         /*
2105          * Note: OTP lock operation
2106          *       OTP block : 0xXXFC
2107          *       1st block : 0xXXF3 (If chip support)
2108          *       Both      : 0xXXF0 (If chip support)
2109          */
2110         oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
2111
2112         /*
2113          * Write lock mark to 8th word of sector0 of page0 of the spare0.
2114          * We write 16 bytes spare area instead of 2 bytes.
2115          */
2116         from = 0;
2117         len = 16;
2118
2119         ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
2120
2121         return ret ? : retlen;
2122 }
2123 #endif  /* CONFIG_MTD_ONENAND_OTP */
2124
2125 /**
2126  * onenand_check_features - Check and set OneNAND features
2127  * @param mtd           MTD data structure
2128  *
2129  * Check and set OneNAND features
2130  * - lock scheme
2131  */
2132 static void onenand_check_features(struct mtd_info *mtd)
2133 {
2134         struct onenand_chip *this = mtd->priv;
2135         unsigned int density, process;
2136
2137         /* Lock scheme depends on density and process */
2138         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2139         process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
2140
2141         /* Lock scheme */
2142         if (density >= ONENAND_DEVICE_DENSITY_1Gb) {
2143                 /* A-Die has all block unlock */
2144                 if (process) {
2145                         printk(KERN_DEBUG "Chip support all block unlock\n");
2146                         this->options |= ONENAND_HAS_UNLOCK_ALL;
2147                 }
2148         } else {
2149                 /* Some OneNAND has continues lock scheme */
2150                 if (!process) {
2151                         printk(KERN_DEBUG "Lock scheme is Continues Lock\n");
2152                         this->options |= ONENAND_HAS_CONT_LOCK;
2153                 }
2154         }
2155 }
2156
2157 /**
2158  * onenand_print_device_info - Print device & version ID
2159  * @param device        device ID
2160  * @param version       version ID
2161  *
2162  * Print device & version ID
2163  */
2164 static void onenand_print_device_info(int device, int version)
2165 {
2166         int vcc, demuxed, ddp, density;
2167
2168         vcc = device & ONENAND_DEVICE_VCC_MASK;
2169         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
2170         ddp = device & ONENAND_DEVICE_IS_DDP;
2171         density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
2172         printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
2173                 demuxed ? "" : "Muxed ",
2174                 ddp ? "(DDP)" : "",
2175                 (16 << density),
2176                 vcc ? "2.65/3.3" : "1.8",
2177                 device);
2178         printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
2179 }
2180
2181 static const struct onenand_manufacturers onenand_manuf_ids[] = {
2182         {ONENAND_MFR_SAMSUNG, "Samsung"},
2183 };
2184
2185 /**
2186  * onenand_check_maf - Check manufacturer ID
2187  * @param manuf         manufacturer ID
2188  *
2189  * Check manufacturer ID
2190  */
2191 static int onenand_check_maf(int manuf)
2192 {
2193         int size = ARRAY_SIZE(onenand_manuf_ids);
2194         char *name;
2195         int i;
2196
2197         for (i = 0; i < size; i++)
2198                 if (manuf == onenand_manuf_ids[i].id)
2199                         break;
2200
2201         if (i < size)
2202                 name = onenand_manuf_ids[i].name;
2203         else
2204                 name = "Unknown";
2205
2206         printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
2207
2208         return (i == size);
2209 }
2210
2211 /**
2212  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
2213  * @param mtd           MTD device structure
2214  *
2215  * OneNAND detection method:
2216  *   Compare the values from command with ones from register
2217  */
2218 static int onenand_probe(struct mtd_info *mtd)
2219 {
2220         struct onenand_chip *this = mtd->priv;
2221         int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
2222         int density;
2223         int syscfg;
2224
2225         /* Save system configuration 1 */
2226         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
2227         /* Clear Sync. Burst Read mode to read BootRAM */
2228         this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
2229
2230         /* Send the command for reading device ID from BootRAM */
2231         this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
2232
2233         /* Read manufacturer and device IDs from BootRAM */
2234         bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
2235         bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
2236
2237         /* Reset OneNAND to read default register values */
2238         this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
2239         /* Wait reset */
2240         this->wait(mtd, FL_RESETING);
2241
2242         /* Restore system configuration 1 */
2243         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
2244
2245         /* Check manufacturer ID */
2246         if (onenand_check_maf(bram_maf_id))
2247                 return -ENXIO;
2248
2249         /* Read manufacturer and device IDs from Register */
2250         maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
2251         dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
2252         ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
2253
2254         /* Check OneNAND device */
2255         if (maf_id != bram_maf_id || dev_id != bram_dev_id)
2256                 return -ENXIO;
2257
2258         /* Flash device information */
2259         onenand_print_device_info(dev_id, ver_id);
2260         this->device_id = dev_id;
2261         this->version_id = ver_id;
2262
2263         density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2264         this->chipsize = (16 << density) << 20;
2265         /* Set density mask. it is used for DDP */
2266         if (ONENAND_IS_DDP(this))
2267                 this->density_mask = (1 << (density + 6));
2268         else
2269                 this->density_mask = 0;
2270
2271         /* OneNAND page size & block size */
2272         /* The data buffer size is equal to page size */
2273         mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
2274         mtd->oobsize = mtd->writesize >> 5;
2275         /* Pages per a block are always 64 in OneNAND */
2276         mtd->erasesize = mtd->writesize << 6;
2277
2278         this->erase_shift = ffs(mtd->erasesize) - 1;
2279         this->page_shift = ffs(mtd->writesize) - 1;
2280         this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
2281
2282         /* REVIST: Multichip handling */
2283
2284         mtd->size = this->chipsize;
2285
2286         /* Check OneNAND features */
2287         onenand_check_features(mtd);
2288
2289         return 0;
2290 }
2291
2292 /**
2293  * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
2294  * @param mtd           MTD device structure
2295  */
2296 static int onenand_suspend(struct mtd_info *mtd)
2297 {
2298         return onenand_get_device(mtd, FL_PM_SUSPENDED);
2299 }
2300
2301 /**
2302  * onenand_resume - [MTD Interface] Resume the OneNAND flash
2303  * @param mtd           MTD device structure
2304  */
2305 static void onenand_resume(struct mtd_info *mtd)
2306 {
2307         struct onenand_chip *this = mtd->priv;
2308
2309         if (this->state == FL_PM_SUSPENDED)
2310                 onenand_release_device(mtd);
2311         else
2312                 printk(KERN_ERR "resume() called for the chip which is not"
2313                                 "in suspended state\n");
2314 }
2315
2316 /**
2317  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2318  * @param mtd           MTD device structure
2319  * @param maxchips      Number of chips to scan for
2320  *
2321  * This fills out all the not initialized function pointers
2322  * with the defaults.
2323  * The flash ID is read and the mtd/chip structures are
2324  * filled with the appropriate values.
2325  */
2326 int onenand_scan(struct mtd_info *mtd, int maxchips)
2327 {
2328         int i;
2329         struct onenand_chip *this = mtd->priv;
2330
2331         if (!this->read_word)
2332                 this->read_word = onenand_readw;
2333         if (!this->write_word)
2334                 this->write_word = onenand_writew;
2335
2336         if (!this->command)
2337                 this->command = onenand_command;
2338         if (!this->wait)
2339                 onenand_setup_wait(mtd);
2340
2341         if (!this->read_bufferram)
2342                 this->read_bufferram = onenand_read_bufferram;
2343         if (!this->write_bufferram)
2344                 this->write_bufferram = onenand_write_bufferram;
2345
2346         if (!this->block_markbad)
2347                 this->block_markbad = onenand_default_block_markbad;
2348         if (!this->scan_bbt)
2349                 this->scan_bbt = onenand_default_bbt;
2350
2351         if (onenand_probe(mtd))
2352                 return -ENXIO;
2353
2354         /* Set Sync. Burst Read after probing */
2355         if (this->mmcontrol) {
2356                 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2357                 this->read_bufferram = onenand_sync_read_bufferram;
2358         }
2359
2360         /* Allocate buffers, if necessary */
2361         if (!this->page_buf) {
2362                 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
2363                 if (!this->page_buf) {
2364                         printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2365                         return -ENOMEM;
2366                 }
2367                 this->options |= ONENAND_PAGEBUF_ALLOC;
2368         }
2369         if (!this->oob_buf) {
2370                 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
2371                 if (!this->oob_buf) {
2372                         printk(KERN_ERR "onenand_scan(): Can't allocate oob_buf\n");
2373                         if (this->options & ONENAND_PAGEBUF_ALLOC) {
2374                                 this->options &= ~ONENAND_PAGEBUF_ALLOC;
2375                                 kfree(this->page_buf);
2376                         }
2377                         return -ENOMEM;
2378                 }
2379                 this->options |= ONENAND_OOBBUF_ALLOC;
2380         }
2381
2382         this->state = FL_READY;
2383         init_waitqueue_head(&this->wq);
2384         spin_lock_init(&this->chip_lock);
2385
2386         /*
2387          * Allow subpage writes up to oobsize.
2388          */
2389         switch (mtd->oobsize) {
2390         case 64:
2391                 this->ecclayout = &onenand_oob_64;
2392                 mtd->subpage_sft = 2;
2393                 break;
2394
2395         case 32:
2396                 this->ecclayout = &onenand_oob_32;
2397                 mtd->subpage_sft = 1;
2398                 break;
2399
2400         default:
2401                 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2402                         mtd->oobsize);
2403                 mtd->subpage_sft = 0;
2404                 /* To prevent kernel oops */
2405                 this->ecclayout = &onenand_oob_32;
2406                 break;
2407         }
2408
2409         this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2410
2411         /*
2412          * The number of bytes available for a client to place data into
2413          * the out of band area
2414          */
2415         this->ecclayout->oobavail = 0;
2416         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
2417             this->ecclayout->oobfree[i].length; i++)
2418                 this->ecclayout->oobavail +=
2419                         this->ecclayout->oobfree[i].length;
2420         mtd->oobavail = this->ecclayout->oobavail;
2421
2422         mtd->ecclayout = this->ecclayout;
2423
2424         /* Fill in remaining MTD driver data */
2425         mtd->type = MTD_NANDFLASH;
2426         mtd->flags = MTD_CAP_NANDFLASH;
2427         mtd->erase = onenand_erase;
2428         mtd->point = NULL;
2429         mtd->unpoint = NULL;
2430         mtd->read = onenand_read;
2431         mtd->write = onenand_write;
2432         mtd->read_oob = onenand_read_oob;
2433         mtd->write_oob = onenand_write_oob;
2434 #ifdef CONFIG_MTD_ONENAND_OTP
2435         mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2436         mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2437         mtd->get_user_prot_info = onenand_get_user_prot_info;
2438         mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2439         mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2440         mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2441 #endif
2442         mtd->sync = onenand_sync;
2443         mtd->lock = onenand_lock;
2444         mtd->unlock = onenand_unlock;
2445         mtd->suspend = onenand_suspend;
2446         mtd->resume = onenand_resume;
2447         mtd->block_isbad = onenand_block_isbad;
2448         mtd->block_markbad = onenand_block_markbad;
2449         mtd->owner = THIS_MODULE;
2450
2451         /* Unlock whole block */
2452         onenand_unlock_all(mtd);
2453
2454         return this->scan_bbt(mtd);
2455 }
2456
2457 /**
2458  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2459  * @param mtd           MTD device structure
2460  */
2461 void onenand_release(struct mtd_info *mtd)
2462 {
2463         struct onenand_chip *this = mtd->priv;
2464
2465 #ifdef CONFIG_MTD_PARTITIONS
2466         /* Deregister partitions */
2467         del_mtd_partitions (mtd);
2468 #endif
2469         /* Deregister the device */
2470         del_mtd_device (mtd);
2471
2472         /* Free bad block table memory, if allocated */
2473         if (this->bbm) {
2474                 struct bbm_info *bbm = this->bbm;
2475                 kfree(bbm->bbt);
2476                 kfree(this->bbm);
2477         }
2478         /* Buffers allocated by onenand_scan */
2479         if (this->options & ONENAND_PAGEBUF_ALLOC)
2480                 kfree(this->page_buf);
2481         if (this->options & ONENAND_OOBBUF_ALLOC)
2482                 kfree(this->oob_buf);
2483 }
2484
2485 EXPORT_SYMBOL_GPL(onenand_scan);
2486 EXPORT_SYMBOL_GPL(onenand_release);
2487
2488 MODULE_LICENSE("GPL");
2489 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2490 MODULE_DESCRIPTION("Generic OneNAND flash driver code");