2 * linux/drivers/mtd/onenand/onenand_base.c
4 * Copyright (C) 2005-2007 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
8 * Adrian Hunter <ext-adrian.hunter@nokia.com>:
9 * auto-placement support, read-while load support, various fixes
10 * Copyright (C) Nokia Corporation, 2007
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/sched.h>
21 #include <linux/interrupt.h>
22 #include <linux/jiffies.h>
23 #include <linux/mtd/mtd.h>
24 #include <linux/mtd/onenand.h>
25 #include <linux/mtd/partitions.h>
30 * onenand_oob_64 - oob info for large (2KB) page
32 static struct nand_ecclayout onenand_oob_64 = {
41 {2, 3}, {14, 2}, {18, 3}, {30, 2},
42 {34, 3}, {46, 2}, {50, 3}, {62, 2}
47 * onenand_oob_32 - oob info for middle (1KB) page
49 static struct nand_ecclayout onenand_oob_32 = {
55 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
58 static const unsigned char ffchars[] = {
59 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
60 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
61 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
62 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
63 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
64 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
65 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
66 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
70 * onenand_readw - [OneNAND Interface] Read OneNAND register
71 * @param addr address to read
73 * Read OneNAND register
75 static unsigned short onenand_readw(void __iomem *addr)
81 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
82 * @param value value to write
83 * @param addr address to write
85 * Write OneNAND register with value
87 static void onenand_writew(unsigned short value, void __iomem *addr)
93 * onenand_block_address - [DEFAULT] Get block address
94 * @param this onenand chip data structure
95 * @param block the block
96 * @return translated block address if DDP, otherwise same
98 * Setup Start Address 1 Register (F100h)
100 static int onenand_block_address(struct onenand_chip *this, int block)
102 /* Device Flash Core select, NAND Flash Block Address */
103 if (block & this->density_mask)
104 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
110 * onenand_bufferram_address - [DEFAULT] Get bufferram address
111 * @param this onenand chip data structure
112 * @param block the block
113 * @return set DBS value if DDP, otherwise 0
115 * Setup Start Address 2 Register (F101h) for DDP
117 static int onenand_bufferram_address(struct onenand_chip *this, int block)
119 /* Device BufferRAM Select */
120 if (block & this->density_mask)
121 return ONENAND_DDP_CHIP1;
123 return ONENAND_DDP_CHIP0;
127 * onenand_page_address - [DEFAULT] Get page address
128 * @param page the page address
129 * @param sector the sector address
130 * @return combined page and sector address
132 * Setup Start Address 8 Register (F107h)
134 static int onenand_page_address(int page, int sector)
136 /* Flash Page Address, Flash Sector Address */
139 fpa = page & ONENAND_FPA_MASK;
140 fsa = sector & ONENAND_FSA_MASK;
142 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
146 * onenand_buffer_address - [DEFAULT] Get buffer address
147 * @param dataram1 DataRAM index
148 * @param sectors the sector address
149 * @param count the number of sectors
150 * @return the start buffer value
152 * Setup Start Buffer Register (F200h)
154 static int onenand_buffer_address(int dataram1, int sectors, int count)
158 /* BufferRAM Sector Address */
159 bsa = sectors & ONENAND_BSA_MASK;
162 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
164 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
166 /* BufferRAM Sector Count */
167 bsc = count & ONENAND_BSC_MASK;
169 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
173 * onenand_command - [DEFAULT] Send command to OneNAND device
174 * @param mtd MTD device structure
175 * @param cmd the command to be sent
176 * @param addr offset to read from or write to
177 * @param len number of bytes to read or write
179 * Send command to OneNAND device. This function is used for middle/large page
180 * devices (1KB/2KB Bytes per page)
182 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
184 struct onenand_chip *this = mtd->priv;
185 int value, readcmd = 0, block_cmd = 0;
188 /* Address translation */
190 case ONENAND_CMD_UNLOCK:
191 case ONENAND_CMD_LOCK:
192 case ONENAND_CMD_LOCK_TIGHT:
193 case ONENAND_CMD_UNLOCK_ALL:
198 case ONENAND_CMD_ERASE:
199 case ONENAND_CMD_BUFFERRAM:
200 case ONENAND_CMD_OTP_ACCESS:
202 block = (int) (addr >> this->erase_shift);
207 block = (int) (addr >> this->erase_shift);
208 page = (int) (addr >> this->page_shift);
210 if (ONENAND_IS_2PLANE(this)) {
211 /* Make the even block number */
213 /* Is it the odd plane? */
214 if (addr & this->writesize)
218 page &= this->page_mask;
222 /* NOTE: The setting order of the registers is very important! */
223 if (cmd == ONENAND_CMD_BUFFERRAM) {
224 /* Select DataRAM for DDP */
225 value = onenand_bufferram_address(this, block);
226 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
228 if (ONENAND_IS_2PLANE(this))
229 /* It is always BufferRAM0 */
230 ONENAND_SET_BUFFERRAM0(this);
232 /* Switch to the next data buffer */
233 ONENAND_SET_NEXT_BUFFERRAM(this);
239 /* Write 'DFS, FBA' of Flash */
240 value = onenand_block_address(this, block);
241 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
244 /* Select DataRAM for DDP */
245 value = onenand_bufferram_address(this, block);
246 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
251 /* Now we use page size operation */
252 int sectors = 4, count = 4;
256 case ONENAND_CMD_READ:
257 case ONENAND_CMD_READOOB:
258 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
263 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
264 cmd = ONENAND_CMD_2X_PROG;
265 dataram = ONENAND_CURRENT_BUFFERRAM(this);
269 /* Write 'FPA, FSA' of Flash */
270 value = onenand_page_address(page, sectors);
271 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
273 /* Write 'BSA, BSC' of DataRAM */
274 value = onenand_buffer_address(dataram, sectors, count);
275 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
278 /* Select DataRAM for DDP */
279 value = onenand_bufferram_address(this, block);
280 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
284 /* Interrupt clear */
285 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
288 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
294 * onenand_wait - [DEFAULT] wait until the command is done
295 * @param mtd MTD device structure
296 * @param state state to select the max. timeout value
298 * Wait for command done. This applies to all OneNAND command
299 * Read can take up to 30us, erase up to 2ms and program up to 350us
300 * according to general OneNAND specs
302 static int onenand_wait(struct mtd_info *mtd, int state)
304 struct onenand_chip * this = mtd->priv;
305 unsigned long timeout;
306 unsigned int flags = ONENAND_INT_MASTER;
307 unsigned int interrupt = 0;
310 /* The 20 msec is enough */
311 timeout = jiffies + msecs_to_jiffies(20);
312 while (time_before(jiffies, timeout)) {
313 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
315 if (interrupt & flags)
318 if (state != FL_READING)
321 /* To get correct interrupt status in timeout case */
322 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
324 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
326 if (ctrl & ONENAND_CTRL_ERROR) {
327 printk(KERN_ERR "onenand_wait: controller error = 0x%04x\n", ctrl);
328 if (ctrl & ONENAND_CTRL_LOCK)
329 printk(KERN_ERR "onenand_wait: it's locked error.\n");
333 if (interrupt & ONENAND_INT_READ) {
334 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
336 if (ecc & ONENAND_ECC_2BIT_ALL) {
337 printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc);
338 mtd->ecc_stats.failed++;
340 } else if (ecc & ONENAND_ECC_1BIT_ALL) {
341 printk(KERN_INFO "onenand_wait: correctable ECC error = 0x%04x\n", ecc);
342 mtd->ecc_stats.corrected++;
345 } else if (state == FL_READING) {
346 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
354 * onenand_interrupt - [DEFAULT] onenand interrupt handler
355 * @param irq onenand interrupt number
356 * @param dev_id interrupt data
360 static irqreturn_t onenand_interrupt(int irq, void *data)
362 struct onenand_chip *this = data;
364 /* To handle shared interrupt */
365 if (!this->complete.done)
366 complete(&this->complete);
372 * onenand_interrupt_wait - [DEFAULT] wait until the command is done
373 * @param mtd MTD device structure
374 * @param state state to select the max. timeout value
376 * Wait for command done.
378 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
380 struct onenand_chip *this = mtd->priv;
382 wait_for_completion(&this->complete);
384 return onenand_wait(mtd, state);
388 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
389 * @param mtd MTD device structure
390 * @param state state to select the max. timeout value
392 * Try interrupt based wait (It is used one-time)
394 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
396 struct onenand_chip *this = mtd->priv;
397 unsigned long remain, timeout;
399 /* We use interrupt wait first */
400 this->wait = onenand_interrupt_wait;
402 timeout = msecs_to_jiffies(100);
403 remain = wait_for_completion_timeout(&this->complete, timeout);
405 printk(KERN_INFO "OneNAND: There's no interrupt. "
406 "We use the normal wait\n");
408 /* Release the irq */
409 free_irq(this->irq, this);
411 this->wait = onenand_wait;
414 return onenand_wait(mtd, state);
418 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
419 * @param mtd MTD device structure
421 * There's two method to wait onenand work
422 * 1. polling - read interrupt status register
423 * 2. interrupt - use the kernel interrupt method
425 static void onenand_setup_wait(struct mtd_info *mtd)
427 struct onenand_chip *this = mtd->priv;
430 init_completion(&this->complete);
432 if (this->irq <= 0) {
433 this->wait = onenand_wait;
437 if (request_irq(this->irq, &onenand_interrupt,
438 IRQF_SHARED, "onenand", this)) {
439 /* If we can't get irq, use the normal wait */
440 this->wait = onenand_wait;
444 /* Enable interrupt */
445 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
446 syscfg |= ONENAND_SYS_CFG1_IOBE;
447 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
449 this->wait = onenand_try_interrupt_wait;
453 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
454 * @param mtd MTD data structure
455 * @param area BufferRAM area
456 * @return offset given area
458 * Return BufferRAM offset given area
460 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
462 struct onenand_chip *this = mtd->priv;
464 if (ONENAND_CURRENT_BUFFERRAM(this)) {
465 /* Note: the 'this->writesize' is a real page size */
466 if (area == ONENAND_DATARAM)
467 return this->writesize;
468 if (area == ONENAND_SPARERAM)
476 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
477 * @param mtd MTD data structure
478 * @param area BufferRAM area
479 * @param buffer the databuffer to put/get data
480 * @param offset offset to read from or write to
481 * @param count number of bytes to read/write
483 * Read the BufferRAM area
485 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
486 unsigned char *buffer, int offset, size_t count)
488 struct onenand_chip *this = mtd->priv;
489 void __iomem *bufferram;
491 bufferram = this->base + area;
493 bufferram += onenand_bufferram_offset(mtd, area);
495 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
498 /* Align with word(16-bit) size */
501 /* Read word and save byte */
502 word = this->read_word(bufferram + offset + count);
503 buffer[count] = (word & 0xff);
506 memcpy(buffer, bufferram + offset, count);
512 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
513 * @param mtd MTD data structure
514 * @param area BufferRAM area
515 * @param buffer the databuffer to put/get data
516 * @param offset offset to read from or write to
517 * @param count number of bytes to read/write
519 * Read the BufferRAM area with Sync. Burst Mode
521 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
522 unsigned char *buffer, int offset, size_t count)
524 struct onenand_chip *this = mtd->priv;
525 void __iomem *bufferram;
527 bufferram = this->base + area;
529 bufferram += onenand_bufferram_offset(mtd, area);
531 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
533 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
536 /* Align with word(16-bit) size */
539 /* Read word and save byte */
540 word = this->read_word(bufferram + offset + count);
541 buffer[count] = (word & 0xff);
544 memcpy(buffer, bufferram + offset, count);
546 this->mmcontrol(mtd, 0);
552 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
553 * @param mtd MTD data structure
554 * @param area BufferRAM area
555 * @param buffer the databuffer to put/get data
556 * @param offset offset to read from or write to
557 * @param count number of bytes to read/write
559 * Write the BufferRAM area
561 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
562 const unsigned char *buffer, int offset, size_t count)
564 struct onenand_chip *this = mtd->priv;
565 void __iomem *bufferram;
567 bufferram = this->base + area;
569 bufferram += onenand_bufferram_offset(mtd, area);
571 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
575 /* Align with word(16-bit) size */
578 /* Calculate byte access offset */
579 byte_offset = offset + count;
581 /* Read word and save byte */
582 word = this->read_word(bufferram + byte_offset);
583 word = (word & ~0xff) | buffer[count];
584 this->write_word(word, bufferram + byte_offset);
587 memcpy(bufferram + offset, buffer, count);
593 * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
594 * @param mtd MTD data structure
595 * @param addr address to check
596 * @return blockpage address
598 * Get blockpage address at 2x program mode
600 static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
602 struct onenand_chip *this = mtd->priv;
603 int blockpage, block, page;
605 /* Calculate the even block number */
606 block = (int) (addr >> this->erase_shift) & ~1;
607 /* Is it the odd plane? */
608 if (addr & this->writesize)
610 page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
611 blockpage = (block << 7) | page;
617 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
618 * @param mtd MTD data structure
619 * @param addr address to check
620 * @return 1 if there are valid data, otherwise 0
622 * Check bufferram if there is data we required
624 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
626 struct onenand_chip *this = mtd->priv;
627 int blockpage, found = 0;
630 if (ONENAND_IS_2PLANE(this))
631 blockpage = onenand_get_2x_blockpage(mtd, addr);
633 blockpage = (int) (addr >> this->page_shift);
635 /* Is there valid data? */
636 i = ONENAND_CURRENT_BUFFERRAM(this);
637 if (this->bufferram[i].blockpage == blockpage)
640 /* Check another BufferRAM */
641 i = ONENAND_NEXT_BUFFERRAM(this);
642 if (this->bufferram[i].blockpage == blockpage) {
643 ONENAND_SET_NEXT_BUFFERRAM(this);
648 if (found && ONENAND_IS_DDP(this)) {
649 /* Select DataRAM for DDP */
650 int block = (int) (addr >> this->erase_shift);
651 int value = onenand_bufferram_address(this, block);
652 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
659 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
660 * @param mtd MTD data structure
661 * @param addr address to update
662 * @param valid valid flag
664 * Update BufferRAM information
666 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
669 struct onenand_chip *this = mtd->priv;
673 if (ONENAND_IS_2PLANE(this))
674 blockpage = onenand_get_2x_blockpage(mtd, addr);
676 blockpage = (int) (addr >> this->page_shift);
678 /* Invalidate another BufferRAM */
679 i = ONENAND_NEXT_BUFFERRAM(this);
680 if (this->bufferram[i].blockpage == blockpage)
681 this->bufferram[i].blockpage = -1;
683 /* Update BufferRAM */
684 i = ONENAND_CURRENT_BUFFERRAM(this);
686 this->bufferram[i].blockpage = blockpage;
688 this->bufferram[i].blockpage = -1;
692 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
693 * @param mtd MTD data structure
694 * @param addr start address to invalidate
695 * @param len length to invalidate
697 * Invalidate BufferRAM information
699 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
702 struct onenand_chip *this = mtd->priv;
704 loff_t end_addr = addr + len;
706 /* Invalidate BufferRAM */
707 for (i = 0; i < MAX_BUFFERRAM; i++) {
708 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
709 if (buf_addr >= addr && buf_addr < end_addr)
710 this->bufferram[i].blockpage = -1;
715 * onenand_get_device - [GENERIC] Get chip for selected access
716 * @param mtd MTD device structure
717 * @param new_state the state which is requested
719 * Get the device and lock it for exclusive access
721 static int onenand_get_device(struct mtd_info *mtd, int new_state)
723 struct onenand_chip *this = mtd->priv;
724 DECLARE_WAITQUEUE(wait, current);
727 * Grab the lock and see if the device is available
730 spin_lock(&this->chip_lock);
731 if (this->state == FL_READY) {
732 this->state = new_state;
733 spin_unlock(&this->chip_lock);
736 if (new_state == FL_PM_SUSPENDED) {
737 spin_unlock(&this->chip_lock);
738 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
740 set_current_state(TASK_UNINTERRUPTIBLE);
741 add_wait_queue(&this->wq, &wait);
742 spin_unlock(&this->chip_lock);
744 remove_wait_queue(&this->wq, &wait);
751 * onenand_release_device - [GENERIC] release chip
752 * @param mtd MTD device structure
754 * Deselect, release chip lock and wake up anyone waiting on the device
756 static void onenand_release_device(struct mtd_info *mtd)
758 struct onenand_chip *this = mtd->priv;
760 /* Release the chip */
761 spin_lock(&this->chip_lock);
762 this->state = FL_READY;
764 spin_unlock(&this->chip_lock);
768 * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
769 * @param mtd MTD device structure
770 * @param buf destination address
771 * @param column oob offset to read from
772 * @param thislen oob length to read
774 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
777 struct onenand_chip *this = mtd->priv;
778 struct nand_oobfree *free;
779 int readcol = column;
780 int readend = column + thislen;
783 uint8_t *oob_buf = this->oob_buf;
785 free = this->ecclayout->oobfree;
786 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
787 if (readcol >= lastgap)
788 readcol += free->offset - lastgap;
789 if (readend >= lastgap)
790 readend += free->offset - lastgap;
791 lastgap = free->offset + free->length;
793 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
794 free = this->ecclayout->oobfree;
795 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
796 int free_end = free->offset + free->length;
797 if (free->offset < readend && free_end > readcol) {
798 int st = max_t(int,free->offset,readcol);
799 int ed = min_t(int,free_end,readend);
801 memcpy(buf, oob_buf + st, n);
803 } else if (column == 0)
810 * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
811 * @param mtd MTD device structure
812 * @param from offset to read from
813 * @param ops: oob operation description structure
815 * OneNAND read main and/or out-of-band data
817 static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
818 struct mtd_oob_ops *ops)
820 struct onenand_chip *this = mtd->priv;
821 struct mtd_ecc_stats stats;
822 size_t len = ops->len;
823 size_t ooblen = ops->ooblen;
824 u_char *buf = ops->datbuf;
825 u_char *oobbuf = ops->oobbuf;
826 int read = 0, column, thislen;
827 int oobread = 0, oobcolumn, thisooblen, oobsize;
828 int ret = 0, boundary = 0;
829 int writesize = this->writesize;
831 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ops_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
833 if (ops->mode == MTD_OOB_AUTO)
834 oobsize = this->ecclayout->oobavail;
836 oobsize = mtd->oobsize;
838 oobcolumn = from & (mtd->oobsize - 1);
840 /* Do not allow reads past end of device */
841 if ((from + len) > mtd->size) {
842 printk(KERN_ERR "onenand_read_ops_nolock: Attempt read beyond end of device\n");
848 stats = mtd->ecc_stats;
850 /* Read-while-load method */
852 /* Do first load to bufferRAM */
854 if (!onenand_check_bufferram(mtd, from)) {
855 this->command(mtd, ONENAND_CMD_READ, from, writesize);
856 ret = this->wait(mtd, FL_READING);
857 onenand_update_bufferram(mtd, from, !ret);
863 thislen = min_t(int, writesize, len - read);
864 column = from & (writesize - 1);
865 if (column + thislen > writesize)
866 thislen = writesize - column;
869 /* If there is more to load then start next load */
871 if (read + thislen < len) {
872 this->command(mtd, ONENAND_CMD_READ, from, writesize);
874 * Chip boundary handling in DDP
875 * Now we issued chip 1 read and pointed chip 1
876 * bufferam so we have to point chip 0 bufferam.
878 if (ONENAND_IS_DDP(this) &&
879 unlikely(from == (this->chipsize >> 1))) {
880 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
884 ONENAND_SET_PREV_BUFFERRAM(this);
886 /* While load is going, read from last bufferRAM */
887 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
889 /* Read oob area if needed */
891 thisooblen = oobsize - oobcolumn;
892 thisooblen = min_t(int, thisooblen, ooblen - oobread);
894 if (ops->mode == MTD_OOB_AUTO)
895 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
897 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
898 oobread += thisooblen;
899 oobbuf += thisooblen;
903 /* See if we are done */
907 /* Set up for next read from bufferRAM */
908 if (unlikely(boundary))
909 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
910 ONENAND_SET_NEXT_BUFFERRAM(this);
912 thislen = min_t(int, writesize, len - read);
915 /* Now wait for load */
916 ret = this->wait(mtd, FL_READING);
917 onenand_update_bufferram(mtd, from, !ret);
923 * Return success, if no ECC failures, else -EBADMSG
924 * fs driver will take care of that, because
925 * retlen == desired len and result == -EBADMSG
928 ops->oobretlen = oobread;
933 if (mtd->ecc_stats.failed - stats.failed)
936 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
940 * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
941 * @param mtd MTD device structure
942 * @param from offset to read from
943 * @param ops: oob operation description structure
945 * OneNAND read out-of-band data from the spare area
947 static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
948 struct mtd_oob_ops *ops)
950 struct onenand_chip *this = mtd->priv;
951 struct mtd_ecc_stats stats;
952 int read = 0, thislen, column, oobsize;
953 size_t len = ops->ooblen;
954 mtd_oob_mode_t mode = ops->mode;
955 u_char *buf = ops->oobbuf;
958 from += ops->ooboffs;
960 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
962 /* Initialize return length value */
965 if (mode == MTD_OOB_AUTO)
966 oobsize = this->ecclayout->oobavail;
968 oobsize = mtd->oobsize;
970 column = from & (mtd->oobsize - 1);
972 if (unlikely(column >= oobsize)) {
973 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to start read outside oob\n");
977 /* Do not allow reads past end of device */
978 if (unlikely(from >= mtd->size ||
979 column + len > ((mtd->size >> this->page_shift) -
980 (from >> this->page_shift)) * oobsize)) {
981 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to read beyond end of device\n");
985 stats = mtd->ecc_stats;
990 thislen = oobsize - column;
991 thislen = min_t(int, thislen, len);
993 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
995 onenand_update_bufferram(mtd, from, 0);
997 ret = this->wait(mtd, FL_READING);
998 if (ret && ret != -EBADMSG) {
999 printk(KERN_ERR "onenand_read_oob_nolock: read failed = 0x%x\n", ret);
1003 if (mode == MTD_OOB_AUTO)
1004 onenand_transfer_auto_oob(mtd, buf, column, thislen);
1006 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1018 from += mtd->writesize;
1023 ops->oobretlen = read;
1028 if (mtd->ecc_stats.failed - stats.failed)
1035 * onenand_read - [MTD Interface] Read data from flash
1036 * @param mtd MTD device structure
1037 * @param from offset to read from
1038 * @param len number of bytes to read
1039 * @param retlen pointer to variable to store the number of read bytes
1040 * @param buf the databuffer to put data
1044 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
1045 size_t *retlen, u_char *buf)
1047 struct mtd_oob_ops ops = {
1055 onenand_get_device(mtd, FL_READING);
1056 ret = onenand_read_ops_nolock(mtd, from, &ops);
1057 onenand_release_device(mtd);
1059 *retlen = ops.retlen;
1064 * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
1065 * @param mtd: MTD device structure
1066 * @param from: offset to read from
1067 * @param ops: oob operation description structure
1069 * Read main and/or out-of-band
1071 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1072 struct mtd_oob_ops *ops)
1076 switch (ops->mode) {
1081 /* Not implemented yet */
1086 onenand_get_device(mtd, FL_READING);
1088 ret = onenand_read_ops_nolock(mtd, from, ops);
1090 ret = onenand_read_oob_nolock(mtd, from, ops);
1091 onenand_release_device(mtd);
1097 * onenand_bbt_wait - [DEFAULT] wait until the command is done
1098 * @param mtd MTD device structure
1099 * @param state state to select the max. timeout value
1101 * Wait for command done.
1103 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1105 struct onenand_chip *this = mtd->priv;
1106 unsigned long timeout;
1107 unsigned int interrupt;
1110 /* The 20 msec is enough */
1111 timeout = jiffies + msecs_to_jiffies(20);
1112 while (time_before(jiffies, timeout)) {
1113 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1114 if (interrupt & ONENAND_INT_MASTER)
1117 /* To get correct interrupt status in timeout case */
1118 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1119 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1121 if (ctrl & ONENAND_CTRL_ERROR) {
1122 printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl);
1123 /* Initial bad block case */
1124 if (ctrl & ONENAND_CTRL_LOAD)
1125 return ONENAND_BBT_READ_ERROR;
1126 return ONENAND_BBT_READ_FATAL_ERROR;
1129 if (interrupt & ONENAND_INT_READ) {
1130 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
1131 if (ecc & ONENAND_ECC_2BIT_ALL)
1132 return ONENAND_BBT_READ_ERROR;
1134 printk(KERN_ERR "onenand_bbt_wait: read timeout!"
1135 "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
1136 return ONENAND_BBT_READ_FATAL_ERROR;
1143 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1144 * @param mtd MTD device structure
1145 * @param from offset to read from
1146 * @param ops oob operation description structure
1148 * OneNAND read out-of-band data from the spare area for bbt scan
1150 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1151 struct mtd_oob_ops *ops)
1153 struct onenand_chip *this = mtd->priv;
1154 int read = 0, thislen, column;
1156 size_t len = ops->ooblen;
1157 u_char *buf = ops->oobbuf;
1159 DEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len);
1161 /* Initialize return value */
1164 /* Do not allow reads past end of device */
1165 if (unlikely((from + len) > mtd->size)) {
1166 printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
1167 return ONENAND_BBT_READ_FATAL_ERROR;
1170 /* Grab the lock and see if the device is available */
1171 onenand_get_device(mtd, FL_READING);
1173 column = from & (mtd->oobsize - 1);
1175 while (read < len) {
1178 thislen = mtd->oobsize - column;
1179 thislen = min_t(int, thislen, len);
1181 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
1183 onenand_update_bufferram(mtd, from, 0);
1185 ret = onenand_bbt_wait(mtd, FL_READING);
1189 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1198 /* Update Page size */
1199 from += this->writesize;
1204 /* Deselect and wake up anyone waiting on the device */
1205 onenand_release_device(mtd);
1207 ops->oobretlen = read;
1211 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1213 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1214 * @param mtd MTD device structure
1215 * @param buf the databuffer to verify
1216 * @param to offset to read from
1218 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1220 struct onenand_chip *this = mtd->priv;
1224 this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
1225 onenand_update_bufferram(mtd, to, 0);
1226 status = this->wait(mtd, FL_READING);
1230 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1231 for (i = 0; i < mtd->oobsize; i++)
1232 if (buf[i] != 0xFF && buf[i] != oobbuf[i])
1239 * onenand_verify - [GENERIC] verify the chip contents after a write
1240 * @param mtd MTD device structure
1241 * @param buf the databuffer to verify
1242 * @param addr offset to read from
1243 * @param len number of bytes to read and compare
1245 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1247 struct onenand_chip *this = mtd->priv;
1248 void __iomem *dataram;
1250 int thislen, column;
1253 thislen = min_t(int, this->writesize, len);
1254 column = addr & (this->writesize - 1);
1255 if (column + thislen > this->writesize)
1256 thislen = this->writesize - column;
1258 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
1260 onenand_update_bufferram(mtd, addr, 0);
1262 ret = this->wait(mtd, FL_READING);
1266 onenand_update_bufferram(mtd, addr, 1);
1268 dataram = this->base + ONENAND_DATARAM;
1269 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1271 if (memcmp(buf, dataram + column, thislen))
1282 #define onenand_verify(...) (0)
1283 #define onenand_verify_oob(...) (0)
1286 #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
1289 * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1290 * @param mtd MTD device structure
1291 * @param oob_buf oob buffer
1292 * @param buf source address
1293 * @param column oob offset to write to
1294 * @param thislen oob length to write
1296 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1297 const u_char *buf, int column, int thislen)
1299 struct onenand_chip *this = mtd->priv;
1300 struct nand_oobfree *free;
1301 int writecol = column;
1302 int writeend = column + thislen;
1306 free = this->ecclayout->oobfree;
1307 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1308 if (writecol >= lastgap)
1309 writecol += free->offset - lastgap;
1310 if (writeend >= lastgap)
1311 writeend += free->offset - lastgap;
1312 lastgap = free->offset + free->length;
1314 free = this->ecclayout->oobfree;
1315 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1316 int free_end = free->offset + free->length;
1317 if (free->offset < writeend && free_end > writecol) {
1318 int st = max_t(int,free->offset,writecol);
1319 int ed = min_t(int,free_end,writeend);
1321 memcpy(oob_buf + st, buf, n);
1323 } else if (column == 0)
1330 * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
1331 * @param mtd MTD device structure
1332 * @param to offset to write to
1333 * @param ops oob operation description structure
1335 * Write main and/or oob with ECC
1337 static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
1338 struct mtd_oob_ops *ops)
1340 struct onenand_chip *this = mtd->priv;
1341 int written = 0, column, thislen, subpage;
1342 int oobwritten = 0, oobcolumn, thisooblen, oobsize;
1343 size_t len = ops->len;
1344 size_t ooblen = ops->ooblen;
1345 const u_char *buf = ops->datbuf;
1346 const u_char *oob = ops->oobbuf;
1350 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ops_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1352 /* Initialize retlen, in case of early exit */
1356 /* Do not allow writes past end of device */
1357 if (unlikely((to + len) > mtd->size)) {
1358 printk(KERN_ERR "onenand_write_ops_nolock: Attempt write to past end of device\n");
1362 /* Reject writes, which are not page aligned */
1363 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
1364 printk(KERN_ERR "onenand_write_ops_nolock: Attempt to write not page aligned data\n");
1368 if (ops->mode == MTD_OOB_AUTO)
1369 oobsize = this->ecclayout->oobavail;
1371 oobsize = mtd->oobsize;
1373 oobcolumn = to & (mtd->oobsize - 1);
1375 column = to & (mtd->writesize - 1);
1377 /* Loop until all data write */
1378 while (written < len) {
1379 u_char *wbuf = (u_char *) buf;
1381 thislen = min_t(int, mtd->writesize - column, len - written);
1382 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
1386 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1388 /* Partial page write */
1389 subpage = thislen < mtd->writesize;
1391 memset(this->page_buf, 0xff, mtd->writesize);
1392 memcpy(this->page_buf + column, buf, thislen);
1393 wbuf = this->page_buf;
1396 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1399 oobbuf = this->oob_buf;
1401 /* We send data to spare ram with oobsize
1402 * to prevent byte access */
1403 memset(oobbuf, 0xff, mtd->oobsize);
1404 if (ops->mode == MTD_OOB_AUTO)
1405 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
1407 memcpy(oobbuf + oobcolumn, oob, thisooblen);
1409 oobwritten += thisooblen;
1413 oobbuf = (u_char *) ffchars;
1415 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1417 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1419 ret = this->wait(mtd, FL_WRITING);
1421 /* In partial page write we don't update bufferram */
1422 onenand_update_bufferram(mtd, to, !ret && !subpage);
1423 if (ONENAND_IS_2PLANE(this)) {
1424 ONENAND_SET_BUFFERRAM1(this);
1425 onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1429 printk(KERN_ERR "onenand_write_ops_nolock: write filaed %d\n", ret);
1433 /* Only check verify write turn on */
1434 ret = onenand_verify(mtd, buf, to, thislen);
1436 printk(KERN_ERR "onenand_write_ops_nolock: verify failed %d\n", ret);
1450 ops->retlen = written;
1457 * onenand_write_oob_nolock - [Internal] OneNAND write out-of-band
1458 * @param mtd MTD device structure
1459 * @param to offset to write to
1460 * @param len number of bytes to write
1461 * @param retlen pointer to variable to store the number of written bytes
1462 * @param buf the data to write
1463 * @param mode operation mode
1465 * OneNAND write out-of-band
1467 static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
1468 struct mtd_oob_ops *ops)
1470 struct onenand_chip *this = mtd->priv;
1471 int column, ret = 0, oobsize;
1474 size_t len = ops->ooblen;
1475 const u_char *buf = ops->oobbuf;
1476 mtd_oob_mode_t mode = ops->mode;
1480 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1482 /* Initialize retlen, in case of early exit */
1485 if (mode == MTD_OOB_AUTO)
1486 oobsize = this->ecclayout->oobavail;
1488 oobsize = mtd->oobsize;
1490 column = to & (mtd->oobsize - 1);
1492 if (unlikely(column >= oobsize)) {
1493 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to start write outside oob\n");
1497 /* For compatibility with NAND: Do not allow write past end of page */
1498 if (unlikely(column + len > oobsize)) {
1499 printk(KERN_ERR "onenand_write_oob_nolock: "
1500 "Attempt to write past end of page\n");
1504 /* Do not allow reads past end of device */
1505 if (unlikely(to >= mtd->size ||
1506 column + len > ((mtd->size >> this->page_shift) -
1507 (to >> this->page_shift)) * oobsize)) {
1508 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to write past end of device\n");
1512 oobbuf = this->oob_buf;
1514 /* Loop until all data write */
1515 while (written < len) {
1516 int thislen = min_t(int, oobsize, len - written);
1520 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1522 /* We send data to spare ram with oobsize
1523 * to prevent byte access */
1524 memset(oobbuf, 0xff, mtd->oobsize);
1525 if (mode == MTD_OOB_AUTO)
1526 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
1528 memcpy(oobbuf + column, buf, thislen);
1529 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1531 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1533 onenand_update_bufferram(mtd, to, 0);
1534 if (ONENAND_IS_2PLANE(this)) {
1535 ONENAND_SET_BUFFERRAM1(this);
1536 onenand_update_bufferram(mtd, to + this->writesize, 0);
1539 ret = this->wait(mtd, FL_WRITING);
1541 printk(KERN_ERR "onenand_write_oob_nolock: write failed %d\n", ret);
1545 ret = onenand_verify_oob(mtd, oobbuf, to);
1547 printk(KERN_ERR "onenand_write_oob_nolock: verify failed %d\n", ret);
1555 to += mtd->writesize;
1560 ops->oobretlen = written;
1566 * onenand_write - [MTD Interface] write buffer to FLASH
1567 * @param mtd MTD device structure
1568 * @param to offset to write to
1569 * @param len number of bytes to write
1570 * @param retlen pointer to variable to store the number of written bytes
1571 * @param buf the data to write
1575 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
1576 size_t *retlen, const u_char *buf)
1578 struct mtd_oob_ops ops = {
1581 .datbuf = (u_char *) buf,
1586 onenand_get_device(mtd, FL_WRITING);
1587 ret = onenand_write_ops_nolock(mtd, to, &ops);
1588 onenand_release_device(mtd);
1590 *retlen = ops.retlen;
1595 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1596 * @param mtd: MTD device structure
1597 * @param to: offset to write
1598 * @param ops: oob operation description structure
1600 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1601 struct mtd_oob_ops *ops)
1605 switch (ops->mode) {
1610 /* Not implemented yet */
1615 onenand_get_device(mtd, FL_WRITING);
1617 ret = onenand_write_ops_nolock(mtd, to, ops);
1619 ret = onenand_write_oob_nolock(mtd, to, ops);
1620 onenand_release_device(mtd);
1626 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
1627 * @param mtd MTD device structure
1628 * @param ofs offset from device start
1629 * @param allowbbt 1, if its allowed to access the bbt area
1631 * Check, if the block is bad. Either by reading the bad block table or
1632 * calling of the scan function.
1634 static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
1636 struct onenand_chip *this = mtd->priv;
1637 struct bbm_info *bbm = this->bbm;
1639 /* Return info from the table */
1640 return bbm->isbad_bbt(mtd, ofs, allowbbt);
1644 * onenand_erase - [MTD Interface] erase block(s)
1645 * @param mtd MTD device structure
1646 * @param instr erase instruction
1648 * Erase one ore more blocks
1650 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1652 struct onenand_chip *this = mtd->priv;
1653 unsigned int block_size;
1658 DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1660 block_size = (1 << this->erase_shift);
1662 /* Start address must align on block boundary */
1663 if (unlikely(instr->addr & (block_size - 1))) {
1664 printk(KERN_ERR "onenand_erase: Unaligned address\n");
1668 /* Length must align on block boundary */
1669 if (unlikely(instr->len & (block_size - 1))) {
1670 printk(KERN_ERR "onenand_erase: Length not block aligned\n");
1674 /* Do not allow erase past end of device */
1675 if (unlikely((instr->len + instr->addr) > mtd->size)) {
1676 printk(KERN_ERR "onenand_erase: Erase past end of device\n");
1680 instr->fail_addr = 0xffffffff;
1682 /* Grab the lock and see if the device is available */
1683 onenand_get_device(mtd, FL_ERASING);
1685 /* Loop throught the pages */
1689 instr->state = MTD_ERASING;
1694 /* Check if we have a bad block, we do not erase bad blocks */
1695 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
1696 printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1697 instr->state = MTD_ERASE_FAILED;
1701 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1703 onenand_invalidate_bufferram(mtd, addr, block_size);
1705 ret = this->wait(mtd, FL_ERASING);
1706 /* Check, if it is write protected */
1708 printk(KERN_ERR "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1709 instr->state = MTD_ERASE_FAILED;
1710 instr->fail_addr = addr;
1718 instr->state = MTD_ERASE_DONE;
1722 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1724 /* Deselect and wake up anyone waiting on the device */
1725 onenand_release_device(mtd);
1727 /* Do call back function */
1729 mtd_erase_callback(instr);
1735 * onenand_sync - [MTD Interface] sync
1736 * @param mtd MTD device structure
1738 * Sync is actually a wait for chip ready function
1740 static void onenand_sync(struct mtd_info *mtd)
1742 DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1744 /* Grab the lock and see if the device is available */
1745 onenand_get_device(mtd, FL_SYNCING);
1747 /* Release it and go back */
1748 onenand_release_device(mtd);
1752 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1753 * @param mtd MTD device structure
1754 * @param ofs offset relative to mtd start
1756 * Check whether the block is bad
1758 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1762 /* Check for invalid offset */
1763 if (ofs > mtd->size)
1766 onenand_get_device(mtd, FL_READING);
1767 ret = onenand_block_isbad_nolock(mtd, ofs, 0);
1768 onenand_release_device(mtd);
1773 * onenand_default_block_markbad - [DEFAULT] mark a block bad
1774 * @param mtd MTD device structure
1775 * @param ofs offset from device start
1777 * This is the default implementation, which can be overridden by
1778 * a hardware specific driver.
1780 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1782 struct onenand_chip *this = mtd->priv;
1783 struct bbm_info *bbm = this->bbm;
1784 u_char buf[2] = {0, 0};
1785 struct mtd_oob_ops ops = {
1786 .mode = MTD_OOB_PLACE,
1793 /* Get block number */
1794 block = ((int) ofs) >> bbm->bbt_erase_shift;
1796 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1798 /* We write two bytes, so we dont have to mess with 16 bit access */
1799 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1800 return onenand_write_oob_nolock(mtd, ofs, &ops);
1804 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1805 * @param mtd MTD device structure
1806 * @param ofs offset relative to mtd start
1808 * Mark the block as bad
1810 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1812 struct onenand_chip *this = mtd->priv;
1815 ret = onenand_block_isbad(mtd, ofs);
1817 /* If it was bad already, return success and do nothing */
1823 onenand_get_device(mtd, FL_WRITING);
1824 ret = this->block_markbad(mtd, ofs);
1825 onenand_release_device(mtd);
1830 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1831 * @param mtd MTD device structure
1832 * @param ofs offset relative to mtd start
1833 * @param len number of bytes to lock or unlock
1834 * @param cmd lock or unlock command
1836 * Lock or unlock one or more blocks
1838 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1840 struct onenand_chip *this = mtd->priv;
1841 int start, end, block, value, status;
1844 start = ofs >> this->erase_shift;
1845 end = len >> this->erase_shift;
1847 if (cmd == ONENAND_CMD_LOCK)
1848 wp_status_mask = ONENAND_WP_LS;
1850 wp_status_mask = ONENAND_WP_US;
1852 /* Continuous lock scheme */
1853 if (this->options & ONENAND_HAS_CONT_LOCK) {
1854 /* Set start block address */
1855 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1856 /* Set end block address */
1857 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1858 /* Write lock command */
1859 this->command(mtd, cmd, 0, 0);
1861 /* There's no return value */
1862 this->wait(mtd, FL_LOCKING);
1865 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1866 & ONENAND_CTRL_ONGO)
1869 /* Check lock status */
1870 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1871 if (!(status & wp_status_mask))
1872 printk(KERN_ERR "wp status = 0x%x\n", status);
1877 /* Block lock scheme */
1878 for (block = start; block < start + end; block++) {
1879 /* Set block address */
1880 value = onenand_block_address(this, block);
1881 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1882 /* Select DataRAM for DDP */
1883 value = onenand_bufferram_address(this, block);
1884 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1885 /* Set start block address */
1886 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1887 /* Write lock command */
1888 this->command(mtd, cmd, 0, 0);
1890 /* There's no return value */
1891 this->wait(mtd, FL_LOCKING);
1894 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1895 & ONENAND_CTRL_ONGO)
1898 /* Check lock status */
1899 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1900 if (!(status & wp_status_mask))
1901 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1908 * onenand_lock - [MTD Interface] Lock block(s)
1909 * @param mtd MTD device structure
1910 * @param ofs offset relative to mtd start
1911 * @param len number of bytes to unlock
1913 * Lock one or more blocks
1915 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1919 onenand_get_device(mtd, FL_LOCKING);
1920 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1921 onenand_release_device(mtd);
1926 * onenand_unlock - [MTD Interface] Unlock block(s)
1927 * @param mtd MTD device structure
1928 * @param ofs offset relative to mtd start
1929 * @param len number of bytes to unlock
1931 * Unlock one or more blocks
1933 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1937 onenand_get_device(mtd, FL_LOCKING);
1938 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1939 onenand_release_device(mtd);
1944 * onenand_check_lock_status - [OneNAND Interface] Check lock status
1945 * @param this onenand chip data structure
1949 static void onenand_check_lock_status(struct onenand_chip *this)
1951 unsigned int value, block, status;
1954 end = this->chipsize >> this->erase_shift;
1955 for (block = 0; block < end; block++) {
1956 /* Set block address */
1957 value = onenand_block_address(this, block);
1958 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1959 /* Select DataRAM for DDP */
1960 value = onenand_bufferram_address(this, block);
1961 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1962 /* Set start block address */
1963 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1965 /* Check lock status */
1966 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1967 if (!(status & ONENAND_WP_US))
1968 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1973 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1974 * @param mtd MTD device structure
1978 static int onenand_unlock_all(struct mtd_info *mtd)
1980 struct onenand_chip *this = mtd->priv;
1982 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1983 /* Set start block address */
1984 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1985 /* Write unlock command */
1986 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1988 /* There's no return value */
1989 this->wait(mtd, FL_LOCKING);
1992 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1993 & ONENAND_CTRL_ONGO)
1996 /* Workaround for all block unlock in DDP */
1997 if (ONENAND_IS_DDP(this)) {
1998 /* 1st block on another chip */
1999 loff_t ofs = this->chipsize >> 1;
2000 size_t len = mtd->erasesize;
2002 onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2005 onenand_check_lock_status(this);
2010 onenand_do_lock_cmd(mtd, 0x0, this->chipsize, ONENAND_CMD_UNLOCK);
2015 #ifdef CONFIG_MTD_ONENAND_OTP
2017 /* Interal OTP operation */
2018 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
2019 size_t *retlen, u_char *buf);
2022 * do_otp_read - [DEFAULT] Read OTP block area
2023 * @param mtd MTD device structure
2024 * @param from The offset to read
2025 * @param len number of bytes to read
2026 * @param retlen pointer to variable to store the number of readbytes
2027 * @param buf the databuffer to put/get data
2029 * Read OTP block area.
2031 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
2032 size_t *retlen, u_char *buf)
2034 struct onenand_chip *this = mtd->priv;
2035 struct mtd_oob_ops ops = {
2043 /* Enter OTP access mode */
2044 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2045 this->wait(mtd, FL_OTPING);
2047 ret = onenand_read_ops_nolock(mtd, from, &ops);
2049 /* Exit OTP access mode */
2050 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2051 this->wait(mtd, FL_RESETING);
2057 * do_otp_write - [DEFAULT] Write OTP block area
2058 * @param mtd MTD device structure
2059 * @param to The offset to write
2060 * @param len number of bytes to write
2061 * @param retlen pointer to variable to store the number of write bytes
2062 * @param buf the databuffer to put/get data
2064 * Write OTP block area.
2066 static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
2067 size_t *retlen, u_char *buf)
2069 struct onenand_chip *this = mtd->priv;
2070 unsigned char *pbuf = buf;
2072 struct mtd_oob_ops ops;
2074 /* Force buffer page aligned */
2075 if (len < mtd->writesize) {
2076 memcpy(this->page_buf, buf, len);
2077 memset(this->page_buf + len, 0xff, mtd->writesize - len);
2078 pbuf = this->page_buf;
2079 len = mtd->writesize;
2082 /* Enter OTP access mode */
2083 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2084 this->wait(mtd, FL_OTPING);
2090 ret = onenand_write_ops_nolock(mtd, to, &ops);
2091 *retlen = ops.retlen;
2093 /* Exit OTP access mode */
2094 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2095 this->wait(mtd, FL_RESETING);
2101 * do_otp_lock - [DEFAULT] Lock OTP block area
2102 * @param mtd MTD device structure
2103 * @param from The offset to lock
2104 * @param len number of bytes to lock
2105 * @param retlen pointer to variable to store the number of lock bytes
2106 * @param buf the databuffer to put/get data
2108 * Lock OTP block area.
2110 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
2111 size_t *retlen, u_char *buf)
2113 struct onenand_chip *this = mtd->priv;
2114 struct mtd_oob_ops ops = {
2115 .mode = MTD_OOB_PLACE,
2122 /* Enter OTP access mode */
2123 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2124 this->wait(mtd, FL_OTPING);
2126 ret = onenand_write_oob_nolock(mtd, from, &ops);
2128 *retlen = ops.oobretlen;
2130 /* Exit OTP access mode */
2131 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2132 this->wait(mtd, FL_RESETING);
2138 * onenand_otp_walk - [DEFAULT] Handle OTP operation
2139 * @param mtd MTD device structure
2140 * @param from The offset to read/write
2141 * @param len number of bytes to read/write
2142 * @param retlen pointer to variable to store the number of read bytes
2143 * @param buf the databuffer to put/get data
2144 * @param action do given action
2145 * @param mode specify user and factory
2147 * Handle OTP operation.
2149 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
2150 size_t *retlen, u_char *buf,
2151 otp_op_t action, int mode)
2153 struct onenand_chip *this = mtd->priv;
2160 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2161 if (density < ONENAND_DEVICE_DENSITY_512Mb)
2166 if (mode == MTD_OTP_FACTORY) {
2167 from += mtd->writesize * otp_pages;
2168 otp_pages = 64 - otp_pages;
2171 /* Check User/Factory boundary */
2172 if (((mtd->writesize * otp_pages) - (from + len)) < 0)
2175 onenand_get_device(mtd, FL_OTPING);
2176 while (len > 0 && otp_pages > 0) {
2177 if (!action) { /* OTP Info functions */
2178 struct otp_info *otpinfo;
2180 len -= sizeof(struct otp_info);
2186 otpinfo = (struct otp_info *) buf;
2187 otpinfo->start = from;
2188 otpinfo->length = mtd->writesize;
2189 otpinfo->locked = 0;
2191 from += mtd->writesize;
2192 buf += sizeof(struct otp_info);
2193 *retlen += sizeof(struct otp_info);
2198 ret = action(mtd, from, len, &tmp_retlen, buf);
2209 onenand_release_device(mtd);
2215 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
2216 * @param mtd MTD device structure
2217 * @param buf the databuffer to put/get data
2218 * @param len number of bytes to read
2220 * Read factory OTP info.
2222 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
2223 struct otp_info *buf, size_t len)
2228 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
2230 return ret ? : retlen;
2234 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
2235 * @param mtd MTD device structure
2236 * @param from The offset to read
2237 * @param len number of bytes to read
2238 * @param retlen pointer to variable to store the number of read bytes
2239 * @param buf the databuffer to put/get data
2241 * Read factory OTP area.
2243 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
2244 size_t len, size_t *retlen, u_char *buf)
2246 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
2250 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
2251 * @param mtd MTD device structure
2252 * @param buf the databuffer to put/get data
2253 * @param len number of bytes to read
2255 * Read user OTP info.
2257 static int onenand_get_user_prot_info(struct mtd_info *mtd,
2258 struct otp_info *buf, size_t len)
2263 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
2265 return ret ? : retlen;
2269 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
2270 * @param mtd MTD device structure
2271 * @param from The offset to read
2272 * @param len number of bytes to read
2273 * @param retlen pointer to variable to store the number of read bytes
2274 * @param buf the databuffer to put/get data
2276 * Read user OTP area.
2278 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
2279 size_t len, size_t *retlen, u_char *buf)
2281 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
2285 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
2286 * @param mtd MTD device structure
2287 * @param from The offset to write
2288 * @param len number of bytes to write
2289 * @param retlen pointer to variable to store the number of write bytes
2290 * @param buf the databuffer to put/get data
2292 * Write user OTP area.
2294 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
2295 size_t len, size_t *retlen, u_char *buf)
2297 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
2301 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
2302 * @param mtd MTD device structure
2303 * @param from The offset to lock
2304 * @param len number of bytes to unlock
2306 * Write lock mark on spare area in page 0 in OTP block
2308 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
2311 unsigned char oob_buf[64];
2315 memset(oob_buf, 0xff, mtd->oobsize);
2317 * Note: OTP lock operation
2318 * OTP block : 0xXXFC
2319 * 1st block : 0xXXF3 (If chip support)
2320 * Both : 0xXXF0 (If chip support)
2322 oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
2325 * Write lock mark to 8th word of sector0 of page0 of the spare0.
2326 * We write 16 bytes spare area instead of 2 bytes.
2331 ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
2333 return ret ? : retlen;
2335 #endif /* CONFIG_MTD_ONENAND_OTP */
2338 * onenand_check_features - Check and set OneNAND features
2339 * @param mtd MTD data structure
2341 * Check and set OneNAND features
2345 static void onenand_check_features(struct mtd_info *mtd)
2347 struct onenand_chip *this = mtd->priv;
2348 unsigned int density, process;
2350 /* Lock scheme depends on density and process */
2351 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2352 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
2356 case ONENAND_DEVICE_DENSITY_4Gb:
2357 this->options |= ONENAND_HAS_2PLANE;
2359 case ONENAND_DEVICE_DENSITY_2Gb:
2360 /* 2Gb DDP don't have 2 plane */
2361 if (!ONENAND_IS_DDP(this))
2362 this->options |= ONENAND_HAS_2PLANE;
2363 this->options |= ONENAND_HAS_UNLOCK_ALL;
2365 case ONENAND_DEVICE_DENSITY_1Gb:
2366 /* A-Die has all block unlock */
2368 this->options |= ONENAND_HAS_UNLOCK_ALL;
2372 /* Some OneNAND has continuous lock scheme */
2374 this->options |= ONENAND_HAS_CONT_LOCK;
2378 if (this->options & ONENAND_HAS_CONT_LOCK)
2379 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
2380 if (this->options & ONENAND_HAS_UNLOCK_ALL)
2381 printk(KERN_DEBUG "Chip support all block unlock\n");
2382 if (this->options & ONENAND_HAS_2PLANE)
2383 printk(KERN_DEBUG "Chip has 2 plane\n");
2387 * onenand_print_device_info - Print device & version ID
2388 * @param device device ID
2389 * @param version version ID
2391 * Print device & version ID
2393 static void onenand_print_device_info(int device, int version)
2395 int vcc, demuxed, ddp, density;
2397 vcc = device & ONENAND_DEVICE_VCC_MASK;
2398 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
2399 ddp = device & ONENAND_DEVICE_IS_DDP;
2400 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
2401 printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
2402 demuxed ? "" : "Muxed ",
2405 vcc ? "2.65/3.3" : "1.8",
2407 printk(KERN_INFO "OneNAND version = 0x%04x\n", version);
2410 static const struct onenand_manufacturers onenand_manuf_ids[] = {
2411 {ONENAND_MFR_SAMSUNG, "Samsung"},
2415 * onenand_check_maf - Check manufacturer ID
2416 * @param manuf manufacturer ID
2418 * Check manufacturer ID
2420 static int onenand_check_maf(int manuf)
2422 int size = ARRAY_SIZE(onenand_manuf_ids);
2426 for (i = 0; i < size; i++)
2427 if (manuf == onenand_manuf_ids[i].id)
2431 name = onenand_manuf_ids[i].name;
2435 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
2441 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
2442 * @param mtd MTD device structure
2444 * OneNAND detection method:
2445 * Compare the values from command with ones from register
2447 static int onenand_probe(struct mtd_info *mtd)
2449 struct onenand_chip *this = mtd->priv;
2450 int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
2454 /* Save system configuration 1 */
2455 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
2456 /* Clear Sync. Burst Read mode to read BootRAM */
2457 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
2459 /* Send the command for reading device ID from BootRAM */
2460 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
2462 /* Read manufacturer and device IDs from BootRAM */
2463 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
2464 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
2466 /* Reset OneNAND to read default register values */
2467 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
2469 this->wait(mtd, FL_RESETING);
2471 /* Restore system configuration 1 */
2472 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
2474 /* Check manufacturer ID */
2475 if (onenand_check_maf(bram_maf_id))
2478 /* Read manufacturer and device IDs from Register */
2479 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
2480 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
2481 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
2483 /* Check OneNAND device */
2484 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
2487 /* Flash device information */
2488 onenand_print_device_info(dev_id, ver_id);
2489 this->device_id = dev_id;
2490 this->version_id = ver_id;
2492 density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2493 this->chipsize = (16 << density) << 20;
2494 /* Set density mask. it is used for DDP */
2495 if (ONENAND_IS_DDP(this))
2496 this->density_mask = (1 << (density + 6));
2498 this->density_mask = 0;
2500 /* OneNAND page size & block size */
2501 /* The data buffer size is equal to page size */
2502 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
2503 mtd->oobsize = mtd->writesize >> 5;
2504 /* Pages per a block are always 64 in OneNAND */
2505 mtd->erasesize = mtd->writesize << 6;
2507 this->erase_shift = ffs(mtd->erasesize) - 1;
2508 this->page_shift = ffs(mtd->writesize) - 1;
2509 this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
2510 /* It's real page size */
2511 this->writesize = mtd->writesize;
2513 /* REVIST: Multichip handling */
2515 mtd->size = this->chipsize;
2517 /* Check OneNAND features */
2518 onenand_check_features(mtd);
2521 * We emulate the 4KiB page and 256KiB erase block size
2522 * But oobsize is still 64 bytes.
2523 * It is only valid if you turn on 2X program support,
2524 * Otherwise it will be ignored by compiler.
2526 if (ONENAND_IS_2PLANE(this)) {
2527 mtd->writesize <<= 1;
2528 mtd->erasesize <<= 1;
2535 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
2536 * @param mtd MTD device structure
2538 static int onenand_suspend(struct mtd_info *mtd)
2540 return onenand_get_device(mtd, FL_PM_SUSPENDED);
2544 * onenand_resume - [MTD Interface] Resume the OneNAND flash
2545 * @param mtd MTD device structure
2547 static void onenand_resume(struct mtd_info *mtd)
2549 struct onenand_chip *this = mtd->priv;
2551 if (this->state == FL_PM_SUSPENDED)
2552 onenand_release_device(mtd);
2554 printk(KERN_ERR "resume() called for the chip which is not"
2555 "in suspended state\n");
2559 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2560 * @param mtd MTD device structure
2561 * @param maxchips Number of chips to scan for
2563 * This fills out all the not initialized function pointers
2564 * with the defaults.
2565 * The flash ID is read and the mtd/chip structures are
2566 * filled with the appropriate values.
2568 int onenand_scan(struct mtd_info *mtd, int maxchips)
2571 struct onenand_chip *this = mtd->priv;
2573 if (!this->read_word)
2574 this->read_word = onenand_readw;
2575 if (!this->write_word)
2576 this->write_word = onenand_writew;
2579 this->command = onenand_command;
2581 onenand_setup_wait(mtd);
2583 if (!this->read_bufferram)
2584 this->read_bufferram = onenand_read_bufferram;
2585 if (!this->write_bufferram)
2586 this->write_bufferram = onenand_write_bufferram;
2588 if (!this->block_markbad)
2589 this->block_markbad = onenand_default_block_markbad;
2590 if (!this->scan_bbt)
2591 this->scan_bbt = onenand_default_bbt;
2593 if (onenand_probe(mtd))
2596 /* Set Sync. Burst Read after probing */
2597 if (this->mmcontrol) {
2598 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2599 this->read_bufferram = onenand_sync_read_bufferram;
2602 /* Allocate buffers, if necessary */
2603 if (!this->page_buf) {
2604 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
2605 if (!this->page_buf) {
2606 printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2609 this->options |= ONENAND_PAGEBUF_ALLOC;
2611 if (!this->oob_buf) {
2612 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
2613 if (!this->oob_buf) {
2614 printk(KERN_ERR "onenand_scan(): Can't allocate oob_buf\n");
2615 if (this->options & ONENAND_PAGEBUF_ALLOC) {
2616 this->options &= ~ONENAND_PAGEBUF_ALLOC;
2617 kfree(this->page_buf);
2621 this->options |= ONENAND_OOBBUF_ALLOC;
2624 this->state = FL_READY;
2625 init_waitqueue_head(&this->wq);
2626 spin_lock_init(&this->chip_lock);
2629 * Allow subpage writes up to oobsize.
2631 switch (mtd->oobsize) {
2633 this->ecclayout = &onenand_oob_64;
2634 mtd->subpage_sft = 2;
2638 this->ecclayout = &onenand_oob_32;
2639 mtd->subpage_sft = 1;
2643 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2645 mtd->subpage_sft = 0;
2646 /* To prevent kernel oops */
2647 this->ecclayout = &onenand_oob_32;
2651 this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2654 * The number of bytes available for a client to place data into
2655 * the out of band area
2657 this->ecclayout->oobavail = 0;
2658 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
2659 this->ecclayout->oobfree[i].length; i++)
2660 this->ecclayout->oobavail +=
2661 this->ecclayout->oobfree[i].length;
2662 mtd->oobavail = this->ecclayout->oobavail;
2664 mtd->ecclayout = this->ecclayout;
2666 /* Fill in remaining MTD driver data */
2667 mtd->type = MTD_NANDFLASH;
2668 mtd->flags = MTD_CAP_NANDFLASH;
2669 mtd->erase = onenand_erase;
2671 mtd->unpoint = NULL;
2672 mtd->read = onenand_read;
2673 mtd->write = onenand_write;
2674 mtd->read_oob = onenand_read_oob;
2675 mtd->write_oob = onenand_write_oob;
2676 #ifdef CONFIG_MTD_ONENAND_OTP
2677 mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2678 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2679 mtd->get_user_prot_info = onenand_get_user_prot_info;
2680 mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2681 mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2682 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2684 mtd->sync = onenand_sync;
2685 mtd->lock = onenand_lock;
2686 mtd->unlock = onenand_unlock;
2687 mtd->suspend = onenand_suspend;
2688 mtd->resume = onenand_resume;
2689 mtd->block_isbad = onenand_block_isbad;
2690 mtd->block_markbad = onenand_block_markbad;
2691 mtd->owner = THIS_MODULE;
2693 /* Unlock whole block */
2694 onenand_unlock_all(mtd);
2696 return this->scan_bbt(mtd);
2700 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2701 * @param mtd MTD device structure
2703 void onenand_release(struct mtd_info *mtd)
2705 struct onenand_chip *this = mtd->priv;
2707 #ifdef CONFIG_MTD_PARTITIONS
2708 /* Deregister partitions */
2709 del_mtd_partitions (mtd);
2711 /* Deregister the device */
2712 del_mtd_device (mtd);
2714 /* Free bad block table memory, if allocated */
2716 struct bbm_info *bbm = this->bbm;
2720 /* Buffers allocated by onenand_scan */
2721 if (this->options & ONENAND_PAGEBUF_ALLOC)
2722 kfree(this->page_buf);
2723 if (this->options & ONENAND_OOBBUF_ALLOC)
2724 kfree(this->oob_buf);
2727 EXPORT_SYMBOL_GPL(onenand_scan);
2728 EXPORT_SYMBOL_GPL(onenand_release);
2730 MODULE_LICENSE("GPL");
2731 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2732 MODULE_DESCRIPTION("Generic OneNAND flash driver code");