drivers/mtd/onenand/onenand_base.c

   1 /*
   2  *  linux/drivers/mtd/onenand/onenand_base.c
   3  *
   4  *  Copyright (C) 2005-2007 Samsung Electronics
   5  *  Kyungmin Park <kyungmin.park@samsung.com>
   6  *
   7  *  Credits:
   8  *      Adrian Hunter <ext-adrian.hunter@nokia.com>:
   9  *      auto-placement support, read-while load support, various fixes
  10  *      Copyright (C) Nokia Corporation, 2007
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  */
  16
  17 #include <linux/kernel.h>
  18 #include <linux/module.h>
  19 #include <linux/init.h>
  20 #include <linux/sched.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/jiffies.h>
  23 #include <linux/mtd/mtd.h>
  24 #include <linux/mtd/onenand.h>
  25 #include <linux/mtd/partitions.h>
  26
  27 #include <asm/io.h>
  28
  29 /**
  30  * onenand_oob_64 - oob info for large (2KB) page
  31  */
  32 static struct nand_ecclayout onenand_oob_64 = {
  33         .eccbytes       = 20,
  34         .eccpos         = {
  35                 8, 9, 10, 11, 12,
  36                 24, 25, 26, 27, 28,
  37                 40, 41, 42, 43, 44,
  38                 56, 57, 58, 59, 60,
  39                 },
  40         .oobfree        = {
  41                 {2, 3}, {14, 2}, {18, 3}, {30, 2},
  42                 {34, 3}, {46, 2}, {50, 3}, {62, 2}
  43         }
  44 };
  45
  46 /**
  47  * onenand_oob_32 - oob info for middle (1KB) page
  48  */
  49 static struct nand_ecclayout onenand_oob_32 = {
  50         .eccbytes       = 10,
  51         .eccpos         = {
  52                 8, 9, 10, 11, 12,
  53                 24, 25, 26, 27, 28,
  54                 },
  55         .oobfree        = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
  56 };
  57
  58 static const unsigned char ffchars[] = {
  59         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  60         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  61         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  62         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  63         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  64         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  65         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  66         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  67 };
  68
  69 /**
  70  * onenand_readw - [OneNAND Interface] Read OneNAND register
  71  * @param addr          address to read
  72  *
  73  * Read OneNAND register
  74  */
  75 static unsigned short onenand_readw(void __iomem *addr)
  76 {
  77         return readw(addr);
  78 }
  79
  80 /**
  81  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  82  * @param value         value to write
  83  * @param addr          address to write
  84  *
  85  * Write OneNAND register with value
  86  */
  87 static void onenand_writew(unsigned short value, void __iomem *addr)
  88 {
  89         writew(value, addr);
  90 }
  91
  92 /**
  93  * onenand_block_address - [DEFAULT] Get block address
  94  * @param this          onenand chip data structure
  95  * @param block         the block
  96  * @return              translated block address if DDP, otherwise same
  97  *
  98  * Setup Start Address 1 Register (F100h)
  99  */
 100 static int onenand_block_address(struct onenand_chip *this, int block)
 101 {
 102         /* Device Flash Core select, NAND Flash Block Address */
 103         if (block & this->density_mask)
 104                 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
 105
 106         return block;
 107 }
 108
 109 /**
 110  * onenand_bufferram_address - [DEFAULT] Get bufferram address
 111  * @param this          onenand chip data structure
 112  * @param block         the block
 113  * @return              set DBS value if DDP, otherwise 0
 114  *
 115  * Setup Start Address 2 Register (F101h) for DDP
 116  */
 117 static int onenand_bufferram_address(struct onenand_chip *this, int block)
 118 {
 119         /* Device BufferRAM Select */
 120         if (block & this->density_mask)
 121                 return ONENAND_DDP_CHIP1;
 122
 123         return ONENAND_DDP_CHIP0;
 124 }
 125
 126 /**
 127  * onenand_page_address - [DEFAULT] Get page address
 128  * @param page          the page address
 129  * @param sector        the sector address
 130  * @return              combined page and sector address
 131  *
 132  * Setup Start Address 8 Register (F107h)
 133  */
 134 static int onenand_page_address(int page, int sector)
 135 {
 136         /* Flash Page Address, Flash Sector Address */
 137         int fpa, fsa;
 138
 139         fpa = page & ONENAND_FPA_MASK;
 140         fsa = sector & ONENAND_FSA_MASK;
 141
 142         return ((fpa << ONENAND_FPA_SHIFT) | fsa);
 143 }
 144
 145 /**
 146  * onenand_buffer_address - [DEFAULT] Get buffer address
 147  * @param dataram1      DataRAM index
 148  * @param sectors       the sector address
 149  * @param count         the number of sectors
 150  * @return              the start buffer value
 151  *
 152  * Setup Start Buffer Register (F200h)
 153  */
 154 static int onenand_buffer_address(int dataram1, int sectors, int count)
 155 {
 156         int bsa, bsc;
 157
 158         /* BufferRAM Sector Address */
 159         bsa = sectors & ONENAND_BSA_MASK;
 160
 161         if (dataram1)
 162                 bsa |= ONENAND_BSA_DATARAM1;    /* DataRAM1 */
 163         else
 164                 bsa |= ONENAND_BSA_DATARAM0;    /* DataRAM0 */
 165
 166         /* BufferRAM Sector Count */
 167         bsc = count & ONENAND_BSC_MASK;
 168
 169         return ((bsa << ONENAND_BSA_SHIFT) | bsc);
 170 }
 171
 172 /**
 173  * onenand_command - [DEFAULT] Send command to OneNAND device
 174  * @param mtd           MTD device structure
 175  * @param cmd           the command to be sent
 176  * @param addr          offset to read from or write to
 177  * @param len           number of bytes to read or write
 178  *
 179  * Send command to OneNAND device. This function is used for middle/large page
 180  * devices (1KB/2KB Bytes per page)
 181  */
 182 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
 183 {
 184         struct onenand_chip *this = mtd->priv;
 185         int value, readcmd = 0, block_cmd = 0;
 186         int block, page;
 187
 188         /* Address translation */
 189         switch (cmd) {
 190         case ONENAND_CMD_UNLOCK:
 191         case ONENAND_CMD_LOCK:
 192         case ONENAND_CMD_LOCK_TIGHT:
 193         case ONENAND_CMD_UNLOCK_ALL:
 194                 block = -1;
 195                 page = -1;
 196                 break;
 197
 198         case ONENAND_CMD_ERASE:
 199         case ONENAND_CMD_BUFFERRAM:
 200         case ONENAND_CMD_OTP_ACCESS:
 201                 block_cmd = 1;
 202                 block = (int) (addr >> this->erase_shift);
 203                 page = -1;
 204                 break;
 205
 206         default:
 207                 block = (int) (addr >> this->erase_shift);
 208                 page = (int) (addr >> this->page_shift);
 209
 210                 if (ONENAND_IS_2PLANE(this)) {
 211                         /* Make the even block number */
 212                         block &= ~1;
 213                         /* Is it the odd plane? */
 214                         if (addr & this->writesize)
 215                                 block++;
 216                         page >>= 1;
 217                 }
 218                 page &= this->page_mask;
 219                 break;
 220         }
 221
 222         /* NOTE: The setting order of the registers is very important! */
 223         if (cmd == ONENAND_CMD_BUFFERRAM) {
 224                 /* Select DataRAM for DDP */
 225                 value = onenand_bufferram_address(this, block);
 226                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 227
 228                 if (ONENAND_IS_2PLANE(this))
 229                         /* It is always BufferRAM0 */
 230                         ONENAND_SET_BUFFERRAM0(this);
 231                 else
 232                         /* Switch to the next data buffer */
 233                         ONENAND_SET_NEXT_BUFFERRAM(this);
 234
 235                 return 0;
 236         }
 237
 238         if (block != -1) {
 239                 /* Write 'DFS, FBA' of Flash */
 240                 value = onenand_block_address(this, block);
 241                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
 242
 243                 if (block_cmd) {
 244                         /* Select DataRAM for DDP */
 245                         value = onenand_bufferram_address(this, block);
 246                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 247                 }
 248         }
 249
 250         if (page != -1) {
 251                 /* Now we use page size operation */
 252                 int sectors = 4, count = 4;
 253                 int dataram;
 254
 255                 switch (cmd) {
 256                 case ONENAND_CMD_READ:
 257                 case ONENAND_CMD_READOOB:
 258                         dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
 259                         readcmd = 1;
 260                         break;
 261
 262                 default:
 263                         if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
 264                                 cmd = ONENAND_CMD_2X_PROG;
 265                         dataram = ONENAND_CURRENT_BUFFERRAM(this);
 266                         break;
 267                 }
 268
 269                 /* Write 'FPA, FSA' of Flash */
 270                 value = onenand_page_address(page, sectors);
 271                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
 272
 273                 /* Write 'BSA, BSC' of DataRAM */
 274                 value = onenand_buffer_address(dataram, sectors, count);
 275                 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
 276
 277                 if (readcmd) {
 278                         /* Select DataRAM for DDP */
 279                         value = onenand_bufferram_address(this, block);
 280                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 281                 }
 282         }
 283
 284         /* Interrupt clear */
 285         this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
 286
 287         /* Write command */
 288         this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
 289
 290         return 0;
 291 }
 292
 293 /**
 294  * onenand_wait - [DEFAULT] wait until the command is done
 295  * @param mtd           MTD device structure
 296  * @param state         state to select the max. timeout value
 297  *
 298  * Wait for command done. This applies to all OneNAND command
 299  * Read can take up to 30us, erase up to 2ms and program up to 350us
 300  * according to general OneNAND specs
 301  */
 302 static int onenand_wait(struct mtd_info *mtd, int state)
 303 {
 304         struct onenand_chip * this = mtd->priv;
 305         unsigned long timeout;
 306         unsigned int flags = ONENAND_INT_MASTER;
 307         unsigned int interrupt = 0;
 308         unsigned int ctrl;
 309
 310         /* The 20 msec is enough */
 311         timeout = jiffies + msecs_to_jiffies(20);
 312         while (time_before(jiffies, timeout)) {
 313                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 314
 315                 if (interrupt & flags)
 316                         break;
 317
 318                 if (state != FL_READING)
 319                         cond_resched();
 320         }
 321         /* To get correct interrupt status in timeout case */
 322         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 323
 324         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
 325
 326         if (ctrl & ONENAND_CTRL_ERROR) {
 327                 printk(KERN_ERR "onenand_wait: controller error = 0x%04x\n", ctrl);
 328                 if (ctrl & ONENAND_CTRL_LOCK)
 329                         printk(KERN_ERR "onenand_wait: it's locked error.\n");
 330                 return -EIO;
 331         }
 332
 333         if (interrupt & ONENAND_INT_READ) {
 334                 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
 335                 if (ecc) {
 336                         if (ecc & ONENAND_ECC_2BIT_ALL) {
 337                                 printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc);
 338                                 mtd->ecc_stats.failed++;
 339                                 return -EBADMSG;
 340                         } else if (ecc & ONENAND_ECC_1BIT_ALL) {
 341                                 printk(KERN_INFO "onenand_wait: correctable ECC error = 0x%04x\n", ecc);
 342                                 mtd->ecc_stats.corrected++;
 343                         }
 344                 }
 345         } else if (state == FL_READING) {
 346                 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
 347                 return -EIO;
 348         }
 349
 350         return 0;
 351 }
 352
 353 /*
 354  * onenand_interrupt - [DEFAULT] onenand interrupt handler
 355  * @param irq           onenand interrupt number
 356  * @param dev_id        interrupt data
 357  *
 358  * complete the work
 359  */
 360 static irqreturn_t onenand_interrupt(int irq, void *data)
 361 {
 362         struct onenand_chip *this = data;
 363
 364         /* To handle shared interrupt */
 365         if (!this->complete.done)
 366                 complete(&this->complete);
 367
 368         return IRQ_HANDLED;
 369 }
 370
 371 /*
 372  * onenand_interrupt_wait - [DEFAULT] wait until the command is done
 373  * @param mtd           MTD device structure
 374  * @param state         state to select the max. timeout value
 375  *
 376  * Wait for command done.
 377  */
 378 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
 379 {
 380         struct onenand_chip *this = mtd->priv;
 381
 382         wait_for_completion(&this->complete);
 383
 384         return onenand_wait(mtd, state);
 385 }
 386
 387 /*
 388  * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
 389  * @param mtd           MTD device structure
 390  * @param state         state to select the max. timeout value
 391  *
 392  * Try interrupt based wait (It is used one-time)
 393  */
 394 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
 395 {
 396         struct onenand_chip *this = mtd->priv;
 397         unsigned long remain, timeout;
 398
 399         /* We use interrupt wait first */
 400         this->wait = onenand_interrupt_wait;
 401
 402         timeout = msecs_to_jiffies(100);
 403         remain = wait_for_completion_timeout(&this->complete, timeout);
 404         if (!remain) {
 405                 printk(KERN_INFO "OneNAND: There's no interrupt. "
 406                                 "We use the normal wait\n");
 407
 408                 /* Release the irq */
 409                 free_irq(this->irq, this);
 410
 411                 this->wait = onenand_wait;
 412         }
 413
 414         return onenand_wait(mtd, state);
 415 }
 416
 417 /*
 418  * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
 419  * @param mtd           MTD device structure
 420  *
 421  * There's two method to wait onenand work
 422  * 1. polling - read interrupt status register
 423  * 2. interrupt - use the kernel interrupt method
 424  */
 425 static void onenand_setup_wait(struct mtd_info *mtd)
 426 {
 427         struct onenand_chip *this = mtd->priv;
 428         int syscfg;
 429
 430         init_completion(&this->complete);
 431
 432         if (this->irq <= 0) {
 433                 this->wait = onenand_wait;
 434                 return;
 435         }
 436
 437         if (request_irq(this->irq, &onenand_interrupt,
 438                                 IRQF_SHARED, "onenand", this)) {
 439                 /* If we can't get irq, use the normal wait */
 440                 this->wait = onenand_wait;
 441                 return;
 442         }
 443
 444         /* Enable interrupt */
 445         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
 446         syscfg |= ONENAND_SYS_CFG1_IOBE;
 447         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
 448
 449         this->wait = onenand_try_interrupt_wait;
 450 }
 451
 452 /**
 453  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
 454  * @param mtd           MTD data structure
 455  * @param area          BufferRAM area
 456  * @return              offset given area
 457  *
 458  * Return BufferRAM offset given area
 459  */
 460 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
 461 {
 462         struct onenand_chip *this = mtd->priv;
 463
 464         if (ONENAND_CURRENT_BUFFERRAM(this)) {
 465                 /* Note: the 'this->writesize' is a real page size */
 466                 if (area == ONENAND_DATARAM)
 467                         return this->writesize;
 468                 if (area == ONENAND_SPARERAM)
 469                         return mtd->oobsize;
 470         }
 471
 472         return 0;
 473 }
 474
 475 /**
 476  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
 477  * @param mtd           MTD data structure
 478  * @param area          BufferRAM area
 479  * @param buffer        the databuffer to put/get data
 480  * @param offset        offset to read from or write to
 481  * @param count         number of bytes to read/write
 482  *
 483  * Read the BufferRAM area
 484  */
 485 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
 486                 unsigned char *buffer, int offset, size_t count)
 487 {
 488         struct onenand_chip *this = mtd->priv;
 489         void __iomem *bufferram;
 490
 491         bufferram = this->base + area;
 492
 493         bufferram += onenand_bufferram_offset(mtd, area);
 494
 495         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 496                 unsigned short word;
 497
 498                 /* Align with word(16-bit) size */
 499                 count--;
 500
 501                 /* Read word and save byte */
 502                 word = this->read_word(bufferram + offset + count);
 503                 buffer[count] = (word & 0xff);
 504         }
 505
 506         memcpy(buffer, bufferram + offset, count);
 507
 508         return 0;
 509 }
 510
 511 /**
 512  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
 513  * @param mtd           MTD data structure
 514  * @param area          BufferRAM area
 515  * @param buffer        the databuffer to put/get data
 516  * @param offset        offset to read from or write to
 517  * @param count         number of bytes to read/write
 518  *
 519  * Read the BufferRAM area with Sync. Burst Mode
 520  */
 521 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
 522                 unsigned char *buffer, int offset, size_t count)
 523 {
 524         struct onenand_chip *this = mtd->priv;
 525         void __iomem *bufferram;
 526
 527         bufferram = this->base + area;
 528
 529         bufferram += onenand_bufferram_offset(mtd, area);
 530
 531         this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
 532
 533         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 534                 unsigned short word;
 535
 536                 /* Align with word(16-bit) size */
 537                 count--;
 538
 539                 /* Read word and save byte */
 540                 word = this->read_word(bufferram + offset + count);
 541                 buffer[count] = (word & 0xff);
 542         }
 543
 544         memcpy(buffer, bufferram + offset, count);
 545
 546         this->mmcontrol(mtd, 0);
 547
 548         return 0;
 549 }
 550
 551 /**
 552  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
 553  * @param mtd           MTD data structure
 554  * @param area          BufferRAM area
 555  * @param buffer        the databuffer to put/get data
 556  * @param offset        offset to read from or write to
 557  * @param count         number of bytes to read/write
 558  *
 559  * Write the BufferRAM area
 560  */
 561 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
 562                 const unsigned char *buffer, int offset, size_t count)
 563 {
 564         struct onenand_chip *this = mtd->priv;
 565         void __iomem *bufferram;
 566
 567         bufferram = this->base + area;
 568
 569         bufferram += onenand_bufferram_offset(mtd, area);
 570
 571         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 572                 unsigned short word;
 573                 int byte_offset;
 574
 575                 /* Align with word(16-bit) size */
 576                 count--;
 577
 578                 /* Calculate byte access offset */
 579                 byte_offset = offset + count;
 580
 581                 /* Read word and save byte */
 582                 word = this->read_word(bufferram + byte_offset);
 583                 word = (word & ~0xff) | buffer[count];
 584                 this->write_word(word, bufferram + byte_offset);
 585         }
 586
 587         memcpy(bufferram + offset, buffer, count);
 588
 589         return 0;
 590 }
 591
 592 /**
 593  * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
 594  * @param mtd           MTD data structure
 595  * @param addr          address to check
 596  * @return              blockpage address
 597  *
 598  * Get blockpage address at 2x program mode
 599  */
 600 static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
 601 {
 602         struct onenand_chip *this = mtd->priv;
 603         int blockpage, block, page;
 604
 605         /* Calculate the even block number */
 606         block = (int) (addr >> this->erase_shift) & ~1;
 607         /* Is it the odd plane? */
 608         if (addr & this->writesize)
 609                 block++;
 610         page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
 611         blockpage = (block << 7) | page;
 612
 613         return blockpage;
 614 }
 615
 616 /**
 617  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
 618  * @param mtd           MTD data structure
 619  * @param addr          address to check
 620  * @return              1 if there are valid data, otherwise 0
 621  *
 622  * Check bufferram if there is data we required
 623  */
 624 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
 625 {
 626         struct onenand_chip *this = mtd->priv;
 627         int blockpage, found = 0;
 628         unsigned int i;
 629
 630         if (ONENAND_IS_2PLANE(this))
 631                 blockpage = onenand_get_2x_blockpage(mtd, addr);
 632         else
 633                 blockpage = (int) (addr >> this->page_shift);
 634
 635         /* Is there valid data? */
 636         i = ONENAND_CURRENT_BUFFERRAM(this);
 637         if (this->bufferram[i].blockpage == blockpage)
 638                 found = 1;
 639         else {
 640                 /* Check another BufferRAM */
 641                 i = ONENAND_NEXT_BUFFERRAM(this);
 642                 if (this->bufferram[i].blockpage == blockpage) {
 643                         ONENAND_SET_NEXT_BUFFERRAM(this);
 644                         found = 1;
 645                 }
 646         }
 647
 648         if (found && ONENAND_IS_DDP(this)) {
 649                 /* Select DataRAM for DDP */
 650                 int block = (int) (addr >> this->erase_shift);
 651                 int value = onenand_bufferram_address(this, block);
 652                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 653         }
 654
 655         return found;
 656 }
 657
 658 /**
 659  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
 660  * @param mtd           MTD data structure
 661  * @param addr          address to update
 662  * @param valid         valid flag
 663  *
 664  * Update BufferRAM information
 665  */
 666 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
 667                 int valid)
 668 {
 669         struct onenand_chip *this = mtd->priv;
 670         int blockpage;
 671         unsigned int i;
 672
 673         if (ONENAND_IS_2PLANE(this))
 674                 blockpage = onenand_get_2x_blockpage(mtd, addr);
 675         else
 676                 blockpage = (int) (addr >> this->page_shift);
 677
 678         /* Invalidate another BufferRAM */
 679         i = ONENAND_NEXT_BUFFERRAM(this);
 680         if (this->bufferram[i].blockpage == blockpage)
 681                 this->bufferram[i].blockpage = -1;
 682
 683         /* Update BufferRAM */
 684         i = ONENAND_CURRENT_BUFFERRAM(this);
 685         if (valid)
 686                 this->bufferram[i].blockpage = blockpage;
 687         else
 688                 this->bufferram[i].blockpage = -1;
 689 }
 690
 691 /**
 692  * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
 693  * @param mtd           MTD data structure
 694  * @param addr          start address to invalidate
 695  * @param len           length to invalidate
 696  *
 697  * Invalidate BufferRAM information
 698  */
 699 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
 700                 unsigned int len)
 701 {
 702         struct onenand_chip *this = mtd->priv;
 703         int i;
 704         loff_t end_addr = addr + len;
 705
 706         /* Invalidate BufferRAM */
 707         for (i = 0; i < MAX_BUFFERRAM; i++) {
 708                 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
 709                 if (buf_addr >= addr && buf_addr < end_addr)
 710                         this->bufferram[i].blockpage = -1;
 711         }
 712 }
 713
 714 /**
 715  * onenand_get_device - [GENERIC] Get chip for selected access
 716  * @param mtd           MTD device structure
 717  * @param new_state     the state which is requested
 718  *
 719  * Get the device and lock it for exclusive access
 720  */
 721 static int onenand_get_device(struct mtd_info *mtd, int new_state)
 722 {
 723         struct onenand_chip *this = mtd->priv;
 724         DECLARE_WAITQUEUE(wait, current);
 725
 726         /*
 727          * Grab the lock and see if the device is available
 728          */
 729         while (1) {
 730                 spin_lock(&this->chip_lock);
 731                 if (this->state == FL_READY) {
 732                         this->state = new_state;
 733                         spin_unlock(&this->chip_lock);
 734                         break;
 735                 }
 736                 if (new_state == FL_PM_SUSPENDED) {
 737                         spin_unlock(&this->chip_lock);
 738                         return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
 739                 }
 740                 set_current_state(TASK_UNINTERRUPTIBLE);
 741                 add_wait_queue(&this->wq, &wait);
 742                 spin_unlock(&this->chip_lock);
 743                 schedule();
 744                 remove_wait_queue(&this->wq, &wait);
 745         }
 746
 747         return 0;
 748 }
 749
 750 /**
 751  * onenand_release_device - [GENERIC] release chip
 752  * @param mtd           MTD device structure
 753  *
 754  * Deselect, release chip lock and wake up anyone waiting on the device
 755  */
 756 static void onenand_release_device(struct mtd_info *mtd)
 757 {
 758         struct onenand_chip *this = mtd->priv;
 759
 760         /* Release the chip */
 761         spin_lock(&this->chip_lock);
 762         this->state = FL_READY;
 763         wake_up(&this->wq);
 764         spin_unlock(&this->chip_lock);
 765 }
 766
 767 /**
 768  * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
 769  * @param mtd           MTD device structure
 770  * @param buf           destination address
 771  * @param column        oob offset to read from
 772  * @param thislen       oob length to read
 773  */
 774 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
 775                                 int thislen)
 776 {
 777         struct onenand_chip *this = mtd->priv;
 778         struct nand_oobfree *free;
 779         int readcol = column;
 780         int readend = column + thislen;
 781         int lastgap = 0;
 782         unsigned int i;
 783         uint8_t *oob_buf = this->oob_buf;
 784
 785         free = this->ecclayout->oobfree;
 786         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
 787                 if (readcol >= lastgap)
 788                         readcol += free->offset - lastgap;
 789                 if (readend >= lastgap)
 790                         readend += free->offset - lastgap;
 791                 lastgap = free->offset + free->length;
 792         }
 793         this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
 794         free = this->ecclayout->oobfree;
 795         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
 796                 int free_end = free->offset + free->length;
 797                 if (free->offset < readend && free_end > readcol) {
 798                         int st = max_t(int,free->offset,readcol);
 799                         int ed = min_t(int,free_end,readend);
 800                         int n = ed - st;
 801                         memcpy(buf, oob_buf + st, n);
 802                         buf += n;
 803                 } else if (column == 0)
 804                         break;
 805         }
 806         return 0;
 807 }
 808
 809 /**
 810  * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
 811  * @param mtd           MTD device structure
 812  * @param from          offset to read from
 813  * @param ops:          oob operation description structure
 814  *
 815  * OneNAND read main and/or out-of-band data
 816  */
 817 static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
 818                                 struct mtd_oob_ops *ops)
 819 {
 820         struct onenand_chip *this = mtd->priv;
 821         struct mtd_ecc_stats stats;
 822         size_t len = ops->len;
 823         size_t ooblen = ops->ooblen;
 824         u_char *buf = ops->datbuf;
 825         u_char *oobbuf = ops->oobbuf;
 826         int read = 0, column, thislen;
 827         int oobread = 0, oobcolumn, thisooblen, oobsize;
 828         int ret = 0, boundary = 0;
 829         int writesize = this->writesize;
 830
 831         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ops_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 832
 833         if (ops->mode == MTD_OOB_AUTO)
 834                 oobsize = this->ecclayout->oobavail;
 835         else
 836                 oobsize = mtd->oobsize;
 837
 838         oobcolumn = from & (mtd->oobsize - 1);
 839
 840         /* Do not allow reads past end of device */
 841         if ((from + len) > mtd->size) {
 842                 printk(KERN_ERR "onenand_read_ops_nolock: Attempt read beyond end of device\n");
 843                 ops->retlen = 0;
 844                 ops->oobretlen = 0;
 845                 return -EINVAL;
 846         }
 847
 848         stats = mtd->ecc_stats;
 849
 850         /* Read-while-load method */
 851
 852         /* Do first load to bufferRAM */
 853         if (read < len) {
 854                 if (!onenand_check_bufferram(mtd, from)) {
 855                         this->command(mtd, ONENAND_CMD_READ, from, writesize);
 856                         ret = this->wait(mtd, FL_READING);
 857                         onenand_update_bufferram(mtd, from, !ret);
 858                 }
 859         }
 860
 861         thislen = min_t(int, writesize, len - read);
 862         column = from & (writesize - 1);
 863         if (column + thislen > writesize)
 864                 thislen = writesize - column;
 865
 866         while (!ret) {
 867                 /* If there is more to load then start next load */
 868                 from += thislen;
 869                 if (read + thislen < len) {
 870                         this->command(mtd, ONENAND_CMD_READ, from, writesize);
 871                         /*
 872                          * Chip boundary handling in DDP
 873                          * Now we issued chip 1 read and pointed chip 1
 874                          * bufferam so we have to point chip 0 bufferam.
 875                          */
 876                         if (ONENAND_IS_DDP(this) &&
 877                             unlikely(from == (this->chipsize >> 1))) {
 878                                 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
 879                                 boundary = 1;
 880                         } else
 881                                 boundary = 0;
 882                         ONENAND_SET_PREV_BUFFERRAM(this);
 883                 }
 884                 /* While load is going, read from last bufferRAM */
 885                 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
 886
 887                 /* Read oob area if needed */
 888                 if (oobbuf) {
 889                         thisooblen = oobsize - oobcolumn;
 890                         thisooblen = min_t(int, thisooblen, ooblen - oobread);
 891
 892                         if (ops->mode == MTD_OOB_AUTO)
 893                                 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
 894                         else
 895                                 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
 896                         oobread += thisooblen;
 897                         oobbuf += thisooblen;
 898                         oobcolumn = 0;
 899                 }
 900
 901                 /* See if we are done */
 902                 read += thislen;
 903                 if (read == len)
 904                         break;
 905                 /* Set up for next read from bufferRAM */
 906                 if (unlikely(boundary))
 907                         this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
 908                 ONENAND_SET_NEXT_BUFFERRAM(this);
 909                 buf += thislen;
 910                 thislen = min_t(int, writesize, len - read);
 911                 column = 0;
 912                 cond_resched();
 913                 /* Now wait for load */
 914                 ret = this->wait(mtd, FL_READING);
 915                 onenand_update_bufferram(mtd, from, !ret);
 916         }
 917
 918         /*
 919          * Return success, if no ECC failures, else -EBADMSG
 920          * fs driver will take care of that, because
 921          * retlen == desired len and result == -EBADMSG
 922          */
 923         ops->retlen = read;
 924         ops->oobretlen = oobread;
 925
 926         if (mtd->ecc_stats.failed - stats.failed)
 927                 return -EBADMSG;
 928
 929         if (ret)
 930                 return ret;
 931
 932         return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
 933 }
 934
 935 /**
 936  * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
 937  * @param mtd           MTD device structure
 938  * @param from          offset to read from
 939  * @param ops:          oob operation description structure
 940  *
 941  * OneNAND read out-of-band data from the spare area
 942  */
 943 static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
 944                         struct mtd_oob_ops *ops)
 945 {
 946         struct onenand_chip *this = mtd->priv;
 947         int read = 0, thislen, column, oobsize;
 948         size_t len = ops->ooblen;
 949         mtd_oob_mode_t mode = ops->mode;
 950         u_char *buf = ops->oobbuf;
 951         int ret = 0;
 952
 953         from += ops->ooboffs;
 954
 955         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 956
 957         /* Initialize return length value */
 958         ops->oobretlen = 0;
 959
 960         if (mode == MTD_OOB_AUTO)
 961                 oobsize = this->ecclayout->oobavail;
 962         else
 963                 oobsize = mtd->oobsize;
 964
 965         column = from & (mtd->oobsize - 1);
 966
 967         if (unlikely(column >= oobsize)) {
 968                 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to start read outside oob\n");
 969                 return -EINVAL;
 970         }
 971
 972         /* Do not allow reads past end of device */
 973         if (unlikely(from >= mtd->size ||
 974                      column + len > ((mtd->size >> this->page_shift) -
 975                                      (from >> this->page_shift)) * oobsize)) {
 976                 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to read beyond end of device\n");
 977                 return -EINVAL;
 978         }
 979
 980         while (read < len) {
 981                 cond_resched();
 982
 983                 thislen = oobsize - column;
 984                 thislen = min_t(int, thislen, len);
 985
 986                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
 987
 988                 onenand_update_bufferram(mtd, from, 0);
 989
 990                 ret = this->wait(mtd, FL_READING);
 991                 /* First copy data and check return value for ECC handling */
 992
 993                 if (mode == MTD_OOB_AUTO)
 994                         onenand_transfer_auto_oob(mtd, buf, column, thislen);
 995                 else
 996                         this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
 997
 998                 if (ret) {
 999                         printk(KERN_ERR "onenand_read_oob_nolock: read failed = 0x%x\n", ret);
1000                         break;
1001                 }
1002
1003                 read += thislen;
1004
1005                 if (read == len)
1006                         break;
1007
1008                 buf += thislen;
1009
1010                 /* Read more? */
1011                 if (read < len) {
1012                         /* Page size */
1013                         from += mtd->writesize;
1014                         column = 0;
1015                 }
1016         }
1017
1018         ops->oobretlen = read;
1019         return ret;
1020 }
1021
1022 /**
1023  * onenand_read - [MTD Interface] Read data from flash
1024  * @param mtd           MTD device structure
1025  * @param from          offset to read from
1026  * @param len           number of bytes to read
1027  * @param retlen        pointer to variable to store the number of read bytes
1028  * @param buf           the databuffer to put data
1029  *
1030  * Read with ecc
1031 */
1032 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
1033         size_t *retlen, u_char *buf)
1034 {
1035         struct mtd_oob_ops ops = {
1036                 .len    = len,
1037                 .ooblen = 0,
1038                 .datbuf = buf,
1039                 .oobbuf = NULL,
1040         };
1041         int ret;
1042
1043         onenand_get_device(mtd, FL_READING);
1044         ret = onenand_read_ops_nolock(mtd, from, &ops);
1045         onenand_release_device(mtd);
1046
1047         *retlen = ops.retlen;
1048         return ret;
1049 }
1050
1051 /**
1052  * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
1053  * @param mtd:          MTD device structure
1054  * @param from:         offset to read from
1055  * @param ops:          oob operation description structure
1056
1057  * Read main and/or out-of-band
1058  */
1059 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1060                             struct mtd_oob_ops *ops)
1061 {
1062         int ret;
1063
1064         switch (ops->mode) {
1065         case MTD_OOB_PLACE:
1066         case MTD_OOB_AUTO:
1067                 break;
1068         case MTD_OOB_RAW:
1069                 /* Not implemented yet */
1070         default:
1071                 return -EINVAL;
1072         }
1073
1074         onenand_get_device(mtd, FL_READING);
1075         if (ops->datbuf)
1076                 ret = onenand_read_ops_nolock(mtd, from, ops);
1077         else
1078                 ret = onenand_read_oob_nolock(mtd, from, ops);
1079         onenand_release_device(mtd);
1080
1081         return ret;
1082 }
1083
1084 /**
1085  * onenand_bbt_wait - [DEFAULT] wait until the command is done
1086  * @param mtd           MTD device structure
1087  * @param state         state to select the max. timeout value
1088  *
1089  * Wait for command done.
1090  */
1091 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1092 {
1093         struct onenand_chip *this = mtd->priv;
1094         unsigned long timeout;
1095         unsigned int interrupt;
1096         unsigned int ctrl;
1097
1098         /* The 20 msec is enough */
1099         timeout = jiffies + msecs_to_jiffies(20);
1100         while (time_before(jiffies, timeout)) {
1101                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1102                 if (interrupt & ONENAND_INT_MASTER)
1103                         break;
1104         }
1105         /* To get correct interrupt status in timeout case */
1106         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1107         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1108
1109         if (ctrl & ONENAND_CTRL_ERROR) {
1110                 printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl);
1111                 /* Initial bad block case */
1112                 if (ctrl & ONENAND_CTRL_LOAD)
1113                         return ONENAND_BBT_READ_ERROR;
1114                 return ONENAND_BBT_READ_FATAL_ERROR;
1115         }
1116
1117         if (interrupt & ONENAND_INT_READ) {
1118                 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
1119                 if (ecc & ONENAND_ECC_2BIT_ALL)
1120                         return ONENAND_BBT_READ_ERROR;
1121         } else {
1122                 printk(KERN_ERR "onenand_bbt_wait: read timeout!"
1123                         "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
1124                 return ONENAND_BBT_READ_FATAL_ERROR;
1125         }
1126
1127         return 0;
1128 }
1129
1130 /**
1131  * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1132  * @param mtd           MTD device structure
1133  * @param from          offset to read from
1134  * @param ops           oob operation description structure
1135  *
1136  * OneNAND read out-of-band data from the spare area for bbt scan
1137  */
1138 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1139                             struct mtd_oob_ops *ops)
1140 {
1141         struct onenand_chip *this = mtd->priv;
1142         int read = 0, thislen, column;
1143         int ret = 0;
1144         size_t len = ops->ooblen;
1145         u_char *buf = ops->oobbuf;
1146
1147         DEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len);
1148
1149         /* Initialize return value */
1150         ops->oobretlen = 0;
1151
1152         /* Do not allow reads past end of device */
1153         if (unlikely((from + len) > mtd->size)) {
1154                 printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
1155                 return ONENAND_BBT_READ_FATAL_ERROR;
1156         }
1157
1158         /* Grab the lock and see if the device is available */
1159         onenand_get_device(mtd, FL_READING);
1160
1161         column = from & (mtd->oobsize - 1);
1162
1163         while (read < len) {
1164                 cond_resched();
1165
1166                 thislen = mtd->oobsize - column;
1167                 thislen = min_t(int, thislen, len);
1168
1169                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
1170
1171                 onenand_update_bufferram(mtd, from, 0);
1172
1173                 ret = onenand_bbt_wait(mtd, FL_READING);
1174                 if (ret)
1175                         break;
1176
1177                 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1178                 read += thislen;
1179                 if (read == len)
1180                         break;
1181
1182                 buf += thislen;
1183
1184                 /* Read more? */
1185                 if (read < len) {
1186                         /* Update Page size */
1187                         from += this->writesize;
1188                         column = 0;
1189                 }
1190         }
1191
1192         /* Deselect and wake up anyone waiting on the device */
1193         onenand_release_device(mtd);
1194
1195         ops->oobretlen = read;
1196         return ret;
1197 }
1198
1199 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1200 /**
1201  * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1202  * @param mtd           MTD device structure
1203  * @param buf           the databuffer to verify
1204  * @param to            offset to read from
1205  */
1206 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1207 {
1208         struct onenand_chip *this = mtd->priv;
1209         char oobbuf[64];
1210         int status, i;
1211
1212         this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
1213         onenand_update_bufferram(mtd, to, 0);
1214         status = this->wait(mtd, FL_READING);
1215         if (status)
1216                 return status;
1217
1218         this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1219         for (i = 0; i < mtd->oobsize; i++)
1220                 if (buf[i] != 0xFF && buf[i] != oobbuf[i])
1221                         return -EBADMSG;
1222
1223         return 0;
1224 }
1225
1226 /**
1227  * onenand_verify - [GENERIC] verify the chip contents after a write
1228  * @param mtd          MTD device structure
1229  * @param buf          the databuffer to verify
1230  * @param addr         offset to read from
1231  * @param len          number of bytes to read and compare
1232  */
1233 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1234 {
1235         struct onenand_chip *this = mtd->priv;
1236         void __iomem *dataram;
1237         int ret = 0;
1238         int thislen, column;
1239
1240         while (len != 0) {
1241                 thislen = min_t(int, this->writesize, len);
1242                 column = addr & (this->writesize - 1);
1243                 if (column + thislen > this->writesize)
1244                         thislen = this->writesize - column;
1245
1246                 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
1247
1248                 onenand_update_bufferram(mtd, addr, 0);
1249
1250                 ret = this->wait(mtd, FL_READING);
1251                 if (ret)
1252                         return ret;
1253
1254                 onenand_update_bufferram(mtd, addr, 1);
1255
1256                 dataram = this->base + ONENAND_DATARAM;
1257                 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1258
1259                 if (memcmp(buf, dataram + column, thislen))
1260                         return -EBADMSG;
1261
1262                 len -= thislen;
1263                 buf += thislen;
1264                 addr += thislen;
1265         }
1266
1267         return 0;
1268 }
1269 #else
1270 #define onenand_verify(...)             (0)
1271 #define onenand_verify_oob(...)         (0)
1272 #endif
1273
1274 #define NOTALIGNED(x)   ((x & (this->subpagesize - 1)) != 0)
1275
1276 /**
1277  * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1278  * @param mtd           MTD device structure
1279  * @param oob_buf       oob buffer
1280  * @param buf           source address
1281  * @param column        oob offset to write to
1282  * @param thislen       oob length to write
1283  */
1284 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1285                                   const u_char *buf, int column, int thislen)
1286 {
1287         struct onenand_chip *this = mtd->priv;
1288         struct nand_oobfree *free;
1289         int writecol = column;
1290         int writeend = column + thislen;
1291         int lastgap = 0;
1292         unsigned int i;
1293
1294         free = this->ecclayout->oobfree;
1295         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1296                 if (writecol >= lastgap)
1297                         writecol += free->offset - lastgap;
1298                 if (writeend >= lastgap)
1299                         writeend += free->offset - lastgap;
1300                 lastgap = free->offset + free->length;
1301         }
1302         free = this->ecclayout->oobfree;
1303         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1304                 int free_end = free->offset + free->length;
1305                 if (free->offset < writeend && free_end > writecol) {
1306                         int st = max_t(int,free->offset,writecol);
1307                         int ed = min_t(int,free_end,writeend);
1308                         int n = ed - st;
1309                         memcpy(oob_buf + st, buf, n);
1310                         buf += n;
1311                 } else if (column == 0)
1312                         break;
1313         }
1314         return 0;
1315 }
1316
1317 /**
1318  * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
1319  * @param mtd           MTD device structure
1320  * @param to            offset to write to
1321  * @param ops           oob operation description structure
1322  *
1323  * Write main and/or oob with ECC
1324  */
1325 static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
1326                                 struct mtd_oob_ops *ops)
1327 {
1328         struct onenand_chip *this = mtd->priv;
1329         int written = 0, column, thislen, subpage;
1330         int oobwritten = 0, oobcolumn, thisooblen, oobsize;
1331         size_t len = ops->len;
1332         size_t ooblen = ops->ooblen;
1333         const u_char *buf = ops->datbuf;
1334         const u_char *oob = ops->oobbuf;
1335         u_char *oobbuf;
1336         int ret = 0;
1337
1338         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ops_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1339
1340         /* Initialize retlen, in case of early exit */
1341         ops->retlen = 0;
1342         ops->oobretlen = 0;
1343
1344         /* Do not allow writes past end of device */
1345         if (unlikely((to + len) > mtd->size)) {
1346                 printk(KERN_ERR "onenand_write_ops_nolock: Attempt write to past end of device\n");
1347                 return -EINVAL;
1348         }
1349
1350         /* Reject writes, which are not page aligned */
1351         if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
1352                 printk(KERN_ERR "onenand_write_ops_nolock: Attempt to write not page aligned data\n");
1353                 return -EINVAL;
1354         }
1355
1356         if (ops->mode == MTD_OOB_AUTO)
1357                 oobsize = this->ecclayout->oobavail;
1358         else
1359                 oobsize = mtd->oobsize;
1360
1361         oobcolumn = to & (mtd->oobsize - 1);
1362
1363         column = to & (mtd->writesize - 1);
1364
1365         /* Loop until all data write */
1366         while (written < len) {
1367                 u_char *wbuf = (u_char *) buf;
1368
1369                 thislen = min_t(int, mtd->writesize - column, len - written);
1370                 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
1371
1372                 cond_resched();
1373
1374                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1375
1376                 /* Partial page write */
1377                 subpage = thislen < mtd->writesize;
1378                 if (subpage) {
1379                         memset(this->page_buf, 0xff, mtd->writesize);
1380                         memcpy(this->page_buf + column, buf, thislen);
1381                         wbuf = this->page_buf;
1382                 }
1383
1384                 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1385
1386                 if (oob) {
1387                         oobbuf = this->oob_buf;
1388
1389                         /* We send data to spare ram with oobsize
1390                          * to prevent byte access */
1391                         memset(oobbuf, 0xff, mtd->oobsize);
1392                         if (ops->mode == MTD_OOB_AUTO)
1393                                 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
1394                         else
1395                                 memcpy(oobbuf + oobcolumn, oob, thisooblen);
1396
1397                         oobwritten += thisooblen;
1398                         oob += thisooblen;
1399                         oobcolumn = 0;
1400                 } else
1401                         oobbuf = (u_char *) ffchars;
1402
1403                 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1404
1405                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1406
1407                 ret = this->wait(mtd, FL_WRITING);
1408
1409                 /* In partial page write we don't update bufferram */
1410                 onenand_update_bufferram(mtd, to, !ret && !subpage);
1411                 if (ONENAND_IS_2PLANE(this)) {
1412                         ONENAND_SET_BUFFERRAM1(this);
1413                         onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1414                 }
1415
1416                 if (ret) {
1417                         printk(KERN_ERR "onenand_write_ops_nolock: write filaed %d\n", ret);
1418                         break;
1419                 }
1420
1421                 /* Only check verify write turn on */
1422                 ret = onenand_verify(mtd, (u_char *) wbuf, to, thislen);
1423                 if (ret) {
1424                         printk(KERN_ERR "onenand_write_ops_nolock: verify failed %d\n", ret);
1425                         break;
1426                 }
1427
1428                 written += thislen;
1429
1430                 if (written == len)
1431                         break;
1432
1433                 column = 0;
1434                 to += thislen;
1435                 buf += thislen;
1436         }
1437
1438         /* Deselect and wake up anyone waiting on the device */
1439         onenand_release_device(mtd);
1440
1441         ops->retlen = written;
1442
1443         return ret;
1444 }
1445
1446
1447 /**
1448  * onenand_write_oob_nolock - [Internal] OneNAND write out-of-band
1449  * @param mtd           MTD device structure
1450  * @param to            offset to write to
1451  * @param len           number of bytes to write
1452  * @param retlen        pointer to variable to store the number of written bytes
1453  * @param buf           the data to write
1454  * @param mode          operation mode
1455  *
1456  * OneNAND write out-of-band
1457  */
1458 static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
1459                                     struct mtd_oob_ops *ops)
1460 {
1461         struct onenand_chip *this = mtd->priv;
1462         int column, ret = 0, oobsize;
1463         int written = 0;
1464         u_char *oobbuf;
1465         size_t len = ops->ooblen;
1466         const u_char *buf = ops->oobbuf;
1467         mtd_oob_mode_t mode = ops->mode;
1468
1469         to += ops->ooboffs;
1470
1471         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1472
1473         /* Initialize retlen, in case of early exit */
1474         ops->oobretlen = 0;
1475
1476         if (mode == MTD_OOB_AUTO)
1477                 oobsize = this->ecclayout->oobavail;
1478         else
1479                 oobsize = mtd->oobsize;
1480
1481         column = to & (mtd->oobsize - 1);
1482
1483         if (unlikely(column >= oobsize)) {
1484                 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to start write outside oob\n");
1485                 return -EINVAL;
1486         }
1487
1488         /* For compatibility with NAND: Do not allow write past end of page */
1489         if (unlikely(column + len > oobsize)) {
1490                 printk(KERN_ERR "onenand_write_oob_nolock: "
1491                       "Attempt to write past end of page\n");
1492                 return -EINVAL;
1493         }
1494
1495         /* Do not allow reads past end of device */
1496         if (unlikely(to >= mtd->size ||
1497                      column + len > ((mtd->size >> this->page_shift) -
1498                                      (to >> this->page_shift)) * oobsize)) {
1499                 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to write past end of device\n");
1500                 return -EINVAL;
1501         }
1502
1503         oobbuf = this->oob_buf;
1504
1505         /* Loop until all data write */
1506         while (written < len) {
1507                 int thislen = min_t(int, oobsize, len - written);
1508
1509                 cond_resched();
1510
1511                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1512
1513                 /* We send data to spare ram with oobsize
1514                  * to prevent byte access */
1515                 memset(oobbuf, 0xff, mtd->oobsize);
1516                 if (mode == MTD_OOB_AUTO)
1517                         onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
1518                 else
1519                         memcpy(oobbuf + column, buf, thislen);
1520                 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1521
1522                 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1523
1524                 onenand_update_bufferram(mtd, to, 0);
1525                 if (ONENAND_IS_2PLANE(this)) {
1526                         ONENAND_SET_BUFFERRAM1(this);
1527                         onenand_update_bufferram(mtd, to + this->writesize, 0);
1528                 }
1529
1530                 ret = this->wait(mtd, FL_WRITING);
1531                 if (ret) {
1532                         printk(KERN_ERR "onenand_write_oob_nolock: write failed %d\n", ret);
1533                         break;
1534                 }
1535
1536                 ret = onenand_verify_oob(mtd, oobbuf, to);
1537                 if (ret) {
1538                         printk(KERN_ERR "onenand_write_oob_nolock: verify failed %d\n", ret);
1539                         break;
1540                 }
1541
1542                 written += thislen;
1543                 if (written == len)
1544                         break;
1545
1546                 to += mtd->writesize;
1547                 buf += thislen;
1548                 column = 0;
1549         }
1550
1551         ops->oobretlen = written;
1552
1553         return ret;
1554 }
1555
1556 /**
1557  * onenand_write - [MTD Interface] write buffer to FLASH
1558  * @param mtd           MTD device structure
1559  * @param to            offset to write to
1560  * @param len           number of bytes to write
1561  * @param retlen        pointer to variable to store the number of written bytes
1562  * @param buf           the data to write
1563  *
1564  * Write with ECC
1565  */
1566 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
1567         size_t *retlen, const u_char *buf)
1568 {
1569         struct mtd_oob_ops ops = {
1570                 .len    = len,
1571                 .ooblen = 0,
1572                 .datbuf = (u_char *) buf,
1573                 .oobbuf = NULL,
1574         };
1575         int ret;
1576
1577         onenand_get_device(mtd, FL_WRITING);
1578         ret = onenand_write_ops_nolock(mtd, to, &ops);
1579         onenand_release_device(mtd);
1580
1581         *retlen = ops.retlen;
1582         return ret;
1583 }
1584
1585 /**
1586  * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1587  * @param mtd:          MTD device structure
1588  * @param to:           offset to write
1589  * @param ops:          oob operation description structure
1590  */
1591 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1592                              struct mtd_oob_ops *ops)
1593 {
1594         int ret;
1595
1596         switch (ops->mode) {
1597         case MTD_OOB_PLACE:
1598         case MTD_OOB_AUTO:
1599                 break;
1600         case MTD_OOB_RAW:
1601                 /* Not implemented yet */
1602         default:
1603                 return -EINVAL;
1604         }
1605
1606         onenand_get_device(mtd, FL_WRITING);
1607         if (ops->datbuf)
1608                 ret = onenand_write_ops_nolock(mtd, to, ops);
1609         else
1610                 ret = onenand_write_oob_nolock(mtd, to, ops);
1611         onenand_release_device(mtd);
1612
1613         return ret;
1614 }
1615
1616 /**
1617  * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
1618  * @param mtd           MTD device structure
1619  * @param ofs           offset from device start
1620  * @param allowbbt      1, if its allowed to access the bbt area
1621  *
1622  * Check, if the block is bad. Either by reading the bad block table or
1623  * calling of the scan function.
1624  */
1625 static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
1626 {
1627         struct onenand_chip *this = mtd->priv;
1628         struct bbm_info *bbm = this->bbm;
1629
1630         /* Return info from the table */
1631         return bbm->isbad_bbt(mtd, ofs, allowbbt);
1632 }
1633
1634 /**
1635  * onenand_erase - [MTD Interface] erase block(s)
1636  * @param mtd           MTD device structure
1637  * @param instr         erase instruction
1638  *
1639  * Erase one ore more blocks
1640  */
1641 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1642 {
1643         struct onenand_chip *this = mtd->priv;
1644         unsigned int block_size;
1645         loff_t addr;
1646         int len;
1647         int ret = 0;
1648
1649         DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1650
1651         block_size = (1 << this->erase_shift);
1652
1653         /* Start address must align on block boundary */
1654         if (unlikely(instr->addr & (block_size - 1))) {
1655                 printk(KERN_ERR "onenand_erase: Unaligned address\n");
1656                 return -EINVAL;
1657         }
1658
1659         /* Length must align on block boundary */
1660         if (unlikely(instr->len & (block_size - 1))) {
1661                 printk(KERN_ERR "onenand_erase: Length not block aligned\n");
1662                 return -EINVAL;
1663         }
1664
1665         /* Do not allow erase past end of device */
1666         if (unlikely((instr->len + instr->addr) > mtd->size)) {
1667                 printk(KERN_ERR "onenand_erase: Erase past end of device\n");
1668                 return -EINVAL;
1669         }
1670
1671         instr->fail_addr = 0xffffffff;
1672
1673         /* Grab the lock and see if the device is available */
1674         onenand_get_device(mtd, FL_ERASING);
1675
1676         /* Loop throught the pages */
1677         len = instr->len;
1678         addr = instr->addr;
1679
1680         instr->state = MTD_ERASING;
1681
1682         while (len) {
1683                 cond_resched();
1684
1685                 /* Check if we have a bad block, we do not erase bad blocks */
1686                 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
1687                         printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1688                         instr->state = MTD_ERASE_FAILED;
1689                         goto erase_exit;
1690                 }
1691
1692                 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1693
1694                 onenand_invalidate_bufferram(mtd, addr, block_size);
1695
1696                 ret = this->wait(mtd, FL_ERASING);
1697                 /* Check, if it is write protected */
1698                 if (ret) {
1699                         printk(KERN_ERR "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1700                         instr->state = MTD_ERASE_FAILED;
1701                         instr->fail_addr = addr;
1702                         goto erase_exit;
1703                 }
1704
1705                 len -= block_size;
1706                 addr += block_size;
1707         }
1708
1709         instr->state = MTD_ERASE_DONE;
1710
1711 erase_exit:
1712
1713         ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1714
1715         /* Deselect and wake up anyone waiting on the device */
1716         onenand_release_device(mtd);
1717
1718         /* Do call back function */
1719         if (!ret)
1720                 mtd_erase_callback(instr);
1721
1722         return ret;
1723 }
1724
1725 /**
1726  * onenand_sync - [MTD Interface] sync
1727  * @param mtd           MTD device structure
1728  *
1729  * Sync is actually a wait for chip ready function
1730  */
1731 static void onenand_sync(struct mtd_info *mtd)
1732 {
1733         DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1734
1735         /* Grab the lock and see if the device is available */
1736         onenand_get_device(mtd, FL_SYNCING);
1737
1738         /* Release it and go back */
1739         onenand_release_device(mtd);
1740 }
1741
1742 /**
1743  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1744  * @param mtd           MTD device structure
1745  * @param ofs           offset relative to mtd start
1746  *
1747  * Check whether the block is bad
1748  */
1749 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1750 {
1751         int ret;
1752
1753         /* Check for invalid offset */
1754         if (ofs > mtd->size)
1755                 return -EINVAL;
1756
1757         onenand_get_device(mtd, FL_READING);
1758         ret = onenand_block_isbad_nolock(mtd, ofs, 0);
1759         onenand_release_device(mtd);
1760         return ret;
1761 }
1762
1763 /**
1764  * onenand_default_block_markbad - [DEFAULT] mark a block bad
1765  * @param mtd           MTD device structure
1766  * @param ofs           offset from device start
1767  *
1768  * This is the default implementation, which can be overridden by
1769  * a hardware specific driver.
1770  */
1771 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1772 {
1773         struct onenand_chip *this = mtd->priv;
1774         struct bbm_info *bbm = this->bbm;
1775         u_char buf[2] = {0, 0};
1776         struct mtd_oob_ops ops = {
1777                 .mode = MTD_OOB_PLACE,
1778                 .ooblen = 2,
1779                 .oobbuf = buf,
1780                 .ooboffs = 0,
1781         };
1782         int block;
1783
1784         /* Get block number */
1785         block = ((int) ofs) >> bbm->bbt_erase_shift;
1786         if (bbm->bbt)
1787                 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1788
1789         /* We write two bytes, so we dont have to mess with 16 bit access */
1790         ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1791         return onenand_write_oob_nolock(mtd, ofs, &ops);
1792 }
1793
1794 /**
1795  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1796  * @param mtd           MTD device structure
1797  * @param ofs           offset relative to mtd start
1798  *
1799  * Mark the block as bad
1800  */
1801 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1802 {
1803         struct onenand_chip *this = mtd->priv;
1804         int ret;
1805
1806         ret = onenand_block_isbad(mtd, ofs);
1807         if (ret) {
1808                 /* If it was bad already, return success and do nothing */
1809                 if (ret > 0)
1810                         return 0;
1811                 return ret;
1812         }
1813
1814         onenand_get_device(mtd, FL_WRITING);
1815         ret = this->block_markbad(mtd, ofs);
1816         onenand_release_device(mtd);
1817         return ret;
1818 }
1819
1820 /**
1821  * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1822  * @param mtd           MTD device structure
1823  * @param ofs           offset relative to mtd start
1824  * @param len           number of bytes to lock or unlock
1825  * @param cmd           lock or unlock command
1826  *
1827  * Lock or unlock one or more blocks
1828  */
1829 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1830 {
1831         struct onenand_chip *this = mtd->priv;
1832         int start, end, block, value, status;
1833         int wp_status_mask;
1834
1835         start = ofs >> this->erase_shift;
1836         end = len >> this->erase_shift;
1837
1838         if (cmd == ONENAND_CMD_LOCK)
1839                 wp_status_mask = ONENAND_WP_LS;
1840         else
1841                 wp_status_mask = ONENAND_WP_US;
1842
1843         /* Continuous lock scheme */
1844         if (this->options & ONENAND_HAS_CONT_LOCK) {
1845                 /* Set start block address */
1846                 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1847                 /* Set end block address */
1848                 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1849                 /* Write lock command */
1850                 this->command(mtd, cmd, 0, 0);
1851
1852                 /* There's no return value */
1853                 this->wait(mtd, FL_LOCKING);
1854
1855                 /* Sanity check */
1856                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1857                     & ONENAND_CTRL_ONGO)
1858                         continue;
1859
1860                 /* Check lock status */
1861                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1862                 if (!(status & wp_status_mask))
1863                         printk(KERN_ERR "wp status = 0x%x\n", status);
1864
1865                 return 0;
1866         }
1867
1868         /* Block lock scheme */
1869         for (block = start; block < start + end; block++) {
1870                 /* Set block address */
1871                 value = onenand_block_address(this, block);
1872                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1873                 /* Select DataRAM for DDP */
1874                 value = onenand_bufferram_address(this, block);
1875                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1876                 /* Set start block address */
1877                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1878                 /* Write lock command */
1879                 this->command(mtd, cmd, 0, 0);
1880
1881                 /* There's no return value */
1882                 this->wait(mtd, FL_LOCKING);
1883
1884                 /* Sanity check */
1885                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1886                     & ONENAND_CTRL_ONGO)
1887                         continue;
1888
1889                 /* Check lock status */
1890                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1891                 if (!(status & wp_status_mask))
1892                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1893         }
1894
1895         return 0;
1896 }
1897
1898 /**
1899  * onenand_lock - [MTD Interface] Lock block(s)
1900  * @param mtd           MTD device structure
1901  * @param ofs           offset relative to mtd start
1902  * @param len           number of bytes to unlock
1903  *
1904  * Lock one or more blocks
1905  */
1906 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1907 {
1908         int ret;
1909
1910         onenand_get_device(mtd, FL_LOCKING);
1911         ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1912         onenand_release_device(mtd);
1913         return ret;
1914 }
1915
1916 /**
1917  * onenand_unlock - [MTD Interface] Unlock block(s)
1918  * @param mtd           MTD device structure
1919  * @param ofs           offset relative to mtd start
1920  * @param len           number of bytes to unlock
1921  *
1922  * Unlock one or more blocks
1923  */
1924 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1925 {
1926         int ret;
1927
1928         onenand_get_device(mtd, FL_LOCKING);
1929         ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1930         onenand_release_device(mtd);
1931         return ret;
1932 }
1933
1934 /**
1935  * onenand_check_lock_status - [OneNAND Interface] Check lock status
1936  * @param this          onenand chip data structure
1937  *
1938  * Check lock status
1939  */
1940 static void onenand_check_lock_status(struct onenand_chip *this)
1941 {
1942         unsigned int value, block, status;
1943         unsigned int end;
1944
1945         end = this->chipsize >> this->erase_shift;
1946         for (block = 0; block < end; block++) {
1947                 /* Set block address */
1948                 value = onenand_block_address(this, block);
1949                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1950                 /* Select DataRAM for DDP */
1951                 value = onenand_bufferram_address(this, block);
1952                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1953                 /* Set start block address */
1954                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1955
1956                 /* Check lock status */
1957                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1958                 if (!(status & ONENAND_WP_US))
1959                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1960         }
1961 }
1962
1963 /**
1964  * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1965  * @param mtd           MTD device structure
1966  *
1967  * Unlock all blocks
1968  */
1969 static int onenand_unlock_all(struct mtd_info *mtd)
1970 {
1971         struct onenand_chip *this = mtd->priv;
1972
1973         if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1974                 /* Set start block address */
1975                 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1976                 /* Write unlock command */
1977                 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1978
1979                 /* There's no return value */
1980                 this->wait(mtd, FL_LOCKING);
1981
1982                 /* Sanity check */
1983                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1984                     & ONENAND_CTRL_ONGO)
1985                         continue;
1986
1987                 /* Workaround for all block unlock in DDP */
1988                 if (ONENAND_IS_DDP(this)) {
1989                         /* 1st block on another chip */
1990                         loff_t ofs = this->chipsize >> 1;
1991                         size_t len = mtd->erasesize;
1992
1993                         onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1994                 }
1995
1996                 onenand_check_lock_status(this);
1997
1998                 return 0;
1999         }
2000
2001         onenand_do_lock_cmd(mtd, 0x0, this->chipsize, ONENAND_CMD_UNLOCK);
2002
2003         return 0;
2004 }
2005
2006 #ifdef CONFIG_MTD_ONENAND_OTP
2007
2008 /* Interal OTP operation */
2009 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
2010                 size_t *retlen, u_char *buf);
2011
2012 /**
2013  * do_otp_read - [DEFAULT] Read OTP block area
2014  * @param mtd           MTD device structure
2015  * @param from          The offset to read
2016  * @param len           number of bytes to read
2017  * @param retlen        pointer to variable to store the number of readbytes
2018  * @param buf           the databuffer to put/get data
2019  *
2020  * Read OTP block area.
2021  */
2022 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
2023                 size_t *retlen, u_char *buf)
2024 {
2025         struct onenand_chip *this = mtd->priv;
2026         struct mtd_oob_ops ops = {
2027                 .len    = len,
2028                 .ooblen = 0,
2029                 .datbuf = buf,
2030                 .oobbuf = NULL,
2031         };
2032         int ret;
2033
2034         /* Enter OTP access mode */
2035         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2036         this->wait(mtd, FL_OTPING);
2037
2038         ret = onenand_read_ops_nolock(mtd, from, &ops);
2039
2040         /* Exit OTP access mode */
2041         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2042         this->wait(mtd, FL_RESETING);
2043
2044         return ret;
2045 }
2046
2047 /**
2048  * do_otp_write - [DEFAULT] Write OTP block area
2049  * @param mtd           MTD device structure
2050  * @param to            The offset to write
2051  * @param len           number of bytes to write
2052  * @param retlen        pointer to variable to store the number of write bytes
2053  * @param buf           the databuffer to put/get data
2054  *
2055  * Write OTP block area.
2056  */
2057 static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
2058                 size_t *retlen, u_char *buf)
2059 {
2060         struct onenand_chip *this = mtd->priv;
2061         unsigned char *pbuf = buf;
2062         int ret;
2063         struct mtd_oob_ops ops;
2064
2065         /* Force buffer page aligned */
2066         if (len < mtd->writesize) {
2067                 memcpy(this->page_buf, buf, len);
2068                 memset(this->page_buf + len, 0xff, mtd->writesize - len);
2069                 pbuf = this->page_buf;
2070                 len = mtd->writesize;
2071         }
2072
2073         /* Enter OTP access mode */
2074         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2075         this->wait(mtd, FL_OTPING);
2076
2077         ops.len = len;
2078         ops.ooblen = 0;
2079         ops.datbuf = pbuf;
2080         ops.oobbuf = NULL;
2081         ret = onenand_write_ops_nolock(mtd, to, &ops);
2082         *retlen = ops.retlen;
2083
2084         /* Exit OTP access mode */
2085         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2086         this->wait(mtd, FL_RESETING);
2087
2088         return ret;
2089 }
2090
2091 /**
2092  * do_otp_lock - [DEFAULT] Lock OTP block area
2093  * @param mtd           MTD device structure
2094  * @param from          The offset to lock
2095  * @param len           number of bytes to lock
2096  * @param retlen        pointer to variable to store the number of lock bytes
2097  * @param buf           the databuffer to put/get data
2098  *
2099  * Lock OTP block area.
2100  */
2101 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
2102                 size_t *retlen, u_char *buf)
2103 {
2104         struct onenand_chip *this = mtd->priv;
2105         struct mtd_oob_ops ops = {
2106                 .mode = MTD_OOB_PLACE,
2107                 .ooblen = len,
2108                 .oobbuf = buf,
2109                 .ooboffs = 0,
2110         };
2111         int ret;
2112
2113         /* Enter OTP access mode */
2114         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2115         this->wait(mtd, FL_OTPING);
2116
2117         ret = onenand_write_oob_nolock(mtd, from, &ops);
2118
2119         *retlen = ops.oobretlen;
2120
2121         /* Exit OTP access mode */
2122         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2123         this->wait(mtd, FL_RESETING);
2124
2125         return ret;
2126 }
2127
2128 /**
2129  * onenand_otp_walk - [DEFAULT] Handle OTP operation
2130  * @param mtd           MTD device structure
2131  * @param from          The offset to read/write
2132  * @param len           number of bytes to read/write
2133  * @param retlen        pointer to variable to store the number of read bytes
2134  * @param buf           the databuffer to put/get data
2135  * @param action        do given action
2136  * @param mode          specify user and factory
2137  *
2138  * Handle OTP operation.
2139  */
2140 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
2141                         size_t *retlen, u_char *buf,
2142                         otp_op_t action, int mode)
2143 {
2144         struct onenand_chip *this = mtd->priv;
2145         int otp_pages;
2146         int density;
2147         int ret = 0;
2148
2149         *retlen = 0;
2150
2151         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2152         if (density < ONENAND_DEVICE_DENSITY_512Mb)
2153                 otp_pages = 20;
2154         else
2155                 otp_pages = 10;
2156
2157         if (mode == MTD_OTP_FACTORY) {
2158                 from += mtd->writesize * otp_pages;
2159                 otp_pages = 64 - otp_pages;
2160         }
2161
2162         /* Check User/Factory boundary */
2163         if (((mtd->writesize * otp_pages) - (from + len)) < 0)
2164                 return 0;
2165
2166         onenand_get_device(mtd, FL_OTPING);
2167         while (len > 0 && otp_pages > 0) {
2168                 if (!action) {  /* OTP Info functions */
2169                         struct otp_info *otpinfo;
2170
2171                         len -= sizeof(struct otp_info);
2172                         if (len <= 0) {
2173                                 ret = -ENOSPC;
2174                                 break;
2175                         }
2176
2177                         otpinfo = (struct otp_info *) buf;
2178                         otpinfo->start = from;
2179                         otpinfo->length = mtd->writesize;
2180                         otpinfo->locked = 0;
2181
2182                         from += mtd->writesize;
2183                         buf += sizeof(struct otp_info);
2184                         *retlen += sizeof(struct otp_info);
2185                 } else {
2186                         size_t tmp_retlen;
2187                         int size = len;
2188
2189                         ret = action(mtd, from, len, &tmp_retlen, buf);
2190
2191                         buf += size;
2192                         len -= size;
2193                         *retlen += size;
2194
2195                         if (ret)
2196                                 break;
2197                 }
2198                 otp_pages--;
2199         }
2200         onenand_release_device(mtd);
2201
2202         return ret;
2203 }
2204
2205 /**
2206  * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
2207  * @param mtd           MTD device structure
2208  * @param buf           the databuffer to put/get data
2209  * @param len           number of bytes to read
2210  *
2211  * Read factory OTP info.
2212  */
2213 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
2214                         struct otp_info *buf, size_t len)
2215 {
2216         size_t retlen;
2217         int ret;
2218
2219         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
2220
2221         return ret ? : retlen;
2222 }
2223
2224 /**
2225  * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
2226  * @param mtd           MTD device structure
2227  * @param from          The offset to read
2228  * @param len           number of bytes to read
2229  * @param retlen        pointer to variable to store the number of read bytes
2230  * @param buf           the databuffer to put/get data
2231  *
2232  * Read factory OTP area.
2233  */
2234 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
2235                         size_t len, size_t *retlen, u_char *buf)
2236 {
2237         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
2238 }
2239
2240 /**
2241  * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
2242  * @param mtd           MTD device structure
2243  * @param buf           the databuffer to put/get data
2244  * @param len           number of bytes to read
2245  *
2246  * Read user OTP info.
2247  */
2248 static int onenand_get_user_prot_info(struct mtd_info *mtd,
2249                         struct otp_info *buf, size_t len)
2250 {
2251         size_t retlen;
2252         int ret;
2253
2254         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
2255
2256         return ret ? : retlen;
2257 }
2258
2259 /**
2260  * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
2261  * @param mtd           MTD device structure
2262  * @param from          The offset to read
2263  * @param len           number of bytes to read
2264  * @param retlen        pointer to variable to store the number of read bytes
2265  * @param buf           the databuffer to put/get data
2266  *
2267  * Read user OTP area.
2268  */
2269 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
2270                         size_t len, size_t *retlen, u_char *buf)
2271 {
2272         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
2273 }
2274
2275 /**
2276  * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
2277  * @param mtd           MTD device structure
2278  * @param from          The offset to write
2279  * @param len           number of bytes to write
2280  * @param retlen        pointer to variable to store the number of write bytes
2281  * @param buf           the databuffer to put/get data
2282  *
2283  * Write user OTP area.
2284  */
2285 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
2286                         size_t len, size_t *retlen, u_char *buf)
2287 {
2288         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
2289 }
2290
2291 /**
2292  * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
2293  * @param mtd           MTD device structure
2294  * @param from          The offset to lock
2295  * @param len           number of bytes to unlock
2296  *
2297  * Write lock mark on spare area in page 0 in OTP block
2298  */
2299 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
2300                         size_t len)
2301 {
2302         unsigned char oob_buf[64];
2303         size_t retlen;
2304         int ret;
2305
2306         memset(oob_buf, 0xff, mtd->oobsize);
2307         /*
2308          * Note: OTP lock operation
2309          *       OTP block : 0xXXFC
2310          *       1st block : 0xXXF3 (If chip support)
2311          *       Both      : 0xXXF0 (If chip support)
2312          */
2313         oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
2314
2315         /*
2316          * Write lock mark to 8th word of sector0 of page0 of the spare0.
2317          * We write 16 bytes spare area instead of 2 bytes.
2318          */
2319         from = 0;
2320         len = 16;
2321
2322         ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
2323
2324         return ret ? : retlen;
2325 }
2326 #endif  /* CONFIG_MTD_ONENAND_OTP */
2327
2328 /**
2329  * onenand_check_features - Check and set OneNAND features
2330  * @param mtd           MTD data structure
2331  *
2332  * Check and set OneNAND features
2333  * - lock scheme
2334  * - two plane
2335  */
2336 static void onenand_check_features(struct mtd_info *mtd)
2337 {
2338         struct onenand_chip *this = mtd->priv;
2339         unsigned int density, process;
2340
2341         /* Lock scheme depends on density and process */
2342         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2343         process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
2344
2345         /* Lock scheme */
2346         switch (density) {
2347         case ONENAND_DEVICE_DENSITY_4Gb:
2348                 this->options |= ONENAND_HAS_2PLANE;
2349
2350         case ONENAND_DEVICE_DENSITY_2Gb:
2351                 /* 2Gb DDP don't have 2 plane */
2352                 if (!ONENAND_IS_DDP(this))
2353                         this->options |= ONENAND_HAS_2PLANE;
2354                 this->options |= ONENAND_HAS_UNLOCK_ALL;
2355
2356         case ONENAND_DEVICE_DENSITY_1Gb:
2357                 /* A-Die has all block unlock */
2358                 if (process)
2359                         this->options |= ONENAND_HAS_UNLOCK_ALL;
2360                 break;
2361
2362         default:
2363                 /* Some OneNAND has continuous lock scheme */
2364                 if (!process)
2365                         this->options |= ONENAND_HAS_CONT_LOCK;
2366                 break;
2367         }
2368
2369         if (this->options & ONENAND_HAS_CONT_LOCK)
2370                 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
2371         if (this->options & ONENAND_HAS_UNLOCK_ALL)
2372                 printk(KERN_DEBUG "Chip support all block unlock\n");
2373         if (this->options & ONENAND_HAS_2PLANE)
2374                 printk(KERN_DEBUG "Chip has 2 plane\n");
2375 }
2376
2377 /**
2378  * onenand_print_device_info - Print device & version ID
2379  * @param device        device ID
2380  * @param version       version ID
2381  *
2382  * Print device & version ID
2383  */
2384 static void onenand_print_device_info(int device, int version)
2385 {
2386         int vcc, demuxed, ddp, density;
2387
2388         vcc = device & ONENAND_DEVICE_VCC_MASK;
2389         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
2390         ddp = device & ONENAND_DEVICE_IS_DDP;
2391         density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
2392         printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
2393                 demuxed ? "" : "Muxed ",
2394                 ddp ? "(DDP)" : "",
2395                 (16 << density),
2396                 vcc ? "2.65/3.3" : "1.8",
2397                 device);
2398         printk(KERN_INFO "OneNAND version = 0x%04x\n", version);
2399 }
2400
2401 static const struct onenand_manufacturers onenand_manuf_ids[] = {
2402         {ONENAND_MFR_SAMSUNG, "Samsung"},
2403 };
2404
2405 /**
2406  * onenand_check_maf - Check manufacturer ID
2407  * @param manuf         manufacturer ID
2408  *
2409  * Check manufacturer ID
2410  */
2411 static int onenand_check_maf(int manuf)
2412 {
2413         int size = ARRAY_SIZE(onenand_manuf_ids);
2414         char *name;
2415         int i;
2416
2417         for (i = 0; i < size; i++)
2418                 if (manuf == onenand_manuf_ids[i].id)
2419                         break;
2420
2421         if (i < size)
2422                 name = onenand_manuf_ids[i].name;
2423         else
2424                 name = "Unknown";
2425
2426         printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
2427
2428         return (i == size);
2429 }
2430
2431 /**
2432  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
2433  * @param mtd           MTD device structure
2434  *
2435  * OneNAND detection method:
2436  *   Compare the values from command with ones from register
2437  */
2438 static int onenand_probe(struct mtd_info *mtd)
2439 {
2440         struct onenand_chip *this = mtd->priv;
2441         int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
2442         int density;
2443         int syscfg;
2444
2445         /* Save system configuration 1 */
2446         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
2447         /* Clear Sync. Burst Read mode to read BootRAM */
2448         this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
2449
2450         /* Send the command for reading device ID from BootRAM */
2451         this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
2452
2453         /* Read manufacturer and device IDs from BootRAM */
2454         bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
2455         bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
2456
2457         /* Reset OneNAND to read default register values */
2458         this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
2459         /* Wait reset */
2460         this->wait(mtd, FL_RESETING);
2461
2462         /* Restore system configuration 1 */
2463         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
2464
2465         /* Check manufacturer ID */
2466         if (onenand_check_maf(bram_maf_id))
2467                 return -ENXIO;
2468
2469         /* Read manufacturer and device IDs from Register */
2470         maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
2471         dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
2472         ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
2473
2474         /* Check OneNAND device */
2475         if (maf_id != bram_maf_id || dev_id != bram_dev_id)
2476                 return -ENXIO;
2477
2478         /* Flash device information */
2479         onenand_print_device_info(dev_id, ver_id);
2480         this->device_id = dev_id;
2481         this->version_id = ver_id;
2482
2483         density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2484         this->chipsize = (16 << density) << 20;
2485         /* Set density mask. it is used for DDP */
2486         if (ONENAND_IS_DDP(this))
2487                 this->density_mask = (1 << (density + 6));
2488         else
2489                 this->density_mask = 0;
2490
2491         /* OneNAND page size & block size */
2492         /* The data buffer size is equal to page size */
2493         mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
2494         mtd->oobsize = mtd->writesize >> 5;
2495         /* Pages per a block are always 64 in OneNAND */
2496         mtd->erasesize = mtd->writesize << 6;
2497
2498         this->erase_shift = ffs(mtd->erasesize) - 1;
2499         this->page_shift = ffs(mtd->writesize) - 1;
2500         this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
2501         /* It's real page size */
2502         this->writesize = mtd->writesize;
2503
2504         /* REVIST: Multichip handling */
2505
2506         mtd->size = this->chipsize;
2507
2508         /* Check OneNAND features */
2509         onenand_check_features(mtd);
2510
2511         /*
2512          * We emulate the 4KiB page and 256KiB erase block size
2513          * But oobsize is still 64 bytes.
2514          * It is only valid if you turn on 2X program support,
2515          * Otherwise it will be ignored by compiler.
2516          */
2517         if (ONENAND_IS_2PLANE(this)) {
2518                 mtd->writesize <<= 1;
2519                 mtd->erasesize <<= 1;
2520         }
2521
2522         return 0;
2523 }
2524
2525 /**
2526  * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
2527  * @param mtd           MTD device structure
2528  */
2529 static int onenand_suspend(struct mtd_info *mtd)
2530 {
2531         return onenand_get_device(mtd, FL_PM_SUSPENDED);
2532 }
2533
2534 /**
2535  * onenand_resume - [MTD Interface] Resume the OneNAND flash
2536  * @param mtd           MTD device structure
2537  */
2538 static void onenand_resume(struct mtd_info *mtd)
2539 {
2540         struct onenand_chip *this = mtd->priv;
2541
2542         if (this->state == FL_PM_SUSPENDED)
2543                 onenand_release_device(mtd);
2544         else
2545                 printk(KERN_ERR "resume() called for the chip which is not"
2546                                 "in suspended state\n");
2547 }
2548
2549 /**
2550  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2551  * @param mtd           MTD device structure
2552  * @param maxchips      Number of chips to scan for
2553  *
2554  * This fills out all the not initialized function pointers
2555  * with the defaults.
2556  * The flash ID is read and the mtd/chip structures are
2557  * filled with the appropriate values.
2558  */
2559 int onenand_scan(struct mtd_info *mtd, int maxchips)
2560 {
2561         int i;
2562         struct onenand_chip *this = mtd->priv;
2563
2564         if (!this->read_word)
2565                 this->read_word = onenand_readw;
2566         if (!this->write_word)
2567                 this->write_word = onenand_writew;
2568
2569         if (!this->command)
2570                 this->command = onenand_command;
2571         if (!this->wait)
2572                 onenand_setup_wait(mtd);
2573
2574         if (!this->read_bufferram)
2575                 this->read_bufferram = onenand_read_bufferram;
2576         if (!this->write_bufferram)
2577                 this->write_bufferram = onenand_write_bufferram;
2578
2579         if (!this->block_markbad)
2580                 this->block_markbad = onenand_default_block_markbad;
2581         if (!this->scan_bbt)
2582                 this->scan_bbt = onenand_default_bbt;
2583
2584         if (onenand_probe(mtd))
2585                 return -ENXIO;
2586
2587         /* Set Sync. Burst Read after probing */
2588         if (this->mmcontrol) {
2589                 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2590                 this->read_bufferram = onenand_sync_read_bufferram;
2591         }
2592
2593         /* Allocate buffers, if necessary */
2594         if (!this->page_buf) {
2595                 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
2596                 if (!this->page_buf) {
2597                         printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2598                         return -ENOMEM;
2599                 }
2600                 this->options |= ONENAND_PAGEBUF_ALLOC;
2601         }
2602         if (!this->oob_buf) {
2603                 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
2604                 if (!this->oob_buf) {
2605                         printk(KERN_ERR "onenand_scan(): Can't allocate oob_buf\n");
2606                         if (this->options & ONENAND_PAGEBUF_ALLOC) {
2607                                 this->options &= ~ONENAND_PAGEBUF_ALLOC;
2608                                 kfree(this->page_buf);
2609                         }
2610                         return -ENOMEM;
2611                 }
2612                 this->options |= ONENAND_OOBBUF_ALLOC;
2613         }
2614
2615         this->state = FL_READY;
2616         init_waitqueue_head(&this->wq);
2617         spin_lock_init(&this->chip_lock);
2618
2619         /*
2620          * Allow subpage writes up to oobsize.
2621          */
2622         switch (mtd->oobsize) {
2623         case 64:
2624                 this->ecclayout = &onenand_oob_64;
2625                 mtd->subpage_sft = 2;
2626                 break;
2627
2628         case 32:
2629                 this->ecclayout = &onenand_oob_32;
2630                 mtd->subpage_sft = 1;
2631                 break;
2632
2633         default:
2634                 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2635                         mtd->oobsize);
2636                 mtd->subpage_sft = 0;
2637                 /* To prevent kernel oops */
2638                 this->ecclayout = &onenand_oob_32;
2639                 break;
2640         }
2641
2642         this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2643
2644         /*
2645          * The number of bytes available for a client to place data into
2646          * the out of band area
2647          */
2648         this->ecclayout->oobavail = 0;
2649         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
2650             this->ecclayout->oobfree[i].length; i++)
2651                 this->ecclayout->oobavail +=
2652                         this->ecclayout->oobfree[i].length;
2653         mtd->oobavail = this->ecclayout->oobavail;
2654
2655         mtd->ecclayout = this->ecclayout;
2656
2657         /* Fill in remaining MTD driver data */
2658         mtd->type = MTD_NANDFLASH;
2659         mtd->flags = MTD_CAP_NANDFLASH;
2660         mtd->erase = onenand_erase;
2661         mtd->point = NULL;
2662         mtd->unpoint = NULL;
2663         mtd->read = onenand_read;
2664         mtd->write = onenand_write;
2665         mtd->read_oob = onenand_read_oob;
2666         mtd->write_oob = onenand_write_oob;
2667 #ifdef CONFIG_MTD_ONENAND_OTP
2668         mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2669         mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2670         mtd->get_user_prot_info = onenand_get_user_prot_info;
2671         mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2672         mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2673         mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2674 #endif
2675         mtd->sync = onenand_sync;
2676         mtd->lock = onenand_lock;
2677         mtd->unlock = onenand_unlock;
2678         mtd->suspend = onenand_suspend;
2679         mtd->resume = onenand_resume;
2680         mtd->block_isbad = onenand_block_isbad;
2681         mtd->block_markbad = onenand_block_markbad;
2682         mtd->owner = THIS_MODULE;
2683
2684         /* Unlock whole block */
2685         onenand_unlock_all(mtd);
2686
2687         return this->scan_bbt(mtd);
2688 }
2689
2690 /**
2691  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2692  * @param mtd           MTD device structure
2693  */
2694 void onenand_release(struct mtd_info *mtd)
2695 {
2696         struct onenand_chip *this = mtd->priv;
2697
2698 #ifdef CONFIG_MTD_PARTITIONS
2699         /* Deregister partitions */
2700         del_mtd_partitions (mtd);
2701 #endif
2702         /* Deregister the device */
2703         del_mtd_device (mtd);
2704
2705         /* Free bad block table memory, if allocated */
2706         if (this->bbm) {
2707                 struct bbm_info *bbm = this->bbm;
2708                 kfree(bbm->bbt);
2709                 kfree(this->bbm);
2710         }
2711         /* Buffers allocated by onenand_scan */
2712         if (this->options & ONENAND_PAGEBUF_ALLOC)
2713                 kfree(this->page_buf);
2714         if (this->options & ONENAND_OOBBUF_ALLOC)
2715                 kfree(this->oob_buf);
2716 }
2717
2718 EXPORT_SYMBOL_GPL(onenand_scan);
2719 EXPORT_SYMBOL_GPL(onenand_release);
2720
2721 MODULE_LICENSE("GPL");
2722 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2723 MODULE_DESCRIPTION("Generic OneNAND flash driver code");