drivers/mtd/nand/omap-nand-flash.c

   1 /*
   2  * drivers/mtd/nand/omap-nand-flash.c
   3  *
   4  * Copyright (c) 2004 Texas Instruments, Jian Zhang <jzhang@ti.com>
   5  * Copyright (c) 2004 David Brownell
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/init.h>
  13 #include <linux/ioport.h>
  14 #include <linux/kernel.h>
  15 #include <linux/module.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/types.h>
  18 #include <linux/mtd/mtd.h>
  19 #include <linux/mtd/nand.h>
  20 #include <linux/mtd/partitions.h>
  21
  22 #include <asm/io.h>
  23 #include <asm/hardware.h>
  24 #include <asm/mach-types.h>
  25 #include <asm/mach/flash.h>
  26 #include <asm/arch/tc.h>
  27
  28 #include <asm/io.h>
  29 #include <asm/arch/hardware.h>
  30
  31 #define DRIVER_NAME     "omapnand"
  32
  33 #ifdef CONFIG_MTD_PARTITIONS
  34 static const char *part_probes[] = { "cmdlinepart", NULL };
  35 #endif
  36
  37 struct omap_nand_info {
  38         struct nand_platform_data *pdata;
  39         struct mtd_partition    *parts;
  40         struct mtd_info         mtd;
  41         struct nand_chip        nand;
  42 };
  43
  44 /*
  45  *      hardware specific access to control-lines
  46  *      NOTE:  boards may use different bits for these!!
  47  */
  48 #define MASK_CLE        0x02
  49 #define MASK_ALE        0x04
  50 static void omap_nand_hwcontrol(struct mtd_info *mtd, int cmd)
  51 {
  52         struct nand_chip *this = mtd->priv;
  53         unsigned long IO_ADDR_W = (unsigned long) this->IO_ADDR_W;
  54
  55         switch (cmd) {
  56                 case NAND_CTL_SETCLE: IO_ADDR_W |= MASK_CLE; break;
  57                 case NAND_CTL_CLRCLE: IO_ADDR_W &= ~MASK_CLE; break;
  58                 case NAND_CTL_SETALE: IO_ADDR_W |= MASK_ALE; break;
  59                 case NAND_CTL_CLRALE: IO_ADDR_W &= ~MASK_ALE; break;
  60         }
  61         this->IO_ADDR_W = (void __iomem *) IO_ADDR_W;
  62 }
  63
  64 static int omap_nand_dev_ready(struct mtd_info *mtd)
  65 {
  66         struct omap_nand_info *info = container_of(mtd, struct omap_nand_info, mtd);
  67
  68         return info->pdata->dev_ready(info->pdata);
  69 }
  70
  71 static int __devinit omap_nand_probe(struct platform_device *pdev)
  72 {
  73         struct omap_nand_info           *info;
  74         struct nand_platform_data       *pdata = pdev->dev.platform_data;
  75         struct resource                 *res = pdev->resource;
  76         unsigned long                   size = res->end - res->start + 1;
  77         int                             err;
  78
  79         info = kmalloc(sizeof(struct omap_nand_info), GFP_KERNEL);
  80         if (!info)
  81                 return -ENOMEM;
  82
  83         memset(info, 0, sizeof(struct omap_nand_info));
  84
  85         if (!request_mem_region(res->start, size, pdev->dev.driver->name)) {
  86                 err = -EBUSY;
  87                 goto out_free_info;
  88         }
  89
  90         info->nand.IO_ADDR_R = ioremap(res->start, size);
  91         if (!info->nand.IO_ADDR_R) {
  92                 err = -ENOMEM;
  93                 goto out_release_mem_region;
  94         }
  95         info->nand.IO_ADDR_W = info->nand.IO_ADDR_R;
  96         info->nand.hwcontrol = omap_nand_hwcontrol;
  97         info->nand.eccmode = NAND_ECC_SOFT;
  98         info->nand.options = pdata->options;
  99         if (pdata->dev_ready)
 100                 info->nand.dev_ready = omap_nand_dev_ready;
 101         else
 102                 info->nand.chip_delay = 20;
 103
 104         info->mtd.name = pdev->dev.bus_id;
 105         info->mtd.priv = &info->nand;
 106
 107         info->pdata = pdata;
 108
 109         /* DIP switches on H2 and some other boards change between 8 and 16 bit
 110          * bus widths for flash.  Try the other width if the first try fails.
 111          */
 112         if (nand_scan(&info->mtd, 1)) {
 113                 info->nand.options ^= NAND_BUSWIDTH_16;
 114                 if (nand_scan(&info->mtd, 1)) {
 115                         err = -ENXIO;
 116                         goto out_iounmap;
 117                 }
 118         }
 119         info->mtd.owner = THIS_MODULE;
 120
 121 #ifdef CONFIG_MTD_PARTITIONS
 122         err = parse_mtd_partitions(&info->mtd, part_probes, &info->parts, 0);
 123         if (err > 0)
 124                 add_mtd_partitions(&info->mtd, info->parts, err);
 125         else if (err < 0 && pdata->parts)
 126                 add_mtd_partitions(&info->mtd, pdata->parts, pdata->nr_parts);
 127         else
 128 #endif
 129                 add_mtd_device(&info->mtd);
 130
 131         platform_set_drvdata(pdev, info);
 132
 133         return 0;
 134
 135 out_iounmap:
 136         iounmap(info->nand.IO_ADDR_R);
 137 out_release_mem_region:
 138         release_mem_region(res->start, size);
 139 out_free_info:
 140         kfree(info);
 141
 142         return err;
 143 }
 144
 145 static int omap_nand_remove(struct platform_device *pdev)
 146 {
 147         struct omap_nand_info *info = platform_get_drvdata(pdev);
 148
 149         platform_set_drvdata(pdev, NULL);
 150         /* Release NAND device, its internal structures and partitions */
 151         nand_release(&info->mtd);
 152         iounmap(info->nand.IO_ADDR_R);
 153         kfree(info);
 154         return 0;
 155 }
 156
 157 static struct platform_driver omap_nand_driver = {
 158         .probe          = omap_nand_probe,
 159         .remove         = omap_nand_remove,
 160         .driver         = {
 161                 .name   = DRIVER_NAME,
 162         },
 163 };
 164 MODULE_ALIAS(DRIVER_NAME);
 165
 166 static int __init omap_nand_init(void)
 167 {
 168         return platform_driver_register(&omap_nand_driver);
 169 }
 170
 171 static void __exit omap_nand_exit(void)
 172 {
 173         platform_driver_unregister(&omap_nand_driver);
 174 }
 175
 176 module_init(omap_nand_init);
 177 module_exit(omap_nand_exit);
 178
 179 MODULE_LICENSE("GPL");
 180 MODULE_AUTHOR("Jian Zhang <jzhang@ti.com> (and others)");
 181 MODULE_DESCRIPTION("Glue layer for NAND flash on TI OMAP boards");
 182