2 * drivers/mtd/nand/omap-nand-flash.c
4 * Copyright (c) 2004 Texas Instruments, Jian Zhang <jzhang@ti.com>
5 * Copyright (c) 2004 David Brownell
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/init.h>
13 #include <linux/ioport.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/platform_device.h>
17 #include <linux/types.h>
18 #include <linux/mtd/mtd.h>
19 #include <linux/mtd/nand.h>
20 #include <linux/mtd/partitions.h>
23 #include <asm/hardware.h>
24 #include <asm/mach-types.h>
25 #include <asm/mach/flash.h>
26 #include <asm/arch/tc.h>
29 #include <asm/arch/hardware.h>
31 #define DRIVER_NAME "omapnand"
33 #ifdef CONFIG_MTD_PARTITIONS
34 static const char *part_probes[] = { "cmdlinepart", NULL };
37 struct omap_nand_info {
38 struct nand_platform_data *pdata;
39 struct mtd_partition *parts;
41 struct nand_chip nand;
45 * hardware specific access to control-lines
46 * NOTE: boards may use different bits for these!!
50 static void omap_nand_hwcontrol(struct mtd_info *mtd, int cmd)
52 struct nand_chip *this = mtd->priv;
53 unsigned long IO_ADDR_W = (unsigned long) this->IO_ADDR_W;
56 case NAND_CTL_SETCLE: IO_ADDR_W |= MASK_CLE; break;
57 case NAND_CTL_CLRCLE: IO_ADDR_W &= ~MASK_CLE; break;
58 case NAND_CTL_SETALE: IO_ADDR_W |= MASK_ALE; break;
59 case NAND_CTL_CLRALE: IO_ADDR_W &= ~MASK_ALE; break;
61 this->IO_ADDR_W = (void __iomem *) IO_ADDR_W;
64 static int omap_nand_dev_ready(struct mtd_info *mtd)
66 struct omap_nand_info *info = container_of(mtd, struct omap_nand_info, mtd);
68 return info->pdata->dev_ready(info->pdata);
71 static int __devinit omap_nand_probe(struct platform_device *pdev)
73 struct omap_nand_info *info;
74 struct nand_platform_data *pdata = pdev->dev.platform_data;
75 struct resource *res = pdev->resource;
76 unsigned long size = res->end - res->start + 1;
79 info = kmalloc(sizeof(struct omap_nand_info), GFP_KERNEL);
83 memset(info, 0, sizeof(struct omap_nand_info));
85 if (!request_mem_region(res->start, size, pdev->dev.driver->name)) {
90 info->nand.IO_ADDR_R = ioremap(res->start, size);
91 if (!info->nand.IO_ADDR_R) {
93 goto out_release_mem_region;
95 info->nand.IO_ADDR_W = info->nand.IO_ADDR_R;
96 info->nand.hwcontrol = omap_nand_hwcontrol;
97 info->nand.eccmode = NAND_ECC_SOFT;
98 info->nand.options = pdata->options;
100 info->nand.dev_ready = omap_nand_dev_ready;
102 info->nand.chip_delay = 20;
104 info->mtd.name = pdev->dev.bus_id;
105 info->mtd.priv = &info->nand;
109 /* DIP switches on H2 and some other boards change between 8 and 16 bit
110 * bus widths for flash. Try the other width if the first try fails.
112 if (nand_scan(&info->mtd, 1)) {
113 info->nand.options ^= NAND_BUSWIDTH_16;
114 if (nand_scan(&info->mtd, 1)) {
119 info->mtd.owner = THIS_MODULE;
121 #ifdef CONFIG_MTD_PARTITIONS
122 err = parse_mtd_partitions(&info->mtd, part_probes, &info->parts, 0);
124 add_mtd_partitions(&info->mtd, info->parts, err);
125 else if (err < 0 && pdata->parts)
126 add_mtd_partitions(&info->mtd, pdata->parts, pdata->nr_parts);
129 add_mtd_device(&info->mtd);
131 platform_set_drvdata(pdev, info);
136 iounmap(info->nand.IO_ADDR_R);
137 out_release_mem_region:
138 release_mem_region(res->start, size);
145 static int omap_nand_remove(struct platform_device *pdev)
147 struct omap_nand_info *info = platform_get_drvdata(pdev);
149 platform_set_drvdata(pdev, NULL);
150 /* Release NAND device, its internal structures and partitions */
151 nand_release(&info->mtd);
152 iounmap(info->nand.IO_ADDR_R);
157 static struct platform_driver omap_nand_driver = {
158 .probe = omap_nand_probe,
159 .remove = omap_nand_remove,
164 MODULE_ALIAS(DRIVER_NAME);
166 static int __init omap_nand_init(void)
168 return platform_driver_register(&omap_nand_driver);
171 static void __exit omap_nand_exit(void)
173 platform_driver_unregister(&omap_nand_driver);
176 module_init(omap_nand_init);
177 module_exit(omap_nand_exit);
179 MODULE_LICENSE("GPL");
180 MODULE_AUTHOR("Jian Zhang <jzhang@ti.com> (and others)");
181 MODULE_DESCRIPTION("Glue layer for NAND flash on TI OMAP boards");